[deliverable/linux.git] / drivers / mtd / maps / l440gx.c

/*
 * $Id: l440gx.c,v 1.18 2005/11/07 11:14:27 gleixner Exp $
 *
 * BIOS Flash chip on Intel 440GX board.
 *
 * Bugs this currently does not work under linuxBIOS.
 */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>

#define PIIXE_IOBASE_RESOURCE	11

#define WINDOW_ADDR 0xfff00000
#define WINDOW_SIZE 0x00100000
#define BUSWIDTH 1

static u32 iobase;
#define IOBASE iobase
#define TRIBUF_PORT (IOBASE+0x37)
#define VPP_PORT (IOBASE+0x28)

static struct mtd_info *mymtd;


/* Is this really the vpp port? */
static void l440gx_set_vpp(struct map_info *map, int vpp)
{
	unsigned long l;

	l = inl(VPP_PORT);
	if (vpp) {
		l |= 1;
	} else {
		l &= ~1;
	}
	outl(l, VPP_PORT);
}

static struct map_info l440gx_map = {
	.name = "L440GX BIOS",
	.size = WINDOW_SIZE,
	.bankwidth = BUSWIDTH,
	.phys = WINDOW_ADDR,
#if 0
	/* FIXME verify that this is the
	 * appripriate code for vpp enable/disable
	 */
	.set_vpp = l440gx_set_vpp
#endif
};

static int __init init_l440gx(void)
{
	struct pci_dev *dev, *pm_dev;
	struct resource *pm_iobase;
	__u16 word;

	dev = pci_find_device(PCI_VENDOR_ID_INTEL,
		PCI_DEVICE_ID_INTEL_82371AB_0, NULL);

	pm_dev = pci_find_device(PCI_VENDOR_ID_INTEL,
		PCI_DEVICE_ID_INTEL_82371AB_3, NULL);

	if (!dev || !pm_dev) {
		printk(KERN_NOTICE "L440GX flash mapping: failed to find PIIX4 ISA bridge, cannot continue\n");
		return -ENODEV;
	}

	l440gx_map.virt = ioremap_nocache(WINDOW_ADDR, WINDOW_SIZE);

	if (!l440gx_map.virt) {
		printk(KERN_WARNING "Failed to ioremap L440GX flash region\n");
		return -ENOMEM;
	}
	simple_map_init(&l440gx_map);
	printk(KERN_NOTICE "window_addr = 0x%08lx\n", (unsigned long)l440gx_map.virt);

	/* Setup the pm iobase resource
	 * This code should move into some kind of generic bridge
	 * driver but for the moment I'm content with getting the
	 * allocation correct.
	 */
	pm_iobase = &pm_dev->resource[PIIXE_IOBASE_RESOURCE];
	if (!(pm_iobase->flags & IORESOURCE_IO)) {
		pm_iobase->name = "pm iobase";
		pm_iobase->start = 0;
		pm_iobase->end = 63;
		pm_iobase->flags = IORESOURCE_IO;

		/* Put the current value in the resource */
		pci_read_config_dword(pm_dev, 0x40, &iobase);
		iobase &= ~1;
		pm_iobase->start += iobase & ~1;
		pm_iobase->end += iobase & ~1;

		/* Allocate the resource region */
		if (pci_assign_resource(pm_dev, PIIXE_IOBASE_RESOURCE) != 0) {
			printk(KERN_WARNING "Could not allocate pm iobase resource\n");
			iounmap(l440gx_map.virt);
			return -ENXIO;
		}
	}
	/* Set the iobase */
	iobase = pm_iobase->start;
	pci_write_config_dword(pm_dev, 0x40, iobase | 1);


	/* Set XBCS# */
	pci_read_config_word(dev, 0x4e, &word);
	word |= 0x4;
        pci_write_config_word(dev, 0x4e, word);

	/* Supply write voltage to the chip */
	l440gx_set_vpp(&l440gx_map, 1);

	/* Enable the gate on the WE line */
	outb(inb(TRIBUF_PORT) & ~1, TRIBUF_PORT);

       	printk(KERN_NOTICE "Enabled WE line to L440GX BIOS flash chip.\n");

	mymtd = do_map_probe("jedec_probe", &l440gx_map);
	if (!mymtd) {
		printk(KERN_NOTICE "JEDEC probe on BIOS chip failed. Using ROM\n");
		mymtd = do_map_probe("map_rom", &l440gx_map);
	}
	if (mymtd) {
		mymtd->owner = THIS_MODULE;

		add_mtd_device(mymtd);
		return 0;
	}

	iounmap(l440gx_map.virt);
	return -ENXIO;
}

static void __exit cleanup_l440gx(void)
{
	del_mtd_device(mymtd);
	map_destroy(mymtd);

	iounmap(l440gx_map.virt);
}

module_init(init_l440gx);
module_exit(cleanup_l440gx);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
MODULE_DESCRIPTION("MTD map driver for BIOS chips on Intel L440GX motherboards");
Commit	Line	Data
1da177e4	1	/*
69f34c98	2	* $Id: l440gx.c,v 1.18 2005/11/07 11:14:27 gleixner Exp $
1da177e4 LT	3	*
	4	* BIOS Flash chip on Intel 440GX board.
	5	*
	6	* Bugs this currently does not work under linuxBIOS.
	7	*/
	8
	9	#include <linux/module.h>
	10	#include <linux/pci.h>
	11	#include <linux/kernel.h>
	12	#include <linux/init.h>
	13	#include <asm/io.h>
	14	#include <linux/mtd/mtd.h>
	15	#include <linux/mtd/map.h>
1da177e4 LT	16
	17	#define PIIXE_IOBASE_RESOURCE 11
	18
	19	#define WINDOW_ADDR 0xfff00000
	20	#define WINDOW_SIZE 0x00100000
	21	#define BUSWIDTH 1
	22
	23	static u32 iobase;
	24	#define IOBASE iobase
	25	#define TRIBUF_PORT (IOBASE+0x37)
	26	#define VPP_PORT (IOBASE+0x28)
	27
	28	static struct mtd_info *mymtd;
	29
	30
	31	/* Is this really the vpp port? */
	32	static void l440gx_set_vpp(struct map_info *map, int vpp)
	33	{
	34	unsigned long l;
	35
	36	l = inl(VPP_PORT);
	37	if (vpp) {
	38	l \|= 1;
	39	} else {
	40	l &= ~1;
	41	}
	42	outl(l, VPP_PORT);
	43	}
	44
	45	static struct map_info l440gx_map = {
	46	.name = "L440GX BIOS",
	47	.size = WINDOW_SIZE,
	48	.bankwidth = BUSWIDTH,
	49	.phys = WINDOW_ADDR,
	50	#if 0
69f34c98	51	/* FIXME verify that this is the
1da177e4 LT	52	* appripriate code for vpp enable/disable
	53	*/
	54	.set_vpp = l440gx_set_vpp
	55	#endif
	56	};
	57
	58	static int __init init_l440gx(void)
	59	{
	60	struct pci_dev dev, pm_dev;
	61	struct resource *pm_iobase;
	62	__u16 word;
	63
69f34c98	64	dev = pci_find_device(PCI_VENDOR_ID_INTEL,
1da177e4 LT	65	PCI_DEVICE_ID_INTEL_82371AB_0, NULL);
1da177e4 LT	66
69f34c98	67	pm_dev = pci_find_device(PCI_VENDOR_ID_INTEL,
1da177e4 LT	68	PCI_DEVICE_ID_INTEL_82371AB_3, NULL);
	69
	70	if (!dev \|\| !pm_dev) {
	71	printk(KERN_NOTICE "L440GX flash mapping: failed to find PIIX4 ISA bridge, cannot continue\n");
	72	return -ENODEV;
	73	}
	74
	75	l440gx_map.virt = ioremap_nocache(WINDOW_ADDR, WINDOW_SIZE);
	76
	77	if (!l440gx_map.virt) {
	78	printk(KERN_WARNING "Failed to ioremap L440GX flash region\n");
	79	return -ENOMEM;
	80	}
	81	simple_map_init(&l440gx_map);
	82	printk(KERN_NOTICE "window_addr = 0x%08lx\n", (unsigned long)l440gx_map.virt);
	83
69f34c98	84	/* Setup the pm iobase resource
1da177e4 LT	85	* This code should move into some kind of generic bridge
1da177e4 LT	86	* driver but for the moment I'm content with getting the
69f34c98	87	* allocation correct.
1da177e4 LT	88	*/
	89	pm_iobase = &pm_dev->resource[PIIXE_IOBASE_RESOURCE];
	90	if (!(pm_iobase->flags & IORESOURCE_IO)) {
	91	pm_iobase->name = "pm iobase";
	92	pm_iobase->start = 0;
	93	pm_iobase->end = 63;
	94	pm_iobase->flags = IORESOURCE_IO;
	95
	96	/* Put the current value in the resource */
	97	pci_read_config_dword(pm_dev, 0x40, &iobase);
	98	iobase &= ~1;
	99	pm_iobase->start += iobase & ~1;
	100	pm_iobase->end += iobase & ~1;
	101
	102	/* Allocate the resource region */
	103	if (pci_assign_resource(pm_dev, PIIXE_IOBASE_RESOURCE) != 0) {
	104	printk(KERN_WARNING "Could not allocate pm iobase resource\n");
	105	iounmap(l440gx_map.virt);
	106	return -ENXIO;
	107	}
	108	}
	109	/* Set the iobase */
	110	iobase = pm_iobase->start;
	111	pci_write_config_dword(pm_dev, 0x40, iobase \| 1);
69f34c98	112
1da177e4 LT	113
	114	/* Set XBCS# */
	115	pci_read_config_word(dev, 0x4e, &word);
	116	word \|= 0x4;
	117	pci_write_config_word(dev, 0x4e, word);
	118
	119	/* Supply write voltage to the chip */
	120	l440gx_set_vpp(&l440gx_map, 1);
	121
	122	/* Enable the gate on the WE line */
	123	outb(inb(TRIBUF_PORT) & ~1, TRIBUF_PORT);
69f34c98	124
1da177e4 LT	125	printk(KERN_NOTICE "Enabled WE line to L440GX BIOS flash chip.\n");
	126
	127	mymtd = do_map_probe("jedec_probe", &l440gx_map);
	128	if (!mymtd) {
	129	printk(KERN_NOTICE "JEDEC probe on BIOS chip failed. Using ROM\n");
	130	mymtd = do_map_probe("map_rom", &l440gx_map);
	131	}
	132	if (mymtd) {
	133	mymtd->owner = THIS_MODULE;
	134
	135	add_mtd_device(mymtd);
	136	return 0;
	137	}
	138
	139	iounmap(l440gx_map.virt);
	140	return -ENXIO;
	141	}
	142
	143	static void __exit cleanup_l440gx(void)
	144	{
	145	del_mtd_device(mymtd);
	146	map_destroy(mymtd);
69f34c98	147
1da177e4 LT	148	iounmap(l440gx_map.virt);
	149	}
	150
	151	module_init(init_l440gx);
	152	module_exit(cleanup_l440gx);
	153
	154	MODULE_LICENSE("GPL");
	155	MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
	156	MODULE_DESCRIPTION("MTD map driver for BIOS chips on Intel L440GX motherboards");