Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/drivers/mtd/maps/pci.c | |
3 | * | |
4 | * Copyright (C) 2001 Russell King, All rights reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
1da177e4 LT |
10 | * Generic PCI memory map driver. We support the following boards: |
11 | * - Intel IQ80310 ATU. | |
12 | * - Intel EBSA285 (blank rom programming mode). Tested working 27/09/2001 | |
13 | */ | |
14 | #include <linux/module.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/pci.h> | |
17 | #include <linux/init.h> | |
4e57b681 | 18 | #include <linux/slab.h> |
1da177e4 LT |
19 | |
20 | #include <linux/mtd/mtd.h> | |
21 | #include <linux/mtd/map.h> | |
22 | #include <linux/mtd/partitions.h> | |
23 | ||
24 | struct map_pci_info; | |
25 | ||
26 | struct mtd_pci_info { | |
27 | int (*init)(struct pci_dev *dev, struct map_pci_info *map); | |
28 | void (*exit)(struct pci_dev *dev, struct map_pci_info *map); | |
29 | unsigned long (*translate)(struct map_pci_info *map, unsigned long ofs); | |
30 | const char *map_name; | |
31 | }; | |
32 | ||
33 | struct map_pci_info { | |
34 | struct map_info map; | |
35 | void __iomem *base; | |
36 | void (*exit)(struct pci_dev *dev, struct map_pci_info *map); | |
37 | unsigned long (*translate)(struct map_pci_info *map, unsigned long ofs); | |
38 | struct pci_dev *dev; | |
69f34c98 | 39 | }; |
1da177e4 LT |
40 | |
41 | static map_word mtd_pci_read8(struct map_info *_map, unsigned long ofs) | |
42 | { | |
43 | struct map_pci_info *map = (struct map_pci_info *)_map; | |
44 | map_word val; | |
45 | val.x[0]= readb(map->base + map->translate(map, ofs)); | |
46 | // printk("read8 : %08lx => %02x\n", ofs, val.x[0]); | |
47 | return val; | |
48 | } | |
49 | ||
50 | #if 0 | |
51 | static map_word mtd_pci_read16(struct map_info *_map, unsigned long ofs) | |
52 | { | |
53 | struct map_pci_info *map = (struct map_pci_info *)_map; | |
54 | map_word val; | |
55 | val.x[0] = readw(map->base + map->translate(map, ofs)); | |
56 | // printk("read16: %08lx => %04x\n", ofs, val.x[0]); | |
57 | return val; | |
58 | } | |
59 | #endif | |
60 | static map_word mtd_pci_read32(struct map_info *_map, unsigned long ofs) | |
61 | { | |
62 | struct map_pci_info *map = (struct map_pci_info *)_map; | |
63 | map_word val; | |
64 | val.x[0] = readl(map->base + map->translate(map, ofs)); | |
65 | // printk("read32: %08lx => %08x\n", ofs, val.x[0]); | |
66 | return val; | |
67 | } | |
68 | ||
69 | static void mtd_pci_copyfrom(struct map_info *_map, void *to, unsigned long from, ssize_t len) | |
70 | { | |
71 | struct map_pci_info *map = (struct map_pci_info *)_map; | |
72 | memcpy_fromio(to, map->base + map->translate(map, from), len); | |
73 | } | |
74 | ||
75 | static void mtd_pci_write8(struct map_info *_map, map_word val, unsigned long ofs) | |
76 | { | |
77 | struct map_pci_info *map = (struct map_pci_info *)_map; | |
78 | // printk("write8 : %08lx <= %02x\n", ofs, val.x[0]); | |
79 | writeb(val.x[0], map->base + map->translate(map, ofs)); | |
80 | } | |
81 | ||
82 | #if 0 | |
83 | static void mtd_pci_write16(struct map_info *_map, map_word val, unsigned long ofs) | |
84 | { | |
85 | struct map_pci_info *map = (struct map_pci_info *)_map; | |
86 | // printk("write16: %08lx <= %04x\n", ofs, val.x[0]); | |
87 | writew(val.x[0], map->base + map->translate(map, ofs)); | |
88 | } | |
89 | #endif | |
90 | static void mtd_pci_write32(struct map_info *_map, map_word val, unsigned long ofs) | |
91 | { | |
92 | struct map_pci_info *map = (struct map_pci_info *)_map; | |
93 | // printk("write32: %08lx <= %08x\n", ofs, val.x[0]); | |
94 | writel(val.x[0], map->base + map->translate(map, ofs)); | |
95 | } | |
96 | ||
97 | static void mtd_pci_copyto(struct map_info *_map, unsigned long to, const void *from, ssize_t len) | |
98 | { | |
99 | struct map_pci_info *map = (struct map_pci_info *)_map; | |
100 | memcpy_toio(map->base + map->translate(map, to), from, len); | |
101 | } | |
102 | ||
7ac571f8 | 103 | static const struct map_info mtd_pci_map = { |
1da177e4 LT |
104 | .phys = NO_XIP, |
105 | .copy_from = mtd_pci_copyfrom, | |
106 | .copy_to = mtd_pci_copyto, | |
107 | }; | |
108 | ||
109 | /* | |
110 | * Intel IOP80310 Flash driver | |
111 | */ | |
112 | ||
113 | static int | |
114 | intel_iq80310_init(struct pci_dev *dev, struct map_pci_info *map) | |
115 | { | |
116 | u32 win_base; | |
117 | ||
118 | map->map.bankwidth = 1; | |
119 | map->map.read = mtd_pci_read8, | |
120 | map->map.write = mtd_pci_write8, | |
121 | ||
122 | map->map.size = 0x00800000; | |
123 | map->base = ioremap_nocache(pci_resource_start(dev, 0), | |
124 | pci_resource_len(dev, 0)); | |
125 | ||
126 | if (!map->base) | |
127 | return -ENOMEM; | |
128 | ||
129 | /* | |
130 | * We want to base the memory window at Xscale | |
131 | * bus address 0, not 0x1000. | |
132 | */ | |
133 | pci_read_config_dword(dev, 0x44, &win_base); | |
134 | pci_write_config_dword(dev, 0x44, 0); | |
135 | ||
136 | map->map.map_priv_2 = win_base; | |
137 | ||
138 | return 0; | |
139 | } | |
140 | ||
141 | static void | |
142 | intel_iq80310_exit(struct pci_dev *dev, struct map_pci_info *map) | |
143 | { | |
144 | if (map->base) | |
145 | iounmap(map->base); | |
146 | pci_write_config_dword(dev, 0x44, map->map.map_priv_2); | |
147 | } | |
148 | ||
149 | static unsigned long | |
150 | intel_iq80310_translate(struct map_pci_info *map, unsigned long ofs) | |
151 | { | |
152 | unsigned long page_addr = ofs & 0x00400000; | |
153 | ||
154 | /* | |
155 | * This mundges the flash location so we avoid | |
156 | * the first 80 bytes (they appear to read nonsense). | |
157 | */ | |
158 | if (page_addr) { | |
159 | writel(0x00000008, map->base + 0x1558); | |
160 | writel(0x00000000, map->base + 0x1550); | |
161 | } else { | |
162 | writel(0x00000007, map->base + 0x1558); | |
163 | writel(0x00800000, map->base + 0x1550); | |
164 | ofs += 0x00800000; | |
165 | } | |
166 | ||
167 | return ofs; | |
168 | } | |
169 | ||
170 | static struct mtd_pci_info intel_iq80310_info = { | |
171 | .init = intel_iq80310_init, | |
172 | .exit = intel_iq80310_exit, | |
173 | .translate = intel_iq80310_translate, | |
174 | .map_name = "cfi_probe", | |
175 | }; | |
176 | ||
177 | /* | |
178 | * Intel DC21285 driver | |
179 | */ | |
180 | ||
181 | static int | |
182 | intel_dc21285_init(struct pci_dev *dev, struct map_pci_info *map) | |
183 | { | |
184 | unsigned long base, len; | |
185 | ||
186 | base = pci_resource_start(dev, PCI_ROM_RESOURCE); | |
187 | len = pci_resource_len(dev, PCI_ROM_RESOURCE); | |
188 | ||
189 | if (!len || !base) { | |
190 | /* | |
191 | * No ROM resource | |
192 | */ | |
193 | base = pci_resource_start(dev, 2); | |
194 | len = pci_resource_len(dev, 2); | |
195 | ||
196 | /* | |
197 | * We need to re-allocate PCI BAR2 address range to the | |
198 | * PCI ROM BAR, and disable PCI BAR2. | |
199 | */ | |
200 | } else { | |
201 | /* | |
202 | * Hmm, if an address was allocated to the ROM resource, but | |
203 | * not enabled, should we be allocating a new resource for it | |
204 | * or simply enabling it? | |
205 | */ | |
4ab13943 AC |
206 | pci_enable_rom(dev); |
207 | printk("%s: enabling expansion ROM\n", pci_name(dev)); | |
1da177e4 LT |
208 | } |
209 | ||
210 | if (!len || !base) | |
211 | return -ENXIO; | |
212 | ||
213 | map->map.bankwidth = 4; | |
214 | map->map.read = mtd_pci_read32, | |
215 | map->map.write = mtd_pci_write32, | |
216 | map->map.size = len; | |
217 | map->base = ioremap_nocache(base, len); | |
218 | ||
219 | if (!map->base) | |
220 | return -ENOMEM; | |
221 | ||
222 | return 0; | |
223 | } | |
224 | ||
225 | static void | |
226 | intel_dc21285_exit(struct pci_dev *dev, struct map_pci_info *map) | |
227 | { | |
1da177e4 LT |
228 | if (map->base) |
229 | iounmap(map->base); | |
230 | ||
231 | /* | |
232 | * We need to undo the PCI BAR2/PCI ROM BAR address alteration. | |
233 | */ | |
4ab13943 | 234 | pci_disable_rom(dev); |
1da177e4 LT |
235 | } |
236 | ||
237 | static unsigned long | |
238 | intel_dc21285_translate(struct map_pci_info *map, unsigned long ofs) | |
239 | { | |
240 | return ofs & 0x00ffffc0 ? ofs : (ofs ^ (1 << 5)); | |
241 | } | |
242 | ||
243 | static struct mtd_pci_info intel_dc21285_info = { | |
244 | .init = intel_dc21285_init, | |
245 | .exit = intel_dc21285_exit, | |
246 | .translate = intel_dc21285_translate, | |
247 | .map_name = "jedec_probe", | |
248 | }; | |
249 | ||
250 | /* | |
251 | * PCI device ID table | |
252 | */ | |
253 | ||
254 | static struct pci_device_id mtd_pci_ids[] = { | |
255 | { | |
256 | .vendor = PCI_VENDOR_ID_INTEL, | |
257 | .device = 0x530d, | |
258 | .subvendor = PCI_ANY_ID, | |
259 | .subdevice = PCI_ANY_ID, | |
260 | .class = PCI_CLASS_MEMORY_OTHER << 8, | |
261 | .class_mask = 0xffff00, | |
262 | .driver_data = (unsigned long)&intel_iq80310_info, | |
263 | }, | |
264 | { | |
265 | .vendor = PCI_VENDOR_ID_DEC, | |
266 | .device = PCI_DEVICE_ID_DEC_21285, | |
267 | .subvendor = 0, /* DC21285 defaults to 0 on reset */ | |
268 | .subdevice = 0, /* DC21285 defaults to 0 on reset */ | |
269 | .driver_data = (unsigned long)&intel_dc21285_info, | |
270 | }, | |
271 | { 0, } | |
272 | }; | |
273 | ||
274 | /* | |
275 | * Generic code follows. | |
276 | */ | |
277 | ||
278 | static int __devinit | |
279 | mtd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) | |
280 | { | |
281 | struct mtd_pci_info *info = (struct mtd_pci_info *)id->driver_data; | |
282 | struct map_pci_info *map = NULL; | |
283 | struct mtd_info *mtd = NULL; | |
284 | int err; | |
285 | ||
286 | err = pci_enable_device(dev); | |
287 | if (err) | |
288 | goto out; | |
289 | ||
290 | err = pci_request_regions(dev, "pci mtd"); | |
291 | if (err) | |
292 | goto out; | |
293 | ||
294 | map = kmalloc(sizeof(*map), GFP_KERNEL); | |
295 | err = -ENOMEM; | |
296 | if (!map) | |
297 | goto release; | |
298 | ||
299 | map->map = mtd_pci_map; | |
300 | map->map.name = pci_name(dev); | |
301 | map->dev = dev; | |
302 | map->exit = info->exit; | |
303 | map->translate = info->translate; | |
304 | ||
305 | err = info->init(dev, map); | |
306 | if (err) | |
307 | goto release; | |
308 | ||
309 | /* tsk - do_map_probe should take const char * */ | |
310 | mtd = do_map_probe((char *)info->map_name, &map->map); | |
311 | err = -ENODEV; | |
312 | if (!mtd) | |
313 | goto release; | |
314 | ||
315 | mtd->owner = THIS_MODULE; | |
ee0e87b1 | 316 | mtd_device_register(mtd, NULL, 0); |
1da177e4 LT |
317 | |
318 | pci_set_drvdata(dev, mtd); | |
319 | ||
320 | return 0; | |
321 | ||
322 | release: | |
1da177e4 LT |
323 | if (map) { |
324 | map->exit(dev, map); | |
325 | kfree(map); | |
326 | } | |
327 | ||
328 | pci_release_regions(dev); | |
329 | out: | |
330 | return err; | |
331 | } | |
332 | ||
333 | static void __devexit | |
334 | mtd_pci_remove(struct pci_dev *dev) | |
335 | { | |
336 | struct mtd_info *mtd = pci_get_drvdata(dev); | |
337 | struct map_pci_info *map = mtd->priv; | |
338 | ||
ee0e87b1 | 339 | mtd_device_unregister(mtd); |
1da177e4 LT |
340 | map_destroy(mtd); |
341 | map->exit(dev, map); | |
342 | kfree(map); | |
343 | ||
344 | pci_set_drvdata(dev, NULL); | |
345 | pci_release_regions(dev); | |
346 | } | |
347 | ||
348 | static struct pci_driver mtd_pci_driver = { | |
349 | .name = "MTD PCI", | |
350 | .probe = mtd_pci_probe, | |
351 | .remove = __devexit_p(mtd_pci_remove), | |
352 | .id_table = mtd_pci_ids, | |
353 | }; | |
354 | ||
355 | static int __init mtd_pci_maps_init(void) | |
356 | { | |
ff3bc4eb | 357 | return pci_register_driver(&mtd_pci_driver); |
1da177e4 LT |
358 | } |
359 | ||
360 | static void __exit mtd_pci_maps_exit(void) | |
361 | { | |
362 | pci_unregister_driver(&mtd_pci_driver); | |
363 | } | |
364 | ||
365 | module_init(mtd_pci_maps_init); | |
366 | module_exit(mtd_pci_maps_exit); | |
367 | ||
368 | MODULE_LICENSE("GPL"); | |
369 | MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>"); | |
370 | MODULE_DESCRIPTION("Generic PCI map driver"); | |
371 | MODULE_DEVICE_TABLE(pci, mtd_pci_ids); | |
372 |