Commit | Line | Data |
---|---|---|
e5f710cf ML |
1 | config MTD_NAND_ECC |
2 | tristate | |
3 | ||
4 | config MTD_NAND_ECC_SMC | |
5 | bool "NAND ECC Smart Media byte order" | |
6 | depends on MTD_NAND_ECC | |
7 | default n | |
8 | help | |
9 | Software ECC according to the Smart Media Specification. | |
10 | The original Linux implementation had byte 0 and 1 swapped. | |
11 | ||
5869d2c3 ML |
12 | |
13 | menuconfig MTD_NAND | |
14 | tristate "NAND Device Support" | |
15 | depends on MTD | |
16 | select MTD_NAND_IDS | |
17 | select MTD_NAND_ECC | |
18 | help | |
19 | This enables support for accessing all type of NAND flash | |
20 | devices. For further information see | |
21 | <http://www.linux-mtd.infradead.org/doc/nand.html>. | |
22 | ||
ec98c681 JE |
23 | if MTD_NAND |
24 | ||
193bd400 ID |
25 | config MTD_NAND_BCH |
26 | tristate | |
27 | select BCH | |
28 | depends on MTD_NAND_ECC_BCH | |
29 | default MTD_NAND | |
30 | ||
31 | config MTD_NAND_ECC_BCH | |
32 | bool "Support software BCH ECC" | |
33 | default n | |
34 | help | |
35 | This enables support for software BCH error correction. Binary BCH | |
36 | codes are more powerful and cpu intensive than traditional Hamming | |
37 | ECC codes. They are used with NAND devices requiring more than 1 bit | |
38 | of error correction. | |
1da177e4 | 39 | |
9fc51a37 | 40 | config MTD_SM_COMMON |
9fc51a37 ML |
41 | tristate |
42 | default n | |
43 | ||
ce082596 | 44 | config MTD_NAND_DENALI |
2a0a288e | 45 | tristate "Support Denali NAND controller" |
da887588 | 46 | depends on HAS_DMA |
2a0a288e DN |
47 | help |
48 | Enable support for the Denali NAND controller. This should be | |
49 | combined with either the PCI or platform drivers to provide device | |
50 | registration. | |
51 | ||
52 | config MTD_NAND_DENALI_PCI | |
ce082596 | 53 | tristate "Support Denali NAND controller on Intel Moorestown" |
2a0a288e | 54 | depends on PCI && MTD_NAND_DENALI |
ce082596 JR |
55 | help |
56 | Enable the driver for NAND flash on Intel Moorestown, using the | |
57 | Denali NAND controller core. | |
30f9f2fb DN |
58 | |
59 | config MTD_NAND_DENALI_DT | |
60 | tristate "Support Denali NAND controller as a DT device" | |
61 | depends on HAVE_CLK && MTD_NAND_DENALI | |
62 | help | |
63 | Enable the driver for NAND flash on platforms using a Denali NAND | |
64 | controller as a DT device. | |
65 | ||
ce082596 JR |
66 | config MTD_NAND_DENALI_SCRATCH_REG_ADDR |
67 | hex "Denali NAND size scratch register address" | |
68 | default "0xFF108018" | |
2a0a288e | 69 | depends on MTD_NAND_DENALI_PCI |
ce082596 JR |
70 | help |
71 | Some platforms place the NAND chip size in a scratch register | |
72 | because (some versions of) the driver aren't able to automatically | |
73 | determine the size of certain chips. Set the address of the | |
74 | scratch register here to enable this feature. On Intel Moorestown | |
75 | boards, the scratch register is at 0xFF108018. | |
76 | ||
aaf7ea20 | 77 | config MTD_NAND_GPIO |
c9d79c4b | 78 | tristate "GPIO assisted NAND Flash driver" |
ba440398 | 79 | depends on GPIOLIB |
aaf7ea20 | 80 | help |
c9d79c4b GS |
81 | This enables a NAND flash driver where control signals are |
82 | connected to GPIO pins, and commands and data are communicated | |
83 | via a memory mapped interface. | |
aaf7ea20 | 84 | |
3d12c0c7 JM |
85 | config MTD_NAND_AMS_DELTA |
86 | tristate "NAND Flash device on Amstrad E3" | |
ec98c681 | 87 | depends on MACH_AMS_DELTA |
494f45d5 | 88 | default y |
3d12c0c7 JM |
89 | help |
90 | Support for NAND flash on Amstrad E3 (Delta). | |
91 | ||
67ce04bf | 92 | config MTD_NAND_OMAP2 |
46a00d83 | 93 | tristate "NAND Flash device on OMAP2, OMAP3 and OMAP4" |
12f049bd | 94 | depends on ARCH_OMAP2PLUS |
67ce04bf | 95 | help |
46a00d83 JW |
96 | Support for NAND flash on Texas Instruments OMAP2, OMAP3 and OMAP4 |
97 | platforms. | |
67ce04bf | 98 | |
0e618ef0 | 99 | config MTD_NAND_OMAP_BCH |
43b77693 | 100 | depends on MTD_NAND_OMAP2 |
e7cd6824 | 101 | bool "Support hardware based BCH error correction" |
0e618ef0 ID |
102 | default n |
103 | select BCH | |
0e618ef0 | 104 | help |
90c9c955 PG |
105 | This config enables the ELM hardware engine, which can be used to |
106 | locate and correct errors when using BCH ECC scheme. This offloads | |
107 | the cpu from doing ECC error searching and correction. However some | |
108 | legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine | |
8b3d58e5 | 109 | so this is optional for them. |
0e618ef0 | 110 | |
e7cd6824 EG |
111 | config MTD_NAND_OMAP_BCH_BUILD |
112 | def_tristate MTD_NAND_OMAP2 && MTD_NAND_OMAP_BCH | |
113 | ||
1da177e4 LT |
114 | config MTD_NAND_IDS |
115 | tristate | |
116 | ||
67e054e9 ML |
117 | config MTD_NAND_RICOH |
118 | tristate "Ricoh xD card reader" | |
119 | default n | |
f696aa43 | 120 | depends on PCI |
67e054e9 ML |
121 | select MTD_SM_COMMON |
122 | help | |
123 | Enable support for Ricoh R5C852 xD card reader | |
124 | You also need to enable ether | |
125 | NAND SSFDC (SmartMedia) read only translation layer' or new | |
126 | expermental, readwrite | |
127 | 'SmartMedia/xD new translation layer' | |
128 | ||
1da177e4 | 129 | config MTD_NAND_AU1550 |
ef6f0d1f | 130 | tristate "Au1550/1200 NAND support" |
37663860 | 131 | depends on MIPS_ALCHEMY |
1da177e4 LT |
132 | help |
133 | This enables the driver for the NAND flash controller on the | |
134 | AMD/Alchemy 1550 SOC. | |
135 | ||
b37bde14 BW |
136 | config MTD_NAND_BF5XX |
137 | tristate "Blackfin on-chip NAND Flash Controller driver" | |
8c1a1158 | 138 | depends on BF54x || BF52x |
b37bde14 BW |
139 | help |
140 | This enables the Blackfin on-chip NAND flash controller | |
141 | ||
142 | No board specific support is done by this driver, each board | |
143 | must advertise a platform_device for the driver to attach. | |
144 | ||
145 | This driver can also be built as a module. If so, the module | |
146 | will be called bf5xx-nand. | |
147 | ||
148 | config MTD_NAND_BF5XX_HWECC | |
149 | bool "BF5XX NAND Hardware ECC" | |
a0dd2018 | 150 | default y |
b37bde14 BW |
151 | depends on MTD_NAND_BF5XX |
152 | help | |
153 | Enable the use of the BF5XX's internal ECC generator when | |
154 | using NAND. | |
155 | ||
fcb90ba7 MF |
156 | config MTD_NAND_BF5XX_BOOTROM_ECC |
157 | bool "Use Blackfin BootROM ECC Layout" | |
158 | default n | |
159 | depends on MTD_NAND_BF5XX_HWECC | |
160 | help | |
161 | If you wish to modify NAND pages and allow the Blackfin on-chip | |
162 | BootROM to boot from them, say Y here. This is only necessary | |
163 | if you are booting U-Boot out of NAND and you wish to update | |
164 | U-Boot from Linux' userspace. Otherwise, you should say N here. | |
165 | ||
166 | If unsure, say N. | |
167 | ||
1da177e4 | 168 | config MTD_NAND_S3C2410 |
9dbc0902 | 169 | tristate "NAND Flash support for Samsung S3C SoCs" |
b130d5c2 | 170 | depends on ARCH_S3C24XX || ARCH_S3C64XX |
1da177e4 | 171 | help |
9dbc0902 | 172 | This enables the NAND flash controller on the S3C24xx and S3C64xx |
a4f957f1 | 173 | SoCs |
1da177e4 | 174 | |
4992a9e8 | 175 | No board specific support is done by this driver, each board |
61b03bd7 | 176 | must advertise a platform_device for the driver to attach. |
1da177e4 LT |
177 | |
178 | config MTD_NAND_S3C2410_DEBUG | |
9dbc0902 | 179 | bool "Samsung S3C NAND driver debug" |
1da177e4 LT |
180 | depends on MTD_NAND_S3C2410 |
181 | help | |
9dbc0902 | 182 | Enable debugging of the S3C NAND driver |
1da177e4 LT |
183 | |
184 | config MTD_NAND_S3C2410_HWECC | |
9dbc0902 | 185 | bool "Samsung S3C NAND Hardware ECC" |
1da177e4 LT |
186 | depends on MTD_NAND_S3C2410 |
187 | help | |
9dbc0902 PK |
188 | Enable the use of the controller's internal ECC generator when |
189 | using NAND. Early versions of the chips have had problems with | |
1da177e4 LT |
190 | incorrect ECC generation, and if using these, the default of |
191 | software ECC is preferable. | |
192 | ||
a808ad3b SM |
193 | config MTD_NAND_NDFC |
194 | tristate "NDFC NanD Flash Controller" | |
195 | depends on 4xx | |
196 | select MTD_NAND_ECC_SMC | |
197 | help | |
198 | NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs | |
199 | ||
d1fef3c5 | 200 | config MTD_NAND_S3C2410_CLKSTOP |
9dbc0902 | 201 | bool "Samsung S3C NAND IDLE clock stop" |
d1fef3c5 BD |
202 | depends on MTD_NAND_S3C2410 |
203 | default n | |
204 | help | |
205 | Stop the clock to the NAND controller when there is no chip | |
206 | selected to save power. This will mean there is a small delay | |
207 | when the is NAND chip selected or released, but will save | |
208 | approximately 5mA of power when there is nothing happening. | |
209 | ||
1da177e4 | 210 | config MTD_NAND_DISKONCHIP |
5d0e137d | 211 | tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation)" |
9310da0b | 212 | depends on HAS_IOMEM |
1da177e4 LT |
213 | select REED_SOLOMON |
214 | select REED_SOLOMON_DEC16 | |
215 | help | |
216 | This is a reimplementation of M-Systems DiskOnChip 2000, | |
217 | Millennium and Millennium Plus as a standard NAND device driver, | |
218 | as opposed to the earlier self-contained MTD device drivers. | |
219 | This should enable, among other things, proper JFFS2 operation on | |
220 | these devices. | |
221 | ||
222 | config MTD_NAND_DISKONCHIP_PROBE_ADVANCED | |
223 | bool "Advanced detection options for DiskOnChip" | |
224 | depends on MTD_NAND_DISKONCHIP | |
225 | help | |
226 | This option allows you to specify nonstandard address at which to | |
227 | probe for a DiskOnChip, or to change the detection options. You | |
228 | are unlikely to need any of this unless you are using LinuxBIOS. | |
229 | Say 'N'. | |
230 | ||
231 | config MTD_NAND_DISKONCHIP_PROBE_ADDRESS | |
232 | hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED | |
233 | depends on MTD_NAND_DISKONCHIP | |
234 | default "0" | |
235 | ---help--- | |
236 | By default, the probe for DiskOnChip devices will look for a | |
237 | DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. | |
238 | This option allows you to specify a single address at which to probe | |
239 | for the device, which is useful if you have other devices in that | |
240 | range which get upset when they are probed. | |
241 | ||
242 | (Note that on PowerPC, the normal probe will only check at | |
243 | 0xE4000000.) | |
244 | ||
245 | Normally, you should leave this set to zero, to allow the probe at | |
246 | the normal addresses. | |
247 | ||
248 | config MTD_NAND_DISKONCHIP_PROBE_HIGH | |
249 | bool "Probe high addresses" | |
250 | depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED | |
251 | help | |
252 | By default, the probe for DiskOnChip devices will look for a | |
253 | DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. | |
254 | This option changes to make it probe between 0xFFFC8000 and | |
255 | 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be | |
256 | useful to you. Say 'N'. | |
257 | ||
258 | config MTD_NAND_DISKONCHIP_BBTWRITE | |
259 | bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP" | |
260 | depends on MTD_NAND_DISKONCHIP | |
261 | help | |
262 | On DiskOnChip devices shipped with the INFTL filesystem (Millennium | |
263 | and 2000 TSOP/Alon), Linux reserves some space at the end of the | |
264 | device for the Bad Block Table (BBT). If you have existing INFTL | |
265 | data on your device (created by non-Linux tools such as M-Systems' | |
266 | DOS drivers), your data might overlap the area Linux wants to use for | |
267 | the BBT. If this is a concern for you, leave this option disabled and | |
268 | Linux will not write BBT data into this area. | |
269 | The downside of leaving this option disabled is that if bad blocks | |
270 | are detected by Linux, they will not be recorded in the BBT, which | |
271 | could cause future problems. | |
272 | Once you enable this option, new filesystems (INFTL or others, created | |
273 | in Linux or other operating systems) will not use the reserved area. | |
274 | The only reason not to enable this option is to prevent damage to | |
275 | preexisting filesystems. | |
276 | Even if you leave this disabled, you can enable BBT writes at module | |
277 | load time (assuming you build diskonchip as a module) with the module | |
278 | parameter "inftl_bbt_write=1". | |
1da177e4 | 279 | |
570469f3 | 280 | config MTD_NAND_DOCG4 |
5d0e137d KC |
281 | tristate "Support for DiskOnChip G4" |
282 | depends on HAS_IOMEM | |
570469f3 MD |
283 | select BCH |
284 | select BITREVERSE | |
285 | help | |
286 | Support for diskonchip G4 nand flash, found in various smartphones and | |
287 | PDAs, among them the Palm Treo680, HTC Prophet and Wizard, Toshiba | |
288 | Portege G900, Asus P526, and O2 XDA Zinc. | |
289 | ||
290 | With this driver you will be able to use UBI and create a ubifs on the | |
291 | device, so you may wish to consider enabling UBI and UBIFS as well. | |
292 | ||
293 | These devices ship with the Mys/Sandisk SAFTL formatting, for which | |
294 | there is currently no mtd parser, so you may want to use command line | |
295 | partitioning to segregate write-protected blocks. On the Treo680, the | |
296 | first five erase blocks (256KiB each) are write-protected, followed | |
297 | by the block containing the saftl partition table. This is probably | |
298 | typical. | |
299 | ||
54af6b46 AB |
300 | config MTD_NAND_SHARPSL |
301 | tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)" | |
ec98c681 | 302 | depends on ARCH_PXA |
54af6b46 | 303 | |
c45aa055 | 304 | config MTD_NAND_CAFE |
8c61b7a7 SB |
305 | tristate "NAND support for OLPC CAFÉ chip" |
306 | depends on PCI | |
307 | select REED_SOLOMON | |
308 | select REED_SOLOMON_DEC16 | |
309 | help | |
8f46c527 | 310 | Use NAND flash attached to the CAFÉ chip designed for the OLPC |
8c61b7a7 | 311 | laptop. |
c45aa055 | 312 | |
179fdc3f DW |
313 | config MTD_NAND_CS553X |
314 | tristate "NAND support for CS5535/CS5536 (AMD Geode companion chip)" | |
4272ebfb | 315 | depends on X86_32 |
f41a5f80 DW |
316 | help |
317 | The CS553x companion chips for the AMD Geode processor | |
318 | include NAND flash controllers with built-in hardware ECC | |
319 | capabilities; enabling this option will allow you to use | |
320 | these. The driver will check the MSRs to verify that the | |
321 | controller is enabled for NAND, and currently requires that | |
322 | the controller be in MMIO mode. | |
323 | ||
4737f097 | 324 | If you say "m", the module will be called cs553x_nand. |
f41a5f80 | 325 | |
d4f4c0aa | 326 | config MTD_NAND_ATMEL |
bd5a4382 | 327 | tristate "Support for NAND Flash / SmartMedia on AT91 and AVR32" |
984290de | 328 | depends on ARCH_AT91 || AVR32 |
42cb1403 AV |
329 | help |
330 | Enables support for NAND Flash / Smart Media Card interface | |
984290de | 331 | on Atmel AT91 and AVR32 processors. |
42cb1403 | 332 | |
fe69af00 | 333 | config MTD_NAND_PXA3xx |
c5f99677 | 334 | tristate "NAND support on PXA3xx and Armada 370/XP" |
0d58f6ee | 335 | depends on PXA3xx || ARCH_MMP || PLAT_ORION |
fe69af00 | 336 | help |
337 | This enables the driver for the NAND flash device found on | |
c5f99677 | 338 | PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2). |
fe69af00 | 339 | |
2944a44d RS |
340 | config MTD_NAND_SLC_LPC32XX |
341 | tristate "NXP LPC32xx SLC Controller" | |
342 | depends on ARCH_LPC32XX | |
343 | help | |
344 | Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell | |
345 | chips) NAND controller. This is the default for the PHYTEC 3250 | |
346 | reference board which contains a NAND256R3A2CZA6 chip. | |
347 | ||
348 | Please check the actual NAND chip connected and its support | |
349 | by the SLC NAND controller. | |
350 | ||
70f7cb78 RS |
351 | config MTD_NAND_MLC_LPC32XX |
352 | tristate "NXP LPC32xx MLC Controller" | |
353 | depends on ARCH_LPC32XX | |
354 | help | |
355 | Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND | |
356 | controller. This is the default for the WORK92105 controller | |
357 | board. | |
358 | ||
359 | Please check the actual NAND chip connected and its support | |
360 | by the MLC NAND controller. | |
361 | ||
54d33c4c MR |
362 | config MTD_NAND_CM_X270 |
363 | tristate "Support for NAND Flash on CM-X270 modules" | |
8c1a1158 | 364 | depends on MACH_ARMCORE |
54d33c4c | 365 | |
846fc31d EM |
366 | config MTD_NAND_PASEMI |
367 | tristate "NAND support for PA Semi PWRficient" | |
8c1a1158 | 368 | depends on PPC_PASEMI |
846fc31d EM |
369 | help |
370 | Enables support for NAND Flash interface on PA Semi PWRficient | |
371 | based boards | |
54d33c4c | 372 | |
ec43b816 IM |
373 | config MTD_NAND_TMIO |
374 | tristate "NAND Flash device on Toshiba Mobile IO Controller" | |
8c1a1158 | 375 | depends on MFD_TMIO |
ec43b816 IM |
376 | help |
377 | Support for NAND flash connected to a Toshiba Mobile IO | |
378 | Controller in some PDAs, including the Sharp SL6000x. | |
379 | ||
54af6b46 AB |
380 | config MTD_NAND_NANDSIM |
381 | tristate "Support for NAND Flash Simulator" | |
1da177e4 | 382 | help |
f41a5f80 | 383 | The simulator may simulate various NAND flash chips for the |
1da177e4 | 384 | MTD nand layer. |
54af6b46 | 385 | |
157550ff | 386 | config MTD_NAND_GPMI_NAND |
e1f5b3f6 | 387 | tristate "GPMI NAND Flash Controller driver" |
a3349377 | 388 | depends on MTD_NAND && MXS_DMA |
157550ff | 389 | help |
27c84fa5 | 390 | Enables NAND Flash support for IMX23, IMX28 or IMX6. |
157550ff HS |
391 | The GPMI controller is very powerful, with the help of BCH |
392 | module, it can do the hardware ECC. The GPMI supports several | |
393 | NAND flashs at the same time. The GPMI may conflicts with other | |
394 | block, such as SD card. So pay attention to it when you enable | |
395 | the GPMI. | |
396 | ||
a5401370 | 397 | config MTD_NAND_BCM47XXNFLASH |
ecfe57b7 | 398 | tristate "Support for NAND flash on BCM4706 BCMA bus" |
a5401370 RM |
399 | depends on BCMA_NFLASH |
400 | help | |
401 | BCMA bus can have various flash memories attached, they are | |
402 | registered by bcma as platform devices. This enables driver for | |
ecfe57b7 | 403 | NAND flash memories. For now only BCM4706 is supported. |
a5401370 | 404 | |
711fdf62 VW |
405 | config MTD_NAND_PLATFORM |
406 | tristate "Support for generic platform NAND driver" | |
9310da0b | 407 | depends on HAS_IOMEM |
711fdf62 VW |
408 | help |
409 | This implements a generic NAND driver for on-SOC platform | |
410 | devices. You will need to provide platform-specific functions | |
411 | via platform_data. | |
412 | ||
2a1dba29 TP |
413 | config MTD_NAND_ORION |
414 | tristate "NAND Flash support for Marvell Orion SoC" | |
8c1a1158 | 415 | depends on PLAT_ORION |
2a1dba29 TP |
416 | help |
417 | This enables the NAND flash controller on Orion machines. | |
418 | ||
419 | No board specific support is done by this driver, each board | |
420 | must advertise a platform_device for the driver to attach. | |
421 | ||
76b10467 SW |
422 | config MTD_NAND_FSL_ELBC |
423 | tristate "NAND support for Freescale eLBC controllers" | |
be802bf9 | 424 | depends on PPC |
3ab8f2a2 | 425 | select FSL_LBC |
76b10467 SW |
426 | help |
427 | Various Freescale chips, including the 8313, include a NAND Flash | |
428 | Controller Module with built-in hardware ECC capabilities. | |
429 | Enabling this option will enable you to use this to control | |
430 | external NAND devices. | |
431 | ||
82771882 PK |
432 | config MTD_NAND_FSL_IFC |
433 | tristate "NAND support for Freescale IFC controller" | |
434 | depends on MTD_NAND && FSL_SOC | |
435 | select FSL_IFC | |
42d87b18 | 436 | select MEMORY |
82771882 PK |
437 | help |
438 | Various Freescale chips e.g P1010, include a NAND Flash machine | |
439 | with built-in hardware ECC capabilities. | |
440 | Enabling this option will enable you to use this to control | |
441 | external NAND devices. | |
442 | ||
5c249c5a AV |
443 | config MTD_NAND_FSL_UPM |
444 | tristate "Support for NAND on Freescale UPM" | |
8c1a1158 | 445 | depends on PPC_83xx || PPC_85xx |
5c249c5a AV |
446 | select FSL_LBC |
447 | help | |
448 | Enables support for NAND Flash chips wired onto Freescale PowerPC | |
449 | processor localbus with User-Programmable Machine support. | |
450 | ||
bb315f74 AG |
451 | config MTD_NAND_MPC5121_NFC |
452 | tristate "MPC5121 built-in NAND Flash Controller support" | |
453 | depends on PPC_MPC512x | |
454 | help | |
455 | This enables the driver for the NAND flash controller on the | |
456 | MPC5121 SoC. | |
457 | ||
34f6e157 SH |
458 | config MTD_NAND_MXC |
459 | tristate "MXC NAND support" | |
4d363b55 | 460 | depends on ARCH_MXC |
34f6e157 SH |
461 | help |
462 | This enables the driver for the NAND flash controller on the | |
463 | MXC processors. | |
464 | ||
6028aa01 YS |
465 | config MTD_NAND_SH_FLCTL |
466 | tristate "Support for NAND on Renesas SuperH FLCTL" | |
6bcda8a7 | 467 | depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST |
3d44dc23 RW |
468 | depends on HAS_IOMEM |
469 | depends on HAS_DMA | |
6028aa01 YS |
470 | help |
471 | Several Renesas SuperH CPU has FLCTL. This option enables support | |
b79c7adf | 472 | for NAND Flash using FLCTL. |
6028aa01 | 473 | |
ff4569c7 | 474 | config MTD_NAND_DAVINCI |
458f3933 IK |
475 | tristate "Support NAND on DaVinci/Keystone SoC" |
476 | depends on ARCH_DAVINCI || (ARCH_KEYSTONE && TI_AEMIF) | |
ff4569c7 DB |
477 | help |
478 | Enable the driver for NAND flash chips on Texas Instruments | |
458f3933 | 479 | DaVinci/Keystone processors. |
ff4569c7 | 480 | |
64fb65ba AN |
481 | config MTD_NAND_TXX9NDFMC |
482 | tristate "NAND Flash support for TXx9 SoC" | |
483 | depends on SOC_TX4938 || SOC_TX4939 | |
484 | help | |
485 | This enables the NAND flash controller on the TXx9 SoCs. | |
486 | ||
1b578193 WG |
487 | config MTD_NAND_SOCRATES |
488 | tristate "Support for NAND on Socrates board" | |
8c1a1158 | 489 | depends on SOCRATES |
1b578193 WG |
490 | help |
491 | Enables support for NAND Flash chips wired onto Socrates board. | |
492 | ||
bb6a7755 DW |
493 | config MTD_NAND_NUC900 |
494 | tristate "Support for NAND on Nuvoton NUC9xx/w90p910 evaluation boards." | |
6a8a98b2 | 495 | depends on ARCH_W90X900 |
8bff82cb WZ |
496 | help |
497 | This enables the driver for the NAND Flash on evaluation board based | |
bb6a7755 | 498 | on w90p910 / NUC9xx. |
8bff82cb | 499 | |
ba01d6ec LPC |
500 | config MTD_NAND_JZ4740 |
501 | tristate "Support for JZ4740 SoC NAND controller" | |
502 | depends on MACH_JZ4740 | |
503 | help | |
504 | Enables support for NAND Flash on JZ4740 SoC based boards. | |
505 | ||
6c009ab8 LW |
506 | config MTD_NAND_FSMC |
507 | tristate "Support for NAND on ST Micros FSMC" | |
694e33a7 | 508 | depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || MACH_U300 |
6c009ab8 LW |
509 | help |
510 | Enables support for NAND Flash chips on the ST Microelectronics | |
511 | Flexible Static Memory Controller (FSMC) | |
512 | ||
99f2b107 JC |
513 | config MTD_NAND_XWAY |
514 | tristate "Support for NAND on Lantiq XWAY SoC" | |
515 | depends on LANTIQ && SOC_TYPE_XWAY | |
516 | select MTD_NAND_PLATFORM | |
517 | help | |
518 | Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached | |
519 | to the External Bus Unit (EBU). | |
520 | ||
1fef62c1 BB |
521 | config MTD_NAND_SUNXI |
522 | tristate "Support for NAND on Allwinner SoCs" | |
523 | depends on ARCH_SUNXI | |
524 | help | |
525 | Enables support for NAND Flash chips on Allwinner SoCs. | |
526 | ||
54f531f6 ZW |
527 | config MTD_NAND_HISI504 |
528 | tristate "Support for NAND controller on Hisilicon SoC Hip04" | |
5e0899db | 529 | depends on HAS_DMA |
54f531f6 ZW |
530 | help |
531 | Enables support for NAND controller on Hisilicon SoC Hip04. | |
532 | ||
ec98c681 | 533 | endif # MTD_NAND |