[deliverable/linux.git] / drivers / mtd / nand / autcpu12.c

/*
 *  drivers/mtd/autcpu12.c
 *
 *  Copyright (c) 2002 Thomas Gleixner <tgxl@linutronix.de>
 *
 *  Derived from drivers/mtd/spia.c
 * 	 Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
 *
 * $Id: autcpu12.c,v 1.23 2005/11/07 11:14:30 gleixner Exp $
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 *  Overview:
 *   This is a device driver for the NAND flash device found on the
 *   autronix autcpu12 board, which is a SmartMediaCard. It supports
 *   16MiB, 32MiB and 64MiB cards.
 *
 *
 *	02-12-2002 TG	Cleanup of module params
 *
 *	02-20-2002 TG	adjusted for different rd/wr adress support
 *			added support for read device ready/busy line
 *			added page_cache
 *
 *	10-06-2002 TG	128K card support added
 */

#include <linux/slab.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/sizes.h>
#include <asm/arch/autcpu12.h>

/*
 * MTD structure for AUTCPU12 board
 */
static struct mtd_info *autcpu12_mtd = NULL;

static int autcpu12_io_base = CS89712_VIRT_BASE;
static int autcpu12_fio_pbase = AUTCPU12_PHYS_SMC;
static int autcpu12_fio_ctrl = AUTCPU12_SMC_SELECT_OFFSET;
static int autcpu12_pedr = AUTCPU12_SMC_PORT_OFFSET;
static void __iomem *autcpu12_fio_base;

/*
 * Define partitions for flash devices
 */
static struct mtd_partition partition_info16k[] = {
	{ .name		= "AUTCPU12 flash partition 1",
	  .offset	= 0,
	  .size		= 8 * SZ_1M },
	{ .name		= "AUTCPU12 flash partition 2",
	  .offset	= 8 * SZ_1M,
	  .size		= 8 * SZ_1M },
};

static struct mtd_partition partition_info32k[] = {
	{ .name		= "AUTCPU12 flash partition 1",
	  .offset	= 0,
	  .size		= 8 * SZ_1M },
	{ .name		= "AUTCPU12 flash partition 2",
	  .offset	= 8 * SZ_1M,
	  .size		= 24 * SZ_1M },
};

static struct mtd_partition partition_info64k[] = {
	{ .name		= "AUTCPU12 flash partition 1",
	  .offset	= 0,
	  .size		= 16 * SZ_1M },
	{ .name		= "AUTCPU12 flash partition 2",
	  .offset	= 16 * SZ_1M,
	  .size		= 48 * SZ_1M },
};

static struct mtd_partition partition_info128k[] = {
	{ .name		= "AUTCPU12 flash partition 1",
	  .offset	= 0,
	  .size		= 16 * SZ_1M },
	{ .name		= "AUTCPU12 flash partition 2",
	  .offset	= 16 * SZ_1M,
	  .size		= 112 * SZ_1M },
};

#define NUM_PARTITIONS16K 2
#define NUM_PARTITIONS32K 2
#define NUM_PARTITIONS64K 2
#define NUM_PARTITIONS128K 2
/*
 *	hardware specific access to control-lines
*/

static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd)
{
	switch (cmd) {

		case NAND_CTL_SETCLE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) |=  AUTCPU12_SMC_CLE; break;
		case NAND_CTL_CLRCLE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) &= ~AUTCPU12_SMC_CLE; break;

		case NAND_CTL_SETALE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) |=  AUTCPU12_SMC_ALE; break;
		case NAND_CTL_CLRALE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) &= ~AUTCPU12_SMC_ALE; break;

		case NAND_CTL_SETNCE: (*(volatile unsigned char *) (autcpu12_fio_base + autcpu12_fio_ctrl)) = 0x01; break;
		case NAND_CTL_CLRNCE: (*(volatile unsigned char *) (autcpu12_fio_base + autcpu12_fio_ctrl)) = 0x00; break;
	}
}

/*
*	read device ready pin
*/
int autcpu12_device_ready(struct mtd_info *mtd)
{

	return ((*(volatile unsigned char *)(autcpu12_io_base + autcpu12_pedr)) & AUTCPU12_SMC_RDY) ? 1 : 0;

}

/*
 * Main initialization routine
 */
int __init autcpu12_init(void)
{
	struct nand_chip *this;
	int err = 0;

	/* Allocate memory for MTD device structure and private data */
	autcpu12_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
	if (!autcpu12_mtd) {
		printk("Unable to allocate AUTCPU12 NAND MTD device structure.\n");
		err = -ENOMEM;
		goto out;
	}

	/* map physical adress */
	autcpu12_fio_base = ioremap(autcpu12_fio_pbase, SZ_1K);
	if (!autcpu12_fio_base) {
		printk("Ioremap autcpu12 SmartMedia Card failed\n");
		err = -EIO;
		goto out_mtd;
	}

	/* Get pointer to private data */
	this = (struct nand_chip *)(&autcpu12_mtd[1]);

	/* Initialize structures */
	memset(autcpu12_mtd, 0, sizeof(struct mtd_info));
	memset(this, 0, sizeof(struct nand_chip));

	/* Link the private data with the MTD structure */
	autcpu12_mtd->priv = this;
	autcpu12_mtd->owner = THIS_MODULE;

	/* Set address of NAND IO lines */
	this->IO_ADDR_R = autcpu12_fio_base;
	this->IO_ADDR_W = autcpu12_fio_base;
	this->hwcontrol = autcpu12_hwcontrol;
	this->dev_ready = autcpu12_device_ready;
	/* 20 us command delay time */
	this->chip_delay = 20;
	this->eccmode = NAND_ECC_SOFT;

	/* Enable the following for a flash based bad block table */
	/*
	   this->options = NAND_USE_FLASH_BBT;
	 */
	this->options = NAND_USE_FLASH_BBT;

	/* Scan to find existance of the device */
	if (nand_scan(autcpu12_mtd, 1)) {
		err = -ENXIO;
		goto out_ior;
	}

	/* Register the partitions */
	switch (autcpu12_mtd->size) {
		case SZ_16M: add_mtd_partitions(autcpu12_mtd, partition_info16k, NUM_PARTITIONS16K); break;
		case SZ_32M: add_mtd_partitions(autcpu12_mtd, partition_info32k, NUM_PARTITIONS32K); break;
		case SZ_64M: add_mtd_partitions(autcpu12_mtd, partition_info64k, NUM_PARTITIONS64K); break;
		case SZ_128M: add_mtd_partitions(autcpu12_mtd, partition_info128k, NUM_PARTITIONS128K); break;
		default:
			printk("Unsupported SmartMedia device\n");
			err = -ENXIO;
			goto out_ior;
	}
	goto out;

 out_ior:
	iounmap((void *)autcpu12_fio_base);
 out_mtd:
	kfree(autcpu12_mtd);
 out:
	return err;
}

module_init(autcpu12_init);

/*
 * Clean up routine
 */
#ifdef MODULE
static void __exit autcpu12_cleanup(void)
{
	/* Release resources, unregister device */
	nand_release(autcpu12_mtd);

	/* unmap physical adress */
	iounmap((void *)autcpu12_fio_base);

	/* Free the MTD device structure */
	kfree(autcpu12_mtd);
}

module_exit(autcpu12_cleanup);
#endif

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
MODULE_DESCRIPTION("Glue layer for SmartMediaCard on autronix autcpu12");
Commit	Line	Data
1da177e4 LT	1	/*
	2	* drivers/mtd/autcpu12.c
	3	*
	4	* Copyright (c) 2002 Thomas Gleixner <tgxl@linutronix.de>
	5	*
	6	* Derived from drivers/mtd/spia.c
	7	* Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
61b03bd7 TG	8	*
61b03bd7 TG	9	* $Id: autcpu12.c,v 1.23 2005/11/07 11:14:30 gleixner Exp $
1da177e4 LT	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License version 2 as
	13	* published by the Free Software Foundation.
	14	*
	15	* Overview:
	16	* This is a device driver for the NAND flash device found on the
61b03bd7	17	* autronix autcpu12 board, which is a SmartMediaCard. It supports
1da177e4 LT	18	* 16MiB, 32MiB and 64MiB cards.
	19	*
	20	*
	21	* 02-12-2002 TG Cleanup of module params
	22	*
	23	* 02-20-2002 TG adjusted for different rd/wr adress support
	24	* added support for read device ready/busy line
	25	* added page_cache
	26	*
	27	* 10-06-2002 TG 128K card support added
	28	*/
	29
1da177e4 LT	30	#include <linux/slab.h>
	31	#include <linux/init.h>
	32	#include <linux/module.h>
	33	#include <linux/mtd/mtd.h>
	34	#include <linux/mtd/nand.h>
	35	#include <linux/mtd/partitions.h>
	36	#include <asm/io.h>
	37	#include <asm/arch/hardware.h>
	38	#include <asm/sizes.h>
	39	#include <asm/arch/autcpu12.h>
	40
	41	/*
	42	* MTD structure for AUTCPU12 board
	43	*/
	44	static struct mtd_info *autcpu12_mtd = NULL;
	45
	46	static int autcpu12_io_base = CS89712_VIRT_BASE;
	47	static int autcpu12_fio_pbase = AUTCPU12_PHYS_SMC;
	48	static int autcpu12_fio_ctrl = AUTCPU12_SMC_SELECT_OFFSET;
	49	static int autcpu12_pedr = AUTCPU12_SMC_PORT_OFFSET;
e0c7d767	50	static void __iomem *autcpu12_fio_base;
1da177e4 LT	51
	52	/*
	53	* Define partitions for flash devices
	54	*/
	55	static struct mtd_partition partition_info16k[] = {
	56	{ .name = "AUTCPU12 flash partition 1",
	57	.offset = 0,
	58	.size = 8 * SZ_1M },
	59	{ .name = "AUTCPU12 flash partition 2",
	60	.offset = 8 * SZ_1M,
	61	.size = 8 * SZ_1M },
	62	};
	63
	64	static struct mtd_partition partition_info32k[] = {
	65	{ .name = "AUTCPU12 flash partition 1",
	66	.offset = 0,
	67	.size = 8 * SZ_1M },
	68	{ .name = "AUTCPU12 flash partition 2",
	69	.offset = 8 * SZ_1M,
	70	.size = 24 * SZ_1M },
	71	};
	72
	73	static struct mtd_partition partition_info64k[] = {
	74	{ .name = "AUTCPU12 flash partition 1",
	75	.offset = 0,
	76	.size = 16 * SZ_1M },
	77	{ .name = "AUTCPU12 flash partition 2",
	78	.offset = 16 * SZ_1M,
	79	.size = 48 * SZ_1M },
	80	};
	81
	82	static struct mtd_partition partition_info128k[] = {
	83	{ .name = "AUTCPU12 flash partition 1",
	84	.offset = 0,
	85	.size = 16 * SZ_1M },
	86	{ .name = "AUTCPU12 flash partition 2",
	87	.offset = 16 * SZ_1M,
	88	.size = 112 * SZ_1M },
	89	};
	90
	91	#define NUM_PARTITIONS16K 2
	92	#define NUM_PARTITIONS32K 2
	93	#define NUM_PARTITIONS64K 2
	94	#define NUM_PARTITIONS128K 2
61b03bd7	95	/*
1da177e4 LT	96	* hardware specific access to control-lines
1da177e4 LT	97	*/
e0c7d767	98
1da177e4 LT	99	static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd)
1da177e4 LT	100	{
e0c7d767	101	switch (cmd) {
1da177e4 LT	102
	103	case NAND_CTL_SETCLE: ((volatile unsigned char ) (autcpu12_io_base + autcpu12_pedr)) \|= AUTCPU12_SMC_CLE; break;
	104	case NAND_CTL_CLRCLE: ((volatile unsigned char ) (autcpu12_io_base + autcpu12_pedr)) &= ~AUTCPU12_SMC_CLE; break;
	105
	106	case NAND_CTL_SETALE: ((volatile unsigned char ) (autcpu12_io_base + autcpu12_pedr)) \|= AUTCPU12_SMC_ALE; break;
	107	case NAND_CTL_CLRALE: ((volatile unsigned char ) (autcpu12_io_base + autcpu12_pedr)) &= ~AUTCPU12_SMC_ALE; break;
	108
	109	case NAND_CTL_SETNCE: ((volatile unsigned char ) (autcpu12_fio_base + autcpu12_fio_ctrl)) = 0x01; break;
	110	case NAND_CTL_CLRNCE: ((volatile unsigned char ) (autcpu12_fio_base + autcpu12_fio_ctrl)) = 0x00; break;
	111	}
	112	}
	113
	114	/*
	115	* read device ready pin
	116	*/
	117	int autcpu12_device_ready(struct mtd_info *mtd)
	118	{
	119
e0c7d767	120	return (((volatile unsigned char )(autcpu12_io_base + autcpu12_pedr)) & AUTCPU12_SMC_RDY) ? 1 : 0;
1da177e4 LT	121
	122	}
	123
	124	/*
	125	* Main initialization routine
	126	*/
e0c7d767	127	int __init autcpu12_init(void)
1da177e4 LT	128	{
	129	struct nand_chip *this;
	130	int err = 0;
	131
	132	/* Allocate memory for MTD device structure and private data */
e0c7d767	133	autcpu12_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
1da177e4	134	if (!autcpu12_mtd) {
e0c7d767	135	printk("Unable to allocate AUTCPU12 NAND MTD device structure.\n");
1da177e4 LT	136	err = -ENOMEM;
	137	goto out;
	138	}
	139
	140	/* map physical adress */
e0c7d767 DW	141	autcpu12_fio_base = ioremap(autcpu12_fio_pbase, SZ_1K);
e0c7d767 DW	142	if (!autcpu12_fio_base) {
1da177e4 LT	143	printk("Ioremap autcpu12 SmartMedia Card failed\n");
	144	err = -EIO;
	145	goto out_mtd;
	146	}
	147
	148	/* Get pointer to private data */
e0c7d767	149	this = (struct nand_chip *)(&autcpu12_mtd[1]);
1da177e4 LT	150
1da177e4 LT	151	/* Initialize structures */
e0c7d767 DW	152	memset(autcpu12_mtd, 0, sizeof(struct mtd_info));
e0c7d767 DW	153	memset(this, 0, sizeof(struct nand_chip));
1da177e4 LT	154
	155	/* Link the private data with the MTD structure */
	156	autcpu12_mtd->priv = this;
552d9205	157	autcpu12_mtd->owner = THIS_MODULE;
1da177e4 LT	158
	159	/* Set address of NAND IO lines */
	160	this->IO_ADDR_R = autcpu12_fio_base;
	161	this->IO_ADDR_W = autcpu12_fio_base;
	162	this->hwcontrol = autcpu12_hwcontrol;
	163	this->dev_ready = autcpu12_device_ready;
	164	/* 20 us command delay time */
61b03bd7	165	this->chip_delay = 20;
1da177e4 LT	166	this->eccmode = NAND_ECC_SOFT;
	167
	168	/* Enable the following for a flash based bad block table */
	169	/*
e0c7d767 DW	170	this->options = NAND_USE_FLASH_BBT;
e0c7d767 DW	171	*/
1da177e4	172	this->options = NAND_USE_FLASH_BBT;
61b03bd7	173
1da177e4	174	/* Scan to find existance of the device */
e0c7d767	175	if (nand_scan(autcpu12_mtd, 1)) {
1da177e4 LT	176	err = -ENXIO;
	177	goto out_ior;
	178	}
61b03bd7	179
1da177e4	180	/* Register the partitions */
e0c7d767	181	switch (autcpu12_mtd->size) {
1da177e4 LT	182	case SZ_16M: add_mtd_partitions(autcpu12_mtd, partition_info16k, NUM_PARTITIONS16K); break;
1da177e4 LT	183	case SZ_32M: add_mtd_partitions(autcpu12_mtd, partition_info32k, NUM_PARTITIONS32K); break;
61b03bd7 TG	184	case SZ_64M: add_mtd_partitions(autcpu12_mtd, partition_info64k, NUM_PARTITIONS64K); break;
61b03bd7 TG	185	case SZ_128M: add_mtd_partitions(autcpu12_mtd, partition_info128k, NUM_PARTITIONS128K); break;
e0c7d767 DW	186	default:
e0c7d767 DW	187	printk("Unsupported SmartMedia device\n");
1da177e4 LT	188	err = -ENXIO;
1da177e4 LT	189	goto out_ior;
1da177e4 LT	190	}
	191	goto out;
	192
e0c7d767	193	out_ior:
1da177e4	194	iounmap((void *)autcpu12_fio_base);
e0c7d767 DW	195	out_mtd:
	196	kfree(autcpu12_mtd);
	197	out:
1da177e4 LT	198	return err;
	199	}
	200
	201	module_init(autcpu12_init);
	202
	203	/*
	204	* Clean up routine
	205	*/
	206	#ifdef MODULE
e0c7d767	207	static void __exit autcpu12_cleanup(void)
1da177e4 LT	208	{
1da177e4 LT	209	/* Release resources, unregister device */
e0c7d767	210	nand_release(autcpu12_mtd);
1da177e4 LT	211
	212	/* unmap physical adress */
	213	iounmap((void *)autcpu12_fio_base);
61b03bd7	214
1da177e4	215	/* Free the MTD device structure */
e0c7d767	216	kfree(autcpu12_mtd);
1da177e4	217	}
e0c7d767	218
1da177e4 LT	219	module_exit(autcpu12_cleanup);
	220	#endif
	221
	222	MODULE_LICENSE("GPL");
	223	MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
	224	MODULE_DESCRIPTION("Glue layer for SmartMediaCard on autronix autcpu12");