Commit | Line | Data |
---|---|---|
27c5b17c BN |
1 | /* |
2 | * Copyright © 2015 Broadcom Corporation | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | */ | |
13 | ||
14 | #ifndef __BRCMNAND_H__ | |
15 | #define __BRCMNAND_H__ | |
16 | ||
17 | #include <linux/types.h> | |
18 | #include <linux/io.h> | |
19 | ||
20 | struct platform_device; | |
21 | struct dev_pm_ops; | |
22 | ||
23 | struct brcmnand_soc { | |
c26211d3 BN |
24 | bool (*ctlrdy_ack)(struct brcmnand_soc *soc); |
25 | void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en); | |
d31b5d80 RJ |
26 | void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare, |
27 | bool is_param); | |
27c5b17c BN |
28 | }; |
29 | ||
d31b5d80 RJ |
30 | static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc, |
31 | bool is_param) | |
c26211d3 BN |
32 | { |
33 | if (soc && soc->prepare_data_bus) | |
d31b5d80 | 34 | soc->prepare_data_bus(soc, true, is_param); |
c26211d3 BN |
35 | } |
36 | ||
d31b5d80 RJ |
37 | static inline void brcmnand_soc_data_bus_unprepare(struct brcmnand_soc *soc, |
38 | bool is_param) | |
c26211d3 BN |
39 | { |
40 | if (soc && soc->prepare_data_bus) | |
d31b5d80 | 41 | soc->prepare_data_bus(soc, false, is_param); |
c26211d3 BN |
42 | } |
43 | ||
27c5b17c BN |
44 | static inline u32 brcmnand_readl(void __iomem *addr) |
45 | { | |
46 | /* | |
47 | * MIPS endianness is configured by boot strap, which also reverses all | |
48 | * bus endianness (i.e., big-endian CPU + big endian bus ==> native | |
49 | * endian I/O). | |
50 | * | |
51 | * Other architectures (e.g., ARM) either do not support big endian, or | |
52 | * else leave I/O in little endian mode. | |
53 | */ | |
ddb2c42b | 54 | if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) |
27c5b17c BN |
55 | return __raw_readl(addr); |
56 | else | |
57 | return readl_relaxed(addr); | |
58 | } | |
59 | ||
60 | static inline void brcmnand_writel(u32 val, void __iomem *addr) | |
61 | { | |
62 | /* See brcmnand_readl() comments */ | |
ddb2c42b | 63 | if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) |
27c5b17c BN |
64 | __raw_writel(val, addr); |
65 | else | |
66 | writel_relaxed(val, addr); | |
67 | } | |
68 | ||
69 | int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc); | |
70 | int brcmnand_remove(struct platform_device *pdev); | |
71 | ||
72 | extern const struct dev_pm_ops brcmnand_pm_ops; | |
73 | ||
74 | #endif /* __BRCMNAND_H__ */ |