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1da177e4 LT |
1 | /* |
2 | * drivers/mtd/nand/edb7312.c | |
3 | * | |
151e7659 | 4 | * Copyright (C) 2002 Marius Gröger (mag@sysgo.de) |
1da177e4 LT |
5 | * |
6 | * Derived from drivers/mtd/nand/autcpu12.c | |
7 | * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de) | |
8 | * | |
1da177e4 LT |
9 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * Overview: | |
14 | * This is a device driver for the NAND flash device found on the | |
15 | * CLEP7312 board which utilizes the Toshiba TC58V64AFT part. This is | |
16 | * a 64Mibit (8MiB x 8 bits) NAND flash device. | |
17 | */ | |
18 | ||
19 | #include <linux/slab.h> | |
20 | #include <linux/module.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/mtd/mtd.h> | |
23 | #include <linux/mtd/nand.h> | |
24 | #include <linux/mtd/partitions.h> | |
25 | #include <asm/io.h> | |
a09e64fb | 26 | #include <mach/hardware.h> /* for CLPS7111_VIRT_BASE */ |
1da177e4 LT |
27 | #include <asm/sizes.h> |
28 | #include <asm/hardware/clps7111.h> | |
29 | ||
30 | /* | |
31 | * MTD structure for EDB7312 board | |
32 | */ | |
33 | static struct mtd_info *ep7312_mtd = NULL; | |
34 | ||
35 | /* | |
36 | * Values specific to the EDB7312 board (used with EP7312 processor) | |
37 | */ | |
38 | #define EP7312_FIO_PBASE 0x10000000 /* Phys address of flash */ | |
39 | #define EP7312_PXDR 0x0001 /* | |
40 | * IO offset to Port B data register | |
41 | * where the CLE, ALE and NCE pins | |
42 | * are wired to. | |
43 | */ | |
44 | #define EP7312_PXDDR 0x0041 /* | |
45 | * IO offset to Port B data direction | |
46 | * register so we can control the IO | |
47 | * lines. | |
48 | */ | |
49 | ||
50 | /* | |
51 | * Module stuff | |
52 | */ | |
53 | ||
54 | static unsigned long ep7312_fio_pbase = EP7312_FIO_PBASE; | |
e0c7d767 DW |
55 | static void __iomem *ep7312_pxdr = (void __iomem *)EP7312_PXDR; |
56 | static void __iomem *ep7312_pxddr = (void __iomem *)EP7312_PXDDR; | |
1da177e4 | 57 | |
1da177e4 LT |
58 | /* |
59 | * Define static partitions for flash device | |
60 | */ | |
61 | static struct mtd_partition partition_info[] = { | |
e0c7d767 DW |
62 | {.name = "EP7312 Nand Flash", |
63 | .offset = 0, | |
64 | .size = 8 * 1024 * 1024} | |
1da177e4 | 65 | }; |
e0c7d767 | 66 | |
1da177e4 LT |
67 | #define NUM_PARTITIONS 1 |
68 | ||
61b03bd7 | 69 | /* |
1da177e4 | 70 | * hardware specific access to control-lines |
7abd3ef9 | 71 | * |
9d7b4b55 | 72 | * NAND_NCE: bit 0 -> bit 6 (bit 7 = 1) |
7abd3ef9 TG |
73 | * NAND_CLE: bit 1 -> bit 4 |
74 | * NAND_ALE: bit 2 -> bit 5 | |
1da177e4 | 75 | */ |
7abd3ef9 | 76 | static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) |
1da177e4 | 77 | { |
7abd3ef9 TG |
78 | struct nand_chip *chip = mtd->priv; |
79 | ||
80 | if (ctrl & NAND_CTRL_CHANGE) { | |
9d7b4b55 | 81 | unsigned char bits = 0x80; |
7abd3ef9 | 82 | |
9d7b4b55 RS |
83 | bits |= (ctrl & (NAND_CLE | NAND_ALE)) << 3; |
84 | bits |= (ctrl & NAND_NCE) ? 0x00 : 0x40; | |
7abd3ef9 | 85 | |
9d7b4b55 | 86 | clps_writeb((clps_readb(ep7312_pxdr) & 0xF0) | bits, |
7abd3ef9 | 87 | ep7312_pxdr); |
1da177e4 | 88 | } |
7abd3ef9 TG |
89 | if (cmd != NAND_CMD_NONE) |
90 | writeb(cmd, chip->IO_ADDR_W); | |
1da177e4 LT |
91 | } |
92 | ||
93 | /* | |
94 | * read device ready pin | |
95 | */ | |
96 | static int ep7312_device_ready(struct mtd_info *mtd) | |
97 | { | |
98 | return 1; | |
99 | } | |
e0c7d767 | 100 | |
1da177e4 | 101 | const char *part_probes[] = { "cmdlinepart", NULL }; |
1da177e4 LT |
102 | |
103 | /* | |
104 | * Main initialization routine | |
105 | */ | |
e0c7d767 | 106 | static int __init ep7312_init(void) |
1da177e4 LT |
107 | { |
108 | struct nand_chip *this; | |
109 | const char *part_type = 0; | |
110 | int mtd_parts_nb = 0; | |
111 | struct mtd_partition *mtd_parts = 0; | |
e0c7d767 | 112 | void __iomem *ep7312_fio_base; |
61b03bd7 | 113 | |
1da177e4 | 114 | /* Allocate memory for MTD device structure and private data */ |
e0c7d767 | 115 | ep7312_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); |
1da177e4 LT |
116 | if (!ep7312_mtd) { |
117 | printk("Unable to allocate EDB7312 NAND MTD device structure.\n"); | |
118 | return -ENOMEM; | |
119 | } | |
61b03bd7 | 120 | |
8e87d782 | 121 | /* map physical address */ |
1da177e4 | 122 | ep7312_fio_base = ioremap(ep7312_fio_pbase, SZ_1K); |
e0c7d767 | 123 | if (!ep7312_fio_base) { |
1da177e4 LT |
124 | printk("ioremap EDB7312 NAND flash failed\n"); |
125 | kfree(ep7312_mtd); | |
126 | return -EIO; | |
127 | } | |
61b03bd7 | 128 | |
1da177e4 | 129 | /* Get pointer to private data */ |
e0c7d767 | 130 | this = (struct nand_chip *)(&ep7312_mtd[1]); |
61b03bd7 | 131 | |
1da177e4 | 132 | /* Initialize structures */ |
e0c7d767 DW |
133 | memset(ep7312_mtd, 0, sizeof(struct mtd_info)); |
134 | memset(this, 0, sizeof(struct nand_chip)); | |
61b03bd7 | 135 | |
1da177e4 LT |
136 | /* Link the private data with the MTD structure */ |
137 | ep7312_mtd->priv = this; | |
552d9205 | 138 | ep7312_mtd->owner = THIS_MODULE; |
61b03bd7 | 139 | |
1da177e4 LT |
140 | /* |
141 | * Set GPIO Port B control register so that the pins are configured | |
142 | * to be outputs for controlling the NAND flash. | |
143 | */ | |
144 | clps_writeb(0xf0, ep7312_pxddr); | |
61b03bd7 | 145 | |
1da177e4 LT |
146 | /* insert callbacks */ |
147 | this->IO_ADDR_R = ep7312_fio_base; | |
148 | this->IO_ADDR_W = ep7312_fio_base; | |
7abd3ef9 | 149 | this->cmd_ctrl = ep7312_hwcontrol; |
1da177e4 LT |
150 | this->dev_ready = ep7312_device_ready; |
151 | /* 15 us command delay time */ | |
152 | this->chip_delay = 15; | |
61b03bd7 | 153 | |
1da177e4 | 154 | /* Scan to find existence of the device */ |
e0c7d767 | 155 | if (nand_scan(ep7312_mtd, 1)) { |
1da177e4 | 156 | iounmap((void *)ep7312_fio_base); |
e0c7d767 | 157 | kfree(ep7312_mtd); |
1da177e4 LT |
158 | return -ENXIO; |
159 | } | |
1da177e4 | 160 | ep7312_mtd->name = "edb7312-nand"; |
e0c7d767 | 161 | mtd_parts_nb = parse_mtd_partitions(ep7312_mtd, part_probes, &mtd_parts, 0); |
1da177e4 LT |
162 | if (mtd_parts_nb > 0) |
163 | part_type = "command line"; | |
164 | else | |
165 | mtd_parts_nb = 0; | |
1da177e4 LT |
166 | if (mtd_parts_nb == 0) { |
167 | mtd_parts = partition_info; | |
168 | mtd_parts_nb = NUM_PARTITIONS; | |
169 | part_type = "static"; | |
170 | } | |
61b03bd7 | 171 | |
1da177e4 LT |
172 | /* Register the partitions */ |
173 | printk(KERN_NOTICE "Using %s partition definition\n", part_type); | |
da499d41 | 174 | mtd_device_register(ep7312_mtd, mtd_parts, mtd_parts_nb); |
61b03bd7 | 175 | |
1da177e4 LT |
176 | /* Return happy */ |
177 | return 0; | |
178 | } | |
e0c7d767 | 179 | |
1da177e4 LT |
180 | module_init(ep7312_init); |
181 | ||
182 | /* | |
183 | * Clean up routine | |
184 | */ | |
e0c7d767 | 185 | static void __exit ep7312_cleanup(void) |
1da177e4 | 186 | { |
e0c7d767 | 187 | struct nand_chip *this = (struct nand_chip *)&ep7312_mtd[1]; |
61b03bd7 | 188 | |
1da177e4 | 189 | /* Release resources, unregister device */ |
e0c7d767 | 190 | nand_release(ap7312_mtd); |
61b03bd7 | 191 | |
25f0c659 | 192 | /* Release io resource */ |
76a5027c | 193 | iounmap(this->IO_ADDR_R); |
25f0c659 | 194 | |
1da177e4 | 195 | /* Free the MTD device structure */ |
e0c7d767 | 196 | kfree(ep7312_mtd); |
1da177e4 | 197 | } |
e0c7d767 | 198 | |
1da177e4 LT |
199 | module_exit(ep7312_cleanup); |
200 | ||
201 | MODULE_LICENSE("GPL"); | |
202 | MODULE_AUTHOR("Marius Groeger <mag@sysgo.de>"); | |
203 | MODULE_DESCRIPTION("MTD map driver for Cogent EDB7312 board"); |