Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * drivers/mtd/nand.c | |
3 | * | |
4 | * Overview: | |
5 | * This is the generic MTD driver for NAND flash devices. It should be | |
6 | * capable of working with almost all NAND chips currently available. | |
7 | * Basic support for AG-AND chips is provided. | |
61b03bd7 | 8 | * |
1da177e4 LT |
9 | * Additional technical information is available on |
10 | * http://www.linux-mtd.infradead.org/tech/nand.html | |
61b03bd7 | 11 | * |
1da177e4 | 12 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) |
2c0a2bed | 13 | * 2002 Thomas Gleixner (tglx@linutronix.de) |
1da177e4 | 14 | * |
61b03bd7 | 15 | * 02-08-2004 tglx: support for strange chips, which cannot auto increment |
1da177e4 LT |
16 | * pages on read / read_oob |
17 | * | |
18 | * 03-17-2004 tglx: Check ready before auto increment check. Simon Bayes | |
19 | * pointed this out, as he marked an auto increment capable chip | |
20 | * as NOAUTOINCR in the board driver. | |
21 | * Make reads over block boundaries work too | |
22 | * | |
23 | * 04-14-2004 tglx: first working version for 2k page size chips | |
61b03bd7 | 24 | * |
1da177e4 LT |
25 | * 05-19-2004 tglx: Basic support for Renesas AG-AND chips |
26 | * | |
27 | * 09-24-2004 tglx: add support for hardware controllers (e.g. ECC) shared | |
2c0a2bed TG |
28 | * among multiple independend devices. Suggestions and initial |
29 | * patch from Ben Dooks <ben-mtd@fluff.org> | |
30 | * | |
31 | * 12-05-2004 dmarlin: add workaround for Renesas AG-AND chips "disturb" | |
32 | * issue. Basically, any block not rewritten may lose data when | |
33 | * surrounding blocks are rewritten many times. JFFS2 ensures | |
34 | * this doesn't happen for blocks it uses, but the Bad Block | |
35 | * Table(s) may not be rewritten. To ensure they do not lose | |
36 | * data, force them to be rewritten when some of the surrounding | |
37 | * blocks are erased. Rather than tracking a specific nearby | |
38 | * block (which could itself go bad), use a page address 'mask' to | |
39 | * select several blocks in the same area, and rewrite the BBT | |
40 | * when any of them are erased. | |
41 | * | |
42 | * 01-03-2005 dmarlin: added support for the device recovery command sequence | |
43 | * for Renesas AG-AND chips. If there was a sudden loss of power | |
44 | * during an erase operation, a "device recovery" operation must | |
45 | * be performed when power is restored to ensure correct | |
46 | * operation. | |
47 | * | |
48 | * 01-20-2005 dmarlin: added support for optional hardware specific callback | |
49 | * routine to perform extra error status checks on erase and write | |
50 | * failures. This required adding a wrapper function for | |
51 | * nand_read_ecc. | |
068e3c0a | 52 | * |
962034f4 VW |
53 | * 08-20-2005 vwool: suspend/resume added |
54 | * | |
1da177e4 | 55 | * Credits: |
61b03bd7 TG |
56 | * David Woodhouse for adding multichip support |
57 | * | |
1da177e4 LT |
58 | * Aleph One Ltd. and Toby Churchill Ltd. for supporting the |
59 | * rework for 2K page size chips | |
60 | * | |
61 | * TODO: | |
62 | * Enable cached programming for 2k page size chips | |
63 | * Check, if mtd->ecctype should be set to MTD_ECC_HW | |
64 | * if we have HW ecc support. | |
65 | * The AG-AND chips have nice features for speed improvement, | |
66 | * which are not supported yet. Read / program 4 pages in one go. | |
67 | * | |
962034f4 | 68 | * $Id: nand_base.c,v 1.150 2005/09/15 13:58:48 vwool Exp $ |
1da177e4 LT |
69 | * |
70 | * This program is free software; you can redistribute it and/or modify | |
71 | * it under the terms of the GNU General Public License version 2 as | |
72 | * published by the Free Software Foundation. | |
73 | * | |
74 | */ | |
75 | ||
552d9205 | 76 | #include <linux/module.h> |
1da177e4 LT |
77 | #include <linux/delay.h> |
78 | #include <linux/errno.h> | |
7aa65bfd | 79 | #include <linux/err.h> |
1da177e4 LT |
80 | #include <linux/sched.h> |
81 | #include <linux/slab.h> | |
82 | #include <linux/types.h> | |
83 | #include <linux/mtd/mtd.h> | |
84 | #include <linux/mtd/nand.h> | |
85 | #include <linux/mtd/nand_ecc.h> | |
86 | #include <linux/mtd/compatmac.h> | |
87 | #include <linux/interrupt.h> | |
88 | #include <linux/bitops.h> | |
8fe833c1 | 89 | #include <linux/leds.h> |
1da177e4 LT |
90 | #include <asm/io.h> |
91 | ||
92 | #ifdef CONFIG_MTD_PARTITIONS | |
93 | #include <linux/mtd/partitions.h> | |
94 | #endif | |
95 | ||
96 | /* Define default oob placement schemes for large and small page devices */ | |
97 | static struct nand_oobinfo nand_oob_8 = { | |
98 | .useecc = MTD_NANDECC_AUTOPLACE, | |
99 | .eccbytes = 3, | |
100 | .eccpos = {0, 1, 2}, | |
e0c7d767 | 101 | .oobfree = {{3, 2}, {6, 2}} |
1da177e4 LT |
102 | }; |
103 | ||
104 | static struct nand_oobinfo nand_oob_16 = { | |
105 | .useecc = MTD_NANDECC_AUTOPLACE, | |
106 | .eccbytes = 6, | |
107 | .eccpos = {0, 1, 2, 3, 6, 7}, | |
e0c7d767 | 108 | .oobfree = {{8, 8}} |
1da177e4 LT |
109 | }; |
110 | ||
111 | static struct nand_oobinfo nand_oob_64 = { | |
112 | .useecc = MTD_NANDECC_AUTOPLACE, | |
113 | .eccbytes = 24, | |
114 | .eccpos = { | |
e0c7d767 DW |
115 | 40, 41, 42, 43, 44, 45, 46, 47, |
116 | 48, 49, 50, 51, 52, 53, 54, 55, | |
117 | 56, 57, 58, 59, 60, 61, 62, 63}, | |
118 | .oobfree = {{2, 38}} | |
1da177e4 LT |
119 | }; |
120 | ||
121 | /* This is used for padding purposes in nand_write_oob */ | |
58dd8f2b | 122 | static uint8_t ffchars[] = { |
1da177e4 LT |
123 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
124 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
125 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
126 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
127 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
128 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
129 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
130 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
131 | }; | |
132 | ||
133 | /* | |
134 | * NAND low-level MTD interface functions | |
135 | */ | |
58dd8f2b TG |
136 | static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len); |
137 | static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len); | |
138 | static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len); | |
1da177e4 | 139 | |
2c0a2bed | 140 | static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, |
58dd8f2b | 141 | size_t *retlen, uint8_t *buf); |
e0c7d767 | 142 | static int nand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, |
58dd8f2b | 143 | size_t *retlen, uint8_t *buf, uint8_t *eccbuf, |
2c0a2bed TG |
144 | struct nand_oobinfo *oobsel); |
145 | static int nand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, | |
58dd8f2b | 146 | size_t *retlen, uint8_t *buf); |
2c0a2bed | 147 | static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
58dd8f2b | 148 | size_t *retlen, const uint8_t *buf); |
e0c7d767 | 149 | static int nand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len, |
58dd8f2b | 150 | size_t *retlen, const uint8_t *buf, uint8_t *eccbuf, |
2c0a2bed TG |
151 | struct nand_oobinfo *oobsel); |
152 | static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, | |
58dd8f2b | 153 | size_t *retlen, const uint8_t *buf); |
e0c7d767 DW |
154 | static int nand_erase(struct mtd_info *mtd, struct erase_info *instr); |
155 | static void nand_sync(struct mtd_info *mtd); | |
1da177e4 LT |
156 | |
157 | /* Some internal functions */ | |
2c0a2bed | 158 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, |
58dd8f2b | 159 | int page, uint8_t * oob_buf, |
e0c7d767 | 160 | struct nand_oobinfo *oobsel, int mode); |
1da177e4 | 161 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE |
2c0a2bed | 162 | static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *this, |
58dd8f2b | 163 | int page, int numpages, uint8_t *oob_buf, |
2c0a2bed TG |
164 | struct nand_oobinfo *oobsel, int chipnr, |
165 | int oobmode); | |
1da177e4 LT |
166 | #else |
167 | #define nand_verify_pages(...) (0) | |
168 | #endif | |
61b03bd7 | 169 | |
2c0a2bed TG |
170 | static int nand_get_device(struct nand_chip *this, struct mtd_info *mtd, |
171 | int new_state); | |
1da177e4 LT |
172 | |
173 | /** | |
174 | * nand_release_device - [GENERIC] release chip | |
175 | * @mtd: MTD device structure | |
61b03bd7 TG |
176 | * |
177 | * Deselect, release chip lock and wake up anyone waiting on the device | |
1da177e4 | 178 | */ |
e0c7d767 | 179 | static void nand_release_device(struct mtd_info *mtd) |
1da177e4 LT |
180 | { |
181 | struct nand_chip *this = mtd->priv; | |
182 | ||
183 | /* De-select the NAND device */ | |
184 | this->select_chip(mtd, -1); | |
0dfc6246 | 185 | |
a36ed299 TG |
186 | /* Release the controller and the chip */ |
187 | spin_lock(&this->controller->lock); | |
188 | this->controller->active = NULL; | |
189 | this->state = FL_READY; | |
190 | wake_up(&this->controller->wq); | |
191 | spin_unlock(&this->controller->lock); | |
1da177e4 LT |
192 | } |
193 | ||
194 | /** | |
195 | * nand_read_byte - [DEFAULT] read one byte from the chip | |
196 | * @mtd: MTD device structure | |
197 | * | |
198 | * Default read function for 8bit buswith | |
199 | */ | |
58dd8f2b | 200 | static uint8_t nand_read_byte(struct mtd_info *mtd) |
1da177e4 LT |
201 | { |
202 | struct nand_chip *this = mtd->priv; | |
203 | return readb(this->IO_ADDR_R); | |
204 | } | |
205 | ||
206 | /** | |
207 | * nand_write_byte - [DEFAULT] write one byte to the chip | |
208 | * @mtd: MTD device structure | |
209 | * @byte: pointer to data byte to write | |
210 | * | |
211 | * Default write function for 8it buswith | |
212 | */ | |
58dd8f2b | 213 | static void nand_write_byte(struct mtd_info *mtd, uint8_t byte) |
1da177e4 LT |
214 | { |
215 | struct nand_chip *this = mtd->priv; | |
216 | writeb(byte, this->IO_ADDR_W); | |
217 | } | |
218 | ||
219 | /** | |
220 | * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip | |
221 | * @mtd: MTD device structure | |
222 | * | |
61b03bd7 | 223 | * Default read function for 16bit buswith with |
1da177e4 LT |
224 | * endianess conversion |
225 | */ | |
58dd8f2b | 226 | static uint8_t nand_read_byte16(struct mtd_info *mtd) |
1da177e4 LT |
227 | { |
228 | struct nand_chip *this = mtd->priv; | |
58dd8f2b | 229 | return (uint8_t) cpu_to_le16(readw(this->IO_ADDR_R)); |
1da177e4 LT |
230 | } |
231 | ||
232 | /** | |
233 | * nand_write_byte16 - [DEFAULT] write one byte endianess aware to the chip | |
234 | * @mtd: MTD device structure | |
235 | * @byte: pointer to data byte to write | |
236 | * | |
237 | * Default write function for 16bit buswith with | |
238 | * endianess conversion | |
239 | */ | |
58dd8f2b | 240 | static void nand_write_byte16(struct mtd_info *mtd, uint8_t byte) |
1da177e4 LT |
241 | { |
242 | struct nand_chip *this = mtd->priv; | |
243 | writew(le16_to_cpu((u16) byte), this->IO_ADDR_W); | |
244 | } | |
245 | ||
246 | /** | |
247 | * nand_read_word - [DEFAULT] read one word from the chip | |
248 | * @mtd: MTD device structure | |
249 | * | |
61b03bd7 | 250 | * Default read function for 16bit buswith without |
1da177e4 LT |
251 | * endianess conversion |
252 | */ | |
253 | static u16 nand_read_word(struct mtd_info *mtd) | |
254 | { | |
255 | struct nand_chip *this = mtd->priv; | |
256 | return readw(this->IO_ADDR_R); | |
257 | } | |
258 | ||
259 | /** | |
260 | * nand_write_word - [DEFAULT] write one word to the chip | |
261 | * @mtd: MTD device structure | |
262 | * @word: data word to write | |
263 | * | |
61b03bd7 | 264 | * Default write function for 16bit buswith without |
1da177e4 LT |
265 | * endianess conversion |
266 | */ | |
267 | static void nand_write_word(struct mtd_info *mtd, u16 word) | |
268 | { | |
269 | struct nand_chip *this = mtd->priv; | |
270 | writew(word, this->IO_ADDR_W); | |
271 | } | |
272 | ||
273 | /** | |
274 | * nand_select_chip - [DEFAULT] control CE line | |
275 | * @mtd: MTD device structure | |
276 | * @chip: chipnumber to select, -1 for deselect | |
277 | * | |
278 | * Default select function for 1 chip devices. | |
279 | */ | |
280 | static void nand_select_chip(struct mtd_info *mtd, int chip) | |
281 | { | |
282 | struct nand_chip *this = mtd->priv; | |
e0c7d767 | 283 | switch (chip) { |
1da177e4 | 284 | case -1: |
61b03bd7 | 285 | this->hwcontrol(mtd, NAND_CTL_CLRNCE); |
1da177e4 LT |
286 | break; |
287 | case 0: | |
288 | this->hwcontrol(mtd, NAND_CTL_SETNCE); | |
289 | break; | |
290 | ||
291 | default: | |
292 | BUG(); | |
293 | } | |
294 | } | |
295 | ||
296 | /** | |
297 | * nand_write_buf - [DEFAULT] write buffer to chip | |
298 | * @mtd: MTD device structure | |
299 | * @buf: data buffer | |
300 | * @len: number of bytes to write | |
301 | * | |
302 | * Default write function for 8bit buswith | |
303 | */ | |
58dd8f2b | 304 | static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
1da177e4 LT |
305 | { |
306 | int i; | |
307 | struct nand_chip *this = mtd->priv; | |
308 | ||
e0c7d767 | 309 | for (i = 0; i < len; i++) |
1da177e4 LT |
310 | writeb(buf[i], this->IO_ADDR_W); |
311 | } | |
312 | ||
313 | /** | |
61b03bd7 | 314 | * nand_read_buf - [DEFAULT] read chip data into buffer |
1da177e4 LT |
315 | * @mtd: MTD device structure |
316 | * @buf: buffer to store date | |
317 | * @len: number of bytes to read | |
318 | * | |
319 | * Default read function for 8bit buswith | |
320 | */ | |
58dd8f2b | 321 | static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) |
1da177e4 LT |
322 | { |
323 | int i; | |
324 | struct nand_chip *this = mtd->priv; | |
325 | ||
e0c7d767 | 326 | for (i = 0; i < len; i++) |
1da177e4 LT |
327 | buf[i] = readb(this->IO_ADDR_R); |
328 | } | |
329 | ||
330 | /** | |
61b03bd7 | 331 | * nand_verify_buf - [DEFAULT] Verify chip data against buffer |
1da177e4 LT |
332 | * @mtd: MTD device structure |
333 | * @buf: buffer containing the data to compare | |
334 | * @len: number of bytes to compare | |
335 | * | |
336 | * Default verify function for 8bit buswith | |
337 | */ | |
58dd8f2b | 338 | static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
1da177e4 LT |
339 | { |
340 | int i; | |
341 | struct nand_chip *this = mtd->priv; | |
342 | ||
e0c7d767 | 343 | for (i = 0; i < len; i++) |
1da177e4 LT |
344 | if (buf[i] != readb(this->IO_ADDR_R)) |
345 | return -EFAULT; | |
346 | ||
347 | return 0; | |
348 | } | |
349 | ||
350 | /** | |
351 | * nand_write_buf16 - [DEFAULT] write buffer to chip | |
352 | * @mtd: MTD device structure | |
353 | * @buf: data buffer | |
354 | * @len: number of bytes to write | |
355 | * | |
356 | * Default write function for 16bit buswith | |
357 | */ | |
58dd8f2b | 358 | static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
1da177e4 LT |
359 | { |
360 | int i; | |
361 | struct nand_chip *this = mtd->priv; | |
362 | u16 *p = (u16 *) buf; | |
363 | len >>= 1; | |
61b03bd7 | 364 | |
e0c7d767 | 365 | for (i = 0; i < len; i++) |
1da177e4 | 366 | writew(p[i], this->IO_ADDR_W); |
61b03bd7 | 367 | |
1da177e4 LT |
368 | } |
369 | ||
370 | /** | |
61b03bd7 | 371 | * nand_read_buf16 - [DEFAULT] read chip data into buffer |
1da177e4 LT |
372 | * @mtd: MTD device structure |
373 | * @buf: buffer to store date | |
374 | * @len: number of bytes to read | |
375 | * | |
376 | * Default read function for 16bit buswith | |
377 | */ | |
58dd8f2b | 378 | static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) |
1da177e4 LT |
379 | { |
380 | int i; | |
381 | struct nand_chip *this = mtd->priv; | |
382 | u16 *p = (u16 *) buf; | |
383 | len >>= 1; | |
384 | ||
e0c7d767 | 385 | for (i = 0; i < len; i++) |
1da177e4 LT |
386 | p[i] = readw(this->IO_ADDR_R); |
387 | } | |
388 | ||
389 | /** | |
61b03bd7 | 390 | * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer |
1da177e4 LT |
391 | * @mtd: MTD device structure |
392 | * @buf: buffer containing the data to compare | |
393 | * @len: number of bytes to compare | |
394 | * | |
395 | * Default verify function for 16bit buswith | |
396 | */ | |
58dd8f2b | 397 | static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
1da177e4 LT |
398 | { |
399 | int i; | |
400 | struct nand_chip *this = mtd->priv; | |
401 | u16 *p = (u16 *) buf; | |
402 | len >>= 1; | |
403 | ||
e0c7d767 | 404 | for (i = 0; i < len; i++) |
1da177e4 LT |
405 | if (p[i] != readw(this->IO_ADDR_R)) |
406 | return -EFAULT; | |
407 | ||
408 | return 0; | |
409 | } | |
410 | ||
411 | /** | |
412 | * nand_block_bad - [DEFAULT] Read bad block marker from the chip | |
413 | * @mtd: MTD device structure | |
414 | * @ofs: offset from device start | |
415 | * @getchip: 0, if the chip is already selected | |
416 | * | |
61b03bd7 | 417 | * Check, if the block is bad. |
1da177e4 LT |
418 | */ |
419 | static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) | |
420 | { | |
421 | int page, chipnr, res = 0; | |
422 | struct nand_chip *this = mtd->priv; | |
423 | u16 bad; | |
424 | ||
425 | if (getchip) { | |
426 | page = (int)(ofs >> this->page_shift); | |
427 | chipnr = (int)(ofs >> this->chip_shift); | |
428 | ||
429 | /* Grab the lock and see if the device is available */ | |
e0c7d767 | 430 | nand_get_device(this, mtd, FL_READING); |
1da177e4 LT |
431 | |
432 | /* Select the NAND device */ | |
433 | this->select_chip(mtd, chipnr); | |
61b03bd7 | 434 | } else |
e0c7d767 | 435 | page = (int)ofs; |
1da177e4 LT |
436 | |
437 | if (this->options & NAND_BUSWIDTH_16) { | |
2c0a2bed TG |
438 | this->cmdfunc(mtd, NAND_CMD_READOOB, this->badblockpos & 0xFE, |
439 | page & this->pagemask); | |
1da177e4 LT |
440 | bad = cpu_to_le16(this->read_word(mtd)); |
441 | if (this->badblockpos & 0x1) | |
49196f33 | 442 | bad >>= 8; |
1da177e4 LT |
443 | if ((bad & 0xFF) != 0xff) |
444 | res = 1; | |
445 | } else { | |
2c0a2bed TG |
446 | this->cmdfunc(mtd, NAND_CMD_READOOB, this->badblockpos, |
447 | page & this->pagemask); | |
1da177e4 LT |
448 | if (this->read_byte(mtd) != 0xff) |
449 | res = 1; | |
450 | } | |
61b03bd7 | 451 | |
1da177e4 LT |
452 | if (getchip) { |
453 | /* Deselect and wake up anyone waiting on the device */ | |
454 | nand_release_device(mtd); | |
61b03bd7 TG |
455 | } |
456 | ||
1da177e4 LT |
457 | return res; |
458 | } | |
459 | ||
460 | /** | |
461 | * nand_default_block_markbad - [DEFAULT] mark a block bad | |
462 | * @mtd: MTD device structure | |
463 | * @ofs: offset from device start | |
464 | * | |
465 | * This is the default implementation, which can be overridden by | |
466 | * a hardware specific driver. | |
467 | */ | |
468 | static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) | |
469 | { | |
470 | struct nand_chip *this = mtd->priv; | |
58dd8f2b | 471 | uint8_t buf[2] = { 0, 0 }; |
e0c7d767 | 472 | size_t retlen; |
1da177e4 | 473 | int block; |
61b03bd7 | 474 | |
1da177e4 | 475 | /* Get block number */ |
e0c7d767 | 476 | block = ((int)ofs) >> this->bbt_erase_shift; |
41ce9214 AB |
477 | if (this->bbt) |
478 | this->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); | |
1da177e4 LT |
479 | |
480 | /* Do we have a flash based bad block table ? */ | |
481 | if (this->options & NAND_USE_FLASH_BBT) | |
e0c7d767 | 482 | return nand_update_bbt(mtd, ofs); |
61b03bd7 | 483 | |
1da177e4 LT |
484 | /* We write two bytes, so we dont have to mess with 16 bit access */ |
485 | ofs += mtd->oobsize + (this->badblockpos & ~0x01); | |
e0c7d767 | 486 | return nand_write_oob(mtd, ofs, 2, &retlen, buf); |
1da177e4 LT |
487 | } |
488 | ||
61b03bd7 | 489 | /** |
1da177e4 LT |
490 | * nand_check_wp - [GENERIC] check if the chip is write protected |
491 | * @mtd: MTD device structure | |
61b03bd7 | 492 | * Check, if the device is write protected |
1da177e4 | 493 | * |
61b03bd7 | 494 | * The function expects, that the device is already selected |
1da177e4 | 495 | */ |
e0c7d767 | 496 | static int nand_check_wp(struct mtd_info *mtd) |
1da177e4 LT |
497 | { |
498 | struct nand_chip *this = mtd->priv; | |
499 | /* Check the WP bit */ | |
e0c7d767 | 500 | this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
61b03bd7 | 501 | return (this->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; |
1da177e4 LT |
502 | } |
503 | ||
504 | /** | |
505 | * nand_block_checkbad - [GENERIC] Check if a block is marked bad | |
506 | * @mtd: MTD device structure | |
507 | * @ofs: offset from device start | |
508 | * @getchip: 0, if the chip is already selected | |
509 | * @allowbbt: 1, if its allowed to access the bbt area | |
510 | * | |
511 | * Check, if the block is bad. Either by reading the bad block table or | |
512 | * calling of the scan function. | |
513 | */ | |
2c0a2bed TG |
514 | static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, |
515 | int allowbbt) | |
1da177e4 LT |
516 | { |
517 | struct nand_chip *this = mtd->priv; | |
61b03bd7 | 518 | |
1da177e4 LT |
519 | if (!this->bbt) |
520 | return this->block_bad(mtd, ofs, getchip); | |
61b03bd7 | 521 | |
1da177e4 | 522 | /* Return info from the table */ |
e0c7d767 | 523 | return nand_isbad_bbt(mtd, ofs, allowbbt); |
1da177e4 LT |
524 | } |
525 | ||
8fe833c1 RP |
526 | DEFINE_LED_TRIGGER(nand_led_trigger); |
527 | ||
61b03bd7 | 528 | /* |
3b88775c TG |
529 | * Wait for the ready pin, after a command |
530 | * The timeout is catched later. | |
531 | */ | |
532 | static void nand_wait_ready(struct mtd_info *mtd) | |
533 | { | |
534 | struct nand_chip *this = mtd->priv; | |
e0c7d767 | 535 | unsigned long timeo = jiffies + 2; |
3b88775c | 536 | |
8fe833c1 | 537 | led_trigger_event(nand_led_trigger, LED_FULL); |
3b88775c TG |
538 | /* wait until command is processed or timeout occures */ |
539 | do { | |
540 | if (this->dev_ready(mtd)) | |
8fe833c1 | 541 | break; |
8446f1d3 | 542 | touch_softlockup_watchdog(); |
61b03bd7 | 543 | } while (time_before(jiffies, timeo)); |
8fe833c1 | 544 | led_trigger_event(nand_led_trigger, LED_OFF); |
3b88775c TG |
545 | } |
546 | ||
1da177e4 LT |
547 | /** |
548 | * nand_command - [DEFAULT] Send command to NAND device | |
549 | * @mtd: MTD device structure | |
550 | * @command: the command to be sent | |
551 | * @column: the column address for this command, -1 if none | |
552 | * @page_addr: the page address for this command, -1 if none | |
553 | * | |
554 | * Send command to NAND device. This function is used for small page | |
555 | * devices (256/512 Bytes per page) | |
556 | */ | |
2c0a2bed TG |
557 | static void nand_command(struct mtd_info *mtd, unsigned command, int column, |
558 | int page_addr) | |
1da177e4 LT |
559 | { |
560 | register struct nand_chip *this = mtd->priv; | |
561 | ||
562 | /* Begin command latch cycle */ | |
563 | this->hwcontrol(mtd, NAND_CTL_SETCLE); | |
564 | /* | |
565 | * Write out the command to the device. | |
566 | */ | |
567 | if (command == NAND_CMD_SEQIN) { | |
568 | int readcmd; | |
569 | ||
28318776 | 570 | if (column >= mtd->writesize) { |
1da177e4 | 571 | /* OOB area */ |
28318776 | 572 | column -= mtd->writesize; |
1da177e4 LT |
573 | readcmd = NAND_CMD_READOOB; |
574 | } else if (column < 256) { | |
575 | /* First 256 bytes --> READ0 */ | |
576 | readcmd = NAND_CMD_READ0; | |
577 | } else { | |
578 | column -= 256; | |
579 | readcmd = NAND_CMD_READ1; | |
580 | } | |
581 | this->write_byte(mtd, readcmd); | |
582 | } | |
583 | this->write_byte(mtd, command); | |
584 | ||
585 | /* Set ALE and clear CLE to start address cycle */ | |
586 | this->hwcontrol(mtd, NAND_CTL_CLRCLE); | |
587 | ||
588 | if (column != -1 || page_addr != -1) { | |
589 | this->hwcontrol(mtd, NAND_CTL_SETALE); | |
590 | ||
591 | /* Serially input address */ | |
592 | if (column != -1) { | |
593 | /* Adjust columns for 16 bit buswidth */ | |
594 | if (this->options & NAND_BUSWIDTH_16) | |
595 | column >>= 1; | |
596 | this->write_byte(mtd, column); | |
597 | } | |
598 | if (page_addr != -1) { | |
58dd8f2b TG |
599 | this->write_byte(mtd, (uint8_t)(page_addr & 0xff)); |
600 | this->write_byte(mtd, (uint8_t)((page_addr >> 8) & 0xff)); | |
1da177e4 LT |
601 | /* One more address cycle for devices > 32MiB */ |
602 | if (this->chipsize > (32 << 20)) | |
58dd8f2b | 603 | this->write_byte(mtd, (uint8_t)((page_addr >> 16) & 0x0f)); |
1da177e4 LT |
604 | } |
605 | /* Latch in address */ | |
606 | this->hwcontrol(mtd, NAND_CTL_CLRALE); | |
607 | } | |
61b03bd7 TG |
608 | |
609 | /* | |
610 | * program and erase have their own busy handlers | |
1da177e4 | 611 | * status and sequential in needs no delay |
e0c7d767 | 612 | */ |
1da177e4 | 613 | switch (command) { |
61b03bd7 | 614 | |
1da177e4 LT |
615 | case NAND_CMD_PAGEPROG: |
616 | case NAND_CMD_ERASE1: | |
617 | case NAND_CMD_ERASE2: | |
618 | case NAND_CMD_SEQIN: | |
619 | case NAND_CMD_STATUS: | |
620 | return; | |
621 | ||
622 | case NAND_CMD_RESET: | |
61b03bd7 | 623 | if (this->dev_ready) |
1da177e4 LT |
624 | break; |
625 | udelay(this->chip_delay); | |
626 | this->hwcontrol(mtd, NAND_CTL_SETCLE); | |
627 | this->write_byte(mtd, NAND_CMD_STATUS); | |
628 | this->hwcontrol(mtd, NAND_CTL_CLRCLE); | |
e0c7d767 | 629 | while (!(this->read_byte(mtd) & NAND_STATUS_READY)) ; |
1da177e4 LT |
630 | return; |
631 | ||
e0c7d767 | 632 | /* This applies to read commands */ |
1da177e4 | 633 | default: |
61b03bd7 | 634 | /* |
1da177e4 LT |
635 | * If we don't have access to the busy pin, we apply the given |
636 | * command delay | |
e0c7d767 | 637 | */ |
1da177e4 | 638 | if (!this->dev_ready) { |
e0c7d767 | 639 | udelay(this->chip_delay); |
1da177e4 | 640 | return; |
61b03bd7 | 641 | } |
1da177e4 | 642 | } |
1da177e4 LT |
643 | /* Apply this short delay always to ensure that we do wait tWB in |
644 | * any case on any machine. */ | |
e0c7d767 | 645 | ndelay(100); |
3b88775c TG |
646 | |
647 | nand_wait_ready(mtd); | |
1da177e4 LT |
648 | } |
649 | ||
650 | /** | |
651 | * nand_command_lp - [DEFAULT] Send command to NAND large page device | |
652 | * @mtd: MTD device structure | |
653 | * @command: the command to be sent | |
654 | * @column: the column address for this command, -1 if none | |
655 | * @page_addr: the page address for this command, -1 if none | |
656 | * | |
657 | * Send command to NAND device. This is the version for the new large page devices | |
e0c7d767 | 658 | * We dont have the separate regions as we have in the small page devices. |
1da177e4 LT |
659 | * We must emulate NAND_CMD_READOOB to keep the code compatible. |
660 | * | |
661 | */ | |
e0c7d767 | 662 | static void nand_command_lp(struct mtd_info *mtd, unsigned command, int column, int page_addr) |
1da177e4 LT |
663 | { |
664 | register struct nand_chip *this = mtd->priv; | |
665 | ||
666 | /* Emulate NAND_CMD_READOOB */ | |
667 | if (command == NAND_CMD_READOOB) { | |
28318776 | 668 | column += mtd->writesize; |
1da177e4 LT |
669 | command = NAND_CMD_READ0; |
670 | } | |
61b03bd7 | 671 | |
1da177e4 LT |
672 | /* Begin command latch cycle */ |
673 | this->hwcontrol(mtd, NAND_CTL_SETCLE); | |
674 | /* Write out the command to the device. */ | |
30f464b7 | 675 | this->write_byte(mtd, (command & 0xff)); |
1da177e4 LT |
676 | /* End command latch cycle */ |
677 | this->hwcontrol(mtd, NAND_CTL_CLRCLE); | |
678 | ||
679 | if (column != -1 || page_addr != -1) { | |
680 | this->hwcontrol(mtd, NAND_CTL_SETALE); | |
681 | ||
682 | /* Serially input address */ | |
683 | if (column != -1) { | |
684 | /* Adjust columns for 16 bit buswidth */ | |
685 | if (this->options & NAND_BUSWIDTH_16) | |
686 | column >>= 1; | |
687 | this->write_byte(mtd, column & 0xff); | |
688 | this->write_byte(mtd, column >> 8); | |
61b03bd7 | 689 | } |
1da177e4 | 690 | if (page_addr != -1) { |
58dd8f2b TG |
691 | this->write_byte(mtd, (uint8_t)(page_addr & 0xff)); |
692 | this->write_byte(mtd, (uint8_t)((page_addr >> 8) & 0xff)); | |
1da177e4 LT |
693 | /* One more address cycle for devices > 128MiB */ |
694 | if (this->chipsize > (128 << 20)) | |
58dd8f2b | 695 | this->write_byte(mtd, (uint8_t)((page_addr >> 16) & 0xff)); |
1da177e4 LT |
696 | } |
697 | /* Latch in address */ | |
698 | this->hwcontrol(mtd, NAND_CTL_CLRALE); | |
699 | } | |
61b03bd7 TG |
700 | |
701 | /* | |
702 | * program and erase have their own busy handlers | |
30f464b7 DM |
703 | * status, sequential in, and deplete1 need no delay |
704 | */ | |
1da177e4 | 705 | switch (command) { |
61b03bd7 | 706 | |
1da177e4 LT |
707 | case NAND_CMD_CACHEDPROG: |
708 | case NAND_CMD_PAGEPROG: | |
709 | case NAND_CMD_ERASE1: | |
710 | case NAND_CMD_ERASE2: | |
711 | case NAND_CMD_SEQIN: | |
712 | case NAND_CMD_STATUS: | |
30f464b7 | 713 | case NAND_CMD_DEPLETE1: |
1da177e4 LT |
714 | return; |
715 | ||
e0c7d767 DW |
716 | /* |
717 | * read error status commands require only a short delay | |
718 | */ | |
30f464b7 DM |
719 | case NAND_CMD_STATUS_ERROR: |
720 | case NAND_CMD_STATUS_ERROR0: | |
721 | case NAND_CMD_STATUS_ERROR1: | |
722 | case NAND_CMD_STATUS_ERROR2: | |
723 | case NAND_CMD_STATUS_ERROR3: | |
724 | udelay(this->chip_delay); | |
725 | return; | |
1da177e4 LT |
726 | |
727 | case NAND_CMD_RESET: | |
61b03bd7 | 728 | if (this->dev_ready) |
1da177e4 LT |
729 | break; |
730 | udelay(this->chip_delay); | |
731 | this->hwcontrol(mtd, NAND_CTL_SETCLE); | |
732 | this->write_byte(mtd, NAND_CMD_STATUS); | |
733 | this->hwcontrol(mtd, NAND_CTL_CLRCLE); | |
e0c7d767 | 734 | while (!(this->read_byte(mtd) & NAND_STATUS_READY)) ; |
1da177e4 LT |
735 | return; |
736 | ||
737 | case NAND_CMD_READ0: | |
738 | /* Begin command latch cycle */ | |
739 | this->hwcontrol(mtd, NAND_CTL_SETCLE); | |
740 | /* Write out the start read command */ | |
741 | this->write_byte(mtd, NAND_CMD_READSTART); | |
742 | /* End command latch cycle */ | |
743 | this->hwcontrol(mtd, NAND_CTL_CLRCLE); | |
744 | /* Fall through into ready check */ | |
61b03bd7 | 745 | |
e0c7d767 | 746 | /* This applies to read commands */ |
1da177e4 | 747 | default: |
61b03bd7 | 748 | /* |
1da177e4 LT |
749 | * If we don't have access to the busy pin, we apply the given |
750 | * command delay | |
e0c7d767 | 751 | */ |
1da177e4 | 752 | if (!this->dev_ready) { |
e0c7d767 | 753 | udelay(this->chip_delay); |
1da177e4 | 754 | return; |
61b03bd7 | 755 | } |
1da177e4 | 756 | } |
3b88775c | 757 | |
1da177e4 LT |
758 | /* Apply this short delay always to ensure that we do wait tWB in |
759 | * any case on any machine. */ | |
e0c7d767 | 760 | ndelay(100); |
3b88775c TG |
761 | |
762 | nand_wait_ready(mtd); | |
1da177e4 LT |
763 | } |
764 | ||
765 | /** | |
766 | * nand_get_device - [GENERIC] Get chip for selected access | |
767 | * @this: the nand chip descriptor | |
768 | * @mtd: MTD device structure | |
61b03bd7 | 769 | * @new_state: the state which is requested |
1da177e4 LT |
770 | * |
771 | * Get the device and lock it for exclusive access | |
772 | */ | |
2c0a2bed TG |
773 | static int |
774 | nand_get_device(struct nand_chip *this, struct mtd_info *mtd, int new_state) | |
1da177e4 | 775 | { |
a36ed299 TG |
776 | spinlock_t *lock = &this->controller->lock; |
777 | wait_queue_head_t *wq = &this->controller->wq; | |
e0c7d767 | 778 | DECLARE_WAITQUEUE(wait, current); |
e0c7d767 | 779 | retry: |
0dfc6246 TG |
780 | spin_lock(lock); |
781 | ||
1da177e4 | 782 | /* Hardware controller shared among independend devices */ |
a36ed299 TG |
783 | /* Hardware controller shared among independend devices */ |
784 | if (!this->controller->active) | |
785 | this->controller->active = this; | |
786 | ||
787 | if (this->controller->active == this && this->state == FL_READY) { | |
0dfc6246 TG |
788 | this->state = new_state; |
789 | spin_unlock(lock); | |
962034f4 VW |
790 | return 0; |
791 | } | |
792 | if (new_state == FL_PM_SUSPENDED) { | |
793 | spin_unlock(lock); | |
794 | return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; | |
0dfc6246 TG |
795 | } |
796 | set_current_state(TASK_UNINTERRUPTIBLE); | |
797 | add_wait_queue(wq, &wait); | |
798 | spin_unlock(lock); | |
799 | schedule(); | |
800 | remove_wait_queue(wq, &wait); | |
1da177e4 LT |
801 | goto retry; |
802 | } | |
803 | ||
804 | /** | |
805 | * nand_wait - [DEFAULT] wait until the command is done | |
806 | * @mtd: MTD device structure | |
807 | * @this: NAND chip structure | |
808 | * @state: state to select the max. timeout value | |
809 | * | |
810 | * Wait for command done. This applies to erase and program only | |
61b03bd7 | 811 | * Erase can take up to 400ms and program up to 20ms according to |
1da177e4 LT |
812 | * general NAND and SmartMedia specs |
813 | * | |
814 | */ | |
815 | static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state) | |
816 | { | |
817 | ||
e0c7d767 DW |
818 | unsigned long timeo = jiffies; |
819 | int status; | |
61b03bd7 | 820 | |
1da177e4 | 821 | if (state == FL_ERASING) |
e0c7d767 | 822 | timeo += (HZ * 400) / 1000; |
1da177e4 | 823 | else |
e0c7d767 | 824 | timeo += (HZ * 20) / 1000; |
1da177e4 | 825 | |
8fe833c1 RP |
826 | led_trigger_event(nand_led_trigger, LED_FULL); |
827 | ||
1da177e4 LT |
828 | /* Apply this short delay always to ensure that we do wait tWB in |
829 | * any case on any machine. */ | |
e0c7d767 | 830 | ndelay(100); |
1da177e4 LT |
831 | |
832 | if ((state == FL_ERASING) && (this->options & NAND_IS_AND)) | |
e0c7d767 | 833 | this->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); |
61b03bd7 | 834 | else |
e0c7d767 | 835 | this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
1da177e4 | 836 | |
61b03bd7 | 837 | while (time_before(jiffies, timeo)) { |
1da177e4 LT |
838 | /* Check, if we were interrupted */ |
839 | if (this->state != state) | |
840 | return 0; | |
841 | ||
842 | if (this->dev_ready) { | |
843 | if (this->dev_ready(mtd)) | |
61b03bd7 | 844 | break; |
1da177e4 LT |
845 | } else { |
846 | if (this->read_byte(mtd) & NAND_STATUS_READY) | |
847 | break; | |
848 | } | |
20a6c211 | 849 | cond_resched(); |
1da177e4 | 850 | } |
8fe833c1 RP |
851 | led_trigger_event(nand_led_trigger, LED_OFF); |
852 | ||
e0c7d767 | 853 | status = (int)this->read_byte(mtd); |
1da177e4 LT |
854 | return status; |
855 | } | |
856 | ||
857 | /** | |
858 | * nand_write_page - [GENERIC] write one page | |
859 | * @mtd: MTD device structure | |
860 | * @this: NAND chip structure | |
861 | * @page: startpage inside the chip, must be called with (page & this->pagemask) | |
862 | * @oob_buf: out of band data buffer | |
863 | * @oobsel: out of band selecttion structre | |
864 | * @cached: 1 = enable cached programming if supported by chip | |
865 | * | |
866 | * Nand_page_program function is used for write and writev ! | |
867 | * This function will always program a full page of data | |
868 | * If you call it with a non page aligned buffer, you're lost :) | |
869 | * | |
870 | * Cached programming is not supported yet. | |
871 | */ | |
e0c7d767 | 872 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, int page, |
58dd8f2b | 873 | uint8_t *oob_buf, struct nand_oobinfo *oobsel, int cached) |
1da177e4 | 874 | { |
e0c7d767 | 875 | int i, status; |
58dd8f2b | 876 | uint8_t ecc_code[32]; |
6dfc6d25 | 877 | int eccmode = oobsel->useecc ? this->ecc.mode : NAND_ECC_NONE; |
e0c7d767 | 878 | int *oob_config = oobsel->eccpos; |
6dfc6d25 | 879 | int datidx = 0, eccidx = 0, eccsteps = this->ecc.steps; |
e0c7d767 | 880 | int eccbytes = 0; |
61b03bd7 | 881 | |
1da177e4 LT |
882 | /* FIXME: Enable cached programming */ |
883 | cached = 0; | |
61b03bd7 | 884 | |
1da177e4 | 885 | /* Send command to begin auto page programming */ |
e0c7d767 | 886 | this->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); |
1da177e4 LT |
887 | |
888 | /* Write out complete page of data, take care of eccmode */ | |
889 | switch (eccmode) { | |
e0c7d767 | 890 | /* No ecc, write all */ |
1da177e4 | 891 | case NAND_ECC_NONE: |
e0c7d767 | 892 | printk(KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n"); |
28318776 | 893 | this->write_buf(mtd, this->data_poi, mtd->writesize); |
1da177e4 | 894 | break; |
61b03bd7 | 895 | |
e0c7d767 | 896 | /* Software ecc 3/256, write all */ |
1da177e4 LT |
897 | case NAND_ECC_SOFT: |
898 | for (; eccsteps; eccsteps--) { | |
6dfc6d25 | 899 | this->ecc.calculate(mtd, &this->data_poi[datidx], ecc_code); |
1da177e4 LT |
900 | for (i = 0; i < 3; i++, eccidx++) |
901 | oob_buf[oob_config[eccidx]] = ecc_code[i]; | |
6dfc6d25 | 902 | datidx += this->ecc.size; |
1da177e4 | 903 | } |
28318776 | 904 | this->write_buf(mtd, this->data_poi, mtd->writesize); |
1da177e4 LT |
905 | break; |
906 | default: | |
6dfc6d25 | 907 | eccbytes = this->ecc.bytes; |
1da177e4 LT |
908 | for (; eccsteps; eccsteps--) { |
909 | /* enable hardware ecc logic for write */ | |
6dfc6d25 TG |
910 | this->ecc.hwctl(mtd, NAND_ECC_WRITE); |
911 | this->write_buf(mtd, &this->data_poi[datidx], this->ecc.size); | |
912 | this->ecc.calculate(mtd, &this->data_poi[datidx], ecc_code); | |
1da177e4 LT |
913 | for (i = 0; i < eccbytes; i++, eccidx++) |
914 | oob_buf[oob_config[eccidx]] = ecc_code[i]; | |
915 | /* If the hardware ecc provides syndromes then | |
916 | * the ecc code must be written immidiately after | |
917 | * the data bytes (words) */ | |
918 | if (this->options & NAND_HWECC_SYNDROME) | |
919 | this->write_buf(mtd, ecc_code, eccbytes); | |
6dfc6d25 | 920 | datidx += this->ecc.size; |
1da177e4 LT |
921 | } |
922 | break; | |
923 | } | |
61b03bd7 | 924 | |
1da177e4 LT |
925 | /* Write out OOB data */ |
926 | if (this->options & NAND_HWECC_SYNDROME) | |
927 | this->write_buf(mtd, &oob_buf[oobsel->eccbytes], mtd->oobsize - oobsel->eccbytes); | |
61b03bd7 | 928 | else |
1da177e4 LT |
929 | this->write_buf(mtd, oob_buf, mtd->oobsize); |
930 | ||
931 | /* Send command to actually program the data */ | |
e0c7d767 | 932 | this->cmdfunc(mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1); |
1da177e4 LT |
933 | |
934 | if (!cached) { | |
935 | /* call wait ready function */ | |
e0c7d767 | 936 | status = this->waitfunc(mtd, this, FL_WRITING); |
068e3c0a DM |
937 | |
938 | /* See if operation failed and additional status checks are available */ | |
939 | if ((status & NAND_STATUS_FAIL) && (this->errstat)) { | |
940 | status = this->errstat(mtd, this, FL_WRITING, status, page); | |
941 | } | |
942 | ||
1da177e4 | 943 | /* See if device thinks it succeeded */ |
a4ab4c5d | 944 | if (status & NAND_STATUS_FAIL) { |
e0c7d767 | 945 | DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page); |
1da177e4 LT |
946 | return -EIO; |
947 | } | |
948 | } else { | |
949 | /* FIXME: Implement cached programming ! */ | |
e0c7d767 | 950 | /* wait until cache is ready */ |
1da177e4 LT |
951 | // status = this->waitfunc (mtd, this, FL_CACHEDRPG); |
952 | } | |
61b03bd7 | 953 | return 0; |
1da177e4 LT |
954 | } |
955 | ||
956 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE | |
957 | /** | |
958 | * nand_verify_pages - [GENERIC] verify the chip contents after a write | |
959 | * @mtd: MTD device structure | |
960 | * @this: NAND chip structure | |
2c0a2bed | 961 | * @page: startpage inside the chip, must be called with (page & this->pagemask) |
1da177e4 LT |
962 | * @numpages: number of pages to verify |
963 | * @oob_buf: out of band data buffer | |
964 | * @oobsel: out of band selecttion structre | |
965 | * @chipnr: number of the current chip | |
966 | * @oobmode: 1 = full buffer verify, 0 = ecc only | |
967 | * | |
968 | * The NAND device assumes that it is always writing to a cleanly erased page. | |
61b03bd7 | 969 | * Hence, it performs its internal write verification only on bits that |
1da177e4 | 970 | * transitioned from 1 to 0. The device does NOT verify the whole page on a |
61b03bd7 TG |
971 | * byte by byte basis. It is possible that the page was not completely erased |
972 | * or the page is becoming unusable due to wear. The read with ECC would catch | |
973 | * the error later when the ECC page check fails, but we would rather catch | |
1da177e4 LT |
974 | * it early in the page write stage. Better to write no data than invalid data. |
975 | */ | |
e0c7d767 | 976 | static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *this, int page, int numpages, |
58dd8f2b | 977 | uint8_t *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode) |
1da177e4 | 978 | { |
e0c7d767 DW |
979 | int i, j, datidx = 0, oobofs = 0, res = -EIO; |
980 | int eccsteps = this->eccsteps; | |
981 | int hweccbytes; | |
58dd8f2b | 982 | uint8_t oobdata[64]; |
1da177e4 LT |
983 | |
984 | hweccbytes = (this->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0; | |
985 | ||
986 | /* Send command to read back the first page */ | |
e0c7d767 | 987 | this->cmdfunc(mtd, NAND_CMD_READ0, 0, page); |
1da177e4 | 988 | |
e0c7d767 | 989 | for (;;) { |
1da177e4 LT |
990 | for (j = 0; j < eccsteps; j++) { |
991 | /* Loop through and verify the data */ | |
992 | if (this->verify_buf(mtd, &this->data_poi[datidx], mtd->eccsize)) { | |
e0c7d767 | 993 | DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page); |
1da177e4 LT |
994 | goto out; |
995 | } | |
996 | datidx += mtd->eccsize; | |
997 | /* Have we a hw generator layout ? */ | |
998 | if (!hweccbytes) | |
999 | continue; | |
1000 | if (this->verify_buf(mtd, &this->oob_buf[oobofs], hweccbytes)) { | |
e0c7d767 | 1001 | DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page); |
1da177e4 LT |
1002 | goto out; |
1003 | } | |
1004 | oobofs += hweccbytes; | |
1005 | } | |
1006 | ||
1007 | /* check, if we must compare all data or if we just have to | |
1008 | * compare the ecc bytes | |
1009 | */ | |
1010 | if (oobmode) { | |
1011 | if (this->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) { | |
e0c7d767 | 1012 | DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page); |
1da177e4 LT |
1013 | goto out; |
1014 | } | |
1015 | } else { | |
1016 | /* Read always, else autoincrement fails */ | |
1017 | this->read_buf(mtd, oobdata, mtd->oobsize - hweccbytes * eccsteps); | |
1018 | ||
1019 | if (oobsel->useecc != MTD_NANDECC_OFF && !hweccbytes) { | |
1020 | int ecccnt = oobsel->eccbytes; | |
61b03bd7 | 1021 | |
1da177e4 LT |
1022 | for (i = 0; i < ecccnt; i++) { |
1023 | int idx = oobsel->eccpos[i]; | |
e0c7d767 DW |
1024 | if (oobdata[idx] != oob_buf[oobofs + idx]) { |
1025 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Failed ECC write verify, page 0x%08x, %6i bytes were succesful\n", | |
1026 | __FUNCTION__, page, i); | |
1da177e4 LT |
1027 | goto out; |
1028 | } | |
1029 | } | |
61b03bd7 | 1030 | } |
1da177e4 LT |
1031 | } |
1032 | oobofs += mtd->oobsize - hweccbytes * eccsteps; | |
1033 | page++; | |
1034 | numpages--; | |
1035 | ||
61b03bd7 | 1036 | /* Apply delay or wait for ready/busy pin |
1da177e4 LT |
1037 | * Do this before the AUTOINCR check, so no problems |
1038 | * arise if a chip which does auto increment | |
1039 | * is marked as NOAUTOINCR by the board driver. | |
1040 | * Do this also before returning, so the chip is | |
1041 | * ready for the next command. | |
e0c7d767 | 1042 | */ |
61b03bd7 | 1043 | if (!this->dev_ready) |
e0c7d767 | 1044 | udelay(this->chip_delay); |
1da177e4 | 1045 | else |
3b88775c | 1046 | nand_wait_ready(mtd); |
1da177e4 LT |
1047 | |
1048 | /* All done, return happy */ | |
1049 | if (!numpages) | |
1050 | return 0; | |
61b03bd7 | 1051 | |
61b03bd7 | 1052 | /* Check, if the chip supports auto page increment */ |
1da177e4 | 1053 | if (!NAND_CANAUTOINCR(this)) |
e0c7d767 | 1054 | this->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); |
1da177e4 | 1055 | } |
61b03bd7 | 1056 | /* |
1da177e4 LT |
1057 | * Terminate the read command. We come here in case of an error |
1058 | * So we must issue a reset command. | |
1059 | */ | |
e0c7d767 DW |
1060 | out: |
1061 | this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); | |
1da177e4 LT |
1062 | return res; |
1063 | } | |
1064 | #endif | |
1065 | ||
1066 | /** | |
068e3c0a | 1067 | * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc |
1da177e4 LT |
1068 | * @mtd: MTD device structure |
1069 | * @from: offset to read from | |
1070 | * @len: number of bytes to read | |
1071 | * @retlen: pointer to variable to store the number of read bytes | |
1072 | * @buf: the databuffer to put data | |
1073 | * | |
068e3c0a DM |
1074 | * This function simply calls nand_do_read_ecc with oob buffer and oobsel = NULL |
1075 | * and flags = 0xff | |
1076 | */ | |
58dd8f2b | 1077 | static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, uint8_t *buf) |
1da177e4 | 1078 | { |
e0c7d767 | 1079 | return nand_do_read_ecc(mtd, from, len, retlen, buf, NULL, &mtd->oobinfo, 0xff); |
22c60f5f | 1080 | } |
1da177e4 | 1081 | |
1da177e4 | 1082 | /** |
068e3c0a | 1083 | * nand_read_ecc - [MTD Interface] MTD compability function for nand_do_read_ecc |
1da177e4 LT |
1084 | * @mtd: MTD device structure |
1085 | * @from: offset to read from | |
1086 | * @len: number of bytes to read | |
1087 | * @retlen: pointer to variable to store the number of read bytes | |
1088 | * @buf: the databuffer to put data | |
1089 | * @oob_buf: filesystem supplied oob data buffer | |
1090 | * @oobsel: oob selection structure | |
1091 | * | |
068e3c0a | 1092 | * This function simply calls nand_do_read_ecc with flags = 0xff |
1da177e4 | 1093 | */ |
e0c7d767 | 1094 | static int nand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, |
58dd8f2b | 1095 | size_t *retlen, uint8_t *buf, uint8_t *oob_buf, struct nand_oobinfo *oobsel) |
068e3c0a | 1096 | { |
22c60f5f TG |
1097 | /* use userspace supplied oobinfo, if zero */ |
1098 | if (oobsel == NULL) | |
1099 | oobsel = &mtd->oobinfo; | |
068e3c0a DM |
1100 | return nand_do_read_ecc(mtd, from, len, retlen, buf, oob_buf, oobsel, 0xff); |
1101 | } | |
1102 | ||
068e3c0a DM |
1103 | /** |
1104 | * nand_do_read_ecc - [MTD Interface] Read data with ECC | |
1105 | * @mtd: MTD device structure | |
1106 | * @from: offset to read from | |
1107 | * @len: number of bytes to read | |
1108 | * @retlen: pointer to variable to store the number of read bytes | |
1109 | * @buf: the databuffer to put data | |
bb75ba4c | 1110 | * @oob_buf: filesystem supplied oob data buffer (can be NULL) |
22c60f5f | 1111 | * @oobsel: oob selection structure |
068e3c0a DM |
1112 | * @flags: flag to indicate if nand_get_device/nand_release_device should be preformed |
1113 | * and how many corrected error bits are acceptable: | |
1114 | * bits 0..7 - number of tolerable errors | |
1115 | * bit 8 - 0 == do not get/release chip, 1 == get/release chip | |
1116 | * | |
1117 | * NAND read with ECC | |
1118 | */ | |
e0c7d767 | 1119 | int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, |
58dd8f2b | 1120 | size_t *retlen, uint8_t *buf, uint8_t *oob_buf, struct nand_oobinfo *oobsel, int flags) |
1da177e4 | 1121 | { |
22c60f5f | 1122 | |
1da177e4 LT |
1123 | int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1; |
1124 | int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0; | |
1125 | struct nand_chip *this = mtd->priv; | |
58dd8f2b TG |
1126 | uint8_t *data_poi, *oob_data = oob_buf; |
1127 | uint8_t ecc_calc[32]; | |
1128 | uint8_t ecc_code[32]; | |
e0c7d767 DW |
1129 | int eccmode, eccsteps; |
1130 | int *oob_config, datidx; | |
1131 | int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1; | |
1132 | int eccbytes; | |
1133 | int compareecc = 1; | |
1134 | int oobreadlen; | |
1da177e4 | 1135 | |
e0c7d767 | 1136 | DEBUG(MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int)from, (int)len); |
1da177e4 LT |
1137 | |
1138 | /* Do not allow reads past end of device */ | |
1139 | if ((from + len) > mtd->size) { | |
e0c7d767 | 1140 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n"); |
1da177e4 LT |
1141 | *retlen = 0; |
1142 | return -EINVAL; | |
1143 | } | |
1144 | ||
1145 | /* Grab the lock and see if the device is available */ | |
068e3c0a | 1146 | if (flags & NAND_GET_DEVICE) |
e0c7d767 | 1147 | nand_get_device(this, mtd, FL_READING); |
1da177e4 | 1148 | |
1da177e4 LT |
1149 | /* Autoplace of oob data ? Use the default placement scheme */ |
1150 | if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) | |
1151 | oobsel = this->autooob; | |
61b03bd7 | 1152 | |
6dfc6d25 | 1153 | eccmode = oobsel->useecc ? this->ecc.mode : NAND_ECC_NONE; |
1da177e4 LT |
1154 | oob_config = oobsel->eccpos; |
1155 | ||
1156 | /* Select the NAND device */ | |
1157 | chipnr = (int)(from >> this->chip_shift); | |
1158 | this->select_chip(mtd, chipnr); | |
1159 | ||
1160 | /* First we calculate the starting page */ | |
e0c7d767 | 1161 | realpage = (int)(from >> this->page_shift); |
1da177e4 LT |
1162 | page = realpage & this->pagemask; |
1163 | ||
1164 | /* Get raw starting column */ | |
28318776 | 1165 | col = from & (mtd->writesize - 1); |
1da177e4 | 1166 | |
28318776 | 1167 | end = mtd->writesize; |
6dfc6d25 TG |
1168 | ecc = this->ecc.size; |
1169 | eccbytes = this->ecc.bytes; | |
61b03bd7 | 1170 | |
1da177e4 LT |
1171 | if ((eccmode == NAND_ECC_NONE) || (this->options & NAND_HWECC_SYNDROME)) |
1172 | compareecc = 0; | |
1173 | ||
1174 | oobreadlen = mtd->oobsize; | |
61b03bd7 | 1175 | if (this->options & NAND_HWECC_SYNDROME) |
1da177e4 LT |
1176 | oobreadlen -= oobsel->eccbytes; |
1177 | ||
1178 | /* Loop until all data read */ | |
1179 | while (read < len) { | |
61b03bd7 | 1180 | |
1da177e4 | 1181 | int aligned = (!col && (len - read) >= end); |
61b03bd7 | 1182 | /* |
1da177e4 LT |
1183 | * If the read is not page aligned, we have to read into data buffer |
1184 | * due to ecc, else we read into return buffer direct | |
1185 | */ | |
1186 | if (aligned) | |
1187 | data_poi = &buf[read]; | |
61b03bd7 | 1188 | else |
1da177e4 | 1189 | data_poi = this->data_buf; |
61b03bd7 TG |
1190 | |
1191 | /* Check, if we have this page in the buffer | |
1da177e4 LT |
1192 | * |
1193 | * FIXME: Make it work when we must provide oob data too, | |
1194 | * check the usage of data_buf oob field | |
1195 | */ | |
1196 | if (realpage == this->pagebuf && !oob_buf) { | |
1197 | /* aligned read ? */ | |
1198 | if (aligned) | |
e0c7d767 | 1199 | memcpy(data_poi, this->data_buf, end); |
1da177e4 LT |
1200 | goto readdata; |
1201 | } | |
1202 | ||
1203 | /* Check, if we must send the read command */ | |
1204 | if (sndcmd) { | |
e0c7d767 | 1205 | this->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); |
1da177e4 | 1206 | sndcmd = 0; |
61b03bd7 | 1207 | } |
1da177e4 LT |
1208 | |
1209 | /* get oob area, if we have no oob buffer from fs-driver */ | |
90e260c8 TG |
1210 | if (!oob_buf || oobsel->useecc == MTD_NANDECC_AUTOPLACE || |
1211 | oobsel->useecc == MTD_NANDECC_AUTOPL_USR) | |
1da177e4 LT |
1212 | oob_data = &this->data_buf[end]; |
1213 | ||
6dfc6d25 | 1214 | eccsteps = this->ecc.steps; |
61b03bd7 | 1215 | |
1da177e4 | 1216 | switch (eccmode) { |
e0c7d767 DW |
1217 | case NAND_ECC_NONE:{ |
1218 | /* No ECC, Read in a page */ | |
1219 | static unsigned long lastwhinge = 0; | |
1220 | if ((lastwhinge / HZ) != (jiffies / HZ)) { | |
1221 | printk(KERN_WARNING | |
1222 | "Reading data from NAND FLASH without ECC is not recommended\n"); | |
1223 | lastwhinge = jiffies; | |
1224 | } | |
1225 | this->read_buf(mtd, data_poi, end); | |
1226 | break; | |
1da177e4 | 1227 | } |
61b03bd7 | 1228 | |
1da177e4 LT |
1229 | case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */ |
1230 | this->read_buf(mtd, data_poi, end); | |
e0c7d767 | 1231 | for (i = 0, datidx = 0; eccsteps; eccsteps--, i += 3, datidx += ecc) |
6dfc6d25 | 1232 | this->ecc.calculate(mtd, &data_poi[datidx], &ecc_calc[i]); |
61b03bd7 | 1233 | break; |
1da177e4 LT |
1234 | |
1235 | default: | |
e0c7d767 | 1236 | for (i = 0, datidx = 0; eccsteps; eccsteps--, i += eccbytes, datidx += ecc) { |
6dfc6d25 | 1237 | this->ecc.hwctl(mtd, NAND_ECC_READ); |
1da177e4 LT |
1238 | this->read_buf(mtd, &data_poi[datidx], ecc); |
1239 | ||
1240 | /* HW ecc with syndrome calculation must read the | |
1241 | * syndrome from flash immidiately after the data */ | |
1242 | if (!compareecc) { | |
1243 | /* Some hw ecc generators need to know when the | |
1244 | * syndrome is read from flash */ | |
6dfc6d25 | 1245 | this->ecc.hwctl(mtd, NAND_ECC_READSYN); |
1da177e4 LT |
1246 | this->read_buf(mtd, &oob_data[i], eccbytes); |
1247 | /* We calc error correction directly, it checks the hw | |
1248 | * generator for an error, reads back the syndrome and | |
1249 | * does the error correction on the fly */ | |
6dfc6d25 | 1250 | ecc_status = this->ecc.correct(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]); |
068e3c0a | 1251 | if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) { |
e0c7d767 DW |
1252 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: " |
1253 | "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr); | |
1da177e4 LT |
1254 | ecc_failed++; |
1255 | } | |
1256 | } else { | |
6dfc6d25 | 1257 | this->ecc.calculate(mtd, &data_poi[datidx], &ecc_calc[i]); |
61b03bd7 | 1258 | } |
1da177e4 | 1259 | } |
61b03bd7 | 1260 | break; |
1da177e4 LT |
1261 | } |
1262 | ||
1263 | /* read oobdata */ | |
1264 | this->read_buf(mtd, &oob_data[mtd->oobsize - oobreadlen], oobreadlen); | |
1265 | ||
1266 | /* Skip ECC check, if not requested (ECC_NONE or HW_ECC with syndromes) */ | |
1267 | if (!compareecc) | |
61b03bd7 TG |
1268 | goto readoob; |
1269 | ||
1da177e4 LT |
1270 | /* Pick the ECC bytes out of the oob data */ |
1271 | for (j = 0; j < oobsel->eccbytes; j++) | |
1272 | ecc_code[j] = oob_data[oob_config[j]]; | |
1273 | ||
e0c7d767 | 1274 | /* correct data, if necessary */ |
6dfc6d25 TG |
1275 | for (i = 0, j = 0, datidx = 0; i < this->ecc.steps; i++, datidx += ecc) { |
1276 | ecc_status = this->ecc.correct(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]); | |
61b03bd7 | 1277 | |
1da177e4 LT |
1278 | /* Get next chunk of ecc bytes */ |
1279 | j += eccbytes; | |
61b03bd7 TG |
1280 | |
1281 | /* Check, if we have a fs supplied oob-buffer, | |
1da177e4 LT |
1282 | * This is the legacy mode. Used by YAFFS1 |
1283 | * Should go away some day | |
1284 | */ | |
61b03bd7 | 1285 | if (oob_buf && oobsel->useecc == MTD_NANDECC_PLACE) { |
1da177e4 LT |
1286 | int *p = (int *)(&oob_data[mtd->oobsize]); |
1287 | p[i] = ecc_status; | |
1288 | } | |
61b03bd7 TG |
1289 | |
1290 | if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) { | |
e0c7d767 | 1291 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page); |
1da177e4 LT |
1292 | ecc_failed++; |
1293 | } | |
61b03bd7 | 1294 | } |
1da177e4 | 1295 | |
e0c7d767 | 1296 | readoob: |
1da177e4 LT |
1297 | /* check, if we have a fs supplied oob-buffer */ |
1298 | if (oob_buf) { | |
1299 | /* without autoplace. Legacy mode used by YAFFS1 */ | |
e0c7d767 | 1300 | switch (oobsel->useecc) { |
1da177e4 | 1301 | case MTD_NANDECC_AUTOPLACE: |
90e260c8 | 1302 | case MTD_NANDECC_AUTOPL_USR: |
1da177e4 | 1303 | /* Walk through the autoplace chunks */ |
82e1d19f | 1304 | for (i = 0; oobsel->oobfree[i][1]; i++) { |
1da177e4 LT |
1305 | int from = oobsel->oobfree[i][0]; |
1306 | int num = oobsel->oobfree[i][1]; | |
1307 | memcpy(&oob_buf[oob], &oob_data[from], num); | |
82e1d19f | 1308 | oob += num; |
1da177e4 | 1309 | } |
1da177e4 LT |
1310 | break; |
1311 | case MTD_NANDECC_PLACE: | |
1312 | /* YAFFS1 legacy mode */ | |
6dfc6d25 | 1313 | oob_data += this->ecc.steps * sizeof(int); |
1da177e4 LT |
1314 | default: |
1315 | oob_data += mtd->oobsize; | |
1316 | } | |
1317 | } | |
1318 | readdata: | |
1319 | /* Partial page read, transfer data into fs buffer */ | |
61b03bd7 | 1320 | if (!aligned) { |
1da177e4 LT |
1321 | for (j = col; j < end && read < len; j++) |
1322 | buf[read++] = data_poi[j]; | |
61b03bd7 TG |
1323 | this->pagebuf = realpage; |
1324 | } else | |
28318776 | 1325 | read += mtd->writesize; |
1da177e4 | 1326 | |
61b03bd7 | 1327 | /* Apply delay or wait for ready/busy pin |
1da177e4 LT |
1328 | * Do this before the AUTOINCR check, so no problems |
1329 | * arise if a chip which does auto increment | |
1330 | * is marked as NOAUTOINCR by the board driver. | |
e0c7d767 | 1331 | */ |
61b03bd7 | 1332 | if (!this->dev_ready) |
e0c7d767 | 1333 | udelay(this->chip_delay); |
1da177e4 | 1334 | else |
3b88775c | 1335 | nand_wait_ready(mtd); |
61b03bd7 | 1336 | |
1da177e4 | 1337 | if (read == len) |
61b03bd7 | 1338 | break; |
1da177e4 LT |
1339 | |
1340 | /* For subsequent reads align to page boundary. */ | |
1341 | col = 0; | |
1342 | /* Increment page address */ | |
1343 | realpage++; | |
1344 | ||
1345 | page = realpage & this->pagemask; | |
1346 | /* Check, if we cross a chip boundary */ | |
1347 | if (!page) { | |
1348 | chipnr++; | |
1349 | this->select_chip(mtd, -1); | |
1350 | this->select_chip(mtd, chipnr); | |
1351 | } | |
61b03bd7 TG |
1352 | /* Check, if the chip supports auto page increment |
1353 | * or if we have hit a block boundary. | |
e0c7d767 | 1354 | */ |
1da177e4 | 1355 | if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) |
61b03bd7 | 1356 | sndcmd = 1; |
1da177e4 LT |
1357 | } |
1358 | ||
1359 | /* Deselect and wake up anyone waiting on the device */ | |
068e3c0a DM |
1360 | if (flags & NAND_GET_DEVICE) |
1361 | nand_release_device(mtd); | |
1da177e4 LT |
1362 | |
1363 | /* | |
1364 | * Return success, if no ECC failures, else -EBADMSG | |
1365 | * fs driver will take care of that, because | |
1366 | * retlen == desired len and result == -EBADMSG | |
1367 | */ | |
1368 | *retlen = read; | |
1369 | return ecc_failed ? -EBADMSG : 0; | |
1370 | } | |
1371 | ||
1372 | /** | |
1373 | * nand_read_oob - [MTD Interface] NAND read out-of-band | |
1374 | * @mtd: MTD device structure | |
1375 | * @from: offset to read from | |
1376 | * @len: number of bytes to read | |
1377 | * @retlen: pointer to variable to store the number of read bytes | |
1378 | * @buf: the databuffer to put data | |
1379 | * | |
1380 | * NAND read out-of-band data from the spare area | |
1381 | */ | |
58dd8f2b | 1382 | static int nand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, uint8_t *buf) |
1da177e4 LT |
1383 | { |
1384 | int i, col, page, chipnr; | |
1385 | struct nand_chip *this = mtd->priv; | |
e0c7d767 | 1386 | int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1; |
1da177e4 | 1387 | |
e0c7d767 | 1388 | DEBUG(MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int)from, (int)len); |
1da177e4 LT |
1389 | |
1390 | /* Shift to get page */ | |
1391 | page = (int)(from >> this->page_shift); | |
1392 | chipnr = (int)(from >> this->chip_shift); | |
61b03bd7 | 1393 | |
1da177e4 LT |
1394 | /* Mask to get column */ |
1395 | col = from & (mtd->oobsize - 1); | |
1396 | ||
1397 | /* Initialize return length value */ | |
1398 | *retlen = 0; | |
1399 | ||
1400 | /* Do not allow reads past end of device */ | |
1401 | if ((from + len) > mtd->size) { | |
e0c7d767 | 1402 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n"); |
1da177e4 LT |
1403 | *retlen = 0; |
1404 | return -EINVAL; | |
1405 | } | |
1406 | ||
1407 | /* Grab the lock and see if the device is available */ | |
e0c7d767 | 1408 | nand_get_device(this, mtd, FL_READING); |
1da177e4 LT |
1409 | |
1410 | /* Select the NAND device */ | |
1411 | this->select_chip(mtd, chipnr); | |
1412 | ||
1413 | /* Send the read command */ | |
e0c7d767 | 1414 | this->cmdfunc(mtd, NAND_CMD_READOOB, col, page & this->pagemask); |
61b03bd7 | 1415 | /* |
1da177e4 LT |
1416 | * Read the data, if we read more than one page |
1417 | * oob data, let the device transfer the data ! | |
1418 | */ | |
1419 | i = 0; | |
1420 | while (i < len) { | |
1421 | int thislen = mtd->oobsize - col; | |
1422 | thislen = min_t(int, thislen, len); | |
1423 | this->read_buf(mtd, &buf[i], thislen); | |
1424 | i += thislen; | |
1da177e4 LT |
1425 | |
1426 | /* Read more ? */ | |
1427 | if (i < len) { | |
1428 | page++; | |
1429 | col = 0; | |
1430 | ||
1431 | /* Check, if we cross a chip boundary */ | |
1432 | if (!(page & this->pagemask)) { | |
1433 | chipnr++; | |
1434 | this->select_chip(mtd, -1); | |
1435 | this->select_chip(mtd, chipnr); | |
1436 | } | |
61b03bd7 TG |
1437 | |
1438 | /* Apply delay or wait for ready/busy pin | |
19870da7 TG |
1439 | * Do this before the AUTOINCR check, so no problems |
1440 | * arise if a chip which does auto increment | |
1441 | * is marked as NOAUTOINCR by the board driver. | |
1442 | */ | |
61b03bd7 | 1443 | if (!this->dev_ready) |
e0c7d767 | 1444 | udelay(this->chip_delay); |
19870da7 TG |
1445 | else |
1446 | nand_wait_ready(mtd); | |
1447 | ||
61b03bd7 TG |
1448 | /* Check, if the chip supports auto page increment |
1449 | * or if we have hit a block boundary. | |
e0c7d767 | 1450 | */ |
1da177e4 LT |
1451 | if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) { |
1452 | /* For subsequent page reads set offset to 0 */ | |
e0c7d767 | 1453 | this->cmdfunc(mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask); |
1da177e4 LT |
1454 | } |
1455 | } | |
1456 | } | |
1457 | ||
1458 | /* Deselect and wake up anyone waiting on the device */ | |
1459 | nand_release_device(mtd); | |
1460 | ||
1461 | /* Return happy */ | |
1462 | *retlen = len; | |
1463 | return 0; | |
1464 | } | |
1465 | ||
1466 | /** | |
1467 | * nand_read_raw - [GENERIC] Read raw data including oob into buffer | |
1468 | * @mtd: MTD device structure | |
1469 | * @buf: temporary buffer | |
1470 | * @from: offset to read from | |
1471 | * @len: number of bytes to read | |
1472 | * @ooblen: number of oob data bytes to read | |
1473 | * | |
1474 | * Read raw data including oob into buffer | |
1475 | */ | |
e0c7d767 | 1476 | int nand_read_raw(struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen) |
1da177e4 LT |
1477 | { |
1478 | struct nand_chip *this = mtd->priv; | |
e0c7d767 DW |
1479 | int page = (int)(from >> this->page_shift); |
1480 | int chip = (int)(from >> this->chip_shift); | |
1da177e4 LT |
1481 | int sndcmd = 1; |
1482 | int cnt = 0; | |
28318776 | 1483 | int pagesize = mtd->writesize + mtd->oobsize; |
e0c7d767 | 1484 | int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1; |
1da177e4 LT |
1485 | |
1486 | /* Do not allow reads past end of device */ | |
1487 | if ((from + len) > mtd->size) { | |
e0c7d767 | 1488 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt read beyond end of device\n"); |
1da177e4 LT |
1489 | return -EINVAL; |
1490 | } | |
1491 | ||
1492 | /* Grab the lock and see if the device is available */ | |
e0c7d767 | 1493 | nand_get_device(this, mtd, FL_READING); |
1da177e4 | 1494 | |
e0c7d767 | 1495 | this->select_chip(mtd, chip); |
61b03bd7 | 1496 | |
1da177e4 LT |
1497 | /* Add requested oob length */ |
1498 | len += ooblen; | |
61b03bd7 | 1499 | |
1da177e4 LT |
1500 | while (len) { |
1501 | if (sndcmd) | |
e0c7d767 | 1502 | this->cmdfunc(mtd, NAND_CMD_READ0, 0, page & this->pagemask); |
61b03bd7 | 1503 | sndcmd = 0; |
1da177e4 | 1504 | |
e0c7d767 | 1505 | this->read_buf(mtd, &buf[cnt], pagesize); |
1da177e4 LT |
1506 | |
1507 | len -= pagesize; | |
1508 | cnt += pagesize; | |
1509 | page++; | |
61b03bd7 TG |
1510 | |
1511 | if (!this->dev_ready) | |
e0c7d767 | 1512 | udelay(this->chip_delay); |
1da177e4 | 1513 | else |
3b88775c | 1514 | nand_wait_ready(mtd); |
61b03bd7 TG |
1515 | |
1516 | /* Check, if the chip supports auto page increment */ | |
1da177e4 LT |
1517 | if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) |
1518 | sndcmd = 1; | |
1519 | } | |
1520 | ||
1521 | /* Deselect and wake up anyone waiting on the device */ | |
1522 | nand_release_device(mtd); | |
1523 | return 0; | |
1524 | } | |
1525 | ||
61b03bd7 TG |
1526 | /** |
1527 | * nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer | |
1da177e4 LT |
1528 | * @mtd: MTD device structure |
1529 | * @fsbuf: buffer given by fs driver | |
1530 | * @oobsel: out of band selection structre | |
1531 | * @autoplace: 1 = place given buffer into the oob bytes | |
1532 | * @numpages: number of pages to prepare | |
1533 | * | |
1534 | * Return: | |
1535 | * 1. Filesystem buffer available and autoplacement is off, | |
1536 | * return filesystem buffer | |
1537 | * 2. No filesystem buffer or autoplace is off, return internal | |
1538 | * buffer | |
1539 | * 3. Filesystem buffer is given and autoplace selected | |
1540 | * put data from fs buffer into internal buffer and | |
1541 | * retrun internal buffer | |
1542 | * | |
1543 | * Note: The internal buffer is filled with 0xff. This must | |
1544 | * be done only once, when no autoplacement happens | |
1545 | * Autoplacement sets the buffer dirty flag, which | |
1546 | * forces the 0xff fill before using the buffer again. | |
1547 | * | |
1548 | */ | |
58dd8f2b | 1549 | static uint8_t *nand_prepare_oobbuf(struct mtd_info *mtd, uint8_t *fsbuf, struct nand_oobinfo *oobsel, |
e0c7d767 | 1550 | int autoplace, int numpages) |
1da177e4 LT |
1551 | { |
1552 | struct nand_chip *this = mtd->priv; | |
1553 | int i, len, ofs; | |
1554 | ||
1555 | /* Zero copy fs supplied buffer */ | |
61b03bd7 | 1556 | if (fsbuf && !autoplace) |
1da177e4 LT |
1557 | return fsbuf; |
1558 | ||
1559 | /* Check, if the buffer must be filled with ff again */ | |
61b03bd7 | 1560 | if (this->oobdirty) { |
e0c7d767 | 1561 | memset(this->oob_buf, 0xff, mtd->oobsize << (this->phys_erase_shift - this->page_shift)); |
1da177e4 | 1562 | this->oobdirty = 0; |
61b03bd7 TG |
1563 | } |
1564 | ||
1da177e4 LT |
1565 | /* If we have no autoplacement or no fs buffer use the internal one */ |
1566 | if (!autoplace || !fsbuf) | |
1567 | return this->oob_buf; | |
61b03bd7 | 1568 | |
1da177e4 LT |
1569 | /* Walk through the pages and place the data */ |
1570 | this->oobdirty = 1; | |
1571 | ofs = 0; | |
1572 | while (numpages--) { | |
1573 | for (i = 0, len = 0; len < mtd->oobavail; i++) { | |
1574 | int to = ofs + oobsel->oobfree[i][0]; | |
1575 | int num = oobsel->oobfree[i][1]; | |
e0c7d767 | 1576 | memcpy(&this->oob_buf[to], fsbuf, num); |
1da177e4 LT |
1577 | len += num; |
1578 | fsbuf += num; | |
1579 | } | |
1580 | ofs += mtd->oobavail; | |
1581 | } | |
1582 | return this->oob_buf; | |
1583 | } | |
1584 | ||
28318776 | 1585 | #define NOTALIGNED(x) (x & (mtd->writesize-1)) != 0 |
1da177e4 LT |
1586 | |
1587 | /** | |
1588 | * nand_write - [MTD Interface] compability function for nand_write_ecc | |
1589 | * @mtd: MTD device structure | |
1590 | * @to: offset to write to | |
1591 | * @len: number of bytes to write | |
1592 | * @retlen: pointer to variable to store the number of written bytes | |
1593 | * @buf: the data to write | |
1594 | * | |
1595 | * This function simply calls nand_write_ecc with oob buffer and oobsel = NULL | |
1596 | * | |
1597 | */ | |
58dd8f2b | 1598 | static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const uint8_t *buf) |
1da177e4 | 1599 | { |
e0c7d767 | 1600 | return (nand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL)); |
1da177e4 | 1601 | } |
61b03bd7 | 1602 | |
1da177e4 LT |
1603 | /** |
1604 | * nand_write_ecc - [MTD Interface] NAND write with ECC | |
1605 | * @mtd: MTD device structure | |
1606 | * @to: offset to write to | |
1607 | * @len: number of bytes to write | |
1608 | * @retlen: pointer to variable to store the number of written bytes | |
1609 | * @buf: the data to write | |
1610 | * @eccbuf: filesystem supplied oob data buffer | |
1611 | * @oobsel: oob selection structure | |
1612 | * | |
1613 | * NAND write with ECC | |
1614 | */ | |
e0c7d767 | 1615 | static int nand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len, |
58dd8f2b | 1616 | size_t *retlen, const uint8_t *buf, uint8_t *eccbuf, |
e0c7d767 | 1617 | struct nand_oobinfo *oobsel) |
1da177e4 LT |
1618 | { |
1619 | int startpage, page, ret = -EIO, oob = 0, written = 0, chipnr; | |
1620 | int autoplace = 0, numpages, totalpages; | |
1621 | struct nand_chip *this = mtd->priv; | |
58dd8f2b | 1622 | uint8_t *oobbuf, *bufstart; |
e0c7d767 | 1623 | int ppblock = (1 << (this->phys_erase_shift - this->page_shift)); |
1da177e4 | 1624 | |
e0c7d767 | 1625 | DEBUG(MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int)to, (int)len); |
1da177e4 LT |
1626 | |
1627 | /* Initialize retlen, in case of early exit */ | |
1628 | *retlen = 0; | |
1629 | ||
1630 | /* Do not allow write past end of device */ | |
1631 | if ((to + len) > mtd->size) { | |
e0c7d767 | 1632 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: Attempt to write past end of page\n"); |
1da177e4 LT |
1633 | return -EINVAL; |
1634 | } | |
1635 | ||
61b03bd7 | 1636 | /* reject writes, which are not page aligned */ |
e0c7d767 DW |
1637 | if (NOTALIGNED(to) || NOTALIGNED(len)) { |
1638 | printk(KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n"); | |
1da177e4 LT |
1639 | return -EINVAL; |
1640 | } | |
1641 | ||
1642 | /* Grab the lock and see if the device is available */ | |
e0c7d767 | 1643 | nand_get_device(this, mtd, FL_WRITING); |
1da177e4 LT |
1644 | |
1645 | /* Calculate chipnr */ | |
1646 | chipnr = (int)(to >> this->chip_shift); | |
1647 | /* Select the NAND device */ | |
1648 | this->select_chip(mtd, chipnr); | |
1649 | ||
1650 | /* Check, if it is write protected */ | |
1651 | if (nand_check_wp(mtd)) | |
1652 | goto out; | |
1653 | ||
1654 | /* if oobsel is NULL, use chip defaults */ | |
61b03bd7 TG |
1655 | if (oobsel == NULL) |
1656 | oobsel = &mtd->oobinfo; | |
1657 | ||
1da177e4 LT |
1658 | /* Autoplace of oob data ? Use the default placement scheme */ |
1659 | if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) { | |
1660 | oobsel = this->autooob; | |
1661 | autoplace = 1; | |
61b03bd7 | 1662 | } |
90e260c8 TG |
1663 | if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR) |
1664 | autoplace = 1; | |
1da177e4 LT |
1665 | |
1666 | /* Setup variables and oob buffer */ | |
1667 | totalpages = len >> this->page_shift; | |
e0c7d767 | 1668 | page = (int)(to >> this->page_shift); |
1da177e4 | 1669 | /* Invalidate the page cache, if we write to the cached page */ |
61b03bd7 | 1670 | if (page <= this->pagebuf && this->pagebuf < (page + totalpages)) |
1da177e4 | 1671 | this->pagebuf = -1; |
61b03bd7 | 1672 | |
1da177e4 LT |
1673 | /* Set it relative to chip */ |
1674 | page &= this->pagemask; | |
1675 | startpage = page; | |
1676 | /* Calc number of pages we can write in one go */ | |
e0c7d767 DW |
1677 | numpages = min(ppblock - (startpage & (ppblock - 1)), totalpages); |
1678 | oobbuf = nand_prepare_oobbuf(mtd, eccbuf, oobsel, autoplace, numpages); | |
58dd8f2b | 1679 | bufstart = (uint8_t *) buf; |
1da177e4 LT |
1680 | |
1681 | /* Loop until all data is written */ | |
1682 | while (written < len) { | |
1683 | ||
58dd8f2b | 1684 | this->data_poi = (uint8_t *) &buf[written]; |
1da177e4 LT |
1685 | /* Write one page. If this is the last page to write |
1686 | * or the last page in this block, then use the | |
1687 | * real pageprogram command, else select cached programming | |
1688 | * if supported by the chip. | |
1689 | */ | |
e0c7d767 | 1690 | ret = nand_write_page(mtd, this, page, &oobbuf[oob], oobsel, (--numpages > 0)); |
1da177e4 | 1691 | if (ret) { |
e0c7d767 | 1692 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: write_page failed %d\n", ret); |
1da177e4 | 1693 | goto out; |
61b03bd7 | 1694 | } |
1da177e4 LT |
1695 | /* Next oob page */ |
1696 | oob += mtd->oobsize; | |
1697 | /* Update written bytes count */ | |
28318776 | 1698 | written += mtd->writesize; |
61b03bd7 | 1699 | if (written == len) |
1da177e4 | 1700 | goto cmp; |
61b03bd7 | 1701 | |
1da177e4 LT |
1702 | /* Increment page address */ |
1703 | page++; | |
1704 | ||
1705 | /* Have we hit a block boundary ? Then we have to verify and | |
1706 | * if verify is ok, we have to setup the oob buffer for | |
1707 | * the next pages. | |
e0c7d767 DW |
1708 | */ |
1709 | if (!(page & (ppblock - 1))) { | |
1da177e4 LT |
1710 | int ofs; |
1711 | this->data_poi = bufstart; | |
e0c7d767 DW |
1712 | ret = nand_verify_pages(mtd, this, startpage, page - startpage, |
1713 | oobbuf, oobsel, chipnr, (eccbuf != NULL)); | |
1da177e4 | 1714 | if (ret) { |
e0c7d767 | 1715 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret); |
1da177e4 | 1716 | goto out; |
61b03bd7 | 1717 | } |
1da177e4 LT |
1718 | *retlen = written; |
1719 | ||
1720 | ofs = autoplace ? mtd->oobavail : mtd->oobsize; | |
1721 | if (eccbuf) | |
1722 | eccbuf += (page - startpage) * ofs; | |
1723 | totalpages -= page - startpage; | |
e0c7d767 | 1724 | numpages = min(totalpages, ppblock); |
1da177e4 LT |
1725 | page &= this->pagemask; |
1726 | startpage = page; | |
e0c7d767 | 1727 | oobbuf = nand_prepare_oobbuf(mtd, eccbuf, oobsel, autoplace, numpages); |
868801e5 | 1728 | oob = 0; |
1da177e4 LT |
1729 | /* Check, if we cross a chip boundary */ |
1730 | if (!page) { | |
1731 | chipnr++; | |
1732 | this->select_chip(mtd, -1); | |
1733 | this->select_chip(mtd, chipnr); | |
1734 | } | |
1735 | } | |
1736 | } | |
1737 | /* Verify the remaining pages */ | |
e0c7d767 | 1738 | cmp: |
1da177e4 | 1739 | this->data_poi = bufstart; |
e0c7d767 | 1740 | ret = nand_verify_pages(mtd, this, startpage, totalpages, oobbuf, oobsel, chipnr, (eccbuf != NULL)); |
1da177e4 LT |
1741 | if (!ret) |
1742 | *retlen = written; | |
61b03bd7 | 1743 | else |
e0c7d767 | 1744 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret); |
1da177e4 | 1745 | |
e0c7d767 | 1746 | out: |
1da177e4 LT |
1747 | /* Deselect and wake up anyone waiting on the device */ |
1748 | nand_release_device(mtd); | |
1749 | ||
1750 | return ret; | |
1751 | } | |
1752 | ||
1da177e4 LT |
1753 | /** |
1754 | * nand_write_oob - [MTD Interface] NAND write out-of-band | |
1755 | * @mtd: MTD device structure | |
1756 | * @to: offset to write to | |
1757 | * @len: number of bytes to write | |
1758 | * @retlen: pointer to variable to store the number of written bytes | |
1759 | * @buf: the data to write | |
1760 | * | |
1761 | * NAND write out-of-band | |
1762 | */ | |
58dd8f2b | 1763 | static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const uint8_t *buf) |
1da177e4 LT |
1764 | { |
1765 | int column, page, status, ret = -EIO, chipnr; | |
1766 | struct nand_chip *this = mtd->priv; | |
1767 | ||
e0c7d767 | 1768 | DEBUG(MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int)to, (int)len); |
1da177e4 LT |
1769 | |
1770 | /* Shift to get page */ | |
e0c7d767 DW |
1771 | page = (int)(to >> this->page_shift); |
1772 | chipnr = (int)(to >> this->chip_shift); | |
1da177e4 LT |
1773 | |
1774 | /* Mask to get column */ | |
1775 | column = to & (mtd->oobsize - 1); | |
1776 | ||
1777 | /* Initialize return length value */ | |
1778 | *retlen = 0; | |
1779 | ||
1780 | /* Do not allow write past end of page */ | |
1781 | if ((column + len) > mtd->oobsize) { | |
e0c7d767 | 1782 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n"); |
1da177e4 LT |
1783 | return -EINVAL; |
1784 | } | |
1785 | ||
1786 | /* Grab the lock and see if the device is available */ | |
e0c7d767 | 1787 | nand_get_device(this, mtd, FL_WRITING); |
1da177e4 LT |
1788 | |
1789 | /* Select the NAND device */ | |
1790 | this->select_chip(mtd, chipnr); | |
1791 | ||
1792 | /* Reset the chip. Some chips (like the Toshiba TC5832DC found | |
1793 | in one of my DiskOnChip 2000 test units) will clear the whole | |
1794 | data page too if we don't do this. I have no clue why, but | |
1795 | I seem to have 'fixed' it in the doc2000 driver in | |
1796 | August 1999. dwmw2. */ | |
1797 | this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); | |
1798 | ||
1799 | /* Check, if it is write protected */ | |
1800 | if (nand_check_wp(mtd)) | |
1801 | goto out; | |
61b03bd7 | 1802 | |
1da177e4 LT |
1803 | /* Invalidate the page cache, if we write to the cached page */ |
1804 | if (page == this->pagebuf) | |
1805 | this->pagebuf = -1; | |
1806 | ||
1807 | if (NAND_MUST_PAD(this)) { | |
1808 | /* Write out desired data */ | |
28318776 | 1809 | this->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page & this->pagemask); |
1da177e4 LT |
1810 | /* prepad 0xff for partial programming */ |
1811 | this->write_buf(mtd, ffchars, column); | |
1812 | /* write data */ | |
1813 | this->write_buf(mtd, buf, len); | |
1814 | /* postpad 0xff for partial programming */ | |
e0c7d767 | 1815 | this->write_buf(mtd, ffchars, mtd->oobsize - (len + column)); |
1da177e4 LT |
1816 | } else { |
1817 | /* Write out desired data */ | |
28318776 | 1818 | this->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize + column, page & this->pagemask); |
1da177e4 LT |
1819 | /* write data */ |
1820 | this->write_buf(mtd, buf, len); | |
1821 | } | |
1822 | /* Send command to program the OOB data */ | |
e0c7d767 | 1823 | this->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
1da177e4 | 1824 | |
e0c7d767 | 1825 | status = this->waitfunc(mtd, this, FL_WRITING); |
1da177e4 LT |
1826 | |
1827 | /* See if device thinks it succeeded */ | |
a4ab4c5d | 1828 | if (status & NAND_STATUS_FAIL) { |
e0c7d767 | 1829 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page); |
1da177e4 LT |
1830 | ret = -EIO; |
1831 | goto out; | |
1832 | } | |
1833 | /* Return happy */ | |
1834 | *retlen = len; | |
1835 | ||
1836 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE | |
1837 | /* Send command to read back the data */ | |
e0c7d767 | 1838 | this->cmdfunc(mtd, NAND_CMD_READOOB, column, page & this->pagemask); |
1da177e4 LT |
1839 | |
1840 | if (this->verify_buf(mtd, buf, len)) { | |
e0c7d767 | 1841 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page); |
1da177e4 LT |
1842 | ret = -EIO; |
1843 | goto out; | |
1844 | } | |
1845 | #endif | |
1846 | ret = 0; | |
e0c7d767 | 1847 | out: |
1da177e4 LT |
1848 | /* Deselect and wake up anyone waiting on the device */ |
1849 | nand_release_device(mtd); | |
1850 | ||
1851 | return ret; | |
1852 | } | |
1853 | ||
1da177e4 LT |
1854 | /** |
1855 | * single_erease_cmd - [GENERIC] NAND standard block erase command function | |
1856 | * @mtd: MTD device structure | |
1857 | * @page: the page address of the block which will be erased | |
1858 | * | |
1859 | * Standard erase command for NAND chips | |
1860 | */ | |
e0c7d767 | 1861 | static void single_erase_cmd(struct mtd_info *mtd, int page) |
1da177e4 LT |
1862 | { |
1863 | struct nand_chip *this = mtd->priv; | |
1864 | /* Send commands to erase a block */ | |
e0c7d767 DW |
1865 | this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
1866 | this->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); | |
1da177e4 LT |
1867 | } |
1868 | ||
1869 | /** | |
1870 | * multi_erease_cmd - [GENERIC] AND specific block erase command function | |
1871 | * @mtd: MTD device structure | |
1872 | * @page: the page address of the block which will be erased | |
1873 | * | |
1874 | * AND multi block erase command function | |
1875 | * Erase 4 consecutive blocks | |
1876 | */ | |
e0c7d767 | 1877 | static void multi_erase_cmd(struct mtd_info *mtd, int page) |
1da177e4 LT |
1878 | { |
1879 | struct nand_chip *this = mtd->priv; | |
1880 | /* Send commands to erase a block */ | |
e0c7d767 DW |
1881 | this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
1882 | this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); | |
1883 | this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); | |
1884 | this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); | |
1885 | this->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); | |
1da177e4 LT |
1886 | } |
1887 | ||
1888 | /** | |
1889 | * nand_erase - [MTD Interface] erase block(s) | |
1890 | * @mtd: MTD device structure | |
1891 | * @instr: erase instruction | |
1892 | * | |
1893 | * Erase one ore more blocks | |
1894 | */ | |
e0c7d767 | 1895 | static int nand_erase(struct mtd_info *mtd, struct erase_info *instr) |
1da177e4 | 1896 | { |
e0c7d767 | 1897 | return nand_erase_nand(mtd, instr, 0); |
1da177e4 | 1898 | } |
61b03bd7 | 1899 | |
30f464b7 | 1900 | #define BBT_PAGE_MASK 0xffffff3f |
1da177e4 LT |
1901 | /** |
1902 | * nand_erase_intern - [NAND Interface] erase block(s) | |
1903 | * @mtd: MTD device structure | |
1904 | * @instr: erase instruction | |
1905 | * @allowbbt: allow erasing the bbt area | |
1906 | * | |
1907 | * Erase one ore more blocks | |
1908 | */ | |
e0c7d767 | 1909 | int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, int allowbbt) |
1da177e4 LT |
1910 | { |
1911 | int page, len, status, pages_per_block, ret, chipnr; | |
1912 | struct nand_chip *this = mtd->priv; | |
30f464b7 DM |
1913 | int rewrite_bbt[NAND_MAX_CHIPS]={0}; /* flags to indicate the page, if bbt needs to be rewritten. */ |
1914 | unsigned int bbt_masked_page; /* bbt mask to compare to page being erased. */ | |
1915 | /* It is used to see if the current page is in the same */ | |
1916 | /* 256 block group and the same bank as the bbt. */ | |
1da177e4 | 1917 | |
e0c7d767 | 1918 | DEBUG(MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n", (unsigned int)instr->addr, (unsigned int)instr->len); |
1da177e4 LT |
1919 | |
1920 | /* Start address must align on block boundary */ | |
1921 | if (instr->addr & ((1 << this->phys_erase_shift) - 1)) { | |
e0c7d767 | 1922 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n"); |
1da177e4 LT |
1923 | return -EINVAL; |
1924 | } | |
1925 | ||
1926 | /* Length must align on block boundary */ | |
1927 | if (instr->len & ((1 << this->phys_erase_shift) - 1)) { | |
e0c7d767 | 1928 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n"); |
1da177e4 LT |
1929 | return -EINVAL; |
1930 | } | |
1931 | ||
1932 | /* Do not allow erase past end of device */ | |
1933 | if ((instr->len + instr->addr) > mtd->size) { | |
e0c7d767 | 1934 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n"); |
1da177e4 LT |
1935 | return -EINVAL; |
1936 | } | |
1937 | ||
1938 | instr->fail_addr = 0xffffffff; | |
1939 | ||
1940 | /* Grab the lock and see if the device is available */ | |
e0c7d767 | 1941 | nand_get_device(this, mtd, FL_ERASING); |
1da177e4 LT |
1942 | |
1943 | /* Shift to get first page */ | |
e0c7d767 DW |
1944 | page = (int)(instr->addr >> this->page_shift); |
1945 | chipnr = (int)(instr->addr >> this->chip_shift); | |
1da177e4 LT |
1946 | |
1947 | /* Calculate pages in each block */ | |
1948 | pages_per_block = 1 << (this->phys_erase_shift - this->page_shift); | |
1949 | ||
1950 | /* Select the NAND device */ | |
1951 | this->select_chip(mtd, chipnr); | |
1952 | ||
1953 | /* Check the WP bit */ | |
1954 | /* Check, if it is write protected */ | |
1955 | if (nand_check_wp(mtd)) { | |
e0c7d767 | 1956 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n"); |
1da177e4 LT |
1957 | instr->state = MTD_ERASE_FAILED; |
1958 | goto erase_exit; | |
1959 | } | |
1960 | ||
30f464b7 DM |
1961 | /* if BBT requires refresh, set the BBT page mask to see if the BBT should be rewritten */ |
1962 | if (this->options & BBT_AUTO_REFRESH) { | |
1963 | bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK; | |
1964 | } else { | |
1965 | bbt_masked_page = 0xffffffff; /* should not match anything */ | |
1966 | } | |
1967 | ||
1da177e4 LT |
1968 | /* Loop through the pages */ |
1969 | len = instr->len; | |
1970 | ||
1971 | instr->state = MTD_ERASING; | |
1972 | ||
1973 | while (len) { | |
1974 | /* Check if we have a bad block, we do not erase bad blocks ! */ | |
1975 | if (nand_block_checkbad(mtd, ((loff_t) page) << this->page_shift, 0, allowbbt)) { | |
e0c7d767 | 1976 | printk(KERN_WARNING "nand_erase: attempt to erase a bad block at page 0x%08x\n", page); |
1da177e4 LT |
1977 | instr->state = MTD_ERASE_FAILED; |
1978 | goto erase_exit; | |
1979 | } | |
61b03bd7 TG |
1980 | |
1981 | /* Invalidate the page cache, if we erase the block which contains | |
1da177e4 LT |
1982 | the current cached page */ |
1983 | if (page <= this->pagebuf && this->pagebuf < (page + pages_per_block)) | |
1984 | this->pagebuf = -1; | |
1985 | ||
e0c7d767 | 1986 | this->erase_cmd(mtd, page & this->pagemask); |
61b03bd7 | 1987 | |
e0c7d767 | 1988 | status = this->waitfunc(mtd, this, FL_ERASING); |
1da177e4 | 1989 | |
068e3c0a DM |
1990 | /* See if operation failed and additional status checks are available */ |
1991 | if ((status & NAND_STATUS_FAIL) && (this->errstat)) { | |
1992 | status = this->errstat(mtd, this, FL_ERASING, status, page); | |
1993 | } | |
1994 | ||
1da177e4 | 1995 | /* See if block erase succeeded */ |
a4ab4c5d | 1996 | if (status & NAND_STATUS_FAIL) { |
e0c7d767 | 1997 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page); |
1da177e4 LT |
1998 | instr->state = MTD_ERASE_FAILED; |
1999 | instr->fail_addr = (page << this->page_shift); | |
2000 | goto erase_exit; | |
2001 | } | |
30f464b7 DM |
2002 | |
2003 | /* if BBT requires refresh, set the BBT rewrite flag to the page being erased */ | |
2004 | if (this->options & BBT_AUTO_REFRESH) { | |
61b03bd7 | 2005 | if (((page & BBT_PAGE_MASK) == bbt_masked_page) && |
30f464b7 DM |
2006 | (page != this->bbt_td->pages[chipnr])) { |
2007 | rewrite_bbt[chipnr] = (page << this->page_shift); | |
2008 | } | |
2009 | } | |
61b03bd7 | 2010 | |
1da177e4 LT |
2011 | /* Increment page address and decrement length */ |
2012 | len -= (1 << this->phys_erase_shift); | |
2013 | page += pages_per_block; | |
2014 | ||
2015 | /* Check, if we cross a chip boundary */ | |
2016 | if (len && !(page & this->pagemask)) { | |
2017 | chipnr++; | |
2018 | this->select_chip(mtd, -1); | |
2019 | this->select_chip(mtd, chipnr); | |
30f464b7 | 2020 | |
61b03bd7 | 2021 | /* if BBT requires refresh and BBT-PERCHIP, |
30f464b7 DM |
2022 | * set the BBT page mask to see if this BBT should be rewritten */ |
2023 | if ((this->options & BBT_AUTO_REFRESH) && (this->bbt_td->options & NAND_BBT_PERCHIP)) { | |
2024 | bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK; | |
2025 | } | |
2026 | ||
1da177e4 LT |
2027 | } |
2028 | } | |
2029 | instr->state = MTD_ERASE_DONE; | |
2030 | ||
e0c7d767 | 2031 | erase_exit: |
1da177e4 LT |
2032 | |
2033 | ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; | |
2034 | /* Do call back function */ | |
2035 | if (!ret) | |
2036 | mtd_erase_callback(instr); | |
2037 | ||
2038 | /* Deselect and wake up anyone waiting on the device */ | |
2039 | nand_release_device(mtd); | |
2040 | ||
30f464b7 DM |
2041 | /* if BBT requires refresh and erase was successful, rewrite any selected bad block tables */ |
2042 | if ((this->options & BBT_AUTO_REFRESH) && (!ret)) { | |
2043 | for (chipnr = 0; chipnr < this->numchips; chipnr++) { | |
2044 | if (rewrite_bbt[chipnr]) { | |
2045 | /* update the BBT for chip */ | |
e0c7d767 DW |
2046 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt (%d:0x%0x 0x%0x)\n", |
2047 | chipnr, rewrite_bbt[chipnr], this->bbt_td->pages[chipnr]); | |
2048 | nand_update_bbt(mtd, rewrite_bbt[chipnr]); | |
30f464b7 DM |
2049 | } |
2050 | } | |
2051 | } | |
2052 | ||
1da177e4 LT |
2053 | /* Return more or less happy */ |
2054 | return ret; | |
2055 | } | |
2056 | ||
2057 | /** | |
2058 | * nand_sync - [MTD Interface] sync | |
2059 | * @mtd: MTD device structure | |
2060 | * | |
2061 | * Sync is actually a wait for chip ready function | |
2062 | */ | |
e0c7d767 | 2063 | static void nand_sync(struct mtd_info *mtd) |
1da177e4 LT |
2064 | { |
2065 | struct nand_chip *this = mtd->priv; | |
2066 | ||
e0c7d767 | 2067 | DEBUG(MTD_DEBUG_LEVEL3, "nand_sync: called\n"); |
1da177e4 LT |
2068 | |
2069 | /* Grab the lock and see if the device is available */ | |
e0c7d767 | 2070 | nand_get_device(this, mtd, FL_SYNCING); |
1da177e4 | 2071 | /* Release it and go back */ |
e0c7d767 | 2072 | nand_release_device(mtd); |
1da177e4 LT |
2073 | } |
2074 | ||
1da177e4 LT |
2075 | /** |
2076 | * nand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad | |
2077 | * @mtd: MTD device structure | |
2078 | * @ofs: offset relative to mtd start | |
2079 | */ | |
e0c7d767 | 2080 | static int nand_block_isbad(struct mtd_info *mtd, loff_t ofs) |
1da177e4 LT |
2081 | { |
2082 | /* Check for invalid offset */ | |
61b03bd7 | 2083 | if (ofs > mtd->size) |
1da177e4 | 2084 | return -EINVAL; |
61b03bd7 | 2085 | |
e0c7d767 | 2086 | return nand_block_checkbad(mtd, ofs, 1, 0); |
1da177e4 LT |
2087 | } |
2088 | ||
2089 | /** | |
2090 | * nand_block_markbad - [MTD Interface] Mark the block at the given offset as bad | |
2091 | * @mtd: MTD device structure | |
2092 | * @ofs: offset relative to mtd start | |
2093 | */ | |
e0c7d767 | 2094 | static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs) |
1da177e4 LT |
2095 | { |
2096 | struct nand_chip *this = mtd->priv; | |
2097 | int ret; | |
2098 | ||
e0c7d767 DW |
2099 | if ((ret = nand_block_isbad(mtd, ofs))) { |
2100 | /* If it was bad already, return success and do nothing. */ | |
1da177e4 LT |
2101 | if (ret > 0) |
2102 | return 0; | |
e0c7d767 DW |
2103 | return ret; |
2104 | } | |
1da177e4 LT |
2105 | |
2106 | return this->block_markbad(mtd, ofs); | |
2107 | } | |
2108 | ||
962034f4 VW |
2109 | /** |
2110 | * nand_suspend - [MTD Interface] Suspend the NAND flash | |
2111 | * @mtd: MTD device structure | |
2112 | */ | |
2113 | static int nand_suspend(struct mtd_info *mtd) | |
2114 | { | |
2115 | struct nand_chip *this = mtd->priv; | |
2116 | ||
e0c7d767 | 2117 | return nand_get_device(this, mtd, FL_PM_SUSPENDED); |
962034f4 VW |
2118 | } |
2119 | ||
2120 | /** | |
2121 | * nand_resume - [MTD Interface] Resume the NAND flash | |
2122 | * @mtd: MTD device structure | |
2123 | */ | |
2124 | static void nand_resume(struct mtd_info *mtd) | |
2125 | { | |
2126 | struct nand_chip *this = mtd->priv; | |
2127 | ||
2128 | if (this->state == FL_PM_SUSPENDED) | |
2129 | nand_release_device(mtd); | |
2130 | else | |
2c0a2bed TG |
2131 | printk(KERN_ERR "nand_resume() called for a chip which is not " |
2132 | "in suspended state\n"); | |
962034f4 VW |
2133 | } |
2134 | ||
a36ed299 TG |
2135 | /* |
2136 | * Free allocated data structures | |
2137 | */ | |
2138 | static void nand_free_kmem(struct nand_chip *this) | |
2139 | { | |
2140 | /* Buffer allocated by nand_scan ? */ | |
2141 | if (this->options & NAND_OOBBUF_ALLOC) | |
2142 | kfree(this->oob_buf); | |
2143 | /* Buffer allocated by nand_scan ? */ | |
2144 | if (this->options & NAND_DATABUF_ALLOC) | |
2145 | kfree(this->data_buf); | |
2146 | /* Controller allocated by nand_scan ? */ | |
2147 | if (this->options & NAND_CONTROLLER_ALLOC) | |
2148 | kfree(this->controller); | |
2149 | } | |
2150 | ||
7aa65bfd TG |
2151 | /* |
2152 | * Allocate buffers and data structures | |
1da177e4 | 2153 | */ |
7aa65bfd | 2154 | static int nand_allocate_kmem(struct mtd_info *mtd, struct nand_chip *this) |
1da177e4 | 2155 | { |
7aa65bfd | 2156 | size_t len; |
1da177e4 | 2157 | |
7aa65bfd TG |
2158 | if (!this->oob_buf) { |
2159 | len = mtd->oobsize << | |
2160 | (this->phys_erase_shift - this->page_shift); | |
2161 | this->oob_buf = kmalloc(len, GFP_KERNEL); | |
2162 | if (!this->oob_buf) | |
2163 | goto outerr; | |
2164 | this->options |= NAND_OOBBUF_ALLOC; | |
552d9205 DW |
2165 | } |
2166 | ||
7aa65bfd | 2167 | if (!this->data_buf) { |
4cbb9b80 | 2168 | len = mtd->writesize + mtd->oobsize; |
7aa65bfd TG |
2169 | this->data_buf = kmalloc(len, GFP_KERNEL); |
2170 | if (!this->data_buf) | |
2171 | goto outerr; | |
2172 | this->options |= NAND_DATABUF_ALLOC; | |
2173 | } | |
2174 | ||
2175 | if (!this->controller) { | |
2176 | this->controller = kzalloc(sizeof(struct nand_hw_control), | |
2177 | GFP_KERNEL); | |
2178 | if (!this->controller) | |
2179 | goto outerr; | |
2180 | this->options |= NAND_CONTROLLER_ALLOC; | |
2181 | } | |
2182 | return 0; | |
1da177e4 | 2183 | |
7aa65bfd TG |
2184 | outerr: |
2185 | printk(KERN_ERR "nand_scan(): Cannot allocate buffers\n"); | |
2186 | nand_free_kmem(this); | |
2187 | return -ENOMEM; | |
2188 | } | |
2189 | ||
2190 | /* | |
2191 | * Set default functions | |
2192 | */ | |
2193 | static void nand_set_defaults(struct nand_chip *this, int busw) | |
2194 | { | |
1da177e4 LT |
2195 | /* check for proper chip_delay setup, set 20us if not */ |
2196 | if (!this->chip_delay) | |
2197 | this->chip_delay = 20; | |
2198 | ||
2199 | /* check, if a user supplied command function given */ | |
2200 | if (this->cmdfunc == NULL) | |
2201 | this->cmdfunc = nand_command; | |
2202 | ||
2203 | /* check, if a user supplied wait function given */ | |
2204 | if (this->waitfunc == NULL) | |
2205 | this->waitfunc = nand_wait; | |
2206 | ||
2207 | if (!this->select_chip) | |
2208 | this->select_chip = nand_select_chip; | |
2209 | if (!this->write_byte) | |
2210 | this->write_byte = busw ? nand_write_byte16 : nand_write_byte; | |
2211 | if (!this->read_byte) | |
2212 | this->read_byte = busw ? nand_read_byte16 : nand_read_byte; | |
2213 | if (!this->write_word) | |
2214 | this->write_word = nand_write_word; | |
2215 | if (!this->read_word) | |
2216 | this->read_word = nand_read_word; | |
2217 | if (!this->block_bad) | |
2218 | this->block_bad = nand_block_bad; | |
2219 | if (!this->block_markbad) | |
2220 | this->block_markbad = nand_default_block_markbad; | |
2221 | if (!this->write_buf) | |
2222 | this->write_buf = busw ? nand_write_buf16 : nand_write_buf; | |
2223 | if (!this->read_buf) | |
2224 | this->read_buf = busw ? nand_read_buf16 : nand_read_buf; | |
2225 | if (!this->verify_buf) | |
2226 | this->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf; | |
2227 | if (!this->scan_bbt) | |
2228 | this->scan_bbt = nand_default_bbt; | |
7aa65bfd TG |
2229 | } |
2230 | ||
2231 | /* | |
2232 | * Get the flash and manufacturer id and lookup if the typ is supported | |
2233 | */ | |
2234 | static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, | |
2235 | struct nand_chip *this, | |
2236 | int busw, int *maf_id) | |
2237 | { | |
2238 | struct nand_flash_dev *type = NULL; | |
2239 | int i, dev_id, maf_idx; | |
1da177e4 LT |
2240 | |
2241 | /* Select the device */ | |
2242 | this->select_chip(mtd, 0); | |
2243 | ||
2244 | /* Send the command for reading device ID */ | |
e0c7d767 | 2245 | this->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
1da177e4 LT |
2246 | |
2247 | /* Read manufacturer and device IDs */ | |
7aa65bfd TG |
2248 | *maf_id = this->read_byte(mtd); |
2249 | dev_id = this->read_byte(mtd); | |
1da177e4 | 2250 | |
7aa65bfd | 2251 | /* Lookup the flash id */ |
1da177e4 | 2252 | for (i = 0; nand_flash_ids[i].name != NULL; i++) { |
7aa65bfd TG |
2253 | if (dev_id == nand_flash_ids[i].id) { |
2254 | type = &nand_flash_ids[i]; | |
2255 | break; | |
2256 | } | |
2257 | } | |
61b03bd7 | 2258 | |
7aa65bfd TG |
2259 | if (!type) |
2260 | return ERR_PTR(-ENODEV); | |
2261 | ||
2262 | this->chipsize = nand_flash_ids[i].chipsize << 20; | |
2263 | ||
2264 | /* Newer devices have all the information in additional id bytes */ | |
2265 | if (!nand_flash_ids[i].pagesize) { | |
2266 | int extid; | |
2267 | /* The 3rd id byte contains non relevant data ATM */ | |
2268 | extid = this->read_byte(mtd); | |
2269 | /* The 4th id byte is the important one */ | |
2270 | extid = this->read_byte(mtd); | |
2271 | /* Calc pagesize */ | |
4cbb9b80 | 2272 | mtd->writesize = 1024 << (extid & 0x3); |
7aa65bfd TG |
2273 | extid >>= 2; |
2274 | /* Calc oobsize */ | |
4cbb9b80 | 2275 | mtd->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9); |
7aa65bfd TG |
2276 | extid >>= 2; |
2277 | /* Calc blocksize. Blocksize is multiples of 64KiB */ | |
2278 | mtd->erasesize = (64 * 1024) << (extid & 0x03); | |
2279 | extid >>= 2; | |
2280 | /* Get buswidth information */ | |
2281 | busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; | |
61b03bd7 | 2282 | |
7aa65bfd TG |
2283 | } else { |
2284 | /* | |
2285 | * Old devices have this data hardcoded in the device id table | |
2286 | */ | |
2287 | mtd->erasesize = nand_flash_ids[i].erasesize; | |
4cbb9b80 TG |
2288 | mtd->writesize = nand_flash_ids[i].pagesize; |
2289 | mtd->oobsize = mtd->writesize / 32; | |
7aa65bfd TG |
2290 | busw = nand_flash_ids[i].options & NAND_BUSWIDTH_16; |
2291 | } | |
1da177e4 | 2292 | |
7aa65bfd TG |
2293 | /* Try to identify manufacturer */ |
2294 | for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_id++) { | |
2295 | if (nand_manuf_ids[maf_idx].id == *maf_id) | |
2296 | break; | |
2297 | } | |
0ea4a755 | 2298 | |
7aa65bfd TG |
2299 | /* |
2300 | * Check, if buswidth is correct. Hardware drivers should set | |
2301 | * this correct ! | |
2302 | */ | |
2303 | if (busw != (this->options & NAND_BUSWIDTH_16)) { | |
2304 | printk(KERN_INFO "NAND device: Manufacturer ID:" | |
2305 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, | |
2306 | dev_id, nand_manuf_ids[maf_idx].name, mtd->name); | |
2307 | printk(KERN_WARNING "NAND bus width %d instead %d bit\n", | |
2308 | (this->options & NAND_BUSWIDTH_16) ? 16 : 8, | |
2309 | busw ? 16 : 8); | |
2310 | return ERR_PTR(-EINVAL); | |
2311 | } | |
61b03bd7 | 2312 | |
7aa65bfd | 2313 | /* Calculate the address shift from the page size */ |
4cbb9b80 | 2314 | this->page_shift = ffs(mtd->writesize) - 1; |
7aa65bfd TG |
2315 | /* Convert chipsize to number of pages per chip -1. */ |
2316 | this->pagemask = (this->chipsize >> this->page_shift) - 1; | |
61b03bd7 | 2317 | |
7aa65bfd TG |
2318 | this->bbt_erase_shift = this->phys_erase_shift = |
2319 | ffs(mtd->erasesize) - 1; | |
2320 | this->chip_shift = ffs(this->chipsize) - 1; | |
1da177e4 | 2321 | |
7aa65bfd | 2322 | /* Set the bad block position */ |
4cbb9b80 | 2323 | this->badblockpos = mtd->writesize > 512 ? |
7aa65bfd | 2324 | NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS; |
61b03bd7 | 2325 | |
7aa65bfd TG |
2326 | /* Get chip options, preserve non chip based options */ |
2327 | this->options &= ~NAND_CHIPOPTIONS_MSK; | |
2328 | this->options |= nand_flash_ids[i].options & NAND_CHIPOPTIONS_MSK; | |
2329 | ||
2330 | /* | |
2331 | * Set this as a default. Board drivers can override it, if necessary | |
2332 | */ | |
2333 | this->options |= NAND_NO_AUTOINCR; | |
2334 | ||
2335 | /* Check if this is a not a samsung device. Do not clear the | |
2336 | * options for chips which are not having an extended id. | |
2337 | */ | |
2338 | if (*maf_id != NAND_MFR_SAMSUNG && !nand_flash_ids[i].pagesize) | |
2339 | this->options &= ~NAND_SAMSUNG_LP_OPTIONS; | |
2340 | ||
2341 | /* Check for AND chips with 4 page planes */ | |
2342 | if (this->options & NAND_4PAGE_ARRAY) | |
2343 | this->erase_cmd = multi_erase_cmd; | |
2344 | else | |
2345 | this->erase_cmd = single_erase_cmd; | |
2346 | ||
2347 | /* Do not replace user supplied command function ! */ | |
4cbb9b80 | 2348 | if (mtd->writesize > 512 && this->cmdfunc == nand_command) |
7aa65bfd TG |
2349 | this->cmdfunc = nand_command_lp; |
2350 | ||
2351 | printk(KERN_INFO "NAND device: Manufacturer ID:" | |
2352 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, dev_id, | |
2353 | nand_manuf_ids[maf_idx].name, type->name); | |
2354 | ||
2355 | return type; | |
2356 | } | |
2357 | ||
2358 | /* module_text_address() isn't exported, and it's mostly a pointless | |
2359 | test if this is a module _anyway_ -- they'd have to try _really_ hard | |
2360 | to call us from in-kernel code if the core NAND support is modular. */ | |
2361 | #ifdef MODULE | |
2362 | #define caller_is_module() (1) | |
2363 | #else | |
2364 | #define caller_is_module() \ | |
2365 | module_text_address((unsigned long)__builtin_return_address(0)) | |
2366 | #endif | |
2367 | ||
2368 | /** | |
2369 | * nand_scan - [NAND Interface] Scan for the NAND device | |
2370 | * @mtd: MTD device structure | |
2371 | * @maxchips: Number of chips to scan for | |
2372 | * | |
2373 | * This fills out all the uninitialized function pointers | |
2374 | * with the defaults. | |
2375 | * The flash ID is read and the mtd/chip structures are | |
2376 | * filled with the appropriate values. Buffers are allocated if | |
2377 | * they are not provided by the board driver | |
2378 | * The mtd->owner field must be set to the module of the caller | |
2379 | * | |
2380 | */ | |
2381 | int nand_scan(struct mtd_info *mtd, int maxchips) | |
2382 | { | |
2383 | int i, busw, nand_maf_id; | |
2384 | struct nand_chip *this = mtd->priv; | |
2385 | struct nand_flash_dev *type; | |
2386 | ||
2387 | /* Many callers got this wrong, so check for it for a while... */ | |
2388 | if (!mtd->owner && caller_is_module()) { | |
2389 | printk(KERN_CRIT "nand_scan() called with NULL mtd->owner!\n"); | |
2390 | BUG(); | |
1da177e4 LT |
2391 | } |
2392 | ||
7aa65bfd TG |
2393 | /* Get buswidth to select the correct functions */ |
2394 | busw = this->options & NAND_BUSWIDTH_16; | |
2395 | /* Set the default functions */ | |
2396 | nand_set_defaults(this, busw); | |
2397 | ||
2398 | /* Read the flash type */ | |
2399 | type = nand_get_flash_type(mtd, this, busw, &nand_maf_id); | |
2400 | ||
2401 | if (IS_ERR(type)) { | |
e0c7d767 | 2402 | printk(KERN_WARNING "No NAND device found!!!\n"); |
1da177e4 | 2403 | this->select_chip(mtd, -1); |
7aa65bfd | 2404 | return PTR_ERR(type); |
1da177e4 LT |
2405 | } |
2406 | ||
7aa65bfd | 2407 | /* Check for a chip array */ |
e0c7d767 | 2408 | for (i = 1; i < maxchips; i++) { |
1da177e4 | 2409 | this->select_chip(mtd, i); |
1da177e4 | 2410 | /* Send the command for reading device ID */ |
e0c7d767 | 2411 | this->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
1da177e4 LT |
2412 | /* Read manufacturer and device IDs */ |
2413 | if (nand_maf_id != this->read_byte(mtd) || | |
7aa65bfd | 2414 | type->id != this->read_byte(mtd)) |
1da177e4 LT |
2415 | break; |
2416 | } | |
2417 | if (i > 1) | |
2418 | printk(KERN_INFO "%d NAND chips detected\n", i); | |
61b03bd7 | 2419 | |
1da177e4 LT |
2420 | /* Store the number of chips and calc total size for mtd */ |
2421 | this->numchips = i; | |
2422 | mtd->size = i * this->chipsize; | |
7aa65bfd TG |
2423 | |
2424 | /* Allocate buffers and data structures */ | |
2425 | if (nand_allocate_kmem(mtd, this)) | |
2426 | return -ENOMEM; | |
2427 | ||
1da177e4 | 2428 | /* Preset the internal oob buffer */ |
7aa65bfd TG |
2429 | memset(this->oob_buf, 0xff, |
2430 | mtd->oobsize << (this->phys_erase_shift - this->page_shift)); | |
1da177e4 | 2431 | |
7aa65bfd TG |
2432 | /* |
2433 | * If no default placement scheme is given, select an appropriate one | |
2434 | */ | |
1da177e4 | 2435 | if (!this->autooob) { |
61b03bd7 | 2436 | switch (mtd->oobsize) { |
1da177e4 LT |
2437 | case 8: |
2438 | this->autooob = &nand_oob_8; | |
2439 | break; | |
2440 | case 16: | |
2441 | this->autooob = &nand_oob_16; | |
2442 | break; | |
2443 | case 64: | |
2444 | this->autooob = &nand_oob_64; | |
2445 | break; | |
2446 | default: | |
7aa65bfd TG |
2447 | printk(KERN_WARNING "No oob scheme defined for " |
2448 | "oobsize %d\n", mtd->oobsize); | |
1da177e4 LT |
2449 | BUG(); |
2450 | } | |
2451 | } | |
61b03bd7 | 2452 | |
7aa65bfd TG |
2453 | /* |
2454 | * The number of bytes available for the filesystem to place fs | |
2455 | * dependend oob data | |
2456 | */ | |
998cf640 TG |
2457 | mtd->oobavail = 0; |
2458 | for (i = 0; this->autooob->oobfree[i][1]; i++) | |
2459 | mtd->oobavail += this->autooob->oobfree[i][1]; | |
1da177e4 | 2460 | |
61b03bd7 | 2461 | /* |
7aa65bfd TG |
2462 | * check ECC mode, default to software if 3byte/512byte hardware ECC is |
2463 | * selected and we have 256 byte pagesize fallback to software ECC | |
e0c7d767 | 2464 | */ |
6dfc6d25 TG |
2465 | switch (this->ecc.mode) { |
2466 | case NAND_ECC_HW: | |
2467 | case NAND_ECC_HW_SYNDROME: | |
2468 | if (!this->ecc.calculate || !this->ecc.correct || | |
2469 | !this->ecc.hwctl) { | |
2470 | printk(KERN_WARNING "No ECC functions supplied, " | |
2471 | "Hardware ECC not possible\n"); | |
2472 | BUG(); | |
2473 | } | |
4cbb9b80 | 2474 | if (mtd->writesize >= this->ecc.size) |
6dfc6d25 TG |
2475 | break; |
2476 | printk(KERN_WARNING "%d byte HW ECC not possible on " | |
2477 | "%d byte page size, fallback to SW ECC\n", | |
4cbb9b80 | 2478 | this->ecc.size, mtd->writesize); |
6dfc6d25 | 2479 | this->ecc.mode = NAND_ECC_SOFT; |
61b03bd7 | 2480 | |
6dfc6d25 TG |
2481 | case NAND_ECC_SOFT: |
2482 | this->ecc.calculate = nand_calculate_ecc; | |
2483 | this->ecc.correct = nand_correct_data; | |
2484 | this->ecc.size = 256; | |
2485 | this->ecc.bytes = 3; | |
1da177e4 | 2486 | break; |
61b03bd7 TG |
2487 | |
2488 | case NAND_ECC_NONE: | |
7aa65bfd TG |
2489 | printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. " |
2490 | "This is not recommended !!\n"); | |
4cbb9b80 | 2491 | this->ecc.size = mtd->writesize; |
6dfc6d25 | 2492 | this->ecc.bytes = 0; |
1da177e4 | 2493 | break; |
1da177e4 | 2494 | default: |
7aa65bfd | 2495 | printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n", |
6dfc6d25 | 2496 | this->ecc.mode); |
61b03bd7 | 2497 | BUG(); |
1da177e4 | 2498 | } |
61b03bd7 | 2499 | |
7aa65bfd TG |
2500 | /* |
2501 | * Set the number of read / write steps for one page depending on ECC | |
2502 | * mode | |
2503 | */ | |
4cbb9b80 TG |
2504 | this->ecc.steps = mtd->writesize / this->ecc.size; |
2505 | if(this->ecc.steps * this->ecc.size != mtd->writesize) { | |
6dfc6d25 TG |
2506 | printk(KERN_WARNING "Invalid ecc parameters\n"); |
2507 | BUG(); | |
1da177e4 | 2508 | } |
61b03bd7 | 2509 | |
1da177e4 LT |
2510 | /* Initialize state, waitqueue and spinlock */ |
2511 | this->state = FL_READY; | |
a36ed299 TG |
2512 | init_waitqueue_head(&this->controller->wq); |
2513 | spin_lock_init(&this->controller->lock); | |
1da177e4 LT |
2514 | |
2515 | /* De-select the device */ | |
2516 | this->select_chip(mtd, -1); | |
2517 | ||
2518 | /* Invalidate the pagebuffer reference */ | |
2519 | this->pagebuf = -1; | |
2520 | ||
2521 | /* Fill in remaining MTD driver data */ | |
2522 | mtd->type = MTD_NANDFLASH; | |
5fa43394 | 2523 | mtd->flags = MTD_CAP_NANDFLASH; |
1da177e4 LT |
2524 | mtd->ecctype = MTD_ECC_SW; |
2525 | mtd->erase = nand_erase; | |
2526 | mtd->point = NULL; | |
2527 | mtd->unpoint = NULL; | |
2528 | mtd->read = nand_read; | |
2529 | mtd->write = nand_write; | |
2530 | mtd->read_ecc = nand_read_ecc; | |
2531 | mtd->write_ecc = nand_write_ecc; | |
2532 | mtd->read_oob = nand_read_oob; | |
2533 | mtd->write_oob = nand_write_oob; | |
2534 | mtd->readv = NULL; | |
1da177e4 LT |
2535 | mtd->sync = nand_sync; |
2536 | mtd->lock = NULL; | |
2537 | mtd->unlock = NULL; | |
962034f4 VW |
2538 | mtd->suspend = nand_suspend; |
2539 | mtd->resume = nand_resume; | |
1da177e4 LT |
2540 | mtd->block_isbad = nand_block_isbad; |
2541 | mtd->block_markbad = nand_block_markbad; | |
2542 | ||
2543 | /* and make the autooob the default one */ | |
2544 | memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo)); | |
2545 | ||
0040bf38 TG |
2546 | /* Check, if we should skip the bad block table scan */ |
2547 | if (this->options & NAND_SKIP_BBTSCAN) | |
2548 | return 0; | |
1da177e4 LT |
2549 | |
2550 | /* Build bad block table */ | |
e0c7d767 | 2551 | return this->scan_bbt(mtd); |
1da177e4 LT |
2552 | } |
2553 | ||
2554 | /** | |
61b03bd7 | 2555 | * nand_release - [NAND Interface] Free resources held by the NAND device |
1da177e4 LT |
2556 | * @mtd: MTD device structure |
2557 | */ | |
e0c7d767 | 2558 | void nand_release(struct mtd_info *mtd) |
1da177e4 LT |
2559 | { |
2560 | struct nand_chip *this = mtd->priv; | |
2561 | ||
2562 | #ifdef CONFIG_MTD_PARTITIONS | |
2563 | /* Deregister partitions */ | |
e0c7d767 | 2564 | del_mtd_partitions(mtd); |
1da177e4 LT |
2565 | #endif |
2566 | /* Deregister the device */ | |
e0c7d767 | 2567 | del_mtd_device(mtd); |
1da177e4 | 2568 | |
fa671646 | 2569 | /* Free bad block table memory */ |
e0c7d767 | 2570 | kfree(this->bbt); |
a36ed299 TG |
2571 | /* Free buffers */ |
2572 | nand_free_kmem(this); | |
1da177e4 LT |
2573 | } |
2574 | ||
e0c7d767 DW |
2575 | EXPORT_SYMBOL_GPL(nand_scan); |
2576 | EXPORT_SYMBOL_GPL(nand_release); | |
8fe833c1 RP |
2577 | |
2578 | static int __init nand_base_init(void) | |
2579 | { | |
2580 | led_trigger_register_simple("nand-disk", &nand_led_trigger); | |
2581 | return 0; | |
2582 | } | |
2583 | ||
2584 | static void __exit nand_base_exit(void) | |
2585 | { | |
2586 | led_trigger_unregister_simple(nand_led_trigger); | |
2587 | } | |
2588 | ||
2589 | module_init(nand_base_init); | |
2590 | module_exit(nand_base_exit); | |
2591 | ||
e0c7d767 DW |
2592 | MODULE_LICENSE("GPL"); |
2593 | MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>"); | |
2594 | MODULE_DESCRIPTION("Generic NAND flash driver code"); |