Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * drivers/mtd/nand.c | |
3 | * | |
4 | * Overview: | |
5 | * This is the generic MTD driver for NAND flash devices. It should be | |
6 | * capable of working with almost all NAND chips currently available. | |
7 | * Basic support for AG-AND chips is provided. | |
61b03bd7 | 8 | * |
1da177e4 LT |
9 | * Additional technical information is available on |
10 | * http://www.linux-mtd.infradead.org/tech/nand.html | |
61b03bd7 | 11 | * |
1da177e4 LT |
12 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) |
13 | * 2002 Thomas Gleixner (tglx@linutronix.de) | |
14 | * | |
61b03bd7 | 15 | * 02-08-2004 tglx: support for strange chips, which cannot auto increment |
1da177e4 LT |
16 | * pages on read / read_oob |
17 | * | |
18 | * 03-17-2004 tglx: Check ready before auto increment check. Simon Bayes | |
19 | * pointed this out, as he marked an auto increment capable chip | |
20 | * as NOAUTOINCR in the board driver. | |
21 | * Make reads over block boundaries work too | |
22 | * | |
23 | * 04-14-2004 tglx: first working version for 2k page size chips | |
61b03bd7 | 24 | * |
1da177e4 LT |
25 | * 05-19-2004 tglx: Basic support for Renesas AG-AND chips |
26 | * | |
27 | * 09-24-2004 tglx: add support for hardware controllers (e.g. ECC) shared | |
28 | * among multiple independend devices. Suggestions and initial patch | |
29 | * from Ben Dooks <ben-mtd@fluff.org> | |
30 | * | |
30f464b7 DM |
31 | * 12-05-2004 dmarlin: add workaround for Renesas AG-AND chips "disturb" issue. |
32 | * Basically, any block not rewritten may lose data when surrounding blocks | |
61b03bd7 | 33 | * are rewritten many times. JFFS2 ensures this doesn't happen for blocks |
30f464b7 DM |
34 | * it uses, but the Bad Block Table(s) may not be rewritten. To ensure they |
35 | * do not lose data, force them to be rewritten when some of the surrounding | |
61b03bd7 TG |
36 | * blocks are erased. Rather than tracking a specific nearby block (which |
37 | * could itself go bad), use a page address 'mask' to select several blocks | |
30f464b7 DM |
38 | * in the same area, and rewrite the BBT when any of them are erased. |
39 | * | |
61b03bd7 | 40 | * 01-03-2005 dmarlin: added support for the device recovery command sequence for Renesas |
30f464b7 DM |
41 | * AG-AND chips. If there was a sudden loss of power during an erase operation, |
42 | * a "device recovery" operation must be performed when power is restored | |
43 | * to ensure correct operation. | |
44 | * | |
61b03bd7 | 45 | * 01-20-2005 dmarlin: added support for optional hardware specific callback routine to |
068e3c0a DM |
46 | * perform extra error status checks on erase and write failures. This required |
47 | * adding a wrapper function for nand_read_ecc. | |
48 | * | |
962034f4 VW |
49 | * 08-20-2005 vwool: suspend/resume added |
50 | * | |
1da177e4 | 51 | * Credits: |
61b03bd7 TG |
52 | * David Woodhouse for adding multichip support |
53 | * | |
1da177e4 LT |
54 | * Aleph One Ltd. and Toby Churchill Ltd. for supporting the |
55 | * rework for 2K page size chips | |
56 | * | |
57 | * TODO: | |
58 | * Enable cached programming for 2k page size chips | |
59 | * Check, if mtd->ecctype should be set to MTD_ECC_HW | |
60 | * if we have HW ecc support. | |
61 | * The AG-AND chips have nice features for speed improvement, | |
62 | * which are not supported yet. Read / program 4 pages in one go. | |
63 | * | |
962034f4 | 64 | * $Id: nand_base.c,v 1.150 2005/09/15 13:58:48 vwool Exp $ |
1da177e4 LT |
65 | * |
66 | * This program is free software; you can redistribute it and/or modify | |
67 | * it under the terms of the GNU General Public License version 2 as | |
68 | * published by the Free Software Foundation. | |
69 | * | |
70 | */ | |
71 | ||
72 | #include <linux/delay.h> | |
73 | #include <linux/errno.h> | |
74 | #include <linux/sched.h> | |
75 | #include <linux/slab.h> | |
76 | #include <linux/types.h> | |
77 | #include <linux/mtd/mtd.h> | |
78 | #include <linux/mtd/nand.h> | |
79 | #include <linux/mtd/nand_ecc.h> | |
80 | #include <linux/mtd/compatmac.h> | |
81 | #include <linux/interrupt.h> | |
82 | #include <linux/bitops.h> | |
8fe833c1 | 83 | #include <linux/leds.h> |
1da177e4 LT |
84 | #include <asm/io.h> |
85 | ||
86 | #ifdef CONFIG_MTD_PARTITIONS | |
87 | #include <linux/mtd/partitions.h> | |
88 | #endif | |
89 | ||
90 | /* Define default oob placement schemes for large and small page devices */ | |
91 | static struct nand_oobinfo nand_oob_8 = { | |
92 | .useecc = MTD_NANDECC_AUTOPLACE, | |
93 | .eccbytes = 3, | |
94 | .eccpos = {0, 1, 2}, | |
e0c7d767 | 95 | .oobfree = {{3, 2}, {6, 2}} |
1da177e4 LT |
96 | }; |
97 | ||
98 | static struct nand_oobinfo nand_oob_16 = { | |
99 | .useecc = MTD_NANDECC_AUTOPLACE, | |
100 | .eccbytes = 6, | |
101 | .eccpos = {0, 1, 2, 3, 6, 7}, | |
e0c7d767 | 102 | .oobfree = {{8, 8}} |
1da177e4 LT |
103 | }; |
104 | ||
105 | static struct nand_oobinfo nand_oob_64 = { | |
106 | .useecc = MTD_NANDECC_AUTOPLACE, | |
107 | .eccbytes = 24, | |
108 | .eccpos = { | |
e0c7d767 DW |
109 | 40, 41, 42, 43, 44, 45, 46, 47, |
110 | 48, 49, 50, 51, 52, 53, 54, 55, | |
111 | 56, 57, 58, 59, 60, 61, 62, 63}, | |
112 | .oobfree = {{2, 38}} | |
1da177e4 LT |
113 | }; |
114 | ||
115 | /* This is used for padding purposes in nand_write_oob */ | |
116 | static u_char ffchars[] = { | |
117 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
118 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
119 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
120 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
121 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
122 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
123 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
124 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
125 | }; | |
126 | ||
127 | /* | |
128 | * NAND low-level MTD interface functions | |
129 | */ | |
130 | static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len); | |
131 | static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len); | |
132 | static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len); | |
133 | ||
e0c7d767 DW |
134 | static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf); |
135 | static int nand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, | |
136 | size_t *retlen, u_char *buf, u_char *eccbuf, struct nand_oobinfo *oobsel); | |
137 | static int nand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf); | |
138 | static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf); | |
139 | static int nand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len, | |
140 | size_t *retlen, const u_char *buf, u_char *eccbuf, struct nand_oobinfo *oobsel); | |
141 | static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf); | |
142 | static int nand_writev(struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to, size_t *retlen); | |
143 | static int nand_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs, | |
144 | unsigned long count, loff_t to, size_t *retlen, u_char *eccbuf, | |
145 | struct nand_oobinfo *oobsel); | |
146 | static int nand_erase(struct mtd_info *mtd, struct erase_info *instr); | |
147 | static void nand_sync(struct mtd_info *mtd); | |
1da177e4 LT |
148 | |
149 | /* Some internal functions */ | |
e0c7d767 DW |
150 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, int page, u_char * oob_buf, |
151 | struct nand_oobinfo *oobsel, int mode); | |
1da177e4 | 152 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE |
e0c7d767 DW |
153 | static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *this, int page, int numpages, |
154 | u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode); | |
1da177e4 LT |
155 | #else |
156 | #define nand_verify_pages(...) (0) | |
157 | #endif | |
61b03bd7 | 158 | |
e0c7d767 | 159 | static int nand_get_device(struct nand_chip *this, struct mtd_info *mtd, int new_state); |
1da177e4 LT |
160 | |
161 | /** | |
162 | * nand_release_device - [GENERIC] release chip | |
163 | * @mtd: MTD device structure | |
61b03bd7 TG |
164 | * |
165 | * Deselect, release chip lock and wake up anyone waiting on the device | |
1da177e4 | 166 | */ |
e0c7d767 | 167 | static void nand_release_device(struct mtd_info *mtd) |
1da177e4 LT |
168 | { |
169 | struct nand_chip *this = mtd->priv; | |
170 | ||
171 | /* De-select the NAND device */ | |
172 | this->select_chip(mtd, -1); | |
0dfc6246 | 173 | |
1da177e4 | 174 | if (this->controller) { |
0dfc6246 | 175 | /* Release the controller and the chip */ |
1da177e4 LT |
176 | spin_lock(&this->controller->lock); |
177 | this->controller->active = NULL; | |
0dfc6246 TG |
178 | this->state = FL_READY; |
179 | wake_up(&this->controller->wq); | |
1da177e4 | 180 | spin_unlock(&this->controller->lock); |
0dfc6246 TG |
181 | } else { |
182 | /* Release the chip */ | |
183 | spin_lock(&this->chip_lock); | |
184 | this->state = FL_READY; | |
185 | wake_up(&this->wq); | |
186 | spin_unlock(&this->chip_lock); | |
1da177e4 | 187 | } |
1da177e4 LT |
188 | } |
189 | ||
190 | /** | |
191 | * nand_read_byte - [DEFAULT] read one byte from the chip | |
192 | * @mtd: MTD device structure | |
193 | * | |
194 | * Default read function for 8bit buswith | |
195 | */ | |
196 | static u_char nand_read_byte(struct mtd_info *mtd) | |
197 | { | |
198 | struct nand_chip *this = mtd->priv; | |
199 | return readb(this->IO_ADDR_R); | |
200 | } | |
201 | ||
202 | /** | |
203 | * nand_write_byte - [DEFAULT] write one byte to the chip | |
204 | * @mtd: MTD device structure | |
205 | * @byte: pointer to data byte to write | |
206 | * | |
207 | * Default write function for 8it buswith | |
208 | */ | |
209 | static void nand_write_byte(struct mtd_info *mtd, u_char byte) | |
210 | { | |
211 | struct nand_chip *this = mtd->priv; | |
212 | writeb(byte, this->IO_ADDR_W); | |
213 | } | |
214 | ||
215 | /** | |
216 | * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip | |
217 | * @mtd: MTD device structure | |
218 | * | |
61b03bd7 | 219 | * Default read function for 16bit buswith with |
1da177e4 LT |
220 | * endianess conversion |
221 | */ | |
222 | static u_char nand_read_byte16(struct mtd_info *mtd) | |
223 | { | |
224 | struct nand_chip *this = mtd->priv; | |
225 | return (u_char) cpu_to_le16(readw(this->IO_ADDR_R)); | |
226 | } | |
227 | ||
228 | /** | |
229 | * nand_write_byte16 - [DEFAULT] write one byte endianess aware to the chip | |
230 | * @mtd: MTD device structure | |
231 | * @byte: pointer to data byte to write | |
232 | * | |
233 | * Default write function for 16bit buswith with | |
234 | * endianess conversion | |
235 | */ | |
236 | static void nand_write_byte16(struct mtd_info *mtd, u_char byte) | |
237 | { | |
238 | struct nand_chip *this = mtd->priv; | |
239 | writew(le16_to_cpu((u16) byte), this->IO_ADDR_W); | |
240 | } | |
241 | ||
242 | /** | |
243 | * nand_read_word - [DEFAULT] read one word from the chip | |
244 | * @mtd: MTD device structure | |
245 | * | |
61b03bd7 | 246 | * Default read function for 16bit buswith without |
1da177e4 LT |
247 | * endianess conversion |
248 | */ | |
249 | static u16 nand_read_word(struct mtd_info *mtd) | |
250 | { | |
251 | struct nand_chip *this = mtd->priv; | |
252 | return readw(this->IO_ADDR_R); | |
253 | } | |
254 | ||
255 | /** | |
256 | * nand_write_word - [DEFAULT] write one word to the chip | |
257 | * @mtd: MTD device structure | |
258 | * @word: data word to write | |
259 | * | |
61b03bd7 | 260 | * Default write function for 16bit buswith without |
1da177e4 LT |
261 | * endianess conversion |
262 | */ | |
263 | static void nand_write_word(struct mtd_info *mtd, u16 word) | |
264 | { | |
265 | struct nand_chip *this = mtd->priv; | |
266 | writew(word, this->IO_ADDR_W); | |
267 | } | |
268 | ||
269 | /** | |
270 | * nand_select_chip - [DEFAULT] control CE line | |
271 | * @mtd: MTD device structure | |
272 | * @chip: chipnumber to select, -1 for deselect | |
273 | * | |
274 | * Default select function for 1 chip devices. | |
275 | */ | |
276 | static void nand_select_chip(struct mtd_info *mtd, int chip) | |
277 | { | |
278 | struct nand_chip *this = mtd->priv; | |
e0c7d767 | 279 | switch (chip) { |
1da177e4 | 280 | case -1: |
61b03bd7 | 281 | this->hwcontrol(mtd, NAND_CTL_CLRNCE); |
1da177e4 LT |
282 | break; |
283 | case 0: | |
284 | this->hwcontrol(mtd, NAND_CTL_SETNCE); | |
285 | break; | |
286 | ||
287 | default: | |
288 | BUG(); | |
289 | } | |
290 | } | |
291 | ||
292 | /** | |
293 | * nand_write_buf - [DEFAULT] write buffer to chip | |
294 | * @mtd: MTD device structure | |
295 | * @buf: data buffer | |
296 | * @len: number of bytes to write | |
297 | * | |
298 | * Default write function for 8bit buswith | |
299 | */ | |
300 | static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) | |
301 | { | |
302 | int i; | |
303 | struct nand_chip *this = mtd->priv; | |
304 | ||
e0c7d767 | 305 | for (i = 0; i < len; i++) |
1da177e4 LT |
306 | writeb(buf[i], this->IO_ADDR_W); |
307 | } | |
308 | ||
309 | /** | |
61b03bd7 | 310 | * nand_read_buf - [DEFAULT] read chip data into buffer |
1da177e4 LT |
311 | * @mtd: MTD device structure |
312 | * @buf: buffer to store date | |
313 | * @len: number of bytes to read | |
314 | * | |
315 | * Default read function for 8bit buswith | |
316 | */ | |
317 | static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) | |
318 | { | |
319 | int i; | |
320 | struct nand_chip *this = mtd->priv; | |
321 | ||
e0c7d767 | 322 | for (i = 0; i < len; i++) |
1da177e4 LT |
323 | buf[i] = readb(this->IO_ADDR_R); |
324 | } | |
325 | ||
326 | /** | |
61b03bd7 | 327 | * nand_verify_buf - [DEFAULT] Verify chip data against buffer |
1da177e4 LT |
328 | * @mtd: MTD device structure |
329 | * @buf: buffer containing the data to compare | |
330 | * @len: number of bytes to compare | |
331 | * | |
332 | * Default verify function for 8bit buswith | |
333 | */ | |
334 | static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) | |
335 | { | |
336 | int i; | |
337 | struct nand_chip *this = mtd->priv; | |
338 | ||
e0c7d767 | 339 | for (i = 0; i < len; i++) |
1da177e4 LT |
340 | if (buf[i] != readb(this->IO_ADDR_R)) |
341 | return -EFAULT; | |
342 | ||
343 | return 0; | |
344 | } | |
345 | ||
346 | /** | |
347 | * nand_write_buf16 - [DEFAULT] write buffer to chip | |
348 | * @mtd: MTD device structure | |
349 | * @buf: data buffer | |
350 | * @len: number of bytes to write | |
351 | * | |
352 | * Default write function for 16bit buswith | |
353 | */ | |
354 | static void nand_write_buf16(struct mtd_info *mtd, const u_char *buf, int len) | |
355 | { | |
356 | int i; | |
357 | struct nand_chip *this = mtd->priv; | |
358 | u16 *p = (u16 *) buf; | |
359 | len >>= 1; | |
61b03bd7 | 360 | |
e0c7d767 | 361 | for (i = 0; i < len; i++) |
1da177e4 | 362 | writew(p[i], this->IO_ADDR_W); |
61b03bd7 | 363 | |
1da177e4 LT |
364 | } |
365 | ||
366 | /** | |
61b03bd7 | 367 | * nand_read_buf16 - [DEFAULT] read chip data into buffer |
1da177e4 LT |
368 | * @mtd: MTD device structure |
369 | * @buf: buffer to store date | |
370 | * @len: number of bytes to read | |
371 | * | |
372 | * Default read function for 16bit buswith | |
373 | */ | |
374 | static void nand_read_buf16(struct mtd_info *mtd, u_char *buf, int len) | |
375 | { | |
376 | int i; | |
377 | struct nand_chip *this = mtd->priv; | |
378 | u16 *p = (u16 *) buf; | |
379 | len >>= 1; | |
380 | ||
e0c7d767 | 381 | for (i = 0; i < len; i++) |
1da177e4 LT |
382 | p[i] = readw(this->IO_ADDR_R); |
383 | } | |
384 | ||
385 | /** | |
61b03bd7 | 386 | * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer |
1da177e4 LT |
387 | * @mtd: MTD device structure |
388 | * @buf: buffer containing the data to compare | |
389 | * @len: number of bytes to compare | |
390 | * | |
391 | * Default verify function for 16bit buswith | |
392 | */ | |
393 | static int nand_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len) | |
394 | { | |
395 | int i; | |
396 | struct nand_chip *this = mtd->priv; | |
397 | u16 *p = (u16 *) buf; | |
398 | len >>= 1; | |
399 | ||
e0c7d767 | 400 | for (i = 0; i < len; i++) |
1da177e4 LT |
401 | if (p[i] != readw(this->IO_ADDR_R)) |
402 | return -EFAULT; | |
403 | ||
404 | return 0; | |
405 | } | |
406 | ||
407 | /** | |
408 | * nand_block_bad - [DEFAULT] Read bad block marker from the chip | |
409 | * @mtd: MTD device structure | |
410 | * @ofs: offset from device start | |
411 | * @getchip: 0, if the chip is already selected | |
412 | * | |
61b03bd7 | 413 | * Check, if the block is bad. |
1da177e4 LT |
414 | */ |
415 | static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) | |
416 | { | |
417 | int page, chipnr, res = 0; | |
418 | struct nand_chip *this = mtd->priv; | |
419 | u16 bad; | |
420 | ||
421 | if (getchip) { | |
422 | page = (int)(ofs >> this->page_shift); | |
423 | chipnr = (int)(ofs >> this->chip_shift); | |
424 | ||
425 | /* Grab the lock and see if the device is available */ | |
e0c7d767 | 426 | nand_get_device(this, mtd, FL_READING); |
1da177e4 LT |
427 | |
428 | /* Select the NAND device */ | |
429 | this->select_chip(mtd, chipnr); | |
61b03bd7 | 430 | } else |
e0c7d767 | 431 | page = (int)ofs; |
1da177e4 LT |
432 | |
433 | if (this->options & NAND_BUSWIDTH_16) { | |
e0c7d767 | 434 | this->cmdfunc(mtd, NAND_CMD_READOOB, this->badblockpos & 0xFE, page & this->pagemask); |
1da177e4 LT |
435 | bad = cpu_to_le16(this->read_word(mtd)); |
436 | if (this->badblockpos & 0x1) | |
49196f33 | 437 | bad >>= 8; |
1da177e4 LT |
438 | if ((bad & 0xFF) != 0xff) |
439 | res = 1; | |
440 | } else { | |
e0c7d767 | 441 | this->cmdfunc(mtd, NAND_CMD_READOOB, this->badblockpos, page & this->pagemask); |
1da177e4 LT |
442 | if (this->read_byte(mtd) != 0xff) |
443 | res = 1; | |
444 | } | |
61b03bd7 | 445 | |
1da177e4 LT |
446 | if (getchip) { |
447 | /* Deselect and wake up anyone waiting on the device */ | |
448 | nand_release_device(mtd); | |
61b03bd7 TG |
449 | } |
450 | ||
1da177e4 LT |
451 | return res; |
452 | } | |
453 | ||
454 | /** | |
455 | * nand_default_block_markbad - [DEFAULT] mark a block bad | |
456 | * @mtd: MTD device structure | |
457 | * @ofs: offset from device start | |
458 | * | |
459 | * This is the default implementation, which can be overridden by | |
460 | * a hardware specific driver. | |
461 | */ | |
462 | static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) | |
463 | { | |
464 | struct nand_chip *this = mtd->priv; | |
e0c7d767 DW |
465 | u_char buf[2] = { 0, 0 }; |
466 | size_t retlen; | |
1da177e4 | 467 | int block; |
61b03bd7 | 468 | |
1da177e4 | 469 | /* Get block number */ |
e0c7d767 | 470 | block = ((int)ofs) >> this->bbt_erase_shift; |
41ce9214 AB |
471 | if (this->bbt) |
472 | this->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); | |
1da177e4 LT |
473 | |
474 | /* Do we have a flash based bad block table ? */ | |
475 | if (this->options & NAND_USE_FLASH_BBT) | |
e0c7d767 | 476 | return nand_update_bbt(mtd, ofs); |
61b03bd7 | 477 | |
1da177e4 LT |
478 | /* We write two bytes, so we dont have to mess with 16 bit access */ |
479 | ofs += mtd->oobsize + (this->badblockpos & ~0x01); | |
e0c7d767 | 480 | return nand_write_oob(mtd, ofs, 2, &retlen, buf); |
1da177e4 LT |
481 | } |
482 | ||
61b03bd7 | 483 | /** |
1da177e4 LT |
484 | * nand_check_wp - [GENERIC] check if the chip is write protected |
485 | * @mtd: MTD device structure | |
61b03bd7 | 486 | * Check, if the device is write protected |
1da177e4 | 487 | * |
61b03bd7 | 488 | * The function expects, that the device is already selected |
1da177e4 | 489 | */ |
e0c7d767 | 490 | static int nand_check_wp(struct mtd_info *mtd) |
1da177e4 LT |
491 | { |
492 | struct nand_chip *this = mtd->priv; | |
493 | /* Check the WP bit */ | |
e0c7d767 | 494 | this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
61b03bd7 | 495 | return (this->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; |
1da177e4 LT |
496 | } |
497 | ||
498 | /** | |
499 | * nand_block_checkbad - [GENERIC] Check if a block is marked bad | |
500 | * @mtd: MTD device structure | |
501 | * @ofs: offset from device start | |
502 | * @getchip: 0, if the chip is already selected | |
503 | * @allowbbt: 1, if its allowed to access the bbt area | |
504 | * | |
505 | * Check, if the block is bad. Either by reading the bad block table or | |
506 | * calling of the scan function. | |
507 | */ | |
e0c7d767 | 508 | static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt) |
1da177e4 LT |
509 | { |
510 | struct nand_chip *this = mtd->priv; | |
61b03bd7 | 511 | |
1da177e4 LT |
512 | if (!this->bbt) |
513 | return this->block_bad(mtd, ofs, getchip); | |
61b03bd7 | 514 | |
1da177e4 | 515 | /* Return info from the table */ |
e0c7d767 | 516 | return nand_isbad_bbt(mtd, ofs, allowbbt); |
1da177e4 LT |
517 | } |
518 | ||
8fe833c1 RP |
519 | DEFINE_LED_TRIGGER(nand_led_trigger); |
520 | ||
61b03bd7 | 521 | /* |
3b88775c TG |
522 | * Wait for the ready pin, after a command |
523 | * The timeout is catched later. | |
524 | */ | |
525 | static void nand_wait_ready(struct mtd_info *mtd) | |
526 | { | |
527 | struct nand_chip *this = mtd->priv; | |
e0c7d767 | 528 | unsigned long timeo = jiffies + 2; |
3b88775c | 529 | |
8fe833c1 | 530 | led_trigger_event(nand_led_trigger, LED_FULL); |
3b88775c TG |
531 | /* wait until command is processed or timeout occures */ |
532 | do { | |
533 | if (this->dev_ready(mtd)) | |
8fe833c1 | 534 | break; |
8446f1d3 | 535 | touch_softlockup_watchdog(); |
61b03bd7 | 536 | } while (time_before(jiffies, timeo)); |
8fe833c1 | 537 | led_trigger_event(nand_led_trigger, LED_OFF); |
3b88775c TG |
538 | } |
539 | ||
1da177e4 LT |
540 | /** |
541 | * nand_command - [DEFAULT] Send command to NAND device | |
542 | * @mtd: MTD device structure | |
543 | * @command: the command to be sent | |
544 | * @column: the column address for this command, -1 if none | |
545 | * @page_addr: the page address for this command, -1 if none | |
546 | * | |
547 | * Send command to NAND device. This function is used for small page | |
548 | * devices (256/512 Bytes per page) | |
549 | */ | |
e0c7d767 | 550 | static void nand_command(struct mtd_info *mtd, unsigned command, int column, int page_addr) |
1da177e4 LT |
551 | { |
552 | register struct nand_chip *this = mtd->priv; | |
553 | ||
554 | /* Begin command latch cycle */ | |
555 | this->hwcontrol(mtd, NAND_CTL_SETCLE); | |
556 | /* | |
557 | * Write out the command to the device. | |
558 | */ | |
559 | if (command == NAND_CMD_SEQIN) { | |
560 | int readcmd; | |
561 | ||
562 | if (column >= mtd->oobblock) { | |
563 | /* OOB area */ | |
564 | column -= mtd->oobblock; | |
565 | readcmd = NAND_CMD_READOOB; | |
566 | } else if (column < 256) { | |
567 | /* First 256 bytes --> READ0 */ | |
568 | readcmd = NAND_CMD_READ0; | |
569 | } else { | |
570 | column -= 256; | |
571 | readcmd = NAND_CMD_READ1; | |
572 | } | |
573 | this->write_byte(mtd, readcmd); | |
574 | } | |
575 | this->write_byte(mtd, command); | |
576 | ||
577 | /* Set ALE and clear CLE to start address cycle */ | |
578 | this->hwcontrol(mtd, NAND_CTL_CLRCLE); | |
579 | ||
580 | if (column != -1 || page_addr != -1) { | |
581 | this->hwcontrol(mtd, NAND_CTL_SETALE); | |
582 | ||
583 | /* Serially input address */ | |
584 | if (column != -1) { | |
585 | /* Adjust columns for 16 bit buswidth */ | |
586 | if (this->options & NAND_BUSWIDTH_16) | |
587 | column >>= 1; | |
588 | this->write_byte(mtd, column); | |
589 | } | |
590 | if (page_addr != -1) { | |
e0c7d767 DW |
591 | this->write_byte(mtd, (unsigned char)(page_addr & 0xff)); |
592 | this->write_byte(mtd, (unsigned char)((page_addr >> 8) & 0xff)); | |
1da177e4 LT |
593 | /* One more address cycle for devices > 32MiB */ |
594 | if (this->chipsize > (32 << 20)) | |
e0c7d767 | 595 | this->write_byte(mtd, (unsigned char)((page_addr >> 16) & 0x0f)); |
1da177e4 LT |
596 | } |
597 | /* Latch in address */ | |
598 | this->hwcontrol(mtd, NAND_CTL_CLRALE); | |
599 | } | |
61b03bd7 TG |
600 | |
601 | /* | |
602 | * program and erase have their own busy handlers | |
1da177e4 | 603 | * status and sequential in needs no delay |
e0c7d767 | 604 | */ |
1da177e4 | 605 | switch (command) { |
61b03bd7 | 606 | |
1da177e4 LT |
607 | case NAND_CMD_PAGEPROG: |
608 | case NAND_CMD_ERASE1: | |
609 | case NAND_CMD_ERASE2: | |
610 | case NAND_CMD_SEQIN: | |
611 | case NAND_CMD_STATUS: | |
612 | return; | |
613 | ||
614 | case NAND_CMD_RESET: | |
61b03bd7 | 615 | if (this->dev_ready) |
1da177e4 LT |
616 | break; |
617 | udelay(this->chip_delay); | |
618 | this->hwcontrol(mtd, NAND_CTL_SETCLE); | |
619 | this->write_byte(mtd, NAND_CMD_STATUS); | |
620 | this->hwcontrol(mtd, NAND_CTL_CLRCLE); | |
e0c7d767 | 621 | while (!(this->read_byte(mtd) & NAND_STATUS_READY)) ; |
1da177e4 LT |
622 | return; |
623 | ||
e0c7d767 | 624 | /* This applies to read commands */ |
1da177e4 | 625 | default: |
61b03bd7 | 626 | /* |
1da177e4 LT |
627 | * If we don't have access to the busy pin, we apply the given |
628 | * command delay | |
e0c7d767 | 629 | */ |
1da177e4 | 630 | if (!this->dev_ready) { |
e0c7d767 | 631 | udelay(this->chip_delay); |
1da177e4 | 632 | return; |
61b03bd7 | 633 | } |
1da177e4 | 634 | } |
1da177e4 LT |
635 | /* Apply this short delay always to ensure that we do wait tWB in |
636 | * any case on any machine. */ | |
e0c7d767 | 637 | ndelay(100); |
3b88775c TG |
638 | |
639 | nand_wait_ready(mtd); | |
1da177e4 LT |
640 | } |
641 | ||
642 | /** | |
643 | * nand_command_lp - [DEFAULT] Send command to NAND large page device | |
644 | * @mtd: MTD device structure | |
645 | * @command: the command to be sent | |
646 | * @column: the column address for this command, -1 if none | |
647 | * @page_addr: the page address for this command, -1 if none | |
648 | * | |
649 | * Send command to NAND device. This is the version for the new large page devices | |
e0c7d767 | 650 | * We dont have the separate regions as we have in the small page devices. |
1da177e4 LT |
651 | * We must emulate NAND_CMD_READOOB to keep the code compatible. |
652 | * | |
653 | */ | |
e0c7d767 | 654 | static void nand_command_lp(struct mtd_info *mtd, unsigned command, int column, int page_addr) |
1da177e4 LT |
655 | { |
656 | register struct nand_chip *this = mtd->priv; | |
657 | ||
658 | /* Emulate NAND_CMD_READOOB */ | |
659 | if (command == NAND_CMD_READOOB) { | |
660 | column += mtd->oobblock; | |
661 | command = NAND_CMD_READ0; | |
662 | } | |
61b03bd7 | 663 | |
1da177e4 LT |
664 | /* Begin command latch cycle */ |
665 | this->hwcontrol(mtd, NAND_CTL_SETCLE); | |
666 | /* Write out the command to the device. */ | |
30f464b7 | 667 | this->write_byte(mtd, (command & 0xff)); |
1da177e4 LT |
668 | /* End command latch cycle */ |
669 | this->hwcontrol(mtd, NAND_CTL_CLRCLE); | |
670 | ||
671 | if (column != -1 || page_addr != -1) { | |
672 | this->hwcontrol(mtd, NAND_CTL_SETALE); | |
673 | ||
674 | /* Serially input address */ | |
675 | if (column != -1) { | |
676 | /* Adjust columns for 16 bit buswidth */ | |
677 | if (this->options & NAND_BUSWIDTH_16) | |
678 | column >>= 1; | |
679 | this->write_byte(mtd, column & 0xff); | |
680 | this->write_byte(mtd, column >> 8); | |
61b03bd7 | 681 | } |
1da177e4 | 682 | if (page_addr != -1) { |
e0c7d767 DW |
683 | this->write_byte(mtd, (unsigned char)(page_addr & 0xff)); |
684 | this->write_byte(mtd, (unsigned char)((page_addr >> 8) & 0xff)); | |
1da177e4 LT |
685 | /* One more address cycle for devices > 128MiB */ |
686 | if (this->chipsize > (128 << 20)) | |
e0c7d767 | 687 | this->write_byte(mtd, (unsigned char)((page_addr >> 16) & 0xff)); |
1da177e4 LT |
688 | } |
689 | /* Latch in address */ | |
690 | this->hwcontrol(mtd, NAND_CTL_CLRALE); | |
691 | } | |
61b03bd7 TG |
692 | |
693 | /* | |
694 | * program and erase have their own busy handlers | |
30f464b7 DM |
695 | * status, sequential in, and deplete1 need no delay |
696 | */ | |
1da177e4 | 697 | switch (command) { |
61b03bd7 | 698 | |
1da177e4 LT |
699 | case NAND_CMD_CACHEDPROG: |
700 | case NAND_CMD_PAGEPROG: | |
701 | case NAND_CMD_ERASE1: | |
702 | case NAND_CMD_ERASE2: | |
703 | case NAND_CMD_SEQIN: | |
704 | case NAND_CMD_STATUS: | |
30f464b7 | 705 | case NAND_CMD_DEPLETE1: |
1da177e4 LT |
706 | return; |
707 | ||
e0c7d767 DW |
708 | /* |
709 | * read error status commands require only a short delay | |
710 | */ | |
30f464b7 DM |
711 | case NAND_CMD_STATUS_ERROR: |
712 | case NAND_CMD_STATUS_ERROR0: | |
713 | case NAND_CMD_STATUS_ERROR1: | |
714 | case NAND_CMD_STATUS_ERROR2: | |
715 | case NAND_CMD_STATUS_ERROR3: | |
716 | udelay(this->chip_delay); | |
717 | return; | |
1da177e4 LT |
718 | |
719 | case NAND_CMD_RESET: | |
61b03bd7 | 720 | if (this->dev_ready) |
1da177e4 LT |
721 | break; |
722 | udelay(this->chip_delay); | |
723 | this->hwcontrol(mtd, NAND_CTL_SETCLE); | |
724 | this->write_byte(mtd, NAND_CMD_STATUS); | |
725 | this->hwcontrol(mtd, NAND_CTL_CLRCLE); | |
e0c7d767 | 726 | while (!(this->read_byte(mtd) & NAND_STATUS_READY)) ; |
1da177e4 LT |
727 | return; |
728 | ||
729 | case NAND_CMD_READ0: | |
730 | /* Begin command latch cycle */ | |
731 | this->hwcontrol(mtd, NAND_CTL_SETCLE); | |
732 | /* Write out the start read command */ | |
733 | this->write_byte(mtd, NAND_CMD_READSTART); | |
734 | /* End command latch cycle */ | |
735 | this->hwcontrol(mtd, NAND_CTL_CLRCLE); | |
736 | /* Fall through into ready check */ | |
61b03bd7 | 737 | |
e0c7d767 | 738 | /* This applies to read commands */ |
1da177e4 | 739 | default: |
61b03bd7 | 740 | /* |
1da177e4 LT |
741 | * If we don't have access to the busy pin, we apply the given |
742 | * command delay | |
e0c7d767 | 743 | */ |
1da177e4 | 744 | if (!this->dev_ready) { |
e0c7d767 | 745 | udelay(this->chip_delay); |
1da177e4 | 746 | return; |
61b03bd7 | 747 | } |
1da177e4 | 748 | } |
3b88775c | 749 | |
1da177e4 LT |
750 | /* Apply this short delay always to ensure that we do wait tWB in |
751 | * any case on any machine. */ | |
e0c7d767 | 752 | ndelay(100); |
3b88775c TG |
753 | |
754 | nand_wait_ready(mtd); | |
1da177e4 LT |
755 | } |
756 | ||
757 | /** | |
758 | * nand_get_device - [GENERIC] Get chip for selected access | |
759 | * @this: the nand chip descriptor | |
760 | * @mtd: MTD device structure | |
61b03bd7 | 761 | * @new_state: the state which is requested |
1da177e4 LT |
762 | * |
763 | * Get the device and lock it for exclusive access | |
764 | */ | |
e0c7d767 | 765 | static int nand_get_device(struct nand_chip *this, struct mtd_info *mtd, int new_state) |
1da177e4 | 766 | { |
0dfc6246 TG |
767 | struct nand_chip *active; |
768 | spinlock_t *lock; | |
769 | wait_queue_head_t *wq; | |
e0c7d767 | 770 | DECLARE_WAITQUEUE(wait, current); |
1da177e4 | 771 | |
0dfc6246 TG |
772 | lock = (this->controller) ? &this->controller->lock : &this->chip_lock; |
773 | wq = (this->controller) ? &this->controller->wq : &this->wq; | |
e0c7d767 | 774 | retry: |
0dfc6246 TG |
775 | active = this; |
776 | spin_lock(lock); | |
777 | ||
1da177e4 LT |
778 | /* Hardware controller shared among independend devices */ |
779 | if (this->controller) { | |
1da177e4 LT |
780 | if (this->controller->active) |
781 | active = this->controller->active; | |
782 | else | |
783 | this->controller->active = this; | |
1da177e4 | 784 | } |
0dfc6246 TG |
785 | if (active == this && this->state == FL_READY) { |
786 | this->state = new_state; | |
787 | spin_unlock(lock); | |
962034f4 VW |
788 | return 0; |
789 | } | |
790 | if (new_state == FL_PM_SUSPENDED) { | |
791 | spin_unlock(lock); | |
792 | return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; | |
0dfc6246 TG |
793 | } |
794 | set_current_state(TASK_UNINTERRUPTIBLE); | |
795 | add_wait_queue(wq, &wait); | |
796 | spin_unlock(lock); | |
797 | schedule(); | |
798 | remove_wait_queue(wq, &wait); | |
1da177e4 LT |
799 | goto retry; |
800 | } | |
801 | ||
802 | /** | |
803 | * nand_wait - [DEFAULT] wait until the command is done | |
804 | * @mtd: MTD device structure | |
805 | * @this: NAND chip structure | |
806 | * @state: state to select the max. timeout value | |
807 | * | |
808 | * Wait for command done. This applies to erase and program only | |
61b03bd7 | 809 | * Erase can take up to 400ms and program up to 20ms according to |
1da177e4 LT |
810 | * general NAND and SmartMedia specs |
811 | * | |
812 | */ | |
813 | static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state) | |
814 | { | |
815 | ||
e0c7d767 DW |
816 | unsigned long timeo = jiffies; |
817 | int status; | |
61b03bd7 | 818 | |
1da177e4 | 819 | if (state == FL_ERASING) |
e0c7d767 | 820 | timeo += (HZ * 400) / 1000; |
1da177e4 | 821 | else |
e0c7d767 | 822 | timeo += (HZ * 20) / 1000; |
1da177e4 | 823 | |
8fe833c1 RP |
824 | led_trigger_event(nand_led_trigger, LED_FULL); |
825 | ||
1da177e4 LT |
826 | /* Apply this short delay always to ensure that we do wait tWB in |
827 | * any case on any machine. */ | |
e0c7d767 | 828 | ndelay(100); |
1da177e4 LT |
829 | |
830 | if ((state == FL_ERASING) && (this->options & NAND_IS_AND)) | |
e0c7d767 | 831 | this->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); |
61b03bd7 | 832 | else |
e0c7d767 | 833 | this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
1da177e4 | 834 | |
61b03bd7 | 835 | while (time_before(jiffies, timeo)) { |
1da177e4 LT |
836 | /* Check, if we were interrupted */ |
837 | if (this->state != state) | |
838 | return 0; | |
839 | ||
840 | if (this->dev_ready) { | |
841 | if (this->dev_ready(mtd)) | |
61b03bd7 | 842 | break; |
1da177e4 LT |
843 | } else { |
844 | if (this->read_byte(mtd) & NAND_STATUS_READY) | |
845 | break; | |
846 | } | |
20a6c211 | 847 | cond_resched(); |
1da177e4 | 848 | } |
8fe833c1 RP |
849 | led_trigger_event(nand_led_trigger, LED_OFF); |
850 | ||
e0c7d767 | 851 | status = (int)this->read_byte(mtd); |
1da177e4 LT |
852 | return status; |
853 | } | |
854 | ||
855 | /** | |
856 | * nand_write_page - [GENERIC] write one page | |
857 | * @mtd: MTD device structure | |
858 | * @this: NAND chip structure | |
859 | * @page: startpage inside the chip, must be called with (page & this->pagemask) | |
860 | * @oob_buf: out of band data buffer | |
861 | * @oobsel: out of band selecttion structre | |
862 | * @cached: 1 = enable cached programming if supported by chip | |
863 | * | |
864 | * Nand_page_program function is used for write and writev ! | |
865 | * This function will always program a full page of data | |
866 | * If you call it with a non page aligned buffer, you're lost :) | |
867 | * | |
868 | * Cached programming is not supported yet. | |
869 | */ | |
e0c7d767 DW |
870 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, int page, |
871 | u_char *oob_buf, struct nand_oobinfo *oobsel, int cached) | |
1da177e4 | 872 | { |
e0c7d767 DW |
873 | int i, status; |
874 | u_char ecc_code[32]; | |
875 | int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE; | |
876 | int *oob_config = oobsel->eccpos; | |
877 | int datidx = 0, eccidx = 0, eccsteps = this->eccsteps; | |
878 | int eccbytes = 0; | |
61b03bd7 | 879 | |
1da177e4 LT |
880 | /* FIXME: Enable cached programming */ |
881 | cached = 0; | |
61b03bd7 | 882 | |
1da177e4 | 883 | /* Send command to begin auto page programming */ |
e0c7d767 | 884 | this->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); |
1da177e4 LT |
885 | |
886 | /* Write out complete page of data, take care of eccmode */ | |
887 | switch (eccmode) { | |
e0c7d767 | 888 | /* No ecc, write all */ |
1da177e4 | 889 | case NAND_ECC_NONE: |
e0c7d767 | 890 | printk(KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n"); |
1da177e4 LT |
891 | this->write_buf(mtd, this->data_poi, mtd->oobblock); |
892 | break; | |
61b03bd7 | 893 | |
e0c7d767 | 894 | /* Software ecc 3/256, write all */ |
1da177e4 LT |
895 | case NAND_ECC_SOFT: |
896 | for (; eccsteps; eccsteps--) { | |
897 | this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code); | |
898 | for (i = 0; i < 3; i++, eccidx++) | |
899 | oob_buf[oob_config[eccidx]] = ecc_code[i]; | |
900 | datidx += this->eccsize; | |
901 | } | |
902 | this->write_buf(mtd, this->data_poi, mtd->oobblock); | |
903 | break; | |
904 | default: | |
905 | eccbytes = this->eccbytes; | |
906 | for (; eccsteps; eccsteps--) { | |
907 | /* enable hardware ecc logic for write */ | |
908 | this->enable_hwecc(mtd, NAND_ECC_WRITE); | |
909 | this->write_buf(mtd, &this->data_poi[datidx], this->eccsize); | |
910 | this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code); | |
911 | for (i = 0; i < eccbytes; i++, eccidx++) | |
912 | oob_buf[oob_config[eccidx]] = ecc_code[i]; | |
913 | /* If the hardware ecc provides syndromes then | |
914 | * the ecc code must be written immidiately after | |
915 | * the data bytes (words) */ | |
916 | if (this->options & NAND_HWECC_SYNDROME) | |
917 | this->write_buf(mtd, ecc_code, eccbytes); | |
918 | datidx += this->eccsize; | |
919 | } | |
920 | break; | |
921 | } | |
61b03bd7 | 922 | |
1da177e4 LT |
923 | /* Write out OOB data */ |
924 | if (this->options & NAND_HWECC_SYNDROME) | |
925 | this->write_buf(mtd, &oob_buf[oobsel->eccbytes], mtd->oobsize - oobsel->eccbytes); | |
61b03bd7 | 926 | else |
1da177e4 LT |
927 | this->write_buf(mtd, oob_buf, mtd->oobsize); |
928 | ||
929 | /* Send command to actually program the data */ | |
e0c7d767 | 930 | this->cmdfunc(mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1); |
1da177e4 LT |
931 | |
932 | if (!cached) { | |
933 | /* call wait ready function */ | |
e0c7d767 | 934 | status = this->waitfunc(mtd, this, FL_WRITING); |
068e3c0a DM |
935 | |
936 | /* See if operation failed and additional status checks are available */ | |
937 | if ((status & NAND_STATUS_FAIL) && (this->errstat)) { | |
938 | status = this->errstat(mtd, this, FL_WRITING, status, page); | |
939 | } | |
940 | ||
1da177e4 | 941 | /* See if device thinks it succeeded */ |
a4ab4c5d | 942 | if (status & NAND_STATUS_FAIL) { |
e0c7d767 | 943 | DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page); |
1da177e4 LT |
944 | return -EIO; |
945 | } | |
946 | } else { | |
947 | /* FIXME: Implement cached programming ! */ | |
e0c7d767 | 948 | /* wait until cache is ready */ |
1da177e4 LT |
949 | // status = this->waitfunc (mtd, this, FL_CACHEDRPG); |
950 | } | |
61b03bd7 | 951 | return 0; |
1da177e4 LT |
952 | } |
953 | ||
954 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE | |
955 | /** | |
956 | * nand_verify_pages - [GENERIC] verify the chip contents after a write | |
957 | * @mtd: MTD device structure | |
958 | * @this: NAND chip structure | |
959 | * @page: startpage inside the chip, must be called with (page & this->pagemask) | |
960 | * @numpages: number of pages to verify | |
961 | * @oob_buf: out of band data buffer | |
962 | * @oobsel: out of band selecttion structre | |
963 | * @chipnr: number of the current chip | |
964 | * @oobmode: 1 = full buffer verify, 0 = ecc only | |
965 | * | |
966 | * The NAND device assumes that it is always writing to a cleanly erased page. | |
61b03bd7 | 967 | * Hence, it performs its internal write verification only on bits that |
1da177e4 | 968 | * transitioned from 1 to 0. The device does NOT verify the whole page on a |
61b03bd7 TG |
969 | * byte by byte basis. It is possible that the page was not completely erased |
970 | * or the page is becoming unusable due to wear. The read with ECC would catch | |
971 | * the error later when the ECC page check fails, but we would rather catch | |
1da177e4 LT |
972 | * it early in the page write stage. Better to write no data than invalid data. |
973 | */ | |
e0c7d767 DW |
974 | static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *this, int page, int numpages, |
975 | u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode) | |
1da177e4 | 976 | { |
e0c7d767 DW |
977 | int i, j, datidx = 0, oobofs = 0, res = -EIO; |
978 | int eccsteps = this->eccsteps; | |
979 | int hweccbytes; | |
980 | u_char oobdata[64]; | |
1da177e4 LT |
981 | |
982 | hweccbytes = (this->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0; | |
983 | ||
984 | /* Send command to read back the first page */ | |
e0c7d767 | 985 | this->cmdfunc(mtd, NAND_CMD_READ0, 0, page); |
1da177e4 | 986 | |
e0c7d767 | 987 | for (;;) { |
1da177e4 LT |
988 | for (j = 0; j < eccsteps; j++) { |
989 | /* Loop through and verify the data */ | |
990 | if (this->verify_buf(mtd, &this->data_poi[datidx], mtd->eccsize)) { | |
e0c7d767 | 991 | DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page); |
1da177e4 LT |
992 | goto out; |
993 | } | |
994 | datidx += mtd->eccsize; | |
995 | /* Have we a hw generator layout ? */ | |
996 | if (!hweccbytes) | |
997 | continue; | |
998 | if (this->verify_buf(mtd, &this->oob_buf[oobofs], hweccbytes)) { | |
e0c7d767 | 999 | DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page); |
1da177e4 LT |
1000 | goto out; |
1001 | } | |
1002 | oobofs += hweccbytes; | |
1003 | } | |
1004 | ||
1005 | /* check, if we must compare all data or if we just have to | |
1006 | * compare the ecc bytes | |
1007 | */ | |
1008 | if (oobmode) { | |
1009 | if (this->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) { | |
e0c7d767 | 1010 | DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page); |
1da177e4 LT |
1011 | goto out; |
1012 | } | |
1013 | } else { | |
1014 | /* Read always, else autoincrement fails */ | |
1015 | this->read_buf(mtd, oobdata, mtd->oobsize - hweccbytes * eccsteps); | |
1016 | ||
1017 | if (oobsel->useecc != MTD_NANDECC_OFF && !hweccbytes) { | |
1018 | int ecccnt = oobsel->eccbytes; | |
61b03bd7 | 1019 | |
1da177e4 LT |
1020 | for (i = 0; i < ecccnt; i++) { |
1021 | int idx = oobsel->eccpos[i]; | |
e0c7d767 DW |
1022 | if (oobdata[idx] != oob_buf[oobofs + idx]) { |
1023 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Failed ECC write verify, page 0x%08x, %6i bytes were succesful\n", | |
1024 | __FUNCTION__, page, i); | |
1da177e4 LT |
1025 | goto out; |
1026 | } | |
1027 | } | |
61b03bd7 | 1028 | } |
1da177e4 LT |
1029 | } |
1030 | oobofs += mtd->oobsize - hweccbytes * eccsteps; | |
1031 | page++; | |
1032 | numpages--; | |
1033 | ||
61b03bd7 | 1034 | /* Apply delay or wait for ready/busy pin |
1da177e4 LT |
1035 | * Do this before the AUTOINCR check, so no problems |
1036 | * arise if a chip which does auto increment | |
1037 | * is marked as NOAUTOINCR by the board driver. | |
1038 | * Do this also before returning, so the chip is | |
1039 | * ready for the next command. | |
e0c7d767 | 1040 | */ |
61b03bd7 | 1041 | if (!this->dev_ready) |
e0c7d767 | 1042 | udelay(this->chip_delay); |
1da177e4 | 1043 | else |
3b88775c | 1044 | nand_wait_ready(mtd); |
1da177e4 LT |
1045 | |
1046 | /* All done, return happy */ | |
1047 | if (!numpages) | |
1048 | return 0; | |
61b03bd7 | 1049 | |
61b03bd7 | 1050 | /* Check, if the chip supports auto page increment */ |
1da177e4 | 1051 | if (!NAND_CANAUTOINCR(this)) |
e0c7d767 | 1052 | this->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); |
1da177e4 | 1053 | } |
61b03bd7 | 1054 | /* |
1da177e4 LT |
1055 | * Terminate the read command. We come here in case of an error |
1056 | * So we must issue a reset command. | |
1057 | */ | |
e0c7d767 DW |
1058 | out: |
1059 | this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); | |
1da177e4 LT |
1060 | return res; |
1061 | } | |
1062 | #endif | |
1063 | ||
1064 | /** | |
068e3c0a | 1065 | * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc |
1da177e4 LT |
1066 | * @mtd: MTD device structure |
1067 | * @from: offset to read from | |
1068 | * @len: number of bytes to read | |
1069 | * @retlen: pointer to variable to store the number of read bytes | |
1070 | * @buf: the databuffer to put data | |
1071 | * | |
068e3c0a DM |
1072 | * This function simply calls nand_do_read_ecc with oob buffer and oobsel = NULL |
1073 | * and flags = 0xff | |
1074 | */ | |
e0c7d767 | 1075 | static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf) |
1da177e4 | 1076 | { |
e0c7d767 | 1077 | return nand_do_read_ecc(mtd, from, len, retlen, buf, NULL, &mtd->oobinfo, 0xff); |
22c60f5f | 1078 | } |
1da177e4 | 1079 | |
1da177e4 | 1080 | /** |
068e3c0a | 1081 | * nand_read_ecc - [MTD Interface] MTD compability function for nand_do_read_ecc |
1da177e4 LT |
1082 | * @mtd: MTD device structure |
1083 | * @from: offset to read from | |
1084 | * @len: number of bytes to read | |
1085 | * @retlen: pointer to variable to store the number of read bytes | |
1086 | * @buf: the databuffer to put data | |
1087 | * @oob_buf: filesystem supplied oob data buffer | |
1088 | * @oobsel: oob selection structure | |
1089 | * | |
068e3c0a | 1090 | * This function simply calls nand_do_read_ecc with flags = 0xff |
1da177e4 | 1091 | */ |
e0c7d767 DW |
1092 | static int nand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, |
1093 | size_t *retlen, u_char *buf, u_char *oob_buf, struct nand_oobinfo *oobsel) | |
068e3c0a | 1094 | { |
22c60f5f TG |
1095 | /* use userspace supplied oobinfo, if zero */ |
1096 | if (oobsel == NULL) | |
1097 | oobsel = &mtd->oobinfo; | |
068e3c0a DM |
1098 | return nand_do_read_ecc(mtd, from, len, retlen, buf, oob_buf, oobsel, 0xff); |
1099 | } | |
1100 | ||
068e3c0a DM |
1101 | /** |
1102 | * nand_do_read_ecc - [MTD Interface] Read data with ECC | |
1103 | * @mtd: MTD device structure | |
1104 | * @from: offset to read from | |
1105 | * @len: number of bytes to read | |
1106 | * @retlen: pointer to variable to store the number of read bytes | |
1107 | * @buf: the databuffer to put data | |
bb75ba4c | 1108 | * @oob_buf: filesystem supplied oob data buffer (can be NULL) |
22c60f5f | 1109 | * @oobsel: oob selection structure |
068e3c0a DM |
1110 | * @flags: flag to indicate if nand_get_device/nand_release_device should be preformed |
1111 | * and how many corrected error bits are acceptable: | |
1112 | * bits 0..7 - number of tolerable errors | |
1113 | * bit 8 - 0 == do not get/release chip, 1 == get/release chip | |
1114 | * | |
1115 | * NAND read with ECC | |
1116 | */ | |
e0c7d767 DW |
1117 | int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, |
1118 | size_t *retlen, u_char *buf, u_char *oob_buf, struct nand_oobinfo *oobsel, int flags) | |
1da177e4 | 1119 | { |
22c60f5f | 1120 | |
1da177e4 LT |
1121 | int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1; |
1122 | int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0; | |
1123 | struct nand_chip *this = mtd->priv; | |
1124 | u_char *data_poi, *oob_data = oob_buf; | |
0a18cde6 JL |
1125 | u_char ecc_calc[32]; |
1126 | u_char ecc_code[32]; | |
e0c7d767 DW |
1127 | int eccmode, eccsteps; |
1128 | int *oob_config, datidx; | |
1129 | int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1; | |
1130 | int eccbytes; | |
1131 | int compareecc = 1; | |
1132 | int oobreadlen; | |
1da177e4 | 1133 | |
e0c7d767 | 1134 | DEBUG(MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int)from, (int)len); |
1da177e4 LT |
1135 | |
1136 | /* Do not allow reads past end of device */ | |
1137 | if ((from + len) > mtd->size) { | |
e0c7d767 | 1138 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n"); |
1da177e4 LT |
1139 | *retlen = 0; |
1140 | return -EINVAL; | |
1141 | } | |
1142 | ||
1143 | /* Grab the lock and see if the device is available */ | |
068e3c0a | 1144 | if (flags & NAND_GET_DEVICE) |
e0c7d767 | 1145 | nand_get_device(this, mtd, FL_READING); |
1da177e4 | 1146 | |
1da177e4 LT |
1147 | /* Autoplace of oob data ? Use the default placement scheme */ |
1148 | if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) | |
1149 | oobsel = this->autooob; | |
61b03bd7 | 1150 | |
1da177e4 LT |
1151 | eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE; |
1152 | oob_config = oobsel->eccpos; | |
1153 | ||
1154 | /* Select the NAND device */ | |
1155 | chipnr = (int)(from >> this->chip_shift); | |
1156 | this->select_chip(mtd, chipnr); | |
1157 | ||
1158 | /* First we calculate the starting page */ | |
e0c7d767 | 1159 | realpage = (int)(from >> this->page_shift); |
1da177e4 LT |
1160 | page = realpage & this->pagemask; |
1161 | ||
1162 | /* Get raw starting column */ | |
1163 | col = from & (mtd->oobblock - 1); | |
1164 | ||
1165 | end = mtd->oobblock; | |
1166 | ecc = this->eccsize; | |
1167 | eccbytes = this->eccbytes; | |
61b03bd7 | 1168 | |
1da177e4 LT |
1169 | if ((eccmode == NAND_ECC_NONE) || (this->options & NAND_HWECC_SYNDROME)) |
1170 | compareecc = 0; | |
1171 | ||
1172 | oobreadlen = mtd->oobsize; | |
61b03bd7 | 1173 | if (this->options & NAND_HWECC_SYNDROME) |
1da177e4 LT |
1174 | oobreadlen -= oobsel->eccbytes; |
1175 | ||
1176 | /* Loop until all data read */ | |
1177 | while (read < len) { | |
61b03bd7 | 1178 | |
1da177e4 | 1179 | int aligned = (!col && (len - read) >= end); |
61b03bd7 | 1180 | /* |
1da177e4 LT |
1181 | * If the read is not page aligned, we have to read into data buffer |
1182 | * due to ecc, else we read into return buffer direct | |
1183 | */ | |
1184 | if (aligned) | |
1185 | data_poi = &buf[read]; | |
61b03bd7 | 1186 | else |
1da177e4 | 1187 | data_poi = this->data_buf; |
61b03bd7 TG |
1188 | |
1189 | /* Check, if we have this page in the buffer | |
1da177e4 LT |
1190 | * |
1191 | * FIXME: Make it work when we must provide oob data too, | |
1192 | * check the usage of data_buf oob field | |
1193 | */ | |
1194 | if (realpage == this->pagebuf && !oob_buf) { | |
1195 | /* aligned read ? */ | |
1196 | if (aligned) | |
e0c7d767 | 1197 | memcpy(data_poi, this->data_buf, end); |
1da177e4 LT |
1198 | goto readdata; |
1199 | } | |
1200 | ||
1201 | /* Check, if we must send the read command */ | |
1202 | if (sndcmd) { | |
e0c7d767 | 1203 | this->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); |
1da177e4 | 1204 | sndcmd = 0; |
61b03bd7 | 1205 | } |
1da177e4 LT |
1206 | |
1207 | /* get oob area, if we have no oob buffer from fs-driver */ | |
90e260c8 TG |
1208 | if (!oob_buf || oobsel->useecc == MTD_NANDECC_AUTOPLACE || |
1209 | oobsel->useecc == MTD_NANDECC_AUTOPL_USR) | |
1da177e4 LT |
1210 | oob_data = &this->data_buf[end]; |
1211 | ||
1212 | eccsteps = this->eccsteps; | |
61b03bd7 | 1213 | |
1da177e4 | 1214 | switch (eccmode) { |
e0c7d767 DW |
1215 | case NAND_ECC_NONE:{ |
1216 | /* No ECC, Read in a page */ | |
1217 | static unsigned long lastwhinge = 0; | |
1218 | if ((lastwhinge / HZ) != (jiffies / HZ)) { | |
1219 | printk(KERN_WARNING | |
1220 | "Reading data from NAND FLASH without ECC is not recommended\n"); | |
1221 | lastwhinge = jiffies; | |
1222 | } | |
1223 | this->read_buf(mtd, data_poi, end); | |
1224 | break; | |
1da177e4 | 1225 | } |
61b03bd7 | 1226 | |
1da177e4 LT |
1227 | case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */ |
1228 | this->read_buf(mtd, data_poi, end); | |
e0c7d767 | 1229 | for (i = 0, datidx = 0; eccsteps; eccsteps--, i += 3, datidx += ecc) |
1da177e4 | 1230 | this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]); |
61b03bd7 | 1231 | break; |
1da177e4 LT |
1232 | |
1233 | default: | |
e0c7d767 | 1234 | for (i = 0, datidx = 0; eccsteps; eccsteps--, i += eccbytes, datidx += ecc) { |
1da177e4 LT |
1235 | this->enable_hwecc(mtd, NAND_ECC_READ); |
1236 | this->read_buf(mtd, &data_poi[datidx], ecc); | |
1237 | ||
1238 | /* HW ecc with syndrome calculation must read the | |
1239 | * syndrome from flash immidiately after the data */ | |
1240 | if (!compareecc) { | |
1241 | /* Some hw ecc generators need to know when the | |
1242 | * syndrome is read from flash */ | |
1243 | this->enable_hwecc(mtd, NAND_ECC_READSYN); | |
1244 | this->read_buf(mtd, &oob_data[i], eccbytes); | |
1245 | /* We calc error correction directly, it checks the hw | |
1246 | * generator for an error, reads back the syndrome and | |
1247 | * does the error correction on the fly */ | |
068e3c0a DM |
1248 | ecc_status = this->correct_data(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]); |
1249 | if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) { | |
e0c7d767 DW |
1250 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: " |
1251 | "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr); | |
1da177e4 LT |
1252 | ecc_failed++; |
1253 | } | |
1254 | } else { | |
1255 | this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]); | |
61b03bd7 | 1256 | } |
1da177e4 | 1257 | } |
61b03bd7 | 1258 | break; |
1da177e4 LT |
1259 | } |
1260 | ||
1261 | /* read oobdata */ | |
1262 | this->read_buf(mtd, &oob_data[mtd->oobsize - oobreadlen], oobreadlen); | |
1263 | ||
1264 | /* Skip ECC check, if not requested (ECC_NONE or HW_ECC with syndromes) */ | |
1265 | if (!compareecc) | |
61b03bd7 TG |
1266 | goto readoob; |
1267 | ||
1da177e4 LT |
1268 | /* Pick the ECC bytes out of the oob data */ |
1269 | for (j = 0; j < oobsel->eccbytes; j++) | |
1270 | ecc_code[j] = oob_data[oob_config[j]]; | |
1271 | ||
e0c7d767 | 1272 | /* correct data, if necessary */ |
1da177e4 LT |
1273 | for (i = 0, j = 0, datidx = 0; i < this->eccsteps; i++, datidx += ecc) { |
1274 | ecc_status = this->correct_data(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]); | |
61b03bd7 | 1275 | |
1da177e4 LT |
1276 | /* Get next chunk of ecc bytes */ |
1277 | j += eccbytes; | |
61b03bd7 TG |
1278 | |
1279 | /* Check, if we have a fs supplied oob-buffer, | |
1da177e4 LT |
1280 | * This is the legacy mode. Used by YAFFS1 |
1281 | * Should go away some day | |
1282 | */ | |
61b03bd7 | 1283 | if (oob_buf && oobsel->useecc == MTD_NANDECC_PLACE) { |
1da177e4 LT |
1284 | int *p = (int *)(&oob_data[mtd->oobsize]); |
1285 | p[i] = ecc_status; | |
1286 | } | |
61b03bd7 TG |
1287 | |
1288 | if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) { | |
e0c7d767 | 1289 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page); |
1da177e4 LT |
1290 | ecc_failed++; |
1291 | } | |
61b03bd7 | 1292 | } |
1da177e4 | 1293 | |
e0c7d767 | 1294 | readoob: |
1da177e4 LT |
1295 | /* check, if we have a fs supplied oob-buffer */ |
1296 | if (oob_buf) { | |
1297 | /* without autoplace. Legacy mode used by YAFFS1 */ | |
e0c7d767 | 1298 | switch (oobsel->useecc) { |
1da177e4 | 1299 | case MTD_NANDECC_AUTOPLACE: |
90e260c8 | 1300 | case MTD_NANDECC_AUTOPL_USR: |
1da177e4 | 1301 | /* Walk through the autoplace chunks */ |
82e1d19f | 1302 | for (i = 0; oobsel->oobfree[i][1]; i++) { |
1da177e4 LT |
1303 | int from = oobsel->oobfree[i][0]; |
1304 | int num = oobsel->oobfree[i][1]; | |
1305 | memcpy(&oob_buf[oob], &oob_data[from], num); | |
82e1d19f | 1306 | oob += num; |
1da177e4 | 1307 | } |
1da177e4 LT |
1308 | break; |
1309 | case MTD_NANDECC_PLACE: | |
1310 | /* YAFFS1 legacy mode */ | |
e0c7d767 | 1311 | oob_data += this->eccsteps * sizeof(int); |
1da177e4 LT |
1312 | default: |
1313 | oob_data += mtd->oobsize; | |
1314 | } | |
1315 | } | |
1316 | readdata: | |
1317 | /* Partial page read, transfer data into fs buffer */ | |
61b03bd7 | 1318 | if (!aligned) { |
1da177e4 LT |
1319 | for (j = col; j < end && read < len; j++) |
1320 | buf[read++] = data_poi[j]; | |
61b03bd7 TG |
1321 | this->pagebuf = realpage; |
1322 | } else | |
1da177e4 LT |
1323 | read += mtd->oobblock; |
1324 | ||
61b03bd7 | 1325 | /* Apply delay or wait for ready/busy pin |
1da177e4 LT |
1326 | * Do this before the AUTOINCR check, so no problems |
1327 | * arise if a chip which does auto increment | |
1328 | * is marked as NOAUTOINCR by the board driver. | |
e0c7d767 | 1329 | */ |
61b03bd7 | 1330 | if (!this->dev_ready) |
e0c7d767 | 1331 | udelay(this->chip_delay); |
1da177e4 | 1332 | else |
3b88775c | 1333 | nand_wait_ready(mtd); |
61b03bd7 | 1334 | |
1da177e4 | 1335 | if (read == len) |
61b03bd7 | 1336 | break; |
1da177e4 LT |
1337 | |
1338 | /* For subsequent reads align to page boundary. */ | |
1339 | col = 0; | |
1340 | /* Increment page address */ | |
1341 | realpage++; | |
1342 | ||
1343 | page = realpage & this->pagemask; | |
1344 | /* Check, if we cross a chip boundary */ | |
1345 | if (!page) { | |
1346 | chipnr++; | |
1347 | this->select_chip(mtd, -1); | |
1348 | this->select_chip(mtd, chipnr); | |
1349 | } | |
61b03bd7 TG |
1350 | /* Check, if the chip supports auto page increment |
1351 | * or if we have hit a block boundary. | |
e0c7d767 | 1352 | */ |
1da177e4 | 1353 | if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) |
61b03bd7 | 1354 | sndcmd = 1; |
1da177e4 LT |
1355 | } |
1356 | ||
1357 | /* Deselect and wake up anyone waiting on the device */ | |
068e3c0a DM |
1358 | if (flags & NAND_GET_DEVICE) |
1359 | nand_release_device(mtd); | |
1da177e4 LT |
1360 | |
1361 | /* | |
1362 | * Return success, if no ECC failures, else -EBADMSG | |
1363 | * fs driver will take care of that, because | |
1364 | * retlen == desired len and result == -EBADMSG | |
1365 | */ | |
1366 | *retlen = read; | |
1367 | return ecc_failed ? -EBADMSG : 0; | |
1368 | } | |
1369 | ||
1370 | /** | |
1371 | * nand_read_oob - [MTD Interface] NAND read out-of-band | |
1372 | * @mtd: MTD device structure | |
1373 | * @from: offset to read from | |
1374 | * @len: number of bytes to read | |
1375 | * @retlen: pointer to variable to store the number of read bytes | |
1376 | * @buf: the databuffer to put data | |
1377 | * | |
1378 | * NAND read out-of-band data from the spare area | |
1379 | */ | |
e0c7d767 | 1380 | static int nand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf) |
1da177e4 LT |
1381 | { |
1382 | int i, col, page, chipnr; | |
1383 | struct nand_chip *this = mtd->priv; | |
e0c7d767 | 1384 | int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1; |
1da177e4 | 1385 | |
e0c7d767 | 1386 | DEBUG(MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int)from, (int)len); |
1da177e4 LT |
1387 | |
1388 | /* Shift to get page */ | |
1389 | page = (int)(from >> this->page_shift); | |
1390 | chipnr = (int)(from >> this->chip_shift); | |
61b03bd7 | 1391 | |
1da177e4 LT |
1392 | /* Mask to get column */ |
1393 | col = from & (mtd->oobsize - 1); | |
1394 | ||
1395 | /* Initialize return length value */ | |
1396 | *retlen = 0; | |
1397 | ||
1398 | /* Do not allow reads past end of device */ | |
1399 | if ((from + len) > mtd->size) { | |
e0c7d767 | 1400 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n"); |
1da177e4 LT |
1401 | *retlen = 0; |
1402 | return -EINVAL; | |
1403 | } | |
1404 | ||
1405 | /* Grab the lock and see if the device is available */ | |
e0c7d767 | 1406 | nand_get_device(this, mtd, FL_READING); |
1da177e4 LT |
1407 | |
1408 | /* Select the NAND device */ | |
1409 | this->select_chip(mtd, chipnr); | |
1410 | ||
1411 | /* Send the read command */ | |
e0c7d767 | 1412 | this->cmdfunc(mtd, NAND_CMD_READOOB, col, page & this->pagemask); |
61b03bd7 | 1413 | /* |
1da177e4 LT |
1414 | * Read the data, if we read more than one page |
1415 | * oob data, let the device transfer the data ! | |
1416 | */ | |
1417 | i = 0; | |
1418 | while (i < len) { | |
1419 | int thislen = mtd->oobsize - col; | |
1420 | thislen = min_t(int, thislen, len); | |
1421 | this->read_buf(mtd, &buf[i], thislen); | |
1422 | i += thislen; | |
1da177e4 LT |
1423 | |
1424 | /* Read more ? */ | |
1425 | if (i < len) { | |
1426 | page++; | |
1427 | col = 0; | |
1428 | ||
1429 | /* Check, if we cross a chip boundary */ | |
1430 | if (!(page & this->pagemask)) { | |
1431 | chipnr++; | |
1432 | this->select_chip(mtd, -1); | |
1433 | this->select_chip(mtd, chipnr); | |
1434 | } | |
61b03bd7 TG |
1435 | |
1436 | /* Apply delay or wait for ready/busy pin | |
19870da7 TG |
1437 | * Do this before the AUTOINCR check, so no problems |
1438 | * arise if a chip which does auto increment | |
1439 | * is marked as NOAUTOINCR by the board driver. | |
1440 | */ | |
61b03bd7 | 1441 | if (!this->dev_ready) |
e0c7d767 | 1442 | udelay(this->chip_delay); |
19870da7 TG |
1443 | else |
1444 | nand_wait_ready(mtd); | |
1445 | ||
61b03bd7 TG |
1446 | /* Check, if the chip supports auto page increment |
1447 | * or if we have hit a block boundary. | |
e0c7d767 | 1448 | */ |
1da177e4 LT |
1449 | if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) { |
1450 | /* For subsequent page reads set offset to 0 */ | |
e0c7d767 | 1451 | this->cmdfunc(mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask); |
1da177e4 LT |
1452 | } |
1453 | } | |
1454 | } | |
1455 | ||
1456 | /* Deselect and wake up anyone waiting on the device */ | |
1457 | nand_release_device(mtd); | |
1458 | ||
1459 | /* Return happy */ | |
1460 | *retlen = len; | |
1461 | return 0; | |
1462 | } | |
1463 | ||
1464 | /** | |
1465 | * nand_read_raw - [GENERIC] Read raw data including oob into buffer | |
1466 | * @mtd: MTD device structure | |
1467 | * @buf: temporary buffer | |
1468 | * @from: offset to read from | |
1469 | * @len: number of bytes to read | |
1470 | * @ooblen: number of oob data bytes to read | |
1471 | * | |
1472 | * Read raw data including oob into buffer | |
1473 | */ | |
e0c7d767 | 1474 | int nand_read_raw(struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen) |
1da177e4 LT |
1475 | { |
1476 | struct nand_chip *this = mtd->priv; | |
e0c7d767 DW |
1477 | int page = (int)(from >> this->page_shift); |
1478 | int chip = (int)(from >> this->chip_shift); | |
1da177e4 LT |
1479 | int sndcmd = 1; |
1480 | int cnt = 0; | |
1481 | int pagesize = mtd->oobblock + mtd->oobsize; | |
e0c7d767 | 1482 | int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1; |
1da177e4 LT |
1483 | |
1484 | /* Do not allow reads past end of device */ | |
1485 | if ((from + len) > mtd->size) { | |
e0c7d767 | 1486 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt read beyond end of device\n"); |
1da177e4 LT |
1487 | return -EINVAL; |
1488 | } | |
1489 | ||
1490 | /* Grab the lock and see if the device is available */ | |
e0c7d767 | 1491 | nand_get_device(this, mtd, FL_READING); |
1da177e4 | 1492 | |
e0c7d767 | 1493 | this->select_chip(mtd, chip); |
61b03bd7 | 1494 | |
1da177e4 LT |
1495 | /* Add requested oob length */ |
1496 | len += ooblen; | |
61b03bd7 | 1497 | |
1da177e4 LT |
1498 | while (len) { |
1499 | if (sndcmd) | |
e0c7d767 | 1500 | this->cmdfunc(mtd, NAND_CMD_READ0, 0, page & this->pagemask); |
61b03bd7 | 1501 | sndcmd = 0; |
1da177e4 | 1502 | |
e0c7d767 | 1503 | this->read_buf(mtd, &buf[cnt], pagesize); |
1da177e4 LT |
1504 | |
1505 | len -= pagesize; | |
1506 | cnt += pagesize; | |
1507 | page++; | |
61b03bd7 TG |
1508 | |
1509 | if (!this->dev_ready) | |
e0c7d767 | 1510 | udelay(this->chip_delay); |
1da177e4 | 1511 | else |
3b88775c | 1512 | nand_wait_ready(mtd); |
61b03bd7 TG |
1513 | |
1514 | /* Check, if the chip supports auto page increment */ | |
1da177e4 LT |
1515 | if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) |
1516 | sndcmd = 1; | |
1517 | } | |
1518 | ||
1519 | /* Deselect and wake up anyone waiting on the device */ | |
1520 | nand_release_device(mtd); | |
1521 | return 0; | |
1522 | } | |
1523 | ||
61b03bd7 TG |
1524 | /** |
1525 | * nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer | |
1da177e4 LT |
1526 | * @mtd: MTD device structure |
1527 | * @fsbuf: buffer given by fs driver | |
1528 | * @oobsel: out of band selection structre | |
1529 | * @autoplace: 1 = place given buffer into the oob bytes | |
1530 | * @numpages: number of pages to prepare | |
1531 | * | |
1532 | * Return: | |
1533 | * 1. Filesystem buffer available and autoplacement is off, | |
1534 | * return filesystem buffer | |
1535 | * 2. No filesystem buffer or autoplace is off, return internal | |
1536 | * buffer | |
1537 | * 3. Filesystem buffer is given and autoplace selected | |
1538 | * put data from fs buffer into internal buffer and | |
1539 | * retrun internal buffer | |
1540 | * | |
1541 | * Note: The internal buffer is filled with 0xff. This must | |
1542 | * be done only once, when no autoplacement happens | |
1543 | * Autoplacement sets the buffer dirty flag, which | |
1544 | * forces the 0xff fill before using the buffer again. | |
1545 | * | |
1546 | */ | |
e0c7d767 DW |
1547 | static u_char *nand_prepare_oobbuf(struct mtd_info *mtd, u_char *fsbuf, struct nand_oobinfo *oobsel, |
1548 | int autoplace, int numpages) | |
1da177e4 LT |
1549 | { |
1550 | struct nand_chip *this = mtd->priv; | |
1551 | int i, len, ofs; | |
1552 | ||
1553 | /* Zero copy fs supplied buffer */ | |
61b03bd7 | 1554 | if (fsbuf && !autoplace) |
1da177e4 LT |
1555 | return fsbuf; |
1556 | ||
1557 | /* Check, if the buffer must be filled with ff again */ | |
61b03bd7 | 1558 | if (this->oobdirty) { |
e0c7d767 | 1559 | memset(this->oob_buf, 0xff, mtd->oobsize << (this->phys_erase_shift - this->page_shift)); |
1da177e4 | 1560 | this->oobdirty = 0; |
61b03bd7 TG |
1561 | } |
1562 | ||
1da177e4 LT |
1563 | /* If we have no autoplacement or no fs buffer use the internal one */ |
1564 | if (!autoplace || !fsbuf) | |
1565 | return this->oob_buf; | |
61b03bd7 | 1566 | |
1da177e4 LT |
1567 | /* Walk through the pages and place the data */ |
1568 | this->oobdirty = 1; | |
1569 | ofs = 0; | |
1570 | while (numpages--) { | |
1571 | for (i = 0, len = 0; len < mtd->oobavail; i++) { | |
1572 | int to = ofs + oobsel->oobfree[i][0]; | |
1573 | int num = oobsel->oobfree[i][1]; | |
e0c7d767 | 1574 | memcpy(&this->oob_buf[to], fsbuf, num); |
1da177e4 LT |
1575 | len += num; |
1576 | fsbuf += num; | |
1577 | } | |
1578 | ofs += mtd->oobavail; | |
1579 | } | |
1580 | return this->oob_buf; | |
1581 | } | |
1582 | ||
1583 | #define NOTALIGNED(x) (x & (mtd->oobblock-1)) != 0 | |
1584 | ||
1585 | /** | |
1586 | * nand_write - [MTD Interface] compability function for nand_write_ecc | |
1587 | * @mtd: MTD device structure | |
1588 | * @to: offset to write to | |
1589 | * @len: number of bytes to write | |
1590 | * @retlen: pointer to variable to store the number of written bytes | |
1591 | * @buf: the data to write | |
1592 | * | |
1593 | * This function simply calls nand_write_ecc with oob buffer and oobsel = NULL | |
1594 | * | |
1595 | */ | |
e0c7d767 | 1596 | static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf) |
1da177e4 | 1597 | { |
e0c7d767 | 1598 | return (nand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL)); |
1da177e4 | 1599 | } |
61b03bd7 | 1600 | |
1da177e4 LT |
1601 | /** |
1602 | * nand_write_ecc - [MTD Interface] NAND write with ECC | |
1603 | * @mtd: MTD device structure | |
1604 | * @to: offset to write to | |
1605 | * @len: number of bytes to write | |
1606 | * @retlen: pointer to variable to store the number of written bytes | |
1607 | * @buf: the data to write | |
1608 | * @eccbuf: filesystem supplied oob data buffer | |
1609 | * @oobsel: oob selection structure | |
1610 | * | |
1611 | * NAND write with ECC | |
1612 | */ | |
e0c7d767 DW |
1613 | static int nand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len, |
1614 | size_t *retlen, const u_char *buf, u_char *eccbuf, | |
1615 | struct nand_oobinfo *oobsel) | |
1da177e4 LT |
1616 | { |
1617 | int startpage, page, ret = -EIO, oob = 0, written = 0, chipnr; | |
1618 | int autoplace = 0, numpages, totalpages; | |
1619 | struct nand_chip *this = mtd->priv; | |
1620 | u_char *oobbuf, *bufstart; | |
e0c7d767 | 1621 | int ppblock = (1 << (this->phys_erase_shift - this->page_shift)); |
1da177e4 | 1622 | |
e0c7d767 | 1623 | DEBUG(MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int)to, (int)len); |
1da177e4 LT |
1624 | |
1625 | /* Initialize retlen, in case of early exit */ | |
1626 | *retlen = 0; | |
1627 | ||
1628 | /* Do not allow write past end of device */ | |
1629 | if ((to + len) > mtd->size) { | |
e0c7d767 | 1630 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: Attempt to write past end of page\n"); |
1da177e4 LT |
1631 | return -EINVAL; |
1632 | } | |
1633 | ||
61b03bd7 | 1634 | /* reject writes, which are not page aligned */ |
e0c7d767 DW |
1635 | if (NOTALIGNED(to) || NOTALIGNED(len)) { |
1636 | printk(KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n"); | |
1da177e4 LT |
1637 | return -EINVAL; |
1638 | } | |
1639 | ||
1640 | /* Grab the lock and see if the device is available */ | |
e0c7d767 | 1641 | nand_get_device(this, mtd, FL_WRITING); |
1da177e4 LT |
1642 | |
1643 | /* Calculate chipnr */ | |
1644 | chipnr = (int)(to >> this->chip_shift); | |
1645 | /* Select the NAND device */ | |
1646 | this->select_chip(mtd, chipnr); | |
1647 | ||
1648 | /* Check, if it is write protected */ | |
1649 | if (nand_check_wp(mtd)) | |
1650 | goto out; | |
1651 | ||
1652 | /* if oobsel is NULL, use chip defaults */ | |
61b03bd7 TG |
1653 | if (oobsel == NULL) |
1654 | oobsel = &mtd->oobinfo; | |
1655 | ||
1da177e4 LT |
1656 | /* Autoplace of oob data ? Use the default placement scheme */ |
1657 | if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) { | |
1658 | oobsel = this->autooob; | |
1659 | autoplace = 1; | |
61b03bd7 | 1660 | } |
90e260c8 TG |
1661 | if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR) |
1662 | autoplace = 1; | |
1da177e4 LT |
1663 | |
1664 | /* Setup variables and oob buffer */ | |
1665 | totalpages = len >> this->page_shift; | |
e0c7d767 | 1666 | page = (int)(to >> this->page_shift); |
1da177e4 | 1667 | /* Invalidate the page cache, if we write to the cached page */ |
61b03bd7 | 1668 | if (page <= this->pagebuf && this->pagebuf < (page + totalpages)) |
1da177e4 | 1669 | this->pagebuf = -1; |
61b03bd7 | 1670 | |
1da177e4 LT |
1671 | /* Set it relative to chip */ |
1672 | page &= this->pagemask; | |
1673 | startpage = page; | |
1674 | /* Calc number of pages we can write in one go */ | |
e0c7d767 DW |
1675 | numpages = min(ppblock - (startpage & (ppblock - 1)), totalpages); |
1676 | oobbuf = nand_prepare_oobbuf(mtd, eccbuf, oobsel, autoplace, numpages); | |
1677 | bufstart = (u_char *) buf; | |
1da177e4 LT |
1678 | |
1679 | /* Loop until all data is written */ | |
1680 | while (written < len) { | |
1681 | ||
e0c7d767 | 1682 | this->data_poi = (u_char *) &buf[written]; |
1da177e4 LT |
1683 | /* Write one page. If this is the last page to write |
1684 | * or the last page in this block, then use the | |
1685 | * real pageprogram command, else select cached programming | |
1686 | * if supported by the chip. | |
1687 | */ | |
e0c7d767 | 1688 | ret = nand_write_page(mtd, this, page, &oobbuf[oob], oobsel, (--numpages > 0)); |
1da177e4 | 1689 | if (ret) { |
e0c7d767 | 1690 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: write_page failed %d\n", ret); |
1da177e4 | 1691 | goto out; |
61b03bd7 | 1692 | } |
1da177e4 LT |
1693 | /* Next oob page */ |
1694 | oob += mtd->oobsize; | |
1695 | /* Update written bytes count */ | |
1696 | written += mtd->oobblock; | |
61b03bd7 | 1697 | if (written == len) |
1da177e4 | 1698 | goto cmp; |
61b03bd7 | 1699 | |
1da177e4 LT |
1700 | /* Increment page address */ |
1701 | page++; | |
1702 | ||
1703 | /* Have we hit a block boundary ? Then we have to verify and | |
1704 | * if verify is ok, we have to setup the oob buffer for | |
1705 | * the next pages. | |
e0c7d767 DW |
1706 | */ |
1707 | if (!(page & (ppblock - 1))) { | |
1da177e4 LT |
1708 | int ofs; |
1709 | this->data_poi = bufstart; | |
e0c7d767 DW |
1710 | ret = nand_verify_pages(mtd, this, startpage, page - startpage, |
1711 | oobbuf, oobsel, chipnr, (eccbuf != NULL)); | |
1da177e4 | 1712 | if (ret) { |
e0c7d767 | 1713 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret); |
1da177e4 | 1714 | goto out; |
61b03bd7 | 1715 | } |
1da177e4 LT |
1716 | *retlen = written; |
1717 | ||
1718 | ofs = autoplace ? mtd->oobavail : mtd->oobsize; | |
1719 | if (eccbuf) | |
1720 | eccbuf += (page - startpage) * ofs; | |
1721 | totalpages -= page - startpage; | |
e0c7d767 | 1722 | numpages = min(totalpages, ppblock); |
1da177e4 LT |
1723 | page &= this->pagemask; |
1724 | startpage = page; | |
e0c7d767 | 1725 | oobbuf = nand_prepare_oobbuf(mtd, eccbuf, oobsel, autoplace, numpages); |
868801e5 | 1726 | oob = 0; |
1da177e4 LT |
1727 | /* Check, if we cross a chip boundary */ |
1728 | if (!page) { | |
1729 | chipnr++; | |
1730 | this->select_chip(mtd, -1); | |
1731 | this->select_chip(mtd, chipnr); | |
1732 | } | |
1733 | } | |
1734 | } | |
1735 | /* Verify the remaining pages */ | |
e0c7d767 | 1736 | cmp: |
1da177e4 | 1737 | this->data_poi = bufstart; |
e0c7d767 | 1738 | ret = nand_verify_pages(mtd, this, startpage, totalpages, oobbuf, oobsel, chipnr, (eccbuf != NULL)); |
1da177e4 LT |
1739 | if (!ret) |
1740 | *retlen = written; | |
61b03bd7 | 1741 | else |
e0c7d767 | 1742 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret); |
1da177e4 | 1743 | |
e0c7d767 | 1744 | out: |
1da177e4 LT |
1745 | /* Deselect and wake up anyone waiting on the device */ |
1746 | nand_release_device(mtd); | |
1747 | ||
1748 | return ret; | |
1749 | } | |
1750 | ||
1da177e4 LT |
1751 | /** |
1752 | * nand_write_oob - [MTD Interface] NAND write out-of-band | |
1753 | * @mtd: MTD device structure | |
1754 | * @to: offset to write to | |
1755 | * @len: number of bytes to write | |
1756 | * @retlen: pointer to variable to store the number of written bytes | |
1757 | * @buf: the data to write | |
1758 | * | |
1759 | * NAND write out-of-band | |
1760 | */ | |
e0c7d767 | 1761 | static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf) |
1da177e4 LT |
1762 | { |
1763 | int column, page, status, ret = -EIO, chipnr; | |
1764 | struct nand_chip *this = mtd->priv; | |
1765 | ||
e0c7d767 | 1766 | DEBUG(MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int)to, (int)len); |
1da177e4 LT |
1767 | |
1768 | /* Shift to get page */ | |
e0c7d767 DW |
1769 | page = (int)(to >> this->page_shift); |
1770 | chipnr = (int)(to >> this->chip_shift); | |
1da177e4 LT |
1771 | |
1772 | /* Mask to get column */ | |
1773 | column = to & (mtd->oobsize - 1); | |
1774 | ||
1775 | /* Initialize return length value */ | |
1776 | *retlen = 0; | |
1777 | ||
1778 | /* Do not allow write past end of page */ | |
1779 | if ((column + len) > mtd->oobsize) { | |
e0c7d767 | 1780 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n"); |
1da177e4 LT |
1781 | return -EINVAL; |
1782 | } | |
1783 | ||
1784 | /* Grab the lock and see if the device is available */ | |
e0c7d767 | 1785 | nand_get_device(this, mtd, FL_WRITING); |
1da177e4 LT |
1786 | |
1787 | /* Select the NAND device */ | |
1788 | this->select_chip(mtd, chipnr); | |
1789 | ||
1790 | /* Reset the chip. Some chips (like the Toshiba TC5832DC found | |
1791 | in one of my DiskOnChip 2000 test units) will clear the whole | |
1792 | data page too if we don't do this. I have no clue why, but | |
1793 | I seem to have 'fixed' it in the doc2000 driver in | |
1794 | August 1999. dwmw2. */ | |
1795 | this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); | |
1796 | ||
1797 | /* Check, if it is write protected */ | |
1798 | if (nand_check_wp(mtd)) | |
1799 | goto out; | |
61b03bd7 | 1800 | |
1da177e4 LT |
1801 | /* Invalidate the page cache, if we write to the cached page */ |
1802 | if (page == this->pagebuf) | |
1803 | this->pagebuf = -1; | |
1804 | ||
1805 | if (NAND_MUST_PAD(this)) { | |
1806 | /* Write out desired data */ | |
e0c7d767 | 1807 | this->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->oobblock, page & this->pagemask); |
1da177e4 LT |
1808 | /* prepad 0xff for partial programming */ |
1809 | this->write_buf(mtd, ffchars, column); | |
1810 | /* write data */ | |
1811 | this->write_buf(mtd, buf, len); | |
1812 | /* postpad 0xff for partial programming */ | |
e0c7d767 | 1813 | this->write_buf(mtd, ffchars, mtd->oobsize - (len + column)); |
1da177e4 LT |
1814 | } else { |
1815 | /* Write out desired data */ | |
e0c7d767 | 1816 | this->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->oobblock + column, page & this->pagemask); |
1da177e4 LT |
1817 | /* write data */ |
1818 | this->write_buf(mtd, buf, len); | |
1819 | } | |
1820 | /* Send command to program the OOB data */ | |
e0c7d767 | 1821 | this->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
1da177e4 | 1822 | |
e0c7d767 | 1823 | status = this->waitfunc(mtd, this, FL_WRITING); |
1da177e4 LT |
1824 | |
1825 | /* See if device thinks it succeeded */ | |
a4ab4c5d | 1826 | if (status & NAND_STATUS_FAIL) { |
e0c7d767 | 1827 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page); |
1da177e4 LT |
1828 | ret = -EIO; |
1829 | goto out; | |
1830 | } | |
1831 | /* Return happy */ | |
1832 | *retlen = len; | |
1833 | ||
1834 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE | |
1835 | /* Send command to read back the data */ | |
e0c7d767 | 1836 | this->cmdfunc(mtd, NAND_CMD_READOOB, column, page & this->pagemask); |
1da177e4 LT |
1837 | |
1838 | if (this->verify_buf(mtd, buf, len)) { | |
e0c7d767 | 1839 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page); |
1da177e4 LT |
1840 | ret = -EIO; |
1841 | goto out; | |
1842 | } | |
1843 | #endif | |
1844 | ret = 0; | |
e0c7d767 | 1845 | out: |
1da177e4 LT |
1846 | /* Deselect and wake up anyone waiting on the device */ |
1847 | nand_release_device(mtd); | |
1848 | ||
1849 | return ret; | |
1850 | } | |
1851 | ||
1da177e4 LT |
1852 | /** |
1853 | * nand_writev - [MTD Interface] compabilty function for nand_writev_ecc | |
1854 | * @mtd: MTD device structure | |
1855 | * @vecs: the iovectors to write | |
1856 | * @count: number of vectors | |
1857 | * @to: offset to write to | |
1858 | * @retlen: pointer to variable to store the number of written bytes | |
1859 | * | |
1860 | * NAND write with kvec. This just calls the ecc function | |
1861 | */ | |
e0c7d767 DW |
1862 | static int nand_writev(struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, |
1863 | loff_t to, size_t *retlen) | |
1da177e4 | 1864 | { |
e0c7d767 | 1865 | return (nand_writev_ecc(mtd, vecs, count, to, retlen, NULL, NULL)); |
1da177e4 LT |
1866 | } |
1867 | ||
1868 | /** | |
1869 | * nand_writev_ecc - [MTD Interface] write with iovec with ecc | |
1870 | * @mtd: MTD device structure | |
1871 | * @vecs: the iovectors to write | |
1872 | * @count: number of vectors | |
1873 | * @to: offset to write to | |
1874 | * @retlen: pointer to variable to store the number of written bytes | |
1875 | * @eccbuf: filesystem supplied oob data buffer | |
1876 | * @oobsel: oob selection structure | |
1877 | * | |
1878 | * NAND write with iovec with ecc | |
1879 | */ | |
e0c7d767 DW |
1880 | static int nand_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, |
1881 | loff_t to, size_t *retlen, u_char *eccbuf, struct nand_oobinfo *oobsel) | |
1da177e4 LT |
1882 | { |
1883 | int i, page, len, total_len, ret = -EIO, written = 0, chipnr; | |
1884 | int oob, numpages, autoplace = 0, startpage; | |
1885 | struct nand_chip *this = mtd->priv; | |
e0c7d767 | 1886 | int ppblock = (1 << (this->phys_erase_shift - this->page_shift)); |
1da177e4 LT |
1887 | u_char *oobbuf, *bufstart; |
1888 | ||
1889 | /* Preset written len for early exit */ | |
1890 | *retlen = 0; | |
1891 | ||
1892 | /* Calculate total length of data */ | |
1893 | total_len = 0; | |
1894 | for (i = 0; i < count; i++) | |
e0c7d767 | 1895 | total_len += (int)vecs[i].iov_len; |
1da177e4 | 1896 | |
e0c7d767 | 1897 | DEBUG(MTD_DEBUG_LEVEL3, "nand_writev: to = 0x%08x, len = %i, count = %ld\n", (unsigned int)to, (unsigned int)total_len, count); |
1da177e4 LT |
1898 | |
1899 | /* Do not allow write past end of page */ | |
1900 | if ((to + total_len) > mtd->size) { | |
e0c7d767 | 1901 | DEBUG(MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n"); |
1da177e4 LT |
1902 | return -EINVAL; |
1903 | } | |
1904 | ||
61b03bd7 | 1905 | /* reject writes, which are not page aligned */ |
e0c7d767 DW |
1906 | if (NOTALIGNED(to) || NOTALIGNED(total_len)) { |
1907 | printk(KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n"); | |
1da177e4 LT |
1908 | return -EINVAL; |
1909 | } | |
1910 | ||
1911 | /* Grab the lock and see if the device is available */ | |
e0c7d767 | 1912 | nand_get_device(this, mtd, FL_WRITING); |
1da177e4 LT |
1913 | |
1914 | /* Get the current chip-nr */ | |
e0c7d767 | 1915 | chipnr = (int)(to >> this->chip_shift); |
1da177e4 LT |
1916 | /* Select the NAND device */ |
1917 | this->select_chip(mtd, chipnr); | |
1918 | ||
1919 | /* Check, if it is write protected */ | |
1920 | if (nand_check_wp(mtd)) | |
1921 | goto out; | |
1922 | ||
1923 | /* if oobsel is NULL, use chip defaults */ | |
61b03bd7 TG |
1924 | if (oobsel == NULL) |
1925 | oobsel = &mtd->oobinfo; | |
1da177e4 LT |
1926 | |
1927 | /* Autoplace of oob data ? Use the default placement scheme */ | |
1928 | if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) { | |
1929 | oobsel = this->autooob; | |
1930 | autoplace = 1; | |
61b03bd7 | 1931 | } |
90e260c8 TG |
1932 | if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR) |
1933 | autoplace = 1; | |
1da177e4 LT |
1934 | |
1935 | /* Setup start page */ | |
e0c7d767 | 1936 | page = (int)(to >> this->page_shift); |
1da177e4 | 1937 | /* Invalidate the page cache, if we write to the cached page */ |
61b03bd7 | 1938 | if (page <= this->pagebuf && this->pagebuf < ((to + total_len) >> this->page_shift)) |
1da177e4 LT |
1939 | this->pagebuf = -1; |
1940 | ||
1941 | startpage = page & this->pagemask; | |
1942 | ||
1943 | /* Loop until all kvec' data has been written */ | |
1944 | len = 0; | |
1945 | while (count) { | |
1946 | /* If the given tuple is >= pagesize then | |
1947 | * write it out from the iov | |
1948 | */ | |
1949 | if ((vecs->iov_len - len) >= mtd->oobblock) { | |
1950 | /* Calc number of pages we can write | |
1951 | * out of this iov in one go */ | |
1952 | numpages = (vecs->iov_len - len) >> this->page_shift; | |
1953 | /* Do not cross block boundaries */ | |
e0c7d767 DW |
1954 | numpages = min(ppblock - (startpage & (ppblock - 1)), numpages); |
1955 | oobbuf = nand_prepare_oobbuf(mtd, NULL, oobsel, autoplace, numpages); | |
1956 | bufstart = (u_char *) vecs->iov_base; | |
1da177e4 LT |
1957 | bufstart += len; |
1958 | this->data_poi = bufstart; | |
1959 | oob = 0; | |
1960 | for (i = 1; i <= numpages; i++) { | |
1961 | /* Write one page. If this is the last page to write | |
61b03bd7 | 1962 | * then use the real pageprogram command, else select |
1da177e4 LT |
1963 | * cached programming if supported by the chip. |
1964 | */ | |
e0c7d767 DW |
1965 | ret = nand_write_page(mtd, this, page & this->pagemask, |
1966 | &oobbuf[oob], oobsel, i != numpages); | |
1da177e4 LT |
1967 | if (ret) |
1968 | goto out; | |
1969 | this->data_poi += mtd->oobblock; | |
1970 | len += mtd->oobblock; | |
1971 | oob += mtd->oobsize; | |
1972 | page++; | |
1973 | } | |
1974 | /* Check, if we have to switch to the next tuple */ | |
e0c7d767 | 1975 | if (len >= (int)vecs->iov_len) { |
1da177e4 LT |
1976 | vecs++; |
1977 | len = 0; | |
1978 | count--; | |
1979 | } | |
1980 | } else { | |
61b03bd7 | 1981 | /* We must use the internal buffer, read data out of each |
1da177e4 LT |
1982 | * tuple until we have a full page to write |
1983 | */ | |
1984 | int cnt = 0; | |
1985 | while (cnt < mtd->oobblock) { | |
61b03bd7 | 1986 | if (vecs->iov_base != NULL && vecs->iov_len) |
1da177e4 LT |
1987 | this->data_buf[cnt++] = ((u_char *) vecs->iov_base)[len++]; |
1988 | /* Check, if we have to switch to the next tuple */ | |
e0c7d767 | 1989 | if (len >= (int)vecs->iov_len) { |
1da177e4 LT |
1990 | vecs++; |
1991 | len = 0; | |
1992 | count--; | |
1993 | } | |
1994 | } | |
61b03bd7 TG |
1995 | this->pagebuf = page; |
1996 | this->data_poi = this->data_buf; | |
1da177e4 | 1997 | bufstart = this->data_poi; |
61b03bd7 | 1998 | numpages = 1; |
e0c7d767 DW |
1999 | oobbuf = nand_prepare_oobbuf(mtd, NULL, oobsel, autoplace, numpages); |
2000 | ret = nand_write_page(mtd, this, page & this->pagemask, oobbuf, oobsel, 0); | |
1da177e4 LT |
2001 | if (ret) |
2002 | goto out; | |
2003 | page++; | |
2004 | } | |
2005 | ||
2006 | this->data_poi = bufstart; | |
e0c7d767 | 2007 | ret = nand_verify_pages(mtd, this, startpage, numpages, oobbuf, oobsel, chipnr, 0); |
1da177e4 LT |
2008 | if (ret) |
2009 | goto out; | |
61b03bd7 | 2010 | |
1da177e4 LT |
2011 | written += mtd->oobblock * numpages; |
2012 | /* All done ? */ | |
2013 | if (!count) | |
2014 | break; | |
2015 | ||
2016 | startpage = page & this->pagemask; | |
2017 | /* Check, if we cross a chip boundary */ | |
2018 | if (!startpage) { | |
2019 | chipnr++; | |
2020 | this->select_chip(mtd, -1); | |
2021 | this->select_chip(mtd, chipnr); | |
2022 | } | |
2023 | } | |
2024 | ret = 0; | |
e0c7d767 | 2025 | out: |
1da177e4 LT |
2026 | /* Deselect and wake up anyone waiting on the device */ |
2027 | nand_release_device(mtd); | |
2028 | ||
2029 | *retlen = written; | |
2030 | return ret; | |
2031 | } | |
2032 | ||
2033 | /** | |
2034 | * single_erease_cmd - [GENERIC] NAND standard block erase command function | |
2035 | * @mtd: MTD device structure | |
2036 | * @page: the page address of the block which will be erased | |
2037 | * | |
2038 | * Standard erase command for NAND chips | |
2039 | */ | |
e0c7d767 | 2040 | static void single_erase_cmd(struct mtd_info *mtd, int page) |
1da177e4 LT |
2041 | { |
2042 | struct nand_chip *this = mtd->priv; | |
2043 | /* Send commands to erase a block */ | |
e0c7d767 DW |
2044 | this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
2045 | this->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); | |
1da177e4 LT |
2046 | } |
2047 | ||
2048 | /** | |
2049 | * multi_erease_cmd - [GENERIC] AND specific block erase command function | |
2050 | * @mtd: MTD device structure | |
2051 | * @page: the page address of the block which will be erased | |
2052 | * | |
2053 | * AND multi block erase command function | |
2054 | * Erase 4 consecutive blocks | |
2055 | */ | |
e0c7d767 | 2056 | static void multi_erase_cmd(struct mtd_info *mtd, int page) |
1da177e4 LT |
2057 | { |
2058 | struct nand_chip *this = mtd->priv; | |
2059 | /* Send commands to erase a block */ | |
e0c7d767 DW |
2060 | this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
2061 | this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); | |
2062 | this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); | |
2063 | this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); | |
2064 | this->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); | |
1da177e4 LT |
2065 | } |
2066 | ||
2067 | /** | |
2068 | * nand_erase - [MTD Interface] erase block(s) | |
2069 | * @mtd: MTD device structure | |
2070 | * @instr: erase instruction | |
2071 | * | |
2072 | * Erase one ore more blocks | |
2073 | */ | |
e0c7d767 | 2074 | static int nand_erase(struct mtd_info *mtd, struct erase_info *instr) |
1da177e4 | 2075 | { |
e0c7d767 | 2076 | return nand_erase_nand(mtd, instr, 0); |
1da177e4 | 2077 | } |
61b03bd7 | 2078 | |
30f464b7 | 2079 | #define BBT_PAGE_MASK 0xffffff3f |
1da177e4 LT |
2080 | /** |
2081 | * nand_erase_intern - [NAND Interface] erase block(s) | |
2082 | * @mtd: MTD device structure | |
2083 | * @instr: erase instruction | |
2084 | * @allowbbt: allow erasing the bbt area | |
2085 | * | |
2086 | * Erase one ore more blocks | |
2087 | */ | |
e0c7d767 | 2088 | int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, int allowbbt) |
1da177e4 LT |
2089 | { |
2090 | int page, len, status, pages_per_block, ret, chipnr; | |
2091 | struct nand_chip *this = mtd->priv; | |
30f464b7 DM |
2092 | int rewrite_bbt[NAND_MAX_CHIPS]={0}; /* flags to indicate the page, if bbt needs to be rewritten. */ |
2093 | unsigned int bbt_masked_page; /* bbt mask to compare to page being erased. */ | |
2094 | /* It is used to see if the current page is in the same */ | |
2095 | /* 256 block group and the same bank as the bbt. */ | |
1da177e4 | 2096 | |
e0c7d767 | 2097 | DEBUG(MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n", (unsigned int)instr->addr, (unsigned int)instr->len); |
1da177e4 LT |
2098 | |
2099 | /* Start address must align on block boundary */ | |
2100 | if (instr->addr & ((1 << this->phys_erase_shift) - 1)) { | |
e0c7d767 | 2101 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n"); |
1da177e4 LT |
2102 | return -EINVAL; |
2103 | } | |
2104 | ||
2105 | /* Length must align on block boundary */ | |
2106 | if (instr->len & ((1 << this->phys_erase_shift) - 1)) { | |
e0c7d767 | 2107 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n"); |
1da177e4 LT |
2108 | return -EINVAL; |
2109 | } | |
2110 | ||
2111 | /* Do not allow erase past end of device */ | |
2112 | if ((instr->len + instr->addr) > mtd->size) { | |
e0c7d767 | 2113 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n"); |
1da177e4 LT |
2114 | return -EINVAL; |
2115 | } | |
2116 | ||
2117 | instr->fail_addr = 0xffffffff; | |
2118 | ||
2119 | /* Grab the lock and see if the device is available */ | |
e0c7d767 | 2120 | nand_get_device(this, mtd, FL_ERASING); |
1da177e4 LT |
2121 | |
2122 | /* Shift to get first page */ | |
e0c7d767 DW |
2123 | page = (int)(instr->addr >> this->page_shift); |
2124 | chipnr = (int)(instr->addr >> this->chip_shift); | |
1da177e4 LT |
2125 | |
2126 | /* Calculate pages in each block */ | |
2127 | pages_per_block = 1 << (this->phys_erase_shift - this->page_shift); | |
2128 | ||
2129 | /* Select the NAND device */ | |
2130 | this->select_chip(mtd, chipnr); | |
2131 | ||
2132 | /* Check the WP bit */ | |
2133 | /* Check, if it is write protected */ | |
2134 | if (nand_check_wp(mtd)) { | |
e0c7d767 | 2135 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n"); |
1da177e4 LT |
2136 | instr->state = MTD_ERASE_FAILED; |
2137 | goto erase_exit; | |
2138 | } | |
2139 | ||
30f464b7 DM |
2140 | /* if BBT requires refresh, set the BBT page mask to see if the BBT should be rewritten */ |
2141 | if (this->options & BBT_AUTO_REFRESH) { | |
2142 | bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK; | |
2143 | } else { | |
2144 | bbt_masked_page = 0xffffffff; /* should not match anything */ | |
2145 | } | |
2146 | ||
1da177e4 LT |
2147 | /* Loop through the pages */ |
2148 | len = instr->len; | |
2149 | ||
2150 | instr->state = MTD_ERASING; | |
2151 | ||
2152 | while (len) { | |
2153 | /* Check if we have a bad block, we do not erase bad blocks ! */ | |
2154 | if (nand_block_checkbad(mtd, ((loff_t) page) << this->page_shift, 0, allowbbt)) { | |
e0c7d767 | 2155 | printk(KERN_WARNING "nand_erase: attempt to erase a bad block at page 0x%08x\n", page); |
1da177e4 LT |
2156 | instr->state = MTD_ERASE_FAILED; |
2157 | goto erase_exit; | |
2158 | } | |
61b03bd7 TG |
2159 | |
2160 | /* Invalidate the page cache, if we erase the block which contains | |
1da177e4 LT |
2161 | the current cached page */ |
2162 | if (page <= this->pagebuf && this->pagebuf < (page + pages_per_block)) | |
2163 | this->pagebuf = -1; | |
2164 | ||
e0c7d767 | 2165 | this->erase_cmd(mtd, page & this->pagemask); |
61b03bd7 | 2166 | |
e0c7d767 | 2167 | status = this->waitfunc(mtd, this, FL_ERASING); |
1da177e4 | 2168 | |
068e3c0a DM |
2169 | /* See if operation failed and additional status checks are available */ |
2170 | if ((status & NAND_STATUS_FAIL) && (this->errstat)) { | |
2171 | status = this->errstat(mtd, this, FL_ERASING, status, page); | |
2172 | } | |
2173 | ||
1da177e4 | 2174 | /* See if block erase succeeded */ |
a4ab4c5d | 2175 | if (status & NAND_STATUS_FAIL) { |
e0c7d767 | 2176 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page); |
1da177e4 LT |
2177 | instr->state = MTD_ERASE_FAILED; |
2178 | instr->fail_addr = (page << this->page_shift); | |
2179 | goto erase_exit; | |
2180 | } | |
30f464b7 DM |
2181 | |
2182 | /* if BBT requires refresh, set the BBT rewrite flag to the page being erased */ | |
2183 | if (this->options & BBT_AUTO_REFRESH) { | |
61b03bd7 | 2184 | if (((page & BBT_PAGE_MASK) == bbt_masked_page) && |
30f464b7 DM |
2185 | (page != this->bbt_td->pages[chipnr])) { |
2186 | rewrite_bbt[chipnr] = (page << this->page_shift); | |
2187 | } | |
2188 | } | |
61b03bd7 | 2189 | |
1da177e4 LT |
2190 | /* Increment page address and decrement length */ |
2191 | len -= (1 << this->phys_erase_shift); | |
2192 | page += pages_per_block; | |
2193 | ||
2194 | /* Check, if we cross a chip boundary */ | |
2195 | if (len && !(page & this->pagemask)) { | |
2196 | chipnr++; | |
2197 | this->select_chip(mtd, -1); | |
2198 | this->select_chip(mtd, chipnr); | |
30f464b7 | 2199 | |
61b03bd7 | 2200 | /* if BBT requires refresh and BBT-PERCHIP, |
30f464b7 DM |
2201 | * set the BBT page mask to see if this BBT should be rewritten */ |
2202 | if ((this->options & BBT_AUTO_REFRESH) && (this->bbt_td->options & NAND_BBT_PERCHIP)) { | |
2203 | bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK; | |
2204 | } | |
2205 | ||
1da177e4 LT |
2206 | } |
2207 | } | |
2208 | instr->state = MTD_ERASE_DONE; | |
2209 | ||
e0c7d767 | 2210 | erase_exit: |
1da177e4 LT |
2211 | |
2212 | ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; | |
2213 | /* Do call back function */ | |
2214 | if (!ret) | |
2215 | mtd_erase_callback(instr); | |
2216 | ||
2217 | /* Deselect and wake up anyone waiting on the device */ | |
2218 | nand_release_device(mtd); | |
2219 | ||
30f464b7 DM |
2220 | /* if BBT requires refresh and erase was successful, rewrite any selected bad block tables */ |
2221 | if ((this->options & BBT_AUTO_REFRESH) && (!ret)) { | |
2222 | for (chipnr = 0; chipnr < this->numchips; chipnr++) { | |
2223 | if (rewrite_bbt[chipnr]) { | |
2224 | /* update the BBT for chip */ | |
e0c7d767 DW |
2225 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt (%d:0x%0x 0x%0x)\n", |
2226 | chipnr, rewrite_bbt[chipnr], this->bbt_td->pages[chipnr]); | |
2227 | nand_update_bbt(mtd, rewrite_bbt[chipnr]); | |
30f464b7 DM |
2228 | } |
2229 | } | |
2230 | } | |
2231 | ||
1da177e4 LT |
2232 | /* Return more or less happy */ |
2233 | return ret; | |
2234 | } | |
2235 | ||
2236 | /** | |
2237 | * nand_sync - [MTD Interface] sync | |
2238 | * @mtd: MTD device structure | |
2239 | * | |
2240 | * Sync is actually a wait for chip ready function | |
2241 | */ | |
e0c7d767 | 2242 | static void nand_sync(struct mtd_info *mtd) |
1da177e4 LT |
2243 | { |
2244 | struct nand_chip *this = mtd->priv; | |
2245 | ||
e0c7d767 | 2246 | DEBUG(MTD_DEBUG_LEVEL3, "nand_sync: called\n"); |
1da177e4 LT |
2247 | |
2248 | /* Grab the lock and see if the device is available */ | |
e0c7d767 | 2249 | nand_get_device(this, mtd, FL_SYNCING); |
1da177e4 | 2250 | /* Release it and go back */ |
e0c7d767 | 2251 | nand_release_device(mtd); |
1da177e4 LT |
2252 | } |
2253 | ||
1da177e4 LT |
2254 | /** |
2255 | * nand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad | |
2256 | * @mtd: MTD device structure | |
2257 | * @ofs: offset relative to mtd start | |
2258 | */ | |
e0c7d767 | 2259 | static int nand_block_isbad(struct mtd_info *mtd, loff_t ofs) |
1da177e4 LT |
2260 | { |
2261 | /* Check for invalid offset */ | |
61b03bd7 | 2262 | if (ofs > mtd->size) |
1da177e4 | 2263 | return -EINVAL; |
61b03bd7 | 2264 | |
e0c7d767 | 2265 | return nand_block_checkbad(mtd, ofs, 1, 0); |
1da177e4 LT |
2266 | } |
2267 | ||
2268 | /** | |
2269 | * nand_block_markbad - [MTD Interface] Mark the block at the given offset as bad | |
2270 | * @mtd: MTD device structure | |
2271 | * @ofs: offset relative to mtd start | |
2272 | */ | |
e0c7d767 | 2273 | static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs) |
1da177e4 LT |
2274 | { |
2275 | struct nand_chip *this = mtd->priv; | |
2276 | int ret; | |
2277 | ||
e0c7d767 DW |
2278 | if ((ret = nand_block_isbad(mtd, ofs))) { |
2279 | /* If it was bad already, return success and do nothing. */ | |
1da177e4 LT |
2280 | if (ret > 0) |
2281 | return 0; | |
e0c7d767 DW |
2282 | return ret; |
2283 | } | |
1da177e4 LT |
2284 | |
2285 | return this->block_markbad(mtd, ofs); | |
2286 | } | |
2287 | ||
962034f4 VW |
2288 | /** |
2289 | * nand_suspend - [MTD Interface] Suspend the NAND flash | |
2290 | * @mtd: MTD device structure | |
2291 | */ | |
2292 | static int nand_suspend(struct mtd_info *mtd) | |
2293 | { | |
2294 | struct nand_chip *this = mtd->priv; | |
2295 | ||
e0c7d767 | 2296 | return nand_get_device(this, mtd, FL_PM_SUSPENDED); |
962034f4 VW |
2297 | } |
2298 | ||
2299 | /** | |
2300 | * nand_resume - [MTD Interface] Resume the NAND flash | |
2301 | * @mtd: MTD device structure | |
2302 | */ | |
2303 | static void nand_resume(struct mtd_info *mtd) | |
2304 | { | |
2305 | struct nand_chip *this = mtd->priv; | |
2306 | ||
2307 | if (this->state == FL_PM_SUSPENDED) | |
2308 | nand_release_device(mtd); | |
2309 | else | |
e0c7d767 | 2310 | printk(KERN_ERR "resume() called for the chip which is not in suspended state\n"); |
962034f4 VW |
2311 | |
2312 | } | |
2313 | ||
1da177e4 LT |
2314 | /** |
2315 | * nand_scan - [NAND Interface] Scan for the NAND device | |
2316 | * @mtd: MTD device structure | |
2317 | * @maxchips: Number of chips to scan for | |
2318 | * | |
2319 | * This fills out all the not initialized function pointers | |
2320 | * with the defaults. | |
2321 | * The flash ID is read and the mtd/chip structures are | |
2322 | * filled with the appropriate values. Buffers are allocated if | |
2323 | * they are not provided by the board driver | |
2324 | * | |
2325 | */ | |
e0c7d767 | 2326 | int nand_scan(struct mtd_info *mtd, int maxchips) |
1da177e4 | 2327 | { |
3b946e3f | 2328 | int i, nand_maf_id, nand_dev_id, busw, maf_id; |
1da177e4 LT |
2329 | struct nand_chip *this = mtd->priv; |
2330 | ||
e0c7d767 | 2331 | /* Get buswidth to select the correct functions */ |
1da177e4 LT |
2332 | busw = this->options & NAND_BUSWIDTH_16; |
2333 | ||
2334 | /* check for proper chip_delay setup, set 20us if not */ | |
2335 | if (!this->chip_delay) | |
2336 | this->chip_delay = 20; | |
2337 | ||
2338 | /* check, if a user supplied command function given */ | |
2339 | if (this->cmdfunc == NULL) | |
2340 | this->cmdfunc = nand_command; | |
2341 | ||
2342 | /* check, if a user supplied wait function given */ | |
2343 | if (this->waitfunc == NULL) | |
2344 | this->waitfunc = nand_wait; | |
2345 | ||
2346 | if (!this->select_chip) | |
2347 | this->select_chip = nand_select_chip; | |
2348 | if (!this->write_byte) | |
2349 | this->write_byte = busw ? nand_write_byte16 : nand_write_byte; | |
2350 | if (!this->read_byte) | |
2351 | this->read_byte = busw ? nand_read_byte16 : nand_read_byte; | |
2352 | if (!this->write_word) | |
2353 | this->write_word = nand_write_word; | |
2354 | if (!this->read_word) | |
2355 | this->read_word = nand_read_word; | |
2356 | if (!this->block_bad) | |
2357 | this->block_bad = nand_block_bad; | |
2358 | if (!this->block_markbad) | |
2359 | this->block_markbad = nand_default_block_markbad; | |
2360 | if (!this->write_buf) | |
2361 | this->write_buf = busw ? nand_write_buf16 : nand_write_buf; | |
2362 | if (!this->read_buf) | |
2363 | this->read_buf = busw ? nand_read_buf16 : nand_read_buf; | |
2364 | if (!this->verify_buf) | |
2365 | this->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf; | |
2366 | if (!this->scan_bbt) | |
2367 | this->scan_bbt = nand_default_bbt; | |
2368 | ||
2369 | /* Select the device */ | |
2370 | this->select_chip(mtd, 0); | |
2371 | ||
2372 | /* Send the command for reading device ID */ | |
e0c7d767 | 2373 | this->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
1da177e4 LT |
2374 | |
2375 | /* Read manufacturer and device IDs */ | |
2376 | nand_maf_id = this->read_byte(mtd); | |
2377 | nand_dev_id = this->read_byte(mtd); | |
2378 | ||
2379 | /* Print and store flash device information */ | |
2380 | for (i = 0; nand_flash_ids[i].name != NULL; i++) { | |
61b03bd7 TG |
2381 | |
2382 | if (nand_dev_id != nand_flash_ids[i].id) | |
1da177e4 LT |
2383 | continue; |
2384 | ||
e0c7d767 DW |
2385 | if (!mtd->name) |
2386 | mtd->name = nand_flash_ids[i].name; | |
1da177e4 | 2387 | this->chipsize = nand_flash_ids[i].chipsize << 20; |
61b03bd7 | 2388 | |
1da177e4 LT |
2389 | /* New devices have all the information in additional id bytes */ |
2390 | if (!nand_flash_ids[i].pagesize) { | |
2391 | int extid; | |
2392 | /* The 3rd id byte contains non relevant data ATM */ | |
2393 | extid = this->read_byte(mtd); | |
2394 | /* The 4th id byte is the important one */ | |
2395 | extid = this->read_byte(mtd); | |
2396 | /* Calc pagesize */ | |
2397 | mtd->oobblock = 1024 << (extid & 0x3); | |
2398 | extid >>= 2; | |
2399 | /* Calc oobsize */ | |
d4094661 | 2400 | mtd->oobsize = (8 << (extid & 0x01)) * (mtd->oobblock >> 9); |
1da177e4 LT |
2401 | extid >>= 2; |
2402 | /* Calc blocksize. Blocksize is multiples of 64KiB */ | |
e0c7d767 | 2403 | mtd->erasesize = (64 * 1024) << (extid & 0x03); |
1da177e4 LT |
2404 | extid >>= 2; |
2405 | /* Get buswidth information */ | |
2406 | busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; | |
61b03bd7 | 2407 | |
1da177e4 LT |
2408 | } else { |
2409 | /* Old devices have this data hardcoded in the | |
2410 | * device id table */ | |
2411 | mtd->erasesize = nand_flash_ids[i].erasesize; | |
2412 | mtd->oobblock = nand_flash_ids[i].pagesize; | |
2413 | mtd->oobsize = mtd->oobblock / 32; | |
2414 | busw = nand_flash_ids[i].options & NAND_BUSWIDTH_16; | |
2415 | } | |
2416 | ||
0ea4a755 KP |
2417 | /* Try to identify manufacturer */ |
2418 | for (maf_id = 0; nand_manuf_ids[maf_id].id != 0x0; maf_id++) { | |
2419 | if (nand_manuf_ids[maf_id].id == nand_maf_id) | |
2420 | break; | |
2421 | } | |
2422 | ||
1da177e4 LT |
2423 | /* Check, if buswidth is correct. Hardware drivers should set |
2424 | * this correct ! */ | |
2425 | if (busw != (this->options & NAND_BUSWIDTH_16)) { | |
e0c7d767 DW |
2426 | printk(KERN_INFO "NAND device: Manufacturer ID:" |
2427 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id, | |
2428 | nand_manuf_ids[maf_id].name, mtd->name); | |
2429 | printk(KERN_WARNING | |
2430 | "NAND bus width %d instead %d bit\n", | |
2431 | (this->options & NAND_BUSWIDTH_16) ? 16 : 8, busw ? 16 : 8); | |
1da177e4 | 2432 | this->select_chip(mtd, -1); |
61b03bd7 | 2433 | return 1; |
1da177e4 | 2434 | } |
61b03bd7 TG |
2435 | |
2436 | /* Calculate the address shift from the page size */ | |
1da177e4 LT |
2437 | this->page_shift = ffs(mtd->oobblock) - 1; |
2438 | this->bbt_erase_shift = this->phys_erase_shift = ffs(mtd->erasesize) - 1; | |
2439 | this->chip_shift = ffs(this->chipsize) - 1; | |
2440 | ||
2441 | /* Set the bad block position */ | |
e0c7d767 | 2442 | this->badblockpos = mtd->oobblock > 512 ? NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS; |
1da177e4 LT |
2443 | |
2444 | /* Get chip options, preserve non chip based options */ | |
2445 | this->options &= ~NAND_CHIPOPTIONS_MSK; | |
2446 | this->options |= nand_flash_ids[i].options & NAND_CHIPOPTIONS_MSK; | |
e0c7d767 | 2447 | /* Set this as a default. Board drivers can override it, if necessary */ |
1da177e4 LT |
2448 | this->options |= NAND_NO_AUTOINCR; |
2449 | /* Check if this is a not a samsung device. Do not clear the options | |
2450 | * for chips which are not having an extended id. | |
61b03bd7 | 2451 | */ |
1da177e4 LT |
2452 | if (nand_maf_id != NAND_MFR_SAMSUNG && !nand_flash_ids[i].pagesize) |
2453 | this->options &= ~NAND_SAMSUNG_LP_OPTIONS; | |
61b03bd7 | 2454 | |
1da177e4 LT |
2455 | /* Check for AND chips with 4 page planes */ |
2456 | if (this->options & NAND_4PAGE_ARRAY) | |
2457 | this->erase_cmd = multi_erase_cmd; | |
2458 | else | |
2459 | this->erase_cmd = single_erase_cmd; | |
2460 | ||
2461 | /* Do not replace user supplied command function ! */ | |
2462 | if (mtd->oobblock > 512 && this->cmdfunc == nand_command) | |
2463 | this->cmdfunc = nand_command_lp; | |
61b03bd7 | 2464 | |
e0c7d767 DW |
2465 | printk(KERN_INFO "NAND device: Manufacturer ID:" |
2466 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id, | |
2467 | nand_manuf_ids[maf_id].name, nand_flash_ids[i].name); | |
1da177e4 LT |
2468 | break; |
2469 | } | |
2470 | ||
2471 | if (!nand_flash_ids[i].name) { | |
e0c7d767 | 2472 | printk(KERN_WARNING "No NAND device found!!!\n"); |
1da177e4 LT |
2473 | this->select_chip(mtd, -1); |
2474 | return 1; | |
2475 | } | |
2476 | ||
e0c7d767 | 2477 | for (i = 1; i < maxchips; i++) { |
1da177e4 LT |
2478 | this->select_chip(mtd, i); |
2479 | ||
2480 | /* Send the command for reading device ID */ | |
e0c7d767 | 2481 | this->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
1da177e4 LT |
2482 | |
2483 | /* Read manufacturer and device IDs */ | |
2484 | if (nand_maf_id != this->read_byte(mtd) || | |
2485 | nand_dev_id != this->read_byte(mtd)) | |
2486 | break; | |
2487 | } | |
2488 | if (i > 1) | |
2489 | printk(KERN_INFO "%d NAND chips detected\n", i); | |
61b03bd7 | 2490 | |
e0c7d767 | 2491 | /* Allocate buffers, if necessary */ |
1da177e4 LT |
2492 | if (!this->oob_buf) { |
2493 | size_t len; | |
2494 | len = mtd->oobsize << (this->phys_erase_shift - this->page_shift); | |
e0c7d767 | 2495 | this->oob_buf = kmalloc(len, GFP_KERNEL); |
1da177e4 | 2496 | if (!this->oob_buf) { |
e0c7d767 | 2497 | printk(KERN_ERR "nand_scan(): Cannot allocate oob_buf\n"); |
1da177e4 LT |
2498 | return -ENOMEM; |
2499 | } | |
2500 | this->options |= NAND_OOBBUF_ALLOC; | |
2501 | } | |
61b03bd7 | 2502 | |
1da177e4 LT |
2503 | if (!this->data_buf) { |
2504 | size_t len; | |
2505 | len = mtd->oobblock + mtd->oobsize; | |
e0c7d767 | 2506 | this->data_buf = kmalloc(len, GFP_KERNEL); |
1da177e4 LT |
2507 | if (!this->data_buf) { |
2508 | if (this->options & NAND_OOBBUF_ALLOC) | |
e0c7d767 DW |
2509 | kfree(this->oob_buf); |
2510 | printk(KERN_ERR "nand_scan(): Cannot allocate data_buf\n"); | |
1da177e4 LT |
2511 | return -ENOMEM; |
2512 | } | |
2513 | this->options |= NAND_DATABUF_ALLOC; | |
2514 | } | |
2515 | ||
2516 | /* Store the number of chips and calc total size for mtd */ | |
2517 | this->numchips = i; | |
2518 | mtd->size = i * this->chipsize; | |
2519 | /* Convert chipsize to number of pages per chip -1. */ | |
2520 | this->pagemask = (this->chipsize >> this->page_shift) - 1; | |
2521 | /* Preset the internal oob buffer */ | |
2522 | memset(this->oob_buf, 0xff, mtd->oobsize << (this->phys_erase_shift - this->page_shift)); | |
2523 | ||
2524 | /* If no default placement scheme is given, select an | |
2525 | * appropriate one */ | |
2526 | if (!this->autooob) { | |
2527 | /* Select the appropriate default oob placement scheme for | |
2528 | * placement agnostic filesystems */ | |
61b03bd7 | 2529 | switch (mtd->oobsize) { |
1da177e4 LT |
2530 | case 8: |
2531 | this->autooob = &nand_oob_8; | |
2532 | break; | |
2533 | case 16: | |
2534 | this->autooob = &nand_oob_16; | |
2535 | break; | |
2536 | case 64: | |
2537 | this->autooob = &nand_oob_64; | |
2538 | break; | |
2539 | default: | |
e0c7d767 | 2540 | printk(KERN_WARNING "No oob scheme defined for oobsize %d\n", mtd->oobsize); |
1da177e4 LT |
2541 | BUG(); |
2542 | } | |
2543 | } | |
61b03bd7 | 2544 | |
1da177e4 LT |
2545 | /* The number of bytes available for the filesystem to place fs dependend |
2546 | * oob data */ | |
998cf640 TG |
2547 | mtd->oobavail = 0; |
2548 | for (i = 0; this->autooob->oobfree[i][1]; i++) | |
2549 | mtd->oobavail += this->autooob->oobfree[i][1]; | |
1da177e4 | 2550 | |
61b03bd7 | 2551 | /* |
1da177e4 LT |
2552 | * check ECC mode, default to software |
2553 | * if 3byte/512byte hardware ECC is selected and we have 256 byte pagesize | |
61b03bd7 | 2554 | * fallback to software ECC |
e0c7d767 | 2555 | */ |
61b03bd7 | 2556 | this->eccsize = 256; /* set default eccsize */ |
1da177e4 LT |
2557 | this->eccbytes = 3; |
2558 | ||
2559 | switch (this->eccmode) { | |
2560 | case NAND_ECC_HW12_2048: | |
2561 | if (mtd->oobblock < 2048) { | |
2562 | printk(KERN_WARNING "2048 byte HW ECC not possible on %d byte page size, fallback to SW ECC\n", | |
2563 | mtd->oobblock); | |
2564 | this->eccmode = NAND_ECC_SOFT; | |
2565 | this->calculate_ecc = nand_calculate_ecc; | |
2566 | this->correct_data = nand_correct_data; | |
2567 | } else | |
2568 | this->eccsize = 2048; | |
2569 | break; | |
2570 | ||
61b03bd7 TG |
2571 | case NAND_ECC_HW3_512: |
2572 | case NAND_ECC_HW6_512: | |
2573 | case NAND_ECC_HW8_512: | |
1da177e4 | 2574 | if (mtd->oobblock == 256) { |
e0c7d767 | 2575 | printk(KERN_WARNING "512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC \n"); |
1da177e4 LT |
2576 | this->eccmode = NAND_ECC_SOFT; |
2577 | this->calculate_ecc = nand_calculate_ecc; | |
2578 | this->correct_data = nand_correct_data; | |
61b03bd7 | 2579 | } else |
e0c7d767 | 2580 | this->eccsize = 512; /* set eccsize to 512 */ |
1da177e4 | 2581 | break; |
61b03bd7 | 2582 | |
1da177e4 LT |
2583 | case NAND_ECC_HW3_256: |
2584 | break; | |
61b03bd7 TG |
2585 | |
2586 | case NAND_ECC_NONE: | |
e0c7d767 | 2587 | printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. This is not recommended !!\n"); |
1da177e4 LT |
2588 | this->eccmode = NAND_ECC_NONE; |
2589 | break; | |
2590 | ||
61b03bd7 | 2591 | case NAND_ECC_SOFT: |
1da177e4 LT |
2592 | this->calculate_ecc = nand_calculate_ecc; |
2593 | this->correct_data = nand_correct_data; | |
2594 | break; | |
2595 | ||
2596 | default: | |
e0c7d767 | 2597 | printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode); |
61b03bd7 TG |
2598 | BUG(); |
2599 | } | |
1da177e4 | 2600 | |
61b03bd7 | 2601 | /* Check hardware ecc function availability and adjust number of ecc bytes per |
1da177e4 | 2602 | * calculation step |
e0c7d767 | 2603 | */ |
1da177e4 LT |
2604 | switch (this->eccmode) { |
2605 | case NAND_ECC_HW12_2048: | |
2606 | this->eccbytes += 4; | |
61b03bd7 | 2607 | case NAND_ECC_HW8_512: |
1da177e4 | 2608 | this->eccbytes += 2; |
61b03bd7 | 2609 | case NAND_ECC_HW6_512: |
1da177e4 | 2610 | this->eccbytes += 3; |
61b03bd7 | 2611 | case NAND_ECC_HW3_512: |
1da177e4 LT |
2612 | case NAND_ECC_HW3_256: |
2613 | if (this->calculate_ecc && this->correct_data && this->enable_hwecc) | |
2614 | break; | |
e0c7d767 | 2615 | printk(KERN_WARNING "No ECC functions supplied, Hardware ECC not possible\n"); |
61b03bd7 | 2616 | BUG(); |
1da177e4 | 2617 | } |
61b03bd7 | 2618 | |
1da177e4 | 2619 | mtd->eccsize = this->eccsize; |
61b03bd7 | 2620 | |
1da177e4 LT |
2621 | /* Set the number of read / write steps for one page to ensure ECC generation */ |
2622 | switch (this->eccmode) { | |
2623 | case NAND_ECC_HW12_2048: | |
2624 | this->eccsteps = mtd->oobblock / 2048; | |
2625 | break; | |
2626 | case NAND_ECC_HW3_512: | |
2627 | case NAND_ECC_HW6_512: | |
2628 | case NAND_ECC_HW8_512: | |
2629 | this->eccsteps = mtd->oobblock / 512; | |
2630 | break; | |
2631 | case NAND_ECC_HW3_256: | |
61b03bd7 | 2632 | case NAND_ECC_SOFT: |
1da177e4 LT |
2633 | this->eccsteps = mtd->oobblock / 256; |
2634 | break; | |
61b03bd7 TG |
2635 | |
2636 | case NAND_ECC_NONE: | |
1da177e4 LT |
2637 | this->eccsteps = 1; |
2638 | break; | |
2639 | } | |
61b03bd7 | 2640 | |
1da177e4 LT |
2641 | /* Initialize state, waitqueue and spinlock */ |
2642 | this->state = FL_READY; | |
e0c7d767 DW |
2643 | init_waitqueue_head(&this->wq); |
2644 | spin_lock_init(&this->chip_lock); | |
1da177e4 LT |
2645 | |
2646 | /* De-select the device */ | |
2647 | this->select_chip(mtd, -1); | |
2648 | ||
2649 | /* Invalidate the pagebuffer reference */ | |
2650 | this->pagebuf = -1; | |
2651 | ||
2652 | /* Fill in remaining MTD driver data */ | |
2653 | mtd->type = MTD_NANDFLASH; | |
2654 | mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC; | |
2655 | mtd->ecctype = MTD_ECC_SW; | |
2656 | mtd->erase = nand_erase; | |
2657 | mtd->point = NULL; | |
2658 | mtd->unpoint = NULL; | |
2659 | mtd->read = nand_read; | |
2660 | mtd->write = nand_write; | |
2661 | mtd->read_ecc = nand_read_ecc; | |
2662 | mtd->write_ecc = nand_write_ecc; | |
2663 | mtd->read_oob = nand_read_oob; | |
2664 | mtd->write_oob = nand_write_oob; | |
2665 | mtd->readv = NULL; | |
2666 | mtd->writev = nand_writev; | |
2667 | mtd->writev_ecc = nand_writev_ecc; | |
2668 | mtd->sync = nand_sync; | |
2669 | mtd->lock = NULL; | |
2670 | mtd->unlock = NULL; | |
962034f4 VW |
2671 | mtd->suspend = nand_suspend; |
2672 | mtd->resume = nand_resume; | |
1da177e4 LT |
2673 | mtd->block_isbad = nand_block_isbad; |
2674 | mtd->block_markbad = nand_block_markbad; | |
2675 | ||
2676 | /* and make the autooob the default one */ | |
2677 | memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo)); | |
2678 | ||
2679 | mtd->owner = THIS_MODULE; | |
61b03bd7 | 2680 | |
0040bf38 TG |
2681 | /* Check, if we should skip the bad block table scan */ |
2682 | if (this->options & NAND_SKIP_BBTSCAN) | |
2683 | return 0; | |
1da177e4 LT |
2684 | |
2685 | /* Build bad block table */ | |
e0c7d767 | 2686 | return this->scan_bbt(mtd); |
1da177e4 LT |
2687 | } |
2688 | ||
2689 | /** | |
61b03bd7 | 2690 | * nand_release - [NAND Interface] Free resources held by the NAND device |
1da177e4 LT |
2691 | * @mtd: MTD device structure |
2692 | */ | |
e0c7d767 | 2693 | void nand_release(struct mtd_info *mtd) |
1da177e4 LT |
2694 | { |
2695 | struct nand_chip *this = mtd->priv; | |
2696 | ||
2697 | #ifdef CONFIG_MTD_PARTITIONS | |
2698 | /* Deregister partitions */ | |
e0c7d767 | 2699 | del_mtd_partitions(mtd); |
1da177e4 LT |
2700 | #endif |
2701 | /* Deregister the device */ | |
e0c7d767 | 2702 | del_mtd_device(mtd); |
1da177e4 | 2703 | |
fa671646 | 2704 | /* Free bad block table memory */ |
e0c7d767 | 2705 | kfree(this->bbt); |
1da177e4 LT |
2706 | /* Buffer allocated by nand_scan ? */ |
2707 | if (this->options & NAND_OOBBUF_ALLOC) | |
e0c7d767 | 2708 | kfree(this->oob_buf); |
1da177e4 LT |
2709 | /* Buffer allocated by nand_scan ? */ |
2710 | if (this->options & NAND_DATABUF_ALLOC) | |
e0c7d767 | 2711 | kfree(this->data_buf); |
1da177e4 LT |
2712 | } |
2713 | ||
e0c7d767 DW |
2714 | EXPORT_SYMBOL_GPL(nand_scan); |
2715 | EXPORT_SYMBOL_GPL(nand_release); | |
8fe833c1 RP |
2716 | |
2717 | static int __init nand_base_init(void) | |
2718 | { | |
2719 | led_trigger_register_simple("nand-disk", &nand_led_trigger); | |
2720 | return 0; | |
2721 | } | |
2722 | ||
2723 | static void __exit nand_base_exit(void) | |
2724 | { | |
2725 | led_trigger_unregister_simple(nand_led_trigger); | |
2726 | } | |
2727 | ||
2728 | module_init(nand_base_init); | |
2729 | module_exit(nand_base_exit); | |
2730 | ||
e0c7d767 DW |
2731 | MODULE_LICENSE("GPL"); |
2732 | MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>"); | |
2733 | MODULE_DESCRIPTION("Generic NAND flash driver code"); |