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1da177e4 LT |
1 | /* |
2 | * NAND flash simulator. | |
3 | * | |
4 | * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org> | |
5 | * | |
61b03bd7 | 6 | * Copyright (C) 2004 Nokia Corporation |
1da177e4 LT |
7 | * |
8 | * Note: NS means "NAND Simulator". | |
9 | * Note: Input means input TO flash chip, output means output FROM chip. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify it | |
12 | * under the terms of the GNU General Public License as published by the | |
13 | * Free Software Foundation; either version 2, or (at your option) any later | |
14 | * version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General | |
19 | * Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA | |
1da177e4 LT |
24 | */ |
25 | ||
1da177e4 LT |
26 | #include <linux/init.h> |
27 | #include <linux/types.h> | |
28 | #include <linux/module.h> | |
29 | #include <linux/moduleparam.h> | |
30 | #include <linux/vmalloc.h> | |
31 | #include <linux/slab.h> | |
32 | #include <linux/errno.h> | |
33 | #include <linux/string.h> | |
34 | #include <linux/mtd/mtd.h> | |
35 | #include <linux/mtd/nand.h> | |
36 | #include <linux/mtd/partitions.h> | |
37 | #include <linux/delay.h> | |
2b77a0ed | 38 | #include <linux/list.h> |
514087e7 | 39 | #include <linux/random.h> |
4474573a | 40 | #include <asm/div64.h> |
1da177e4 LT |
41 | |
42 | /* Default simulator parameters values */ | |
43 | #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE) || \ | |
44 | !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \ | |
45 | !defined(CONFIG_NANDSIM_THIRD_ID_BYTE) || \ | |
46 | !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE) | |
47 | #define CONFIG_NANDSIM_FIRST_ID_BYTE 0x98 | |
48 | #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39 | |
49 | #define CONFIG_NANDSIM_THIRD_ID_BYTE 0xFF /* No byte */ | |
50 | #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */ | |
51 | #endif | |
52 | ||
53 | #ifndef CONFIG_NANDSIM_ACCESS_DELAY | |
54 | #define CONFIG_NANDSIM_ACCESS_DELAY 25 | |
55 | #endif | |
56 | #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY | |
57 | #define CONFIG_NANDSIM_PROGRAMM_DELAY 200 | |
58 | #endif | |
59 | #ifndef CONFIG_NANDSIM_ERASE_DELAY | |
60 | #define CONFIG_NANDSIM_ERASE_DELAY 2 | |
61 | #endif | |
62 | #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE | |
63 | #define CONFIG_NANDSIM_OUTPUT_CYCLE 40 | |
64 | #endif | |
65 | #ifndef CONFIG_NANDSIM_INPUT_CYCLE | |
66 | #define CONFIG_NANDSIM_INPUT_CYCLE 50 | |
67 | #endif | |
68 | #ifndef CONFIG_NANDSIM_BUS_WIDTH | |
69 | #define CONFIG_NANDSIM_BUS_WIDTH 8 | |
70 | #endif | |
71 | #ifndef CONFIG_NANDSIM_DO_DELAYS | |
72 | #define CONFIG_NANDSIM_DO_DELAYS 0 | |
73 | #endif | |
74 | #ifndef CONFIG_NANDSIM_LOG | |
75 | #define CONFIG_NANDSIM_LOG 0 | |
76 | #endif | |
77 | #ifndef CONFIG_NANDSIM_DBG | |
78 | #define CONFIG_NANDSIM_DBG 0 | |
79 | #endif | |
80 | ||
81 | static uint first_id_byte = CONFIG_NANDSIM_FIRST_ID_BYTE; | |
82 | static uint second_id_byte = CONFIG_NANDSIM_SECOND_ID_BYTE; | |
83 | static uint third_id_byte = CONFIG_NANDSIM_THIRD_ID_BYTE; | |
84 | static uint fourth_id_byte = CONFIG_NANDSIM_FOURTH_ID_BYTE; | |
85 | static uint access_delay = CONFIG_NANDSIM_ACCESS_DELAY; | |
86 | static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY; | |
87 | static uint erase_delay = CONFIG_NANDSIM_ERASE_DELAY; | |
88 | static uint output_cycle = CONFIG_NANDSIM_OUTPUT_CYCLE; | |
89 | static uint input_cycle = CONFIG_NANDSIM_INPUT_CYCLE; | |
90 | static uint bus_width = CONFIG_NANDSIM_BUS_WIDTH; | |
91 | static uint do_delays = CONFIG_NANDSIM_DO_DELAYS; | |
92 | static uint log = CONFIG_NANDSIM_LOG; | |
93 | static uint dbg = CONFIG_NANDSIM_DBG; | |
2b77a0ed AH |
94 | static unsigned long parts[MAX_MTD_DEVICES]; |
95 | static unsigned int parts_num; | |
514087e7 AH |
96 | static char *badblocks = NULL; |
97 | static char *weakblocks = NULL; | |
98 | static char *weakpages = NULL; | |
99 | static unsigned int bitflips = 0; | |
100 | static char *gravepages = NULL; | |
57aa6b54 | 101 | static unsigned int rptwear = 0; |
a5ac8aeb | 102 | static unsigned int overridesize = 0; |
1da177e4 LT |
103 | |
104 | module_param(first_id_byte, uint, 0400); | |
105 | module_param(second_id_byte, uint, 0400); | |
106 | module_param(third_id_byte, uint, 0400); | |
107 | module_param(fourth_id_byte, uint, 0400); | |
108 | module_param(access_delay, uint, 0400); | |
109 | module_param(programm_delay, uint, 0400); | |
110 | module_param(erase_delay, uint, 0400); | |
111 | module_param(output_cycle, uint, 0400); | |
112 | module_param(input_cycle, uint, 0400); | |
113 | module_param(bus_width, uint, 0400); | |
114 | module_param(do_delays, uint, 0400); | |
115 | module_param(log, uint, 0400); | |
116 | module_param(dbg, uint, 0400); | |
2b77a0ed | 117 | module_param_array(parts, ulong, &parts_num, 0400); |
514087e7 AH |
118 | module_param(badblocks, charp, 0400); |
119 | module_param(weakblocks, charp, 0400); | |
120 | module_param(weakpages, charp, 0400); | |
121 | module_param(bitflips, uint, 0400); | |
122 | module_param(gravepages, charp, 0400); | |
57aa6b54 | 123 | module_param(rptwear, uint, 0400); |
a5ac8aeb | 124 | module_param(overridesize, uint, 0400); |
1da177e4 | 125 | |
a5ac8aeb | 126 | MODULE_PARM_DESC(first_id_byte, "The first byte returned by NAND Flash 'read ID' command (manufacturer ID)"); |
1da177e4 LT |
127 | MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID)"); |
128 | MODULE_PARM_DESC(third_id_byte, "The third byte returned by NAND Flash 'read ID' command"); | |
129 | MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command"); | |
130 | MODULE_PARM_DESC(access_delay, "Initial page access delay (microiseconds)"); | |
131 | MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds"); | |
132 | MODULE_PARM_DESC(erase_delay, "Sector erase delay (milliseconds)"); | |
133 | MODULE_PARM_DESC(output_cycle, "Word output (from flash) time (nanodeconds)"); | |
134 | MODULE_PARM_DESC(input_cycle, "Word input (to flash) time (nanodeconds)"); | |
135 | MODULE_PARM_DESC(bus_width, "Chip's bus width (8- or 16-bit)"); | |
136 | MODULE_PARM_DESC(do_delays, "Simulate NAND delays using busy-waits if not zero"); | |
137 | MODULE_PARM_DESC(log, "Perform logging if not zero"); | |
138 | MODULE_PARM_DESC(dbg, "Output debug information if not zero"); | |
2b77a0ed | 139 | MODULE_PARM_DESC(parts, "Partition sizes (in erase blocks) separated by commas"); |
514087e7 AH |
140 | /* Page and erase block positions for the following parameters are independent of any partitions */ |
141 | MODULE_PARM_DESC(badblocks, "Erase blocks that are initially marked bad, separated by commas"); | |
142 | MODULE_PARM_DESC(weakblocks, "Weak erase blocks [: remaining erase cycles (defaults to 3)]" | |
143 | " separated by commas e.g. 113:2 means eb 113" | |
144 | " can be erased only twice before failing"); | |
145 | MODULE_PARM_DESC(weakpages, "Weak pages [: maximum writes (defaults to 3)]" | |
146 | " separated by commas e.g. 1401:2 means page 1401" | |
147 | " can be written only twice before failing"); | |
148 | MODULE_PARM_DESC(bitflips, "Maximum number of random bit flips per page (zero by default)"); | |
149 | MODULE_PARM_DESC(gravepages, "Pages that lose data [: maximum reads (defaults to 3)]" | |
150 | " separated by commas e.g. 1401:2 means page 1401" | |
151 | " can be read only twice before failing"); | |
57aa6b54 | 152 | MODULE_PARM_DESC(rptwear, "Number of erases inbetween reporting wear, if not zero"); |
a5ac8aeb AH |
153 | MODULE_PARM_DESC(overridesize, "Specifies the NAND Flash size overriding the ID bytes. " |
154 | "The size is specified in erase blocks and as the exponent of a power of two" | |
155 | " e.g. 5 means a size of 32 erase blocks"); | |
1da177e4 LT |
156 | |
157 | /* The largest possible page size */ | |
158 | #define NS_LARGEST_PAGE_SIZE 2048 | |
61b03bd7 | 159 | |
1da177e4 LT |
160 | /* The prefix for simulator output */ |
161 | #define NS_OUTPUT_PREFIX "[nandsim]" | |
162 | ||
163 | /* Simulator's output macros (logging, debugging, warning, error) */ | |
164 | #define NS_LOG(args...) \ | |
165 | do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0) | |
166 | #define NS_DBG(args...) \ | |
167 | do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0) | |
168 | #define NS_WARN(args...) \ | |
2b77a0ed | 169 | do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0) |
1da177e4 | 170 | #define NS_ERR(args...) \ |
2b77a0ed | 171 | do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0) |
57aa6b54 AH |
172 | #define NS_INFO(args...) \ |
173 | do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0) | |
1da177e4 LT |
174 | |
175 | /* Busy-wait delay macros (microseconds, milliseconds) */ | |
176 | #define NS_UDELAY(us) \ | |
177 | do { if (do_delays) udelay(us); } while(0) | |
178 | #define NS_MDELAY(us) \ | |
179 | do { if (do_delays) mdelay(us); } while(0) | |
61b03bd7 | 180 | |
1da177e4 LT |
181 | /* Is the nandsim structure initialized ? */ |
182 | #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0) | |
183 | ||
184 | /* Good operation completion status */ | |
185 | #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0))) | |
186 | ||
187 | /* Operation failed completion status */ | |
61b03bd7 | 188 | #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns)) |
1da177e4 LT |
189 | |
190 | /* Calculate the page offset in flash RAM image by (row, column) address */ | |
191 | #define NS_RAW_OFFSET(ns) \ | |
192 | (((ns)->regs.row << (ns)->geom.pgshift) + ((ns)->regs.row * (ns)->geom.oobsz) + (ns)->regs.column) | |
61b03bd7 | 193 | |
1da177e4 LT |
194 | /* Calculate the OOB offset in flash RAM image by (row, column) address */ |
195 | #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz) | |
196 | ||
197 | /* After a command is input, the simulator goes to one of the following states */ | |
198 | #define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */ | |
199 | #define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */ | |
4a0c50c0 | 200 | #define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */ |
1da177e4 LT |
201 | #define STATE_CMD_PAGEPROG 0x00000004 /* start page programm */ |
202 | #define STATE_CMD_READOOB 0x00000005 /* read OOB area */ | |
203 | #define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */ | |
204 | #define STATE_CMD_STATUS 0x00000007 /* read status */ | |
205 | #define STATE_CMD_STATUS_M 0x00000008 /* read multi-plane status (isn't implemented) */ | |
206 | #define STATE_CMD_SEQIN 0x00000009 /* sequential data imput */ | |
207 | #define STATE_CMD_READID 0x0000000A /* read ID */ | |
208 | #define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */ | |
209 | #define STATE_CMD_RESET 0x0000000C /* reset */ | |
74216be4 AB |
210 | #define STATE_CMD_RNDOUT 0x0000000D /* random output command */ |
211 | #define STATE_CMD_RNDOUTSTART 0x0000000E /* random output start command */ | |
1da177e4 LT |
212 | #define STATE_CMD_MASK 0x0000000F /* command states mask */ |
213 | ||
8e87d782 | 214 | /* After an address is input, the simulator goes to one of these states */ |
1da177e4 LT |
215 | #define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */ |
216 | #define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */ | |
74216be4 AB |
217 | #define STATE_ADDR_COLUMN 0x00000030 /* column address was accepted */ |
218 | #define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */ | |
219 | #define STATE_ADDR_MASK 0x00000070 /* address states mask */ | |
1da177e4 LT |
220 | |
221 | /* Durind data input/output the simulator is in these states */ | |
222 | #define STATE_DATAIN 0x00000100 /* waiting for data input */ | |
223 | #define STATE_DATAIN_MASK 0x00000100 /* data input states mask */ | |
224 | ||
225 | #define STATE_DATAOUT 0x00001000 /* waiting for page data output */ | |
226 | #define STATE_DATAOUT_ID 0x00002000 /* waiting for ID bytes output */ | |
227 | #define STATE_DATAOUT_STATUS 0x00003000 /* waiting for status output */ | |
228 | #define STATE_DATAOUT_STATUS_M 0x00004000 /* waiting for multi-plane status output */ | |
229 | #define STATE_DATAOUT_MASK 0x00007000 /* data output states mask */ | |
230 | ||
231 | /* Previous operation is done, ready to accept new requests */ | |
232 | #define STATE_READY 0x00000000 | |
233 | ||
234 | /* This state is used to mark that the next state isn't known yet */ | |
235 | #define STATE_UNKNOWN 0x10000000 | |
236 | ||
237 | /* Simulator's actions bit masks */ | |
238 | #define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */ | |
239 | #define ACTION_PRGPAGE 0x00200000 /* programm the internal buffer to flash */ | |
240 | #define ACTION_SECERASE 0x00300000 /* erase sector */ | |
241 | #define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */ | |
242 | #define ACTION_HALFOFF 0x00500000 /* add to address half of page */ | |
243 | #define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */ | |
244 | #define ACTION_MASK 0x00700000 /* action mask */ | |
245 | ||
74216be4 | 246 | #define NS_OPER_NUM 13 /* Number of operations supported by the simulator */ |
1da177e4 LT |
247 | #define NS_OPER_STATES 6 /* Maximum number of states in operation */ |
248 | ||
249 | #define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */ | |
250 | #define OPT_PAGE256 0x00000001 /* 256-byte page chips */ | |
251 | #define OPT_PAGE512 0x00000002 /* 512-byte page chips */ | |
252 | #define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */ | |
253 | #define OPT_SMARTMEDIA 0x00000010 /* SmartMedia technology chips */ | |
254 | #define OPT_AUTOINCR 0x00000020 /* page number auto inctimentation is possible */ | |
255 | #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */ | |
256 | #define OPT_LARGEPAGE (OPT_PAGE2048) /* 2048-byte page chips */ | |
257 | #define OPT_SMALLPAGE (OPT_PAGE256 | OPT_PAGE512) /* 256 and 512-byte page chips */ | |
258 | ||
259 | /* Remove action bits ftom state */ | |
260 | #define NS_STATE(x) ((x) & ~ACTION_MASK) | |
61b03bd7 TG |
261 | |
262 | /* | |
1da177e4 LT |
263 | * Maximum previous states which need to be saved. Currently saving is |
264 | * only needed for page programm operation with preceeded read command | |
265 | * (which is only valid for 512-byte pages). | |
266 | */ | |
267 | #define NS_MAX_PREVSTATES 1 | |
268 | ||
d086d436 VK |
269 | /* |
270 | * A union to represent flash memory contents and flash buffer. | |
271 | */ | |
272 | union ns_mem { | |
273 | u_char *byte; /* for byte access */ | |
274 | uint16_t *word; /* for 16-bit word access */ | |
275 | }; | |
276 | ||
61b03bd7 | 277 | /* |
1da177e4 LT |
278 | * The structure which describes all the internal simulator data. |
279 | */ | |
280 | struct nandsim { | |
2b77a0ed AH |
281 | struct mtd_partition partitions[MAX_MTD_DEVICES]; |
282 | unsigned int nbparts; | |
1da177e4 LT |
283 | |
284 | uint busw; /* flash chip bus width (8 or 16) */ | |
285 | u_char ids[4]; /* chip's ID bytes */ | |
286 | uint32_t options; /* chip's characteristic bits */ | |
287 | uint32_t state; /* current chip state */ | |
288 | uint32_t nxstate; /* next expected state */ | |
61b03bd7 | 289 | |
1da177e4 LT |
290 | uint32_t *op; /* current operation, NULL operations isn't known yet */ |
291 | uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */ | |
292 | uint16_t npstates; /* number of previous states saved */ | |
293 | uint16_t stateidx; /* current state index */ | |
294 | ||
d086d436 VK |
295 | /* The simulated NAND flash pages array */ |
296 | union ns_mem *pages; | |
1da177e4 LT |
297 | |
298 | /* Internal buffer of page + OOB size bytes */ | |
d086d436 | 299 | union ns_mem buf; |
1da177e4 LT |
300 | |
301 | /* NAND flash "geometry" */ | |
302 | struct nandsin_geometry { | |
6eda7a55 | 303 | uint64_t totsz; /* total flash size, bytes */ |
1da177e4 LT |
304 | uint32_t secsz; /* flash sector (erase block) size, bytes */ |
305 | uint pgsz; /* NAND flash page size, bytes */ | |
306 | uint oobsz; /* page OOB area size, bytes */ | |
6eda7a55 | 307 | uint64_t totszoob; /* total flash size including OOB, bytes */ |
1da177e4 LT |
308 | uint pgszoob; /* page size including OOB , bytes*/ |
309 | uint secszoob; /* sector size including OOB, bytes */ | |
310 | uint pgnum; /* total number of pages */ | |
311 | uint pgsec; /* number of pages per sector */ | |
312 | uint secshift; /* bits number in sector size */ | |
313 | uint pgshift; /* bits number in page size */ | |
314 | uint oobshift; /* bits number in OOB size */ | |
315 | uint pgaddrbytes; /* bytes per page address */ | |
316 | uint secaddrbytes; /* bytes per sector address */ | |
317 | uint idbytes; /* the number ID bytes that this chip outputs */ | |
318 | } geom; | |
319 | ||
320 | /* NAND flash internal registers */ | |
321 | struct nandsim_regs { | |
322 | unsigned command; /* the command register */ | |
323 | u_char status; /* the status register */ | |
324 | uint row; /* the page number */ | |
325 | uint column; /* the offset within page */ | |
326 | uint count; /* internal counter */ | |
327 | uint num; /* number of bytes which must be processed */ | |
328 | uint off; /* fixed page offset */ | |
329 | } regs; | |
330 | ||
331 | /* NAND flash lines state */ | |
332 | struct ns_lines_status { | |
333 | int ce; /* chip Enable */ | |
334 | int cle; /* command Latch Enable */ | |
335 | int ale; /* address Latch Enable */ | |
336 | int wp; /* write Protect */ | |
337 | } lines; | |
338 | }; | |
339 | ||
340 | /* | |
341 | * Operations array. To perform any operation the simulator must pass | |
342 | * through the correspondent states chain. | |
343 | */ | |
344 | static struct nandsim_operations { | |
345 | uint32_t reqopts; /* options which are required to perform the operation */ | |
346 | uint32_t states[NS_OPER_STATES]; /* operation's states */ | |
347 | } ops[NS_OPER_NUM] = { | |
348 | /* Read page + OOB from the beginning */ | |
349 | {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY, | |
350 | STATE_DATAOUT, STATE_READY}}, | |
351 | /* Read page + OOB from the second half */ | |
352 | {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY, | |
353 | STATE_DATAOUT, STATE_READY}}, | |
354 | /* Read OOB */ | |
355 | {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY, | |
356 | STATE_DATAOUT, STATE_READY}}, | |
357 | /* Programm page starting from the beginning */ | |
358 | {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN, | |
359 | STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, | |
360 | /* Programm page starting from the beginning */ | |
361 | {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE, | |
362 | STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, | |
363 | /* Programm page starting from the second half */ | |
364 | {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE, | |
365 | STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, | |
366 | /* Programm OOB */ | |
367 | {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE, | |
368 | STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, | |
369 | /* Erase sector */ | |
370 | {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}}, | |
371 | /* Read status */ | |
372 | {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}}, | |
373 | /* Read multi-plane status */ | |
374 | {OPT_SMARTMEDIA, {STATE_CMD_STATUS_M, STATE_DATAOUT_STATUS_M, STATE_READY}}, | |
375 | /* Read ID */ | |
376 | {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}}, | |
377 | /* Large page devices read page */ | |
378 | {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY, | |
74216be4 AB |
379 | STATE_DATAOUT, STATE_READY}}, |
380 | /* Large page devices random page read */ | |
381 | {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY, | |
382 | STATE_DATAOUT, STATE_READY}}, | |
1da177e4 LT |
383 | }; |
384 | ||
514087e7 AH |
385 | struct weak_block { |
386 | struct list_head list; | |
387 | unsigned int erase_block_no; | |
388 | unsigned int max_erases; | |
389 | unsigned int erases_done; | |
390 | }; | |
391 | ||
392 | static LIST_HEAD(weak_blocks); | |
393 | ||
394 | struct weak_page { | |
395 | struct list_head list; | |
396 | unsigned int page_no; | |
397 | unsigned int max_writes; | |
398 | unsigned int writes_done; | |
399 | }; | |
400 | ||
401 | static LIST_HEAD(weak_pages); | |
402 | ||
403 | struct grave_page { | |
404 | struct list_head list; | |
405 | unsigned int page_no; | |
406 | unsigned int max_reads; | |
407 | unsigned int reads_done; | |
408 | }; | |
409 | ||
410 | static LIST_HEAD(grave_pages); | |
411 | ||
57aa6b54 AH |
412 | static unsigned long *erase_block_wear = NULL; |
413 | static unsigned int wear_eb_count = 0; | |
414 | static unsigned long total_wear = 0; | |
415 | static unsigned int rptwear_cnt = 0; | |
416 | ||
1da177e4 LT |
417 | /* MTD structure for NAND controller */ |
418 | static struct mtd_info *nsmtd; | |
419 | ||
420 | static u_char ns_verify_buf[NS_LARGEST_PAGE_SIZE]; | |
421 | ||
d086d436 VK |
422 | /* |
423 | * Allocate array of page pointers and initialize the array to NULL | |
424 | * pointers. | |
425 | * | |
426 | * RETURNS: 0 if success, -ENOMEM if memory alloc fails. | |
427 | */ | |
a5602146 | 428 | static int alloc_device(struct nandsim *ns) |
d086d436 VK |
429 | { |
430 | int i; | |
431 | ||
432 | ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem)); | |
433 | if (!ns->pages) { | |
434 | NS_ERR("alloc_map: unable to allocate page array\n"); | |
435 | return -ENOMEM; | |
436 | } | |
437 | for (i = 0; i < ns->geom.pgnum; i++) { | |
438 | ns->pages[i].byte = NULL; | |
439 | } | |
440 | ||
441 | return 0; | |
442 | } | |
443 | ||
444 | /* | |
445 | * Free any allocated pages, and free the array of page pointers. | |
446 | */ | |
a5602146 | 447 | static void free_device(struct nandsim *ns) |
d086d436 VK |
448 | { |
449 | int i; | |
450 | ||
451 | if (ns->pages) { | |
452 | for (i = 0; i < ns->geom.pgnum; i++) { | |
453 | if (ns->pages[i].byte) | |
454 | kfree(ns->pages[i].byte); | |
455 | } | |
456 | vfree(ns->pages); | |
457 | } | |
458 | } | |
459 | ||
2b77a0ed AH |
460 | static char *get_partition_name(int i) |
461 | { | |
462 | char buf[64]; | |
463 | sprintf(buf, "NAND simulator partition %d", i); | |
464 | return kstrdup(buf, GFP_KERNEL); | |
465 | } | |
466 | ||
6eda7a55 AH |
467 | static u_int64_t divide(u_int64_t n, u_int32_t d) |
468 | { | |
469 | do_div(n, d); | |
470 | return n; | |
471 | } | |
472 | ||
1da177e4 LT |
473 | /* |
474 | * Initialize the nandsim structure. | |
475 | * | |
476 | * RETURNS: 0 if success, -ERRNO if failure. | |
477 | */ | |
a5602146 | 478 | static int init_nandsim(struct mtd_info *mtd) |
1da177e4 LT |
479 | { |
480 | struct nand_chip *chip = (struct nand_chip *)mtd->priv; | |
481 | struct nandsim *ns = (struct nandsim *)(chip->priv); | |
2b77a0ed | 482 | int i, ret = 0; |
6eda7a55 AH |
483 | u_int64_t remains; |
484 | u_int64_t next_offset; | |
1da177e4 LT |
485 | |
486 | if (NS_IS_INITIALIZED(ns)) { | |
487 | NS_ERR("init_nandsim: nandsim is already initialized\n"); | |
488 | return -EIO; | |
489 | } | |
490 | ||
491 | /* Force mtd to not do delays */ | |
492 | chip->chip_delay = 0; | |
493 | ||
494 | /* Initialize the NAND flash parameters */ | |
495 | ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8; | |
496 | ns->geom.totsz = mtd->size; | |
28318776 | 497 | ns->geom.pgsz = mtd->writesize; |
1da177e4 LT |
498 | ns->geom.oobsz = mtd->oobsize; |
499 | ns->geom.secsz = mtd->erasesize; | |
500 | ns->geom.pgszoob = ns->geom.pgsz + ns->geom.oobsz; | |
6eda7a55 AH |
501 | ns->geom.pgnum = divide(ns->geom.totsz, ns->geom.pgsz); |
502 | ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz; | |
1da177e4 LT |
503 | ns->geom.secshift = ffs(ns->geom.secsz) - 1; |
504 | ns->geom.pgshift = chip->page_shift; | |
505 | ns->geom.oobshift = ffs(ns->geom.oobsz) - 1; | |
506 | ns->geom.pgsec = ns->geom.secsz / ns->geom.pgsz; | |
507 | ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec; | |
508 | ns->options = 0; | |
509 | ||
510 | if (ns->geom.pgsz == 256) { | |
511 | ns->options |= OPT_PAGE256; | |
512 | } | |
513 | else if (ns->geom.pgsz == 512) { | |
514 | ns->options |= (OPT_PAGE512 | OPT_AUTOINCR); | |
515 | if (ns->busw == 8) | |
516 | ns->options |= OPT_PAGE512_8BIT; | |
517 | } else if (ns->geom.pgsz == 2048) { | |
518 | ns->options |= OPT_PAGE2048; | |
519 | } else { | |
520 | NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz); | |
521 | return -EIO; | |
522 | } | |
523 | ||
524 | if (ns->options & OPT_SMALLPAGE) { | |
af3deccf | 525 | if (ns->geom.totsz <= (32 << 20)) { |
1da177e4 LT |
526 | ns->geom.pgaddrbytes = 3; |
527 | ns->geom.secaddrbytes = 2; | |
528 | } else { | |
529 | ns->geom.pgaddrbytes = 4; | |
530 | ns->geom.secaddrbytes = 3; | |
531 | } | |
532 | } else { | |
533 | if (ns->geom.totsz <= (128 << 20)) { | |
4a0c50c0 | 534 | ns->geom.pgaddrbytes = 4; |
1da177e4 LT |
535 | ns->geom.secaddrbytes = 2; |
536 | } else { | |
537 | ns->geom.pgaddrbytes = 5; | |
538 | ns->geom.secaddrbytes = 3; | |
539 | } | |
540 | } | |
61b03bd7 | 541 | |
2b77a0ed AH |
542 | /* Fill the partition_info structure */ |
543 | if (parts_num > ARRAY_SIZE(ns->partitions)) { | |
544 | NS_ERR("too many partitions.\n"); | |
545 | ret = -EINVAL; | |
546 | goto error; | |
547 | } | |
548 | remains = ns->geom.totsz; | |
549 | next_offset = 0; | |
550 | for (i = 0; i < parts_num; ++i) { | |
6eda7a55 AH |
551 | u_int64_t part_sz = (u_int64_t)parts[i] * ns->geom.secsz; |
552 | ||
553 | if (!part_sz || part_sz > remains) { | |
2b77a0ed AH |
554 | NS_ERR("bad partition size.\n"); |
555 | ret = -EINVAL; | |
556 | goto error; | |
557 | } | |
558 | ns->partitions[i].name = get_partition_name(i); | |
559 | ns->partitions[i].offset = next_offset; | |
6eda7a55 | 560 | ns->partitions[i].size = part_sz; |
2b77a0ed AH |
561 | next_offset += ns->partitions[i].size; |
562 | remains -= ns->partitions[i].size; | |
563 | } | |
564 | ns->nbparts = parts_num; | |
565 | if (remains) { | |
566 | if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) { | |
567 | NS_ERR("too many partitions.\n"); | |
568 | ret = -EINVAL; | |
569 | goto error; | |
570 | } | |
571 | ns->partitions[i].name = get_partition_name(i); | |
572 | ns->partitions[i].offset = next_offset; | |
573 | ns->partitions[i].size = remains; | |
574 | ns->nbparts += 1; | |
575 | } | |
576 | ||
1da177e4 LT |
577 | /* Detect how many ID bytes the NAND chip outputs */ |
578 | for (i = 0; nand_flash_ids[i].name != NULL; i++) { | |
579 | if (second_id_byte != nand_flash_ids[i].id) | |
580 | continue; | |
581 | if (!(nand_flash_ids[i].options & NAND_NO_AUTOINCR)) | |
582 | ns->options |= OPT_AUTOINCR; | |
583 | } | |
584 | ||
585 | if (ns->busw == 16) | |
586 | NS_WARN("16-bit flashes support wasn't tested\n"); | |
587 | ||
6eda7a55 | 588 | printk("flash size: %llu MiB\n", ns->geom.totsz >> 20); |
1da177e4 LT |
589 | printk("page size: %u bytes\n", ns->geom.pgsz); |
590 | printk("OOB area size: %u bytes\n", ns->geom.oobsz); | |
591 | printk("sector size: %u KiB\n", ns->geom.secsz >> 10); | |
592 | printk("pages number: %u\n", ns->geom.pgnum); | |
593 | printk("pages per sector: %u\n", ns->geom.pgsec); | |
594 | printk("bus width: %u\n", ns->busw); | |
595 | printk("bits in sector size: %u\n", ns->geom.secshift); | |
596 | printk("bits in page size: %u\n", ns->geom.pgshift); | |
597 | printk("bits in OOB size: %u\n", ns->geom.oobshift); | |
6eda7a55 | 598 | printk("flash size with OOB: %llu KiB\n", ns->geom.totszoob >> 10); |
1da177e4 LT |
599 | printk("page address bytes: %u\n", ns->geom.pgaddrbytes); |
600 | printk("sector address bytes: %u\n", ns->geom.secaddrbytes); | |
601 | printk("options: %#x\n", ns->options); | |
602 | ||
2b77a0ed | 603 | if ((ret = alloc_device(ns)) != 0) |
d086d436 | 604 | goto error; |
1da177e4 LT |
605 | |
606 | /* Allocate / initialize the internal buffer */ | |
607 | ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL); | |
608 | if (!ns->buf.byte) { | |
609 | NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n", | |
610 | ns->geom.pgszoob); | |
2b77a0ed | 611 | ret = -ENOMEM; |
1da177e4 LT |
612 | goto error; |
613 | } | |
614 | memset(ns->buf.byte, 0xFF, ns->geom.pgszoob); | |
615 | ||
1da177e4 LT |
616 | return 0; |
617 | ||
618 | error: | |
d086d436 | 619 | free_device(ns); |
1da177e4 | 620 | |
2b77a0ed | 621 | return ret; |
1da177e4 LT |
622 | } |
623 | ||
624 | /* | |
625 | * Free the nandsim structure. | |
626 | */ | |
a5602146 | 627 | static void free_nandsim(struct nandsim *ns) |
1da177e4 LT |
628 | { |
629 | kfree(ns->buf.byte); | |
d086d436 | 630 | free_device(ns); |
1da177e4 LT |
631 | |
632 | return; | |
633 | } | |
634 | ||
514087e7 AH |
635 | static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd) |
636 | { | |
637 | char *w; | |
638 | int zero_ok; | |
639 | unsigned int erase_block_no; | |
640 | loff_t offset; | |
641 | ||
642 | if (!badblocks) | |
643 | return 0; | |
644 | w = badblocks; | |
645 | do { | |
646 | zero_ok = (*w == '0' ? 1 : 0); | |
647 | erase_block_no = simple_strtoul(w, &w, 0); | |
648 | if (!zero_ok && !erase_block_no) { | |
649 | NS_ERR("invalid badblocks.\n"); | |
650 | return -EINVAL; | |
651 | } | |
652 | offset = erase_block_no * ns->geom.secsz; | |
653 | if (mtd->block_markbad(mtd, offset)) { | |
654 | NS_ERR("invalid badblocks.\n"); | |
655 | return -EINVAL; | |
656 | } | |
657 | if (*w == ',') | |
658 | w += 1; | |
659 | } while (*w); | |
660 | return 0; | |
661 | } | |
662 | ||
663 | static int parse_weakblocks(void) | |
664 | { | |
665 | char *w; | |
666 | int zero_ok; | |
667 | unsigned int erase_block_no; | |
668 | unsigned int max_erases; | |
669 | struct weak_block *wb; | |
670 | ||
671 | if (!weakblocks) | |
672 | return 0; | |
673 | w = weakblocks; | |
674 | do { | |
675 | zero_ok = (*w == '0' ? 1 : 0); | |
676 | erase_block_no = simple_strtoul(w, &w, 0); | |
677 | if (!zero_ok && !erase_block_no) { | |
678 | NS_ERR("invalid weakblocks.\n"); | |
679 | return -EINVAL; | |
680 | } | |
681 | max_erases = 3; | |
682 | if (*w == ':') { | |
683 | w += 1; | |
684 | max_erases = simple_strtoul(w, &w, 0); | |
685 | } | |
686 | if (*w == ',') | |
687 | w += 1; | |
688 | wb = kzalloc(sizeof(*wb), GFP_KERNEL); | |
689 | if (!wb) { | |
690 | NS_ERR("unable to allocate memory.\n"); | |
691 | return -ENOMEM; | |
692 | } | |
693 | wb->erase_block_no = erase_block_no; | |
694 | wb->max_erases = max_erases; | |
695 | list_add(&wb->list, &weak_blocks); | |
696 | } while (*w); | |
697 | return 0; | |
698 | } | |
699 | ||
700 | static int erase_error(unsigned int erase_block_no) | |
701 | { | |
702 | struct weak_block *wb; | |
703 | ||
704 | list_for_each_entry(wb, &weak_blocks, list) | |
705 | if (wb->erase_block_no == erase_block_no) { | |
706 | if (wb->erases_done >= wb->max_erases) | |
707 | return 1; | |
708 | wb->erases_done += 1; | |
709 | return 0; | |
710 | } | |
711 | return 0; | |
712 | } | |
713 | ||
714 | static int parse_weakpages(void) | |
715 | { | |
716 | char *w; | |
717 | int zero_ok; | |
718 | unsigned int page_no; | |
719 | unsigned int max_writes; | |
720 | struct weak_page *wp; | |
721 | ||
722 | if (!weakpages) | |
723 | return 0; | |
724 | w = weakpages; | |
725 | do { | |
726 | zero_ok = (*w == '0' ? 1 : 0); | |
727 | page_no = simple_strtoul(w, &w, 0); | |
728 | if (!zero_ok && !page_no) { | |
729 | NS_ERR("invalid weakpagess.\n"); | |
730 | return -EINVAL; | |
731 | } | |
732 | max_writes = 3; | |
733 | if (*w == ':') { | |
734 | w += 1; | |
735 | max_writes = simple_strtoul(w, &w, 0); | |
736 | } | |
737 | if (*w == ',') | |
738 | w += 1; | |
739 | wp = kzalloc(sizeof(*wp), GFP_KERNEL); | |
740 | if (!wp) { | |
741 | NS_ERR("unable to allocate memory.\n"); | |
742 | return -ENOMEM; | |
743 | } | |
744 | wp->page_no = page_no; | |
745 | wp->max_writes = max_writes; | |
746 | list_add(&wp->list, &weak_pages); | |
747 | } while (*w); | |
748 | return 0; | |
749 | } | |
750 | ||
751 | static int write_error(unsigned int page_no) | |
752 | { | |
753 | struct weak_page *wp; | |
754 | ||
755 | list_for_each_entry(wp, &weak_pages, list) | |
756 | if (wp->page_no == page_no) { | |
757 | if (wp->writes_done >= wp->max_writes) | |
758 | return 1; | |
759 | wp->writes_done += 1; | |
760 | return 0; | |
761 | } | |
762 | return 0; | |
763 | } | |
764 | ||
765 | static int parse_gravepages(void) | |
766 | { | |
767 | char *g; | |
768 | int zero_ok; | |
769 | unsigned int page_no; | |
770 | unsigned int max_reads; | |
771 | struct grave_page *gp; | |
772 | ||
773 | if (!gravepages) | |
774 | return 0; | |
775 | g = gravepages; | |
776 | do { | |
777 | zero_ok = (*g == '0' ? 1 : 0); | |
778 | page_no = simple_strtoul(g, &g, 0); | |
779 | if (!zero_ok && !page_no) { | |
780 | NS_ERR("invalid gravepagess.\n"); | |
781 | return -EINVAL; | |
782 | } | |
783 | max_reads = 3; | |
784 | if (*g == ':') { | |
785 | g += 1; | |
786 | max_reads = simple_strtoul(g, &g, 0); | |
787 | } | |
788 | if (*g == ',') | |
789 | g += 1; | |
790 | gp = kzalloc(sizeof(*gp), GFP_KERNEL); | |
791 | if (!gp) { | |
792 | NS_ERR("unable to allocate memory.\n"); | |
793 | return -ENOMEM; | |
794 | } | |
795 | gp->page_no = page_no; | |
796 | gp->max_reads = max_reads; | |
797 | list_add(&gp->list, &grave_pages); | |
798 | } while (*g); | |
799 | return 0; | |
800 | } | |
801 | ||
802 | static int read_error(unsigned int page_no) | |
803 | { | |
804 | struct grave_page *gp; | |
805 | ||
806 | list_for_each_entry(gp, &grave_pages, list) | |
807 | if (gp->page_no == page_no) { | |
808 | if (gp->reads_done >= gp->max_reads) | |
809 | return 1; | |
810 | gp->reads_done += 1; | |
811 | return 0; | |
812 | } | |
813 | return 0; | |
814 | } | |
815 | ||
816 | static void free_lists(void) | |
817 | { | |
818 | struct list_head *pos, *n; | |
819 | list_for_each_safe(pos, n, &weak_blocks) { | |
820 | list_del(pos); | |
821 | kfree(list_entry(pos, struct weak_block, list)); | |
822 | } | |
823 | list_for_each_safe(pos, n, &weak_pages) { | |
824 | list_del(pos); | |
825 | kfree(list_entry(pos, struct weak_page, list)); | |
826 | } | |
827 | list_for_each_safe(pos, n, &grave_pages) { | |
828 | list_del(pos); | |
829 | kfree(list_entry(pos, struct grave_page, list)); | |
830 | } | |
57aa6b54 AH |
831 | kfree(erase_block_wear); |
832 | } | |
833 | ||
834 | static int setup_wear_reporting(struct mtd_info *mtd) | |
835 | { | |
836 | size_t mem; | |
837 | ||
838 | if (!rptwear) | |
839 | return 0; | |
6eda7a55 | 840 | wear_eb_count = divide(mtd->size, mtd->erasesize); |
57aa6b54 AH |
841 | mem = wear_eb_count * sizeof(unsigned long); |
842 | if (mem / sizeof(unsigned long) != wear_eb_count) { | |
843 | NS_ERR("Too many erase blocks for wear reporting\n"); | |
844 | return -ENOMEM; | |
845 | } | |
846 | erase_block_wear = kzalloc(mem, GFP_KERNEL); | |
847 | if (!erase_block_wear) { | |
848 | NS_ERR("Too many erase blocks for wear reporting\n"); | |
849 | return -ENOMEM; | |
850 | } | |
851 | return 0; | |
852 | } | |
853 | ||
854 | static void update_wear(unsigned int erase_block_no) | |
855 | { | |
856 | unsigned long wmin = -1, wmax = 0, avg; | |
857 | unsigned long deciles[10], decile_max[10], tot = 0; | |
858 | unsigned int i; | |
859 | ||
860 | if (!erase_block_wear) | |
861 | return; | |
862 | total_wear += 1; | |
863 | if (total_wear == 0) | |
864 | NS_ERR("Erase counter total overflow\n"); | |
865 | erase_block_wear[erase_block_no] += 1; | |
866 | if (erase_block_wear[erase_block_no] == 0) | |
867 | NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no); | |
868 | rptwear_cnt += 1; | |
869 | if (rptwear_cnt < rptwear) | |
870 | return; | |
871 | rptwear_cnt = 0; | |
872 | /* Calc wear stats */ | |
873 | for (i = 0; i < wear_eb_count; ++i) { | |
874 | unsigned long wear = erase_block_wear[i]; | |
875 | if (wear < wmin) | |
876 | wmin = wear; | |
877 | if (wear > wmax) | |
878 | wmax = wear; | |
879 | tot += wear; | |
880 | } | |
881 | for (i = 0; i < 9; ++i) { | |
882 | deciles[i] = 0; | |
883 | decile_max[i] = (wmax * (i + 1) + 5) / 10; | |
884 | } | |
885 | deciles[9] = 0; | |
886 | decile_max[9] = wmax; | |
887 | for (i = 0; i < wear_eb_count; ++i) { | |
888 | int d; | |
889 | unsigned long wear = erase_block_wear[i]; | |
890 | for (d = 0; d < 10; ++d) | |
891 | if (wear <= decile_max[d]) { | |
892 | deciles[d] += 1; | |
893 | break; | |
894 | } | |
895 | } | |
896 | avg = tot / wear_eb_count; | |
897 | /* Output wear report */ | |
898 | NS_INFO("*** Wear Report ***\n"); | |
899 | NS_INFO("Total numbers of erases: %lu\n", tot); | |
900 | NS_INFO("Number of erase blocks: %u\n", wear_eb_count); | |
901 | NS_INFO("Average number of erases: %lu\n", avg); | |
902 | NS_INFO("Maximum number of erases: %lu\n", wmax); | |
903 | NS_INFO("Minimum number of erases: %lu\n", wmin); | |
904 | for (i = 0; i < 10; ++i) { | |
905 | unsigned long from = (i ? decile_max[i - 1] + 1 : 0); | |
906 | if (from > decile_max[i]) | |
907 | continue; | |
908 | NS_INFO("Number of ebs with erase counts from %lu to %lu : %lu\n", | |
909 | from, | |
910 | decile_max[i], | |
911 | deciles[i]); | |
912 | } | |
913 | NS_INFO("*** End of Wear Report ***\n"); | |
514087e7 AH |
914 | } |
915 | ||
1da177e4 LT |
916 | /* |
917 | * Returns the string representation of 'state' state. | |
918 | */ | |
a5602146 | 919 | static char *get_state_name(uint32_t state) |
1da177e4 LT |
920 | { |
921 | switch (NS_STATE(state)) { | |
922 | case STATE_CMD_READ0: | |
923 | return "STATE_CMD_READ0"; | |
924 | case STATE_CMD_READ1: | |
925 | return "STATE_CMD_READ1"; | |
926 | case STATE_CMD_PAGEPROG: | |
927 | return "STATE_CMD_PAGEPROG"; | |
928 | case STATE_CMD_READOOB: | |
929 | return "STATE_CMD_READOOB"; | |
930 | case STATE_CMD_READSTART: | |
931 | return "STATE_CMD_READSTART"; | |
932 | case STATE_CMD_ERASE1: | |
933 | return "STATE_CMD_ERASE1"; | |
934 | case STATE_CMD_STATUS: | |
935 | return "STATE_CMD_STATUS"; | |
936 | case STATE_CMD_STATUS_M: | |
937 | return "STATE_CMD_STATUS_M"; | |
938 | case STATE_CMD_SEQIN: | |
939 | return "STATE_CMD_SEQIN"; | |
940 | case STATE_CMD_READID: | |
941 | return "STATE_CMD_READID"; | |
942 | case STATE_CMD_ERASE2: | |
943 | return "STATE_CMD_ERASE2"; | |
944 | case STATE_CMD_RESET: | |
945 | return "STATE_CMD_RESET"; | |
74216be4 AB |
946 | case STATE_CMD_RNDOUT: |
947 | return "STATE_CMD_RNDOUT"; | |
948 | case STATE_CMD_RNDOUTSTART: | |
949 | return "STATE_CMD_RNDOUTSTART"; | |
1da177e4 LT |
950 | case STATE_ADDR_PAGE: |
951 | return "STATE_ADDR_PAGE"; | |
952 | case STATE_ADDR_SEC: | |
953 | return "STATE_ADDR_SEC"; | |
954 | case STATE_ADDR_ZERO: | |
955 | return "STATE_ADDR_ZERO"; | |
74216be4 AB |
956 | case STATE_ADDR_COLUMN: |
957 | return "STATE_ADDR_COLUMN"; | |
1da177e4 LT |
958 | case STATE_DATAIN: |
959 | return "STATE_DATAIN"; | |
960 | case STATE_DATAOUT: | |
961 | return "STATE_DATAOUT"; | |
962 | case STATE_DATAOUT_ID: | |
963 | return "STATE_DATAOUT_ID"; | |
964 | case STATE_DATAOUT_STATUS: | |
965 | return "STATE_DATAOUT_STATUS"; | |
966 | case STATE_DATAOUT_STATUS_M: | |
967 | return "STATE_DATAOUT_STATUS_M"; | |
968 | case STATE_READY: | |
969 | return "STATE_READY"; | |
970 | case STATE_UNKNOWN: | |
971 | return "STATE_UNKNOWN"; | |
972 | } | |
973 | ||
974 | NS_ERR("get_state_name: unknown state, BUG\n"); | |
975 | return NULL; | |
976 | } | |
977 | ||
978 | /* | |
979 | * Check if command is valid. | |
980 | * | |
981 | * RETURNS: 1 if wrong command, 0 if right. | |
982 | */ | |
a5602146 | 983 | static int check_command(int cmd) |
1da177e4 LT |
984 | { |
985 | switch (cmd) { | |
61b03bd7 | 986 | |
1da177e4 | 987 | case NAND_CMD_READ0: |
74216be4 | 988 | case NAND_CMD_READ1: |
1da177e4 LT |
989 | case NAND_CMD_READSTART: |
990 | case NAND_CMD_PAGEPROG: | |
991 | case NAND_CMD_READOOB: | |
992 | case NAND_CMD_ERASE1: | |
993 | case NAND_CMD_STATUS: | |
994 | case NAND_CMD_SEQIN: | |
995 | case NAND_CMD_READID: | |
996 | case NAND_CMD_ERASE2: | |
997 | case NAND_CMD_RESET: | |
74216be4 AB |
998 | case NAND_CMD_RNDOUT: |
999 | case NAND_CMD_RNDOUTSTART: | |
1da177e4 | 1000 | return 0; |
61b03bd7 | 1001 | |
1da177e4 LT |
1002 | case NAND_CMD_STATUS_MULTI: |
1003 | default: | |
1004 | return 1; | |
1005 | } | |
1006 | } | |
1007 | ||
1008 | /* | |
1009 | * Returns state after command is accepted by command number. | |
1010 | */ | |
a5602146 | 1011 | static uint32_t get_state_by_command(unsigned command) |
1da177e4 LT |
1012 | { |
1013 | switch (command) { | |
1014 | case NAND_CMD_READ0: | |
1015 | return STATE_CMD_READ0; | |
1016 | case NAND_CMD_READ1: | |
1017 | return STATE_CMD_READ1; | |
1018 | case NAND_CMD_PAGEPROG: | |
1019 | return STATE_CMD_PAGEPROG; | |
1020 | case NAND_CMD_READSTART: | |
1021 | return STATE_CMD_READSTART; | |
1022 | case NAND_CMD_READOOB: | |
1023 | return STATE_CMD_READOOB; | |
1024 | case NAND_CMD_ERASE1: | |
1025 | return STATE_CMD_ERASE1; | |
1026 | case NAND_CMD_STATUS: | |
1027 | return STATE_CMD_STATUS; | |
1028 | case NAND_CMD_STATUS_MULTI: | |
1029 | return STATE_CMD_STATUS_M; | |
1030 | case NAND_CMD_SEQIN: | |
1031 | return STATE_CMD_SEQIN; | |
1032 | case NAND_CMD_READID: | |
1033 | return STATE_CMD_READID; | |
1034 | case NAND_CMD_ERASE2: | |
1035 | return STATE_CMD_ERASE2; | |
1036 | case NAND_CMD_RESET: | |
1037 | return STATE_CMD_RESET; | |
74216be4 AB |
1038 | case NAND_CMD_RNDOUT: |
1039 | return STATE_CMD_RNDOUT; | |
1040 | case NAND_CMD_RNDOUTSTART: | |
1041 | return STATE_CMD_RNDOUTSTART; | |
1da177e4 LT |
1042 | } |
1043 | ||
1044 | NS_ERR("get_state_by_command: unknown command, BUG\n"); | |
1045 | return 0; | |
1046 | } | |
1047 | ||
1048 | /* | |
1049 | * Move an address byte to the correspondent internal register. | |
1050 | */ | |
a5602146 | 1051 | static inline void accept_addr_byte(struct nandsim *ns, u_char bt) |
1da177e4 LT |
1052 | { |
1053 | uint byte = (uint)bt; | |
61b03bd7 | 1054 | |
1da177e4 LT |
1055 | if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) |
1056 | ns->regs.column |= (byte << 8 * ns->regs.count); | |
1057 | else { | |
1058 | ns->regs.row |= (byte << 8 * (ns->regs.count - | |
1059 | ns->geom.pgaddrbytes + | |
1060 | ns->geom.secaddrbytes)); | |
1061 | } | |
1062 | ||
1063 | return; | |
1064 | } | |
61b03bd7 | 1065 | |
1da177e4 LT |
1066 | /* |
1067 | * Switch to STATE_READY state. | |
1068 | */ | |
a5602146 | 1069 | static inline void switch_to_ready_state(struct nandsim *ns, u_char status) |
1da177e4 LT |
1070 | { |
1071 | NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY)); | |
1072 | ||
1073 | ns->state = STATE_READY; | |
1074 | ns->nxstate = STATE_UNKNOWN; | |
1075 | ns->op = NULL; | |
1076 | ns->npstates = 0; | |
1077 | ns->stateidx = 0; | |
1078 | ns->regs.num = 0; | |
1079 | ns->regs.count = 0; | |
1080 | ns->regs.off = 0; | |
1081 | ns->regs.row = 0; | |
1082 | ns->regs.column = 0; | |
1083 | ns->regs.status = status; | |
1084 | } | |
1085 | ||
1086 | /* | |
1087 | * If the operation isn't known yet, try to find it in the global array | |
1088 | * of supported operations. | |
1089 | * | |
1090 | * Operation can be unknown because of the following. | |
1091 | * 1. New command was accepted and this is the firs call to find the | |
1092 | * correspondent states chain. In this case ns->npstates = 0; | |
1093 | * 2. There is several operations which begin with the same command(s) | |
1094 | * (for example program from the second half and read from the | |
1095 | * second half operations both begin with the READ1 command). In this | |
1096 | * case the ns->pstates[] array contains previous states. | |
61b03bd7 | 1097 | * |
1da177e4 LT |
1098 | * Thus, the function tries to find operation containing the following |
1099 | * states (if the 'flag' parameter is 0): | |
1100 | * ns->pstates[0], ... ns->pstates[ns->npstates], ns->state | |
1101 | * | |
1102 | * If (one and only one) matching operation is found, it is accepted ( | |
1103 | * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is | |
1104 | * zeroed). | |
61b03bd7 | 1105 | * |
1da177e4 LT |
1106 | * If there are several maches, the current state is pushed to the |
1107 | * ns->pstates. | |
1108 | * | |
1109 | * The operation can be unknown only while commands are input to the chip. | |
1110 | * As soon as address command is accepted, the operation must be known. | |
1111 | * In such situation the function is called with 'flag' != 0, and the | |
1112 | * operation is searched using the following pattern: | |
1113 | * ns->pstates[0], ... ns->pstates[ns->npstates], <address input> | |
61b03bd7 | 1114 | * |
1da177e4 LT |
1115 | * It is supposed that this pattern must either match one operation on |
1116 | * none. There can't be ambiguity in that case. | |
1117 | * | |
1118 | * If no matches found, the functions does the following: | |
1119 | * 1. if there are saved states present, try to ignore them and search | |
1120 | * again only using the last command. If nothing was found, switch | |
1121 | * to the STATE_READY state. | |
1122 | * 2. if there are no saved states, switch to the STATE_READY state. | |
1123 | * | |
1124 | * RETURNS: -2 - no matched operations found. | |
1125 | * -1 - several matches. | |
1126 | * 0 - operation is found. | |
1127 | */ | |
a5602146 | 1128 | static int find_operation(struct nandsim *ns, uint32_t flag) |
1da177e4 LT |
1129 | { |
1130 | int opsfound = 0; | |
1131 | int i, j, idx = 0; | |
61b03bd7 | 1132 | |
1da177e4 LT |
1133 | for (i = 0; i < NS_OPER_NUM; i++) { |
1134 | ||
1135 | int found = 1; | |
61b03bd7 | 1136 | |
1da177e4 LT |
1137 | if (!(ns->options & ops[i].reqopts)) |
1138 | /* Ignore operations we can't perform */ | |
1139 | continue; | |
61b03bd7 | 1140 | |
1da177e4 LT |
1141 | if (flag) { |
1142 | if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK)) | |
1143 | continue; | |
1144 | } else { | |
1145 | if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates])) | |
1146 | continue; | |
1147 | } | |
1148 | ||
61b03bd7 | 1149 | for (j = 0; j < ns->npstates; j++) |
1da177e4 LT |
1150 | if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j]) |
1151 | && (ns->options & ops[idx].reqopts)) { | |
1152 | found = 0; | |
1153 | break; | |
1154 | } | |
1155 | ||
1156 | if (found) { | |
1157 | idx = i; | |
1158 | opsfound += 1; | |
1159 | } | |
1160 | } | |
1161 | ||
1162 | if (opsfound == 1) { | |
1163 | /* Exact match */ | |
1164 | ns->op = &ops[idx].states[0]; | |
1165 | if (flag) { | |
61b03bd7 | 1166 | /* |
1da177e4 LT |
1167 | * In this case the find_operation function was |
1168 | * called when address has just began input. But it isn't | |
1169 | * yet fully input and the current state must | |
1170 | * not be one of STATE_ADDR_*, but the STATE_ADDR_* | |
1171 | * state must be the next state (ns->nxstate). | |
1172 | */ | |
1173 | ns->stateidx = ns->npstates - 1; | |
1174 | } else { | |
1175 | ns->stateidx = ns->npstates; | |
1176 | } | |
1177 | ns->npstates = 0; | |
1178 | ns->state = ns->op[ns->stateidx]; | |
1179 | ns->nxstate = ns->op[ns->stateidx + 1]; | |
1180 | NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n", | |
1181 | idx, get_state_name(ns->state), get_state_name(ns->nxstate)); | |
1182 | return 0; | |
1183 | } | |
61b03bd7 | 1184 | |
1da177e4 LT |
1185 | if (opsfound == 0) { |
1186 | /* Nothing was found. Try to ignore previous commands (if any) and search again */ | |
1187 | if (ns->npstates != 0) { | |
1188 | NS_DBG("find_operation: no operation found, try again with state %s\n", | |
1189 | get_state_name(ns->state)); | |
1190 | ns->npstates = 0; | |
1191 | return find_operation(ns, 0); | |
1192 | ||
1193 | } | |
1194 | NS_DBG("find_operation: no operations found\n"); | |
1195 | switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); | |
1196 | return -2; | |
1197 | } | |
61b03bd7 | 1198 | |
1da177e4 LT |
1199 | if (flag) { |
1200 | /* This shouldn't happen */ | |
1201 | NS_DBG("find_operation: BUG, operation must be known if address is input\n"); | |
1202 | return -2; | |
1203 | } | |
61b03bd7 | 1204 | |
1da177e4 LT |
1205 | NS_DBG("find_operation: there is still ambiguity\n"); |
1206 | ||
1207 | ns->pstates[ns->npstates++] = ns->state; | |
1208 | ||
1209 | return -1; | |
1210 | } | |
1211 | ||
d086d436 VK |
1212 | /* |
1213 | * Returns a pointer to the current page. | |
1214 | */ | |
1215 | static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns) | |
1216 | { | |
1217 | return &(ns->pages[ns->regs.row]); | |
1218 | } | |
1219 | ||
1220 | /* | |
1221 | * Retuns a pointer to the current byte, within the current page. | |
1222 | */ | |
1223 | static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns) | |
1224 | { | |
1225 | return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off; | |
1226 | } | |
1227 | ||
1228 | /* | |
1229 | * Fill the NAND buffer with data read from the specified page. | |
1230 | */ | |
1231 | static void read_page(struct nandsim *ns, int num) | |
1232 | { | |
1233 | union ns_mem *mypage; | |
1234 | ||
1235 | mypage = NS_GET_PAGE(ns); | |
1236 | if (mypage->byte == NULL) { | |
1237 | NS_DBG("read_page: page %d not allocated\n", ns->regs.row); | |
1238 | memset(ns->buf.byte, 0xFF, num); | |
1239 | } else { | |
514087e7 | 1240 | unsigned int page_no = ns->regs.row; |
d086d436 VK |
1241 | NS_DBG("read_page: page %d allocated, reading from %d\n", |
1242 | ns->regs.row, ns->regs.column + ns->regs.off); | |
514087e7 AH |
1243 | if (read_error(page_no)) { |
1244 | int i; | |
1245 | memset(ns->buf.byte, 0xFF, num); | |
1246 | for (i = 0; i < num; ++i) | |
1247 | ns->buf.byte[i] = random32(); | |
1248 | NS_WARN("simulating read error in page %u\n", page_no); | |
1249 | return; | |
1250 | } | |
d086d436 | 1251 | memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num); |
514087e7 AH |
1252 | if (bitflips && random32() < (1 << 22)) { |
1253 | int flips = 1; | |
1254 | if (bitflips > 1) | |
1255 | flips = (random32() % (int) bitflips) + 1; | |
1256 | while (flips--) { | |
1257 | int pos = random32() % (num * 8); | |
1258 | ns->buf.byte[pos / 8] ^= (1 << (pos % 8)); | |
1259 | NS_WARN("read_page: flipping bit %d in page %d " | |
1260 | "reading from %d ecc: corrected=%u failed=%u\n", | |
1261 | pos, ns->regs.row, ns->regs.column + ns->regs.off, | |
1262 | nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed); | |
1263 | } | |
1264 | } | |
d086d436 VK |
1265 | } |
1266 | } | |
1267 | ||
1268 | /* | |
1269 | * Erase all pages in the specified sector. | |
1270 | */ | |
1271 | static void erase_sector(struct nandsim *ns) | |
1272 | { | |
1273 | union ns_mem *mypage; | |
1274 | int i; | |
1275 | ||
1276 | mypage = NS_GET_PAGE(ns); | |
1277 | for (i = 0; i < ns->geom.pgsec; i++) { | |
1278 | if (mypage->byte != NULL) { | |
1279 | NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i); | |
1280 | kfree(mypage->byte); | |
1281 | mypage->byte = NULL; | |
1282 | } | |
1283 | mypage++; | |
1284 | } | |
1285 | } | |
1286 | ||
1287 | /* | |
1288 | * Program the specified page with the contents from the NAND buffer. | |
1289 | */ | |
1290 | static int prog_page(struct nandsim *ns, int num) | |
1291 | { | |
82810b7b | 1292 | int i; |
d086d436 VK |
1293 | union ns_mem *mypage; |
1294 | u_char *pg_off; | |
1295 | ||
1296 | mypage = NS_GET_PAGE(ns); | |
1297 | if (mypage->byte == NULL) { | |
1298 | NS_DBG("prog_page: allocating page %d\n", ns->regs.row); | |
98b830d2 AB |
1299 | /* |
1300 | * We allocate memory with GFP_NOFS because a flash FS may | |
1301 | * utilize this. If it is holding an FS lock, then gets here, | |
1302 | * then kmalloc runs writeback which goes to the FS again | |
1303 | * and deadlocks. This was seen in practice. | |
1304 | */ | |
1305 | mypage->byte = kmalloc(ns->geom.pgszoob, GFP_NOFS); | |
d086d436 VK |
1306 | if (mypage->byte == NULL) { |
1307 | NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row); | |
1308 | return -1; | |
1309 | } | |
1310 | memset(mypage->byte, 0xFF, ns->geom.pgszoob); | |
1311 | } | |
1312 | ||
1313 | pg_off = NS_PAGE_BYTE_OFF(ns); | |
82810b7b AB |
1314 | for (i = 0; i < num; i++) |
1315 | pg_off[i] &= ns->buf.byte[i]; | |
d086d436 VK |
1316 | |
1317 | return 0; | |
1318 | } | |
1319 | ||
1da177e4 LT |
1320 | /* |
1321 | * If state has any action bit, perform this action. | |
1322 | * | |
1323 | * RETURNS: 0 if success, -1 if error. | |
1324 | */ | |
a5602146 | 1325 | static int do_state_action(struct nandsim *ns, uint32_t action) |
1da177e4 | 1326 | { |
d086d436 | 1327 | int num; |
1da177e4 | 1328 | int busdiv = ns->busw == 8 ? 1 : 2; |
514087e7 | 1329 | unsigned int erase_block_no, page_no; |
1da177e4 LT |
1330 | |
1331 | action &= ACTION_MASK; | |
61b03bd7 | 1332 | |
1da177e4 LT |
1333 | /* Check that page address input is correct */ |
1334 | if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) { | |
1335 | NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row); | |
1336 | return -1; | |
1337 | } | |
1338 | ||
1339 | switch (action) { | |
1340 | ||
1341 | case ACTION_CPY: | |
1342 | /* | |
1343 | * Copy page data to the internal buffer. | |
1344 | */ | |
1345 | ||
1346 | /* Column shouldn't be very large */ | |
1347 | if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) { | |
1348 | NS_ERR("do_state_action: column number is too large\n"); | |
1349 | break; | |
1350 | } | |
1351 | num = ns->geom.pgszoob - ns->regs.off - ns->regs.column; | |
d086d436 | 1352 | read_page(ns, num); |
1da177e4 LT |
1353 | |
1354 | NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n", | |
1355 | num, NS_RAW_OFFSET(ns) + ns->regs.off); | |
61b03bd7 | 1356 | |
1da177e4 LT |
1357 | if (ns->regs.off == 0) |
1358 | NS_LOG("read page %d\n", ns->regs.row); | |
1359 | else if (ns->regs.off < ns->geom.pgsz) | |
1360 | NS_LOG("read page %d (second half)\n", ns->regs.row); | |
1361 | else | |
1362 | NS_LOG("read OOB of page %d\n", ns->regs.row); | |
61b03bd7 | 1363 | |
1da177e4 LT |
1364 | NS_UDELAY(access_delay); |
1365 | NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv); | |
1366 | ||
1367 | break; | |
1368 | ||
1369 | case ACTION_SECERASE: | |
1370 | /* | |
1371 | * Erase sector. | |
1372 | */ | |
61b03bd7 | 1373 | |
1da177e4 LT |
1374 | if (ns->lines.wp) { |
1375 | NS_ERR("do_state_action: device is write-protected, ignore sector erase\n"); | |
1376 | return -1; | |
1377 | } | |
61b03bd7 | 1378 | |
1da177e4 LT |
1379 | if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec |
1380 | || (ns->regs.row & ~(ns->geom.secsz - 1))) { | |
1381 | NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row); | |
1382 | return -1; | |
1383 | } | |
61b03bd7 | 1384 | |
1da177e4 LT |
1385 | ns->regs.row = (ns->regs.row << |
1386 | 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column; | |
1387 | ns->regs.column = 0; | |
61b03bd7 | 1388 | |
514087e7 AH |
1389 | erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift); |
1390 | ||
1da177e4 LT |
1391 | NS_DBG("do_state_action: erase sector at address %#x, off = %d\n", |
1392 | ns->regs.row, NS_RAW_OFFSET(ns)); | |
514087e7 | 1393 | NS_LOG("erase sector %u\n", erase_block_no); |
1da177e4 | 1394 | |
d086d436 | 1395 | erase_sector(ns); |
61b03bd7 | 1396 | |
1da177e4 | 1397 | NS_MDELAY(erase_delay); |
61b03bd7 | 1398 | |
57aa6b54 AH |
1399 | if (erase_block_wear) |
1400 | update_wear(erase_block_no); | |
1401 | ||
514087e7 AH |
1402 | if (erase_error(erase_block_no)) { |
1403 | NS_WARN("simulating erase failure in erase block %u\n", erase_block_no); | |
1404 | return -1; | |
1405 | } | |
1406 | ||
1da177e4 LT |
1407 | break; |
1408 | ||
1409 | case ACTION_PRGPAGE: | |
1410 | /* | |
1411 | * Programm page - move internal buffer data to the page. | |
1412 | */ | |
1413 | ||
1414 | if (ns->lines.wp) { | |
1415 | NS_WARN("do_state_action: device is write-protected, programm\n"); | |
1416 | return -1; | |
1417 | } | |
1418 | ||
1419 | num = ns->geom.pgszoob - ns->regs.off - ns->regs.column; | |
1420 | if (num != ns->regs.count) { | |
1421 | NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n", | |
1422 | ns->regs.count, num); | |
1423 | return -1; | |
1424 | } | |
1425 | ||
d086d436 VK |
1426 | if (prog_page(ns, num) == -1) |
1427 | return -1; | |
1da177e4 | 1428 | |
514087e7 AH |
1429 | page_no = ns->regs.row; |
1430 | ||
1da177e4 LT |
1431 | NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n", |
1432 | num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off); | |
1433 | NS_LOG("programm page %d\n", ns->regs.row); | |
61b03bd7 | 1434 | |
1da177e4 LT |
1435 | NS_UDELAY(programm_delay); |
1436 | NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv); | |
61b03bd7 | 1437 | |
514087e7 AH |
1438 | if (write_error(page_no)) { |
1439 | NS_WARN("simulating write failure in page %u\n", page_no); | |
1440 | return -1; | |
1441 | } | |
1442 | ||
1da177e4 | 1443 | break; |
61b03bd7 | 1444 | |
1da177e4 LT |
1445 | case ACTION_ZEROOFF: |
1446 | NS_DBG("do_state_action: set internal offset to 0\n"); | |
1447 | ns->regs.off = 0; | |
1448 | break; | |
1449 | ||
1450 | case ACTION_HALFOFF: | |
1451 | if (!(ns->options & OPT_PAGE512_8BIT)) { | |
1452 | NS_ERR("do_state_action: BUG! can't skip half of page for non-512" | |
1453 | "byte page size 8x chips\n"); | |
1454 | return -1; | |
1455 | } | |
1456 | NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2); | |
1457 | ns->regs.off = ns->geom.pgsz/2; | |
1458 | break; | |
1459 | ||
1460 | case ACTION_OOBOFF: | |
1461 | NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz); | |
1462 | ns->regs.off = ns->geom.pgsz; | |
1463 | break; | |
61b03bd7 | 1464 | |
1da177e4 LT |
1465 | default: |
1466 | NS_DBG("do_state_action: BUG! unknown action\n"); | |
1467 | } | |
1468 | ||
1469 | return 0; | |
1470 | } | |
1471 | ||
1472 | /* | |
1473 | * Switch simulator's state. | |
1474 | */ | |
a5602146 | 1475 | static void switch_state(struct nandsim *ns) |
1da177e4 LT |
1476 | { |
1477 | if (ns->op) { | |
1478 | /* | |
1479 | * The current operation have already been identified. | |
1480 | * Just follow the states chain. | |
1481 | */ | |
61b03bd7 | 1482 | |
1da177e4 LT |
1483 | ns->stateidx += 1; |
1484 | ns->state = ns->nxstate; | |
1485 | ns->nxstate = ns->op[ns->stateidx + 1]; | |
1486 | ||
1487 | NS_DBG("switch_state: operation is known, switch to the next state, " | |
1488 | "state: %s, nxstate: %s\n", | |
1489 | get_state_name(ns->state), get_state_name(ns->nxstate)); | |
1490 | ||
1491 | /* See, whether we need to do some action */ | |
1492 | if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) { | |
1493 | switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); | |
1494 | return; | |
1495 | } | |
61b03bd7 | 1496 | |
1da177e4 LT |
1497 | } else { |
1498 | /* | |
1499 | * We don't yet know which operation we perform. | |
1500 | * Try to identify it. | |
1501 | */ | |
1502 | ||
61b03bd7 | 1503 | /* |
1da177e4 LT |
1504 | * The only event causing the switch_state function to |
1505 | * be called with yet unknown operation is new command. | |
1506 | */ | |
1507 | ns->state = get_state_by_command(ns->regs.command); | |
1508 | ||
1509 | NS_DBG("switch_state: operation is unknown, try to find it\n"); | |
1510 | ||
1511 | if (find_operation(ns, 0) != 0) | |
1512 | return; | |
1513 | ||
1514 | if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) { | |
1515 | switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); | |
1516 | return; | |
1517 | } | |
1518 | } | |
1519 | ||
1520 | /* For 16x devices column means the page offset in words */ | |
1521 | if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) { | |
1522 | NS_DBG("switch_state: double the column number for 16x device\n"); | |
1523 | ns->regs.column <<= 1; | |
1524 | } | |
1525 | ||
1526 | if (NS_STATE(ns->nxstate) == STATE_READY) { | |
1527 | /* | |
1528 | * The current state is the last. Return to STATE_READY | |
1529 | */ | |
1530 | ||
1531 | u_char status = NS_STATUS_OK(ns); | |
61b03bd7 | 1532 | |
1da177e4 LT |
1533 | /* In case of data states, see if all bytes were input/output */ |
1534 | if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) | |
1535 | && ns->regs.count != ns->regs.num) { | |
1536 | NS_WARN("switch_state: not all bytes were processed, %d left\n", | |
1537 | ns->regs.num - ns->regs.count); | |
1538 | status = NS_STATUS_FAILED(ns); | |
1539 | } | |
61b03bd7 | 1540 | |
1da177e4 LT |
1541 | NS_DBG("switch_state: operation complete, switch to STATE_READY state\n"); |
1542 | ||
1543 | switch_to_ready_state(ns, status); | |
1544 | ||
1545 | return; | |
1546 | } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) { | |
61b03bd7 | 1547 | /* |
1da177e4 LT |
1548 | * If the next state is data input/output, switch to it now |
1549 | */ | |
61b03bd7 | 1550 | |
1da177e4 LT |
1551 | ns->state = ns->nxstate; |
1552 | ns->nxstate = ns->op[++ns->stateidx + 1]; | |
1553 | ns->regs.num = ns->regs.count = 0; | |
1554 | ||
1555 | NS_DBG("switch_state: the next state is data I/O, switch, " | |
1556 | "state: %s, nxstate: %s\n", | |
1557 | get_state_name(ns->state), get_state_name(ns->nxstate)); | |
1558 | ||
1559 | /* | |
1560 | * Set the internal register to the count of bytes which | |
1561 | * are expected to be input or output | |
1562 | */ | |
1563 | switch (NS_STATE(ns->state)) { | |
1564 | case STATE_DATAIN: | |
1565 | case STATE_DATAOUT: | |
1566 | ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column; | |
1567 | break; | |
61b03bd7 | 1568 | |
1da177e4 LT |
1569 | case STATE_DATAOUT_ID: |
1570 | ns->regs.num = ns->geom.idbytes; | |
1571 | break; | |
61b03bd7 | 1572 | |
1da177e4 LT |
1573 | case STATE_DATAOUT_STATUS: |
1574 | case STATE_DATAOUT_STATUS_M: | |
1575 | ns->regs.count = ns->regs.num = 0; | |
1576 | break; | |
61b03bd7 | 1577 | |
1da177e4 LT |
1578 | default: |
1579 | NS_ERR("switch_state: BUG! unknown data state\n"); | |
1580 | } | |
1581 | ||
1582 | } else if (ns->nxstate & STATE_ADDR_MASK) { | |
1583 | /* | |
1584 | * If the next state is address input, set the internal | |
1585 | * register to the number of expected address bytes | |
1586 | */ | |
1587 | ||
1588 | ns->regs.count = 0; | |
61b03bd7 | 1589 | |
1da177e4 LT |
1590 | switch (NS_STATE(ns->nxstate)) { |
1591 | case STATE_ADDR_PAGE: | |
1592 | ns->regs.num = ns->geom.pgaddrbytes; | |
61b03bd7 | 1593 | |
1da177e4 LT |
1594 | break; |
1595 | case STATE_ADDR_SEC: | |
1596 | ns->regs.num = ns->geom.secaddrbytes; | |
1597 | break; | |
61b03bd7 | 1598 | |
1da177e4 LT |
1599 | case STATE_ADDR_ZERO: |
1600 | ns->regs.num = 1; | |
1601 | break; | |
1602 | ||
74216be4 AB |
1603 | case STATE_ADDR_COLUMN: |
1604 | /* Column address is always 2 bytes */ | |
1605 | ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes; | |
1606 | break; | |
1607 | ||
1da177e4 LT |
1608 | default: |
1609 | NS_ERR("switch_state: BUG! unknown address state\n"); | |
1610 | } | |
1611 | } else { | |
61b03bd7 | 1612 | /* |
1da177e4 LT |
1613 | * Just reset internal counters. |
1614 | */ | |
1615 | ||
1616 | ns->regs.num = 0; | |
1617 | ns->regs.count = 0; | |
1618 | } | |
1619 | } | |
1620 | ||
a5602146 | 1621 | static u_char ns_nand_read_byte(struct mtd_info *mtd) |
1da177e4 LT |
1622 | { |
1623 | struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv; | |
1624 | u_char outb = 0x00; | |
1625 | ||
1626 | /* Sanity and correctness checks */ | |
1627 | if (!ns->lines.ce) { | |
1628 | NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb); | |
1629 | return outb; | |
1630 | } | |
1631 | if (ns->lines.ale || ns->lines.cle) { | |
1632 | NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb); | |
1633 | return outb; | |
1634 | } | |
1635 | if (!(ns->state & STATE_DATAOUT_MASK)) { | |
1636 | NS_WARN("read_byte: unexpected data output cycle, state is %s " | |
1637 | "return %#x\n", get_state_name(ns->state), (uint)outb); | |
1638 | return outb; | |
1639 | } | |
1640 | ||
1641 | /* Status register may be read as many times as it is wanted */ | |
1642 | if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) { | |
1643 | NS_DBG("read_byte: return %#x status\n", ns->regs.status); | |
1644 | return ns->regs.status; | |
1645 | } | |
1646 | ||
1647 | /* Check if there is any data in the internal buffer which may be read */ | |
1648 | if (ns->regs.count == ns->regs.num) { | |
1649 | NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb); | |
1650 | return outb; | |
1651 | } | |
1652 | ||
1653 | switch (NS_STATE(ns->state)) { | |
1654 | case STATE_DATAOUT: | |
1655 | if (ns->busw == 8) { | |
1656 | outb = ns->buf.byte[ns->regs.count]; | |
1657 | ns->regs.count += 1; | |
1658 | } else { | |
1659 | outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]); | |
1660 | ns->regs.count += 2; | |
1661 | } | |
1662 | break; | |
1663 | case STATE_DATAOUT_ID: | |
1664 | NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num); | |
1665 | outb = ns->ids[ns->regs.count]; | |
1666 | ns->regs.count += 1; | |
1667 | break; | |
1668 | default: | |
1669 | BUG(); | |
1670 | } | |
61b03bd7 | 1671 | |
1da177e4 LT |
1672 | if (ns->regs.count == ns->regs.num) { |
1673 | NS_DBG("read_byte: all bytes were read\n"); | |
1674 | ||
1675 | /* | |
1676 | * The OPT_AUTOINCR allows to read next conseqitive pages without | |
1677 | * new read operation cycle. | |
1678 | */ | |
1679 | if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) { | |
1680 | ns->regs.count = 0; | |
1681 | if (ns->regs.row + 1 < ns->geom.pgnum) | |
1682 | ns->regs.row += 1; | |
1683 | NS_DBG("read_byte: switch to the next page (%#x)\n", ns->regs.row); | |
1684 | do_state_action(ns, ACTION_CPY); | |
1685 | } | |
1686 | else if (NS_STATE(ns->nxstate) == STATE_READY) | |
1687 | switch_state(ns); | |
61b03bd7 | 1688 | |
1da177e4 | 1689 | } |
61b03bd7 | 1690 | |
1da177e4 LT |
1691 | return outb; |
1692 | } | |
1693 | ||
a5602146 | 1694 | static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte) |
1da177e4 LT |
1695 | { |
1696 | struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv; | |
61b03bd7 | 1697 | |
1da177e4 LT |
1698 | /* Sanity and correctness checks */ |
1699 | if (!ns->lines.ce) { | |
1700 | NS_ERR("write_byte: chip is disabled, ignore write\n"); | |
1701 | return; | |
1702 | } | |
1703 | if (ns->lines.ale && ns->lines.cle) { | |
1704 | NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n"); | |
1705 | return; | |
1706 | } | |
61b03bd7 | 1707 | |
1da177e4 LT |
1708 | if (ns->lines.cle == 1) { |
1709 | /* | |
1710 | * The byte written is a command. | |
1711 | */ | |
1712 | ||
1713 | if (byte == NAND_CMD_RESET) { | |
1714 | NS_LOG("reset chip\n"); | |
1715 | switch_to_ready_state(ns, NS_STATUS_OK(ns)); | |
1716 | return; | |
1717 | } | |
1718 | ||
74216be4 AB |
1719 | /* Check that the command byte is correct */ |
1720 | if (check_command(byte)) { | |
1721 | NS_ERR("write_byte: unknown command %#x\n", (uint)byte); | |
1722 | return; | |
1723 | } | |
1724 | ||
1da177e4 LT |
1725 | if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS |
1726 | || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M | |
74216be4 AB |
1727 | || NS_STATE(ns->state) == STATE_DATAOUT) { |
1728 | int row = ns->regs.row; | |
1729 | ||
1da177e4 | 1730 | switch_state(ns); |
74216be4 AB |
1731 | if (byte == NAND_CMD_RNDOUT) |
1732 | ns->regs.row = row; | |
1733 | } | |
1da177e4 LT |
1734 | |
1735 | /* Check if chip is expecting command */ | |
1736 | if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) { | |
1737 | /* | |
1738 | * We are in situation when something else (not command) | |
1739 | * was expected but command was input. In this case ignore | |
1740 | * previous command(s)/state(s) and accept the last one. | |
1741 | */ | |
1742 | NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, " | |
1743 | "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate)); | |
1744 | switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); | |
1745 | } | |
61b03bd7 | 1746 | |
1da177e4 LT |
1747 | NS_DBG("command byte corresponding to %s state accepted\n", |
1748 | get_state_name(get_state_by_command(byte))); | |
1749 | ns->regs.command = byte; | |
1750 | switch_state(ns); | |
1751 | ||
1752 | } else if (ns->lines.ale == 1) { | |
1753 | /* | |
1754 | * The byte written is an address. | |
1755 | */ | |
1756 | ||
1757 | if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) { | |
1758 | ||
1759 | NS_DBG("write_byte: operation isn't known yet, identify it\n"); | |
1760 | ||
1761 | if (find_operation(ns, 1) < 0) | |
1762 | return; | |
61b03bd7 | 1763 | |
1da177e4 LT |
1764 | if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) { |
1765 | switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); | |
1766 | return; | |
1767 | } | |
61b03bd7 | 1768 | |
1da177e4 LT |
1769 | ns->regs.count = 0; |
1770 | switch (NS_STATE(ns->nxstate)) { | |
1771 | case STATE_ADDR_PAGE: | |
1772 | ns->regs.num = ns->geom.pgaddrbytes; | |
1773 | break; | |
1774 | case STATE_ADDR_SEC: | |
1775 | ns->regs.num = ns->geom.secaddrbytes; | |
1776 | break; | |
1777 | case STATE_ADDR_ZERO: | |
1778 | ns->regs.num = 1; | |
1779 | break; | |
1780 | default: | |
1781 | BUG(); | |
1782 | } | |
1783 | } | |
1784 | ||
1785 | /* Check that chip is expecting address */ | |
1786 | if (!(ns->nxstate & STATE_ADDR_MASK)) { | |
1787 | NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, " | |
1788 | "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate)); | |
1789 | switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); | |
1790 | return; | |
1791 | } | |
61b03bd7 | 1792 | |
1da177e4 LT |
1793 | /* Check if this is expected byte */ |
1794 | if (ns->regs.count == ns->regs.num) { | |
1795 | NS_ERR("write_byte: no more address bytes expected\n"); | |
1796 | switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); | |
1797 | return; | |
1798 | } | |
1799 | ||
1800 | accept_addr_byte(ns, byte); | |
1801 | ||
1802 | ns->regs.count += 1; | |
1803 | ||
1804 | NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n", | |
1805 | (uint)byte, ns->regs.count, ns->regs.num); | |
1806 | ||
1807 | if (ns->regs.count == ns->regs.num) { | |
1808 | NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column); | |
1809 | switch_state(ns); | |
1810 | } | |
61b03bd7 | 1811 | |
1da177e4 LT |
1812 | } else { |
1813 | /* | |
1814 | * The byte written is an input data. | |
1815 | */ | |
61b03bd7 | 1816 | |
1da177e4 LT |
1817 | /* Check that chip is expecting data input */ |
1818 | if (!(ns->state & STATE_DATAIN_MASK)) { | |
1819 | NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, " | |
1820 | "switch to %s\n", (uint)byte, | |
1821 | get_state_name(ns->state), get_state_name(STATE_READY)); | |
1822 | switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); | |
1823 | return; | |
1824 | } | |
1825 | ||
1826 | /* Check if this is expected byte */ | |
1827 | if (ns->regs.count == ns->regs.num) { | |
1828 | NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n", | |
1829 | ns->regs.num); | |
1830 | return; | |
1831 | } | |
1832 | ||
1833 | if (ns->busw == 8) { | |
1834 | ns->buf.byte[ns->regs.count] = byte; | |
1835 | ns->regs.count += 1; | |
1836 | } else { | |
1837 | ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte); | |
1838 | ns->regs.count += 2; | |
1839 | } | |
1840 | } | |
1841 | ||
1842 | return; | |
1843 | } | |
1844 | ||
7abd3ef9 TG |
1845 | static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask) |
1846 | { | |
1847 | struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv; | |
1848 | ||
1849 | ns->lines.cle = bitmask & NAND_CLE ? 1 : 0; | |
1850 | ns->lines.ale = bitmask & NAND_ALE ? 1 : 0; | |
1851 | ns->lines.ce = bitmask & NAND_NCE ? 1 : 0; | |
1852 | ||
1853 | if (cmd != NAND_CMD_NONE) | |
1854 | ns_nand_write_byte(mtd, cmd); | |
1855 | } | |
1856 | ||
a5602146 | 1857 | static int ns_device_ready(struct mtd_info *mtd) |
1da177e4 LT |
1858 | { |
1859 | NS_DBG("device_ready\n"); | |
1860 | return 1; | |
1861 | } | |
1862 | ||
a5602146 | 1863 | static uint16_t ns_nand_read_word(struct mtd_info *mtd) |
1da177e4 LT |
1864 | { |
1865 | struct nand_chip *chip = (struct nand_chip *)mtd->priv; | |
1866 | ||
1867 | NS_DBG("read_word\n"); | |
61b03bd7 | 1868 | |
1da177e4 LT |
1869 | return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8); |
1870 | } | |
1871 | ||
a5602146 | 1872 | static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) |
1da177e4 LT |
1873 | { |
1874 | struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv; | |
1875 | ||
1876 | /* Check that chip is expecting data input */ | |
1877 | if (!(ns->state & STATE_DATAIN_MASK)) { | |
1878 | NS_ERR("write_buf: data input isn't expected, state is %s, " | |
1879 | "switch to STATE_READY\n", get_state_name(ns->state)); | |
1880 | switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); | |
1881 | return; | |
1882 | } | |
1883 | ||
1884 | /* Check if these are expected bytes */ | |
1885 | if (ns->regs.count + len > ns->regs.num) { | |
1886 | NS_ERR("write_buf: too many input bytes\n"); | |
1887 | switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); | |
1888 | return; | |
1889 | } | |
1890 | ||
1891 | memcpy(ns->buf.byte + ns->regs.count, buf, len); | |
1892 | ns->regs.count += len; | |
61b03bd7 | 1893 | |
1da177e4 LT |
1894 | if (ns->regs.count == ns->regs.num) { |
1895 | NS_DBG("write_buf: %d bytes were written\n", ns->regs.count); | |
1896 | } | |
1897 | } | |
1898 | ||
a5602146 | 1899 | static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) |
1da177e4 LT |
1900 | { |
1901 | struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv; | |
1902 | ||
1903 | /* Sanity and correctness checks */ | |
1904 | if (!ns->lines.ce) { | |
1905 | NS_ERR("read_buf: chip is disabled\n"); | |
1906 | return; | |
1907 | } | |
1908 | if (ns->lines.ale || ns->lines.cle) { | |
1909 | NS_ERR("read_buf: ALE or CLE pin is high\n"); | |
1910 | return; | |
1911 | } | |
1912 | if (!(ns->state & STATE_DATAOUT_MASK)) { | |
1913 | NS_WARN("read_buf: unexpected data output cycle, current state is %s\n", | |
1914 | get_state_name(ns->state)); | |
1915 | return; | |
1916 | } | |
1917 | ||
1918 | if (NS_STATE(ns->state) != STATE_DATAOUT) { | |
1919 | int i; | |
1920 | ||
1921 | for (i = 0; i < len; i++) | |
1922 | buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd); | |
1923 | ||
1924 | return; | |
1925 | } | |
1926 | ||
1927 | /* Check if these are expected bytes */ | |
1928 | if (ns->regs.count + len > ns->regs.num) { | |
1929 | NS_ERR("read_buf: too many bytes to read\n"); | |
1930 | switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); | |
1931 | return; | |
1932 | } | |
1933 | ||
1934 | memcpy(buf, ns->buf.byte + ns->regs.count, len); | |
1935 | ns->regs.count += len; | |
61b03bd7 | 1936 | |
1da177e4 LT |
1937 | if (ns->regs.count == ns->regs.num) { |
1938 | if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) { | |
1939 | ns->regs.count = 0; | |
1940 | if (ns->regs.row + 1 < ns->geom.pgnum) | |
1941 | ns->regs.row += 1; | |
1942 | NS_DBG("read_buf: switch to the next page (%#x)\n", ns->regs.row); | |
1943 | do_state_action(ns, ACTION_CPY); | |
1944 | } | |
1945 | else if (NS_STATE(ns->nxstate) == STATE_READY) | |
1946 | switch_state(ns); | |
1947 | } | |
61b03bd7 | 1948 | |
1da177e4 LT |
1949 | return; |
1950 | } | |
1951 | ||
a5602146 | 1952 | static int ns_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) |
1da177e4 LT |
1953 | { |
1954 | ns_nand_read_buf(mtd, (u_char *)&ns_verify_buf[0], len); | |
1955 | ||
1956 | if (!memcmp(buf, &ns_verify_buf[0], len)) { | |
1957 | NS_DBG("verify_buf: the buffer is OK\n"); | |
1958 | return 0; | |
1959 | } else { | |
1960 | NS_DBG("verify_buf: the buffer is wrong\n"); | |
1961 | return -EFAULT; | |
1962 | } | |
1963 | } | |
1964 | ||
1da177e4 LT |
1965 | /* |
1966 | * Module initialization function | |
1967 | */ | |
2b9175c1 | 1968 | static int __init ns_init_module(void) |
1da177e4 LT |
1969 | { |
1970 | struct nand_chip *chip; | |
1971 | struct nandsim *nand; | |
2b77a0ed | 1972 | int retval = -ENOMEM, i; |
1da177e4 LT |
1973 | |
1974 | if (bus_width != 8 && bus_width != 16) { | |
1975 | NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width); | |
1976 | return -EINVAL; | |
1977 | } | |
61b03bd7 | 1978 | |
1da177e4 | 1979 | /* Allocate and initialize mtd_info, nand_chip and nandsim structures */ |
95b93a0c | 1980 | nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip) |
1da177e4 LT |
1981 | + sizeof(struct nandsim), GFP_KERNEL); |
1982 | if (!nsmtd) { | |
1983 | NS_ERR("unable to allocate core structures.\n"); | |
1984 | return -ENOMEM; | |
1985 | } | |
1da177e4 LT |
1986 | chip = (struct nand_chip *)(nsmtd + 1); |
1987 | nsmtd->priv = (void *)chip; | |
1988 | nand = (struct nandsim *)(chip + 1); | |
61b03bd7 | 1989 | chip->priv = (void *)nand; |
1da177e4 LT |
1990 | |
1991 | /* | |
1992 | * Register simulator's callbacks. | |
1993 | */ | |
7abd3ef9 | 1994 | chip->cmd_ctrl = ns_hwcontrol; |
1da177e4 LT |
1995 | chip->read_byte = ns_nand_read_byte; |
1996 | chip->dev_ready = ns_device_ready; | |
1da177e4 LT |
1997 | chip->write_buf = ns_nand_write_buf; |
1998 | chip->read_buf = ns_nand_read_buf; | |
1999 | chip->verify_buf = ns_nand_verify_buf; | |
1da177e4 | 2000 | chip->read_word = ns_nand_read_word; |
6dfc6d25 | 2001 | chip->ecc.mode = NAND_ECC_SOFT; |
a5ac8aeb AH |
2002 | /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */ |
2003 | /* and 'badblocks' parameters to work */ | |
51502287 | 2004 | chip->options |= NAND_SKIP_BBTSCAN; |
1da177e4 | 2005 | |
61b03bd7 | 2006 | /* |
1da177e4 | 2007 | * Perform minimum nandsim structure initialization to handle |
61b03bd7 | 2008 | * the initial ID read command correctly |
1da177e4 LT |
2009 | */ |
2010 | if (third_id_byte != 0xFF || fourth_id_byte != 0xFF) | |
2011 | nand->geom.idbytes = 4; | |
2012 | else | |
2013 | nand->geom.idbytes = 2; | |
2014 | nand->regs.status = NS_STATUS_OK(nand); | |
2015 | nand->nxstate = STATE_UNKNOWN; | |
2016 | nand->options |= OPT_PAGE256; /* temporary value */ | |
2017 | nand->ids[0] = first_id_byte; | |
2018 | nand->ids[1] = second_id_byte; | |
2019 | nand->ids[2] = third_id_byte; | |
2020 | nand->ids[3] = fourth_id_byte; | |
2021 | if (bus_width == 16) { | |
2022 | nand->busw = 16; | |
2023 | chip->options |= NAND_BUSWIDTH_16; | |
2024 | } | |
2025 | ||
552d9205 DW |
2026 | nsmtd->owner = THIS_MODULE; |
2027 | ||
514087e7 AH |
2028 | if ((retval = parse_weakblocks()) != 0) |
2029 | goto error; | |
2030 | ||
2031 | if ((retval = parse_weakpages()) != 0) | |
2032 | goto error; | |
2033 | ||
2034 | if ((retval = parse_gravepages()) != 0) | |
2035 | goto error; | |
2036 | ||
1da177e4 LT |
2037 | if ((retval = nand_scan(nsmtd, 1)) != 0) { |
2038 | NS_ERR("can't register NAND Simulator\n"); | |
2039 | if (retval > 0) | |
2040 | retval = -ENXIO; | |
2041 | goto error; | |
2042 | } | |
2043 | ||
a5ac8aeb | 2044 | if (overridesize) { |
6eda7a55 | 2045 | u_int64_t new_size = (u_int64_t)nsmtd->erasesize << overridesize; |
a5ac8aeb AH |
2046 | if (new_size >> overridesize != nsmtd->erasesize) { |
2047 | NS_ERR("overridesize is too big\n"); | |
2048 | goto err_exit; | |
2049 | } | |
2050 | /* N.B. This relies on nand_scan not doing anything with the size before we change it */ | |
2051 | nsmtd->size = new_size; | |
2052 | chip->chipsize = new_size; | |
6eda7a55 | 2053 | chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1; |
07293b20 | 2054 | chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; |
a5ac8aeb AH |
2055 | } |
2056 | ||
57aa6b54 AH |
2057 | if ((retval = setup_wear_reporting(nsmtd)) != 0) |
2058 | goto err_exit; | |
2059 | ||
2b77a0ed AH |
2060 | if ((retval = init_nandsim(nsmtd)) != 0) |
2061 | goto err_exit; | |
61b03bd7 | 2062 | |
514087e7 AH |
2063 | if ((retval = parse_badblocks(nand, nsmtd)) != 0) |
2064 | goto err_exit; | |
2065 | ||
2b77a0ed AH |
2066 | if ((retval = nand_default_bbt(nsmtd)) != 0) |
2067 | goto err_exit; | |
51502287 | 2068 | |
2b77a0ed AH |
2069 | /* Register NAND partitions */ |
2070 | if ((retval = add_mtd_partitions(nsmtd, &nand->partitions[0], nand->nbparts)) != 0) | |
2071 | goto err_exit; | |
1da177e4 LT |
2072 | |
2073 | return 0; | |
2074 | ||
2b77a0ed AH |
2075 | err_exit: |
2076 | free_nandsim(nand); | |
2077 | nand_release(nsmtd); | |
2078 | for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i) | |
2079 | kfree(nand->partitions[i].name); | |
1da177e4 LT |
2080 | error: |
2081 | kfree(nsmtd); | |
514087e7 | 2082 | free_lists(); |
1da177e4 LT |
2083 | |
2084 | return retval; | |
2085 | } | |
2086 | ||
2087 | module_init(ns_init_module); | |
2088 | ||
2089 | /* | |
2090 | * Module clean-up function | |
2091 | */ | |
2092 | static void __exit ns_cleanup_module(void) | |
2093 | { | |
2094 | struct nandsim *ns = (struct nandsim *)(((struct nand_chip *)nsmtd->priv)->priv); | |
2b77a0ed | 2095 | int i; |
1da177e4 LT |
2096 | |
2097 | free_nandsim(ns); /* Free nandsim private resources */ | |
2b77a0ed AH |
2098 | nand_release(nsmtd); /* Unregister driver */ |
2099 | for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i) | |
2100 | kfree(ns->partitions[i].name); | |
1da177e4 | 2101 | kfree(nsmtd); /* Free other structures */ |
514087e7 | 2102 | free_lists(); |
1da177e4 LT |
2103 | } |
2104 | ||
2105 | module_exit(ns_cleanup_module); | |
2106 | ||
2107 | MODULE_LICENSE ("GPL"); | |
2108 | MODULE_AUTHOR ("Artem B. Bityuckiy"); | |
2109 | MODULE_DESCRIPTION ("The NAND flash simulator"); |