Commit | Line | Data |
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2a1dba29 TP |
1 | /* |
2 | * drivers/mtd/nand/orion_nand.c | |
3 | * | |
4 | * NAND support for Marvell Orion SoC platforms | |
5 | * | |
6 | * Tzachi Perelstein <tzachi@marvell.com> | |
7 | * | |
8 | * This file is licensed under the terms of the GNU General Public | |
9 | * License version 2. This program is licensed "as is" without any | |
10 | * warranty of any kind, whether express or implied. | |
11 | */ | |
12 | ||
13 | #include <linux/slab.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/platform_device.h> | |
a0fabf72 | 16 | #include <linux/of.h> |
2a1dba29 TP |
17 | #include <linux/mtd/mtd.h> |
18 | #include <linux/mtd/nand.h> | |
19 | #include <linux/mtd/partitions.h> | |
9c2bd504 AL |
20 | #include <linux/clk.h> |
21 | #include <linux/err.h> | |
a0fa0b66 | 22 | #include <linux/io.h> |
2a1dba29 | 23 | #include <asm/sizes.h> |
c02cecb9 | 24 | #include <linux/platform_data/mtd-orion_nand.h> |
2a1dba29 | 25 | |
2a1dba29 TP |
26 | static void orion_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) |
27 | { | |
28 | struct nand_chip *nc = mtd->priv; | |
29 | struct orion_nand_data *board = nc->priv; | |
30 | u32 offs; | |
31 | ||
32 | if (cmd == NAND_CMD_NONE) | |
33 | return; | |
34 | ||
35 | if (ctrl & NAND_CLE) | |
36 | offs = (1 << board->cle); | |
37 | else if (ctrl & NAND_ALE) | |
38 | offs = (1 << board->ale); | |
39 | else | |
40 | return; | |
41 | ||
42 | if (nc->options & NAND_BUSWIDTH_16) | |
43 | offs <<= 1; | |
44 | ||
45 | writeb(cmd, nc->IO_ADDR_W + offs); | |
46 | } | |
47 | ||
bfee1a43 NP |
48 | static void orion_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) |
49 | { | |
50 | struct nand_chip *chip = mtd->priv; | |
51 | void __iomem *io_base = chip->IO_ADDR_R; | |
52 | uint64_t *buf64; | |
53 | int i = 0; | |
54 | ||
55 | while (len && (unsigned long)buf & 7) { | |
56 | *buf++ = readb(io_base); | |
57 | len--; | |
58 | } | |
59 | buf64 = (uint64_t *)buf; | |
60 | while (i < len/8) { | |
a88a2b88 PZ |
61 | /* |
62 | * Since GCC has no proper constraint (PR 43518) | |
63 | * force x variable to r2/r3 registers as ldrd instruction | |
64 | * requires first register to be even. | |
65 | */ | |
66 | register uint64_t x asm ("r2"); | |
67 | ||
94da210a | 68 | asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base)); |
bfee1a43 NP |
69 | buf64[i++] = x; |
70 | } | |
71 | i *= 8; | |
72 | while (i < len) | |
73 | buf[i++] = readb(io_base); | |
74 | } | |
75 | ||
2a1dba29 TP |
76 | static int __init orion_nand_probe(struct platform_device *pdev) |
77 | { | |
78 | struct mtd_info *mtd; | |
a0fabf72 | 79 | struct mtd_part_parser_data ppdata = {}; |
2a1dba29 TP |
80 | struct nand_chip *nc; |
81 | struct orion_nand_data *board; | |
e9903060 | 82 | struct resource *res; |
9c2bd504 | 83 | struct clk *clk; |
2a1dba29 TP |
84 | void __iomem *io_base; |
85 | int ret = 0; | |
a0fabf72 | 86 | u32 val = 0; |
2a1dba29 | 87 | |
a0fa0b66 MO |
88 | nc = devm_kzalloc(&pdev->dev, |
89 | sizeof(struct nand_chip) + sizeof(struct mtd_info), | |
90 | GFP_KERNEL); | |
91 | if (!nc) | |
92 | return -ENOMEM; | |
2a1dba29 TP |
93 | mtd = (struct mtd_info *)(nc + 1); |
94 | ||
e9903060 | 95 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
a0fa0b66 | 96 | io_base = devm_ioremap_resource(&pdev->dev, res); |
e9903060 | 97 | |
a0fa0b66 MO |
98 | if (IS_ERR(io_base)) |
99 | return PTR_ERR(io_base); | |
2a1dba29 | 100 | |
a0fabf72 JL |
101 | if (pdev->dev.of_node) { |
102 | board = devm_kzalloc(&pdev->dev, sizeof(struct orion_nand_data), | |
103 | GFP_KERNEL); | |
a0fa0b66 MO |
104 | if (!board) |
105 | return -ENOMEM; | |
a0fabf72 JL |
106 | if (!of_property_read_u32(pdev->dev.of_node, "cle", &val)) |
107 | board->cle = (u8)val; | |
108 | else | |
109 | board->cle = 0; | |
110 | if (!of_property_read_u32(pdev->dev.of_node, "ale", &val)) | |
111 | board->ale = (u8)val; | |
112 | else | |
113 | board->ale = 1; | |
114 | if (!of_property_read_u32(pdev->dev.of_node, | |
115 | "bank-width", &val)) | |
116 | board->width = (u8)val * 8; | |
117 | else | |
118 | board->width = 8; | |
119 | if (!of_property_read_u32(pdev->dev.of_node, | |
120 | "chip-delay", &val)) | |
121 | board->chip_delay = (u8)val; | |
453810b7 JH |
122 | } else { |
123 | board = dev_get_platdata(&pdev->dev); | |
124 | } | |
2a1dba29 TP |
125 | |
126 | mtd->priv = nc; | |
84630994 | 127 | mtd->dev.parent = &pdev->dev; |
2a1dba29 TP |
128 | |
129 | nc->priv = board; | |
130 | nc->IO_ADDR_R = nc->IO_ADDR_W = io_base; | |
131 | nc->cmd_ctrl = orion_nand_cmd_ctrl; | |
bfee1a43 | 132 | nc->read_buf = orion_nand_read_buf; |
2a1dba29 TP |
133 | nc->ecc.mode = NAND_ECC_SOFT; |
134 | ||
f4db56ff SB |
135 | if (board->chip_delay) |
136 | nc->chip_delay = board->chip_delay; | |
137 | ||
a0fabf72 JL |
138 | WARN(board->width > 16, |
139 | "%d bit bus width out of range", | |
140 | board->width); | |
141 | ||
2a1dba29 TP |
142 | if (board->width == 16) |
143 | nc->options |= NAND_BUSWIDTH_16; | |
144 | ||
eedfea25 BD |
145 | if (board->dev_ready) |
146 | nc->dev_ready = board->dev_ready; | |
147 | ||
2a1dba29 TP |
148 | platform_set_drvdata(pdev, mtd); |
149 | ||
9c2bd504 AL |
150 | /* Not all platforms can gate the clock, so it is not |
151 | an error if the clock does not exists. */ | |
152 | clk = clk_get(&pdev->dev, NULL); | |
153 | if (!IS_ERR(clk)) { | |
154 | clk_prepare_enable(clk); | |
155 | clk_put(clk); | |
156 | } | |
157 | ||
2a1dba29 TP |
158 | if (nand_scan(mtd, 1)) { |
159 | ret = -ENXIO; | |
160 | goto no_dev; | |
161 | } | |
162 | ||
2a1dba29 | 163 | mtd->name = "orion_nand"; |
a0fabf72 JL |
164 | ppdata.of_node = pdev->dev.of_node; |
165 | ret = mtd_device_parse_register(mtd, NULL, &ppdata, | |
166 | board->parts, board->nr_parts); | |
2a1dba29 TP |
167 | if (ret) { |
168 | nand_release(mtd); | |
169 | goto no_dev; | |
170 | } | |
171 | ||
172 | return 0; | |
173 | ||
174 | no_dev: | |
baffab28 SB |
175 | if (!IS_ERR(clk)) { |
176 | clk_disable_unprepare(clk); | |
177 | clk_put(clk); | |
178 | } | |
2a1dba29 TP |
179 | |
180 | return ret; | |
181 | } | |
182 | ||
810b7e06 | 183 | static int orion_nand_remove(struct platform_device *pdev) |
2a1dba29 TP |
184 | { |
185 | struct mtd_info *mtd = platform_get_drvdata(pdev); | |
9c2bd504 | 186 | struct clk *clk; |
2a1dba29 TP |
187 | |
188 | nand_release(mtd); | |
189 | ||
9c2bd504 AL |
190 | clk = clk_get(&pdev->dev, NULL); |
191 | if (!IS_ERR(clk)) { | |
192 | clk_disable_unprepare(clk); | |
193 | clk_put(clk); | |
194 | } | |
195 | ||
2a1dba29 TP |
196 | return 0; |
197 | } | |
198 | ||
a0fabf72 | 199 | #ifdef CONFIG_OF |
cb3346ac | 200 | static const struct of_device_id orion_nand_of_match_table[] = { |
77843504 | 201 | { .compatible = "marvell,orion-nand", }, |
a0fabf72 JL |
202 | {}, |
203 | }; | |
98d1a5ee | 204 | MODULE_DEVICE_TABLE(of, orion_nand_of_match_table); |
a0fabf72 JL |
205 | #endif |
206 | ||
2a1dba29 | 207 | static struct platform_driver orion_nand_driver = { |
5153b88c | 208 | .remove = orion_nand_remove, |
2a1dba29 TP |
209 | .driver = { |
210 | .name = "orion_nand", | |
a0fabf72 | 211 | .of_match_table = of_match_ptr(orion_nand_of_match_table), |
2a1dba29 TP |
212 | }, |
213 | }; | |
214 | ||
d9ba3109 | 215 | module_platform_driver_probe(orion_nand_driver, orion_nand_probe); |
2a1dba29 TP |
216 | |
217 | MODULE_LICENSE("GPL"); | |
218 | MODULE_AUTHOR("Tzachi Perelstein"); | |
219 | MODULE_DESCRIPTION("NAND glue for Orion platforms"); | |
1ff18422 | 220 | MODULE_ALIAS("platform:orion_nand"); |