Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * drivers/mtd/nand/sharpsl.c | |
3 | * | |
4 | * Copyright (C) 2004 Richard Purdie | |
c176d0ca | 5 | * Copyright (C) 2008 Dmitry Baryshkov |
1da177e4 | 6 | * |
1da177e4 LT |
7 | * Based on Sharp's NAND driver sharp_sl.c |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/genhd.h> | |
16 | #include <linux/slab.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/mtd/mtd.h> | |
20 | #include <linux/mtd/nand.h> | |
21 | #include <linux/mtd/nand_ecc.h> | |
22 | #include <linux/mtd/partitions.h> | |
a20c7ab5 | 23 | #include <linux/mtd/sharpsl.h> |
1da177e4 | 24 | #include <linux/interrupt.h> |
26615249 DB |
25 | #include <linux/platform_device.h> |
26 | ||
1da177e4 | 27 | #include <asm/io.h> |
a09e64fb | 28 | #include <mach/hardware.h> |
1da177e4 LT |
29 | #include <asm/mach-types.h> |
30 | ||
2206ef1c | 31 | struct sharpsl_nand { |
2206ef1c | 32 | struct nand_chip chip; |
a4e4f29c DB |
33 | |
34 | void __iomem *io; | |
2206ef1c DB |
35 | }; |
36 | ||
0324e646 BB |
37 | static inline struct sharpsl_nand *mtd_to_sharpsl(struct mtd_info *mtd) |
38 | { | |
39 | return container_of(mtd_to_nand(mtd), struct sharpsl_nand, chip); | |
40 | } | |
1da177e4 LT |
41 | |
42 | /* register offset */ | |
a4e4f29c DB |
43 | #define ECCLPLB 0x00 /* line parity 7 - 0 bit */ |
44 | #define ECCLPUB 0x04 /* line parity 15 - 8 bit */ | |
45 | #define ECCCP 0x08 /* column parity 5 - 0 bit */ | |
46 | #define ECCCNTR 0x0C /* ECC byte counter */ | |
47 | #define ECCCLRR 0x10 /* cleare ECC */ | |
48 | #define FLASHIO 0x14 /* Flash I/O */ | |
49 | #define FLASHCTL 0x18 /* Flash Control */ | |
1da177e4 LT |
50 | |
51 | /* Flash control bit */ | |
52 | #define FLRYBY (1 << 5) | |
53 | #define FLCE1 (1 << 4) | |
54 | #define FLWP (1 << 3) | |
55 | #define FLALE (1 << 2) | |
56 | #define FLCLE (1 << 1) | |
57 | #define FLCE0 (1 << 0) | |
58 | ||
61b03bd7 | 59 | /* |
1da177e4 | 60 | * hardware specific access to control-lines |
7abd3ef9 | 61 | * ctrl: |
6a5a297c | 62 | * NAND_CNE: bit 0 -> ! bit 0 & 4 |
7abd3ef9 TG |
63 | * NAND_CLE: bit 1 -> bit 1 |
64 | * NAND_ALE: bit 2 -> bit 2 | |
65 | * | |
1da177e4 | 66 | */ |
7abd3ef9 TG |
67 | static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd, |
68 | unsigned int ctrl) | |
1da177e4 | 69 | { |
a4e4f29c | 70 | struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd); |
4bd4ebcc | 71 | struct nand_chip *chip = mtd_to_nand(mtd); |
7abd3ef9 TG |
72 | |
73 | if (ctrl & NAND_CTRL_CHANGE) { | |
74 | unsigned char bits = ctrl & 0x07; | |
75 | ||
76 | bits |= (ctrl & 0x01) << 4; | |
6a5a297c RP |
77 | |
78 | bits ^= 0x11; | |
79 | ||
a4e4f29c | 80 | writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL); |
1da177e4 | 81 | } |
7abd3ef9 TG |
82 | |
83 | if (cmd != NAND_CMD_NONE) | |
84 | writeb(cmd, chip->IO_ADDR_W); | |
1da177e4 LT |
85 | } |
86 | ||
e0c7d767 | 87 | static int sharpsl_nand_dev_ready(struct mtd_info *mtd) |
1da177e4 | 88 | { |
a4e4f29c DB |
89 | struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd); |
90 | return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0); | |
1da177e4 LT |
91 | } |
92 | ||
e0c7d767 | 93 | static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode) |
1da177e4 | 94 | { |
a4e4f29c DB |
95 | struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd); |
96 | writeb(0, sharpsl->io + ECCCLRR); | |
1da177e4 LT |
97 | } |
98 | ||
e0c7d767 | 99 | static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code) |
1da177e4 | 100 | { |
a4e4f29c DB |
101 | struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd); |
102 | ecc_code[0] = ~readb(sharpsl->io + ECCLPUB); | |
103 | ecc_code[1] = ~readb(sharpsl->io + ECCLPLB); | |
104 | ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03; | |
105 | return readb(sharpsl->io + ECCCNTR) != 0; | |
1da177e4 LT |
106 | } |
107 | ||
1da177e4 LT |
108 | /* |
109 | * Main initialization routine | |
110 | */ | |
06f25510 | 111 | static int sharpsl_nand_probe(struct platform_device *pdev) |
1da177e4 LT |
112 | { |
113 | struct nand_chip *this; | |
0324e646 | 114 | struct mtd_info *mtd; |
26615249 | 115 | struct resource *r; |
1da177e4 | 116 | int err = 0; |
2206ef1c | 117 | struct sharpsl_nand *sharpsl; |
453810b7 | 118 | struct sharpsl_nand_platform_data *data = dev_get_platdata(&pdev->dev); |
a20c7ab5 DB |
119 | |
120 | if (!data) { | |
121 | dev_err(&pdev->dev, "no platform data!\n"); | |
122 | return -EINVAL; | |
123 | } | |
1da177e4 LT |
124 | |
125 | /* Allocate memory for MTD device structure and private data */ | |
2206ef1c | 126 | sharpsl = kzalloc(sizeof(struct sharpsl_nand), GFP_KERNEL); |
fc59a51e | 127 | if (!sharpsl) |
1da177e4 | 128 | return -ENOMEM; |
61b03bd7 | 129 | |
26615249 DB |
130 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
131 | if (!r) { | |
132 | dev_err(&pdev->dev, "no io memory resource defined!\n"); | |
133 | err = -ENODEV; | |
134 | goto err_get_res; | |
135 | } | |
136 | ||
8e87d782 | 137 | /* map physical address */ |
a4e4f29c DB |
138 | sharpsl->io = ioremap(r->start, resource_size(r)); |
139 | if (!sharpsl->io) { | |
bb13bec7 | 140 | dev_err(&pdev->dev, "ioremap to access Sharp SL NAND chip failed\n"); |
2206ef1c DB |
141 | err = -EIO; |
142 | goto err_ioremap; | |
1da177e4 | 143 | } |
61b03bd7 | 144 | |
1da177e4 | 145 | /* Get pointer to private data */ |
2206ef1c | 146 | this = (struct nand_chip *)(&sharpsl->chip); |
1da177e4 LT |
147 | |
148 | /* Link the private data with the MTD structure */ | |
0324e646 | 149 | mtd = nand_to_mtd(this); |
0324e646 | 150 | mtd->dev.parent = &pdev->dev; |
e5b2d30e | 151 | mtd_set_ooblayout(mtd, data->ecc_layout); |
2206ef1c DB |
152 | |
153 | platform_set_drvdata(pdev, sharpsl); | |
1da177e4 LT |
154 | |
155 | /* | |
156 | * PXA initialize | |
157 | */ | |
a4e4f29c | 158 | writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL); |
1da177e4 LT |
159 | |
160 | /* Set address of NAND IO lines */ | |
a4e4f29c DB |
161 | this->IO_ADDR_R = sharpsl->io + FLASHIO; |
162 | this->IO_ADDR_W = sharpsl->io + FLASHIO; | |
1da177e4 | 163 | /* Set address of hardware control function */ |
7abd3ef9 | 164 | this->cmd_ctrl = sharpsl_nand_hwcontrol; |
1da177e4 LT |
165 | this->dev_ready = sharpsl_nand_dev_ready; |
166 | /* 15 us command delay time */ | |
167 | this->chip_delay = 15; | |
168 | /* set eccmode using hardware ECC */ | |
6dfc6d25 TG |
169 | this->ecc.mode = NAND_ECC_HW; |
170 | this->ecc.size = 256; | |
171 | this->ecc.bytes = 3; | |
6a918bad | 172 | this->ecc.strength = 1; |
a20c7ab5 | 173 | this->badblock_pattern = data->badblock_pattern; |
6dfc6d25 TG |
174 | this->ecc.hwctl = sharpsl_nand_enable_hwecc; |
175 | this->ecc.calculate = sharpsl_nand_calculate_ecc; | |
176 | this->ecc.correct = nand_correct_data; | |
1da177e4 LT |
177 | |
178 | /* Scan to find existence of the device */ | |
0324e646 | 179 | err = nand_scan(mtd, 1); |
a4e4f29c DB |
180 | if (err) |
181 | goto err_scan; | |
1da177e4 LT |
182 | |
183 | /* Register the partitions */ | |
0324e646 | 184 | mtd->name = "sharpsl-nand"; |
1da177e4 | 185 | |
0324e646 | 186 | err = mtd_device_parse_register(mtd, NULL, NULL, |
42d7fbe2 | 187 | data->partitions, data->nr_partitions); |
c176d0ca DB |
188 | if (err) |
189 | goto err_add; | |
1da177e4 LT |
190 | |
191 | /* Return happy */ | |
192 | return 0; | |
e0c7d767 | 193 | |
c176d0ca | 194 | err_add: |
0324e646 | 195 | nand_release(mtd); |
c176d0ca | 196 | |
a4e4f29c | 197 | err_scan: |
a4e4f29c | 198 | iounmap(sharpsl->io); |
2206ef1c | 199 | err_ioremap: |
26615249 | 200 | err_get_res: |
2206ef1c | 201 | kfree(sharpsl); |
26615249 DB |
202 | return err; |
203 | } | |
1da177e4 LT |
204 | |
205 | /* | |
206 | * Clean up routine | |
207 | */ | |
810b7e06 | 208 | static int sharpsl_nand_remove(struct platform_device *pdev) |
1da177e4 | 209 | { |
2206ef1c DB |
210 | struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev); |
211 | ||
1da177e4 | 212 | /* Release resources, unregister device */ |
0324e646 | 213 | nand_release(nand_to_mtd(&sharpsl->chip)); |
2206ef1c | 214 | |
a4e4f29c | 215 | iounmap(sharpsl->io); |
1da177e4 LT |
216 | |
217 | /* Free the MTD device structure */ | |
2206ef1c | 218 | kfree(sharpsl); |
26615249 DB |
219 | |
220 | return 0; | |
221 | } | |
222 | ||
223 | static struct platform_driver sharpsl_nand_driver = { | |
224 | .driver = { | |
225 | .name = "sharpsl-nand", | |
26615249 DB |
226 | }, |
227 | .probe = sharpsl_nand_probe, | |
5153b88c | 228 | .remove = sharpsl_nand_remove, |
26615249 DB |
229 | }; |
230 | ||
f99640de | 231 | module_platform_driver(sharpsl_nand_driver); |
1da177e4 LT |
232 | |
233 | MODULE_LICENSE("GPL"); | |
234 | MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>"); | |
235 | MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series"); |