[deliverable/linux.git] / drivers / mtd / nand / socrates_nand.c

/*
 * drivers/mtd/nand/socrates_nand.c
 *
 *  Copyright © 2008 Ilya Yanok, Emcraft Systems
 *
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#include <linux/slab.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/io.h>

#define FPGA_NAND_CMD_MASK		(0x7 << 28)
#define FPGA_NAND_CMD_COMMAND		(0x0 << 28)
#define FPGA_NAND_CMD_ADDR		(0x1 << 28)
#define FPGA_NAND_CMD_READ		(0x2 << 28)
#define FPGA_NAND_CMD_WRITE		(0x3 << 28)
#define FPGA_NAND_BUSY			(0x1 << 15)
#define FPGA_NAND_ENABLE		(0x1 << 31)
#define FPGA_NAND_DATA_SHIFT		16

struct socrates_nand_host {
	struct nand_chip	nand_chip;
	struct mtd_info		mtd;
	void __iomem		*io_base;
	struct device		*dev;
};

/**
 * socrates_nand_write_buf -  write buffer to chip
 * @mtd:	MTD device structure
 * @buf:	data buffer
 * @len:	number of bytes to write
 */
static void socrates_nand_write_buf(struct mtd_info *mtd,
		const uint8_t *buf, int len)
{
	int i;
	struct nand_chip *this = mtd_to_nand(mtd);
	struct socrates_nand_host *host = this->priv;

	for (i = 0; i < len; i++) {
		out_be32(host->io_base, FPGA_NAND_ENABLE |
				FPGA_NAND_CMD_WRITE |
				(buf[i] << FPGA_NAND_DATA_SHIFT));
	}
}

/**
 * socrates_nand_read_buf -  read chip data into buffer
 * @mtd:	MTD device structure
 * @buf:	buffer to store date
 * @len:	number of bytes to read
 */
static void socrates_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
{
	int i;
	struct nand_chip *this = mtd_to_nand(mtd);
	struct socrates_nand_host *host = this->priv;
	uint32_t val;

	val = FPGA_NAND_ENABLE | FPGA_NAND_CMD_READ;

	out_be32(host->io_base, val);
	for (i = 0; i < len; i++) {
		buf[i] = (in_be32(host->io_base) >>
				FPGA_NAND_DATA_SHIFT) & 0xff;
	}
}

/**
 * socrates_nand_read_byte -  read one byte from the chip
 * @mtd:	MTD device structure
 */
static uint8_t socrates_nand_read_byte(struct mtd_info *mtd)
{
	uint8_t byte;
	socrates_nand_read_buf(mtd, &byte, sizeof(byte));
	return byte;
}

/**
 * socrates_nand_read_word -  read one word from the chip
 * @mtd:	MTD device structure
 */
static uint16_t socrates_nand_read_word(struct mtd_info *mtd)
{
	uint16_t word;
	socrates_nand_read_buf(mtd, (uint8_t *)&word, sizeof(word));
	return word;
}

/*
 * Hardware specific access to control-lines
 */
static void socrates_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
		unsigned int ctrl)
{
	struct nand_chip *nand_chip = mtd_to_nand(mtd);
	struct socrates_nand_host *host = nand_chip->priv;
	uint32_t val;

	if (cmd == NAND_CMD_NONE)
		return;

	if (ctrl & NAND_CLE)
		val = FPGA_NAND_CMD_COMMAND;
	else
		val = FPGA_NAND_CMD_ADDR;

	if (ctrl & NAND_NCE)
		val |= FPGA_NAND_ENABLE;

	val |= (cmd & 0xff) << FPGA_NAND_DATA_SHIFT;

	out_be32(host->io_base, val);
}

/*
 * Read the Device Ready pin.
 */
static int socrates_nand_device_ready(struct mtd_info *mtd)
{
	struct nand_chip *nand_chip = mtd_to_nand(mtd);
	struct socrates_nand_host *host = nand_chip->priv;

	if (in_be32(host->io_base) & FPGA_NAND_BUSY)
		return 0; /* busy */
	return 1;
}

/*
 * Probe for the NAND device.
 */
static int socrates_nand_probe(struct platform_device *ofdev)
{
	struct socrates_nand_host *host;
	struct mtd_info *mtd;
	struct nand_chip *nand_chip;
	int res;

	/* Allocate memory for the device structure (and zero it) */
	host = devm_kzalloc(&ofdev->dev, sizeof(*host), GFP_KERNEL);
	if (!host)
		return -ENOMEM;

	host->io_base = of_iomap(ofdev->dev.of_node, 0);
	if (host->io_base == NULL) {
		dev_err(&ofdev->dev, "ioremap failed\n");
		return -EIO;
	}

	mtd = &host->mtd;
	nand_chip = &host->nand_chip;
	host->dev = &ofdev->dev;

	nand_chip->priv = host;		/* link the private data structures */
	nand_set_flash_node(nand_chip, ofdev->dev.of_node);
	mtd->priv = nand_chip;
	mtd->name = "socrates_nand";
	mtd->dev.parent = &ofdev->dev;

	/*should never be accessed directly */
	nand_chip->IO_ADDR_R = (void *)0xdeadbeef;
	nand_chip->IO_ADDR_W = (void *)0xdeadbeef;

	nand_chip->cmd_ctrl = socrates_nand_cmd_ctrl;
	nand_chip->read_byte = socrates_nand_read_byte;
	nand_chip->read_word = socrates_nand_read_word;
	nand_chip->write_buf = socrates_nand_write_buf;
	nand_chip->read_buf = socrates_nand_read_buf;
	nand_chip->dev_ready = socrates_nand_device_ready;

	nand_chip->ecc.mode = NAND_ECC_SOFT;	/* enable ECC */

	/* TODO: I have no idea what real delay is. */
	nand_chip->chip_delay = 20;		/* 20us command delay time */

	dev_set_drvdata(&ofdev->dev, host);

	/* first scan to find the device and get the page size */
	if (nand_scan_ident(mtd, 1, NULL)) {
		res = -ENXIO;
		goto out;
	}

	/* second phase scan */
	if (nand_scan_tail(mtd)) {
		res = -ENXIO;
		goto out;
	}

	res = mtd_device_register(mtd, NULL, 0);
	if (!res)
		return res;

	nand_release(mtd);

out:
	iounmap(host->io_base);
	return res;
}

/*
 * Remove a NAND device.
 */
static int socrates_nand_remove(struct platform_device *ofdev)
{
	struct socrates_nand_host *host = dev_get_drvdata(&ofdev->dev);
	struct mtd_info *mtd = &host->mtd;

	nand_release(mtd);

	iounmap(host->io_base);

	return 0;
}

static const struct of_device_id socrates_nand_match[] =
{
	{
		.compatible   = "abb,socrates-nand",
	},
	{},
};

MODULE_DEVICE_TABLE(of, socrates_nand_match);

static struct platform_driver socrates_nand_driver = {
	.driver = {
		.name = "socrates_nand",
		.of_match_table = socrates_nand_match,
	},
	.probe		= socrates_nand_probe,
	.remove		= socrates_nand_remove,
};

module_platform_driver(socrates_nand_driver);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Ilya Yanok");
MODULE_DESCRIPTION("NAND driver for Socrates board");
Commit	Line	Data
1b578193 WG	1	/*
	2	* drivers/mtd/nand/socrates_nand.c
	3	*
	4	* Copyright © 2008 Ilya Yanok, Emcraft Systems
	5	*
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	*/
	12
	13	#include <linux/slab.h>
	14	#include <linux/module.h>
	15	#include <linux/mtd/mtd.h>
	16	#include <linux/mtd/nand.h>
	17	#include <linux/mtd/partitions.h>
c11eede6	18	#include <linux/of_address.h>
1b578193 WG	19	#include <linux/of_platform.h>
	20	#include <linux/io.h>
	21
	22	#define FPGA_NAND_CMD_MASK (0x7 << 28)
	23	#define FPGA_NAND_CMD_COMMAND (0x0 << 28)
	24	#define FPGA_NAND_CMD_ADDR (0x1 << 28)
	25	#define FPGA_NAND_CMD_READ (0x2 << 28)
	26	#define FPGA_NAND_CMD_WRITE (0x3 << 28)
	27	#define FPGA_NAND_BUSY (0x1 << 15)
	28	#define FPGA_NAND_ENABLE (0x1 << 31)
	29	#define FPGA_NAND_DATA_SHIFT 16
	30
	31	struct socrates_nand_host {
	32	struct nand_chip nand_chip;
	33	struct mtd_info mtd;
	34	void __iomem *io_base;
	35	struct device *dev;
	36	};
	37
	38	/**
	39	* socrates_nand_write_buf - write buffer to chip
	40	* @mtd: MTD device structure
	41	* @buf: data buffer
	42	* @len: number of bytes to write
	43	*/
	44	static void socrates_nand_write_buf(struct mtd_info *mtd,
	45	const uint8_t *buf, int len)
	46	{
	47	int i;
4bd4ebcc	48	struct nand_chip *this = mtd_to_nand(mtd);
1b578193 WG	49	struct socrates_nand_host *host = this->priv;
	50
	51	for (i = 0; i < len; i++) {
	52	out_be32(host->io_base, FPGA_NAND_ENABLE \|
	53	FPGA_NAND_CMD_WRITE \|
	54	(buf[i] << FPGA_NAND_DATA_SHIFT));
	55	}
	56	}
	57
	58	/**
	59	* socrates_nand_read_buf - read chip data into buffer
	60	* @mtd: MTD device structure
	61	* @buf: buffer to store date
	62	* @len: number of bytes to read
	63	*/
	64	static void socrates_nand_read_buf(struct mtd_info mtd, uint8_t buf, int len)
	65	{
	66	int i;
4bd4ebcc	67	struct nand_chip *this = mtd_to_nand(mtd);
1b578193 WG	68	struct socrates_nand_host *host = this->priv;
	69	uint32_t val;
	70
	71	val = FPGA_NAND_ENABLE \| FPGA_NAND_CMD_READ;
	72
	73	out_be32(host->io_base, val);
	74	for (i = 0; i < len; i++) {
	75	buf[i] = (in_be32(host->io_base) >>
	76	FPGA_NAND_DATA_SHIFT) & 0xff;
	77	}
	78	}
	79
	80	/**
	81	* socrates_nand_read_byte - read one byte from the chip
	82	* @mtd: MTD device structure
	83	*/
	84	static uint8_t socrates_nand_read_byte(struct mtd_info *mtd)
	85	{
	86	uint8_t byte;
	87	socrates_nand_read_buf(mtd, &byte, sizeof(byte));
	88	return byte;
	89	}
	90
	91	/**
	92	* socrates_nand_read_word - read one word from the chip
	93	* @mtd: MTD device structure
	94	*/
	95	static uint16_t socrates_nand_read_word(struct mtd_info *mtd)
	96	{
	97	uint16_t word;
	98	socrates_nand_read_buf(mtd, (uint8_t *)&word, sizeof(word));
	99	return word;
	100	}
	101
1b578193 WG	102	/*
	103	* Hardware specific access to control-lines
	104	*/
	105	static void socrates_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
	106	unsigned int ctrl)
	107	{
4bd4ebcc	108	struct nand_chip *nand_chip = mtd_to_nand(mtd);
1b578193 WG	109	struct socrates_nand_host *host = nand_chip->priv;
	110	uint32_t val;
	111
	112	if (cmd == NAND_CMD_NONE)
	113	return;
	114
	115	if (ctrl & NAND_CLE)
	116	val = FPGA_NAND_CMD_COMMAND;
	117	else
	118	val = FPGA_NAND_CMD_ADDR;
	119
	120	if (ctrl & NAND_NCE)
	121	val \|= FPGA_NAND_ENABLE;
	122
	123	val \|= (cmd & 0xff) << FPGA_NAND_DATA_SHIFT;
	124
	125	out_be32(host->io_base, val);
	126	}
	127
	128	/*
	129	* Read the Device Ready pin.
	130	*/
	131	static int socrates_nand_device_ready(struct mtd_info *mtd)
	132	{
4bd4ebcc	133	struct nand_chip *nand_chip = mtd_to_nand(mtd);
1b578193 WG	134	struct socrates_nand_host *host = nand_chip->priv;
	135
	136	if (in_be32(host->io_base) & FPGA_NAND_BUSY)
	137	return 0; /* busy */
	138	return 1;
	139	}
	140
1b578193 WG	141	/*
	142	* Probe for the NAND device.
	143	*/
06f25510	144	static int socrates_nand_probe(struct platform_device *ofdev)
1b578193 WG	145	{
	146	struct socrates_nand_host *host;
	147	struct mtd_info *mtd;
	148	struct nand_chip *nand_chip;
	149	int res;
1b578193 WG	150
1b578193 WG	151	/* Allocate memory for the device structure (and zero it) */
cf3a9b56 SK	152	host = devm_kzalloc(&ofdev->dev, sizeof(*host), GFP_KERNEL);
cf3a9b56 SK	153	if (!host)
1b578193	154	return -ENOMEM;
1b578193	155
c8a4d0fd	156	host->io_base = of_iomap(ofdev->dev.of_node, 0);
1b578193	157	if (host->io_base == NULL) {
5422933d	158	dev_err(&ofdev->dev, "ioremap failed\n");
1b578193 WG	159	return -EIO;
	160	}
	161
	162	mtd = &host->mtd;
	163	nand_chip = &host->nand_chip;
	164	host->dev = &ofdev->dev;
	165
	166	nand_chip->priv = host; /* link the private data structures */
a61ae81a	167	nand_set_flash_node(nand_chip, ofdev->dev.of_node);
1b578193 WG	168	mtd->priv = nand_chip;
1b578193 WG	169	mtd->name = "socrates_nand";
1b578193 WG	170	mtd->dev.parent = &ofdev->dev;
	171
	172	/should never be accessed directly /
	173	nand_chip->IO_ADDR_R = (void *)0xdeadbeef;
	174	nand_chip->IO_ADDR_W = (void *)0xdeadbeef;
	175
	176	nand_chip->cmd_ctrl = socrates_nand_cmd_ctrl;
	177	nand_chip->read_byte = socrates_nand_read_byte;
	178	nand_chip->read_word = socrates_nand_read_word;
	179	nand_chip->write_buf = socrates_nand_write_buf;
	180	nand_chip->read_buf = socrates_nand_read_buf;
1b578193 WG	181	nand_chip->dev_ready = socrates_nand_device_ready;
	182
	183	nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */
	184
	185	/* TODO: I have no idea what real delay is. */
	186	nand_chip->chip_delay = 20; /* 20us command delay time */
	187
	188	dev_set_drvdata(&ofdev->dev, host);
	189
	190	/* first scan to find the device and get the page size */
5e81e88a	191	if (nand_scan_ident(mtd, 1, NULL)) {
1b578193 WG	192	res = -ENXIO;
	193	goto out;
	194	}
	195
	196	/* second phase scan */
	197	if (nand_scan_tail(mtd)) {
	198	res = -ENXIO;
	199	goto out;
	200	}
	201
a61ae81a	202	res = mtd_device_register(mtd, NULL, 0);
1b578193 WG	203	if (!res)
	204	return res;
	205
1b578193 WG	206	nand_release(mtd);
	207
	208	out:
1b578193	209	iounmap(host->io_base);
1b578193 WG	210	return res;
	211	}
	212
	213	/*
	214	* Remove a NAND device.
	215	*/
810b7e06	216	static int socrates_nand_remove(struct platform_device *ofdev)
1b578193 WG	217	{
	218	struct socrates_nand_host *host = dev_get_drvdata(&ofdev->dev);
	219	struct mtd_info *mtd = &host->mtd;
	220
	221	nand_release(mtd);
	222
1b578193	223	iounmap(host->io_base);
1b578193 WG	224
	225	return 0;
	226	}
	227
b2d4fbab	228	static const struct of_device_id socrates_nand_match[] =
1b578193 WG	229	{
	230	{
	231	.compatible = "abb,socrates-nand",
	232	},
	233	{},
	234	};
	235
	236	MODULE_DEVICE_TABLE(of, socrates_nand_match);
	237
1c48a5c9	238	static struct platform_driver socrates_nand_driver = {
4018294b GL	239	.driver = {
4018294b GL	240	.name = "socrates_nand",
4018294b GL	241	.of_match_table = socrates_nand_match,
4018294b GL	242	},
1b578193	243	.probe = socrates_nand_probe,
5153b88c	244	.remove = socrates_nand_remove,
1b578193 WG	245	};
1b578193 WG	246
f99640de	247	module_platform_driver(socrates_nand_driver);
1b578193 WG	248
	249	MODULE_LICENSE("GPL");
	250	MODULE_AUTHOR("Ilya Yanok");
	251	MODULE_DESCRIPTION("NAND driver for Socrates board");