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mtd: replace DEBUG() with pr_debug()
[deliverable/linux.git] / drivers / mtd / onenand / onenand_base.c
CommitLineData
cd5f6346
KP		 1/*
2 * linux/drivers/mtd/onenand/onenand_base.c
3 *
3cf60253
AKS		 4 * Copyright © 2005-2009 Samsung Electronics
5 * Copyright © 2007 Nokia Corporation
6 *
cd5f6346
KP		 7 * Kyungmin Park <kyungmin.park@samsung.com>
8 *
81280d58
AH		 9 * Credits:
10 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
11 * auto-placement support, read-while load support, various fixes
81280d58 12 *
5988af23
RH		 13 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
14 * Flex-OneNAND support
3cf60253
AKS		 15 * Amul Kumar Saha <amul.saha at samsung.com>
16 * OTP support
5988af23 17 *
cd5f6346
KP		 18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23#include <linux/kernel.h>
24#include <linux/module.h>
c90173f0 25#include <linux/moduleparam.h>
5a0e3ad6 26#include <linux/slab.h>
cd5f6346 27#include <linux/init.h>
015953d7 28#include <linux/sched.h>
6c77fd64 29#include <linux/delay.h>
2c22120f 30#include <linux/interrupt.h>
015953d7 31#include <linux/jiffies.h>
cd5f6346
KP		 32#include <linux/mtd/mtd.h>
33#include <linux/mtd/onenand.h>
34#include <linux/mtd/partitions.h>
35
36#include <asm/io.h>
37
72073027
MK		 38/*
39 * Multiblock erase if number of blocks to erase is 2 or more.
40 * Maximum number of blocks for simultaneous erase is 64.
41 */
42#define MB_ERASE_MIN_BLK_COUNT 2
43#define MB_ERASE_MAX_BLK_COUNT 64
44
5988af23
RH		 45/* Default Flex-OneNAND boundary and lock respectively */
46static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
47
c90173f0
AS		 48module_param_array(flex_bdry, int, NULL, 0400);
49MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
50 "Syntax:flex_bdry=DIE_BDRY,LOCK,..."
51 "DIE_BDRY: SLC boundary of the die"
52 "LOCK: Locking information for SLC boundary"
53 " : 0->Set boundary in unlocked status"
54 " : 1->Set boundary in locked status");
55
3cf60253
AKS		 56/* Default OneNAND/Flex-OneNAND OTP options*/
57static int otp;
58
59module_param(otp, int, 0400);
60MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP"
61 "Syntax : otp=LOCK_TYPE"
62 "LOCK_TYPE : Keys issued, for specific OTP Lock type"
63 " : 0 -> Default (No Blocks Locked)"
64 " : 1 -> OTP Block lock"
65 " : 2 -> 1st Block lock"
66 " : 3 -> BOTH OTP Block and 1st Block lock");
67
99b17c08
RT		 68/*
69 * flexonenand_oob_128 - oob info for Flex-Onenand with 4KB page
70 * For now, we expose only 64 out of 80 ecc bytes
5988af23 71 */
99b17c08 72static struct nand_ecclayout flexonenand_oob_128 = {
5988af23
RH		 73 .eccbytes = 64,
74 .eccpos = {
75 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
76 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
77 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
78 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
79 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
80 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
81 102, 103, 104, 105
82 },
83 .oobfree = {
84 {2, 4}, {18, 4}, {34, 4}, {50, 4},
85 {66, 4}, {82, 4}, {98, 4}, {114, 4}
86 }
87};
88
99b17c08
RT		 89/*
90 * onenand_oob_128 - oob info for OneNAND with 4KB page
91 *
92 * Based on specification:
93 * 4Gb M-die OneNAND Flash (KFM4G16Q4M, KFN8G16Q4M). Rev. 1.3, Apr. 2010
94 *
95 * For eccpos we expose only 64 bytes out of 72 (see struct nand_ecclayout)
96 *
97 * oobfree uses the spare area fields marked as
98 * "Managed by internal ECC logic for Logical Sector Number area"
99 */
100static struct nand_ecclayout onenand_oob_128 = {
101 .eccbytes = 64,
102 .eccpos = {
103 7, 8, 9, 10, 11, 12, 13, 14, 15,
104 23, 24, 25, 26, 27, 28, 29, 30, 31,
105 39, 40, 41, 42, 43, 44, 45, 46, 47,
106 55, 56, 57, 58, 59, 60, 61, 62, 63,
107 71, 72, 73, 74, 75, 76, 77, 78, 79,
108 87, 88, 89, 90, 91, 92, 93, 94, 95,
109 103, 104, 105, 106, 107, 108, 109, 110, 111,
110 119
111 },
112 .oobfree = {
113 {2, 3}, {18, 3}, {34, 3}, {50, 3},
114 {66, 3}, {82, 3}, {98, 3}, {114, 3}
115 }
116};
117
cd5f6346
KP		 118/**
119 * onenand_oob_64 - oob info for large (2KB) page
120 */
5bd34c09 121static struct nand_ecclayout onenand_oob_64 = {
cd5f6346
KP		 122 .eccbytes = 20,
123 .eccpos = {
124 8, 9, 10, 11, 12,
125 24, 25, 26, 27, 28,
126 40, 41, 42, 43, 44,
127 56, 57, 58, 59, 60,
128 },
129 .oobfree = {
130 {2, 3}, {14, 2}, {18, 3}, {30, 2},
d9777f1c
JL		 131 {34, 3}, {46, 2}, {50, 3}, {62, 2}
132 }
cd5f6346
KP		 133};
134
135/**
136 * onenand_oob_32 - oob info for middle (1KB) page
137 */
5bd34c09 138static struct nand_ecclayout onenand_oob_32 = {
cd5f6346
KP		 139 .eccbytes = 10,
140 .eccpos = {
141 8, 9, 10, 11, 12,
142 24, 25, 26, 27, 28,
143 },
144 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
145};
146
147static const unsigned char ffchars[] = {
148 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
149 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
150 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
151 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
152 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
153 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
154 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
155 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
5988af23
RH		 156 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
157 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */
158 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
159 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */
160 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
161 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */
162 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
163 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */
cd5f6346
KP		 164};
165
166/**
167 * onenand_readw - [OneNAND Interface] Read OneNAND register
168 * @param addr address to read
169 *
170 * Read OneNAND register
171 */
172static unsigned short onenand_readw(void __iomem *addr)
173{
174 return readw(addr);
175}
176
177/**
178 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
179 * @param value value to write
180 * @param addr address to write
181 *
182 * Write OneNAND register with value
183 */
184static void onenand_writew(unsigned short value, void __iomem *addr)
185{
186 writew(value, addr);
187}
188
189/**
190 * onenand_block_address - [DEFAULT] Get block address
83a36838 191 * @param this onenand chip data structure
cd5f6346
KP		 192 * @param block the block
193 * @return translated block address if DDP, otherwise same
194 *
195 * Setup Start Address 1 Register (F100h)
196 */
83a36838 197static int onenand_block_address(struct onenand_chip *this, int block)
cd5f6346 198{
738d61f5
KP		 199 /* Device Flash Core select, NAND Flash Block Address */
200 if (block & this->density_mask)
201 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
cd5f6346
KP		 202
203 return block;
204}
205
206/**
207 * onenand_bufferram_address - [DEFAULT] Get bufferram address
83a36838 208 * @param this onenand chip data structure
cd5f6346
KP		 209 * @param block the block
210 * @return set DBS value if DDP, otherwise 0
211 *
212 * Setup Start Address 2 Register (F101h) for DDP
213 */
83a36838 214static int onenand_bufferram_address(struct onenand_chip *this, int block)
cd5f6346 215{
738d61f5
KP		 216 /* Device BufferRAM Select */
217 if (block & this->density_mask)
218 return ONENAND_DDP_CHIP1;
cd5f6346 219
738d61f5 220 return ONENAND_DDP_CHIP0;
cd5f6346
KP		 221}
222
223/**
224 * onenand_page_address - [DEFAULT] Get page address
225 * @param page the page address
226 * @param sector the sector address
227 * @return combined page and sector address
228 *
229 * Setup Start Address 8 Register (F107h)
230 */
231static int onenand_page_address(int page, int sector)
232{
233 /* Flash Page Address, Flash Sector Address */
234 int fpa, fsa;
235
236 fpa = page & ONENAND_FPA_MASK;
237 fsa = sector & ONENAND_FSA_MASK;
238
239 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
240}
241
242/**
243 * onenand_buffer_address - [DEFAULT] Get buffer address
244 * @param dataram1 DataRAM index
245 * @param sectors the sector address
246 * @param count the number of sectors
247 * @return the start buffer value
248 *
249 * Setup Start Buffer Register (F200h)
250 */
251static int onenand_buffer_address(int dataram1, int sectors, int count)
252{
253 int bsa, bsc;
254
255 /* BufferRAM Sector Address */
256 bsa = sectors & ONENAND_BSA_MASK;
257
258 if (dataram1)
259 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
260 else
261 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
262
263 /* BufferRAM Sector Count */
264 bsc = count & ONENAND_BSC_MASK;
265
266 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
267}
268
5988af23
RH		 269/**
270 * flexonenand_block- For given address return block number
271 * @param this - OneNAND device structure
272 * @param addr - Address for which block number is needed
273 */
274static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr)
275{
276 unsigned boundary, blk, die = 0;
277
278 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
279 die = 1;
280 addr -= this->diesize[0];
281 }
282
283 boundary = this->boundary[die];
284
285 blk = addr >> (this->erase_shift - 1);
286 if (blk > boundary)
287 blk = (blk + boundary + 1) >> 1;
288
289 blk += die ? this->density_mask : 0;
290 return blk;
291}
292
293inline unsigned onenand_block(struct onenand_chip *this, loff_t addr)
294{
295 if (!FLEXONENAND(this))
296 return addr >> this->erase_shift;
297 return flexonenand_block(this, addr);
298}
299
300/**
301 * flexonenand_addr - Return address of the block
302 * @this: OneNAND device structure
303 * @block: Block number on Flex-OneNAND
304 *
305 * Return address of the block
306 */
307static loff_t flexonenand_addr(struct onenand_chip *this, int block)
308{
309 loff_t ofs = 0;
310 int die = 0, boundary;
311
312 if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
313 block -= this->density_mask;
314 die = 1;
315 ofs = this->diesize[0];
316 }
317
318 boundary = this->boundary[die];
319 ofs += (loff_t)block << (this->erase_shift - 1);
320 if (block > (boundary + 1))
321 ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1);
322 return ofs;
323}
324
325loff_t onenand_addr(struct onenand_chip *this, int block)
326{
327 if (!FLEXONENAND(this))
328 return (loff_t)block << this->erase_shift;
329 return flexonenand_addr(this, block);
330}
331EXPORT_SYMBOL(onenand_addr);
332
e71f04fc
KP		 333/**
334 * onenand_get_density - [DEFAULT] Get OneNAND density
335 * @param dev_id OneNAND device ID
336 *
337 * Get OneNAND density from device ID
338 */
339static inline int onenand_get_density(int dev_id)
340{
341 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
342 return (density & ONENAND_DEVICE_DENSITY_MASK);
343}
344
5988af23
RH		 345/**
346 * flexonenand_region - [Flex-OneNAND] Return erase region of addr
347 * @param mtd MTD device structure
348 * @param addr address whose erase region needs to be identified
349 */
350int flexonenand_region(struct mtd_info *mtd, loff_t addr)
351{
352 int i;
353
354 for (i = 0; i < mtd->numeraseregions; i++)
355 if (addr < mtd->eraseregions[i].offset)
356 break;
357 return i - 1;
358}
359EXPORT_SYMBOL(flexonenand_region);
360
cd5f6346
KP		 361/**
362 * onenand_command - [DEFAULT] Send command to OneNAND device
363 * @param mtd MTD device structure
364 * @param cmd the command to be sent
365 * @param addr offset to read from or write to
366 * @param len number of bytes to read or write
367 *
368 * Send command to OneNAND device. This function is used for middle/large page
369 * devices (1KB/2KB Bytes per page)
370 */
371static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
372{
373 struct onenand_chip *this = mtd->priv;
b21b72cf 374 int value, block, page;
cd5f6346
KP		 375
376 /* Address translation */
377 switch (cmd) {
378 case ONENAND_CMD_UNLOCK:
379 case ONENAND_CMD_LOCK:
380 case ONENAND_CMD_LOCK_TIGHT:
28b79ff9 381 case ONENAND_CMD_UNLOCK_ALL:
cd5f6346
KP		 382 block = -1;
383 page = -1;
384 break;
385
5988af23
RH		 386 case FLEXONENAND_CMD_PI_ACCESS:
387 /* addr contains die index */
388 block = addr * this->density_mask;
389 page = -1;
390 break;
391
cd5f6346 392 case ONENAND_CMD_ERASE:
72073027
MK		 393 case ONENAND_CMD_MULTIBLOCK_ERASE:
394 case ONENAND_CMD_ERASE_VERIFY:
cd5f6346 395 case ONENAND_CMD_BUFFERRAM:
493c6460 396 case ONENAND_CMD_OTP_ACCESS:
5988af23 397 block = onenand_block(this, addr);
cd5f6346
KP		 398 page = -1;
399 break;
400
5988af23
RH		 401 case FLEXONENAND_CMD_READ_PI:
402 cmd = ONENAND_CMD_READ;
403 block = addr * this->density_mask;
404 page = 0;
405 break;
406
cd5f6346 407 default:
5988af23 408 block = onenand_block(this, addr);
42b0aab1
RHS		 409 if (FLEXONENAND(this))
410 page = (int) (addr - onenand_addr(this, block))>>\
411 this->page_shift;
412 else
413 page = (int) (addr >> this->page_shift);
ee9745fc
KP		 414 if (ONENAND_IS_2PLANE(this)) {
415 /* Make the even block number */
416 block &= ~1;
417 /* Is it the odd plane? */
418 if (addr & this->writesize)
419 block++;
420 page >>= 1;
421 }
cd5f6346
KP		 422 page &= this->page_mask;
423 break;
424 }
425
426 /* NOTE: The setting order of the registers is very important! */
427 if (cmd == ONENAND_CMD_BUFFERRAM) {
428 /* Select DataRAM for DDP */
83a36838 429 value = onenand_bufferram_address(this, block);
cd5f6346
KP		 430 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
431
8a8f632d 432 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this))
ee9745fc
KP		 433 /* It is always BufferRAM0 */
434 ONENAND_SET_BUFFERRAM0(this);
435 else
436 /* Switch to the next data buffer */
437 ONENAND_SET_NEXT_BUFFERRAM(this);
cd5f6346
KP		 438
439 return 0;
440 }
441
442 if (block != -1) {
443 /* Write 'DFS, FBA' of Flash */
83a36838 444 value = onenand_block_address(this, block);
cd5f6346 445 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
3cecf69e 446
b21b72cf
KP		 447 /* Select DataRAM for DDP */
448 value = onenand_bufferram_address(this, block);
449 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
cd5f6346
KP		 450 }
451
452 if (page != -1) {
60d84f97 453 /* Now we use page size operation */
5988af23 454 int sectors = 0, count = 0;
cd5f6346
KP		 455 int dataram;
456
457 switch (cmd) {
5988af23 458 case FLEXONENAND_CMD_RECOVER_LSB:
cd5f6346
KP		 459 case ONENAND_CMD_READ:
460 case ONENAND_CMD_READOOB:
8a8f632d 461 if (ONENAND_IS_4KB_PAGE(this))
5988af23
RH		 462 /* It is always BufferRAM0 */
463 dataram = ONENAND_SET_BUFFERRAM0(this);
464 else
465 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
cd5f6346
KP		 466 break;
467
468 default:
ee9745fc
KP		 469 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
470 cmd = ONENAND_CMD_2X_PROG;
cd5f6346
KP		 471 dataram = ONENAND_CURRENT_BUFFERRAM(this);
472 break;
473 }
474
475 /* Write 'FPA, FSA' of Flash */
476 value = onenand_page_address(page, sectors);
477 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
478
479 /* Write 'BSA, BSC' of DataRAM */
480 value = onenand_buffer_address(dataram, sectors, count);
481 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
cd5f6346
KP		 482 }
483
484 /* Interrupt clear */
485 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
486
487 /* Write command */
488 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
489
490 return 0;
491}
492
5988af23
RH		 493/**
494 * onenand_read_ecc - return ecc status
495 * @param this onenand chip structure
496 */
497static inline int onenand_read_ecc(struct onenand_chip *this)
498{
499 int ecc, i, result = 0;
500
6a88c47b 501 if (!FLEXONENAND(this) && !ONENAND_IS_4KB_PAGE(this))
5988af23
RH		 502 return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
503
504 for (i = 0; i < 4; i++) {
6a88c47b 505 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2);
5988af23
RH		 506 if (likely(!ecc))
507 continue;
508 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
509 return ONENAND_ECC_2BIT_ALL;
510 else
511 result = ONENAND_ECC_1BIT_ALL;
512 }
513
514 return result;
515}
516
cd5f6346
KP		 517/**
518 * onenand_wait - [DEFAULT] wait until the command is done
519 * @param mtd MTD device structure
520 * @param state state to select the max. timeout value
521 *
522 * Wait for command done. This applies to all OneNAND command
523 * Read can take up to 30us, erase up to 2ms and program up to 350us
524 * according to general OneNAND specs
525 */
526static int onenand_wait(struct mtd_info *mtd, int state)
527{
528 struct onenand_chip * this = mtd->priv;
529 unsigned long timeout;
530 unsigned int flags = ONENAND_INT_MASTER;
531 unsigned int interrupt = 0;
2fd32d4a 532 unsigned int ctrl;
cd5f6346
KP		 533
534 /* The 20 msec is enough */
535 timeout = jiffies + msecs_to_jiffies(20);
536 while (time_before(jiffies, timeout)) {
537 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
538
539 if (interrupt & flags)
540 break;
541
72073027 542 if (state != FL_READING && state != FL_PREPARING_ERASE)
cd5f6346
KP		 543 cond_resched();
544 }
545 /* To get correct interrupt status in timeout case */
546 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
547
548 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
549
83973b87
KP		 550 /*
551 * In the Spec. it checks the controller status first
552 * However if you get the correct information in case of
553 * power off recovery (POR) test, it should read ECC status first
554 */
cd5f6346 555 if (interrupt & ONENAND_INT_READ) {
5988af23 556 int ecc = onenand_read_ecc(this);
f4f91ac3 557 if (ecc) {
b3c9f8bf 558 if (ecc & ONENAND_ECC_2BIT_ALL) {
297758f8
AKS		 559 printk(KERN_ERR "%s: ECC error = 0x%04x\n",
560 __func__, ecc);
f4f91ac3 561 mtd->ecc_stats.failed++;
30a7eb29 562 return -EBADMSG;
49dc08ee 563 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
297758f8
AKS		 564 printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n",
565 __func__, ecc);
f4f91ac3 566 mtd->ecc_stats.corrected++;
49dc08ee 567 }
cd5f6346 568 }
9d032801 569 } else if (state == FL_READING) {
297758f8
AKS		 570 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
571 __func__, ctrl, interrupt);
9d032801 572 return -EIO;
cd5f6346
KP		 573 }
574
72073027
MK		 575 if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) {
576 printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n",
577 __func__, ctrl, interrupt);
578 return -EIO;
579 }
580
581 if (!(interrupt & ONENAND_INT_MASTER)) {
582 printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n",
583 __func__, ctrl, interrupt);
584 return -EIO;
585 }
586
83973b87
KP		 587 /* If there's controller error, it's a real error */
588 if (ctrl & ONENAND_CTRL_ERROR) {
297758f8
AKS		 589 printk(KERN_ERR "%s: controller error = 0x%04x\n",
590 __func__, ctrl);
83973b87 591 if (ctrl & ONENAND_CTRL_LOCK)
297758f8 592 printk(KERN_ERR "%s: it's locked error.\n", __func__);
83973b87
KP		 593 return -EIO;
594 }
595
cd5f6346
KP		 596 return 0;
597}
598
2c22120f
KP		 599/*
600 * onenand_interrupt - [DEFAULT] onenand interrupt handler
601 * @param irq onenand interrupt number
602 * @param dev_id interrupt data
603 *
604 * complete the work
605 */
606static irqreturn_t onenand_interrupt(int irq, void *data)
607{
06efcad0 608 struct onenand_chip *this = data;
2c22120f
KP		 609
610 /* To handle shared interrupt */
611 if (!this->complete.done)
612 complete(&this->complete);
613
614 return IRQ_HANDLED;
615}
616
617/*
618 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
619 * @param mtd MTD device structure
620 * @param state state to select the max. timeout value
621 *
622 * Wait for command done.
623 */
624static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
625{
626 struct onenand_chip *this = mtd->priv;
627
2c22120f
KP		 628 wait_for_completion(&this->complete);
629
630 return onenand_wait(mtd, state);
631}
632
633/*
634 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
635 * @param mtd MTD device structure
636 * @param state state to select the max. timeout value
637 *
638 * Try interrupt based wait (It is used one-time)
639 */
640static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
641{
642 struct onenand_chip *this = mtd->priv;
643 unsigned long remain, timeout;
644
645 /* We use interrupt wait first */
646 this->wait = onenand_interrupt_wait;
647
2c22120f
KP		 648 timeout = msecs_to_jiffies(100);
649 remain = wait_for_completion_timeout(&this->complete, timeout);
650 if (!remain) {
651 printk(KERN_INFO "OneNAND: There's no interrupt. "
652 "We use the normal wait\n");
653
654 /* Release the irq */
655 free_irq(this->irq, this);
c9ac5977 656
2c22120f
KP		 657 this->wait = onenand_wait;
658 }
659
660 return onenand_wait(mtd, state);
661}
662
663/*
664 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
665 * @param mtd MTD device structure
666 *
667 * There's two method to wait onenand work
668 * 1. polling - read interrupt status register
669 * 2. interrupt - use the kernel interrupt method
670 */
671static void onenand_setup_wait(struct mtd_info *mtd)
672{
673 struct onenand_chip *this = mtd->priv;
674 int syscfg;
675
676 init_completion(&this->complete);
677
678 if (this->irq <= 0) {
679 this->wait = onenand_wait;
680 return;
681 }
682
683 if (request_irq(this->irq, &onenand_interrupt,
684 IRQF_SHARED, "onenand", this)) {
685 /* If we can't get irq, use the normal wait */
686 this->wait = onenand_wait;
687 return;
688 }
689
690 /* Enable interrupt */
691 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
692 syscfg |= ONENAND_SYS_CFG1_IOBE;
693 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
694
695 this->wait = onenand_try_interrupt_wait;
696}
697
cd5f6346
KP		 698/**
699 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
700 * @param mtd MTD data structure
701 * @param area BufferRAM area
702 * @return offset given area
703 *
704 * Return BufferRAM offset given area
705 */
706static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
707{
708 struct onenand_chip *this = mtd->priv;
709
710 if (ONENAND_CURRENT_BUFFERRAM(this)) {
ee9745fc 711 /* Note: the 'this->writesize' is a real page size */
cd5f6346 712 if (area == ONENAND_DATARAM)
ee9745fc 713 return this->writesize;
cd5f6346
KP		 714 if (area == ONENAND_SPARERAM)
715 return mtd->oobsize;
716 }
717
718 return 0;
719}
720
721/**
722 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
723 * @param mtd MTD data structure
724 * @param area BufferRAM area
725 * @param buffer the databuffer to put/get data
726 * @param offset offset to read from or write to
727 * @param count number of bytes to read/write
728 *
729 * Read the BufferRAM area
730 */
731static int onenand_read_bufferram(struct mtd_info *mtd, int area,
732 unsigned char *buffer, int offset, size_t count)
733{
734 struct onenand_chip *this = mtd->priv;
735 void __iomem *bufferram;
736
737 bufferram = this->base + area;
738
739 bufferram += onenand_bufferram_offset(mtd, area);
740
9c01f87d
KP		 741 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
742 unsigned short word;
743
744 /* Align with word(16-bit) size */
745 count--;
746
747 /* Read word and save byte */
748 word = this->read_word(bufferram + offset + count);
749 buffer[count] = (word & 0xff);
750 }
751
cd5f6346
KP		 752 memcpy(buffer, bufferram + offset, count);
753
754 return 0;
755}
756
52b0eea7
KP		 757/**
758 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
759 * @param mtd MTD data structure
760 * @param area BufferRAM area
761 * @param buffer the databuffer to put/get data
762 * @param offset offset to read from or write to
763 * @param count number of bytes to read/write
764 *
765 * Read the BufferRAM area with Sync. Burst Mode
766 */
767static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
768 unsigned char *buffer, int offset, size_t count)
769{
770 struct onenand_chip *this = mtd->priv;
771 void __iomem *bufferram;
772
773 bufferram = this->base + area;
774
775 bufferram += onenand_bufferram_offset(mtd, area);
776
777 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
778
9c01f87d
KP		 779 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
780 unsigned short word;
781
782 /* Align with word(16-bit) size */
783 count--;
784
785 /* Read word and save byte */
786 word = this->read_word(bufferram + offset + count);
787 buffer[count] = (word & 0xff);
788 }
789
52b0eea7
KP		 790 memcpy(buffer, bufferram + offset, count);
791
792 this->mmcontrol(mtd, 0);
793
794 return 0;
795}
796
cd5f6346
KP		 797/**
798 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
799 * @param mtd MTD data structure
800 * @param area BufferRAM area
801 * @param buffer the databuffer to put/get data
802 * @param offset offset to read from or write to
803 * @param count number of bytes to read/write
804 *
805 * Write the BufferRAM area
806 */
807static int onenand_write_bufferram(struct mtd_info *mtd, int area,
808 const unsigned char *buffer, int offset, size_t count)
809{
810 struct onenand_chip *this = mtd->priv;
811 void __iomem *bufferram;
812
813 bufferram = this->base + area;
814
815 bufferram += onenand_bufferram_offset(mtd, area);
816
9c01f87d
KP		 817 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
818 unsigned short word;
819 int byte_offset;
820
821 /* Align with word(16-bit) size */
822 count--;
823
824 /* Calculate byte access offset */
825 byte_offset = offset + count;
826
827 /* Read word and save byte */
828 word = this->read_word(bufferram + byte_offset);
829 word = (word & ~0xff) | buffer[count];
830 this->write_word(word, bufferram + byte_offset);
831 }
832
cd5f6346
KP		 833 memcpy(bufferram + offset, buffer, count);
834
835 return 0;
836}
837
ee9745fc
KP		 838/**
839 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
840 * @param mtd MTD data structure
841 * @param addr address to check
842 * @return blockpage address
843 *
844 * Get blockpage address at 2x program mode
845 */
846static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
847{
848 struct onenand_chip *this = mtd->priv;
849 int blockpage, block, page;
850
851 /* Calculate the even block number */
852 block = (int) (addr >> this->erase_shift) & ~1;
853 /* Is it the odd plane? */
854 if (addr & this->writesize)
855 block++;
856 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
857 blockpage = (block << 7) | page;
858
859 return blockpage;
860}
861
cd5f6346
KP		 862/**
863 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
864 * @param mtd MTD data structure
865 * @param addr address to check
d5c5e78a 866 * @return 1 if there are valid data, otherwise 0
cd5f6346
KP		 867 *
868 * Check bufferram if there is data we required
869 */
870static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
871{
872 struct onenand_chip *this = mtd->priv;
cde36b37 873 int blockpage, found = 0;
abf3c0f2 874 unsigned int i;
d5c5e78a 875
ee9745fc
KP		 876 if (ONENAND_IS_2PLANE(this))
877 blockpage = onenand_get_2x_blockpage(mtd, addr);
878 else
879 blockpage = (int) (addr >> this->page_shift);
cd5f6346 880
abf3c0f2 881 /* Is there valid data? */
cd5f6346 882 i = ONENAND_CURRENT_BUFFERRAM(this);
abf3c0f2 883 if (this->bufferram[i].blockpage == blockpage)
cde36b37
AH		 884 found = 1;
885 else {
886 /* Check another BufferRAM */
887 i = ONENAND_NEXT_BUFFERRAM(this);
888 if (this->bufferram[i].blockpage == blockpage) {
889 ONENAND_SET_NEXT_BUFFERRAM(this);
890 found = 1;
891 }
892 }
cd5f6346 893
cde36b37
AH		 894 if (found && ONENAND_IS_DDP(this)) {
895 /* Select DataRAM for DDP */
5988af23 896 int block = onenand_block(this, addr);
cde36b37
AH		 897 int value = onenand_bufferram_address(this, block);
898 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
abf3c0f2 899 }
cd5f6346 900
cde36b37 901 return found;
cd5f6346
KP		 902}
903
904/**
905 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
906 * @param mtd MTD data structure
907 * @param addr address to update
908 * @param valid valid flag
909 *
910 * Update BufferRAM information
911 */
abf3c0f2 912static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
cd5f6346
KP		 913 int valid)
914{
915 struct onenand_chip *this = mtd->priv;
abf3c0f2
KP		 916 int blockpage;
917 unsigned int i;
d5c5e78a 918
ee9745fc
KP		 919 if (ONENAND_IS_2PLANE(this))
920 blockpage = onenand_get_2x_blockpage(mtd, addr);
921 else
922 blockpage = (int) (addr >> this->page_shift);
cd5f6346 923
abf3c0f2
KP		 924 /* Invalidate another BufferRAM */
925 i = ONENAND_NEXT_BUFFERRAM(this);
5b4246f1 926 if (this->bufferram[i].blockpage == blockpage)
abf3c0f2 927 this->bufferram[i].blockpage = -1;
cd5f6346
KP		 928
929 /* Update BufferRAM */
930 i = ONENAND_CURRENT_BUFFERRAM(this);
abf3c0f2
KP		 931 if (valid)
932 this->bufferram[i].blockpage = blockpage;
933 else
934 this->bufferram[i].blockpage = -1;
cd5f6346
KP		 935}
936
480b9dfb
AH		 937/**
938 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
939 * @param mtd MTD data structure
940 * @param addr start address to invalidate
941 * @param len length to invalidate
942 *
943 * Invalidate BufferRAM information
944 */
945static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
946 unsigned int len)
947{
948 struct onenand_chip *this = mtd->priv;
949 int i;
950 loff_t end_addr = addr + len;
951
952 /* Invalidate BufferRAM */
953 for (i = 0; i < MAX_BUFFERRAM; i++) {
954 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
955 if (buf_addr >= addr && buf_addr < end_addr)
956 this->bufferram[i].blockpage = -1;
957 }
958}
959
cd5f6346
KP		 960/**
961 * onenand_get_device - [GENERIC] Get chip for selected access
962 * @param mtd MTD device structure
963 * @param new_state the state which is requested
964 *
965 * Get the device and lock it for exclusive access
966 */
a41371eb 967static int onenand_get_device(struct mtd_info *mtd, int new_state)
cd5f6346
KP		 968{
969 struct onenand_chip *this = mtd->priv;
970 DECLARE_WAITQUEUE(wait, current);
971
972 /*
973 * Grab the lock and see if the device is available
974 */
975 while (1) {
976 spin_lock(&this->chip_lock);
977 if (this->state == FL_READY) {
978 this->state = new_state;
979 spin_unlock(&this->chip_lock);
cf24dc85
AH		 980 if (new_state != FL_PM_SUSPENDED && this->enable)
981 this->enable(mtd);
cd5f6346
KP		 982 break;
983 }
a41371eb
KP		 984 if (new_state == FL_PM_SUSPENDED) {
985 spin_unlock(&this->chip_lock);
986 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
987 }
cd5f6346
KP		 988 set_current_state(TASK_UNINTERRUPTIBLE);
989 add_wait_queue(&this->wq, &wait);
990 spin_unlock(&this->chip_lock);
991 schedule();
992 remove_wait_queue(&this->wq, &wait);
993 }
a41371eb
KP		 994
995 return 0;
cd5f6346
KP		 996}
997
998/**
999 * onenand_release_device - [GENERIC] release chip
1000 * @param mtd MTD device structure
1001 *
1002 * Deselect, release chip lock and wake up anyone waiting on the device
1003 */
1004static void onenand_release_device(struct mtd_info *mtd)
1005{
1006 struct onenand_chip *this = mtd->priv;
1007
cf24dc85
AH		 1008 if (this->state != FL_PM_SUSPENDED && this->disable)
1009 this->disable(mtd);
cd5f6346
KP		 1010 /* Release the chip */
1011 spin_lock(&this->chip_lock);
1012 this->state = FL_READY;
1013 wake_up(&this->wq);
1014 spin_unlock(&this->chip_lock);
1015}
1016
1017/**
7854d3f7 1018 * onenand_transfer_auto_oob - [INTERN] oob auto-placement transfer
d15057b7
KP		 1019 * @param mtd MTD device structure
1020 * @param buf destination address
1021 * @param column oob offset to read from
1022 * @param thislen oob length to read
1023 */
1024static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
1025 int thislen)
1026{
1027 struct onenand_chip *this = mtd->priv;
1028 struct nand_oobfree *free;
1029 int readcol = column;
1030 int readend = column + thislen;
1031 int lastgap = 0;
1032 unsigned int i;
1033 uint8_t *oob_buf = this->oob_buf;
1034
1035 free = this->ecclayout->oobfree;
1036 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1037 if (readcol >= lastgap)
1038 readcol += free->offset - lastgap;
1039 if (readend >= lastgap)
1040 readend += free->offset - lastgap;
1041 lastgap = free->offset + free->length;
1042 }
1043 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1044 free = this->ecclayout->oobfree;
1045 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1046 int free_end = free->offset + free->length;
1047 if (free->offset < readend && free_end > readcol) {
1048 int st = max_t(int,free->offset,readcol);
1049 int ed = min_t(int,free_end,readend);
1050 int n = ed - st;
1051 memcpy(buf, oob_buf + st, n);
1052 buf += n;
1053 } else if (column == 0)
1054 break;
1055 }
1056 return 0;
1057}
1058
5988af23
RH		 1059/**
1060 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
1061 * @param mtd MTD device structure
1062 * @param addr address to recover
1063 * @param status return value from onenand_wait / onenand_bbt_wait
1064 *
1065 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
1066 * lower page address and MSB page has higher page address in paired pages.
1067 * If power off occurs during MSB page program, the paired LSB page data can
1068 * become corrupt. LSB page recovery read is a way to read LSB page though page
1069 * data are corrupted. When uncorrectable error occurs as a result of LSB page
1070 * read after power up, issue LSB page recovery read.
1071 */
1072static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
1073{
1074 struct onenand_chip *this = mtd->priv;
1075 int i;
1076
1077 /* Recovery is only for Flex-OneNAND */
1078 if (!FLEXONENAND(this))
1079 return status;
1080
1081 /* check if we failed due to uncorrectable error */
1082 if (status != -EBADMSG && status != ONENAND_BBT_READ_ECC_ERROR)
1083 return status;
1084
1085 /* check if address lies in MLC region */
1086 i = flexonenand_region(mtd, addr);
1087 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
1088 return status;
1089
1090 /* We are attempting to reread, so decrement stats.failed
1091 * which was incremented by onenand_wait due to read failure
1092 */
297758f8
AKS		 1093 printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n",
1094 __func__);
5988af23
RH		 1095 mtd->ecc_stats.failed--;
1096
1097 /* Issue the LSB page recovery command */
1098 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
1099 return this->wait(mtd, FL_READING);
1100}
1101
1102/**
1103 * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band
1104 * @param mtd MTD device structure
1105 * @param from offset to read from
1106 * @param ops: oob operation description structure
1107 *
1108 * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram.
1109 * So, read-while-load is not present.
1110 */
1111static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1112 struct mtd_oob_ops *ops)
1113{
1114 struct onenand_chip *this = mtd->priv;
1115 struct mtd_ecc_stats stats;
1116 size_t len = ops->len;
1117 size_t ooblen = ops->ooblen;
1118 u_char *buf = ops->datbuf;
1119 u_char *oobbuf = ops->oobbuf;
1120 int read = 0, column, thislen;
1121 int oobread = 0, oobcolumn, thisooblen, oobsize;
1122 int ret = 0;
1123 int writesize = this->writesize;
1124
289c0522 1125 pr_debug("%s: from = 0x%08x, len = %i\n",
8032747e 1126 __func__, (unsigned int) from, (int) len);
5988af23
RH		 1127
1128 if (ops->mode == MTD_OOB_AUTO)
1129 oobsize = this->ecclayout->oobavail;
1130 else
1131 oobsize = mtd->oobsize;
1132
1133 oobcolumn = from & (mtd->oobsize - 1);
1134
1135 /* Do not allow reads past end of device */
1136 if (from + len > mtd->size) {
297758f8
AKS		 1137 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1138 __func__);
5988af23
RH		 1139 ops->retlen = 0;
1140 ops->oobretlen = 0;
1141 return -EINVAL;
1142 }
1143
1144 stats = mtd->ecc_stats;
1145
1146 while (read < len) {
1147 cond_resched();
1148
1149 thislen = min_t(int, writesize, len - read);
1150
1151 column = from & (writesize - 1);
1152 if (column + thislen > writesize)
1153 thislen = writesize - column;
1154
1155 if (!onenand_check_bufferram(mtd, from)) {
1156 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1157
1158 ret = this->wait(mtd, FL_READING);
1159 if (unlikely(ret))
1160 ret = onenand_recover_lsb(mtd, from, ret);
1161 onenand_update_bufferram(mtd, from, !ret);
1162 if (ret == -EBADMSG)
1163 ret = 0;
b085058f
AH		 1164 if (ret)
1165 break;
5988af23
RH		 1166 }
1167
1168 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1169 if (oobbuf) {
1170 thisooblen = oobsize - oobcolumn;
1171 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1172
1173 if (ops->mode == MTD_OOB_AUTO)
1174 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1175 else
1176 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1177 oobread += thisooblen;
1178 oobbuf += thisooblen;
1179 oobcolumn = 0;
1180 }
1181
1182 read += thislen;
1183 if (read == len)
1184 break;
1185
1186 from += thislen;
1187 buf += thislen;
1188 }
1189
1190 /*
1191 * Return success, if no ECC failures, else -EBADMSG
1192 * fs driver will take care of that, because
1193 * retlen == desired len and result == -EBADMSG
1194 */
1195 ops->retlen = read;
1196 ops->oobretlen = oobread;
1197
1198 if (ret)
1199 return ret;
1200
1201 if (mtd->ecc_stats.failed - stats.failed)
1202 return -EBADMSG;
1203
1204 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
1205}
1206
d15057b7 1207/**
49dc08ee 1208 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
cd5f6346
KP		 1209 * @param mtd MTD device structure
1210 * @param from offset to read from
d15057b7 1211 * @param ops: oob operation description structure
cd5f6346 1212 *
d15057b7
KP		 1213 * OneNAND read main and/or out-of-band data
1214 */
49dc08ee 1215static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
d15057b7 1216 struct mtd_oob_ops *ops)
cd5f6346
KP		 1217{
1218 struct onenand_chip *this = mtd->priv;
f4f91ac3 1219 struct mtd_ecc_stats stats;
d15057b7
KP		 1220 size_t len = ops->len;
1221 size_t ooblen = ops->ooblen;
1222 u_char *buf = ops->datbuf;
1223 u_char *oobbuf = ops->oobbuf;
1224 int read = 0, column, thislen;
1225 int oobread = 0, oobcolumn, thisooblen, oobsize;
0fc2ccea 1226 int ret = 0, boundary = 0;
ee9745fc 1227 int writesize = this->writesize;
cd5f6346 1228
289c0522 1229 pr_debug("%s: from = 0x%08x, len = %i\n",
297758f8 1230 __func__, (unsigned int) from, (int) len);
d15057b7
KP		 1231
1232 if (ops->mode == MTD_OOB_AUTO)
1233 oobsize = this->ecclayout->oobavail;
1234 else
1235 oobsize = mtd->oobsize;
1236
1237 oobcolumn = from & (mtd->oobsize - 1);
cd5f6346
KP		 1238
1239 /* Do not allow reads past end of device */
1240 if ((from + len) > mtd->size) {
297758f8
AKS		 1241 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1242 __func__);
d15057b7
KP		 1243 ops->retlen = 0;
1244 ops->oobretlen = 0;
cd5f6346
KP		 1245 return -EINVAL;
1246 }
1247
f4f91ac3 1248 stats = mtd->ecc_stats;
61a7e198 1249
a8de85d5
AH		 1250 /* Read-while-load method */
1251
1252 /* Do first load to bufferRAM */
1253 if (read < len) {
1254 if (!onenand_check_bufferram(mtd, from)) {
ee9745fc 1255 this->command(mtd, ONENAND_CMD_READ, from, writesize);
a8de85d5
AH		 1256 ret = this->wait(mtd, FL_READING);
1257 onenand_update_bufferram(mtd, from, !ret);
5f4d47d5
AH		 1258 if (ret == -EBADMSG)
1259 ret = 0;
a8de85d5
AH		 1260 }
1261 }
1262
ee9745fc
KP		 1263 thislen = min_t(int, writesize, len - read);
1264 column = from & (writesize - 1);
1265 if (column + thislen > writesize)
1266 thislen = writesize - column;
a8de85d5
AH		 1267
1268 while (!ret) {
1269 /* If there is more to load then start next load */
1270 from += thislen;
1271 if (read + thislen < len) {
ee9745fc 1272 this->command(mtd, ONENAND_CMD_READ, from, writesize);
0fc2ccea
AH		 1273 /*
1274 * Chip boundary handling in DDP
1275 * Now we issued chip 1 read and pointed chip 1
492e1501 1276 * bufferram so we have to point chip 0 bufferram.
0fc2ccea 1277 */
738d61f5
KP		 1278 if (ONENAND_IS_DDP(this) &&
1279 unlikely(from == (this->chipsize >> 1))) {
1280 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
0fc2ccea
AH		 1281 boundary = 1;
1282 } else
1283 boundary = 0;
a8de85d5
AH		 1284 ONENAND_SET_PREV_BUFFERRAM(this);
1285 }
1286 /* While load is going, read from last bufferRAM */
1287 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
d15057b7
KP		 1288
1289 /* Read oob area if needed */
1290 if (oobbuf) {
1291 thisooblen = oobsize - oobcolumn;
1292 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1293
1294 if (ops->mode == MTD_OOB_AUTO)
1295 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1296 else
1297 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1298 oobread += thisooblen;
1299 oobbuf += thisooblen;
1300 oobcolumn = 0;
1301 }
1302
a8de85d5
AH		 1303 /* See if we are done */
1304 read += thislen;
1305 if (read == len)
1306 break;
1307 /* Set up for next read from bufferRAM */
0fc2ccea 1308 if (unlikely(boundary))
738d61f5 1309 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
a8de85d5
AH		 1310 ONENAND_SET_NEXT_BUFFERRAM(this);
1311 buf += thislen;
ee9745fc 1312 thislen = min_t(int, writesize, len - read);
a8de85d5
AH		 1313 column = 0;
1314 cond_resched();
1315 /* Now wait for load */
1316 ret = this->wait(mtd, FL_READING);
1317 onenand_update_bufferram(mtd, from, !ret);
5f4d47d5
AH		 1318 if (ret == -EBADMSG)
1319 ret = 0;
a8de85d5 1320 }
cd5f6346 1321
cd5f6346
KP		 1322 /*
1323 * Return success, if no ECC failures, else -EBADMSG
1324 * fs driver will take care of that, because
1325 * retlen == desired len and result == -EBADMSG
1326 */
d15057b7
KP		 1327 ops->retlen = read;
1328 ops->oobretlen = oobread;
f4f91ac3 1329
a8de85d5
AH		 1330 if (ret)
1331 return ret;
1332
5f4d47d5
AH		 1333 if (mtd->ecc_stats.failed - stats.failed)
1334 return -EBADMSG;
1335
f4f91ac3 1336 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
cd5f6346
KP		 1337}
1338
cd5f6346 1339/**
49dc08ee 1340 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
cd5f6346
KP		 1341 * @param mtd MTD device structure
1342 * @param from offset to read from
d15057b7 1343 * @param ops: oob operation description structure
cd5f6346
KP		 1344 *
1345 * OneNAND read out-of-band data from the spare area
1346 */
49dc08ee 1347static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
12f77c9e 1348 struct mtd_oob_ops *ops)
cd5f6346
KP		 1349{
1350 struct onenand_chip *this = mtd->priv;
5f4d47d5 1351 struct mtd_ecc_stats stats;
a5e7c7b4 1352 int read = 0, thislen, column, oobsize;
12f77c9e
KP		 1353 size_t len = ops->ooblen;
1354 mtd_oob_mode_t mode = ops->mode;
1355 u_char *buf = ops->oobbuf;
5988af23 1356 int ret = 0, readcmd;
cd5f6346 1357
12f77c9e
KP		 1358 from += ops->ooboffs;
1359
289c0522 1360 pr_debug("%s: from = 0x%08x, len = %i\n",
297758f8 1361 __func__, (unsigned int) from, (int) len);
cd5f6346
KP		 1362
1363 /* Initialize return length value */
12f77c9e 1364 ops->oobretlen = 0;
cd5f6346 1365
a5e7c7b4
AH		 1366 if (mode == MTD_OOB_AUTO)
1367 oobsize = this->ecclayout->oobavail;
1368 else
1369 oobsize = mtd->oobsize;
1370
1371 column = from & (mtd->oobsize - 1);
1372
1373 if (unlikely(column >= oobsize)) {
297758f8
AKS		 1374 printk(KERN_ERR "%s: Attempted to start read outside oob\n",
1375 __func__);
a5e7c7b4
AH		 1376 return -EINVAL;
1377 }
1378
cd5f6346 1379 /* Do not allow reads past end of device */
a5e7c7b4
AH		 1380 if (unlikely(from >= mtd->size ||
1381 column + len > ((mtd->size >> this->page_shift) -
1382 (from >> this->page_shift)) * oobsize)) {
297758f8
AKS		 1383 printk(KERN_ERR "%s: Attempted to read beyond end of device\n",
1384 __func__);
cd5f6346
KP		 1385 return -EINVAL;
1386 }
1387
5f4d47d5
AH		 1388 stats = mtd->ecc_stats;
1389
8a8f632d 1390 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
5988af23 1391
cd5f6346 1392 while (read < len) {
61a7e198
AB		 1393 cond_resched();
1394
a5e7c7b4 1395 thislen = oobsize - column;
cd5f6346
KP		 1396 thislen = min_t(int, thislen, len);
1397
5988af23 1398 this->command(mtd, readcmd, from, mtd->oobsize);
cd5f6346
KP		 1399
1400 onenand_update_bufferram(mtd, from, 0);
1401
1402 ret = this->wait(mtd, FL_READING);
5988af23
RH		 1403 if (unlikely(ret))
1404 ret = onenand_recover_lsb(mtd, from, ret);
1405
5f4d47d5 1406 if (ret && ret != -EBADMSG) {
297758f8
AKS		 1407 printk(KERN_ERR "%s: read failed = 0x%x\n",
1408 __func__, ret);
5f4d47d5
AH		 1409 break;
1410 }
cd5f6346 1411
a5e7c7b4
AH		 1412 if (mode == MTD_OOB_AUTO)
1413 onenand_transfer_auto_oob(mtd, buf, column, thislen);
1414 else
1415 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
cd5f6346
KP		 1416
1417 read += thislen;
1418
1419 if (read == len)
1420 break;
1421
cd5f6346
KP		 1422 buf += thislen;
1423
1424 /* Read more? */
1425 if (read < len) {
1426 /* Page size */
28318776 1427 from += mtd->writesize;
cd5f6346
KP		 1428 column = 0;
1429 }
1430 }
1431
12f77c9e 1432 ops->oobretlen = read;
5f4d47d5
AH		 1433
1434 if (ret)
1435 return ret;
1436
1437 if (mtd->ecc_stats.failed - stats.failed)
1438 return -EBADMSG;
1439
1440 return 0;
cd5f6346
KP		 1441}
1442
8593fbc6 1443/**
d15057b7
KP		 1444 * onenand_read - [MTD Interface] Read data from flash
1445 * @param mtd MTD device structure
1446 * @param from offset to read from
1447 * @param len number of bytes to read
1448 * @param retlen pointer to variable to store the number of read bytes
1449 * @param buf the databuffer to put data
1450 *
1451 * Read with ecc
1452*/
1453static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1454 size_t *retlen, u_char *buf)
1455{
5988af23 1456 struct onenand_chip *this = mtd->priv;
d15057b7
KP		 1457 struct mtd_oob_ops ops = {
1458 .len = len,
1459 .ooblen = 0,
1460 .datbuf = buf,
1461 .oobbuf = NULL,
1462 };
1463 int ret;
1464
49dc08ee 1465 onenand_get_device(mtd, FL_READING);
8a8f632d 1466 ret = ONENAND_IS_4KB_PAGE(this) ?
5988af23
RH		 1467 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
1468 onenand_read_ops_nolock(mtd, from, &ops);
49dc08ee 1469 onenand_release_device(mtd);
d15057b7 1470
49dc08ee 1471 *retlen = ops.retlen;
d15057b7
KP		 1472 return ret;
1473}
1474
1475/**
1476 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
e3da8067
KP		 1477 * @param mtd: MTD device structure
1478 * @param from: offset to read from
1479 * @param ops: oob operation description structure
d15057b7
KP		 1480
1481 * Read main and/or out-of-band
8593fbc6
TG		 1482 */
1483static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1484 struct mtd_oob_ops *ops)
1485{
5988af23 1486 struct onenand_chip *this = mtd->priv;
49dc08ee
AB		 1487 int ret;
1488
4f4fad27 1489 switch (ops->mode) {
a5e7c7b4
AH		 1490 case MTD_OOB_PLACE:
1491 case MTD_OOB_AUTO:
1492 break;
1493 case MTD_OOB_RAW:
4f4fad27 1494 /* Not implemented yet */
a5e7c7b4
AH		 1495 default:
1496 return -EINVAL;
1497 }
d15057b7 1498
49dc08ee 1499 onenand_get_device(mtd, FL_READING);
d15057b7 1500 if (ops->datbuf)
8a8f632d 1501 ret = ONENAND_IS_4KB_PAGE(this) ?
5988af23
RH		 1502 onenand_mlc_read_ops_nolock(mtd, from, ops) :
1503 onenand_read_ops_nolock(mtd, from, ops);
49dc08ee
AB		 1504 else
1505 ret = onenand_read_oob_nolock(mtd, from, ops);
1506 onenand_release_device(mtd);
d15057b7 1507
49dc08ee 1508 return ret;
8593fbc6
TG		 1509}
1510
211ac75f
KP		 1511/**
1512 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1513 * @param mtd MTD device structure
1514 * @param state state to select the max. timeout value
1515 *
1516 * Wait for command done.
1517 */
1518static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1519{
1520 struct onenand_chip *this = mtd->priv;
1521 unsigned long timeout;
e0c1a921 1522 unsigned int interrupt, ctrl, ecc, addr1, addr8;
211ac75f
KP		 1523
1524 /* The 20 msec is enough */
1525 timeout = jiffies + msecs_to_jiffies(20);
1526 while (time_before(jiffies, timeout)) {
1527 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1528 if (interrupt & ONENAND_INT_MASTER)
1529 break;
1530 }
1531 /* To get correct interrupt status in timeout case */
1532 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1533 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
e0c1a921
AH		 1534 addr1 = this->read_word(this->base + ONENAND_REG_START_ADDRESS1);
1535 addr8 = this->read_word(this->base + ONENAND_REG_START_ADDRESS8);
211ac75f 1536
211ac75f 1537 if (interrupt & ONENAND_INT_READ) {
e0c1a921 1538 ecc = onenand_read_ecc(this);
83973b87 1539 if (ecc & ONENAND_ECC_2BIT_ALL) {
e0c1a921
AH		 1540 printk(KERN_DEBUG "%s: ecc 0x%04x ctrl 0x%04x "
1541 "intr 0x%04x addr1 %#x addr8 %#x\n",
1542 __func__, ecc, ctrl, interrupt, addr1, addr8);
5988af23 1543 return ONENAND_BBT_READ_ECC_ERROR;
83973b87 1544 }
211ac75f 1545 } else {
e0c1a921
AH		 1546 printk(KERN_ERR "%s: read timeout! ctrl 0x%04x "
1547 "intr 0x%04x addr1 %#x addr8 %#x\n",
1548 __func__, ctrl, interrupt, addr1, addr8);
211ac75f
KP		 1549 return ONENAND_BBT_READ_FATAL_ERROR;
1550 }
1551
83973b87
KP		 1552 /* Initial bad block case: 0x2400 or 0x0400 */
1553 if (ctrl & ONENAND_CTRL_ERROR) {
e0c1a921
AH		 1554 printk(KERN_DEBUG "%s: ctrl 0x%04x intr 0x%04x addr1 %#x "
1555 "addr8 %#x\n", __func__, ctrl, interrupt, addr1, addr8);
83973b87
KP		 1556 return ONENAND_BBT_READ_ERROR;
1557 }
1558
211ac75f
KP		 1559 return 0;
1560}
1561
1562/**
1563 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1564 * @param mtd MTD device structure
1565 * @param from offset to read from
e3da8067 1566 * @param ops oob operation description structure
211ac75f
KP		 1567 *
1568 * OneNAND read out-of-band data from the spare area for bbt scan
1569 */
1570int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1571 struct mtd_oob_ops *ops)
1572{
1573 struct onenand_chip *this = mtd->priv;
1574 int read = 0, thislen, column;
5988af23 1575 int ret = 0, readcmd;
211ac75f
KP		 1576 size_t len = ops->ooblen;
1577 u_char *buf = ops->oobbuf;
1578
289c0522 1579 pr_debug("%s: from = 0x%08x, len = %zi\n",
297758f8 1580 __func__, (unsigned int) from, len);
211ac75f
KP		 1581
1582 /* Initialize return value */
1583 ops->oobretlen = 0;
1584
1585 /* Do not allow reads past end of device */
1586 if (unlikely((from + len) > mtd->size)) {
297758f8
AKS		 1587 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1588 __func__);
211ac75f
KP		 1589 return ONENAND_BBT_READ_FATAL_ERROR;
1590 }
1591
1592 /* Grab the lock and see if the device is available */
1593 onenand_get_device(mtd, FL_READING);
1594
1595 column = from & (mtd->oobsize - 1);
1596
8a8f632d 1597 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
5988af23 1598
211ac75f
KP		 1599 while (read < len) {
1600 cond_resched();
1601
1602 thislen = mtd->oobsize - column;
1603 thislen = min_t(int, thislen, len);
1604
5988af23 1605 this->command(mtd, readcmd, from, mtd->oobsize);
211ac75f
KP		 1606
1607 onenand_update_bufferram(mtd, from, 0);
1608
31bb999e 1609 ret = this->bbt_wait(mtd, FL_READING);
5988af23
RH		 1610 if (unlikely(ret))
1611 ret = onenand_recover_lsb(mtd, from, ret);
1612
211ac75f
KP		 1613 if (ret)
1614 break;
1615
1616 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1617 read += thislen;
1618 if (read == len)
1619 break;
1620
1621 buf += thislen;
1622
1623 /* Read more? */
1624 if (read < len) {
1625 /* Update Page size */
ee9745fc 1626 from += this->writesize;
211ac75f
KP		 1627 column = 0;
1628 }
1629 }
1630
1631 /* Deselect and wake up anyone waiting on the device */
1632 onenand_release_device(mtd);
1633
1634 ops->oobretlen = read;
1635 return ret;
1636}
1637
cd5f6346 1638#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
8e6ec690
KP		 1639/**
1640 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1641 * @param mtd MTD device structure
1642 * @param buf the databuffer to verify
1643 * @param to offset to read from
8e6ec690 1644 */
a5e7c7b4 1645static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
8e6ec690
KP		 1646{
1647 struct onenand_chip *this = mtd->priv;
69d79186 1648 u_char *oob_buf = this->oob_buf;
5988af23
RH		 1649 int status, i, readcmd;
1650
8a8f632d 1651 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
8e6ec690 1652
5988af23 1653 this->command(mtd, readcmd, to, mtd->oobsize);
8e6ec690
KP		 1654 onenand_update_bufferram(mtd, to, 0);
1655 status = this->wait(mtd, FL_READING);
1656 if (status)
1657 return status;
1658
69d79186 1659 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
91014e9b 1660 for (i = 0; i < mtd->oobsize; i++)
69d79186 1661 if (buf[i] != 0xFF && buf[i] != oob_buf[i])
8e6ec690
KP		 1662 return -EBADMSG;
1663
1664 return 0;
1665}
1666
cd5f6346 1667/**
8b29c0b6
AH		 1668 * onenand_verify - [GENERIC] verify the chip contents after a write
1669 * @param mtd MTD device structure
1670 * @param buf the databuffer to verify
1671 * @param addr offset to read from
1672 * @param len number of bytes to read and compare
cd5f6346 1673 */
8b29c0b6 1674static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
cd5f6346
KP		 1675{
1676 struct onenand_chip *this = mtd->priv;
cd5f6346 1677 int ret = 0;
8b29c0b6 1678 int thislen, column;
cd5f6346 1679
e6da8568
RT		 1680 column = addr & (this->writesize - 1);
1681
8b29c0b6 1682 while (len != 0) {
e6da8568 1683 thislen = min_t(int, this->writesize - column, len);
60d84f97 1684
ee9745fc 1685 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
cd5f6346 1686
8b29c0b6
AH		 1687 onenand_update_bufferram(mtd, addr, 0);
1688
1689 ret = this->wait(mtd, FL_READING);
1690 if (ret)
1691 return ret;
cd5f6346 1692
8b29c0b6 1693 onenand_update_bufferram(mtd, addr, 1);
cd5f6346 1694
3328dc31 1695 this->read_bufferram(mtd, ONENAND_DATARAM, this->verify_buf, 0, mtd->writesize);
cd5f6346 1696
e6da8568 1697 if (memcmp(buf, this->verify_buf + column, thislen))
8b29c0b6
AH		 1698 return -EBADMSG;
1699
1700 len -= thislen;
1701 buf += thislen;
1702 addr += thislen;
e6da8568 1703 column = 0;
8b29c0b6 1704 }
d5c5e78a 1705
cd5f6346
KP		 1706 return 0;
1707}
1708#else
8b29c0b6 1709#define onenand_verify(...) (0)
8e6ec690 1710#define onenand_verify_oob(...) (0)
cd5f6346
KP		 1711#endif
1712
60d84f97 1713#define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
cd5f6346 1714
6c77fd64
RP		 1715static void onenand_panic_wait(struct mtd_info *mtd)
1716{
1717 struct onenand_chip *this = mtd->priv;
1718 unsigned int interrupt;
1719 int i;
1720
1721 for (i = 0; i < 2000; i++) {
1722 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1723 if (interrupt & ONENAND_INT_MASTER)
1724 break;
1725 udelay(10);
1726 }
1727}
1728
1729/**
1730 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
1731 * @param mtd MTD device structure
1732 * @param to offset to write to
1733 * @param len number of bytes to write
1734 * @param retlen pointer to variable to store the number of written bytes
1735 * @param buf the data to write
1736 *
1737 * Write with ECC
1738 */
1739static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
1740 size_t *retlen, const u_char *buf)
1741{
1742 struct onenand_chip *this = mtd->priv;
1743 int column, subpage;
1744 int written = 0;
1745 int ret = 0;
1746
1747 if (this->state == FL_PM_SUSPENDED)
1748 return -EBUSY;
1749
1750 /* Wait for any existing operation to clear */
1751 onenand_panic_wait(mtd);
1752
289c0522 1753 pr_debug("%s: to = 0x%08x, len = %i\n",
297758f8 1754 __func__, (unsigned int) to, (int) len);
6c77fd64
RP		 1755
1756 /* Initialize retlen, in case of early exit */
1757 *retlen = 0;
1758
1759 /* Do not allow writes past end of device */
1760 if (unlikely((to + len) > mtd->size)) {
297758f8
AKS		 1761 printk(KERN_ERR "%s: Attempt write to past end of device\n",
1762 __func__);
6c77fd64
RP		 1763 return -EINVAL;
1764 }
1765
1766 /* Reject writes, which are not page aligned */
b73d7e43 1767 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
297758f8
AKS		 1768 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1769 __func__);
6c77fd64
RP		 1770 return -EINVAL;
1771 }
1772
1773 column = to & (mtd->writesize - 1);
1774
1775 /* Loop until all data write */
1776 while (written < len) {
1777 int thislen = min_t(int, mtd->writesize - column, len - written);
1778 u_char *wbuf = (u_char *) buf;
1779
1780 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1781
1782 /* Partial page write */
1783 subpage = thislen < mtd->writesize;
1784 if (subpage) {
1785 memset(this->page_buf, 0xff, mtd->writesize);
1786 memcpy(this->page_buf + column, buf, thislen);
1787 wbuf = this->page_buf;
1788 }
1789
1790 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1791 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1792
1793 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1794
1795 onenand_panic_wait(mtd);
1796
1797 /* In partial page write we don't update bufferram */
1798 onenand_update_bufferram(mtd, to, !ret && !subpage);
1799 if (ONENAND_IS_2PLANE(this)) {
1800 ONENAND_SET_BUFFERRAM1(this);
1801 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1802 }
1803
1804 if (ret) {
297758f8 1805 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
6c77fd64
RP		 1806 break;
1807 }
1808
1809 written += thislen;
1810
1811 if (written == len)
1812 break;
1813
1814 column = 0;
1815 to += thislen;
1816 buf += thislen;
1817 }
1818
1819 *retlen = written;
1820 return ret;
1821}
1822
cd5f6346 1823/**
7854d3f7 1824 * onenand_fill_auto_oob - [INTERN] oob auto-placement transfer
d15057b7
KP		 1825 * @param mtd MTD device structure
1826 * @param oob_buf oob buffer
1827 * @param buf source address
1828 * @param column oob offset to write to
1829 * @param thislen oob length to write
1830 */
1831static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1832 const u_char *buf, int column, int thislen)
1833{
1834 struct onenand_chip *this = mtd->priv;
1835 struct nand_oobfree *free;
1836 int writecol = column;
1837 int writeend = column + thislen;
1838 int lastgap = 0;
1839 unsigned int i;
1840
1841 free = this->ecclayout->oobfree;
1842 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1843 if (writecol >= lastgap)
1844 writecol += free->offset - lastgap;
1845 if (writeend >= lastgap)
1846 writeend += free->offset - lastgap;
1847 lastgap = free->offset + free->length;
1848 }
1849 free = this->ecclayout->oobfree;
1850 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1851 int free_end = free->offset + free->length;
1852 if (free->offset < writeend && free_end > writecol) {
1853 int st = max_t(int,free->offset,writecol);
1854 int ed = min_t(int,free_end,writeend);
1855 int n = ed - st;
1856 memcpy(oob_buf + st, buf, n);
1857 buf += n;
1858 } else if (column == 0)
1859 break;
1860 }
1861 return 0;
1862}
1863
1864/**
49dc08ee 1865 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
cd5f6346
KP		 1866 * @param mtd MTD device structure
1867 * @param to offset to write to
d15057b7 1868 * @param ops oob operation description structure
cd5f6346 1869 *
d15057b7 1870 * Write main and/or oob with ECC
cd5f6346 1871 */
49dc08ee 1872static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
d15057b7 1873 struct mtd_oob_ops *ops)
cd5f6346
KP		 1874{
1875 struct onenand_chip *this = mtd->priv;
9ce96908
KP		 1876 int written = 0, column, thislen = 0, subpage = 0;
1877 int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
d15057b7
KP		 1878 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1879 size_t len = ops->len;
1880 size_t ooblen = ops->ooblen;
1881 const u_char *buf = ops->datbuf;
1882 const u_char *oob = ops->oobbuf;
1883 u_char *oobbuf;
ac80dac0 1884 int ret = 0, cmd;
cd5f6346 1885
289c0522 1886 pr_debug("%s: to = 0x%08x, len = %i\n",
297758f8 1887 __func__, (unsigned int) to, (int) len);
cd5f6346
KP		 1888
1889 /* Initialize retlen, in case of early exit */
d15057b7
KP		 1890 ops->retlen = 0;
1891 ops->oobretlen = 0;
cd5f6346
KP		 1892
1893 /* Do not allow writes past end of device */
1894 if (unlikely((to + len) > mtd->size)) {
297758f8
AKS		 1895 printk(KERN_ERR "%s: Attempt write to past end of device\n",
1896 __func__);
cd5f6346
KP		 1897 return -EINVAL;
1898 }
1899
1900 /* Reject writes, which are not page aligned */
b73d7e43 1901 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
297758f8
AKS		 1902 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1903 __func__);
cd5f6346
KP		 1904 return -EINVAL;
1905 }
1906
9ce96908
KP		 1907 /* Check zero length */
1908 if (!len)
1909 return 0;
1910
d15057b7
KP		 1911 if (ops->mode == MTD_OOB_AUTO)
1912 oobsize = this->ecclayout->oobavail;
1913 else
1914 oobsize = mtd->oobsize;
1915
1916 oobcolumn = to & (mtd->oobsize - 1);
1917
60d84f97 1918 column = to & (mtd->writesize - 1);
60d84f97 1919
cd5f6346 1920 /* Loop until all data write */
9ce96908
KP		 1921 while (1) {
1922 if (written < len) {
1923 u_char *wbuf = (u_char *) buf;
60d84f97 1924
9ce96908
KP		 1925 thislen = min_t(int, mtd->writesize - column, len - written);
1926 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
d15057b7 1927
9ce96908 1928 cond_resched();
61a7e198 1929
9ce96908 1930 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
60d84f97 1931
9ce96908
KP		 1932 /* Partial page write */
1933 subpage = thislen < mtd->writesize;
1934 if (subpage) {
1935 memset(this->page_buf, 0xff, mtd->writesize);
1936 memcpy(this->page_buf + column, buf, thislen);
1937 wbuf = this->page_buf;
1938 }
cd5f6346 1939
9ce96908 1940 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
d15057b7 1941
9ce96908
KP		 1942 if (oob) {
1943 oobbuf = this->oob_buf;
d15057b7 1944
9ce96908
KP		 1945 /* We send data to spare ram with oobsize
1946 * to prevent byte access */
1947 memset(oobbuf, 0xff, mtd->oobsize);
1948 if (ops->mode == MTD_OOB_AUTO)
1949 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1950 else
1951 memcpy(oobbuf + oobcolumn, oob, thisooblen);
d15057b7 1952
9ce96908
KP		 1953 oobwritten += thisooblen;
1954 oob += thisooblen;
1955 oobcolumn = 0;
1956 } else
1957 oobbuf = (u_char *) ffchars;
1958
1959 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
d15057b7 1960 } else
9ce96908 1961 ONENAND_SET_NEXT_BUFFERRAM(this);
d15057b7 1962
9ce96908 1963 /*
492e1501
MK		 1964 * 2 PLANE, MLC, and Flex-OneNAND do not support
1965 * write-while-program feature.
9ce96908 1966 */
6a88c47b 1967 if (!ONENAND_IS_2PLANE(this) && !ONENAND_IS_4KB_PAGE(this) && !first) {
9ce96908
KP		 1968 ONENAND_SET_PREV_BUFFERRAM(this);
1969
1970 ret = this->wait(mtd, FL_WRITING);
1971
1972 /* In partial page write we don't update bufferram */
1973 onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
1974 if (ret) {
1975 written -= prevlen;
297758f8
AKS		 1976 printk(KERN_ERR "%s: write failed %d\n",
1977 __func__, ret);
9ce96908
KP		 1978 break;
1979 }
cd5f6346 1980
9ce96908
KP		 1981 if (written == len) {
1982 /* Only check verify write turn on */
1983 ret = onenand_verify(mtd, buf - len, to - len, len);
1984 if (ret)
297758f8
AKS		 1985 printk(KERN_ERR "%s: verify failed %d\n",
1986 __func__, ret);
9ce96908
KP		 1987 break;
1988 }
cd5f6346 1989
9ce96908
KP		 1990 ONENAND_SET_NEXT_BUFFERRAM(this);
1991 }
81f38e11 1992
ac80dac0
RT		 1993 this->ongoing = 0;
1994 cmd = ONENAND_CMD_PROG;
1995
1996 /* Exclude 1st OTP and OTP blocks for cache program feature */
1997 if (ONENAND_IS_CACHE_PROGRAM(this) &&
1998 likely(onenand_block(this, to) != 0) &&
1999 ONENAND_IS_4KB_PAGE(this) &&
2000 ((written + thislen) < len)) {
2001 cmd = ONENAND_CMD_2X_CACHE_PROG;
2002 this->ongoing = 1;
2003 }
2004
2005 this->command(mtd, cmd, to, mtd->writesize);
9ce96908
KP		 2006
2007 /*
2008 * 2 PLANE, MLC, and Flex-OneNAND wait here
2009 */
6a88c47b 2010 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) {
9ce96908 2011 ret = this->wait(mtd, FL_WRITING);
cd5f6346 2012
9ce96908
KP		 2013 /* In partial page write we don't update bufferram */
2014 onenand_update_bufferram(mtd, to, !ret && !subpage);
2015 if (ret) {
297758f8
AKS		 2016 printk(KERN_ERR "%s: write failed %d\n",
2017 __func__, ret);
9ce96908
KP		 2018 break;
2019 }
cd5f6346 2020
9ce96908
KP		 2021 /* Only check verify write turn on */
2022 ret = onenand_verify(mtd, buf, to, thislen);
2023 if (ret) {
297758f8
AKS		 2024 printk(KERN_ERR "%s: verify failed %d\n",
2025 __func__, ret);
9ce96908
KP		 2026 break;
2027 }
cd5f6346 2028
9ce96908 2029 written += thislen;
81f38e11 2030
9ce96908
KP		 2031 if (written == len)
2032 break;
2033
2034 } else
2035 written += thislen;
cd5f6346 2036
60d84f97 2037 column = 0;
9ce96908
KP		 2038 prev_subpage = subpage;
2039 prev = to;
2040 prevlen = thislen;
cd5f6346
KP		 2041 to += thislen;
2042 buf += thislen;
9ce96908 2043 first = 0;
cd5f6346
KP		 2044 }
2045
9ce96908
KP		 2046 /* In error case, clear all bufferrams */
2047 if (written != len)
2048 onenand_invalidate_bufferram(mtd, 0, -1);
2049
d15057b7 2050 ops->retlen = written;
9ce96908 2051 ops->oobretlen = oobwritten;
d5c5e78a 2052
cd5f6346
KP		 2053 return ret;
2054}
2055
a5e7c7b4 2056
cd5f6346 2057/**
7854d3f7 2058 * onenand_write_oob_nolock - [INTERN] OneNAND write out-of-band
cd5f6346
KP		 2059 * @param mtd MTD device structure
2060 * @param to offset to write to
2061 * @param len number of bytes to write
2062 * @param retlen pointer to variable to store the number of written bytes
2063 * @param buf the data to write
a5e7c7b4 2064 * @param mode operation mode
cd5f6346
KP		 2065 *
2066 * OneNAND write out-of-band
2067 */
49dc08ee
AB		 2068static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2069 struct mtd_oob_ops *ops)
cd5f6346
KP		 2070{
2071 struct onenand_chip *this = mtd->priv;
a5e7c7b4 2072 int column, ret = 0, oobsize;
5988af23 2073 int written = 0, oobcmd;
91014e9b 2074 u_char *oobbuf;
12f77c9e
KP		 2075 size_t len = ops->ooblen;
2076 const u_char *buf = ops->oobbuf;
2077 mtd_oob_mode_t mode = ops->mode;
2078
2079 to += ops->ooboffs;
cd5f6346 2080
289c0522 2081 pr_debug("%s: to = 0x%08x, len = %i\n",
297758f8 2082 __func__, (unsigned int) to, (int) len);
cd5f6346
KP		 2083
2084 /* Initialize retlen, in case of early exit */
12f77c9e 2085 ops->oobretlen = 0;
cd5f6346 2086
a5e7c7b4
AH		 2087 if (mode == MTD_OOB_AUTO)
2088 oobsize = this->ecclayout->oobavail;
2089 else
2090 oobsize = mtd->oobsize;
2091
2092 column = to & (mtd->oobsize - 1);
2093
2094 if (unlikely(column >= oobsize)) {
297758f8
AKS		 2095 printk(KERN_ERR "%s: Attempted to start write outside oob\n",
2096 __func__);
a5e7c7b4
AH		 2097 return -EINVAL;
2098 }
2099
52e4200a 2100 /* For compatibility with NAND: Do not allow write past end of page */
91014e9b 2101 if (unlikely(column + len > oobsize)) {
297758f8
AKS		 2102 printk(KERN_ERR "%s: Attempt to write past end of page\n",
2103 __func__);
52e4200a
AH		 2104 return -EINVAL;
2105 }
2106
a5e7c7b4
AH		 2107 /* Do not allow reads past end of device */
2108 if (unlikely(to >= mtd->size ||
2109 column + len > ((mtd->size >> this->page_shift) -
2110 (to >> this->page_shift)) * oobsize)) {
8032747e
DW		 2111 printk(KERN_ERR "%s: Attempted to write past end of device\n",
2112 __func__);
cd5f6346
KP		 2113 return -EINVAL;
2114 }
2115
470bc844 2116 oobbuf = this->oob_buf;
91014e9b 2117
8a8f632d 2118 oobcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
5988af23 2119
cd5f6346
KP		 2120 /* Loop until all data write */
2121 while (written < len) {
a5e7c7b4 2122 int thislen = min_t(int, oobsize, len - written);
cd5f6346 2123
61a7e198
AB		 2124 cond_resched();
2125
cd5f6346
KP		 2126 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
2127
34c10609
KP		 2128 /* We send data to spare ram with oobsize
2129 * to prevent byte access */
91014e9b 2130 memset(oobbuf, 0xff, mtd->oobsize);
a5e7c7b4 2131 if (mode == MTD_OOB_AUTO)
91014e9b 2132 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
a5e7c7b4 2133 else
91014e9b
KP		 2134 memcpy(oobbuf + column, buf, thislen);
2135 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
cd5f6346 2136
8a8f632d 2137 if (ONENAND_IS_4KB_PAGE(this)) {
5988af23
RH		 2138 /* Set main area of DataRAM to 0xff*/
2139 memset(this->page_buf, 0xff, mtd->writesize);
2140 this->write_bufferram(mtd, ONENAND_DATARAM,
2141 this->page_buf, 0, mtd->writesize);
2142 }
2143
2144 this->command(mtd, oobcmd, to, mtd->oobsize);
cd5f6346
KP		 2145
2146 onenand_update_bufferram(mtd, to, 0);
ee9745fc
KP		 2147 if (ONENAND_IS_2PLANE(this)) {
2148 ONENAND_SET_BUFFERRAM1(this);
2149 onenand_update_bufferram(mtd, to + this->writesize, 0);
2150 }
cd5f6346 2151
8e6ec690
KP		 2152 ret = this->wait(mtd, FL_WRITING);
2153 if (ret) {
297758f8 2154 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
5b4246f1 2155 break;
8e6ec690
KP		 2156 }
2157
91014e9b 2158 ret = onenand_verify_oob(mtd, oobbuf, to);
8e6ec690 2159 if (ret) {
297758f8
AKS		 2160 printk(KERN_ERR "%s: verify failed %d\n",
2161 __func__, ret);
5b4246f1 2162 break;
8e6ec690 2163 }
cd5f6346
KP		 2164
2165 written += thislen;
cd5f6346
KP		 2166 if (written == len)
2167 break;
2168
a5e7c7b4 2169 to += mtd->writesize;
cd5f6346 2170 buf += thislen;
a5e7c7b4 2171 column = 0;
cd5f6346
KP		 2172 }
2173
12f77c9e 2174 ops->oobretlen = written;
d5c5e78a 2175
8e6ec690 2176 return ret;
cd5f6346
KP		 2177}
2178
d15057b7
KP		 2179/**
2180 * onenand_write - [MTD Interface] write buffer to FLASH
2181 * @param mtd MTD device structure
2182 * @param to offset to write to
2183 * @param len number of bytes to write
2184 * @param retlen pointer to variable to store the number of written bytes
2185 * @param buf the data to write
2186 *
2187 * Write with ECC
2188 */
2189static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
2190 size_t *retlen, const u_char *buf)
2191{
2192 struct mtd_oob_ops ops = {
2193 .len = len,
2194 .ooblen = 0,
2195 .datbuf = (u_char *) buf,
2196 .oobbuf = NULL,
2197 };
2198 int ret;
2199
49dc08ee
AB		 2200 onenand_get_device(mtd, FL_WRITING);
2201 ret = onenand_write_ops_nolock(mtd, to, &ops);
2202 onenand_release_device(mtd);
d15057b7 2203
49dc08ee 2204 *retlen = ops.retlen;
d15057b7
KP		 2205 return ret;
2206}
2207
8593fbc6
TG		 2208/**
2209 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
e3da8067
KP		 2210 * @param mtd: MTD device structure
2211 * @param to: offset to write
2212 * @param ops: oob operation description structure
8593fbc6
TG		 2213 */
2214static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
2215 struct mtd_oob_ops *ops)
2216{
49dc08ee
AB		 2217 int ret;
2218
4f4fad27 2219 switch (ops->mode) {
a5e7c7b4
AH		 2220 case MTD_OOB_PLACE:
2221 case MTD_OOB_AUTO:
2222 break;
2223 case MTD_OOB_RAW:
4f4fad27 2224 /* Not implemented yet */
a5e7c7b4
AH		 2225 default:
2226 return -EINVAL;
2227 }
d15057b7 2228
49dc08ee 2229 onenand_get_device(mtd, FL_WRITING);
d15057b7 2230 if (ops->datbuf)
49dc08ee
AB		 2231 ret = onenand_write_ops_nolock(mtd, to, ops);
2232 else
2233 ret = onenand_write_oob_nolock(mtd, to, ops);
2234 onenand_release_device(mtd);
d15057b7 2235
49dc08ee 2236 return ret;
8593fbc6
TG		 2237}
2238
cdc00130 2239/**
49dc08ee 2240 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
cdc00130
KP		 2241 * @param mtd MTD device structure
2242 * @param ofs offset from device start
cdc00130
KP		 2243 * @param allowbbt 1, if its allowed to access the bbt area
2244 *
2245 * Check, if the block is bad. Either by reading the bad block table or
2246 * calling of the scan function.
2247 */
49dc08ee 2248static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
cdc00130
KP		 2249{
2250 struct onenand_chip *this = mtd->priv;
2251 struct bbm_info *bbm = this->bbm;
2252
2253 /* Return info from the table */
2254 return bbm->isbad_bbt(mtd, ofs, allowbbt);
2255}
2256
72073027
MK		 2257
2258static int onenand_multiblock_erase_verify(struct mtd_info *mtd,
2259 struct erase_info *instr)
2260{
2261 struct onenand_chip *this = mtd->priv;
2262 loff_t addr = instr->addr;
2263 int len = instr->len;
2264 unsigned int block_size = (1 << this->erase_shift);
2265 int ret = 0;
2266
2267 while (len) {
2268 this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size);
2269 ret = this->wait(mtd, FL_VERIFYING_ERASE);
2270 if (ret) {
2271 printk(KERN_ERR "%s: Failed verify, block %d\n",
2272 __func__, onenand_block(this, addr));
2273 instr->state = MTD_ERASE_FAILED;
2274 instr->fail_addr = addr;
2275 return -1;
2276 }
2277 len -= block_size;
2278 addr += block_size;
2279 }
2280 return 0;
2281}
2282
2283/**
7854d3f7 2284 * onenand_multiblock_erase - [INTERN] erase block(s) using multiblock erase
72073027
MK		 2285 * @param mtd MTD device structure
2286 * @param instr erase instruction
2287 * @param region erase region
2288 *
2289 * Erase one or more blocks up to 64 block at a time
2290 */
2291static int onenand_multiblock_erase(struct mtd_info *mtd,
2292 struct erase_info *instr,
2293 unsigned int block_size)
2294{
2295 struct onenand_chip *this = mtd->priv;
2296 loff_t addr = instr->addr;
2297 int len = instr->len;
2298 int eb_count = 0;
2299 int ret = 0;
2300 int bdry_block = 0;
2301
2302 instr->state = MTD_ERASING;
2303
2304 if (ONENAND_IS_DDP(this)) {
2305 loff_t bdry_addr = this->chipsize >> 1;
2306 if (addr < bdry_addr && (addr + len) > bdry_addr)
2307 bdry_block = bdry_addr >> this->erase_shift;
2308 }
2309
2310 /* Pre-check bbs */
2311 while (len) {
2312 /* Check if we have a bad block, we do not erase bad blocks */
2313 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2314 printk(KERN_WARNING "%s: attempt to erase a bad block "
2315 "at addr 0x%012llx\n",
2316 __func__, (unsigned long long) addr);
2317 instr->state = MTD_ERASE_FAILED;
2318 return -EIO;
2319 }
2320 len -= block_size;
2321 addr += block_size;
2322 }
2323
2324 len = instr->len;
2325 addr = instr->addr;
2326
2327 /* loop over 64 eb batches */
2328 while (len) {
2329 struct erase_info verify_instr = *instr;
2330 int max_eb_count = MB_ERASE_MAX_BLK_COUNT;
2331
2332 verify_instr.addr = addr;
2333 verify_instr.len = 0;
2334
2335 /* do not cross chip boundary */
2336 if (bdry_block) {
2337 int this_block = (addr >> this->erase_shift);
2338
2339 if (this_block < bdry_block) {
2340 max_eb_count = min(max_eb_count,
2341 (bdry_block - this_block));
2342 }
2343 }
2344
2345 eb_count = 0;
2346
2347 while (len > block_size && eb_count < (max_eb_count - 1)) {
2348 this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE,
2349 addr, block_size);
2350 onenand_invalidate_bufferram(mtd, addr, block_size);
2351
2352 ret = this->wait(mtd, FL_PREPARING_ERASE);
2353 if (ret) {
2354 printk(KERN_ERR "%s: Failed multiblock erase, "
2355 "block %d\n", __func__,
2356 onenand_block(this, addr));
2357 instr->state = MTD_ERASE_FAILED;
2358 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2359 return -EIO;
2360 }
2361
2362 len -= block_size;
2363 addr += block_size;
2364 eb_count++;
2365 }
2366
2367 /* last block of 64-eb series */
2368 cond_resched();
2369 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2370 onenand_invalidate_bufferram(mtd, addr, block_size);
2371
2372 ret = this->wait(mtd, FL_ERASING);
2373 /* Check if it is write protected */
2374 if (ret) {
2375 printk(KERN_ERR "%s: Failed erase, block %d\n",
2376 __func__, onenand_block(this, addr));
2377 instr->state = MTD_ERASE_FAILED;
2378 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2379 return -EIO;
2380 }
2381
2382 len -= block_size;
2383 addr += block_size;
2384 eb_count++;
2385
2386 /* verify */
2387 verify_instr.len = eb_count * block_size;
2388 if (onenand_multiblock_erase_verify(mtd, &verify_instr)) {
2389 instr->state = verify_instr.state;
2390 instr->fail_addr = verify_instr.fail_addr;
2391 return -EIO;
2392 }
2393
2394 }
2395 return 0;
2396}
2397
2398
cd5f6346 2399/**
7854d3f7 2400 * onenand_block_by_block_erase - [INTERN] erase block(s) using regular erase
cd5f6346
KP		 2401 * @param mtd MTD device structure
2402 * @param instr erase instruction
73885aea
MK		 2403 * @param region erase region
2404 * @param block_size erase block size
cd5f6346 2405 *
73885aea 2406 * Erase one or more blocks one block at a time
cd5f6346 2407 */
73885aea
MK		 2408static int onenand_block_by_block_erase(struct mtd_info *mtd,
2409 struct erase_info *instr,
2410 struct mtd_erase_region_info *region,
2411 unsigned int block_size)
cd5f6346
KP		 2412{
2413 struct onenand_chip *this = mtd->priv;
5988af23 2414 loff_t addr = instr->addr;
73885aea 2415 int len = instr->len;
5988af23 2416 loff_t region_end = 0;
73885aea 2417 int ret = 0;
cd5f6346 2418
73885aea
MK		 2419 if (region) {
2420 /* region is set for Flex-OneNAND */
5988af23 2421 region_end = region->offset + region->erasesize * region->numblocks;
cd5f6346
KP		 2422 }
2423
cd5f6346
KP		 2424 instr->state = MTD_ERASING;
2425
73885aea 2426 /* Loop through the blocks */
cd5f6346 2427 while (len) {
61a7e198 2428 cond_resched();
cd5f6346 2429
cdc00130 2430 /* Check if we have a bad block, we do not erase bad blocks */
49dc08ee 2431 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
297758f8
AKS		 2432 printk(KERN_WARNING "%s: attempt to erase a bad block "
2433 "at addr 0x%012llx\n",
2434 __func__, (unsigned long long) addr);
cdc00130 2435 instr->state = MTD_ERASE_FAILED;
73885aea 2436 return -EIO;
cdc00130 2437 }
cd5f6346
KP		 2438
2439 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2440
480b9dfb
AH		 2441 onenand_invalidate_bufferram(mtd, addr, block_size);
2442
cd5f6346
KP		 2443 ret = this->wait(mtd, FL_ERASING);
2444 /* Check, if it is write protected */
2445 if (ret) {
297758f8
AKS		 2446 printk(KERN_ERR "%s: Failed erase, block %d\n",
2447 __func__, onenand_block(this, addr));
cd5f6346
KP		 2448 instr->state = MTD_ERASE_FAILED;
2449 instr->fail_addr = addr;
73885aea 2450 return -EIO;
cd5f6346
KP		 2451 }
2452
2453 len -= block_size;
2454 addr += block_size;
5988af23 2455
eff3bba6 2456 if (region && addr == region_end) {
5988af23
RH		 2457 if (!len)
2458 break;
2459 region++;
2460
2461 block_size = region->erasesize;
2462 region_end = region->offset + region->erasesize * region->numblocks;
2463
2464 if (len & (block_size - 1)) {
2465 /* FIXME: This should be handled at MTD partitioning level. */
297758f8
AKS		 2466 printk(KERN_ERR "%s: Unaligned address\n",
2467 __func__);
73885aea 2468 return -EIO;
5988af23
RH		 2469 }
2470 }
73885aea
MK		 2471 }
2472 return 0;
2473}
5988af23 2474
73885aea
MK		 2475/**
2476 * onenand_erase - [MTD Interface] erase block(s)
2477 * @param mtd MTD device structure
2478 * @param instr erase instruction
2479 *
2480 * Erase one or more blocks
2481 */
2482static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
2483{
2484 struct onenand_chip *this = mtd->priv;
2485 unsigned int block_size;
2486 loff_t addr = instr->addr;
2487 loff_t len = instr->len;
2488 int ret = 0;
2489 struct mtd_erase_region_info *region = NULL;
2490 loff_t region_offset = 0;
2491
289c0522 2492 pr_debug("%s: start=0x%012llx, len=%llu\n", __func__,
73885aea
MK		 2493 (unsigned long long) instr->addr, (unsigned long long) instr->len);
2494
2495 /* Do not allow erase past end of device */
2496 if (unlikely((len + addr) > mtd->size)) {
2497 printk(KERN_ERR "%s: Erase past end of device\n", __func__);
2498 return -EINVAL;
cd5f6346
KP		 2499 }
2500
73885aea
MK		 2501 if (FLEXONENAND(this)) {
2502 /* Find the eraseregion of this address */
2503 int i = flexonenand_region(mtd, addr);
cd5f6346 2504
73885aea
MK		 2505 region = &mtd->eraseregions[i];
2506 block_size = region->erasesize;
cd5f6346 2507
73885aea
MK		 2508 /* Start address within region must align on block boundary.
2509 * Erase region's start offset is always block start address.
2510 */
2511 region_offset = region->offset;
2512 } else
2513 block_size = 1 << this->erase_shift;
2514
2515 /* Start address must align on block boundary */
2516 if (unlikely((addr - region_offset) & (block_size - 1))) {
2517 printk(KERN_ERR "%s: Unaligned address\n", __func__);
2518 return -EINVAL;
2519 }
2520
2521 /* Length must align on block boundary */
2522 if (unlikely(len & (block_size - 1))) {
2523 printk(KERN_ERR "%s: Length not block aligned\n", __func__);
2524 return -EINVAL;
2525 }
2526
2527 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2528
2529 /* Grab the lock and see if the device is available */
2530 onenand_get_device(mtd, FL_ERASING);
2531
d983c54e
KP		 2532 if (ONENAND_IS_4KB_PAGE(this) || region ||
2533 instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) {
72073027
MK		 2534 /* region is set for Flex-OneNAND (no mb erase) */
2535 ret = onenand_block_by_block_erase(mtd, instr,
2536 region, block_size);
2537 } else {
2538 ret = onenand_multiblock_erase(mtd, instr, block_size);
2539 }
cd5f6346
KP		 2540
2541 /* Deselect and wake up anyone waiting on the device */
2542 onenand_release_device(mtd);
2543
3cd3a86b 2544 /* Do call back function */
73885aea
MK		 2545 if (!ret) {
2546 instr->state = MTD_ERASE_DONE;
3cd3a86b 2547 mtd_erase_callback(instr);
73885aea 2548 }
3cd3a86b 2549
cd5f6346
KP		 2550 return ret;
2551}
2552
2553/**
2554 * onenand_sync - [MTD Interface] sync
2555 * @param mtd MTD device structure
2556 *
2557 * Sync is actually a wait for chip ready function
2558 */
2559static void onenand_sync(struct mtd_info *mtd)
2560{
289c0522 2561 pr_debug("%s: called\n", __func__);
cd5f6346
KP		 2562
2563 /* Grab the lock and see if the device is available */
2564 onenand_get_device(mtd, FL_SYNCING);
2565
2566 /* Release it and go back */
2567 onenand_release_device(mtd);
2568}
2569
2570/**
2571 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
2572 * @param mtd MTD device structure
2573 * @param ofs offset relative to mtd start
cdc00130
KP		 2574 *
2575 * Check whether the block is bad
cd5f6346
KP		 2576 */
2577static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
2578{
49dc08ee
AB		 2579 int ret;
2580
cdc00130
KP		 2581 /* Check for invalid offset */
2582 if (ofs > mtd->size)
2583 return -EINVAL;
2584
49dc08ee
AB		 2585 onenand_get_device(mtd, FL_READING);
2586 ret = onenand_block_isbad_nolock(mtd, ofs, 0);
2587 onenand_release_device(mtd);
2588 return ret;
cdc00130
KP		 2589}
2590
2591/**
2592 * onenand_default_block_markbad - [DEFAULT] mark a block bad
2593 * @param mtd MTD device structure
2594 * @param ofs offset from device start
2595 *
2596 * This is the default implementation, which can be overridden by
2597 * a hardware specific driver.
2598 */
2599static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
2600{
2601 struct onenand_chip *this = mtd->priv;
2602 struct bbm_info *bbm = this->bbm;
2603 u_char buf[2] = {0, 0};
12f77c9e
KP		 2604 struct mtd_oob_ops ops = {
2605 .mode = MTD_OOB_PLACE,
2606 .ooblen = 2,
2607 .oobbuf = buf,
2608 .ooboffs = 0,
2609 };
cdc00130
KP		 2610 int block;
2611
2612 /* Get block number */
5988af23 2613 block = onenand_block(this, ofs);
cdc00130
KP		 2614 if (bbm->bbt)
2615 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
2616
492e1501 2617 /* We write two bytes, so we don't have to mess with 16-bit access */
cdc00130 2618 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
5988af23
RH		 2619 /* FIXME : What to do when marking SLC block in partition
2620 * with MLC erasesize? For now, it is not advisable to
2621 * create partitions containing both SLC and MLC regions.
2622 */
2623 return onenand_write_oob_nolock(mtd, ofs, &ops);
cd5f6346
KP		 2624}
2625
2626/**
2627 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
2628 * @param mtd MTD device structure
2629 * @param ofs offset relative to mtd start
cdc00130
KP		 2630 *
2631 * Mark the block as bad
cd5f6346
KP		 2632 */
2633static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2634{
cdc00130
KP		 2635 struct onenand_chip *this = mtd->priv;
2636 int ret;
2637
2638 ret = onenand_block_isbad(mtd, ofs);
2639 if (ret) {
2640 /* If it was bad already, return success and do nothing */
2641 if (ret > 0)
2642 return 0;
2643 return ret;
2644 }
2645
49dc08ee
AB		 2646 onenand_get_device(mtd, FL_WRITING);
2647 ret = this->block_markbad(mtd, ofs);
2648 onenand_release_device(mtd);
2649 return ret;
cd5f6346
KP		 2650}
2651
2652/**
08f782b6 2653 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
cd5f6346
KP		 2654 * @param mtd MTD device structure
2655 * @param ofs offset relative to mtd start
08f782b6 2656 * @param len number of bytes to lock or unlock
e3da8067 2657 * @param cmd lock or unlock command
cd5f6346 2658 *
08f782b6 2659 * Lock or unlock one or more blocks
cd5f6346 2660 */
08f782b6 2661static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
cd5f6346
KP		 2662{
2663 struct onenand_chip *this = mtd->priv;
2664 int start, end, block, value, status;
08f782b6 2665 int wp_status_mask;
cd5f6346 2666
5988af23
RH		 2667 start = onenand_block(this, ofs);
2668 end = onenand_block(this, ofs + len) - 1;
cd5f6346 2669
08f782b6
KP		 2670 if (cmd == ONENAND_CMD_LOCK)
2671 wp_status_mask = ONENAND_WP_LS;
2672 else
2673 wp_status_mask = ONENAND_WP_US;
2674
cd5f6346 2675 /* Continuous lock scheme */
28b79ff9 2676 if (this->options & ONENAND_HAS_CONT_LOCK) {
cd5f6346
KP		 2677 /* Set start block address */
2678 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2679 /* Set end block address */
5988af23 2680 this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
08f782b6
KP		 2681 /* Write lock command */
2682 this->command(mtd, cmd, 0, 0);
cd5f6346
KP		 2683
2684 /* There's no return value */
08f782b6 2685 this->wait(mtd, FL_LOCKING);
cd5f6346
KP		 2686
2687 /* Sanity check */
2688 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2689 & ONENAND_CTRL_ONGO)
2690 continue;
2691
2692 /* Check lock status */
2693 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
08f782b6 2694 if (!(status & wp_status_mask))
297758f8
AKS		 2695 printk(KERN_ERR "%s: wp status = 0x%x\n",
2696 __func__, status);
cd5f6346
KP		 2697
2698 return 0;
2699 }
2700
2701 /* Block lock scheme */
5988af23 2702 for (block = start; block < end + 1; block++) {
20ba89a3
KP		 2703 /* Set block address */
2704 value = onenand_block_address(this, block);
2705 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2706 /* Select DataRAM for DDP */
2707 value = onenand_bufferram_address(this, block);
2708 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
cd5f6346
KP		 2709 /* Set start block address */
2710 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
08f782b6
KP		 2711 /* Write lock command */
2712 this->command(mtd, cmd, 0, 0);
cd5f6346
KP		 2713
2714 /* There's no return value */
08f782b6 2715 this->wait(mtd, FL_LOCKING);
cd5f6346
KP		 2716
2717 /* Sanity check */
2718 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2719 & ONENAND_CTRL_ONGO)
2720 continue;
2721
cd5f6346
KP		 2722 /* Check lock status */
2723 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
08f782b6 2724 if (!(status & wp_status_mask))
297758f8
AKS		 2725 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2726 __func__, block, status);
cd5f6346 2727 }
d5c5e78a 2728
cd5f6346
KP		 2729 return 0;
2730}
2731
08f782b6
KP		 2732/**
2733 * onenand_lock - [MTD Interface] Lock block(s)
2734 * @param mtd MTD device structure
2735 * @param ofs offset relative to mtd start
2736 * @param len number of bytes to unlock
2737 *
2738 * Lock one or more blocks
2739 */
69423d99 2740static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
08f782b6 2741{
34627f0e
AH		 2742 int ret;
2743
2744 onenand_get_device(mtd, FL_LOCKING);
2745 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2746 onenand_release_device(mtd);
2747 return ret;
08f782b6
KP		 2748}
2749
08f782b6
KP		 2750/**
2751 * onenand_unlock - [MTD Interface] Unlock block(s)
2752 * @param mtd MTD device structure
2753 * @param ofs offset relative to mtd start
2754 * @param len number of bytes to unlock
2755 *
2756 * Unlock one or more blocks
2757 */
69423d99 2758static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
08f782b6 2759{
34627f0e
AH		 2760 int ret;
2761
2762 onenand_get_device(mtd, FL_LOCKING);
2763 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2764 onenand_release_device(mtd);
2765 return ret;
08f782b6
KP		 2766}
2767
28b79ff9
KP		 2768/**
2769 * onenand_check_lock_status - [OneNAND Interface] Check lock status
2770 * @param this onenand chip data structure
2771 *
2772 * Check lock status
2773 */
66a10506 2774static int onenand_check_lock_status(struct onenand_chip *this)
28b79ff9
KP		 2775{
2776 unsigned int value, block, status;
2777 unsigned int end;
2778
2779 end = this->chipsize >> this->erase_shift;
2780 for (block = 0; block < end; block++) {
2781 /* Set block address */
2782 value = onenand_block_address(this, block);
2783 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2784 /* Select DataRAM for DDP */
2785 value = onenand_bufferram_address(this, block);
2786 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2787 /* Set start block address */
2788 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2789
2790 /* Check lock status */
2791 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
66a10506 2792 if (!(status & ONENAND_WP_US)) {
297758f8
AKS		 2793 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2794 __func__, block, status);
66a10506
KP		 2795 return 0;
2796 }
28b79ff9 2797 }
66a10506
KP		 2798
2799 return 1;
28b79ff9
KP		 2800}
2801
2802/**
2803 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2804 * @param mtd MTD device structure
2805 *
2806 * Unlock all blocks
2807 */
66a10506 2808static void onenand_unlock_all(struct mtd_info *mtd)
28b79ff9
KP		 2809{
2810 struct onenand_chip *this = mtd->priv;
66a10506 2811 loff_t ofs = 0;
5988af23 2812 loff_t len = mtd->size;
28b79ff9
KP		 2813
2814 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
10b7a2bd
KP		 2815 /* Set start block address */
2816 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
28b79ff9
KP		 2817 /* Write unlock command */
2818 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2819
2820 /* There's no return value */
08f782b6 2821 this->wait(mtd, FL_LOCKING);
28b79ff9
KP		 2822
2823 /* Sanity check */
2824 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2825 & ONENAND_CTRL_ONGO)
2826 continue;
2827
31bb999e
KP		 2828 /* Don't check lock status */
2829 if (this->options & ONENAND_SKIP_UNLOCK_CHECK)
2830 return;
2831
66a10506
KP		 2832 /* Check lock status */
2833 if (onenand_check_lock_status(this))
2834 return;
2835
28b79ff9 2836 /* Workaround for all block unlock in DDP */
5988af23 2837 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
66a10506
KP		 2838 /* All blocks on another chip */
2839 ofs = this->chipsize >> 1;
2840 len = this->chipsize >> 1;
28b79ff9 2841 }
28b79ff9
KP		 2842 }
2843
66a10506 2844 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
28b79ff9
KP		 2845}
2846
493c6460
KP		 2847#ifdef CONFIG_MTD_ONENAND_OTP
2848
3cf60253
AKS		 2849/**
2850 * onenand_otp_command - Send OTP specific command to OneNAND device
2851 * @param mtd MTD device structure
2852 * @param cmd the command to be sent
2853 * @param addr offset to read from or write to
2854 * @param len number of bytes to read or write
2855 */
2856static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr,
2857 size_t len)
2858{
2859 struct onenand_chip *this = mtd->priv;
2860 int value, block, page;
2861
2862 /* Address translation */
2863 switch (cmd) {
2864 case ONENAND_CMD_OTP_ACCESS:
2865 block = (int) (addr >> this->erase_shift);
2866 page = -1;
2867 break;
2868
2869 default:
2870 block = (int) (addr >> this->erase_shift);
2871 page = (int) (addr >> this->page_shift);
2872
2873 if (ONENAND_IS_2PLANE(this)) {
2874 /* Make the even block number */
2875 block &= ~1;
2876 /* Is it the odd plane? */
2877 if (addr & this->writesize)
2878 block++;
2879 page >>= 1;
2880 }
2881 page &= this->page_mask;
2882 break;
2883 }
2884
2885 if (block != -1) {
2886 /* Write 'DFS, FBA' of Flash */
2887 value = onenand_block_address(this, block);
2888 this->write_word(value, this->base +
2889 ONENAND_REG_START_ADDRESS1);
2890 }
2891
2892 if (page != -1) {
2893 /* Now we use page size operation */
2894 int sectors = 4, count = 4;
2895 int dataram;
2896
2897 switch (cmd) {
2898 default:
2899 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
2900 cmd = ONENAND_CMD_2X_PROG;
2901 dataram = ONENAND_CURRENT_BUFFERRAM(this);
2902 break;
2903 }
2904
2905 /* Write 'FPA, FSA' of Flash */
2906 value = onenand_page_address(page, sectors);
2907 this->write_word(value, this->base +
2908 ONENAND_REG_START_ADDRESS8);
2909
2910 /* Write 'BSA, BSC' of DataRAM */
2911 value = onenand_buffer_address(dataram, sectors, count);
2912 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
2913 }
2914
2915 /* Interrupt clear */
2916 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
2917
2918 /* Write command */
2919 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
2920
2921 return 0;
2922}
2923
2924/**
7854d3f7 2925 * onenand_otp_write_oob_nolock - [INTERN] OneNAND write out-of-band, specific to OTP
3cf60253
AKS		 2926 * @param mtd MTD device structure
2927 * @param to offset to write to
2928 * @param len number of bytes to write
2929 * @param retlen pointer to variable to store the number of written bytes
2930 * @param buf the data to write
2931 *
2932 * OneNAND write out-of-band only for OTP
2933 */
2934static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2935 struct mtd_oob_ops *ops)
2936{
2937 struct onenand_chip *this = mtd->priv;
2938 int column, ret = 0, oobsize;
2939 int written = 0;
2940 u_char *oobbuf;
2941 size_t len = ops->ooblen;
2942 const u_char *buf = ops->oobbuf;
2943 int block, value, status;
2944
2945 to += ops->ooboffs;
2946
2947 /* Initialize retlen, in case of early exit */
2948 ops->oobretlen = 0;
2949
2950 oobsize = mtd->oobsize;
2951
2952 column = to & (mtd->oobsize - 1);
2953
2954 oobbuf = this->oob_buf;
2955
2956 /* Loop until all data write */
2957 while (written < len) {
2958 int thislen = min_t(int, oobsize, len - written);
2959
2960 cond_resched();
2961
2962 block = (int) (to >> this->erase_shift);
2963 /*
2964 * Write 'DFS, FBA' of Flash
2965 * Add: F100h DQ=DFS, FBA
2966 */
2967
2968 value = onenand_block_address(this, block);
2969 this->write_word(value, this->base +
2970 ONENAND_REG_START_ADDRESS1);
2971
2972 /*
2973 * Select DataRAM for DDP
2974 * Add: F101h DQ=DBS
2975 */
2976
2977 value = onenand_bufferram_address(this, block);
2978 this->write_word(value, this->base +
2979 ONENAND_REG_START_ADDRESS2);
2980 ONENAND_SET_NEXT_BUFFERRAM(this);
2981
2982 /*
2983 * Enter OTP access mode
2984 */
2985 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2986 this->wait(mtd, FL_OTPING);
2987
2988 /* We send data to spare ram with oobsize
2989 * to prevent byte access */
2990 memcpy(oobbuf + column, buf, thislen);
2991
2992 /*
2993 * Write Data into DataRAM
2994 * Add: 8th Word
2995 * in sector0/spare/page0
2996 * DQ=XXFCh
2997 */
2998 this->write_bufferram(mtd, ONENAND_SPARERAM,
2999 oobbuf, 0, mtd->oobsize);
3000
3001 onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
3002 onenand_update_bufferram(mtd, to, 0);
3003 if (ONENAND_IS_2PLANE(this)) {
3004 ONENAND_SET_BUFFERRAM1(this);
3005 onenand_update_bufferram(mtd, to + this->writesize, 0);
3006 }
3007
3008 ret = this->wait(mtd, FL_WRITING);
3009 if (ret) {
3010 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
3011 break;
3012 }
3013
3014 /* Exit OTP access mode */
3015 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3016 this->wait(mtd, FL_RESETING);
3017
3018 status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
3019 status &= 0x60;
3020
3021 if (status == 0x60) {
3022 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
3023 printk(KERN_DEBUG "1st Block\tLOCKED\n");
3024 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
3025 } else if (status == 0x20) {
3026 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
3027 printk(KERN_DEBUG "1st Block\tLOCKED\n");
3028 printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n");
3029 } else if (status == 0x40) {
3030 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
3031 printk(KERN_DEBUG "1st Block\tUN-LOCKED\n");
3032 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
3033 } else {
3034 printk(KERN_DEBUG "Reboot to check\n");
3035 }
3036
3037 written += thislen;
3038 if (written == len)
3039 break;
3040
3041 to += mtd->writesize;
3042 buf += thislen;
3043 column = 0;
3044 }
3045
3046 ops->oobretlen = written;
3047
3048 return ret;
3049}
3050
492e1501 3051/* Internal OTP operation */
493c6460
KP		 3052typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
3053 size_t *retlen, u_char *buf);
3054
3055/**
3056 * do_otp_read - [DEFAULT] Read OTP block area
3057 * @param mtd MTD device structure
3058 * @param from The offset to read
3059 * @param len number of bytes to read
3060 * @param retlen pointer to variable to store the number of readbytes
3061 * @param buf the databuffer to put/get data
3062 *
3063 * Read OTP block area.
3064 */
3065static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
3066 size_t *retlen, u_char *buf)
3067{
3068 struct onenand_chip *this = mtd->priv;
49dc08ee
AB		 3069 struct mtd_oob_ops ops = {
3070 .len = len,
3071 .ooblen = 0,
3072 .datbuf = buf,
3073 .oobbuf = NULL,
3074 };
493c6460
KP		 3075 int ret;
3076
3077 /* Enter OTP access mode */
3078 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3079 this->wait(mtd, FL_OTPING);
3080
8a8f632d 3081 ret = ONENAND_IS_4KB_PAGE(this) ?
5988af23
RH		 3082 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
3083 onenand_read_ops_nolock(mtd, from, &ops);
493c6460
KP		 3084
3085 /* Exit OTP access mode */
3086 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3087 this->wait(mtd, FL_RESETING);
3088
3089 return ret;
3090}
3091
3092/**
3093 * do_otp_write - [DEFAULT] Write OTP block area
3094 * @param mtd MTD device structure
49dc08ee 3095 * @param to The offset to write
493c6460
KP		 3096 * @param len number of bytes to write
3097 * @param retlen pointer to variable to store the number of write bytes
3098 * @param buf the databuffer to put/get data
3099 *
3100 * Write OTP block area.
3101 */
49dc08ee 3102static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
493c6460
KP		 3103 size_t *retlen, u_char *buf)
3104{
3105 struct onenand_chip *this = mtd->priv;
3106 unsigned char *pbuf = buf;
3107 int ret;
49dc08ee 3108 struct mtd_oob_ops ops;
493c6460
KP		 3109
3110 /* Force buffer page aligned */
28318776 3111 if (len < mtd->writesize) {
493c6460 3112 memcpy(this->page_buf, buf, len);
28318776 3113 memset(this->page_buf + len, 0xff, mtd->writesize - len);
493c6460 3114 pbuf = this->page_buf;
28318776 3115 len = mtd->writesize;
493c6460
KP		 3116 }
3117
3118 /* Enter OTP access mode */
3119 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3120 this->wait(mtd, FL_OTPING);
3121
49dc08ee
AB		 3122 ops.len = len;
3123 ops.ooblen = 0;
1437085c 3124 ops.datbuf = pbuf;
49dc08ee
AB		 3125 ops.oobbuf = NULL;
3126 ret = onenand_write_ops_nolock(mtd, to, &ops);
3127 *retlen = ops.retlen;
493c6460
KP		 3128
3129 /* Exit OTP access mode */
3130 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3131 this->wait(mtd, FL_RESETING);
3132
3133 return ret;
3134}
3135
3136/**
3137 * do_otp_lock - [DEFAULT] Lock OTP block area
3138 * @param mtd MTD device structure
3139 * @param from The offset to lock
3140 * @param len number of bytes to lock
3141 * @param retlen pointer to variable to store the number of lock bytes
3142 * @param buf the databuffer to put/get data
3143 *
3144 * Lock OTP block area.
3145 */
3146static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
3147 size_t *retlen, u_char *buf)
3148{
3149 struct onenand_chip *this = mtd->priv;
5988af23 3150 struct mtd_oob_ops ops;
493c6460
KP		 3151 int ret;
3152
5988af23 3153 if (FLEXONENAND(this)) {
3cf60253
AKS		 3154
3155 /* Enter OTP access mode */
3156 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3157 this->wait(mtd, FL_OTPING);
5988af23
RH		 3158 /*
3159 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3160 * main area of page 49.
3161 */
3162 ops.len = mtd->writesize;
3163 ops.ooblen = 0;
3164 ops.datbuf = buf;
3165 ops.oobbuf = NULL;
3166 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
3167 *retlen = ops.retlen;
3cf60253
AKS		 3168
3169 /* Exit OTP access mode */
3170 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3171 this->wait(mtd, FL_RESETING);
5988af23
RH		 3172 } else {
3173 ops.mode = MTD_OOB_PLACE;
3174 ops.ooblen = len;
3175 ops.oobbuf = buf;
3176 ops.ooboffs = 0;
3cf60253 3177 ret = onenand_otp_write_oob_nolock(mtd, from, &ops);
5988af23
RH		 3178 *retlen = ops.oobretlen;
3179 }
493c6460 3180
493c6460
KP		 3181 return ret;
3182}
3183
3184/**
3185 * onenand_otp_walk - [DEFAULT] Handle OTP operation
3186 * @param mtd MTD device structure
3187 * @param from The offset to read/write
3188 * @param len number of bytes to read/write
3189 * @param retlen pointer to variable to store the number of read bytes
3190 * @param buf the databuffer to put/get data
3191 * @param action do given action
3192 * @param mode specify user and factory
3193 *
3194 * Handle OTP operation.
3195 */
3196static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
3197 size_t *retlen, u_char *buf,
3198 otp_op_t action, int mode)
3199{
3200 struct onenand_chip *this = mtd->priv;
3201 int otp_pages;
3202 int density;
3203 int ret = 0;
3204
3205 *retlen = 0;
3206
e71f04fc 3207 density = onenand_get_density(this->device_id);
493c6460
KP		 3208 if (density < ONENAND_DEVICE_DENSITY_512Mb)
3209 otp_pages = 20;
3210 else
3cf60253 3211 otp_pages = 50;
493c6460
KP		 3212
3213 if (mode == MTD_OTP_FACTORY) {
28318776 3214 from += mtd->writesize * otp_pages;
3cf60253 3215 otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages;
493c6460
KP		 3216 }
3217
3218 /* Check User/Factory boundary */
3cf60253 3219 if (mode == MTD_OTP_USER) {
0a032a4d 3220 if (mtd->writesize * otp_pages < from + len)
3cf60253
AKS		 3221 return 0;
3222 } else {
0a032a4d 3223 if (mtd->writesize * otp_pages < len)
3cf60253
AKS		 3224 return 0;
3225 }
493c6460 3226
49dc08ee 3227 onenand_get_device(mtd, FL_OTPING);
493c6460
KP		 3228 while (len > 0 && otp_pages > 0) {
3229 if (!action) { /* OTP Info functions */
3230 struct otp_info *otpinfo;
3231
3232 len -= sizeof(struct otp_info);
49dc08ee
AB		 3233 if (len <= 0) {
3234 ret = -ENOSPC;
3235 break;
3236 }
493c6460
KP		 3237
3238 otpinfo = (struct otp_info *) buf;
3239 otpinfo->start = from;
28318776 3240 otpinfo->length = mtd->writesize;
493c6460
KP		 3241 otpinfo->locked = 0;
3242
28318776 3243 from += mtd->writesize;
493c6460
KP		 3244 buf += sizeof(struct otp_info);
3245 *retlen += sizeof(struct otp_info);
3246 } else {
3247 size_t tmp_retlen;
493c6460
KP		 3248
3249 ret = action(mtd, from, len, &tmp_retlen, buf);
3250
3cf60253
AKS		 3251 buf += tmp_retlen;
3252 len -= tmp_retlen;
3253 *retlen += tmp_retlen;
493c6460 3254
49dc08ee
AB		 3255 if (ret)
3256 break;
493c6460
KP		 3257 }
3258 otp_pages--;
3259 }
49dc08ee 3260 onenand_release_device(mtd);
493c6460 3261
49dc08ee 3262 return ret;
493c6460
KP		 3263}
3264
3265/**
3266 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
3267 * @param mtd MTD device structure
3268 * @param buf the databuffer to put/get data
3269 * @param len number of bytes to read
3270 *
3271 * Read factory OTP info.
3272 */
3273static int onenand_get_fact_prot_info(struct mtd_info *mtd,
3274 struct otp_info *buf, size_t len)
3275{
3276 size_t retlen;
3277 int ret;
3278
3279 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
3280
3281 return ret ? : retlen;
3282}
3283
3284/**
3285 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
3286 * @param mtd MTD device structure
3287 * @param from The offset to read
3288 * @param len number of bytes to read
3289 * @param retlen pointer to variable to store the number of read bytes
3290 * @param buf the databuffer to put/get data
3291 *
3292 * Read factory OTP area.
3293 */
3294static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
3295 size_t len, size_t *retlen, u_char *buf)
3296{
3297 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
3298}
3299
3300/**
3301 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
3302 * @param mtd MTD device structure
3303 * @param buf the databuffer to put/get data
3304 * @param len number of bytes to read
3305 *
3306 * Read user OTP info.
3307 */
3308static int onenand_get_user_prot_info(struct mtd_info *mtd,
3309 struct otp_info *buf, size_t len)
3310{
3311 size_t retlen;
3312 int ret;
3313
3314 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
3315
3316 return ret ? : retlen;
3317}
3318
3319/**
3320 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
3321 * @param mtd MTD device structure
3322 * @param from The offset to read
3323 * @param len number of bytes to read
3324 * @param retlen pointer to variable to store the number of read bytes
3325 * @param buf the databuffer to put/get data
3326 *
3327 * Read user OTP area.
3328 */
3329static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
3330 size_t len, size_t *retlen, u_char *buf)
3331{
3332 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
3333}
3334
3335/**
3336 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
3337 * @param mtd MTD device structure
3338 * @param from The offset to write
3339 * @param len number of bytes to write
3340 * @param retlen pointer to variable to store the number of write bytes
3341 * @param buf the databuffer to put/get data
3342 *
3343 * Write user OTP area.
3344 */
3345static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
3346 size_t len, size_t *retlen, u_char *buf)
3347{
3348 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
3349}
3350
3351/**
3352 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
3353 * @param mtd MTD device structure
3354 * @param from The offset to lock
3355 * @param len number of bytes to unlock
3356 *
3357 * Write lock mark on spare area in page 0 in OTP block
3358 */
3359static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
3360 size_t len)
3361{
69d79186 3362 struct onenand_chip *this = mtd->priv;
5988af23 3363 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
493c6460
KP		 3364 size_t retlen;
3365 int ret;
3cf60253 3366 unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET;
493c6460 3367
5988af23
RH		 3368 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
3369 : mtd->oobsize);
493c6460
KP		 3370 /*
3371 * Write lock mark to 8th word of sector0 of page0 of the spare0.
3372 * We write 16 bytes spare area instead of 2 bytes.
5988af23
RH		 3373 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3374 * main area of page 49.
493c6460 3375 */
5988af23 3376
493c6460 3377 from = 0;
5988af23 3378 len = FLEXONENAND(this) ? mtd->writesize : 16;
493c6460 3379
3cf60253
AKS		 3380 /*
3381 * Note: OTP lock operation
3382 * OTP block : 0xXXFC XX 1111 1100
3383 * 1st block : 0xXXF3 (If chip support) XX 1111 0011
3384 * Both : 0xXXF0 (If chip support) XX 1111 0000
3385 */
3386 if (FLEXONENAND(this))
3387 otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET;
3388
3389 /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */
3390 if (otp == 1)
3391 buf[otp_lock_offset] = 0xFC;
3392 else if (otp == 2)
3393 buf[otp_lock_offset] = 0xF3;
3394 else if (otp == 3)
3395 buf[otp_lock_offset] = 0xF0;
3396 else if (otp != 0)
3397 printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n");
3398
5988af23 3399 ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER);
493c6460
KP		 3400
3401 return ret ? : retlen;
3402}
3cf60253 3403
493c6460
KP		 3404#endif /* CONFIG_MTD_ONENAND_OTP */
3405
28b79ff9 3406/**
75384b0d 3407 * onenand_check_features - Check and set OneNAND features
28b79ff9
KP		 3408 * @param mtd MTD data structure
3409 *
75384b0d
KP		 3410 * Check and set OneNAND features
3411 * - lock scheme
ee9745fc 3412 * - two plane
28b79ff9 3413 */
75384b0d 3414static void onenand_check_features(struct mtd_info *mtd)
28b79ff9
KP		 3415{
3416 struct onenand_chip *this = mtd->priv;
edb44b9b 3417 unsigned int density, process, numbufs;
28b79ff9
KP		 3418
3419 /* Lock scheme depends on density and process */
e71f04fc 3420 density = onenand_get_density(this->device_id);
28b79ff9 3421 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
edb44b9b 3422 numbufs = this->read_word(this->base + ONENAND_REG_NUM_BUFFERS) >> 8;
28b79ff9
KP		 3423
3424 /* Lock scheme */
ee9745fc
KP		 3425 switch (density) {
3426 case ONENAND_DEVICE_DENSITY_4Gb:
6a88c47b
KP		 3427 if (ONENAND_IS_DDP(this))
3428 this->options |= ONENAND_HAS_2PLANE;
ac80dac0 3429 else if (numbufs == 1) {
6a88c47b 3430 this->options |= ONENAND_HAS_4KB_PAGE;
ac80dac0 3431 this->options |= ONENAND_HAS_CACHE_PROGRAM;
e1c10243
KP		 3432 /*
3433 * There are two different 4KiB pagesize chips
3434 * and no way to detect it by H/W config values.
3435 *
3436 * To detect the correct NOP for each chips,
3437 * It should check the version ID as workaround.
3438 *
3439 * Now it has as following
3440 * KFM4G16Q4M has NOP 4 with version ID 0x0131
3441 * KFM4G16Q5M has NOP 1 with versoin ID 0x013e
3442 */
3443 if ((this->version_id & 0xf) == 0xe)
3444 this->options |= ONENAND_HAS_NOP_1;
ac80dac0 3445 }
ee9745fc
KP		 3446
3447 case ONENAND_DEVICE_DENSITY_2Gb:
492e1501 3448 /* 2Gb DDP does not have 2 plane */
ee9745fc
KP		 3449 if (!ONENAND_IS_DDP(this))
3450 this->options |= ONENAND_HAS_2PLANE;
3451 this->options |= ONENAND_HAS_UNLOCK_ALL;
3452
3453 case ONENAND_DEVICE_DENSITY_1Gb:
28b79ff9 3454 /* A-Die has all block unlock */
ee9745fc 3455 if (process)
28b79ff9 3456 this->options |= ONENAND_HAS_UNLOCK_ALL;
ee9745fc
KP		 3457 break;
3458
3459 default:
3460 /* Some OneNAND has continuous lock scheme */
3461 if (!process)
28b79ff9 3462 this->options |= ONENAND_HAS_CONT_LOCK;
ee9745fc 3463 break;
28b79ff9 3464 }
ee9745fc 3465
8a8f632d
KP		 3466 /* The MLC has 4KiB pagesize. */
3467 if (ONENAND_IS_MLC(this))
3468 this->options |= ONENAND_HAS_4KB_PAGE;
3469
3470 if (ONENAND_IS_4KB_PAGE(this))
5988af23
RH		 3471 this->options &= ~ONENAND_HAS_2PLANE;
3472
3473 if (FLEXONENAND(this)) {
3474 this->options &= ~ONENAND_HAS_CONT_LOCK;
3475 this->options |= ONENAND_HAS_UNLOCK_ALL;
3476 }
3477
ee9745fc
KP		 3478 if (this->options & ONENAND_HAS_CONT_LOCK)
3479 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
3480 if (this->options & ONENAND_HAS_UNLOCK_ALL)
3481 printk(KERN_DEBUG "Chip support all block unlock\n");
3482 if (this->options & ONENAND_HAS_2PLANE)
3483 printk(KERN_DEBUG "Chip has 2 plane\n");
6a88c47b
KP		 3484 if (this->options & ONENAND_HAS_4KB_PAGE)
3485 printk(KERN_DEBUG "Chip has 4KiB pagesize\n");
ac80dac0
RT		 3486 if (this->options & ONENAND_HAS_CACHE_PROGRAM)
3487 printk(KERN_DEBUG "Chip has cache program feature\n");
28b79ff9
KP		 3488}
3489
cd5f6346 3490/**
e3da8067 3491 * onenand_print_device_info - Print device & version ID
cd5f6346 3492 * @param device device ID
e3da8067 3493 * @param version version ID
cd5f6346 3494 *
e3da8067 3495 * Print device & version ID
cd5f6346 3496 */
28b79ff9 3497static void onenand_print_device_info(int device, int version)
cd5f6346 3498{
5988af23 3499 int vcc, demuxed, ddp, density, flexonenand;
cd5f6346
KP		 3500
3501 vcc = device & ONENAND_DEVICE_VCC_MASK;
3502 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
3503 ddp = device & ONENAND_DEVICE_IS_DDP;
e71f04fc 3504 density = onenand_get_density(device);
5988af23
RH		 3505 flexonenand = device & DEVICE_IS_FLEXONENAND;
3506 printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
3507 demuxed ? "" : "Muxed ",
3508 flexonenand ? "Flex-" : "",
cd5f6346
KP		 3509 ddp ? "(DDP)" : "",
3510 (16 << density),
3511 vcc ? "2.65/3.3" : "1.8",
3512 device);
49dc08ee 3513 printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
cd5f6346
KP		 3514}
3515
3516static const struct onenand_manufacturers onenand_manuf_ids[] = {
3517 {ONENAND_MFR_SAMSUNG, "Samsung"},
ee8f3768 3518 {ONENAND_MFR_NUMONYX, "Numonyx"},
cd5f6346
KP		 3519};
3520
3521/**
3522 * onenand_check_maf - Check manufacturer ID
3523 * @param manuf manufacturer ID
3524 *
3525 * Check manufacturer ID
3526 */
3527static int onenand_check_maf(int manuf)
3528{
37b1cc39
KP		 3529 int size = ARRAY_SIZE(onenand_manuf_ids);
3530 char *name;
cd5f6346
KP		 3531 int i;
3532
37b1cc39 3533 for (i = 0; i < size; i++)
cd5f6346
KP		 3534 if (manuf == onenand_manuf_ids[i].id)
3535 break;
cd5f6346 3536
37b1cc39
KP		 3537 if (i < size)
3538 name = onenand_manuf_ids[i].name;
3539 else
3540 name = "Unknown";
3541
3542 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
cd5f6346 3543
37b1cc39 3544 return (i == size);
cd5f6346
KP		 3545}
3546
5988af23
RH		 3547/**
3548* flexonenand_get_boundary - Reads the SLC boundary
3549* @param onenand_info - onenand info structure
3550**/
3551static int flexonenand_get_boundary(struct mtd_info *mtd)
3552{
3553 struct onenand_chip *this = mtd->priv;
3554 unsigned die, bdry;
3555 int ret, syscfg, locked;
3556
3557 /* Disable ECC */
3558 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3559 this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1);
3560
3561 for (die = 0; die < this->dies; die++) {
3562 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3563 this->wait(mtd, FL_SYNCING);
3564
3565 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3566 ret = this->wait(mtd, FL_READING);
3567
3568 bdry = this->read_word(this->base + ONENAND_DATARAM);
3569 if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3)
3570 locked = 0;
3571 else
3572 locked = 1;
3573 this->boundary[die] = bdry & FLEXONENAND_PI_MASK;
3574
3575 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3576 ret = this->wait(mtd, FL_RESETING);
3577
3578 printk(KERN_INFO "Die %d boundary: %d%s\n", die,
3579 this->boundary[die], locked ? "(Locked)" : "(Unlocked)");
3580 }
3581
3582 /* Enable ECC */
3583 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3584 return 0;
3585}
3586
3587/**
3588 * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info
3589 * boundary[], diesize[], mtd->size, mtd->erasesize
3590 * @param mtd - MTD device structure
3591 */
3592static void flexonenand_get_size(struct mtd_info *mtd)
3593{
3594 struct onenand_chip *this = mtd->priv;
3595 int die, i, eraseshift, density;
3596 int blksperdie, maxbdry;
3597 loff_t ofs;
3598
3599 density = onenand_get_density(this->device_id);
3600 blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift);
3601 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3602 maxbdry = blksperdie - 1;
3603 eraseshift = this->erase_shift - 1;
3604
3605 mtd->numeraseregions = this->dies << 1;
3606
3607 /* This fills up the device boundary */
3608 flexonenand_get_boundary(mtd);
3609 die = ofs = 0;
3610 i = -1;
3611 for (; die < this->dies; die++) {
3612 if (!die || this->boundary[die-1] != maxbdry) {
3613 i++;
3614 mtd->eraseregions[i].offset = ofs;
3615 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3616 mtd->eraseregions[i].numblocks =
3617 this->boundary[die] + 1;
3618 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3619 eraseshift++;
3620 } else {
3621 mtd->numeraseregions -= 1;
3622 mtd->eraseregions[i].numblocks +=
3623 this->boundary[die] + 1;
3624 ofs += (this->boundary[die] + 1) << (eraseshift - 1);
3625 }
3626 if (this->boundary[die] != maxbdry) {
3627 i++;
3628 mtd->eraseregions[i].offset = ofs;
3629 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3630 mtd->eraseregions[i].numblocks = maxbdry ^
3631 this->boundary[die];
3632 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3633 eraseshift--;
3634 } else
3635 mtd->numeraseregions -= 1;
3636 }
3637
3638 /* Expose MLC erase size except when all blocks are SLC */
3639 mtd->erasesize = 1 << this->erase_shift;
3640 if (mtd->numeraseregions == 1)
3641 mtd->erasesize >>= 1;
3642
3643 printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions);
3644 for (i = 0; i < mtd->numeraseregions; i++)
3645 printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x,"
3646 " numblocks: %04u]\n",
3647 (unsigned int) mtd->eraseregions[i].offset,
3648 mtd->eraseregions[i].erasesize,
3649 mtd->eraseregions[i].numblocks);
3650
3651 for (die = 0, mtd->size = 0; die < this->dies; die++) {
3652 this->diesize[die] = (loff_t)blksperdie << this->erase_shift;
3653 this->diesize[die] -= (loff_t)(this->boundary[die] + 1)
3654 << (this->erase_shift - 1);
3655 mtd->size += this->diesize[die];
3656 }
3657}
3658
3659/**
3660 * flexonenand_check_blocks_erased - Check if blocks are erased
3661 * @param mtd_info - mtd info structure
3662 * @param start - first erase block to check
3663 * @param end - last erase block to check
3664 *
3665 * Converting an unerased block from MLC to SLC
3666 * causes byte values to change. Since both data and its ECC
3667 * have changed, reads on the block give uncorrectable error.
3668 * This might lead to the block being detected as bad.
3669 *
3670 * Avoid this by ensuring that the block to be converted is
3671 * erased.
3672 */
3673static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end)
3674{
3675 struct onenand_chip *this = mtd->priv;
3676 int i, ret;
3677 int block;
3678 struct mtd_oob_ops ops = {
3679 .mode = MTD_OOB_PLACE,
3680 .ooboffs = 0,
3681 .ooblen = mtd->oobsize,
3682 .datbuf = NULL,
3683 .oobbuf = this->oob_buf,
3684 };
3685 loff_t addr;
3686
3687 printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end);
3688
3689 for (block = start; block <= end; block++) {
3690 addr = flexonenand_addr(this, block);
3691 if (onenand_block_isbad_nolock(mtd, addr, 0))
3692 continue;
3693
3694 /*
3695 * Since main area write results in ECC write to spare,
3696 * it is sufficient to check only ECC bytes for change.
3697 */
3698 ret = onenand_read_oob_nolock(mtd, addr, &ops);
3699 if (ret)
3700 return ret;
3701
3702 for (i = 0; i < mtd->oobsize; i++)
3703 if (this->oob_buf[i] != 0xff)
3704 break;
3705
3706 if (i != mtd->oobsize) {
297758f8
AKS		 3707 printk(KERN_WARNING "%s: Block %d not erased.\n",
3708 __func__, block);
5988af23
RH		 3709 return 1;
3710 }
3711 }
3712
3713 return 0;
3714}
3715
3716/**
3717 * flexonenand_set_boundary - Writes the SLC boundary
3718 * @param mtd - mtd info structure
3719 */
3720int flexonenand_set_boundary(struct mtd_info *mtd, int die,
3721 int boundary, int lock)
3722{
3723 struct onenand_chip *this = mtd->priv;
3724 int ret, density, blksperdie, old, new, thisboundary;
3725 loff_t addr;
3726
3727 /* Change only once for SDP Flex-OneNAND */
3728 if (die && (!ONENAND_IS_DDP(this)))
3729 return 0;
3730
3731 /* boundary value of -1 indicates no required change */
3732 if (boundary < 0 || boundary == this->boundary[die])
3733 return 0;
3734
3735 density = onenand_get_density(this->device_id);
3736 blksperdie = ((16 << density) << 20) >> this->erase_shift;
3737 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3738
3739 if (boundary >= blksperdie) {
297758f8
AKS		 3740 printk(KERN_ERR "%s: Invalid boundary value. "
3741 "Boundary not changed.\n", __func__);
5988af23
RH		 3742 return -EINVAL;
3743 }
3744
3745 /* Check if converting blocks are erased */
3746 old = this->boundary[die] + (die * this->density_mask);
3747 new = boundary + (die * this->density_mask);
3748 ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new));
3749 if (ret) {
297758f8
AKS		 3750 printk(KERN_ERR "%s: Please erase blocks "
3751 "before boundary change\n", __func__);
5988af23
RH		 3752 return ret;
3753 }
3754
3755 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3756 this->wait(mtd, FL_SYNCING);
3757
3758 /* Check is boundary is locked */
3759 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3760 ret = this->wait(mtd, FL_READING);
3761
3762 thisboundary = this->read_word(this->base + ONENAND_DATARAM);
3763 if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
297758f8 3764 printk(KERN_ERR "%s: boundary locked\n", __func__);
5988af23
RH		 3765 ret = 1;
3766 goto out;
3767 }
3768
297758f8 3769 printk(KERN_INFO "Changing die %d boundary: %d%s\n",
5988af23
RH		 3770 die, boundary, lock ? "(Locked)" : "(Unlocked)");
3771
3772 addr = die ? this->diesize[0] : 0;
3773
3774 boundary &= FLEXONENAND_PI_MASK;
3775 boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT);
3776
3777 this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
3778 ret = this->wait(mtd, FL_ERASING);
3779 if (ret) {
f369c7ec
MK		 3780 printk(KERN_ERR "%s: Failed PI erase for Die %d\n",
3781 __func__, die);
5988af23
RH		 3782 goto out;
3783 }
3784
3785 this->write_word(boundary, this->base + ONENAND_DATARAM);
3786 this->command(mtd, ONENAND_CMD_PROG, addr, 0);
3787 ret = this->wait(mtd, FL_WRITING);
3788 if (ret) {
297758f8
AKS		 3789 printk(KERN_ERR "%s: Failed PI write for Die %d\n",
3790 __func__, die);
5988af23
RH		 3791 goto out;
3792 }
3793
3794 this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0);
3795 ret = this->wait(mtd, FL_WRITING);
3796out:
3797 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND);
3798 this->wait(mtd, FL_RESETING);
3799 if (!ret)
3800 /* Recalculate device size on boundary change*/
3801 flexonenand_get_size(mtd);
3802
3803 return ret;
3804}
3805
cd5f6346 3806/**
ad0d363b 3807 * onenand_chip_probe - [OneNAND Interface] The generic chip probe
cd5f6346
KP		 3808 * @param mtd MTD device structure
3809 *
3810 * OneNAND detection method:
59c51591 3811 * Compare the values from command with ones from register
cd5f6346 3812 */
ad0d363b 3813static int onenand_chip_probe(struct mtd_info *mtd)
cd5f6346
KP		 3814{
3815 struct onenand_chip *this = mtd->priv;
ad0d363b 3816 int bram_maf_id, bram_dev_id, maf_id, dev_id;
47e777e0
KP		 3817 int syscfg;
3818
3819 /* Save system configuration 1 */
3820 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3821 /* Clear Sync. Burst Read mode to read BootRAM */
ee8f3768 3822 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1);
cd5f6346
KP		 3823
3824 /* Send the command for reading device ID from BootRAM */
3825 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
3826
3827 /* Read manufacturer and device IDs from BootRAM */
3828 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
3829 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
3830
47e777e0
KP		 3831 /* Reset OneNAND to read default register values */
3832 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
3833 /* Wait reset */
3834 this->wait(mtd, FL_RESETING);
3835
3836 /* Restore system configuration 1 */
3837 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3838
cd5f6346
KP		 3839 /* Check manufacturer ID */
3840 if (onenand_check_maf(bram_maf_id))
3841 return -ENXIO;
3842
cd5f6346
KP		 3843 /* Read manufacturer and device IDs from Register */
3844 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
3845 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3846
3847 /* Check OneNAND device */
3848 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
3849 return -ENXIO;
3850
ad0d363b
KP		 3851 return 0;
3852}
3853
3854/**
3855 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
3856 * @param mtd MTD device structure
3857 */
3858static int onenand_probe(struct mtd_info *mtd)
3859{
3860 struct onenand_chip *this = mtd->priv;
3861 int maf_id, dev_id, ver_id;
3862 int density;
3863 int ret;
3864
3865 ret = this->chip_probe(mtd);
3866 if (ret)
3867 return ret;
3868
3869 /* Read manufacturer and device IDs from Register */
3870 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
3871 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3872 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
3873 this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY);
3874
cd5f6346 3875 /* Flash device information */
28b79ff9 3876 onenand_print_device_info(dev_id, ver_id);
cd5f6346 3877 this->device_id = dev_id;
28b79ff9 3878 this->version_id = ver_id;
cd5f6346 3879
c37cb56f
KP		 3880 /* Check OneNAND features */
3881 onenand_check_features(mtd);
3882
e71f04fc 3883 density = onenand_get_density(dev_id);
5988af23
RH		 3884 if (FLEXONENAND(this)) {
3885 this->dies = ONENAND_IS_DDP(this) ? 2 : 1;
3886 /* Maximum possible erase regions */
3887 mtd->numeraseregions = this->dies << 1;
3888 mtd->eraseregions = kzalloc(sizeof(struct mtd_erase_region_info)
3889 * (this->dies << 1), GFP_KERNEL);
3890 if (!mtd->eraseregions)
3891 return -ENOMEM;
3892 }
3893
3894 /*
3895 * For Flex-OneNAND, chipsize represents maximum possible device size.
3896 * mtd->size represents the actual device size.
3897 */
cd5f6346
KP		 3898 this->chipsize = (16 << density) << 20;
3899
3900 /* OneNAND page size & block size */
3901 /* The data buffer size is equal to page size */
28318776 3902 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
5988af23 3903 /* We use the full BufferRAM */
8a8f632d 3904 if (ONENAND_IS_4KB_PAGE(this))
5988af23
RH		 3905 mtd->writesize <<= 1;
3906
28318776 3907 mtd->oobsize = mtd->writesize >> 5;
9bfbc9b2 3908 /* Pages per a block are always 64 in OneNAND */
28318776 3909 mtd->erasesize = mtd->writesize << 6;
5988af23
RH		 3910 /*
3911 * Flex-OneNAND SLC area has 64 pages per block.
3912 * Flex-OneNAND MLC area has 128 pages per block.
3913 * Expose MLC erase size to find erase_shift and page_mask.
3914 */
3915 if (FLEXONENAND(this))
3916 mtd->erasesize <<= 1;
cd5f6346
KP		 3917
3918 this->erase_shift = ffs(mtd->erasesize) - 1;
28318776 3919 this->page_shift = ffs(mtd->writesize) - 1;
9bfbc9b2 3920 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
5988af23
RH		 3921 /* Set density mask. it is used for DDP */
3922 if (ONENAND_IS_DDP(this))
3923 this->density_mask = this->chipsize >> (this->erase_shift + 1);
ee9745fc
KP		 3924 /* It's real page size */
3925 this->writesize = mtd->writesize;
cd5f6346 3926
492e1501 3927 /* REVISIT: Multichip handling */
cd5f6346 3928
5988af23
RH		 3929 if (FLEXONENAND(this))
3930 flexonenand_get_size(mtd);
3931 else
3932 mtd->size = this->chipsize;
cd5f6346 3933
ee9745fc
KP		 3934 /*
3935 * We emulate the 4KiB page and 256KiB erase block size
3936 * But oobsize is still 64 bytes.
3937 * It is only valid if you turn on 2X program support,
3938 * Otherwise it will be ignored by compiler.
3939 */
3940 if (ONENAND_IS_2PLANE(this)) {
3941 mtd->writesize <<= 1;
3942 mtd->erasesize <<= 1;
3943 }
3944
cd5f6346
KP		 3945 return 0;
3946}
3947
a41371eb
KP		 3948/**
3949 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
3950 * @param mtd MTD device structure
3951 */
3952static int onenand_suspend(struct mtd_info *mtd)
3953{
3954 return onenand_get_device(mtd, FL_PM_SUSPENDED);
3955}
3956
3957/**
3958 * onenand_resume - [MTD Interface] Resume the OneNAND flash
3959 * @param mtd MTD device structure
3960 */
3961static void onenand_resume(struct mtd_info *mtd)
3962{
3963 struct onenand_chip *this = mtd->priv;
3964
3965 if (this->state == FL_PM_SUSPENDED)
3966 onenand_release_device(mtd);
3967 else
297758f8
AKS		 3968 printk(KERN_ERR "%s: resume() called for the chip which is not "
3969 "in suspended state\n", __func__);
a41371eb
KP		 3970}
3971
cd5f6346
KP		 3972/**
3973 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
3974 * @param mtd MTD device structure
3975 * @param maxchips Number of chips to scan for
3976 *
3977 * This fills out all the not initialized function pointers
3978 * with the defaults.
3979 * The flash ID is read and the mtd/chip structures are
3980 * filled with the appropriate values.
3981 */
3982int onenand_scan(struct mtd_info *mtd, int maxchips)
3983{
5988af23 3984 int i, ret;
cd5f6346
KP		 3985 struct onenand_chip *this = mtd->priv;
3986
3987 if (!this->read_word)
3988 this->read_word = onenand_readw;
3989 if (!this->write_word)
3990 this->write_word = onenand_writew;
3991
3992 if (!this->command)
3993 this->command = onenand_command;
3994 if (!this->wait)
2c22120f 3995 onenand_setup_wait(mtd);
31bb999e
KP		 3996 if (!this->bbt_wait)
3997 this->bbt_wait = onenand_bbt_wait;
3998 if (!this->unlock_all)
3999 this->unlock_all = onenand_unlock_all;
cd5f6346 4000
ad0d363b
KP		 4001 if (!this->chip_probe)
4002 this->chip_probe = onenand_chip_probe;
4003
cd5f6346
KP		 4004 if (!this->read_bufferram)
4005 this->read_bufferram = onenand_read_bufferram;
4006 if (!this->write_bufferram)
4007 this->write_bufferram = onenand_write_bufferram;
4008
cdc00130
KP		 4009 if (!this->block_markbad)
4010 this->block_markbad = onenand_default_block_markbad;
4011 if (!this->scan_bbt)
4012 this->scan_bbt = onenand_default_bbt;
4013
cd5f6346
KP		 4014 if (onenand_probe(mtd))
4015 return -ENXIO;
4016
52b0eea7
KP		 4017 /* Set Sync. Burst Read after probing */
4018 if (this->mmcontrol) {
4019 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
4020 this->read_bufferram = onenand_sync_read_bufferram;
4021 }
4022
532a37cf
KP		 4023 /* Allocate buffers, if necessary */
4024 if (!this->page_buf) {
470bc844 4025 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
532a37cf 4026 if (!this->page_buf) {
297758f8
AKS		 4027 printk(KERN_ERR "%s: Can't allocate page_buf\n",
4028 __func__);
532a37cf
KP		 4029 return -ENOMEM;
4030 }
4a8ce0b0
KP		 4031#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
4032 this->verify_buf = kzalloc(mtd->writesize, GFP_KERNEL);
4033 if (!this->verify_buf) {
4034 kfree(this->page_buf);
4035 return -ENOMEM;
4036 }
4037#endif
532a37cf
KP		 4038 this->options |= ONENAND_PAGEBUF_ALLOC;
4039 }
470bc844
KP		 4040 if (!this->oob_buf) {
4041 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
4042 if (!this->oob_buf) {
297758f8
AKS		 4043 printk(KERN_ERR "%s: Can't allocate oob_buf\n",
4044 __func__);
470bc844
KP		 4045 if (this->options & ONENAND_PAGEBUF_ALLOC) {
4046 this->options &= ~ONENAND_PAGEBUF_ALLOC;
4047 kfree(this->page_buf);
4048 }
4049 return -ENOMEM;
4050 }
4051 this->options |= ONENAND_OOBBUF_ALLOC;
4052 }
532a37cf 4053
cd5f6346
KP		 4054 this->state = FL_READY;
4055 init_waitqueue_head(&this->wq);
4056 spin_lock_init(&this->chip_lock);
4057
60d84f97
KP		 4058 /*
4059 * Allow subpage writes up to oobsize.
4060 */
cd5f6346 4061 switch (mtd->oobsize) {
5988af23 4062 case 128:
99b17c08
RT		 4063 if (FLEXONENAND(this)) {
4064 this->ecclayout = &flexonenand_oob_128;
4065 mtd->subpage_sft = 0;
4066 } else {
4067 this->ecclayout = &onenand_oob_128;
4068 mtd->subpage_sft = 2;
4069 }
e1c10243
KP		 4070 if (ONENAND_IS_NOP_1(this))
4071 mtd->subpage_sft = 0;
5988af23 4072 break;
cd5f6346 4073 case 64:
5bd34c09 4074 this->ecclayout = &onenand_oob_64;
60d84f97 4075 mtd->subpage_sft = 2;
cd5f6346
KP		 4076 break;
4077
4078 case 32:
5bd34c09 4079 this->ecclayout = &onenand_oob_32;
60d84f97 4080 mtd->subpage_sft = 1;
cd5f6346
KP		 4081 break;
4082
4083 default:
297758f8
AKS		 4084 printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n",
4085 __func__, mtd->oobsize);
60d84f97 4086 mtd->subpage_sft = 0;
cd5f6346 4087 /* To prevent kernel oops */
5bd34c09 4088 this->ecclayout = &onenand_oob_32;
cd5f6346
KP		 4089 break;
4090 }
4091
60d84f97 4092 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
a5e7c7b4
AH		 4093
4094 /*
4095 * The number of bytes available for a client to place data into
4096 * the out of band area
4097 */
4098 this->ecclayout->oobavail = 0;
ad286343
KP		 4099 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
4100 this->ecclayout->oobfree[i].length; i++)
a5e7c7b4
AH		 4101 this->ecclayout->oobavail +=
4102 this->ecclayout->oobfree[i].length;
1f92267c 4103 mtd->oobavail = this->ecclayout->oobavail;
a5e7c7b4 4104
5bd34c09 4105 mtd->ecclayout = this->ecclayout;
d5c5e78a 4106
cd5f6346 4107 /* Fill in remaining MTD driver data */
c7626802 4108 mtd->type = ONENAND_IS_MLC(this) ? MTD_MLCNANDFLASH : MTD_NANDFLASH;
5fa43394 4109 mtd->flags = MTD_CAP_NANDFLASH;
cd5f6346
KP		 4110 mtd->erase = onenand_erase;
4111 mtd->point = NULL;
4112 mtd->unpoint = NULL;
4113 mtd->read = onenand_read;
4114 mtd->write = onenand_write;
cd5f6346
KP		 4115 mtd->read_oob = onenand_read_oob;
4116 mtd->write_oob = onenand_write_oob;
6c77fd64 4117 mtd->panic_write = onenand_panic_write;
493c6460
KP		 4118#ifdef CONFIG_MTD_ONENAND_OTP
4119 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
4120 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
4121 mtd->get_user_prot_info = onenand_get_user_prot_info;
4122 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
4123 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
4124 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
4125#endif
cd5f6346 4126 mtd->sync = onenand_sync;
08f782b6 4127 mtd->lock = onenand_lock;
cd5f6346 4128 mtd->unlock = onenand_unlock;
a41371eb
KP		 4129 mtd->suspend = onenand_suspend;
4130 mtd->resume = onenand_resume;
cd5f6346
KP		 4131 mtd->block_isbad = onenand_block_isbad;
4132 mtd->block_markbad = onenand_block_markbad;
4133 mtd->owner = THIS_MODULE;
25dcd297 4134 mtd->writebufsize = mtd->writesize;
cd5f6346
KP		 4135
4136 /* Unlock whole block */
b3dcfd35
RT		 4137 if (!(this->options & ONENAND_SKIP_INITIAL_UNLOCKING))
4138 this->unlock_all(mtd);
cd5f6346 4139
5988af23
RH		 4140 ret = this->scan_bbt(mtd);
4141 if ((!FLEXONENAND(this)) || ret)
4142 return ret;
4143
4144 /* Change Flex-OneNAND boundaries if required */
4145 for (i = 0; i < MAX_DIES; i++)
4146 flexonenand_set_boundary(mtd, i, flex_bdry[2 * i],
4147 flex_bdry[(2 * i) + 1]);
4148
4149 return 0;
cd5f6346
KP		 4150}
4151
4152/**
4153 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
4154 * @param mtd MTD device structure
4155 */
4156void onenand_release(struct mtd_info *mtd)
4157{
532a37cf
KP		 4158 struct onenand_chip *this = mtd->priv;
4159
cd5f6346 4160 /* Deregister partitions */
711a632d 4161 mtd_device_unregister(mtd);
532a37cf
KP		 4162
4163 /* Free bad block table memory, if allocated */
f00b0046
AH		 4164 if (this->bbm) {
4165 struct bbm_info *bbm = this->bbm;
4166 kfree(bbm->bbt);
532a37cf 4167 kfree(this->bbm);
f00b0046 4168 }
470bc844 4169 /* Buffers allocated by onenand_scan */
4a8ce0b0 4170 if (this->options & ONENAND_PAGEBUF_ALLOC) {
532a37cf 4171 kfree(this->page_buf);
4a8ce0b0
KP		 4172#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
4173 kfree(this->verify_buf);
4174#endif
4175 }
470bc844
KP		 4176 if (this->options & ONENAND_OOBBUF_ALLOC)
4177 kfree(this->oob_buf);
5988af23 4178 kfree(mtd->eraseregions);
cd5f6346
KP		 4179}
4180
4181EXPORT_SYMBOL_GPL(onenand_scan);
4182EXPORT_SYMBOL_GPL(onenand_release);
4183
4184MODULE_LICENSE("GPL");
4185MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
4186MODULE_DESCRIPTION("Generic OneNAND flash driver code");
Linux kernel - Deliverables
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