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cd5f6346 KP |
1 | /* |
2 | * linux/drivers/mtd/onenand/onenand_base.c | |
3 | * | |
4 | * Copyright (C) 2005 Samsung Electronics | |
5 | * Kyungmin Park <kyungmin.park@samsung.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/kernel.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/init.h> | |
015953d7 AM |
15 | #include <linux/sched.h> |
16 | #include <linux/jiffies.h> | |
cd5f6346 KP |
17 | #include <linux/mtd/mtd.h> |
18 | #include <linux/mtd/onenand.h> | |
19 | #include <linux/mtd/partitions.h> | |
20 | ||
21 | #include <asm/io.h> | |
22 | ||
23 | /** | |
24 | * onenand_oob_64 - oob info for large (2KB) page | |
25 | */ | |
26 | static struct nand_oobinfo onenand_oob_64 = { | |
27 | .useecc = MTD_NANDECC_AUTOPLACE, | |
28 | .eccbytes = 20, | |
29 | .eccpos = { | |
30 | 8, 9, 10, 11, 12, | |
31 | 24, 25, 26, 27, 28, | |
32 | 40, 41, 42, 43, 44, | |
33 | 56, 57, 58, 59, 60, | |
34 | }, | |
35 | .oobfree = { | |
36 | {2, 3}, {14, 2}, {18, 3}, {30, 2}, | |
d9777f1c JL |
37 | {34, 3}, {46, 2}, {50, 3}, {62, 2} |
38 | } | |
cd5f6346 KP |
39 | }; |
40 | ||
41 | /** | |
42 | * onenand_oob_32 - oob info for middle (1KB) page | |
43 | */ | |
44 | static struct nand_oobinfo onenand_oob_32 = { | |
45 | .useecc = MTD_NANDECC_AUTOPLACE, | |
46 | .eccbytes = 10, | |
47 | .eccpos = { | |
48 | 8, 9, 10, 11, 12, | |
49 | 24, 25, 26, 27, 28, | |
50 | }, | |
51 | .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} } | |
52 | }; | |
53 | ||
54 | static const unsigned char ffchars[] = { | |
55 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
56 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ | |
57 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
58 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */ | |
59 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
60 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */ | |
61 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
62 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */ | |
63 | }; | |
64 | ||
65 | /** | |
66 | * onenand_readw - [OneNAND Interface] Read OneNAND register | |
67 | * @param addr address to read | |
68 | * | |
69 | * Read OneNAND register | |
70 | */ | |
71 | static unsigned short onenand_readw(void __iomem *addr) | |
72 | { | |
73 | return readw(addr); | |
74 | } | |
75 | ||
76 | /** | |
77 | * onenand_writew - [OneNAND Interface] Write OneNAND register with value | |
78 | * @param value value to write | |
79 | * @param addr address to write | |
80 | * | |
81 | * Write OneNAND register with value | |
82 | */ | |
83 | static void onenand_writew(unsigned short value, void __iomem *addr) | |
84 | { | |
85 | writew(value, addr); | |
86 | } | |
87 | ||
88 | /** | |
89 | * onenand_block_address - [DEFAULT] Get block address | |
83a36838 | 90 | * @param this onenand chip data structure |
cd5f6346 KP |
91 | * @param block the block |
92 | * @return translated block address if DDP, otherwise same | |
93 | * | |
94 | * Setup Start Address 1 Register (F100h) | |
95 | */ | |
83a36838 | 96 | static int onenand_block_address(struct onenand_chip *this, int block) |
cd5f6346 | 97 | { |
83a36838 | 98 | if (this->device_id & ONENAND_DEVICE_IS_DDP) { |
cd5f6346 | 99 | /* Device Flash Core select, NAND Flash Block Address */ |
83a36838 | 100 | int dfs = 0; |
cd5f6346 | 101 | |
83a36838 | 102 | if (block & this->density_mask) |
cd5f6346 KP |
103 | dfs = 1; |
104 | ||
83a36838 KP |
105 | return (dfs << ONENAND_DDP_SHIFT) | |
106 | (block & (this->density_mask - 1)); | |
cd5f6346 KP |
107 | } |
108 | ||
109 | return block; | |
110 | } | |
111 | ||
112 | /** | |
113 | * onenand_bufferram_address - [DEFAULT] Get bufferram address | |
83a36838 | 114 | * @param this onenand chip data structure |
cd5f6346 KP |
115 | * @param block the block |
116 | * @return set DBS value if DDP, otherwise 0 | |
117 | * | |
118 | * Setup Start Address 2 Register (F101h) for DDP | |
119 | */ | |
83a36838 | 120 | static int onenand_bufferram_address(struct onenand_chip *this, int block) |
cd5f6346 | 121 | { |
83a36838 | 122 | if (this->device_id & ONENAND_DEVICE_IS_DDP) { |
cd5f6346 | 123 | /* Device BufferRAM Select */ |
83a36838 | 124 | int dbs = 0; |
cd5f6346 | 125 | |
83a36838 | 126 | if (block & this->density_mask) |
cd5f6346 KP |
127 | dbs = 1; |
128 | ||
129 | return (dbs << ONENAND_DDP_SHIFT); | |
130 | } | |
131 | ||
132 | return 0; | |
133 | } | |
134 | ||
135 | /** | |
136 | * onenand_page_address - [DEFAULT] Get page address | |
137 | * @param page the page address | |
138 | * @param sector the sector address | |
139 | * @return combined page and sector address | |
140 | * | |
141 | * Setup Start Address 8 Register (F107h) | |
142 | */ | |
143 | static int onenand_page_address(int page, int sector) | |
144 | { | |
145 | /* Flash Page Address, Flash Sector Address */ | |
146 | int fpa, fsa; | |
147 | ||
148 | fpa = page & ONENAND_FPA_MASK; | |
149 | fsa = sector & ONENAND_FSA_MASK; | |
150 | ||
151 | return ((fpa << ONENAND_FPA_SHIFT) | fsa); | |
152 | } | |
153 | ||
154 | /** | |
155 | * onenand_buffer_address - [DEFAULT] Get buffer address | |
156 | * @param dataram1 DataRAM index | |
157 | * @param sectors the sector address | |
158 | * @param count the number of sectors | |
159 | * @return the start buffer value | |
160 | * | |
161 | * Setup Start Buffer Register (F200h) | |
162 | */ | |
163 | static int onenand_buffer_address(int dataram1, int sectors, int count) | |
164 | { | |
165 | int bsa, bsc; | |
166 | ||
167 | /* BufferRAM Sector Address */ | |
168 | bsa = sectors & ONENAND_BSA_MASK; | |
169 | ||
170 | if (dataram1) | |
171 | bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */ | |
172 | else | |
173 | bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */ | |
174 | ||
175 | /* BufferRAM Sector Count */ | |
176 | bsc = count & ONENAND_BSC_MASK; | |
177 | ||
178 | return ((bsa << ONENAND_BSA_SHIFT) | bsc); | |
179 | } | |
180 | ||
181 | /** | |
182 | * onenand_command - [DEFAULT] Send command to OneNAND device | |
183 | * @param mtd MTD device structure | |
184 | * @param cmd the command to be sent | |
185 | * @param addr offset to read from or write to | |
186 | * @param len number of bytes to read or write | |
187 | * | |
188 | * Send command to OneNAND device. This function is used for middle/large page | |
189 | * devices (1KB/2KB Bytes per page) | |
190 | */ | |
191 | static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len) | |
192 | { | |
193 | struct onenand_chip *this = mtd->priv; | |
493c6460 | 194 | int value, readcmd = 0, block_cmd = 0; |
cd5f6346 KP |
195 | int block, page; |
196 | /* Now we use page size operation */ | |
197 | int sectors = 4, count = 4; | |
198 | ||
199 | /* Address translation */ | |
200 | switch (cmd) { | |
201 | case ONENAND_CMD_UNLOCK: | |
202 | case ONENAND_CMD_LOCK: | |
203 | case ONENAND_CMD_LOCK_TIGHT: | |
204 | block = -1; | |
205 | page = -1; | |
206 | break; | |
207 | ||
208 | case ONENAND_CMD_ERASE: | |
209 | case ONENAND_CMD_BUFFERRAM: | |
493c6460 KP |
210 | case ONENAND_CMD_OTP_ACCESS: |
211 | block_cmd = 1; | |
cd5f6346 KP |
212 | block = (int) (addr >> this->erase_shift); |
213 | page = -1; | |
214 | break; | |
215 | ||
216 | default: | |
217 | block = (int) (addr >> this->erase_shift); | |
218 | page = (int) (addr >> this->page_shift); | |
219 | page &= this->page_mask; | |
220 | break; | |
221 | } | |
222 | ||
223 | /* NOTE: The setting order of the registers is very important! */ | |
224 | if (cmd == ONENAND_CMD_BUFFERRAM) { | |
225 | /* Select DataRAM for DDP */ | |
83a36838 | 226 | value = onenand_bufferram_address(this, block); |
cd5f6346 KP |
227 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); |
228 | ||
229 | /* Switch to the next data buffer */ | |
230 | ONENAND_SET_NEXT_BUFFERRAM(this); | |
231 | ||
232 | return 0; | |
233 | } | |
234 | ||
235 | if (block != -1) { | |
236 | /* Write 'DFS, FBA' of Flash */ | |
83a36838 | 237 | value = onenand_block_address(this, block); |
cd5f6346 | 238 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); |
3cecf69e | 239 | |
493c6460 | 240 | if (cmd == block_cmd) { |
3cecf69e KP |
241 | /* Select DataRAM for DDP */ |
242 | value = onenand_bufferram_address(this, block); | |
243 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); | |
244 | } | |
cd5f6346 KP |
245 | } |
246 | ||
247 | if (page != -1) { | |
248 | int dataram; | |
249 | ||
250 | switch (cmd) { | |
251 | case ONENAND_CMD_READ: | |
252 | case ONENAND_CMD_READOOB: | |
253 | dataram = ONENAND_SET_NEXT_BUFFERRAM(this); | |
254 | readcmd = 1; | |
255 | break; | |
256 | ||
257 | default: | |
258 | dataram = ONENAND_CURRENT_BUFFERRAM(this); | |
259 | break; | |
260 | } | |
261 | ||
262 | /* Write 'FPA, FSA' of Flash */ | |
263 | value = onenand_page_address(page, sectors); | |
264 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8); | |
265 | ||
266 | /* Write 'BSA, BSC' of DataRAM */ | |
267 | value = onenand_buffer_address(dataram, sectors, count); | |
268 | this->write_word(value, this->base + ONENAND_REG_START_BUFFER); | |
d5c5e78a | 269 | |
cd5f6346 KP |
270 | if (readcmd) { |
271 | /* Select DataRAM for DDP */ | |
83a36838 | 272 | value = onenand_bufferram_address(this, block); |
cd5f6346 KP |
273 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); |
274 | } | |
275 | } | |
276 | ||
277 | /* Interrupt clear */ | |
278 | this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); | |
279 | ||
280 | /* Write command */ | |
281 | this->write_word(cmd, this->base + ONENAND_REG_COMMAND); | |
282 | ||
283 | return 0; | |
284 | } | |
285 | ||
286 | /** | |
287 | * onenand_wait - [DEFAULT] wait until the command is done | |
288 | * @param mtd MTD device structure | |
289 | * @param state state to select the max. timeout value | |
290 | * | |
291 | * Wait for command done. This applies to all OneNAND command | |
292 | * Read can take up to 30us, erase up to 2ms and program up to 350us | |
293 | * according to general OneNAND specs | |
294 | */ | |
295 | static int onenand_wait(struct mtd_info *mtd, int state) | |
296 | { | |
297 | struct onenand_chip * this = mtd->priv; | |
298 | unsigned long timeout; | |
299 | unsigned int flags = ONENAND_INT_MASTER; | |
300 | unsigned int interrupt = 0; | |
301 | unsigned int ctrl, ecc; | |
302 | ||
303 | /* The 20 msec is enough */ | |
304 | timeout = jiffies + msecs_to_jiffies(20); | |
305 | while (time_before(jiffies, timeout)) { | |
306 | interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); | |
307 | ||
308 | if (interrupt & flags) | |
309 | break; | |
310 | ||
311 | if (state != FL_READING) | |
312 | cond_resched(); | |
628bee65 | 313 | touch_softlockup_watchdog(); |
cd5f6346 KP |
314 | } |
315 | /* To get correct interrupt status in timeout case */ | |
316 | interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); | |
317 | ||
318 | ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); | |
319 | ||
320 | if (ctrl & ONENAND_CTRL_ERROR) { | |
cdc00130 KP |
321 | /* It maybe occur at initial bad block */ |
322 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl); | |
323 | /* Clear other interrupt bits for preventing ECC error */ | |
324 | interrupt &= ONENAND_INT_MASTER; | |
cd5f6346 KP |
325 | } |
326 | ||
327 | if (ctrl & ONENAND_CTRL_LOCK) { | |
cdc00130 KP |
328 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x\n", ctrl); |
329 | return -EACCES; | |
cd5f6346 KP |
330 | } |
331 | ||
332 | if (interrupt & ONENAND_INT_READ) { | |
333 | ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS); | |
334 | if (ecc & ONENAND_ECC_2BIT_ALL) { | |
cdc00130 | 335 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc); |
cd5f6346 KP |
336 | return -EBADMSG; |
337 | } | |
338 | } | |
339 | ||
340 | return 0; | |
341 | } | |
342 | ||
343 | /** | |
344 | * onenand_bufferram_offset - [DEFAULT] BufferRAM offset | |
345 | * @param mtd MTD data structure | |
346 | * @param area BufferRAM area | |
347 | * @return offset given area | |
348 | * | |
349 | * Return BufferRAM offset given area | |
350 | */ | |
351 | static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) | |
352 | { | |
353 | struct onenand_chip *this = mtd->priv; | |
354 | ||
355 | if (ONENAND_CURRENT_BUFFERRAM(this)) { | |
356 | if (area == ONENAND_DATARAM) | |
357 | return mtd->oobblock; | |
358 | if (area == ONENAND_SPARERAM) | |
359 | return mtd->oobsize; | |
360 | } | |
361 | ||
362 | return 0; | |
363 | } | |
364 | ||
365 | /** | |
366 | * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area | |
367 | * @param mtd MTD data structure | |
368 | * @param area BufferRAM area | |
369 | * @param buffer the databuffer to put/get data | |
370 | * @param offset offset to read from or write to | |
371 | * @param count number of bytes to read/write | |
372 | * | |
373 | * Read the BufferRAM area | |
374 | */ | |
375 | static int onenand_read_bufferram(struct mtd_info *mtd, int area, | |
376 | unsigned char *buffer, int offset, size_t count) | |
377 | { | |
378 | struct onenand_chip *this = mtd->priv; | |
379 | void __iomem *bufferram; | |
380 | ||
381 | bufferram = this->base + area; | |
382 | ||
383 | bufferram += onenand_bufferram_offset(mtd, area); | |
384 | ||
9c01f87d KP |
385 | if (ONENAND_CHECK_BYTE_ACCESS(count)) { |
386 | unsigned short word; | |
387 | ||
388 | /* Align with word(16-bit) size */ | |
389 | count--; | |
390 | ||
391 | /* Read word and save byte */ | |
392 | word = this->read_word(bufferram + offset + count); | |
393 | buffer[count] = (word & 0xff); | |
394 | } | |
395 | ||
cd5f6346 KP |
396 | memcpy(buffer, bufferram + offset, count); |
397 | ||
398 | return 0; | |
399 | } | |
400 | ||
52b0eea7 KP |
401 | /** |
402 | * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode | |
403 | * @param mtd MTD data structure | |
404 | * @param area BufferRAM area | |
405 | * @param buffer the databuffer to put/get data | |
406 | * @param offset offset to read from or write to | |
407 | * @param count number of bytes to read/write | |
408 | * | |
409 | * Read the BufferRAM area with Sync. Burst Mode | |
410 | */ | |
411 | static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area, | |
412 | unsigned char *buffer, int offset, size_t count) | |
413 | { | |
414 | struct onenand_chip *this = mtd->priv; | |
415 | void __iomem *bufferram; | |
416 | ||
417 | bufferram = this->base + area; | |
418 | ||
419 | bufferram += onenand_bufferram_offset(mtd, area); | |
420 | ||
421 | this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ); | |
422 | ||
9c01f87d KP |
423 | if (ONENAND_CHECK_BYTE_ACCESS(count)) { |
424 | unsigned short word; | |
425 | ||
426 | /* Align with word(16-bit) size */ | |
427 | count--; | |
428 | ||
429 | /* Read word and save byte */ | |
430 | word = this->read_word(bufferram + offset + count); | |
431 | buffer[count] = (word & 0xff); | |
432 | } | |
433 | ||
52b0eea7 KP |
434 | memcpy(buffer, bufferram + offset, count); |
435 | ||
436 | this->mmcontrol(mtd, 0); | |
437 | ||
438 | return 0; | |
439 | } | |
440 | ||
cd5f6346 KP |
441 | /** |
442 | * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area | |
443 | * @param mtd MTD data structure | |
444 | * @param area BufferRAM area | |
445 | * @param buffer the databuffer to put/get data | |
446 | * @param offset offset to read from or write to | |
447 | * @param count number of bytes to read/write | |
448 | * | |
449 | * Write the BufferRAM area | |
450 | */ | |
451 | static int onenand_write_bufferram(struct mtd_info *mtd, int area, | |
452 | const unsigned char *buffer, int offset, size_t count) | |
453 | { | |
454 | struct onenand_chip *this = mtd->priv; | |
455 | void __iomem *bufferram; | |
456 | ||
457 | bufferram = this->base + area; | |
458 | ||
459 | bufferram += onenand_bufferram_offset(mtd, area); | |
460 | ||
9c01f87d KP |
461 | if (ONENAND_CHECK_BYTE_ACCESS(count)) { |
462 | unsigned short word; | |
463 | int byte_offset; | |
464 | ||
465 | /* Align with word(16-bit) size */ | |
466 | count--; | |
467 | ||
468 | /* Calculate byte access offset */ | |
469 | byte_offset = offset + count; | |
470 | ||
471 | /* Read word and save byte */ | |
472 | word = this->read_word(bufferram + byte_offset); | |
473 | word = (word & ~0xff) | buffer[count]; | |
474 | this->write_word(word, bufferram + byte_offset); | |
475 | } | |
476 | ||
cd5f6346 KP |
477 | memcpy(bufferram + offset, buffer, count); |
478 | ||
479 | return 0; | |
480 | } | |
481 | ||
482 | /** | |
483 | * onenand_check_bufferram - [GENERIC] Check BufferRAM information | |
484 | * @param mtd MTD data structure | |
485 | * @param addr address to check | |
d5c5e78a | 486 | * @return 1 if there are valid data, otherwise 0 |
cd5f6346 KP |
487 | * |
488 | * Check bufferram if there is data we required | |
489 | */ | |
490 | static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) | |
491 | { | |
492 | struct onenand_chip *this = mtd->priv; | |
493 | int block, page; | |
494 | int i; | |
d5c5e78a | 495 | |
cd5f6346 KP |
496 | block = (int) (addr >> this->erase_shift); |
497 | page = (int) (addr >> this->page_shift); | |
498 | page &= this->page_mask; | |
499 | ||
500 | i = ONENAND_CURRENT_BUFFERRAM(this); | |
501 | ||
502 | /* Is there valid data? */ | |
503 | if (this->bufferram[i].block == block && | |
504 | this->bufferram[i].page == page && | |
505 | this->bufferram[i].valid) | |
506 | return 1; | |
507 | ||
508 | return 0; | |
509 | } | |
510 | ||
511 | /** | |
512 | * onenand_update_bufferram - [GENERIC] Update BufferRAM information | |
513 | * @param mtd MTD data structure | |
514 | * @param addr address to update | |
515 | * @param valid valid flag | |
516 | * | |
517 | * Update BufferRAM information | |
518 | */ | |
519 | static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, | |
520 | int valid) | |
521 | { | |
522 | struct onenand_chip *this = mtd->priv; | |
523 | int block, page; | |
524 | int i; | |
d5c5e78a | 525 | |
cd5f6346 KP |
526 | block = (int) (addr >> this->erase_shift); |
527 | page = (int) (addr >> this->page_shift); | |
528 | page &= this->page_mask; | |
529 | ||
530 | /* Invalidate BufferRAM */ | |
531 | for (i = 0; i < MAX_BUFFERRAM; i++) { | |
532 | if (this->bufferram[i].block == block && | |
533 | this->bufferram[i].page == page) | |
534 | this->bufferram[i].valid = 0; | |
535 | } | |
536 | ||
537 | /* Update BufferRAM */ | |
538 | i = ONENAND_CURRENT_BUFFERRAM(this); | |
539 | this->bufferram[i].block = block; | |
540 | this->bufferram[i].page = page; | |
541 | this->bufferram[i].valid = valid; | |
542 | ||
543 | return 0; | |
544 | } | |
545 | ||
546 | /** | |
547 | * onenand_get_device - [GENERIC] Get chip for selected access | |
548 | * @param mtd MTD device structure | |
549 | * @param new_state the state which is requested | |
550 | * | |
551 | * Get the device and lock it for exclusive access | |
552 | */ | |
a41371eb | 553 | static int onenand_get_device(struct mtd_info *mtd, int new_state) |
cd5f6346 KP |
554 | { |
555 | struct onenand_chip *this = mtd->priv; | |
556 | DECLARE_WAITQUEUE(wait, current); | |
557 | ||
558 | /* | |
559 | * Grab the lock and see if the device is available | |
560 | */ | |
561 | while (1) { | |
562 | spin_lock(&this->chip_lock); | |
563 | if (this->state == FL_READY) { | |
564 | this->state = new_state; | |
565 | spin_unlock(&this->chip_lock); | |
566 | break; | |
567 | } | |
a41371eb KP |
568 | if (new_state == FL_PM_SUSPENDED) { |
569 | spin_unlock(&this->chip_lock); | |
570 | return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; | |
571 | } | |
cd5f6346 KP |
572 | set_current_state(TASK_UNINTERRUPTIBLE); |
573 | add_wait_queue(&this->wq, &wait); | |
574 | spin_unlock(&this->chip_lock); | |
575 | schedule(); | |
576 | remove_wait_queue(&this->wq, &wait); | |
577 | } | |
a41371eb KP |
578 | |
579 | return 0; | |
cd5f6346 KP |
580 | } |
581 | ||
582 | /** | |
583 | * onenand_release_device - [GENERIC] release chip | |
584 | * @param mtd MTD device structure | |
585 | * | |
586 | * Deselect, release chip lock and wake up anyone waiting on the device | |
587 | */ | |
588 | static void onenand_release_device(struct mtd_info *mtd) | |
589 | { | |
590 | struct onenand_chip *this = mtd->priv; | |
591 | ||
592 | /* Release the chip */ | |
593 | spin_lock(&this->chip_lock); | |
594 | this->state = FL_READY; | |
595 | wake_up(&this->wq); | |
596 | spin_unlock(&this->chip_lock); | |
597 | } | |
598 | ||
599 | /** | |
600 | * onenand_read_ecc - [MTD Interface] Read data with ECC | |
601 | * @param mtd MTD device structure | |
602 | * @param from offset to read from | |
603 | * @param len number of bytes to read | |
604 | * @param retlen pointer to variable to store the number of read bytes | |
605 | * @param buf the databuffer to put data | |
606 | * @param oob_buf filesystem supplied oob data buffer | |
607 | * @param oobsel oob selection structure | |
608 | * | |
609 | * OneNAND read with ECC | |
610 | */ | |
611 | static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, | |
612 | size_t *retlen, u_char *buf, | |
613 | u_char *oob_buf, struct nand_oobinfo *oobsel) | |
614 | { | |
615 | struct onenand_chip *this = mtd->priv; | |
616 | int read = 0, column; | |
617 | int thislen; | |
618 | int ret = 0; | |
619 | ||
620 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); | |
621 | ||
622 | /* Do not allow reads past end of device */ | |
623 | if ((from + len) > mtd->size) { | |
624 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: Attempt read beyond end of device\n"); | |
625 | *retlen = 0; | |
626 | return -EINVAL; | |
627 | } | |
628 | ||
629 | /* Grab the lock and see if the device is available */ | |
630 | onenand_get_device(mtd, FL_READING); | |
631 | ||
632 | /* TODO handling oob */ | |
633 | ||
634 | while (read < len) { | |
635 | thislen = min_t(int, mtd->oobblock, len - read); | |
636 | ||
637 | column = from & (mtd->oobblock - 1); | |
638 | if (column + thislen > mtd->oobblock) | |
639 | thislen = mtd->oobblock - column; | |
640 | ||
641 | if (!onenand_check_bufferram(mtd, from)) { | |
642 | this->command(mtd, ONENAND_CMD_READ, from, mtd->oobblock); | |
643 | ||
644 | ret = this->wait(mtd, FL_READING); | |
645 | /* First copy data and check return value for ECC handling */ | |
646 | onenand_update_bufferram(mtd, from, 1); | |
647 | } | |
648 | ||
649 | this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); | |
650 | ||
651 | read += thislen; | |
652 | ||
653 | if (read == len) | |
654 | break; | |
655 | ||
656 | if (ret) { | |
657 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: read failed = %d\n", ret); | |
658 | goto out; | |
659 | } | |
660 | ||
661 | from += thislen; | |
662 | buf += thislen; | |
663 | } | |
664 | ||
665 | out: | |
666 | /* Deselect and wake up anyone waiting on the device */ | |
667 | onenand_release_device(mtd); | |
668 | ||
669 | /* | |
670 | * Return success, if no ECC failures, else -EBADMSG | |
671 | * fs driver will take care of that, because | |
672 | * retlen == desired len and result == -EBADMSG | |
673 | */ | |
674 | *retlen = read; | |
675 | return ret; | |
676 | } | |
677 | ||
678 | /** | |
679 | * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc | |
680 | * @param mtd MTD device structure | |
681 | * @param from offset to read from | |
682 | * @param len number of bytes to read | |
683 | * @param retlen pointer to variable to store the number of read bytes | |
684 | * @param buf the databuffer to put data | |
685 | * | |
686 | * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL | |
687 | */ | |
688 | static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, | |
689 | size_t *retlen, u_char *buf) | |
690 | { | |
691 | return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL); | |
692 | } | |
693 | ||
694 | /** | |
695 | * onenand_read_oob - [MTD Interface] OneNAND read out-of-band | |
696 | * @param mtd MTD device structure | |
697 | * @param from offset to read from | |
698 | * @param len number of bytes to read | |
699 | * @param retlen pointer to variable to store the number of read bytes | |
700 | * @param buf the databuffer to put data | |
701 | * | |
702 | * OneNAND read out-of-band data from the spare area | |
703 | */ | |
704 | static int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, | |
705 | size_t *retlen, u_char *buf) | |
706 | { | |
707 | struct onenand_chip *this = mtd->priv; | |
708 | int read = 0, thislen, column; | |
709 | int ret = 0; | |
710 | ||
711 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); | |
712 | ||
713 | /* Initialize return length value */ | |
714 | *retlen = 0; | |
715 | ||
716 | /* Do not allow reads past end of device */ | |
717 | if (unlikely((from + len) > mtd->size)) { | |
718 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n"); | |
719 | return -EINVAL; | |
720 | } | |
721 | ||
722 | /* Grab the lock and see if the device is available */ | |
723 | onenand_get_device(mtd, FL_READING); | |
724 | ||
725 | column = from & (mtd->oobsize - 1); | |
726 | ||
727 | while (read < len) { | |
728 | thislen = mtd->oobsize - column; | |
729 | thislen = min_t(int, thislen, len); | |
730 | ||
731 | this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize); | |
732 | ||
733 | onenand_update_bufferram(mtd, from, 0); | |
734 | ||
735 | ret = this->wait(mtd, FL_READING); | |
736 | /* First copy data and check return value for ECC handling */ | |
737 | ||
738 | this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); | |
739 | ||
740 | read += thislen; | |
741 | ||
742 | if (read == len) | |
743 | break; | |
744 | ||
745 | if (ret) { | |
746 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = %d\n", ret); | |
747 | goto out; | |
748 | } | |
749 | ||
750 | buf += thislen; | |
751 | ||
752 | /* Read more? */ | |
753 | if (read < len) { | |
754 | /* Page size */ | |
755 | from += mtd->oobblock; | |
756 | column = 0; | |
757 | } | |
758 | } | |
759 | ||
760 | out: | |
761 | /* Deselect and wake up anyone waiting on the device */ | |
762 | onenand_release_device(mtd); | |
763 | ||
764 | *retlen = read; | |
765 | return ret; | |
766 | } | |
767 | ||
768 | #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE | |
8e6ec690 KP |
769 | /** |
770 | * onenand_verify_oob - [GENERIC] verify the oob contents after a write | |
771 | * @param mtd MTD device structure | |
772 | * @param buf the databuffer to verify | |
773 | * @param to offset to read from | |
774 | * @param len number of bytes to read and compare | |
775 | * | |
776 | */ | |
777 | static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len) | |
778 | { | |
779 | struct onenand_chip *this = mtd->priv; | |
780 | char *readp = this->page_buf; | |
781 | int column = to & (mtd->oobsize - 1); | |
782 | int status, i; | |
783 | ||
784 | this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize); | |
785 | onenand_update_bufferram(mtd, to, 0); | |
786 | status = this->wait(mtd, FL_READING); | |
787 | if (status) | |
788 | return status; | |
789 | ||
790 | this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len); | |
791 | ||
792 | for(i = 0; i < len; i++) | |
793 | if (buf[i] != 0xFF && buf[i] != readp[i]) | |
794 | return -EBADMSG; | |
795 | ||
796 | return 0; | |
797 | } | |
798 | ||
cd5f6346 KP |
799 | /** |
800 | * onenand_verify_page - [GENERIC] verify the chip contents after a write | |
801 | * @param mtd MTD device structure | |
802 | * @param buf the databuffer to verify | |
cd5f6346 KP |
803 | * |
804 | * Check DataRAM area directly | |
805 | */ | |
d36d63d4 | 806 | static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr) |
cd5f6346 KP |
807 | { |
808 | struct onenand_chip *this = mtd->priv; | |
809 | void __iomem *dataram0, *dataram1; | |
810 | int ret = 0; | |
811 | ||
812 | this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock); | |
813 | ||
814 | ret = this->wait(mtd, FL_READING); | |
815 | if (ret) | |
816 | return ret; | |
817 | ||
818 | onenand_update_bufferram(mtd, addr, 1); | |
819 | ||
820 | /* Check, if the two dataram areas are same */ | |
821 | dataram0 = this->base + ONENAND_DATARAM; | |
822 | dataram1 = dataram0 + mtd->oobblock; | |
823 | ||
824 | if (memcmp(dataram0, dataram1, mtd->oobblock)) | |
825 | return -EBADMSG; | |
d5c5e78a | 826 | |
cd5f6346 KP |
827 | return 0; |
828 | } | |
829 | #else | |
830 | #define onenand_verify_page(...) (0) | |
8e6ec690 | 831 | #define onenand_verify_oob(...) (0) |
cd5f6346 KP |
832 | #endif |
833 | ||
834 | #define NOTALIGNED(x) ((x & (mtd->oobblock - 1)) != 0) | |
835 | ||
836 | /** | |
837 | * onenand_write_ecc - [MTD Interface] OneNAND write with ECC | |
838 | * @param mtd MTD device structure | |
839 | * @param to offset to write to | |
840 | * @param len number of bytes to write | |
841 | * @param retlen pointer to variable to store the number of written bytes | |
842 | * @param buf the data to write | |
843 | * @param eccbuf filesystem supplied oob data buffer | |
844 | * @param oobsel oob selection structure | |
845 | * | |
846 | * OneNAND write with ECC | |
847 | */ | |
848 | static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len, | |
849 | size_t *retlen, const u_char *buf, | |
850 | u_char *eccbuf, struct nand_oobinfo *oobsel) | |
851 | { | |
852 | struct onenand_chip *this = mtd->priv; | |
853 | int written = 0; | |
854 | int ret = 0; | |
855 | ||
856 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); | |
857 | ||
858 | /* Initialize retlen, in case of early exit */ | |
859 | *retlen = 0; | |
860 | ||
861 | /* Do not allow writes past end of device */ | |
862 | if (unlikely((to + len) > mtd->size)) { | |
863 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt write to past end of device\n"); | |
864 | return -EINVAL; | |
865 | } | |
866 | ||
867 | /* Reject writes, which are not page aligned */ | |
868 | if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) { | |
869 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt to write not page aligned data\n"); | |
870 | return -EINVAL; | |
871 | } | |
872 | ||
873 | /* Grab the lock and see if the device is available */ | |
874 | onenand_get_device(mtd, FL_WRITING); | |
875 | ||
876 | /* Loop until all data write */ | |
877 | while (written < len) { | |
878 | int thislen = min_t(int, mtd->oobblock, len - written); | |
879 | ||
880 | this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock); | |
881 | ||
882 | this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen); | |
883 | this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize); | |
884 | ||
885 | this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock); | |
886 | ||
887 | onenand_update_bufferram(mtd, to, 1); | |
888 | ||
889 | ret = this->wait(mtd, FL_WRITING); | |
890 | if (ret) { | |
891 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: write filaed %d\n", ret); | |
892 | goto out; | |
893 | } | |
894 | ||
895 | written += thislen; | |
896 | ||
897 | /* Only check verify write turn on */ | |
d36d63d4 | 898 | ret = onenand_verify_page(mtd, (u_char *) buf, to); |
cd5f6346 KP |
899 | if (ret) { |
900 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: verify failed %d\n", ret); | |
901 | goto out; | |
902 | } | |
903 | ||
904 | if (written == len) | |
905 | break; | |
906 | ||
907 | to += thislen; | |
908 | buf += thislen; | |
909 | } | |
910 | ||
911 | out: | |
912 | /* Deselect and wake up anyone waiting on the device */ | |
913 | onenand_release_device(mtd); | |
914 | ||
915 | *retlen = written; | |
d5c5e78a | 916 | |
cd5f6346 KP |
917 | return ret; |
918 | } | |
919 | ||
920 | /** | |
921 | * onenand_write - [MTD Interface] compability function for onenand_write_ecc | |
922 | * @param mtd MTD device structure | |
923 | * @param to offset to write to | |
924 | * @param len number of bytes to write | |
925 | * @param retlen pointer to variable to store the number of written bytes | |
926 | * @param buf the data to write | |
927 | * | |
928 | * This function simply calls onenand_write_ecc | |
929 | * with oob buffer and oobsel = NULL | |
930 | */ | |
931 | static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len, | |
932 | size_t *retlen, const u_char *buf) | |
933 | { | |
934 | return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL); | |
935 | } | |
936 | ||
937 | /** | |
938 | * onenand_write_oob - [MTD Interface] OneNAND write out-of-band | |
939 | * @param mtd MTD device structure | |
940 | * @param to offset to write to | |
941 | * @param len number of bytes to write | |
942 | * @param retlen pointer to variable to store the number of written bytes | |
943 | * @param buf the data to write | |
944 | * | |
945 | * OneNAND write out-of-band | |
946 | */ | |
947 | static int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, | |
948 | size_t *retlen, const u_char *buf) | |
949 | { | |
950 | struct onenand_chip *this = mtd->priv; | |
8e6ec690 | 951 | int column, ret = 0; |
cd5f6346 KP |
952 | int written = 0; |
953 | ||
954 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); | |
955 | ||
956 | /* Initialize retlen, in case of early exit */ | |
957 | *retlen = 0; | |
958 | ||
959 | /* Do not allow writes past end of device */ | |
960 | if (unlikely((to + len) > mtd->size)) { | |
961 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n"); | |
962 | return -EINVAL; | |
963 | } | |
964 | ||
965 | /* Grab the lock and see if the device is available */ | |
966 | onenand_get_device(mtd, FL_WRITING); | |
967 | ||
968 | /* Loop until all data write */ | |
969 | while (written < len) { | |
970 | int thislen = min_t(int, mtd->oobsize, len - written); | |
971 | ||
972 | column = to & (mtd->oobsize - 1); | |
973 | ||
974 | this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize); | |
975 | ||
34c10609 KP |
976 | /* We send data to spare ram with oobsize |
977 | * to prevent byte access */ | |
978 | memset(this->page_buf, 0xff, mtd->oobsize); | |
979 | memcpy(this->page_buf + column, buf, thislen); | |
980 | this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize); | |
cd5f6346 KP |
981 | |
982 | this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize); | |
983 | ||
984 | onenand_update_bufferram(mtd, to, 0); | |
985 | ||
8e6ec690 KP |
986 | ret = this->wait(mtd, FL_WRITING); |
987 | if (ret) { | |
988 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret); | |
989 | goto out; | |
990 | } | |
991 | ||
992 | ret = onenand_verify_oob(mtd, buf, to, thislen); | |
993 | if (ret) { | |
994 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret); | |
cd5f6346 | 995 | goto out; |
8e6ec690 | 996 | } |
cd5f6346 KP |
997 | |
998 | written += thislen; | |
999 | ||
1000 | if (written == len) | |
1001 | break; | |
1002 | ||
1003 | to += thislen; | |
1004 | buf += thislen; | |
1005 | } | |
1006 | ||
1007 | out: | |
1008 | /* Deselect and wake up anyone waiting on the device */ | |
1009 | onenand_release_device(mtd); | |
1010 | ||
1011 | *retlen = written; | |
d5c5e78a | 1012 | |
8e6ec690 | 1013 | return ret; |
cd5f6346 KP |
1014 | } |
1015 | ||
1016 | /** | |
1017 | * onenand_writev_ecc - [MTD Interface] write with iovec with ecc | |
1018 | * @param mtd MTD device structure | |
1019 | * @param vecs the iovectors to write | |
1020 | * @param count number of vectors | |
1021 | * @param to offset to write to | |
1022 | * @param retlen pointer to variable to store the number of written bytes | |
1023 | * @param eccbuf filesystem supplied oob data buffer | |
1024 | * @param oobsel oob selection structure | |
1025 | * | |
1026 | * OneNAND write with iovec with ecc | |
1027 | */ | |
1028 | static int onenand_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs, | |
1029 | unsigned long count, loff_t to, size_t *retlen, | |
1030 | u_char *eccbuf, struct nand_oobinfo *oobsel) | |
1031 | { | |
1032 | struct onenand_chip *this = mtd->priv; | |
532a37cf | 1033 | unsigned char *pbuf; |
cd5f6346 KP |
1034 | size_t total_len, len; |
1035 | int i, written = 0; | |
1036 | int ret = 0; | |
1037 | ||
1038 | /* Preset written len for early exit */ | |
1039 | *retlen = 0; | |
1040 | ||
1041 | /* Calculate total length of data */ | |
1042 | total_len = 0; | |
1043 | for (i = 0; i < count; i++) | |
1044 | total_len += vecs[i].iov_len; | |
1045 | ||
1046 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_writev_ecc: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count); | |
1047 | ||
1048 | /* Do not allow write past end of the device */ | |
1049 | if (unlikely((to + total_len) > mtd->size)) { | |
1050 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: Attempted write past end of device\n"); | |
1051 | return -EINVAL; | |
1052 | } | |
1053 | ||
1054 | /* Reject writes, which are not page aligned */ | |
1055 | if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(total_len))) { | |
1056 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: Attempt to write not page aligned data\n"); | |
1057 | return -EINVAL; | |
1058 | } | |
1059 | ||
1060 | /* Grab the lock and see if the device is available */ | |
1061 | onenand_get_device(mtd, FL_WRITING); | |
1062 | ||
1063 | /* TODO handling oob */ | |
d5c5e78a | 1064 | |
cd5f6346 KP |
1065 | /* Loop until all keve's data has been written */ |
1066 | len = 0; | |
1067 | while (count) { | |
532a37cf | 1068 | pbuf = this->page_buf; |
d5c5e78a | 1069 | /* |
cd5f6346 KP |
1070 | * If the given tuple is >= pagesize then |
1071 | * write it out from the iov | |
1072 | */ | |
1073 | if ((vecs->iov_len - len) >= mtd->oobblock) { | |
1074 | pbuf = vecs->iov_base + len; | |
1075 | ||
1076 | len += mtd->oobblock; | |
1077 | ||
1078 | /* Check, if we have to switch to the next tuple */ | |
1079 | if (len >= (int) vecs->iov_len) { | |
1080 | vecs++; | |
1081 | len = 0; | |
1082 | count--; | |
1083 | } | |
1084 | } else { | |
1085 | int cnt = 0, thislen; | |
1086 | while (cnt < mtd->oobblock) { | |
1087 | thislen = min_t(int, mtd->oobblock - cnt, vecs->iov_len - len); | |
532a37cf | 1088 | memcpy(this->page_buf + cnt, vecs->iov_base + len, thislen); |
cd5f6346 KP |
1089 | cnt += thislen; |
1090 | len += thislen; | |
1091 | ||
1092 | /* Check, if we have to switch to the next tuple */ | |
1093 | if (len >= (int) vecs->iov_len) { | |
1094 | vecs++; | |
1095 | len = 0; | |
1096 | count--; | |
1097 | } | |
1098 | } | |
1099 | } | |
1100 | ||
1101 | this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock); | |
1102 | ||
1103 | this->write_bufferram(mtd, ONENAND_DATARAM, pbuf, 0, mtd->oobblock); | |
1104 | this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize); | |
1105 | ||
1106 | this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock); | |
1107 | ||
1108 | onenand_update_bufferram(mtd, to, 1); | |
1109 | ||
1110 | ret = this->wait(mtd, FL_WRITING); | |
1111 | if (ret) { | |
1112 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: write failed %d\n", ret); | |
1113 | goto out; | |
1114 | } | |
1115 | ||
1116 | ||
1117 | /* Only check verify write turn on */ | |
d36d63d4 | 1118 | ret = onenand_verify_page(mtd, (u_char *) pbuf, to); |
cd5f6346 KP |
1119 | if (ret) { |
1120 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: verify failed %d\n", ret); | |
1121 | goto out; | |
1122 | } | |
1123 | ||
1124 | written += mtd->oobblock; | |
1125 | ||
1126 | to += mtd->oobblock; | |
1127 | } | |
1128 | ||
1129 | out: | |
1130 | /* Deselect and wakt up anyone waiting on the device */ | |
1131 | onenand_release_device(mtd); | |
1132 | ||
1133 | *retlen = written; | |
1134 | ||
1135 | return 0; | |
1136 | } | |
1137 | ||
1138 | /** | |
1139 | * onenand_writev - [MTD Interface] compabilty function for onenand_writev_ecc | |
1140 | * @param mtd MTD device structure | |
1141 | * @param vecs the iovectors to write | |
1142 | * @param count number of vectors | |
1143 | * @param to offset to write to | |
1144 | * @param retlen pointer to variable to store the number of written bytes | |
1145 | * | |
1146 | * OneNAND write with kvec. This just calls the ecc function | |
1147 | */ | |
1148 | static int onenand_writev(struct mtd_info *mtd, const struct kvec *vecs, | |
1149 | unsigned long count, loff_t to, size_t *retlen) | |
1150 | { | |
1151 | return onenand_writev_ecc(mtd, vecs, count, to, retlen, NULL, NULL); | |
1152 | } | |
1153 | ||
cdc00130 KP |
1154 | /** |
1155 | * onenand_block_checkbad - [GENERIC] Check if a block is marked bad | |
1156 | * @param mtd MTD device structure | |
1157 | * @param ofs offset from device start | |
1158 | * @param getchip 0, if the chip is already selected | |
1159 | * @param allowbbt 1, if its allowed to access the bbt area | |
1160 | * | |
1161 | * Check, if the block is bad. Either by reading the bad block table or | |
1162 | * calling of the scan function. | |
1163 | */ | |
1164 | static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt) | |
1165 | { | |
1166 | struct onenand_chip *this = mtd->priv; | |
1167 | struct bbm_info *bbm = this->bbm; | |
1168 | ||
1169 | /* Return info from the table */ | |
1170 | return bbm->isbad_bbt(mtd, ofs, allowbbt); | |
1171 | } | |
1172 | ||
cd5f6346 KP |
1173 | /** |
1174 | * onenand_erase - [MTD Interface] erase block(s) | |
1175 | * @param mtd MTD device structure | |
1176 | * @param instr erase instruction | |
1177 | * | |
1178 | * Erase one ore more blocks | |
1179 | */ | |
1180 | static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) | |
1181 | { | |
1182 | struct onenand_chip *this = mtd->priv; | |
1183 | unsigned int block_size; | |
1184 | loff_t addr; | |
1185 | int len; | |
1186 | int ret = 0; | |
1187 | ||
1188 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len); | |
1189 | ||
1190 | block_size = (1 << this->erase_shift); | |
1191 | ||
1192 | /* Start address must align on block boundary */ | |
1193 | if (unlikely(instr->addr & (block_size - 1))) { | |
1194 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n"); | |
1195 | return -EINVAL; | |
1196 | } | |
1197 | ||
1198 | /* Length must align on block boundary */ | |
1199 | if (unlikely(instr->len & (block_size - 1))) { | |
1200 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n"); | |
1201 | return -EINVAL; | |
1202 | } | |
1203 | ||
1204 | /* Do not allow erase past end of device */ | |
1205 | if (unlikely((instr->len + instr->addr) > mtd->size)) { | |
1206 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n"); | |
1207 | return -EINVAL; | |
1208 | } | |
1209 | ||
1210 | instr->fail_addr = 0xffffffff; | |
1211 | ||
1212 | /* Grab the lock and see if the device is available */ | |
1213 | onenand_get_device(mtd, FL_ERASING); | |
1214 | ||
1215 | /* Loop throught the pages */ | |
1216 | len = instr->len; | |
1217 | addr = instr->addr; | |
1218 | ||
1219 | instr->state = MTD_ERASING; | |
1220 | ||
1221 | while (len) { | |
1222 | ||
cdc00130 KP |
1223 | /* Check if we have a bad block, we do not erase bad blocks */ |
1224 | if (onenand_block_checkbad(mtd, addr, 0, 0)) { | |
1225 | printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr); | |
1226 | instr->state = MTD_ERASE_FAILED; | |
1227 | goto erase_exit; | |
1228 | } | |
cd5f6346 KP |
1229 | |
1230 | this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); | |
1231 | ||
1232 | ret = this->wait(mtd, FL_ERASING); | |
1233 | /* Check, if it is write protected */ | |
1234 | if (ret) { | |
1235 | if (ret == -EPERM) | |
1236 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Device is write protected!!!\n"); | |
1237 | else | |
1238 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift)); | |
1239 | instr->state = MTD_ERASE_FAILED; | |
1240 | instr->fail_addr = addr; | |
1241 | goto erase_exit; | |
1242 | } | |
1243 | ||
1244 | len -= block_size; | |
1245 | addr += block_size; | |
1246 | } | |
1247 | ||
1248 | instr->state = MTD_ERASE_DONE; | |
1249 | ||
1250 | erase_exit: | |
1251 | ||
1252 | ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; | |
1253 | /* Do call back function */ | |
1254 | if (!ret) | |
1255 | mtd_erase_callback(instr); | |
1256 | ||
1257 | /* Deselect and wake up anyone waiting on the device */ | |
1258 | onenand_release_device(mtd); | |
1259 | ||
1260 | return ret; | |
1261 | } | |
1262 | ||
1263 | /** | |
1264 | * onenand_sync - [MTD Interface] sync | |
1265 | * @param mtd MTD device structure | |
1266 | * | |
1267 | * Sync is actually a wait for chip ready function | |
1268 | */ | |
1269 | static void onenand_sync(struct mtd_info *mtd) | |
1270 | { | |
1271 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n"); | |
1272 | ||
1273 | /* Grab the lock and see if the device is available */ | |
1274 | onenand_get_device(mtd, FL_SYNCING); | |
1275 | ||
1276 | /* Release it and go back */ | |
1277 | onenand_release_device(mtd); | |
1278 | } | |
1279 | ||
cdc00130 | 1280 | |
cd5f6346 KP |
1281 | /** |
1282 | * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad | |
1283 | * @param mtd MTD device structure | |
1284 | * @param ofs offset relative to mtd start | |
cdc00130 KP |
1285 | * |
1286 | * Check whether the block is bad | |
cd5f6346 KP |
1287 | */ |
1288 | static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) | |
1289 | { | |
cdc00130 KP |
1290 | /* Check for invalid offset */ |
1291 | if (ofs > mtd->size) | |
1292 | return -EINVAL; | |
1293 | ||
1294 | return onenand_block_checkbad(mtd, ofs, 1, 0); | |
1295 | } | |
1296 | ||
1297 | /** | |
1298 | * onenand_default_block_markbad - [DEFAULT] mark a block bad | |
1299 | * @param mtd MTD device structure | |
1300 | * @param ofs offset from device start | |
1301 | * | |
1302 | * This is the default implementation, which can be overridden by | |
1303 | * a hardware specific driver. | |
1304 | */ | |
1305 | static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) | |
1306 | { | |
1307 | struct onenand_chip *this = mtd->priv; | |
1308 | struct bbm_info *bbm = this->bbm; | |
1309 | u_char buf[2] = {0, 0}; | |
1310 | size_t retlen; | |
1311 | int block; | |
1312 | ||
1313 | /* Get block number */ | |
1314 | block = ((int) ofs) >> bbm->bbt_erase_shift; | |
1315 | if (bbm->bbt) | |
1316 | bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); | |
1317 | ||
1318 | /* We write two bytes, so we dont have to mess with 16 bit access */ | |
1319 | ofs += mtd->oobsize + (bbm->badblockpos & ~0x01); | |
1320 | return mtd->write_oob(mtd, ofs , 2, &retlen, buf); | |
cd5f6346 KP |
1321 | } |
1322 | ||
1323 | /** | |
1324 | * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad | |
1325 | * @param mtd MTD device structure | |
1326 | * @param ofs offset relative to mtd start | |
cdc00130 KP |
1327 | * |
1328 | * Mark the block as bad | |
cd5f6346 KP |
1329 | */ |
1330 | static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) | |
1331 | { | |
cdc00130 KP |
1332 | struct onenand_chip *this = mtd->priv; |
1333 | int ret; | |
1334 | ||
1335 | ret = onenand_block_isbad(mtd, ofs); | |
1336 | if (ret) { | |
1337 | /* If it was bad already, return success and do nothing */ | |
1338 | if (ret > 0) | |
1339 | return 0; | |
1340 | return ret; | |
1341 | } | |
1342 | ||
1343 | return this->block_markbad(mtd, ofs); | |
cd5f6346 KP |
1344 | } |
1345 | ||
1346 | /** | |
1347 | * onenand_unlock - [MTD Interface] Unlock block(s) | |
1348 | * @param mtd MTD device structure | |
1349 | * @param ofs offset relative to mtd start | |
1350 | * @param len number of bytes to unlock | |
1351 | * | |
1352 | * Unlock one or more blocks | |
1353 | */ | |
1354 | static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) | |
1355 | { | |
1356 | struct onenand_chip *this = mtd->priv; | |
1357 | int start, end, block, value, status; | |
1358 | ||
1359 | start = ofs >> this->erase_shift; | |
1360 | end = len >> this->erase_shift; | |
1361 | ||
1362 | /* Continuous lock scheme */ | |
1363 | if (this->options & ONENAND_CONT_LOCK) { | |
1364 | /* Set start block address */ | |
1365 | this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS); | |
1366 | /* Set end block address */ | |
1367 | this->write_word(end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS); | |
1368 | /* Write unlock command */ | |
1369 | this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0); | |
1370 | ||
1371 | /* There's no return value */ | |
1372 | this->wait(mtd, FL_UNLOCKING); | |
1373 | ||
1374 | /* Sanity check */ | |
1375 | while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) | |
1376 | & ONENAND_CTRL_ONGO) | |
1377 | continue; | |
1378 | ||
1379 | /* Check lock status */ | |
1380 | status = this->read_word(this->base + ONENAND_REG_WP_STATUS); | |
1381 | if (!(status & ONENAND_WP_US)) | |
1382 | printk(KERN_ERR "wp status = 0x%x\n", status); | |
1383 | ||
1384 | return 0; | |
1385 | } | |
1386 | ||
1387 | /* Block lock scheme */ | |
1388 | for (block = start; block < end; block++) { | |
20ba89a3 KP |
1389 | /* Set block address */ |
1390 | value = onenand_block_address(this, block); | |
1391 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); | |
1392 | /* Select DataRAM for DDP */ | |
1393 | value = onenand_bufferram_address(this, block); | |
1394 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); | |
cd5f6346 KP |
1395 | /* Set start block address */ |
1396 | this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); | |
1397 | /* Write unlock command */ | |
1398 | this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0); | |
1399 | ||
1400 | /* There's no return value */ | |
1401 | this->wait(mtd, FL_UNLOCKING); | |
1402 | ||
1403 | /* Sanity check */ | |
1404 | while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) | |
1405 | & ONENAND_CTRL_ONGO) | |
1406 | continue; | |
1407 | ||
cd5f6346 KP |
1408 | /* Check lock status */ |
1409 | status = this->read_word(this->base + ONENAND_REG_WP_STATUS); | |
1410 | if (!(status & ONENAND_WP_US)) | |
1411 | printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status); | |
1412 | } | |
d5c5e78a | 1413 | |
cd5f6346 KP |
1414 | return 0; |
1415 | } | |
1416 | ||
493c6460 KP |
1417 | #ifdef CONFIG_MTD_ONENAND_OTP |
1418 | ||
1419 | /* Interal OTP operation */ | |
1420 | typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len, | |
1421 | size_t *retlen, u_char *buf); | |
1422 | ||
1423 | /** | |
1424 | * do_otp_read - [DEFAULT] Read OTP block area | |
1425 | * @param mtd MTD device structure | |
1426 | * @param from The offset to read | |
1427 | * @param len number of bytes to read | |
1428 | * @param retlen pointer to variable to store the number of readbytes | |
1429 | * @param buf the databuffer to put/get data | |
1430 | * | |
1431 | * Read OTP block area. | |
1432 | */ | |
1433 | static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len, | |
1434 | size_t *retlen, u_char *buf) | |
1435 | { | |
1436 | struct onenand_chip *this = mtd->priv; | |
1437 | int ret; | |
1438 | ||
1439 | /* Enter OTP access mode */ | |
1440 | this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); | |
1441 | this->wait(mtd, FL_OTPING); | |
1442 | ||
1443 | ret = mtd->read(mtd, from, len, retlen, buf); | |
1444 | ||
1445 | /* Exit OTP access mode */ | |
1446 | this->command(mtd, ONENAND_CMD_RESET, 0, 0); | |
1447 | this->wait(mtd, FL_RESETING); | |
1448 | ||
1449 | return ret; | |
1450 | } | |
1451 | ||
1452 | /** | |
1453 | * do_otp_write - [DEFAULT] Write OTP block area | |
1454 | * @param mtd MTD device structure | |
1455 | * @param from The offset to write | |
1456 | * @param len number of bytes to write | |
1457 | * @param retlen pointer to variable to store the number of write bytes | |
1458 | * @param buf the databuffer to put/get data | |
1459 | * | |
1460 | * Write OTP block area. | |
1461 | */ | |
1462 | static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len, | |
1463 | size_t *retlen, u_char *buf) | |
1464 | { | |
1465 | struct onenand_chip *this = mtd->priv; | |
1466 | unsigned char *pbuf = buf; | |
1467 | int ret; | |
1468 | ||
1469 | /* Force buffer page aligned */ | |
1470 | if (len < mtd->oobblock) { | |
1471 | memcpy(this->page_buf, buf, len); | |
1472 | memset(this->page_buf + len, 0xff, mtd->oobblock - len); | |
1473 | pbuf = this->page_buf; | |
1474 | len = mtd->oobblock; | |
1475 | } | |
1476 | ||
1477 | /* Enter OTP access mode */ | |
1478 | this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); | |
1479 | this->wait(mtd, FL_OTPING); | |
1480 | ||
1481 | ret = mtd->write(mtd, from, len, retlen, pbuf); | |
1482 | ||
1483 | /* Exit OTP access mode */ | |
1484 | this->command(mtd, ONENAND_CMD_RESET, 0, 0); | |
1485 | this->wait(mtd, FL_RESETING); | |
1486 | ||
1487 | return ret; | |
1488 | } | |
1489 | ||
1490 | /** | |
1491 | * do_otp_lock - [DEFAULT] Lock OTP block area | |
1492 | * @param mtd MTD device structure | |
1493 | * @param from The offset to lock | |
1494 | * @param len number of bytes to lock | |
1495 | * @param retlen pointer to variable to store the number of lock bytes | |
1496 | * @param buf the databuffer to put/get data | |
1497 | * | |
1498 | * Lock OTP block area. | |
1499 | */ | |
1500 | static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len, | |
1501 | size_t *retlen, u_char *buf) | |
1502 | { | |
1503 | struct onenand_chip *this = mtd->priv; | |
1504 | int ret; | |
1505 | ||
1506 | /* Enter OTP access mode */ | |
1507 | this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); | |
1508 | this->wait(mtd, FL_OTPING); | |
1509 | ||
1510 | ret = mtd->write_oob(mtd, from, len, retlen, buf); | |
1511 | ||
1512 | /* Exit OTP access mode */ | |
1513 | this->command(mtd, ONENAND_CMD_RESET, 0, 0); | |
1514 | this->wait(mtd, FL_RESETING); | |
1515 | ||
1516 | return ret; | |
1517 | } | |
1518 | ||
1519 | /** | |
1520 | * onenand_otp_walk - [DEFAULT] Handle OTP operation | |
1521 | * @param mtd MTD device structure | |
1522 | * @param from The offset to read/write | |
1523 | * @param len number of bytes to read/write | |
1524 | * @param retlen pointer to variable to store the number of read bytes | |
1525 | * @param buf the databuffer to put/get data | |
1526 | * @param action do given action | |
1527 | * @param mode specify user and factory | |
1528 | * | |
1529 | * Handle OTP operation. | |
1530 | */ | |
1531 | static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len, | |
1532 | size_t *retlen, u_char *buf, | |
1533 | otp_op_t action, int mode) | |
1534 | { | |
1535 | struct onenand_chip *this = mtd->priv; | |
1536 | int otp_pages; | |
1537 | int density; | |
1538 | int ret = 0; | |
1539 | ||
1540 | *retlen = 0; | |
1541 | ||
1542 | density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT; | |
1543 | if (density < ONENAND_DEVICE_DENSITY_512Mb) | |
1544 | otp_pages = 20; | |
1545 | else | |
1546 | otp_pages = 10; | |
1547 | ||
1548 | if (mode == MTD_OTP_FACTORY) { | |
1549 | from += mtd->oobblock * otp_pages; | |
1550 | otp_pages = 64 - otp_pages; | |
1551 | } | |
1552 | ||
1553 | /* Check User/Factory boundary */ | |
1554 | if (((mtd->oobblock * otp_pages) - (from + len)) < 0) | |
1555 | return 0; | |
1556 | ||
1557 | while (len > 0 && otp_pages > 0) { | |
1558 | if (!action) { /* OTP Info functions */ | |
1559 | struct otp_info *otpinfo; | |
1560 | ||
1561 | len -= sizeof(struct otp_info); | |
1562 | if (len <= 0) | |
1563 | return -ENOSPC; | |
1564 | ||
1565 | otpinfo = (struct otp_info *) buf; | |
1566 | otpinfo->start = from; | |
1567 | otpinfo->length = mtd->oobblock; | |
1568 | otpinfo->locked = 0; | |
1569 | ||
1570 | from += mtd->oobblock; | |
1571 | buf += sizeof(struct otp_info); | |
1572 | *retlen += sizeof(struct otp_info); | |
1573 | } else { | |
1574 | size_t tmp_retlen; | |
1575 | int size = len; | |
1576 | ||
1577 | ret = action(mtd, from, len, &tmp_retlen, buf); | |
1578 | ||
1579 | buf += size; | |
1580 | len -= size; | |
1581 | *retlen += size; | |
1582 | ||
1583 | if (ret < 0) | |
1584 | return ret; | |
1585 | } | |
1586 | otp_pages--; | |
1587 | } | |
1588 | ||
1589 | return 0; | |
1590 | } | |
1591 | ||
1592 | /** | |
1593 | * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info | |
1594 | * @param mtd MTD device structure | |
1595 | * @param buf the databuffer to put/get data | |
1596 | * @param len number of bytes to read | |
1597 | * | |
1598 | * Read factory OTP info. | |
1599 | */ | |
1600 | static int onenand_get_fact_prot_info(struct mtd_info *mtd, | |
1601 | struct otp_info *buf, size_t len) | |
1602 | { | |
1603 | size_t retlen; | |
1604 | int ret; | |
1605 | ||
1606 | ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY); | |
1607 | ||
1608 | return ret ? : retlen; | |
1609 | } | |
1610 | ||
1611 | /** | |
1612 | * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area | |
1613 | * @param mtd MTD device structure | |
1614 | * @param from The offset to read | |
1615 | * @param len number of bytes to read | |
1616 | * @param retlen pointer to variable to store the number of read bytes | |
1617 | * @param buf the databuffer to put/get data | |
1618 | * | |
1619 | * Read factory OTP area. | |
1620 | */ | |
1621 | static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from, | |
1622 | size_t len, size_t *retlen, u_char *buf) | |
1623 | { | |
1624 | return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY); | |
1625 | } | |
1626 | ||
1627 | /** | |
1628 | * onenand_get_user_prot_info - [MTD Interface] Read user OTP info | |
1629 | * @param mtd MTD device structure | |
1630 | * @param buf the databuffer to put/get data | |
1631 | * @param len number of bytes to read | |
1632 | * | |
1633 | * Read user OTP info. | |
1634 | */ | |
1635 | static int onenand_get_user_prot_info(struct mtd_info *mtd, | |
1636 | struct otp_info *buf, size_t len) | |
1637 | { | |
1638 | size_t retlen; | |
1639 | int ret; | |
1640 | ||
1641 | ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER); | |
1642 | ||
1643 | return ret ? : retlen; | |
1644 | } | |
1645 | ||
1646 | /** | |
1647 | * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area | |
1648 | * @param mtd MTD device structure | |
1649 | * @param from The offset to read | |
1650 | * @param len number of bytes to read | |
1651 | * @param retlen pointer to variable to store the number of read bytes | |
1652 | * @param buf the databuffer to put/get data | |
1653 | * | |
1654 | * Read user OTP area. | |
1655 | */ | |
1656 | static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from, | |
1657 | size_t len, size_t *retlen, u_char *buf) | |
1658 | { | |
1659 | return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER); | |
1660 | } | |
1661 | ||
1662 | /** | |
1663 | * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area | |
1664 | * @param mtd MTD device structure | |
1665 | * @param from The offset to write | |
1666 | * @param len number of bytes to write | |
1667 | * @param retlen pointer to variable to store the number of write bytes | |
1668 | * @param buf the databuffer to put/get data | |
1669 | * | |
1670 | * Write user OTP area. | |
1671 | */ | |
1672 | static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from, | |
1673 | size_t len, size_t *retlen, u_char *buf) | |
1674 | { | |
1675 | return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER); | |
1676 | } | |
1677 | ||
1678 | /** | |
1679 | * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area | |
1680 | * @param mtd MTD device structure | |
1681 | * @param from The offset to lock | |
1682 | * @param len number of bytes to unlock | |
1683 | * | |
1684 | * Write lock mark on spare area in page 0 in OTP block | |
1685 | */ | |
1686 | static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from, | |
1687 | size_t len) | |
1688 | { | |
1689 | unsigned char oob_buf[64]; | |
1690 | size_t retlen; | |
1691 | int ret; | |
1692 | ||
1693 | memset(oob_buf, 0xff, mtd->oobsize); | |
1694 | /* | |
1695 | * Note: OTP lock operation | |
1696 | * OTP block : 0xXXFC | |
1697 | * 1st block : 0xXXF3 (If chip support) | |
1698 | * Both : 0xXXF0 (If chip support) | |
1699 | */ | |
1700 | oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC; | |
1701 | ||
1702 | /* | |
1703 | * Write lock mark to 8th word of sector0 of page0 of the spare0. | |
1704 | * We write 16 bytes spare area instead of 2 bytes. | |
1705 | */ | |
1706 | from = 0; | |
1707 | len = 16; | |
1708 | ||
1709 | ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER); | |
1710 | ||
1711 | return ret ? : retlen; | |
1712 | } | |
1713 | #endif /* CONFIG_MTD_ONENAND_OTP */ | |
1714 | ||
cd5f6346 KP |
1715 | /** |
1716 | * onenand_print_device_info - Print device ID | |
1717 | * @param device device ID | |
1718 | * | |
1719 | * Print device ID | |
1720 | */ | |
1721 | static void onenand_print_device_info(int device) | |
1722 | { | |
1723 | int vcc, demuxed, ddp, density; | |
1724 | ||
1725 | vcc = device & ONENAND_DEVICE_VCC_MASK; | |
1726 | demuxed = device & ONENAND_DEVICE_IS_DEMUX; | |
1727 | ddp = device & ONENAND_DEVICE_IS_DDP; | |
1728 | density = device >> ONENAND_DEVICE_DENSITY_SHIFT; | |
1729 | printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n", | |
1730 | demuxed ? "" : "Muxed ", | |
1731 | ddp ? "(DDP)" : "", | |
1732 | (16 << density), | |
1733 | vcc ? "2.65/3.3" : "1.8", | |
1734 | device); | |
1735 | } | |
1736 | ||
1737 | static const struct onenand_manufacturers onenand_manuf_ids[] = { | |
1738 | {ONENAND_MFR_SAMSUNG, "Samsung"}, | |
cd5f6346 KP |
1739 | }; |
1740 | ||
1741 | /** | |
1742 | * onenand_check_maf - Check manufacturer ID | |
1743 | * @param manuf manufacturer ID | |
1744 | * | |
1745 | * Check manufacturer ID | |
1746 | */ | |
1747 | static int onenand_check_maf(int manuf) | |
1748 | { | |
37b1cc39 KP |
1749 | int size = ARRAY_SIZE(onenand_manuf_ids); |
1750 | char *name; | |
cd5f6346 KP |
1751 | int i; |
1752 | ||
37b1cc39 | 1753 | for (i = 0; i < size; i++) |
cd5f6346 KP |
1754 | if (manuf == onenand_manuf_ids[i].id) |
1755 | break; | |
cd5f6346 | 1756 | |
37b1cc39 KP |
1757 | if (i < size) |
1758 | name = onenand_manuf_ids[i].name; | |
1759 | else | |
1760 | name = "Unknown"; | |
1761 | ||
1762 | printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf); | |
cd5f6346 | 1763 | |
37b1cc39 | 1764 | return (i == size); |
cd5f6346 KP |
1765 | } |
1766 | ||
1767 | /** | |
1768 | * onenand_probe - [OneNAND Interface] Probe the OneNAND device | |
1769 | * @param mtd MTD device structure | |
1770 | * | |
1771 | * OneNAND detection method: | |
1772 | * Compare the the values from command with ones from register | |
1773 | */ | |
1774 | static int onenand_probe(struct mtd_info *mtd) | |
1775 | { | |
1776 | struct onenand_chip *this = mtd->priv; | |
1777 | int bram_maf_id, bram_dev_id, maf_id, dev_id; | |
1778 | int version_id; | |
1779 | int density; | |
1780 | ||
1781 | /* Send the command for reading device ID from BootRAM */ | |
1782 | this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); | |
1783 | ||
1784 | /* Read manufacturer and device IDs from BootRAM */ | |
1785 | bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); | |
1786 | bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); | |
1787 | ||
1788 | /* Check manufacturer ID */ | |
1789 | if (onenand_check_maf(bram_maf_id)) | |
1790 | return -ENXIO; | |
1791 | ||
1792 | /* Reset OneNAND to read default register values */ | |
1793 | this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); | |
1794 | ||
1795 | /* Read manufacturer and device IDs from Register */ | |
1796 | maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); | |
1797 | dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); | |
1798 | ||
1799 | /* Check OneNAND device */ | |
1800 | if (maf_id != bram_maf_id || dev_id != bram_dev_id) | |
1801 | return -ENXIO; | |
1802 | ||
1803 | /* Flash device information */ | |
1804 | onenand_print_device_info(dev_id); | |
1805 | this->device_id = dev_id; | |
1806 | ||
1807 | density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; | |
1808 | this->chipsize = (16 << density) << 20; | |
83a36838 KP |
1809 | /* Set density mask. it is used for DDP */ |
1810 | this->density_mask = (1 << (density + 6)); | |
cd5f6346 KP |
1811 | |
1812 | /* OneNAND page size & block size */ | |
1813 | /* The data buffer size is equal to page size */ | |
1814 | mtd->oobblock = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); | |
1815 | mtd->oobsize = mtd->oobblock >> 5; | |
1816 | /* Pagers per block is always 64 in OneNAND */ | |
1817 | mtd->erasesize = mtd->oobblock << 6; | |
1818 | ||
1819 | this->erase_shift = ffs(mtd->erasesize) - 1; | |
1820 | this->page_shift = ffs(mtd->oobblock) - 1; | |
1821 | this->ppb_shift = (this->erase_shift - this->page_shift); | |
1822 | this->page_mask = (mtd->erasesize / mtd->oobblock) - 1; | |
1823 | ||
1824 | /* REVIST: Multichip handling */ | |
1825 | ||
1826 | mtd->size = this->chipsize; | |
1827 | ||
1828 | /* Version ID */ | |
1829 | version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); | |
1830 | printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id); | |
1831 | ||
1832 | /* Lock scheme */ | |
1833 | if (density <= ONENAND_DEVICE_DENSITY_512Mb && | |
1834 | !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) { | |
1835 | printk(KERN_INFO "Lock scheme is Continues Lock\n"); | |
1836 | this->options |= ONENAND_CONT_LOCK; | |
1837 | } | |
d5c5e78a | 1838 | |
cd5f6346 KP |
1839 | return 0; |
1840 | } | |
1841 | ||
a41371eb KP |
1842 | /** |
1843 | * onenand_suspend - [MTD Interface] Suspend the OneNAND flash | |
1844 | * @param mtd MTD device structure | |
1845 | */ | |
1846 | static int onenand_suspend(struct mtd_info *mtd) | |
1847 | { | |
1848 | return onenand_get_device(mtd, FL_PM_SUSPENDED); | |
1849 | } | |
1850 | ||
1851 | /** | |
1852 | * onenand_resume - [MTD Interface] Resume the OneNAND flash | |
1853 | * @param mtd MTD device structure | |
1854 | */ | |
1855 | static void onenand_resume(struct mtd_info *mtd) | |
1856 | { | |
1857 | struct onenand_chip *this = mtd->priv; | |
1858 | ||
1859 | if (this->state == FL_PM_SUSPENDED) | |
1860 | onenand_release_device(mtd); | |
1861 | else | |
1862 | printk(KERN_ERR "resume() called for the chip which is not" | |
1863 | "in suspended state\n"); | |
1864 | } | |
1865 | ||
cd5f6346 KP |
1866 | /** |
1867 | * onenand_scan - [OneNAND Interface] Scan for the OneNAND device | |
1868 | * @param mtd MTD device structure | |
1869 | * @param maxchips Number of chips to scan for | |
1870 | * | |
1871 | * This fills out all the not initialized function pointers | |
1872 | * with the defaults. | |
1873 | * The flash ID is read and the mtd/chip structures are | |
1874 | * filled with the appropriate values. | |
1875 | */ | |
1876 | int onenand_scan(struct mtd_info *mtd, int maxchips) | |
1877 | { | |
1878 | struct onenand_chip *this = mtd->priv; | |
1879 | ||
1880 | if (!this->read_word) | |
1881 | this->read_word = onenand_readw; | |
1882 | if (!this->write_word) | |
1883 | this->write_word = onenand_writew; | |
1884 | ||
1885 | if (!this->command) | |
1886 | this->command = onenand_command; | |
1887 | if (!this->wait) | |
1888 | this->wait = onenand_wait; | |
1889 | ||
1890 | if (!this->read_bufferram) | |
1891 | this->read_bufferram = onenand_read_bufferram; | |
1892 | if (!this->write_bufferram) | |
1893 | this->write_bufferram = onenand_write_bufferram; | |
1894 | ||
cdc00130 KP |
1895 | if (!this->block_markbad) |
1896 | this->block_markbad = onenand_default_block_markbad; | |
1897 | if (!this->scan_bbt) | |
1898 | this->scan_bbt = onenand_default_bbt; | |
1899 | ||
cd5f6346 KP |
1900 | if (onenand_probe(mtd)) |
1901 | return -ENXIO; | |
1902 | ||
52b0eea7 KP |
1903 | /* Set Sync. Burst Read after probing */ |
1904 | if (this->mmcontrol) { | |
1905 | printk(KERN_INFO "OneNAND Sync. Burst Read support\n"); | |
1906 | this->read_bufferram = onenand_sync_read_bufferram; | |
1907 | } | |
1908 | ||
532a37cf KP |
1909 | /* Allocate buffers, if necessary */ |
1910 | if (!this->page_buf) { | |
1911 | size_t len; | |
1912 | len = mtd->oobblock + mtd->oobsize; | |
1913 | this->page_buf = kmalloc(len, GFP_KERNEL); | |
1914 | if (!this->page_buf) { | |
1915 | printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n"); | |
1916 | return -ENOMEM; | |
1917 | } | |
1918 | this->options |= ONENAND_PAGEBUF_ALLOC; | |
1919 | } | |
1920 | ||
cd5f6346 KP |
1921 | this->state = FL_READY; |
1922 | init_waitqueue_head(&this->wq); | |
1923 | spin_lock_init(&this->chip_lock); | |
1924 | ||
1925 | switch (mtd->oobsize) { | |
1926 | case 64: | |
1927 | this->autooob = &onenand_oob_64; | |
1928 | break; | |
1929 | ||
1930 | case 32: | |
1931 | this->autooob = &onenand_oob_32; | |
1932 | break; | |
1933 | ||
1934 | default: | |
1935 | printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n", | |
1936 | mtd->oobsize); | |
1937 | /* To prevent kernel oops */ | |
1938 | this->autooob = &onenand_oob_32; | |
1939 | break; | |
1940 | } | |
1941 | ||
1942 | memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo)); | |
d5c5e78a | 1943 | |
cd5f6346 KP |
1944 | /* Fill in remaining MTD driver data */ |
1945 | mtd->type = MTD_NANDFLASH; | |
1946 | mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC; | |
1947 | mtd->ecctype = MTD_ECC_SW; | |
1948 | mtd->erase = onenand_erase; | |
1949 | mtd->point = NULL; | |
1950 | mtd->unpoint = NULL; | |
1951 | mtd->read = onenand_read; | |
1952 | mtd->write = onenand_write; | |
1953 | mtd->read_ecc = onenand_read_ecc; | |
1954 | mtd->write_ecc = onenand_write_ecc; | |
1955 | mtd->read_oob = onenand_read_oob; | |
1956 | mtd->write_oob = onenand_write_oob; | |
493c6460 KP |
1957 | #ifdef CONFIG_MTD_ONENAND_OTP |
1958 | mtd->get_fact_prot_info = onenand_get_fact_prot_info; | |
1959 | mtd->read_fact_prot_reg = onenand_read_fact_prot_reg; | |
1960 | mtd->get_user_prot_info = onenand_get_user_prot_info; | |
1961 | mtd->read_user_prot_reg = onenand_read_user_prot_reg; | |
1962 | mtd->write_user_prot_reg = onenand_write_user_prot_reg; | |
1963 | mtd->lock_user_prot_reg = onenand_lock_user_prot_reg; | |
1964 | #endif | |
cd5f6346 KP |
1965 | mtd->readv = NULL; |
1966 | mtd->readv_ecc = NULL; | |
1967 | mtd->writev = onenand_writev; | |
1968 | mtd->writev_ecc = onenand_writev_ecc; | |
1969 | mtd->sync = onenand_sync; | |
1970 | mtd->lock = NULL; | |
1971 | mtd->unlock = onenand_unlock; | |
a41371eb KP |
1972 | mtd->suspend = onenand_suspend; |
1973 | mtd->resume = onenand_resume; | |
cd5f6346 KP |
1974 | mtd->block_isbad = onenand_block_isbad; |
1975 | mtd->block_markbad = onenand_block_markbad; | |
1976 | mtd->owner = THIS_MODULE; | |
1977 | ||
1978 | /* Unlock whole block */ | |
1979 | mtd->unlock(mtd, 0x0, this->chipsize); | |
1980 | ||
cdc00130 | 1981 | return this->scan_bbt(mtd); |
cd5f6346 KP |
1982 | } |
1983 | ||
1984 | /** | |
1985 | * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device | |
1986 | * @param mtd MTD device structure | |
1987 | */ | |
1988 | void onenand_release(struct mtd_info *mtd) | |
1989 | { | |
532a37cf KP |
1990 | struct onenand_chip *this = mtd->priv; |
1991 | ||
cd5f6346 KP |
1992 | #ifdef CONFIG_MTD_PARTITIONS |
1993 | /* Deregister partitions */ | |
1994 | del_mtd_partitions (mtd); | |
1995 | #endif | |
1996 | /* Deregister the device */ | |
1997 | del_mtd_device (mtd); | |
532a37cf KP |
1998 | |
1999 | /* Free bad block table memory, if allocated */ | |
2000 | if (this->bbm) | |
2001 | kfree(this->bbm); | |
2002 | /* Buffer allocated by onenand_scan */ | |
2003 | if (this->options & ONENAND_PAGEBUF_ALLOC) | |
2004 | kfree(this->page_buf); | |
cd5f6346 KP |
2005 | } |
2006 | ||
2007 | EXPORT_SYMBOL_GPL(onenand_scan); | |
2008 | EXPORT_SYMBOL_GPL(onenand_release); | |
2009 | ||
2010 | MODULE_LICENSE("GPL"); | |
2011 | MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>"); | |
2012 | MODULE_DESCRIPTION("Generic OneNAND flash driver code"); |