[MTD] NAND Replace oobinfo by ecclayout
[deliverable/linux.git] / drivers / mtd / onenand / onenand_base.c
CommitLineData
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1/*
2 * linux/drivers/mtd/onenand/onenand_base.c
3 *
4 * Copyright (C) 2005 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/init.h>
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15#include <linux/sched.h>
16#include <linux/jiffies.h>
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17#include <linux/mtd/mtd.h>
18#include <linux/mtd/onenand.h>
19#include <linux/mtd/partitions.h>
20
21#include <asm/io.h>
22
23/**
24 * onenand_oob_64 - oob info for large (2KB) page
25 */
5bd34c09 26static struct nand_ecclayout onenand_oob_64 = {
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27 .eccbytes = 20,
28 .eccpos = {
29 8, 9, 10, 11, 12,
30 24, 25, 26, 27, 28,
31 40, 41, 42, 43, 44,
32 56, 57, 58, 59, 60,
33 },
34 .oobfree = {
35 {2, 3}, {14, 2}, {18, 3}, {30, 2},
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36 {34, 3}, {46, 2}, {50, 3}, {62, 2}
37 }
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38};
39
40/**
41 * onenand_oob_32 - oob info for middle (1KB) page
42 */
5bd34c09 43static struct nand_ecclayout onenand_oob_32 = {
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44 .eccbytes = 10,
45 .eccpos = {
46 8, 9, 10, 11, 12,
47 24, 25, 26, 27, 28,
48 },
49 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
50};
51
52static const unsigned char ffchars[] = {
53 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
54 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
55 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
56 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
57 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
58 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
61};
62
63/**
64 * onenand_readw - [OneNAND Interface] Read OneNAND register
65 * @param addr address to read
66 *
67 * Read OneNAND register
68 */
69static unsigned short onenand_readw(void __iomem *addr)
70{
71 return readw(addr);
72}
73
74/**
75 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
76 * @param value value to write
77 * @param addr address to write
78 *
79 * Write OneNAND register with value
80 */
81static void onenand_writew(unsigned short value, void __iomem *addr)
82{
83 writew(value, addr);
84}
85
86/**
87 * onenand_block_address - [DEFAULT] Get block address
83a36838 88 * @param this onenand chip data structure
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89 * @param block the block
90 * @return translated block address if DDP, otherwise same
91 *
92 * Setup Start Address 1 Register (F100h)
93 */
83a36838 94static int onenand_block_address(struct onenand_chip *this, int block)
cd5f6346 95{
83a36838 96 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
cd5f6346 97 /* Device Flash Core select, NAND Flash Block Address */
83a36838 98 int dfs = 0;
cd5f6346 99
83a36838 100 if (block & this->density_mask)
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101 dfs = 1;
102
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103 return (dfs << ONENAND_DDP_SHIFT) |
104 (block & (this->density_mask - 1));
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105 }
106
107 return block;
108}
109
110/**
111 * onenand_bufferram_address - [DEFAULT] Get bufferram address
83a36838 112 * @param this onenand chip data structure
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113 * @param block the block
114 * @return set DBS value if DDP, otherwise 0
115 *
116 * Setup Start Address 2 Register (F101h) for DDP
117 */
83a36838 118static int onenand_bufferram_address(struct onenand_chip *this, int block)
cd5f6346 119{
83a36838 120 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
cd5f6346 121 /* Device BufferRAM Select */
83a36838 122 int dbs = 0;
cd5f6346 123
83a36838 124 if (block & this->density_mask)
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125 dbs = 1;
126
127 return (dbs << ONENAND_DDP_SHIFT);
128 }
129
130 return 0;
131}
132
133/**
134 * onenand_page_address - [DEFAULT] Get page address
135 * @param page the page address
136 * @param sector the sector address
137 * @return combined page and sector address
138 *
139 * Setup Start Address 8 Register (F107h)
140 */
141static int onenand_page_address(int page, int sector)
142{
143 /* Flash Page Address, Flash Sector Address */
144 int fpa, fsa;
145
146 fpa = page & ONENAND_FPA_MASK;
147 fsa = sector & ONENAND_FSA_MASK;
148
149 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
150}
151
152/**
153 * onenand_buffer_address - [DEFAULT] Get buffer address
154 * @param dataram1 DataRAM index
155 * @param sectors the sector address
156 * @param count the number of sectors
157 * @return the start buffer value
158 *
159 * Setup Start Buffer Register (F200h)
160 */
161static int onenand_buffer_address(int dataram1, int sectors, int count)
162{
163 int bsa, bsc;
164
165 /* BufferRAM Sector Address */
166 bsa = sectors & ONENAND_BSA_MASK;
167
168 if (dataram1)
169 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
170 else
171 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
172
173 /* BufferRAM Sector Count */
174 bsc = count & ONENAND_BSC_MASK;
175
176 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
177}
178
179/**
180 * onenand_command - [DEFAULT] Send command to OneNAND device
181 * @param mtd MTD device structure
182 * @param cmd the command to be sent
183 * @param addr offset to read from or write to
184 * @param len number of bytes to read or write
185 *
186 * Send command to OneNAND device. This function is used for middle/large page
187 * devices (1KB/2KB Bytes per page)
188 */
189static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
190{
191 struct onenand_chip *this = mtd->priv;
493c6460 192 int value, readcmd = 0, block_cmd = 0;
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193 int block, page;
194 /* Now we use page size operation */
195 int sectors = 4, count = 4;
196
197 /* Address translation */
198 switch (cmd) {
199 case ONENAND_CMD_UNLOCK:
200 case ONENAND_CMD_LOCK:
201 case ONENAND_CMD_LOCK_TIGHT:
202 block = -1;
203 page = -1;
204 break;
205
206 case ONENAND_CMD_ERASE:
207 case ONENAND_CMD_BUFFERRAM:
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208 case ONENAND_CMD_OTP_ACCESS:
209 block_cmd = 1;
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210 block = (int) (addr >> this->erase_shift);
211 page = -1;
212 break;
213
214 default:
215 block = (int) (addr >> this->erase_shift);
216 page = (int) (addr >> this->page_shift);
217 page &= this->page_mask;
218 break;
219 }
220
221 /* NOTE: The setting order of the registers is very important! */
222 if (cmd == ONENAND_CMD_BUFFERRAM) {
223 /* Select DataRAM for DDP */
83a36838 224 value = onenand_bufferram_address(this, block);
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225 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
226
227 /* Switch to the next data buffer */
228 ONENAND_SET_NEXT_BUFFERRAM(this);
229
230 return 0;
231 }
232
233 if (block != -1) {
234 /* Write 'DFS, FBA' of Flash */
83a36838 235 value = onenand_block_address(this, block);
cd5f6346 236 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
3cecf69e 237
75287070 238 if (block_cmd) {
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239 /* Select DataRAM for DDP */
240 value = onenand_bufferram_address(this, block);
241 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
242 }
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243 }
244
245 if (page != -1) {
246 int dataram;
247
248 switch (cmd) {
249 case ONENAND_CMD_READ:
250 case ONENAND_CMD_READOOB:
251 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
252 readcmd = 1;
253 break;
254
255 default:
256 dataram = ONENAND_CURRENT_BUFFERRAM(this);
257 break;
258 }
259
260 /* Write 'FPA, FSA' of Flash */
261 value = onenand_page_address(page, sectors);
262 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
263
264 /* Write 'BSA, BSC' of DataRAM */
265 value = onenand_buffer_address(dataram, sectors, count);
266 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
d5c5e78a 267
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268 if (readcmd) {
269 /* Select DataRAM for DDP */
83a36838 270 value = onenand_bufferram_address(this, block);
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271 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
272 }
273 }
274
275 /* Interrupt clear */
276 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
277
278 /* Write command */
279 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
280
281 return 0;
282}
283
284/**
285 * onenand_wait - [DEFAULT] wait until the command is done
286 * @param mtd MTD device structure
287 * @param state state to select the max. timeout value
288 *
289 * Wait for command done. This applies to all OneNAND command
290 * Read can take up to 30us, erase up to 2ms and program up to 350us
291 * according to general OneNAND specs
292 */
293static int onenand_wait(struct mtd_info *mtd, int state)
294{
295 struct onenand_chip * this = mtd->priv;
296 unsigned long timeout;
297 unsigned int flags = ONENAND_INT_MASTER;
298 unsigned int interrupt = 0;
299 unsigned int ctrl, ecc;
300
301 /* The 20 msec is enough */
302 timeout = jiffies + msecs_to_jiffies(20);
303 while (time_before(jiffies, timeout)) {
304 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
305
306 if (interrupt & flags)
307 break;
308
309 if (state != FL_READING)
310 cond_resched();
628bee65 311 touch_softlockup_watchdog();
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312 }
313 /* To get correct interrupt status in timeout case */
314 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
315
316 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
317
318 if (ctrl & ONENAND_CTRL_ERROR) {
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319 /* It maybe occur at initial bad block */
320 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
321 /* Clear other interrupt bits for preventing ECC error */
322 interrupt &= ONENAND_INT_MASTER;
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323 }
324
325 if (ctrl & ONENAND_CTRL_LOCK) {
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326 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x\n", ctrl);
327 return -EACCES;
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328 }
329
330 if (interrupt & ONENAND_INT_READ) {
331 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
332 if (ecc & ONENAND_ECC_2BIT_ALL) {
cdc00130 333 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
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334 return -EBADMSG;
335 }
336 }
337
338 return 0;
339}
340
341/**
342 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
343 * @param mtd MTD data structure
344 * @param area BufferRAM area
345 * @return offset given area
346 *
347 * Return BufferRAM offset given area
348 */
349static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
350{
351 struct onenand_chip *this = mtd->priv;
352
353 if (ONENAND_CURRENT_BUFFERRAM(this)) {
354 if (area == ONENAND_DATARAM)
28318776 355 return mtd->writesize;
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356 if (area == ONENAND_SPARERAM)
357 return mtd->oobsize;
358 }
359
360 return 0;
361}
362
363/**
364 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
365 * @param mtd MTD data structure
366 * @param area BufferRAM area
367 * @param buffer the databuffer to put/get data
368 * @param offset offset to read from or write to
369 * @param count number of bytes to read/write
370 *
371 * Read the BufferRAM area
372 */
373static int onenand_read_bufferram(struct mtd_info *mtd, int area,
374 unsigned char *buffer, int offset, size_t count)
375{
376 struct onenand_chip *this = mtd->priv;
377 void __iomem *bufferram;
378
379 bufferram = this->base + area;
380
381 bufferram += onenand_bufferram_offset(mtd, area);
382
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383 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
384 unsigned short word;
385
386 /* Align with word(16-bit) size */
387 count--;
388
389 /* Read word and save byte */
390 word = this->read_word(bufferram + offset + count);
391 buffer[count] = (word & 0xff);
392 }
393
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394 memcpy(buffer, bufferram + offset, count);
395
396 return 0;
397}
398
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399/**
400 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
401 * @param mtd MTD data structure
402 * @param area BufferRAM area
403 * @param buffer the databuffer to put/get data
404 * @param offset offset to read from or write to
405 * @param count number of bytes to read/write
406 *
407 * Read the BufferRAM area with Sync. Burst Mode
408 */
409static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
410 unsigned char *buffer, int offset, size_t count)
411{
412 struct onenand_chip *this = mtd->priv;
413 void __iomem *bufferram;
414
415 bufferram = this->base + area;
416
417 bufferram += onenand_bufferram_offset(mtd, area);
418
419 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
420
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421 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
422 unsigned short word;
423
424 /* Align with word(16-bit) size */
425 count--;
426
427 /* Read word and save byte */
428 word = this->read_word(bufferram + offset + count);
429 buffer[count] = (word & 0xff);
430 }
431
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432 memcpy(buffer, bufferram + offset, count);
433
434 this->mmcontrol(mtd, 0);
435
436 return 0;
437}
438
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439/**
440 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
441 * @param mtd MTD data structure
442 * @param area BufferRAM area
443 * @param buffer the databuffer to put/get data
444 * @param offset offset to read from or write to
445 * @param count number of bytes to read/write
446 *
447 * Write the BufferRAM area
448 */
449static int onenand_write_bufferram(struct mtd_info *mtd, int area,
450 const unsigned char *buffer, int offset, size_t count)
451{
452 struct onenand_chip *this = mtd->priv;
453 void __iomem *bufferram;
454
455 bufferram = this->base + area;
456
457 bufferram += onenand_bufferram_offset(mtd, area);
458
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459 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
460 unsigned short word;
461 int byte_offset;
462
463 /* Align with word(16-bit) size */
464 count--;
465
466 /* Calculate byte access offset */
467 byte_offset = offset + count;
468
469 /* Read word and save byte */
470 word = this->read_word(bufferram + byte_offset);
471 word = (word & ~0xff) | buffer[count];
472 this->write_word(word, bufferram + byte_offset);
473 }
474
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475 memcpy(bufferram + offset, buffer, count);
476
477 return 0;
478}
479
480/**
481 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
482 * @param mtd MTD data structure
483 * @param addr address to check
d5c5e78a 484 * @return 1 if there are valid data, otherwise 0
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485 *
486 * Check bufferram if there is data we required
487 */
488static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
489{
490 struct onenand_chip *this = mtd->priv;
491 int block, page;
492 int i;
d5c5e78a 493
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494 block = (int) (addr >> this->erase_shift);
495 page = (int) (addr >> this->page_shift);
496 page &= this->page_mask;
497
498 i = ONENAND_CURRENT_BUFFERRAM(this);
499
500 /* Is there valid data? */
501 if (this->bufferram[i].block == block &&
502 this->bufferram[i].page == page &&
503 this->bufferram[i].valid)
504 return 1;
505
506 return 0;
507}
508
509/**
510 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
511 * @param mtd MTD data structure
512 * @param addr address to update
513 * @param valid valid flag
514 *
515 * Update BufferRAM information
516 */
517static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
518 int valid)
519{
520 struct onenand_chip *this = mtd->priv;
521 int block, page;
522 int i;
d5c5e78a 523
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524 block = (int) (addr >> this->erase_shift);
525 page = (int) (addr >> this->page_shift);
526 page &= this->page_mask;
527
528 /* Invalidate BufferRAM */
529 for (i = 0; i < MAX_BUFFERRAM; i++) {
530 if (this->bufferram[i].block == block &&
531 this->bufferram[i].page == page)
532 this->bufferram[i].valid = 0;
533 }
534
535 /* Update BufferRAM */
536 i = ONENAND_CURRENT_BUFFERRAM(this);
537 this->bufferram[i].block = block;
538 this->bufferram[i].page = page;
539 this->bufferram[i].valid = valid;
540
541 return 0;
542}
543
544/**
545 * onenand_get_device - [GENERIC] Get chip for selected access
546 * @param mtd MTD device structure
547 * @param new_state the state which is requested
548 *
549 * Get the device and lock it for exclusive access
550 */
a41371eb 551static int onenand_get_device(struct mtd_info *mtd, int new_state)
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552{
553 struct onenand_chip *this = mtd->priv;
554 DECLARE_WAITQUEUE(wait, current);
555
556 /*
557 * Grab the lock and see if the device is available
558 */
559 while (1) {
560 spin_lock(&this->chip_lock);
561 if (this->state == FL_READY) {
562 this->state = new_state;
563 spin_unlock(&this->chip_lock);
564 break;
565 }
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566 if (new_state == FL_PM_SUSPENDED) {
567 spin_unlock(&this->chip_lock);
568 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
569 }
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570 set_current_state(TASK_UNINTERRUPTIBLE);
571 add_wait_queue(&this->wq, &wait);
572 spin_unlock(&this->chip_lock);
573 schedule();
574 remove_wait_queue(&this->wq, &wait);
575 }
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576
577 return 0;
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578}
579
580/**
581 * onenand_release_device - [GENERIC] release chip
582 * @param mtd MTD device structure
583 *
584 * Deselect, release chip lock and wake up anyone waiting on the device
585 */
586static void onenand_release_device(struct mtd_info *mtd)
587{
588 struct onenand_chip *this = mtd->priv;
589
590 /* Release the chip */
591 spin_lock(&this->chip_lock);
592 this->state = FL_READY;
593 wake_up(&this->wq);
594 spin_unlock(&this->chip_lock);
595}
596
597/**
9223a456 598 * onenand_read - [MTD Interface] Read data from flash
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599 * @param mtd MTD device structure
600 * @param from offset to read from
601 * @param len number of bytes to read
602 * @param retlen pointer to variable to store the number of read bytes
603 * @param buf the databuffer to put data
cd5f6346 604 *
9223a456
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605 * Read with ecc
606*/
607static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
608 size_t *retlen, u_char *buf)
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609{
610 struct onenand_chip *this = mtd->priv;
611 int read = 0, column;
612 int thislen;
613 int ret = 0;
614
9223a456 615 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
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616
617 /* Do not allow reads past end of device */
618 if ((from + len) > mtd->size) {
9223a456 619 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
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620 *retlen = 0;
621 return -EINVAL;
622 }
623
624 /* Grab the lock and see if the device is available */
625 onenand_get_device(mtd, FL_READING);
626
627 /* TODO handling oob */
628
629 while (read < len) {
28318776 630 thislen = min_t(int, mtd->writesize, len - read);
cd5f6346 631
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632 column = from & (mtd->writesize - 1);
633 if (column + thislen > mtd->writesize)
634 thislen = mtd->writesize - column;
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635
636 if (!onenand_check_bufferram(mtd, from)) {
28318776 637 this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
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638
639 ret = this->wait(mtd, FL_READING);
640 /* First copy data and check return value for ECC handling */
641 onenand_update_bufferram(mtd, from, 1);
642 }
643
644 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
645
646 read += thislen;
647
648 if (read == len)
649 break;
650
651 if (ret) {
9223a456 652 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: read failed = %d\n", ret);
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653 goto out;
654 }
655
656 from += thislen;
657 buf += thislen;
658 }
659
660out:
661 /* Deselect and wake up anyone waiting on the device */
662 onenand_release_device(mtd);
663
664 /*
665 * Return success, if no ECC failures, else -EBADMSG
666 * fs driver will take care of that, because
667 * retlen == desired len and result == -EBADMSG
668 */
669 *retlen = read;
670 return ret;
671}
672
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673/**
674 * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
675 * @param mtd MTD device structure
676 * @param from offset to read from
677 * @param len number of bytes to read
678 * @param retlen pointer to variable to store the number of read bytes
679 * @param buf the databuffer to put data
680 *
681 * OneNAND read out-of-band data from the spare area
682 */
683static int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
684 size_t *retlen, u_char *buf)
685{
686 struct onenand_chip *this = mtd->priv;
687 int read = 0, thislen, column;
688 int ret = 0;
689
690 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
691
692 /* Initialize return length value */
693 *retlen = 0;
694
695 /* Do not allow reads past end of device */
696 if (unlikely((from + len) > mtd->size)) {
697 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
698 return -EINVAL;
699 }
700
701 /* Grab the lock and see if the device is available */
702 onenand_get_device(mtd, FL_READING);
703
704 column = from & (mtd->oobsize - 1);
705
706 while (read < len) {
707 thislen = mtd->oobsize - column;
708 thislen = min_t(int, thislen, len);
709
710 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
711
712 onenand_update_bufferram(mtd, from, 0);
713
714 ret = this->wait(mtd, FL_READING);
715 /* First copy data and check return value for ECC handling */
716
717 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
718
719 read += thislen;
720
721 if (read == len)
722 break;
723
724 if (ret) {
725 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = %d\n", ret);
726 goto out;
727 }
728
729 buf += thislen;
730
731 /* Read more? */
732 if (read < len) {
733 /* Page size */
28318776 734 from += mtd->writesize;
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735 column = 0;
736 }
737 }
738
739out:
740 /* Deselect and wake up anyone waiting on the device */
741 onenand_release_device(mtd);
742
743 *retlen = read;
744 return ret;
745}
746
747#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
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748/**
749 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
750 * @param mtd MTD device structure
751 * @param buf the databuffer to verify
752 * @param to offset to read from
753 * @param len number of bytes to read and compare
754 *
755 */
756static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
757{
758 struct onenand_chip *this = mtd->priv;
759 char *readp = this->page_buf;
760 int column = to & (mtd->oobsize - 1);
761 int status, i;
762
763 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
764 onenand_update_bufferram(mtd, to, 0);
765 status = this->wait(mtd, FL_READING);
766 if (status)
767 return status;
768
769 this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
770
771 for(i = 0; i < len; i++)
772 if (buf[i] != 0xFF && buf[i] != readp[i])
773 return -EBADMSG;
774
775 return 0;
776}
777
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778/**
779 * onenand_verify_page - [GENERIC] verify the chip contents after a write
780 * @param mtd MTD device structure
781 * @param buf the databuffer to verify
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782 *
783 * Check DataRAM area directly
784 */
d36d63d4 785static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
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786{
787 struct onenand_chip *this = mtd->priv;
788 void __iomem *dataram0, *dataram1;
789 int ret = 0;
790
28318776 791 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
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792
793 ret = this->wait(mtd, FL_READING);
794 if (ret)
795 return ret;
796
797 onenand_update_bufferram(mtd, addr, 1);
798
799 /* Check, if the two dataram areas are same */
800 dataram0 = this->base + ONENAND_DATARAM;
28318776 801 dataram1 = dataram0 + mtd->writesize;
cd5f6346 802
28318776 803 if (memcmp(dataram0, dataram1, mtd->writesize))
cd5f6346 804 return -EBADMSG;
d5c5e78a 805
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806 return 0;
807}
808#else
809#define onenand_verify_page(...) (0)
8e6ec690 810#define onenand_verify_oob(...) (0)
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811#endif
812
28318776 813#define NOTALIGNED(x) ((x & (mtd->writesize - 1)) != 0)
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814
815/**
9223a456 816 * onenand_write - [MTD Interface] write buffer to FLASH
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817 * @param mtd MTD device structure
818 * @param to offset to write to
819 * @param len number of bytes to write
820 * @param retlen pointer to variable to store the number of written bytes
821 * @param buf the data to write
cd5f6346 822 *
9223a456 823 * Write with ECC
cd5f6346 824 */
9223a456
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825static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
826 size_t *retlen, const u_char *buf)
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827{
828 struct onenand_chip *this = mtd->priv;
829 int written = 0;
830 int ret = 0;
831
9223a456 832 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
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833
834 /* Initialize retlen, in case of early exit */
835 *retlen = 0;
836
837 /* Do not allow writes past end of device */
838 if (unlikely((to + len) > mtd->size)) {
9223a456 839 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
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840 return -EINVAL;
841 }
842
843 /* Reject writes, which are not page aligned */
844 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
9223a456 845 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
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846 return -EINVAL;
847 }
848
849 /* Grab the lock and see if the device is available */
850 onenand_get_device(mtd, FL_WRITING);
851
852 /* Loop until all data write */
853 while (written < len) {
28318776 854 int thislen = min_t(int, mtd->writesize, len - written);
cd5f6346 855
28318776 856 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->writesize);
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857
858 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
859 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
860
28318776 861 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
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862
863 onenand_update_bufferram(mtd, to, 1);
864
865 ret = this->wait(mtd, FL_WRITING);
866 if (ret) {
9223a456 867 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
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868 goto out;
869 }
870
871 written += thislen;
872
873 /* Only check verify write turn on */
d36d63d4 874 ret = onenand_verify_page(mtd, (u_char *) buf, to);
cd5f6346 875 if (ret) {
9223a456 876 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
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877 goto out;
878 }
879
880 if (written == len)
881 break;
882
883 to += thislen;
884 buf += thislen;
885 }
886
887out:
888 /* Deselect and wake up anyone waiting on the device */
889 onenand_release_device(mtd);
890
891 *retlen = written;
d5c5e78a 892
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893 return ret;
894}
895
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896/**
897 * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
898 * @param mtd MTD device structure
899 * @param to offset to write to
900 * @param len number of bytes to write
901 * @param retlen pointer to variable to store the number of written bytes
902 * @param buf the data to write
903 *
904 * OneNAND write out-of-band
905 */
906static int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
907 size_t *retlen, const u_char *buf)
908{
909 struct onenand_chip *this = mtd->priv;
8e6ec690 910 int column, ret = 0;
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911 int written = 0;
912
913 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
914
915 /* Initialize retlen, in case of early exit */
916 *retlen = 0;
917
918 /* Do not allow writes past end of device */
919 if (unlikely((to + len) > mtd->size)) {
920 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
921 return -EINVAL;
922 }
923
924 /* Grab the lock and see if the device is available */
925 onenand_get_device(mtd, FL_WRITING);
926
927 /* Loop until all data write */
928 while (written < len) {
929 int thislen = min_t(int, mtd->oobsize, len - written);
930
931 column = to & (mtd->oobsize - 1);
932
933 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
934
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935 /* We send data to spare ram with oobsize
936 * to prevent byte access */
937 memset(this->page_buf, 0xff, mtd->oobsize);
938 memcpy(this->page_buf + column, buf, thislen);
939 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
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940
941 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
942
943 onenand_update_bufferram(mtd, to, 0);
944
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945 ret = this->wait(mtd, FL_WRITING);
946 if (ret) {
947 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
948 goto out;
949 }
950
951 ret = onenand_verify_oob(mtd, buf, to, thislen);
952 if (ret) {
953 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
cd5f6346 954 goto out;
8e6ec690 955 }
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956
957 written += thislen;
958
959 if (written == len)
960 break;
961
962 to += thislen;
963 buf += thislen;
964 }
965
966out:
967 /* Deselect and wake up anyone waiting on the device */
968 onenand_release_device(mtd);
969
970 *retlen = written;
d5c5e78a 971
8e6ec690 972 return ret;
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973}
974
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975/**
976 * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
977 * @param mtd MTD device structure
978 * @param ofs offset from device start
979 * @param getchip 0, if the chip is already selected
980 * @param allowbbt 1, if its allowed to access the bbt area
981 *
982 * Check, if the block is bad. Either by reading the bad block table or
983 * calling of the scan function.
984 */
985static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
986{
987 struct onenand_chip *this = mtd->priv;
988 struct bbm_info *bbm = this->bbm;
989
990 /* Return info from the table */
991 return bbm->isbad_bbt(mtd, ofs, allowbbt);
992}
993
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994/**
995 * onenand_erase - [MTD Interface] erase block(s)
996 * @param mtd MTD device structure
997 * @param instr erase instruction
998 *
999 * Erase one ore more blocks
1000 */
1001static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1002{
1003 struct onenand_chip *this = mtd->priv;
1004 unsigned int block_size;
1005 loff_t addr;
1006 int len;
1007 int ret = 0;
1008
1009 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1010
1011 block_size = (1 << this->erase_shift);
1012
1013 /* Start address must align on block boundary */
1014 if (unlikely(instr->addr & (block_size - 1))) {
1015 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1016 return -EINVAL;
1017 }
1018
1019 /* Length must align on block boundary */
1020 if (unlikely(instr->len & (block_size - 1))) {
1021 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1022 return -EINVAL;
1023 }
1024
1025 /* Do not allow erase past end of device */
1026 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1027 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1028 return -EINVAL;
1029 }
1030
1031 instr->fail_addr = 0xffffffff;
1032
1033 /* Grab the lock and see if the device is available */
1034 onenand_get_device(mtd, FL_ERASING);
1035
1036 /* Loop throught the pages */
1037 len = instr->len;
1038 addr = instr->addr;
1039
1040 instr->state = MTD_ERASING;
1041
1042 while (len) {
1043
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1044 /* Check if we have a bad block, we do not erase bad blocks */
1045 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1046 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1047 instr->state = MTD_ERASE_FAILED;
1048 goto erase_exit;
1049 }
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1050
1051 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1052
1053 ret = this->wait(mtd, FL_ERASING);
1054 /* Check, if it is write protected */
1055 if (ret) {
1056 if (ret == -EPERM)
1057 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Device is write protected!!!\n");
1058 else
1059 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1060 instr->state = MTD_ERASE_FAILED;
1061 instr->fail_addr = addr;
1062 goto erase_exit;
1063 }
1064
1065 len -= block_size;
1066 addr += block_size;
1067 }
1068
1069 instr->state = MTD_ERASE_DONE;
1070
1071erase_exit:
1072
1073 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1074 /* Do call back function */
1075 if (!ret)
1076 mtd_erase_callback(instr);
1077
1078 /* Deselect and wake up anyone waiting on the device */
1079 onenand_release_device(mtd);
1080
1081 return ret;
1082}
1083
1084/**
1085 * onenand_sync - [MTD Interface] sync
1086 * @param mtd MTD device structure
1087 *
1088 * Sync is actually a wait for chip ready function
1089 */
1090static void onenand_sync(struct mtd_info *mtd)
1091{
1092 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1093
1094 /* Grab the lock and see if the device is available */
1095 onenand_get_device(mtd, FL_SYNCING);
1096
1097 /* Release it and go back */
1098 onenand_release_device(mtd);
1099}
1100
cdc00130 1101
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1102/**
1103 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1104 * @param mtd MTD device structure
1105 * @param ofs offset relative to mtd start
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1106 *
1107 * Check whether the block is bad
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1108 */
1109static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1110{
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1111 /* Check for invalid offset */
1112 if (ofs > mtd->size)
1113 return -EINVAL;
1114
1115 return onenand_block_checkbad(mtd, ofs, 1, 0);
1116}
1117
1118/**
1119 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1120 * @param mtd MTD device structure
1121 * @param ofs offset from device start
1122 *
1123 * This is the default implementation, which can be overridden by
1124 * a hardware specific driver.
1125 */
1126static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1127{
1128 struct onenand_chip *this = mtd->priv;
1129 struct bbm_info *bbm = this->bbm;
1130 u_char buf[2] = {0, 0};
1131 size_t retlen;
1132 int block;
1133
1134 /* Get block number */
1135 block = ((int) ofs) >> bbm->bbt_erase_shift;
1136 if (bbm->bbt)
1137 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1138
1139 /* We write two bytes, so we dont have to mess with 16 bit access */
1140 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1141 return mtd->write_oob(mtd, ofs , 2, &retlen, buf);
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1142}
1143
1144/**
1145 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1146 * @param mtd MTD device structure
1147 * @param ofs offset relative to mtd start
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1148 *
1149 * Mark the block as bad
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1150 */
1151static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1152{
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1153 struct onenand_chip *this = mtd->priv;
1154 int ret;
1155
1156 ret = onenand_block_isbad(mtd, ofs);
1157 if (ret) {
1158 /* If it was bad already, return success and do nothing */
1159 if (ret > 0)
1160 return 0;
1161 return ret;
1162 }
1163
1164 return this->block_markbad(mtd, ofs);
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1165}
1166
1167/**
1168 * onenand_unlock - [MTD Interface] Unlock block(s)
1169 * @param mtd MTD device structure
1170 * @param ofs offset relative to mtd start
1171 * @param len number of bytes to unlock
1172 *
1173 * Unlock one or more blocks
1174 */
1175static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1176{
1177 struct onenand_chip *this = mtd->priv;
1178 int start, end, block, value, status;
1179
1180 start = ofs >> this->erase_shift;
1181 end = len >> this->erase_shift;
1182
1183 /* Continuous lock scheme */
1184 if (this->options & ONENAND_CONT_LOCK) {
1185 /* Set start block address */
1186 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1187 /* Set end block address */
1188 this->write_word(end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1189 /* Write unlock command */
1190 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1191
1192 /* There's no return value */
1193 this->wait(mtd, FL_UNLOCKING);
1194
1195 /* Sanity check */
1196 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1197 & ONENAND_CTRL_ONGO)
1198 continue;
1199
1200 /* Check lock status */
1201 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1202 if (!(status & ONENAND_WP_US))
1203 printk(KERN_ERR "wp status = 0x%x\n", status);
1204
1205 return 0;
1206 }
1207
1208 /* Block lock scheme */
1209 for (block = start; block < end; block++) {
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1210 /* Set block address */
1211 value = onenand_block_address(this, block);
1212 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1213 /* Select DataRAM for DDP */
1214 value = onenand_bufferram_address(this, block);
1215 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
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1216 /* Set start block address */
1217 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1218 /* Write unlock command */
1219 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1220
1221 /* There's no return value */
1222 this->wait(mtd, FL_UNLOCKING);
1223
1224 /* Sanity check */
1225 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1226 & ONENAND_CTRL_ONGO)
1227 continue;
1228
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1229 /* Check lock status */
1230 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1231 if (!(status & ONENAND_WP_US))
1232 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1233 }
d5c5e78a 1234
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1235 return 0;
1236}
1237
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1238#ifdef CONFIG_MTD_ONENAND_OTP
1239
1240/* Interal OTP operation */
1241typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1242 size_t *retlen, u_char *buf);
1243
1244/**
1245 * do_otp_read - [DEFAULT] Read OTP block area
1246 * @param mtd MTD device structure
1247 * @param from The offset to read
1248 * @param len number of bytes to read
1249 * @param retlen pointer to variable to store the number of readbytes
1250 * @param buf the databuffer to put/get data
1251 *
1252 * Read OTP block area.
1253 */
1254static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1255 size_t *retlen, u_char *buf)
1256{
1257 struct onenand_chip *this = mtd->priv;
1258 int ret;
1259
1260 /* Enter OTP access mode */
1261 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1262 this->wait(mtd, FL_OTPING);
1263
1264 ret = mtd->read(mtd, from, len, retlen, buf);
1265
1266 /* Exit OTP access mode */
1267 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1268 this->wait(mtd, FL_RESETING);
1269
1270 return ret;
1271}
1272
1273/**
1274 * do_otp_write - [DEFAULT] Write OTP block area
1275 * @param mtd MTD device structure
1276 * @param from The offset to write
1277 * @param len number of bytes to write
1278 * @param retlen pointer to variable to store the number of write bytes
1279 * @param buf the databuffer to put/get data
1280 *
1281 * Write OTP block area.
1282 */
1283static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1284 size_t *retlen, u_char *buf)
1285{
1286 struct onenand_chip *this = mtd->priv;
1287 unsigned char *pbuf = buf;
1288 int ret;
1289
1290 /* Force buffer page aligned */
28318776 1291 if (len < mtd->writesize) {
493c6460 1292 memcpy(this->page_buf, buf, len);
28318776 1293 memset(this->page_buf + len, 0xff, mtd->writesize - len);
493c6460 1294 pbuf = this->page_buf;
28318776 1295 len = mtd->writesize;
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1296 }
1297
1298 /* Enter OTP access mode */
1299 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1300 this->wait(mtd, FL_OTPING);
1301
1302 ret = mtd->write(mtd, from, len, retlen, pbuf);
1303
1304 /* Exit OTP access mode */
1305 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1306 this->wait(mtd, FL_RESETING);
1307
1308 return ret;
1309}
1310
1311/**
1312 * do_otp_lock - [DEFAULT] Lock OTP block area
1313 * @param mtd MTD device structure
1314 * @param from The offset to lock
1315 * @param len number of bytes to lock
1316 * @param retlen pointer to variable to store the number of lock bytes
1317 * @param buf the databuffer to put/get data
1318 *
1319 * Lock OTP block area.
1320 */
1321static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1322 size_t *retlen, u_char *buf)
1323{
1324 struct onenand_chip *this = mtd->priv;
1325 int ret;
1326
1327 /* Enter OTP access mode */
1328 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1329 this->wait(mtd, FL_OTPING);
1330
1331 ret = mtd->write_oob(mtd, from, len, retlen, buf);
1332
1333 /* Exit OTP access mode */
1334 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1335 this->wait(mtd, FL_RESETING);
1336
1337 return ret;
1338}
1339
1340/**
1341 * onenand_otp_walk - [DEFAULT] Handle OTP operation
1342 * @param mtd MTD device structure
1343 * @param from The offset to read/write
1344 * @param len number of bytes to read/write
1345 * @param retlen pointer to variable to store the number of read bytes
1346 * @param buf the databuffer to put/get data
1347 * @param action do given action
1348 * @param mode specify user and factory
1349 *
1350 * Handle OTP operation.
1351 */
1352static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1353 size_t *retlen, u_char *buf,
1354 otp_op_t action, int mode)
1355{
1356 struct onenand_chip *this = mtd->priv;
1357 int otp_pages;
1358 int density;
1359 int ret = 0;
1360
1361 *retlen = 0;
1362
1363 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1364 if (density < ONENAND_DEVICE_DENSITY_512Mb)
1365 otp_pages = 20;
1366 else
1367 otp_pages = 10;
1368
1369 if (mode == MTD_OTP_FACTORY) {
28318776 1370 from += mtd->writesize * otp_pages;
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1371 otp_pages = 64 - otp_pages;
1372 }
1373
1374 /* Check User/Factory boundary */
28318776 1375 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
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1376 return 0;
1377
1378 while (len > 0 && otp_pages > 0) {
1379 if (!action) { /* OTP Info functions */
1380 struct otp_info *otpinfo;
1381
1382 len -= sizeof(struct otp_info);
1383 if (len <= 0)
1384 return -ENOSPC;
1385
1386 otpinfo = (struct otp_info *) buf;
1387 otpinfo->start = from;
28318776 1388 otpinfo->length = mtd->writesize;
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1389 otpinfo->locked = 0;
1390
28318776 1391 from += mtd->writesize;
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1392 buf += sizeof(struct otp_info);
1393 *retlen += sizeof(struct otp_info);
1394 } else {
1395 size_t tmp_retlen;
1396 int size = len;
1397
1398 ret = action(mtd, from, len, &tmp_retlen, buf);
1399
1400 buf += size;
1401 len -= size;
1402 *retlen += size;
1403
1404 if (ret < 0)
1405 return ret;
1406 }
1407 otp_pages--;
1408 }
1409
1410 return 0;
1411}
1412
1413/**
1414 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1415 * @param mtd MTD device structure
1416 * @param buf the databuffer to put/get data
1417 * @param len number of bytes to read
1418 *
1419 * Read factory OTP info.
1420 */
1421static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1422 struct otp_info *buf, size_t len)
1423{
1424 size_t retlen;
1425 int ret;
1426
1427 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1428
1429 return ret ? : retlen;
1430}
1431
1432/**
1433 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1434 * @param mtd MTD device structure
1435 * @param from The offset to read
1436 * @param len number of bytes to read
1437 * @param retlen pointer to variable to store the number of read bytes
1438 * @param buf the databuffer to put/get data
1439 *
1440 * Read factory OTP area.
1441 */
1442static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1443 size_t len, size_t *retlen, u_char *buf)
1444{
1445 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1446}
1447
1448/**
1449 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1450 * @param mtd MTD device structure
1451 * @param buf the databuffer to put/get data
1452 * @param len number of bytes to read
1453 *
1454 * Read user OTP info.
1455 */
1456static int onenand_get_user_prot_info(struct mtd_info *mtd,
1457 struct otp_info *buf, size_t len)
1458{
1459 size_t retlen;
1460 int ret;
1461
1462 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1463
1464 return ret ? : retlen;
1465}
1466
1467/**
1468 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1469 * @param mtd MTD device structure
1470 * @param from The offset to read
1471 * @param len number of bytes to read
1472 * @param retlen pointer to variable to store the number of read bytes
1473 * @param buf the databuffer to put/get data
1474 *
1475 * Read user OTP area.
1476 */
1477static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1478 size_t len, size_t *retlen, u_char *buf)
1479{
1480 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1481}
1482
1483/**
1484 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1485 * @param mtd MTD device structure
1486 * @param from The offset to write
1487 * @param len number of bytes to write
1488 * @param retlen pointer to variable to store the number of write bytes
1489 * @param buf the databuffer to put/get data
1490 *
1491 * Write user OTP area.
1492 */
1493static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1494 size_t len, size_t *retlen, u_char *buf)
1495{
1496 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1497}
1498
1499/**
1500 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1501 * @param mtd MTD device structure
1502 * @param from The offset to lock
1503 * @param len number of bytes to unlock
1504 *
1505 * Write lock mark on spare area in page 0 in OTP block
1506 */
1507static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1508 size_t len)
1509{
1510 unsigned char oob_buf[64];
1511 size_t retlen;
1512 int ret;
1513
1514 memset(oob_buf, 0xff, mtd->oobsize);
1515 /*
1516 * Note: OTP lock operation
1517 * OTP block : 0xXXFC
1518 * 1st block : 0xXXF3 (If chip support)
1519 * Both : 0xXXF0 (If chip support)
1520 */
1521 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1522
1523 /*
1524 * Write lock mark to 8th word of sector0 of page0 of the spare0.
1525 * We write 16 bytes spare area instead of 2 bytes.
1526 */
1527 from = 0;
1528 len = 16;
1529
1530 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1531
1532 return ret ? : retlen;
1533}
1534#endif /* CONFIG_MTD_ONENAND_OTP */
1535
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1536/**
1537 * onenand_print_device_info - Print device ID
1538 * @param device device ID
1539 *
1540 * Print device ID
1541 */
1542static void onenand_print_device_info(int device)
1543{
1544 int vcc, demuxed, ddp, density;
1545
1546 vcc = device & ONENAND_DEVICE_VCC_MASK;
1547 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1548 ddp = device & ONENAND_DEVICE_IS_DDP;
1549 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1550 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1551 demuxed ? "" : "Muxed ",
1552 ddp ? "(DDP)" : "",
1553 (16 << density),
1554 vcc ? "2.65/3.3" : "1.8",
1555 device);
1556}
1557
1558static const struct onenand_manufacturers onenand_manuf_ids[] = {
1559 {ONENAND_MFR_SAMSUNG, "Samsung"},
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1560};
1561
1562/**
1563 * onenand_check_maf - Check manufacturer ID
1564 * @param manuf manufacturer ID
1565 *
1566 * Check manufacturer ID
1567 */
1568static int onenand_check_maf(int manuf)
1569{
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1570 int size = ARRAY_SIZE(onenand_manuf_ids);
1571 char *name;
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1572 int i;
1573
37b1cc39 1574 for (i = 0; i < size; i++)
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1575 if (manuf == onenand_manuf_ids[i].id)
1576 break;
cd5f6346 1577
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1578 if (i < size)
1579 name = onenand_manuf_ids[i].name;
1580 else
1581 name = "Unknown";
1582
1583 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
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37b1cc39 1585 return (i == size);
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1586}
1587
1588/**
1589 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1590 * @param mtd MTD device structure
1591 *
1592 * OneNAND detection method:
1593 * Compare the the values from command with ones from register
1594 */
1595static int onenand_probe(struct mtd_info *mtd)
1596{
1597 struct onenand_chip *this = mtd->priv;
1598 int bram_maf_id, bram_dev_id, maf_id, dev_id;
1599 int version_id;
1600 int density;
1601
1602 /* Send the command for reading device ID from BootRAM */
1603 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1604
1605 /* Read manufacturer and device IDs from BootRAM */
1606 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1607 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1608
1609 /* Check manufacturer ID */
1610 if (onenand_check_maf(bram_maf_id))
1611 return -ENXIO;
1612
1613 /* Reset OneNAND to read default register values */
1614 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1615
1616 /* Read manufacturer and device IDs from Register */
1617 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1618 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1619
1620 /* Check OneNAND device */
1621 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1622 return -ENXIO;
1623
1624 /* Flash device information */
1625 onenand_print_device_info(dev_id);
1626 this->device_id = dev_id;
1627
1628 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1629 this->chipsize = (16 << density) << 20;
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1630 /* Set density mask. it is used for DDP */
1631 this->density_mask = (1 << (density + 6));
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1632
1633 /* OneNAND page size & block size */
1634 /* The data buffer size is equal to page size */
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1635 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1636 mtd->oobsize = mtd->writesize >> 5;
cd5f6346 1637 /* Pagers per block is always 64 in OneNAND */
28318776 1638 mtd->erasesize = mtd->writesize << 6;
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1639
1640 this->erase_shift = ffs(mtd->erasesize) - 1;
28318776 1641 this->page_shift = ffs(mtd->writesize) - 1;
cd5f6346 1642 this->ppb_shift = (this->erase_shift - this->page_shift);
28318776 1643 this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
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1644
1645 /* REVIST: Multichip handling */
1646
1647 mtd->size = this->chipsize;
1648
1649 /* Version ID */
1650 version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1651 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id);
1652
1653 /* Lock scheme */
1654 if (density <= ONENAND_DEVICE_DENSITY_512Mb &&
1655 !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) {
1656 printk(KERN_INFO "Lock scheme is Continues Lock\n");
1657 this->options |= ONENAND_CONT_LOCK;
1658 }
d5c5e78a 1659
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1660 return 0;
1661}
1662
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1663/**
1664 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1665 * @param mtd MTD device structure
1666 */
1667static int onenand_suspend(struct mtd_info *mtd)
1668{
1669 return onenand_get_device(mtd, FL_PM_SUSPENDED);
1670}
1671
1672/**
1673 * onenand_resume - [MTD Interface] Resume the OneNAND flash
1674 * @param mtd MTD device structure
1675 */
1676static void onenand_resume(struct mtd_info *mtd)
1677{
1678 struct onenand_chip *this = mtd->priv;
1679
1680 if (this->state == FL_PM_SUSPENDED)
1681 onenand_release_device(mtd);
1682 else
1683 printk(KERN_ERR "resume() called for the chip which is not"
1684 "in suspended state\n");
1685}
1686
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1687/**
1688 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1689 * @param mtd MTD device structure
1690 * @param maxchips Number of chips to scan for
1691 *
1692 * This fills out all the not initialized function pointers
1693 * with the defaults.
1694 * The flash ID is read and the mtd/chip structures are
1695 * filled with the appropriate values.
1696 */
1697int onenand_scan(struct mtd_info *mtd, int maxchips)
1698{
1699 struct onenand_chip *this = mtd->priv;
1700
1701 if (!this->read_word)
1702 this->read_word = onenand_readw;
1703 if (!this->write_word)
1704 this->write_word = onenand_writew;
1705
1706 if (!this->command)
1707 this->command = onenand_command;
1708 if (!this->wait)
1709 this->wait = onenand_wait;
1710
1711 if (!this->read_bufferram)
1712 this->read_bufferram = onenand_read_bufferram;
1713 if (!this->write_bufferram)
1714 this->write_bufferram = onenand_write_bufferram;
1715
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1716 if (!this->block_markbad)
1717 this->block_markbad = onenand_default_block_markbad;
1718 if (!this->scan_bbt)
1719 this->scan_bbt = onenand_default_bbt;
1720
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1721 if (onenand_probe(mtd))
1722 return -ENXIO;
1723
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1724 /* Set Sync. Burst Read after probing */
1725 if (this->mmcontrol) {
1726 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
1727 this->read_bufferram = onenand_sync_read_bufferram;
1728 }
1729
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1730 /* Allocate buffers, if necessary */
1731 if (!this->page_buf) {
1732 size_t len;
28318776 1733 len = mtd->writesize + mtd->oobsize;
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1734 this->page_buf = kmalloc(len, GFP_KERNEL);
1735 if (!this->page_buf) {
1736 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
1737 return -ENOMEM;
1738 }
1739 this->options |= ONENAND_PAGEBUF_ALLOC;
1740 }
1741
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1742 this->state = FL_READY;
1743 init_waitqueue_head(&this->wq);
1744 spin_lock_init(&this->chip_lock);
1745
1746 switch (mtd->oobsize) {
1747 case 64:
5bd34c09 1748 this->ecclayout = &onenand_oob_64;
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1749 break;
1750
1751 case 32:
5bd34c09 1752 this->ecclayout = &onenand_oob_32;
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1753 break;
1754
1755 default:
1756 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
1757 mtd->oobsize);
1758 /* To prevent kernel oops */
5bd34c09 1759 this->ecclayout = &onenand_oob_32;
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1760 break;
1761 }
1762
5bd34c09 1763 mtd->ecclayout = this->ecclayout;
d5c5e78a 1764
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1765 /* Fill in remaining MTD driver data */
1766 mtd->type = MTD_NANDFLASH;
5fa43394 1767 mtd->flags = MTD_CAP_NANDFLASH;
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1768 mtd->ecctype = MTD_ECC_SW;
1769 mtd->erase = onenand_erase;
1770 mtd->point = NULL;
1771 mtd->unpoint = NULL;
1772 mtd->read = onenand_read;
1773 mtd->write = onenand_write;
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1774 mtd->read_oob = onenand_read_oob;
1775 mtd->write_oob = onenand_write_oob;
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1776#ifdef CONFIG_MTD_ONENAND_OTP
1777 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
1778 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
1779 mtd->get_user_prot_info = onenand_get_user_prot_info;
1780 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
1781 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
1782 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
1783#endif
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1784 mtd->sync = onenand_sync;
1785 mtd->lock = NULL;
1786 mtd->unlock = onenand_unlock;
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1787 mtd->suspend = onenand_suspend;
1788 mtd->resume = onenand_resume;
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1789 mtd->block_isbad = onenand_block_isbad;
1790 mtd->block_markbad = onenand_block_markbad;
1791 mtd->owner = THIS_MODULE;
1792
1793 /* Unlock whole block */
1794 mtd->unlock(mtd, 0x0, this->chipsize);
1795
cdc00130 1796 return this->scan_bbt(mtd);
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1797}
1798
1799/**
1800 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
1801 * @param mtd MTD device structure
1802 */
1803void onenand_release(struct mtd_info *mtd)
1804{
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1805 struct onenand_chip *this = mtd->priv;
1806
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1807#ifdef CONFIG_MTD_PARTITIONS
1808 /* Deregister partitions */
1809 del_mtd_partitions (mtd);
1810#endif
1811 /* Deregister the device */
1812 del_mtd_device (mtd);
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1813
1814 /* Free bad block table memory, if allocated */
1815 if (this->bbm)
1816 kfree(this->bbm);
1817 /* Buffer allocated by onenand_scan */
1818 if (this->options & ONENAND_PAGEBUF_ALLOC)
1819 kfree(this->page_buf);
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1820}
1821
1822EXPORT_SYMBOL_GPL(onenand_scan);
1823EXPORT_SYMBOL_GPL(onenand_release);
1824
1825MODULE_LICENSE("GPL");
1826MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
1827MODULE_DESCRIPTION("Generic OneNAND flash driver code");
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