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mtd: flash drivers set ecc strength
[deliverable/linux.git] / drivers / mtd / onenand / onenand_base.c
CommitLineData
cd5f6346
KP		 1/*
2 * linux/drivers/mtd/onenand/onenand_base.c
3 *
3cf60253
AKS		 4 * Copyright © 2005-2009 Samsung Electronics
5 * Copyright © 2007 Nokia Corporation
6 *
cd5f6346
KP		 7 * Kyungmin Park <kyungmin.park@samsung.com>
8 *
81280d58
AH		 9 * Credits:
10 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
11 * auto-placement support, read-while load support, various fixes
81280d58 12 *
5988af23
RH		 13 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
14 * Flex-OneNAND support
3cf60253
AKS		 15 * Amul Kumar Saha <amul.saha at samsung.com>
16 * OTP support
5988af23 17 *
cd5f6346
KP		 18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23#include <linux/kernel.h>
24#include <linux/module.h>
c90173f0 25#include <linux/moduleparam.h>
5a0e3ad6 26#include <linux/slab.h>
cd5f6346 27#include <linux/init.h>
015953d7 28#include <linux/sched.h>
6c77fd64 29#include <linux/delay.h>
2c22120f 30#include <linux/interrupt.h>
015953d7 31#include <linux/jiffies.h>
cd5f6346
KP		 32#include <linux/mtd/mtd.h>
33#include <linux/mtd/onenand.h>
34#include <linux/mtd/partitions.h>
35
36#include <asm/io.h>
37
72073027
MK		 38/*
39 * Multiblock erase if number of blocks to erase is 2 or more.
40 * Maximum number of blocks for simultaneous erase is 64.
41 */
42#define MB_ERASE_MIN_BLK_COUNT 2
43#define MB_ERASE_MAX_BLK_COUNT 64
44
5988af23
RH		 45/* Default Flex-OneNAND boundary and lock respectively */
46static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
47
c90173f0
AS		 48module_param_array(flex_bdry, int, NULL, 0400);
49MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
50 "Syntax:flex_bdry=DIE_BDRY,LOCK,..."
51 "DIE_BDRY: SLC boundary of the die"
52 "LOCK: Locking information for SLC boundary"
53 " : 0->Set boundary in unlocked status"
54 " : 1->Set boundary in locked status");
55
3cf60253
AKS		 56/* Default OneNAND/Flex-OneNAND OTP options*/
57static int otp;
58
59module_param(otp, int, 0400);
60MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP"
61 "Syntax : otp=LOCK_TYPE"
62 "LOCK_TYPE : Keys issued, for specific OTP Lock type"
63 " : 0 -> Default (No Blocks Locked)"
64 " : 1 -> OTP Block lock"
65 " : 2 -> 1st Block lock"
66 " : 3 -> BOTH OTP Block and 1st Block lock");
67
99b17c08
RT		 68/*
69 * flexonenand_oob_128 - oob info for Flex-Onenand with 4KB page
70 * For now, we expose only 64 out of 80 ecc bytes
5988af23 71 */
99b17c08 72static struct nand_ecclayout flexonenand_oob_128 = {
5988af23
RH		 73 .eccbytes = 64,
74 .eccpos = {
75 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
76 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
77 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
78 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
79 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
80 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
81 102, 103, 104, 105
82 },
83 .oobfree = {
84 {2, 4}, {18, 4}, {34, 4}, {50, 4},
85 {66, 4}, {82, 4}, {98, 4}, {114, 4}
86 }
87};
88
99b17c08
RT		 89/*
90 * onenand_oob_128 - oob info for OneNAND with 4KB page
91 *
92 * Based on specification:
93 * 4Gb M-die OneNAND Flash (KFM4G16Q4M, KFN8G16Q4M). Rev. 1.3, Apr. 2010
94 *
95 * For eccpos we expose only 64 bytes out of 72 (see struct nand_ecclayout)
96 *
97 * oobfree uses the spare area fields marked as
98 * "Managed by internal ECC logic for Logical Sector Number area"
99 */
100static struct nand_ecclayout onenand_oob_128 = {
101 .eccbytes = 64,
102 .eccpos = {
103 7, 8, 9, 10, 11, 12, 13, 14, 15,
104 23, 24, 25, 26, 27, 28, 29, 30, 31,
105 39, 40, 41, 42, 43, 44, 45, 46, 47,
106 55, 56, 57, 58, 59, 60, 61, 62, 63,
107 71, 72, 73, 74, 75, 76, 77, 78, 79,
108 87, 88, 89, 90, 91, 92, 93, 94, 95,
109 103, 104, 105, 106, 107, 108, 109, 110, 111,
110 119
111 },
112 .oobfree = {
113 {2, 3}, {18, 3}, {34, 3}, {50, 3},
114 {66, 3}, {82, 3}, {98, 3}, {114, 3}
115 }
116};
117
cd5f6346
KP		 118/**
119 * onenand_oob_64 - oob info for large (2KB) page
120 */
5bd34c09 121static struct nand_ecclayout onenand_oob_64 = {
cd5f6346
KP		 122 .eccbytes = 20,
123 .eccpos = {
124 8, 9, 10, 11, 12,
125 24, 25, 26, 27, 28,
126 40, 41, 42, 43, 44,
127 56, 57, 58, 59, 60,
128 },
129 .oobfree = {
130 {2, 3}, {14, 2}, {18, 3}, {30, 2},
d9777f1c
JL		 131 {34, 3}, {46, 2}, {50, 3}, {62, 2}
132 }
cd5f6346
KP		 133};
134
135/**
136 * onenand_oob_32 - oob info for middle (1KB) page
137 */
5bd34c09 138static struct nand_ecclayout onenand_oob_32 = {
cd5f6346
KP		 139 .eccbytes = 10,
140 .eccpos = {
141 8, 9, 10, 11, 12,
142 24, 25, 26, 27, 28,
143 },
144 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
145};
146
147static const unsigned char ffchars[] = {
148 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
149 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
150 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
151 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
152 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
153 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
154 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
155 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
5988af23
RH		 156 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
157 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */
158 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
159 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */
160 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
161 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */
162 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
163 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */
cd5f6346
KP		 164};
165
166/**
167 * onenand_readw - [OneNAND Interface] Read OneNAND register
168 * @param addr address to read
169 *
170 * Read OneNAND register
171 */
172static unsigned short onenand_readw(void __iomem *addr)
173{
174 return readw(addr);
175}
176
177/**
178 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
179 * @param value value to write
180 * @param addr address to write
181 *
182 * Write OneNAND register with value
183 */
184static void onenand_writew(unsigned short value, void __iomem *addr)
185{
186 writew(value, addr);
187}
188
189/**
190 * onenand_block_address - [DEFAULT] Get block address
83a36838 191 * @param this onenand chip data structure
cd5f6346
KP		 192 * @param block the block
193 * @return translated block address if DDP, otherwise same
194 *
195 * Setup Start Address 1 Register (F100h)
196 */
83a36838 197static int onenand_block_address(struct onenand_chip *this, int block)
cd5f6346 198{
738d61f5
KP		 199 /* Device Flash Core select, NAND Flash Block Address */
200 if (block & this->density_mask)
201 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
cd5f6346
KP		 202
203 return block;
204}
205
206/**
207 * onenand_bufferram_address - [DEFAULT] Get bufferram address
83a36838 208 * @param this onenand chip data structure
cd5f6346
KP		 209 * @param block the block
210 * @return set DBS value if DDP, otherwise 0
211 *
212 * Setup Start Address 2 Register (F101h) for DDP
213 */
83a36838 214static int onenand_bufferram_address(struct onenand_chip *this, int block)
cd5f6346 215{
738d61f5
KP		 216 /* Device BufferRAM Select */
217 if (block & this->density_mask)
218 return ONENAND_DDP_CHIP1;
cd5f6346 219
738d61f5 220 return ONENAND_DDP_CHIP0;
cd5f6346
KP		 221}
222
223/**
224 * onenand_page_address - [DEFAULT] Get page address
225 * @param page the page address
226 * @param sector the sector address
227 * @return combined page and sector address
228 *
229 * Setup Start Address 8 Register (F107h)
230 */
231static int onenand_page_address(int page, int sector)
232{
233 /* Flash Page Address, Flash Sector Address */
234 int fpa, fsa;
235
236 fpa = page & ONENAND_FPA_MASK;
237 fsa = sector & ONENAND_FSA_MASK;
238
239 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
240}
241
242/**
243 * onenand_buffer_address - [DEFAULT] Get buffer address
244 * @param dataram1 DataRAM index
245 * @param sectors the sector address
246 * @param count the number of sectors
247 * @return the start buffer value
248 *
249 * Setup Start Buffer Register (F200h)
250 */
251static int onenand_buffer_address(int dataram1, int sectors, int count)
252{
253 int bsa, bsc;
254
255 /* BufferRAM Sector Address */
256 bsa = sectors & ONENAND_BSA_MASK;
257
258 if (dataram1)
259 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
260 else
261 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
262
263 /* BufferRAM Sector Count */
264 bsc = count & ONENAND_BSC_MASK;
265
266 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
267}
268
5988af23
RH		 269/**
270 * flexonenand_block- For given address return block number
271 * @param this - OneNAND device structure
272 * @param addr - Address for which block number is needed
273 */
274static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr)
275{
276 unsigned boundary, blk, die = 0;
277
278 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
279 die = 1;
280 addr -= this->diesize[0];
281 }
282
283 boundary = this->boundary[die];
284
285 blk = addr >> (this->erase_shift - 1);
286 if (blk > boundary)
287 blk = (blk + boundary + 1) >> 1;
288
289 blk += die ? this->density_mask : 0;
290 return blk;
291}
292
293inline unsigned onenand_block(struct onenand_chip *this, loff_t addr)
294{
295 if (!FLEXONENAND(this))
296 return addr >> this->erase_shift;
297 return flexonenand_block(this, addr);
298}
299
300/**
301 * flexonenand_addr - Return address of the block
302 * @this: OneNAND device structure
303 * @block: Block number on Flex-OneNAND
304 *
305 * Return address of the block
306 */
307static loff_t flexonenand_addr(struct onenand_chip *this, int block)
308{
309 loff_t ofs = 0;
310 int die = 0, boundary;
311
312 if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
313 block -= this->density_mask;
314 die = 1;
315 ofs = this->diesize[0];
316 }
317
318 boundary = this->boundary[die];
319 ofs += (loff_t)block << (this->erase_shift - 1);
320 if (block > (boundary + 1))
321 ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1);
322 return ofs;
323}
324
325loff_t onenand_addr(struct onenand_chip *this, int block)
326{
327 if (!FLEXONENAND(this))
328 return (loff_t)block << this->erase_shift;
329 return flexonenand_addr(this, block);
330}
331EXPORT_SYMBOL(onenand_addr);
332
e71f04fc
KP		 333/**
334 * onenand_get_density - [DEFAULT] Get OneNAND density
335 * @param dev_id OneNAND device ID
336 *
337 * Get OneNAND density from device ID
338 */
339static inline int onenand_get_density(int dev_id)
340{
341 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
342 return (density & ONENAND_DEVICE_DENSITY_MASK);
343}
344
5988af23
RH		 345/**
346 * flexonenand_region - [Flex-OneNAND] Return erase region of addr
347 * @param mtd MTD device structure
348 * @param addr address whose erase region needs to be identified
349 */
350int flexonenand_region(struct mtd_info *mtd, loff_t addr)
351{
352 int i;
353
354 for (i = 0; i < mtd->numeraseregions; i++)
355 if (addr < mtd->eraseregions[i].offset)
356 break;
357 return i - 1;
358}
359EXPORT_SYMBOL(flexonenand_region);
360
cd5f6346
KP		 361/**
362 * onenand_command - [DEFAULT] Send command to OneNAND device
363 * @param mtd MTD device structure
364 * @param cmd the command to be sent
365 * @param addr offset to read from or write to
366 * @param len number of bytes to read or write
367 *
368 * Send command to OneNAND device. This function is used for middle/large page
369 * devices (1KB/2KB Bytes per page)
370 */
371static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
372{
373 struct onenand_chip *this = mtd->priv;
b21b72cf 374 int value, block, page;
cd5f6346
KP		 375
376 /* Address translation */
377 switch (cmd) {
378 case ONENAND_CMD_UNLOCK:
379 case ONENAND_CMD_LOCK:
380 case ONENAND_CMD_LOCK_TIGHT:
28b79ff9 381 case ONENAND_CMD_UNLOCK_ALL:
cd5f6346
KP		 382 block = -1;
383 page = -1;
384 break;
385
5988af23
RH		 386 case FLEXONENAND_CMD_PI_ACCESS:
387 /* addr contains die index */
388 block = addr * this->density_mask;
389 page = -1;
390 break;
391
cd5f6346 392 case ONENAND_CMD_ERASE:
72073027
MK		 393 case ONENAND_CMD_MULTIBLOCK_ERASE:
394 case ONENAND_CMD_ERASE_VERIFY:
cd5f6346 395 case ONENAND_CMD_BUFFERRAM:
493c6460 396 case ONENAND_CMD_OTP_ACCESS:
5988af23 397 block = onenand_block(this, addr);
cd5f6346
KP		 398 page = -1;
399 break;
400
5988af23
RH		 401 case FLEXONENAND_CMD_READ_PI:
402 cmd = ONENAND_CMD_READ;
403 block = addr * this->density_mask;
404 page = 0;
405 break;
406
cd5f6346 407 default:
5988af23 408 block = onenand_block(this, addr);
42b0aab1
RHS		 409 if (FLEXONENAND(this))
410 page = (int) (addr - onenand_addr(this, block))>>\
411 this->page_shift;
412 else
413 page = (int) (addr >> this->page_shift);
ee9745fc
KP		 414 if (ONENAND_IS_2PLANE(this)) {
415 /* Make the even block number */
416 block &= ~1;
417 /* Is it the odd plane? */
418 if (addr & this->writesize)
419 block++;
420 page >>= 1;
421 }
cd5f6346
KP		 422 page &= this->page_mask;
423 break;
424 }
425
426 /* NOTE: The setting order of the registers is very important! */
427 if (cmd == ONENAND_CMD_BUFFERRAM) {
428 /* Select DataRAM for DDP */
83a36838 429 value = onenand_bufferram_address(this, block);
cd5f6346
KP		 430 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
431
8a8f632d 432 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this))
ee9745fc
KP		 433 /* It is always BufferRAM0 */
434 ONENAND_SET_BUFFERRAM0(this);
435 else
436 /* Switch to the next data buffer */
437 ONENAND_SET_NEXT_BUFFERRAM(this);
cd5f6346
KP		 438
439 return 0;
440 }
441
442 if (block != -1) {
443 /* Write 'DFS, FBA' of Flash */
83a36838 444 value = onenand_block_address(this, block);
cd5f6346 445 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
3cecf69e 446
b21b72cf
KP		 447 /* Select DataRAM for DDP */
448 value = onenand_bufferram_address(this, block);
449 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
cd5f6346
KP		 450 }
451
452 if (page != -1) {
60d84f97 453 /* Now we use page size operation */
5988af23 454 int sectors = 0, count = 0;
cd5f6346
KP		 455 int dataram;
456
457 switch (cmd) {
5988af23 458 case FLEXONENAND_CMD_RECOVER_LSB:
cd5f6346
KP		 459 case ONENAND_CMD_READ:
460 case ONENAND_CMD_READOOB:
8a8f632d 461 if (ONENAND_IS_4KB_PAGE(this))
5988af23
RH		 462 /* It is always BufferRAM0 */
463 dataram = ONENAND_SET_BUFFERRAM0(this);
464 else
465 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
cd5f6346
KP		 466 break;
467
468 default:
ee9745fc
KP		 469 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
470 cmd = ONENAND_CMD_2X_PROG;
cd5f6346
KP		 471 dataram = ONENAND_CURRENT_BUFFERRAM(this);
472 break;
473 }
474
475 /* Write 'FPA, FSA' of Flash */
476 value = onenand_page_address(page, sectors);
477 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
478
479 /* Write 'BSA, BSC' of DataRAM */
480 value = onenand_buffer_address(dataram, sectors, count);
481 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
cd5f6346
KP		 482 }
483
484 /* Interrupt clear */
485 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
486
487 /* Write command */
488 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
489
490 return 0;
491}
492
5988af23
RH		 493/**
494 * onenand_read_ecc - return ecc status
495 * @param this onenand chip structure
496 */
497static inline int onenand_read_ecc(struct onenand_chip *this)
498{
499 int ecc, i, result = 0;
500
6a88c47b 501 if (!FLEXONENAND(this) && !ONENAND_IS_4KB_PAGE(this))
5988af23
RH		 502 return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
503
504 for (i = 0; i < 4; i++) {
6a88c47b 505 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2);
5988af23
RH		 506 if (likely(!ecc))
507 continue;
508 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
509 return ONENAND_ECC_2BIT_ALL;
510 else
511 result = ONENAND_ECC_1BIT_ALL;
512 }
513
514 return result;
515}
516
cd5f6346
KP		 517/**
518 * onenand_wait - [DEFAULT] wait until the command is done
519 * @param mtd MTD device structure
520 * @param state state to select the max. timeout value
521 *
522 * Wait for command done. This applies to all OneNAND command
523 * Read can take up to 30us, erase up to 2ms and program up to 350us
524 * according to general OneNAND specs
525 */
526static int onenand_wait(struct mtd_info *mtd, int state)
527{
528 struct onenand_chip * this = mtd->priv;
529 unsigned long timeout;
530 unsigned int flags = ONENAND_INT_MASTER;
531 unsigned int interrupt = 0;
2fd32d4a 532 unsigned int ctrl;
cd5f6346
KP		 533
534 /* The 20 msec is enough */
535 timeout = jiffies + msecs_to_jiffies(20);
536 while (time_before(jiffies, timeout)) {
537 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
538
539 if (interrupt & flags)
540 break;
541
72073027 542 if (state != FL_READING && state != FL_PREPARING_ERASE)
cd5f6346
KP		 543 cond_resched();
544 }
545 /* To get correct interrupt status in timeout case */
546 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
547
548 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
549
83973b87
KP		 550 /*
551 * In the Spec. it checks the controller status first
552 * However if you get the correct information in case of
553 * power off recovery (POR) test, it should read ECC status first
554 */
cd5f6346 555 if (interrupt & ONENAND_INT_READ) {
5988af23 556 int ecc = onenand_read_ecc(this);
f4f91ac3 557 if (ecc) {
b3c9f8bf 558 if (ecc & ONENAND_ECC_2BIT_ALL) {
297758f8
AKS		 559 printk(KERN_ERR "%s: ECC error = 0x%04x\n",
560 __func__, ecc);
f4f91ac3 561 mtd->ecc_stats.failed++;
30a7eb29 562 return -EBADMSG;
49dc08ee 563 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
297758f8
AKS		 564 printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n",
565 __func__, ecc);
f4f91ac3 566 mtd->ecc_stats.corrected++;
49dc08ee 567 }
cd5f6346 568 }
9d032801 569 } else if (state == FL_READING) {
297758f8
AKS		 570 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
571 __func__, ctrl, interrupt);
9d032801 572 return -EIO;
cd5f6346
KP		 573 }
574
72073027
MK		 575 if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) {
576 printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n",
577 __func__, ctrl, interrupt);
578 return -EIO;
579 }
580
581 if (!(interrupt & ONENAND_INT_MASTER)) {
582 printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n",
583 __func__, ctrl, interrupt);
584 return -EIO;
585 }
586
83973b87
KP		 587 /* If there's controller error, it's a real error */
588 if (ctrl & ONENAND_CTRL_ERROR) {
297758f8
AKS		 589 printk(KERN_ERR "%s: controller error = 0x%04x\n",
590 __func__, ctrl);
83973b87 591 if (ctrl & ONENAND_CTRL_LOCK)
297758f8 592 printk(KERN_ERR "%s: it's locked error.\n", __func__);
83973b87
KP		 593 return -EIO;
594 }
595
cd5f6346
KP		 596 return 0;
597}
598
2c22120f
KP		 599/*
600 * onenand_interrupt - [DEFAULT] onenand interrupt handler
601 * @param irq onenand interrupt number
602 * @param dev_id interrupt data
603 *
604 * complete the work
605 */
606static irqreturn_t onenand_interrupt(int irq, void *data)
607{
06efcad0 608 struct onenand_chip *this = data;
2c22120f
KP		 609
610 /* To handle shared interrupt */
611 if (!this->complete.done)
612 complete(&this->complete);
613
614 return IRQ_HANDLED;
615}
616
617/*
618 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
619 * @param mtd MTD device structure
620 * @param state state to select the max. timeout value
621 *
622 * Wait for command done.
623 */
624static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
625{
626 struct onenand_chip *this = mtd->priv;
627
2c22120f
KP		 628 wait_for_completion(&this->complete);
629
630 return onenand_wait(mtd, state);
631}
632
633/*
634 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
635 * @param mtd MTD device structure
636 * @param state state to select the max. timeout value
637 *
638 * Try interrupt based wait (It is used one-time)
639 */
640static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
641{
642 struct onenand_chip *this = mtd->priv;
643 unsigned long remain, timeout;
644
645 /* We use interrupt wait first */
646 this->wait = onenand_interrupt_wait;
647
2c22120f
KP		 648 timeout = msecs_to_jiffies(100);
649 remain = wait_for_completion_timeout(&this->complete, timeout);
650 if (!remain) {
651 printk(KERN_INFO "OneNAND: There's no interrupt. "
652 "We use the normal wait\n");
653
654 /* Release the irq */
655 free_irq(this->irq, this);
c9ac5977 656
2c22120f
KP		 657 this->wait = onenand_wait;
658 }
659
660 return onenand_wait(mtd, state);
661}
662
663/*
664 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
665 * @param mtd MTD device structure
666 *
667 * There's two method to wait onenand work
668 * 1. polling - read interrupt status register
669 * 2. interrupt - use the kernel interrupt method
670 */
671static void onenand_setup_wait(struct mtd_info *mtd)
672{
673 struct onenand_chip *this = mtd->priv;
674 int syscfg;
675
676 init_completion(&this->complete);
677
678 if (this->irq <= 0) {
679 this->wait = onenand_wait;
680 return;
681 }
682
683 if (request_irq(this->irq, &onenand_interrupt,
684 IRQF_SHARED, "onenand", this)) {
685 /* If we can't get irq, use the normal wait */
686 this->wait = onenand_wait;
687 return;
688 }
689
690 /* Enable interrupt */
691 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
692 syscfg |= ONENAND_SYS_CFG1_IOBE;
693 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
694
695 this->wait = onenand_try_interrupt_wait;
696}
697
cd5f6346
KP		 698/**
699 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
700 * @param mtd MTD data structure
701 * @param area BufferRAM area
702 * @return offset given area
703 *
704 * Return BufferRAM offset given area
705 */
706static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
707{
708 struct onenand_chip *this = mtd->priv;
709
710 if (ONENAND_CURRENT_BUFFERRAM(this)) {
ee9745fc 711 /* Note: the 'this->writesize' is a real page size */
cd5f6346 712 if (area == ONENAND_DATARAM)
ee9745fc 713 return this->writesize;
cd5f6346
KP		 714 if (area == ONENAND_SPARERAM)
715 return mtd->oobsize;
716 }
717
718 return 0;
719}
720
721/**
722 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
723 * @param mtd MTD data structure
724 * @param area BufferRAM area
725 * @param buffer the databuffer to put/get data
726 * @param offset offset to read from or write to
727 * @param count number of bytes to read/write
728 *
729 * Read the BufferRAM area
730 */
731static int onenand_read_bufferram(struct mtd_info *mtd, int area,
732 unsigned char *buffer, int offset, size_t count)
733{
734 struct onenand_chip *this = mtd->priv;
735 void __iomem *bufferram;
736
737 bufferram = this->base + area;
738
739 bufferram += onenand_bufferram_offset(mtd, area);
740
9c01f87d
KP		 741 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
742 unsigned short word;
743
744 /* Align with word(16-bit) size */
745 count--;
746
747 /* Read word and save byte */
748 word = this->read_word(bufferram + offset + count);
749 buffer[count] = (word & 0xff);
750 }
751
cd5f6346
KP		 752 memcpy(buffer, bufferram + offset, count);
753
754 return 0;
755}
756
52b0eea7
KP		 757/**
758 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
759 * @param mtd MTD data structure
760 * @param area BufferRAM area
761 * @param buffer the databuffer to put/get data
762 * @param offset offset to read from or write to
763 * @param count number of bytes to read/write
764 *
765 * Read the BufferRAM area with Sync. Burst Mode
766 */
767static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
768 unsigned char *buffer, int offset, size_t count)
769{
770 struct onenand_chip *this = mtd->priv;
771 void __iomem *bufferram;
772
773 bufferram = this->base + area;
774
775 bufferram += onenand_bufferram_offset(mtd, area);
776
777 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
778
9c01f87d
KP		 779 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
780 unsigned short word;
781
782 /* Align with word(16-bit) size */
783 count--;
784
785 /* Read word and save byte */
786 word = this->read_word(bufferram + offset + count);
787 buffer[count] = (word & 0xff);
788 }
789
52b0eea7
KP		 790 memcpy(buffer, bufferram + offset, count);
791
792 this->mmcontrol(mtd, 0);
793
794 return 0;
795}
796
cd5f6346
KP		 797/**
798 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
799 * @param mtd MTD data structure
800 * @param area BufferRAM area
801 * @param buffer the databuffer to put/get data
802 * @param offset offset to read from or write to
803 * @param count number of bytes to read/write
804 *
805 * Write the BufferRAM area
806 */
807static int onenand_write_bufferram(struct mtd_info *mtd, int area,
808 const unsigned char *buffer, int offset, size_t count)
809{
810 struct onenand_chip *this = mtd->priv;
811 void __iomem *bufferram;
812
813 bufferram = this->base + area;
814
815 bufferram += onenand_bufferram_offset(mtd, area);
816
9c01f87d
KP		 817 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
818 unsigned short word;
819 int byte_offset;
820
821 /* Align with word(16-bit) size */
822 count--;
823
824 /* Calculate byte access offset */
825 byte_offset = offset + count;
826
827 /* Read word and save byte */
828 word = this->read_word(bufferram + byte_offset);
829 word = (word & ~0xff) | buffer[count];
830 this->write_word(word, bufferram + byte_offset);
831 }
832
cd5f6346
KP		 833 memcpy(bufferram + offset, buffer, count);
834
835 return 0;
836}
837
ee9745fc
KP		 838/**
839 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
840 * @param mtd MTD data structure
841 * @param addr address to check
842 * @return blockpage address
843 *
844 * Get blockpage address at 2x program mode
845 */
846static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
847{
848 struct onenand_chip *this = mtd->priv;
849 int blockpage, block, page;
850
851 /* Calculate the even block number */
852 block = (int) (addr >> this->erase_shift) & ~1;
853 /* Is it the odd plane? */
854 if (addr & this->writesize)
855 block++;
856 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
857 blockpage = (block << 7) | page;
858
859 return blockpage;
860}
861
cd5f6346
KP		 862/**
863 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
864 * @param mtd MTD data structure
865 * @param addr address to check
d5c5e78a 866 * @return 1 if there are valid data, otherwise 0
cd5f6346
KP		 867 *
868 * Check bufferram if there is data we required
869 */
870static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
871{
872 struct onenand_chip *this = mtd->priv;
cde36b37 873 int blockpage, found = 0;
abf3c0f2 874 unsigned int i;
d5c5e78a 875
ee9745fc
KP		 876 if (ONENAND_IS_2PLANE(this))
877 blockpage = onenand_get_2x_blockpage(mtd, addr);
878 else
879 blockpage = (int) (addr >> this->page_shift);
cd5f6346 880
abf3c0f2 881 /* Is there valid data? */
cd5f6346 882 i = ONENAND_CURRENT_BUFFERRAM(this);
abf3c0f2 883 if (this->bufferram[i].blockpage == blockpage)
cde36b37
AH		 884 found = 1;
885 else {
886 /* Check another BufferRAM */
887 i = ONENAND_NEXT_BUFFERRAM(this);
888 if (this->bufferram[i].blockpage == blockpage) {
889 ONENAND_SET_NEXT_BUFFERRAM(this);
890 found = 1;
891 }
892 }
cd5f6346 893
cde36b37
AH		 894 if (found && ONENAND_IS_DDP(this)) {
895 /* Select DataRAM for DDP */
5988af23 896 int block = onenand_block(this, addr);
cde36b37
AH		 897 int value = onenand_bufferram_address(this, block);
898 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
abf3c0f2 899 }
cd5f6346 900
cde36b37 901 return found;
cd5f6346
KP		 902}
903
904/**
905 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
906 * @param mtd MTD data structure
907 * @param addr address to update
908 * @param valid valid flag
909 *
910 * Update BufferRAM information
911 */
abf3c0f2 912static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
cd5f6346
KP		 913 int valid)
914{
915 struct onenand_chip *this = mtd->priv;
abf3c0f2
KP		 916 int blockpage;
917 unsigned int i;
d5c5e78a 918
ee9745fc
KP		 919 if (ONENAND_IS_2PLANE(this))
920 blockpage = onenand_get_2x_blockpage(mtd, addr);
921 else
922 blockpage = (int) (addr >> this->page_shift);
cd5f6346 923
abf3c0f2
KP		 924 /* Invalidate another BufferRAM */
925 i = ONENAND_NEXT_BUFFERRAM(this);
5b4246f1 926 if (this->bufferram[i].blockpage == blockpage)
abf3c0f2 927 this->bufferram[i].blockpage = -1;
cd5f6346
KP		 928
929 /* Update BufferRAM */
930 i = ONENAND_CURRENT_BUFFERRAM(this);
abf3c0f2
KP		 931 if (valid)
932 this->bufferram[i].blockpage = blockpage;
933 else
934 this->bufferram[i].blockpage = -1;
cd5f6346
KP		 935}
936
480b9dfb
AH		 937/**
938 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
939 * @param mtd MTD data structure
940 * @param addr start address to invalidate
941 * @param len length to invalidate
942 *
943 * Invalidate BufferRAM information
944 */
945static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
946 unsigned int len)
947{
948 struct onenand_chip *this = mtd->priv;
949 int i;
950 loff_t end_addr = addr + len;
951
952 /* Invalidate BufferRAM */
953 for (i = 0; i < MAX_BUFFERRAM; i++) {
954 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
955 if (buf_addr >= addr && buf_addr < end_addr)
956 this->bufferram[i].blockpage = -1;
957 }
958}
959
cd5f6346
KP		 960/**
961 * onenand_get_device - [GENERIC] Get chip for selected access
962 * @param mtd MTD device structure
963 * @param new_state the state which is requested
964 *
965 * Get the device and lock it for exclusive access
966 */
a41371eb 967static int onenand_get_device(struct mtd_info *mtd, int new_state)
cd5f6346
KP		 968{
969 struct onenand_chip *this = mtd->priv;
970 DECLARE_WAITQUEUE(wait, current);
971
972 /*
973 * Grab the lock and see if the device is available
974 */
975 while (1) {
976 spin_lock(&this->chip_lock);
977 if (this->state == FL_READY) {
978 this->state = new_state;
979 spin_unlock(&this->chip_lock);
cf24dc85
AH		 980 if (new_state != FL_PM_SUSPENDED && this->enable)
981 this->enable(mtd);
cd5f6346
KP		 982 break;
983 }
a41371eb
KP		 984 if (new_state == FL_PM_SUSPENDED) {
985 spin_unlock(&this->chip_lock);
986 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
987 }
cd5f6346
KP		 988 set_current_state(TASK_UNINTERRUPTIBLE);
989 add_wait_queue(&this->wq, &wait);
990 spin_unlock(&this->chip_lock);
991 schedule();
992 remove_wait_queue(&this->wq, &wait);
993 }
a41371eb
KP		 994
995 return 0;
cd5f6346
KP		 996}
997
998/**
999 * onenand_release_device - [GENERIC] release chip
1000 * @param mtd MTD device structure
1001 *
1002 * Deselect, release chip lock and wake up anyone waiting on the device
1003 */
1004static void onenand_release_device(struct mtd_info *mtd)
1005{
1006 struct onenand_chip *this = mtd->priv;
1007
cf24dc85
AH		 1008 if (this->state != FL_PM_SUSPENDED && this->disable)
1009 this->disable(mtd);
cd5f6346
KP		 1010 /* Release the chip */
1011 spin_lock(&this->chip_lock);
1012 this->state = FL_READY;
1013 wake_up(&this->wq);
1014 spin_unlock(&this->chip_lock);
1015}
1016
1017/**
7854d3f7 1018 * onenand_transfer_auto_oob - [INTERN] oob auto-placement transfer
d15057b7
KP		 1019 * @param mtd MTD device structure
1020 * @param buf destination address
1021 * @param column oob offset to read from
1022 * @param thislen oob length to read
1023 */
1024static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
1025 int thislen)
1026{
1027 struct onenand_chip *this = mtd->priv;
1028 struct nand_oobfree *free;
1029 int readcol = column;
1030 int readend = column + thislen;
1031 int lastgap = 0;
1032 unsigned int i;
1033 uint8_t *oob_buf = this->oob_buf;
1034
1035 free = this->ecclayout->oobfree;
1036 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1037 if (readcol >= lastgap)
1038 readcol += free->offset - lastgap;
1039 if (readend >= lastgap)
1040 readend += free->offset - lastgap;
1041 lastgap = free->offset + free->length;
1042 }
1043 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1044 free = this->ecclayout->oobfree;
1045 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1046 int free_end = free->offset + free->length;
1047 if (free->offset < readend && free_end > readcol) {
1048 int st = max_t(int,free->offset,readcol);
1049 int ed = min_t(int,free_end,readend);
1050 int n = ed - st;
1051 memcpy(buf, oob_buf + st, n);
1052 buf += n;
1053 } else if (column == 0)
1054 break;
1055 }
1056 return 0;
1057}
1058
5988af23
RH		 1059/**
1060 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
1061 * @param mtd MTD device structure
1062 * @param addr address to recover
1063 * @param status return value from onenand_wait / onenand_bbt_wait
1064 *
1065 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
1066 * lower page address and MSB page has higher page address in paired pages.
1067 * If power off occurs during MSB page program, the paired LSB page data can
1068 * become corrupt. LSB page recovery read is a way to read LSB page though page
1069 * data are corrupted. When uncorrectable error occurs as a result of LSB page
1070 * read after power up, issue LSB page recovery read.
1071 */
1072static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
1073{
1074 struct onenand_chip *this = mtd->priv;
1075 int i;
1076
1077 /* Recovery is only for Flex-OneNAND */
1078 if (!FLEXONENAND(this))
1079 return status;
1080
1081 /* check if we failed due to uncorrectable error */
d57f4054 1082 if (!mtd_is_eccerr(status) && status != ONENAND_BBT_READ_ECC_ERROR)
5988af23
RH		 1083 return status;
1084
1085 /* check if address lies in MLC region */
1086 i = flexonenand_region(mtd, addr);
1087 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
1088 return status;
1089
1090 /* We are attempting to reread, so decrement stats.failed
1091 * which was incremented by onenand_wait due to read failure
1092 */
297758f8
AKS		 1093 printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n",
1094 __func__);
5988af23
RH		 1095 mtd->ecc_stats.failed--;
1096
1097 /* Issue the LSB page recovery command */
1098 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
1099 return this->wait(mtd, FL_READING);
1100}
1101
1102/**
1103 * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band
1104 * @param mtd MTD device structure
1105 * @param from offset to read from
1106 * @param ops: oob operation description structure
1107 *
1108 * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram.
1109 * So, read-while-load is not present.
1110 */
1111static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1112 struct mtd_oob_ops *ops)
1113{
1114 struct onenand_chip *this = mtd->priv;
1115 struct mtd_ecc_stats stats;
1116 size_t len = ops->len;
1117 size_t ooblen = ops->ooblen;
1118 u_char *buf = ops->datbuf;
1119 u_char *oobbuf = ops->oobbuf;
1120 int read = 0, column, thislen;
1121 int oobread = 0, oobcolumn, thisooblen, oobsize;
1122 int ret = 0;
1123 int writesize = this->writesize;
1124
0a32a102
BN		 1125 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1126 (int)len);
5988af23 1127
0612b9dd 1128 if (ops->mode == MTD_OPS_AUTO_OOB)
5988af23
RH		 1129 oobsize = this->ecclayout->oobavail;
1130 else
1131 oobsize = mtd->oobsize;
1132
1133 oobcolumn = from & (mtd->oobsize - 1);
1134
1135 /* Do not allow reads past end of device */
1136 if (from + len > mtd->size) {
297758f8
AKS		 1137 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1138 __func__);
5988af23
RH		 1139 ops->retlen = 0;
1140 ops->oobretlen = 0;
1141 return -EINVAL;
1142 }
1143
1144 stats = mtd->ecc_stats;
1145
1146 while (read < len) {
1147 cond_resched();
1148
1149 thislen = min_t(int, writesize, len - read);
1150
1151 column = from & (writesize - 1);
1152 if (column + thislen > writesize)
1153 thislen = writesize - column;
1154
1155 if (!onenand_check_bufferram(mtd, from)) {
1156 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1157
1158 ret = this->wait(mtd, FL_READING);
1159 if (unlikely(ret))
1160 ret = onenand_recover_lsb(mtd, from, ret);
1161 onenand_update_bufferram(mtd, from, !ret);
d57f4054 1162 if (mtd_is_eccerr(ret))
5988af23 1163 ret = 0;
b085058f
AH		 1164 if (ret)
1165 break;
5988af23
RH		 1166 }
1167
1168 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1169 if (oobbuf) {
1170 thisooblen = oobsize - oobcolumn;
1171 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1172
0612b9dd 1173 if (ops->mode == MTD_OPS_AUTO_OOB)
5988af23
RH		 1174 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1175 else
1176 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1177 oobread += thisooblen;
1178 oobbuf += thisooblen;
1179 oobcolumn = 0;
1180 }
1181
1182 read += thislen;
1183 if (read == len)
1184 break;
1185
1186 from += thislen;
1187 buf += thislen;
1188 }
1189
1190 /*
1191 * Return success, if no ECC failures, else -EBADMSG
1192 * fs driver will take care of that, because
1193 * retlen == desired len and result == -EBADMSG
1194 */
1195 ops->retlen = read;
1196 ops->oobretlen = oobread;
1197
1198 if (ret)
1199 return ret;
1200
1201 if (mtd->ecc_stats.failed - stats.failed)
1202 return -EBADMSG;
1203
1204 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
1205}
1206
d15057b7 1207/**
49dc08ee 1208 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
cd5f6346
KP		 1209 * @param mtd MTD device structure
1210 * @param from offset to read from
d15057b7 1211 * @param ops: oob operation description structure
cd5f6346 1212 *
d15057b7
KP		 1213 * OneNAND read main and/or out-of-band data
1214 */
49dc08ee 1215static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
d15057b7 1216 struct mtd_oob_ops *ops)
cd5f6346
KP		 1217{
1218 struct onenand_chip *this = mtd->priv;
f4f91ac3 1219 struct mtd_ecc_stats stats;
d15057b7
KP		 1220 size_t len = ops->len;
1221 size_t ooblen = ops->ooblen;
1222 u_char *buf = ops->datbuf;
1223 u_char *oobbuf = ops->oobbuf;
1224 int read = 0, column, thislen;
1225 int oobread = 0, oobcolumn, thisooblen, oobsize;
0fc2ccea 1226 int ret = 0, boundary = 0;
ee9745fc 1227 int writesize = this->writesize;
cd5f6346 1228
0a32a102
BN		 1229 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1230 (int)len);
d15057b7 1231
0612b9dd 1232 if (ops->mode == MTD_OPS_AUTO_OOB)
d15057b7
KP		 1233 oobsize = this->ecclayout->oobavail;
1234 else
1235 oobsize = mtd->oobsize;
1236
1237 oobcolumn = from & (mtd->oobsize - 1);
cd5f6346
KP		 1238
1239 /* Do not allow reads past end of device */
1240 if ((from + len) > mtd->size) {
297758f8
AKS		 1241 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1242 __func__);
d15057b7
KP		 1243 ops->retlen = 0;
1244 ops->oobretlen = 0;
cd5f6346
KP		 1245 return -EINVAL;
1246 }
1247
f4f91ac3 1248 stats = mtd->ecc_stats;
61a7e198 1249
a8de85d5
AH		 1250 /* Read-while-load method */
1251
1252 /* Do first load to bufferRAM */
1253 if (read < len) {
1254 if (!onenand_check_bufferram(mtd, from)) {
ee9745fc 1255 this->command(mtd, ONENAND_CMD_READ, from, writesize);
a8de85d5
AH		 1256 ret = this->wait(mtd, FL_READING);
1257 onenand_update_bufferram(mtd, from, !ret);
d57f4054 1258 if (mtd_is_eccerr(ret))
5f4d47d5 1259 ret = 0;
a8de85d5
AH		 1260 }
1261 }
1262
ee9745fc
KP		 1263 thislen = min_t(int, writesize, len - read);
1264 column = from & (writesize - 1);
1265 if (column + thislen > writesize)
1266 thislen = writesize - column;
a8de85d5
AH		 1267
1268 while (!ret) {
1269 /* If there is more to load then start next load */
1270 from += thislen;
1271 if (read + thislen < len) {
ee9745fc 1272 this->command(mtd, ONENAND_CMD_READ, from, writesize);
0fc2ccea
AH		 1273 /*
1274 * Chip boundary handling in DDP
1275 * Now we issued chip 1 read and pointed chip 1
492e1501 1276 * bufferram so we have to point chip 0 bufferram.
0fc2ccea 1277 */
738d61f5
KP		 1278 if (ONENAND_IS_DDP(this) &&
1279 unlikely(from == (this->chipsize >> 1))) {
1280 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
0fc2ccea
AH		 1281 boundary = 1;
1282 } else
1283 boundary = 0;
a8de85d5
AH		 1284 ONENAND_SET_PREV_BUFFERRAM(this);
1285 }
1286 /* While load is going, read from last bufferRAM */
1287 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
d15057b7
KP		 1288
1289 /* Read oob area if needed */
1290 if (oobbuf) {
1291 thisooblen = oobsize - oobcolumn;
1292 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1293
0612b9dd 1294 if (ops->mode == MTD_OPS_AUTO_OOB)
d15057b7
KP		 1295 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1296 else
1297 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1298 oobread += thisooblen;
1299 oobbuf += thisooblen;
1300 oobcolumn = 0;
1301 }
1302
a8de85d5
AH		 1303 /* See if we are done */
1304 read += thislen;
1305 if (read == len)
1306 break;
1307 /* Set up for next read from bufferRAM */
0fc2ccea 1308 if (unlikely(boundary))
738d61f5 1309 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
a8de85d5
AH		 1310 ONENAND_SET_NEXT_BUFFERRAM(this);
1311 buf += thislen;
ee9745fc 1312 thislen = min_t(int, writesize, len - read);
a8de85d5
AH		 1313 column = 0;
1314 cond_resched();
1315 /* Now wait for load */
1316 ret = this->wait(mtd, FL_READING);
1317 onenand_update_bufferram(mtd, from, !ret);
d57f4054 1318 if (mtd_is_eccerr(ret))
5f4d47d5 1319 ret = 0;
a8de85d5 1320 }
cd5f6346 1321
cd5f6346
KP		 1322 /*
1323 * Return success, if no ECC failures, else -EBADMSG
1324 * fs driver will take care of that, because
1325 * retlen == desired len and result == -EBADMSG
1326 */
d15057b7
KP		 1327 ops->retlen = read;
1328 ops->oobretlen = oobread;
f4f91ac3 1329
a8de85d5
AH		 1330 if (ret)
1331 return ret;
1332
5f4d47d5
AH		 1333 if (mtd->ecc_stats.failed - stats.failed)
1334 return -EBADMSG;
1335
f4f91ac3 1336 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
cd5f6346
KP		 1337}
1338
cd5f6346 1339/**
49dc08ee 1340 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
cd5f6346
KP		 1341 * @param mtd MTD device structure
1342 * @param from offset to read from
d15057b7 1343 * @param ops: oob operation description structure
cd5f6346
KP		 1344 *
1345 * OneNAND read out-of-band data from the spare area
1346 */
49dc08ee 1347static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
12f77c9e 1348 struct mtd_oob_ops *ops)
cd5f6346
KP		 1349{
1350 struct onenand_chip *this = mtd->priv;
5f4d47d5 1351 struct mtd_ecc_stats stats;
a5e7c7b4 1352 int read = 0, thislen, column, oobsize;
12f77c9e 1353 size_t len = ops->ooblen;
905c6bcd 1354 unsigned int mode = ops->mode;
12f77c9e 1355 u_char *buf = ops->oobbuf;
5988af23 1356 int ret = 0, readcmd;
cd5f6346 1357
12f77c9e
KP		 1358 from += ops->ooboffs;
1359
0a32a102
BN		 1360 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1361 (int)len);
cd5f6346
KP		 1362
1363 /* Initialize return length value */
12f77c9e 1364 ops->oobretlen = 0;
cd5f6346 1365
0612b9dd 1366 if (mode == MTD_OPS_AUTO_OOB)
a5e7c7b4
AH		 1367 oobsize = this->ecclayout->oobavail;
1368 else
1369 oobsize = mtd->oobsize;
1370
1371 column = from & (mtd->oobsize - 1);
1372
1373 if (unlikely(column >= oobsize)) {
297758f8
AKS		 1374 printk(KERN_ERR "%s: Attempted to start read outside oob\n",
1375 __func__);
a5e7c7b4
AH		 1376 return -EINVAL;
1377 }
1378
cd5f6346 1379 /* Do not allow reads past end of device */
a5e7c7b4
AH		 1380 if (unlikely(from >= mtd->size ||
1381 column + len > ((mtd->size >> this->page_shift) -
1382 (from >> this->page_shift)) * oobsize)) {
297758f8
AKS		 1383 printk(KERN_ERR "%s: Attempted to read beyond end of device\n",
1384 __func__);
cd5f6346
KP		 1385 return -EINVAL;
1386 }
1387
5f4d47d5
AH		 1388 stats = mtd->ecc_stats;
1389
8a8f632d 1390 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
5988af23 1391
cd5f6346 1392 while (read < len) {
61a7e198
AB		 1393 cond_resched();
1394
a5e7c7b4 1395 thislen = oobsize - column;
cd5f6346
KP		 1396 thislen = min_t(int, thislen, len);
1397
5988af23 1398 this->command(mtd, readcmd, from, mtd->oobsize);
cd5f6346
KP		 1399
1400 onenand_update_bufferram(mtd, from, 0);
1401
1402 ret = this->wait(mtd, FL_READING);
5988af23
RH		 1403 if (unlikely(ret))
1404 ret = onenand_recover_lsb(mtd, from, ret);
1405
d57f4054 1406 if (ret && !mtd_is_eccerr(ret)) {
297758f8
AKS		 1407 printk(KERN_ERR "%s: read failed = 0x%x\n",
1408 __func__, ret);
5f4d47d5
AH		 1409 break;
1410 }
cd5f6346 1411
0612b9dd 1412 if (mode == MTD_OPS_AUTO_OOB)
a5e7c7b4
AH		 1413 onenand_transfer_auto_oob(mtd, buf, column, thislen);
1414 else
1415 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
cd5f6346
KP		 1416
1417 read += thislen;
1418
1419 if (read == len)
1420 break;
1421
cd5f6346
KP		 1422 buf += thislen;
1423
1424 /* Read more? */
1425 if (read < len) {
1426 /* Page size */
28318776 1427 from += mtd->writesize;
cd5f6346
KP		 1428 column = 0;
1429 }
1430 }
1431
12f77c9e 1432 ops->oobretlen = read;
5f4d47d5
AH		 1433
1434 if (ret)
1435 return ret;
1436
1437 if (mtd->ecc_stats.failed - stats.failed)
1438 return -EBADMSG;
1439
1440 return 0;
cd5f6346
KP		 1441}
1442
8593fbc6 1443/**
d15057b7
KP		 1444 * onenand_read - [MTD Interface] Read data from flash
1445 * @param mtd MTD device structure
1446 * @param from offset to read from
1447 * @param len number of bytes to read
1448 * @param retlen pointer to variable to store the number of read bytes
1449 * @param buf the databuffer to put data
1450 *
1451 * Read with ecc
1452*/
1453static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1454 size_t *retlen, u_char *buf)
1455{
5988af23 1456 struct onenand_chip *this = mtd->priv;
d15057b7
KP		 1457 struct mtd_oob_ops ops = {
1458 .len = len,
1459 .ooblen = 0,
1460 .datbuf = buf,
1461 .oobbuf = NULL,
1462 };
1463 int ret;
1464
49dc08ee 1465 onenand_get_device(mtd, FL_READING);
8a8f632d 1466 ret = ONENAND_IS_4KB_PAGE(this) ?
5988af23
RH		 1467 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
1468 onenand_read_ops_nolock(mtd, from, &ops);
49dc08ee 1469 onenand_release_device(mtd);
d15057b7 1470
49dc08ee 1471 *retlen = ops.retlen;
d15057b7
KP		 1472 return ret;
1473}
1474
1475/**
1476 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
e3da8067
KP		 1477 * @param mtd: MTD device structure
1478 * @param from: offset to read from
1479 * @param ops: oob operation description structure
d15057b7
KP		 1480
1481 * Read main and/or out-of-band
8593fbc6
TG		 1482 */
1483static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1484 struct mtd_oob_ops *ops)
1485{
5988af23 1486 struct onenand_chip *this = mtd->priv;
49dc08ee
AB		 1487 int ret;
1488
4f4fad27 1489 switch (ops->mode) {
0612b9dd
BN		 1490 case MTD_OPS_PLACE_OOB:
1491 case MTD_OPS_AUTO_OOB:
a5e7c7b4 1492 break;
0612b9dd 1493 case MTD_OPS_RAW:
4f4fad27 1494 /* Not implemented yet */
a5e7c7b4
AH		 1495 default:
1496 return -EINVAL;
1497 }
d15057b7 1498
49dc08ee 1499 onenand_get_device(mtd, FL_READING);
d15057b7 1500 if (ops->datbuf)
8a8f632d 1501 ret = ONENAND_IS_4KB_PAGE(this) ?
5988af23
RH		 1502 onenand_mlc_read_ops_nolock(mtd, from, ops) :
1503 onenand_read_ops_nolock(mtd, from, ops);
49dc08ee
AB		 1504 else
1505 ret = onenand_read_oob_nolock(mtd, from, ops);
1506 onenand_release_device(mtd);
d15057b7 1507
49dc08ee 1508 return ret;
8593fbc6
TG		 1509}
1510
211ac75f
KP		 1511/**
1512 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1513 * @param mtd MTD device structure
1514 * @param state state to select the max. timeout value
1515 *
1516 * Wait for command done.
1517 */
1518static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1519{
1520 struct onenand_chip *this = mtd->priv;
1521 unsigned long timeout;
e0c1a921 1522 unsigned int interrupt, ctrl, ecc, addr1, addr8;
211ac75f
KP		 1523
1524 /* The 20 msec is enough */
1525 timeout = jiffies + msecs_to_jiffies(20);
1526 while (time_before(jiffies, timeout)) {
1527 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1528 if (interrupt & ONENAND_INT_MASTER)
1529 break;
1530 }
1531 /* To get correct interrupt status in timeout case */
1532 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1533 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
e0c1a921
AH		 1534 addr1 = this->read_word(this->base + ONENAND_REG_START_ADDRESS1);
1535 addr8 = this->read_word(this->base + ONENAND_REG_START_ADDRESS8);
211ac75f 1536
211ac75f 1537 if (interrupt & ONENAND_INT_READ) {
e0c1a921 1538 ecc = onenand_read_ecc(this);
83973b87 1539 if (ecc & ONENAND_ECC_2BIT_ALL) {
e0c1a921
AH		 1540 printk(KERN_DEBUG "%s: ecc 0x%04x ctrl 0x%04x "
1541 "intr 0x%04x addr1 %#x addr8 %#x\n",
1542 __func__, ecc, ctrl, interrupt, addr1, addr8);
5988af23 1543 return ONENAND_BBT_READ_ECC_ERROR;
83973b87 1544 }
211ac75f 1545 } else {
e0c1a921
AH		 1546 printk(KERN_ERR "%s: read timeout! ctrl 0x%04x "
1547 "intr 0x%04x addr1 %#x addr8 %#x\n",
1548 __func__, ctrl, interrupt, addr1, addr8);
211ac75f
KP		 1549 return ONENAND_BBT_READ_FATAL_ERROR;
1550 }
1551
83973b87
KP		 1552 /* Initial bad block case: 0x2400 or 0x0400 */
1553 if (ctrl & ONENAND_CTRL_ERROR) {
e0c1a921
AH		 1554 printk(KERN_DEBUG "%s: ctrl 0x%04x intr 0x%04x addr1 %#x "
1555 "addr8 %#x\n", __func__, ctrl, interrupt, addr1, addr8);
83973b87
KP		 1556 return ONENAND_BBT_READ_ERROR;
1557 }
1558
211ac75f
KP		 1559 return 0;
1560}
1561
1562/**
1563 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1564 * @param mtd MTD device structure
1565 * @param from offset to read from
e3da8067 1566 * @param ops oob operation description structure
211ac75f
KP		 1567 *
1568 * OneNAND read out-of-band data from the spare area for bbt scan
1569 */
1570int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1571 struct mtd_oob_ops *ops)
1572{
1573 struct onenand_chip *this = mtd->priv;
1574 int read = 0, thislen, column;
5988af23 1575 int ret = 0, readcmd;
211ac75f
KP		 1576 size_t len = ops->ooblen;
1577 u_char *buf = ops->oobbuf;
1578
0a32a102
BN		 1579 pr_debug("%s: from = 0x%08x, len = %zi\n", __func__, (unsigned int)from,
1580 len);
211ac75f
KP		 1581
1582 /* Initialize return value */
1583 ops->oobretlen = 0;
1584
1585 /* Do not allow reads past end of device */
1586 if (unlikely((from + len) > mtd->size)) {
297758f8
AKS		 1587 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1588 __func__);
211ac75f
KP		 1589 return ONENAND_BBT_READ_FATAL_ERROR;
1590 }
1591
1592 /* Grab the lock and see if the device is available */
1593 onenand_get_device(mtd, FL_READING);
1594
1595 column = from & (mtd->oobsize - 1);
1596
8a8f632d 1597 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
5988af23 1598
211ac75f
KP		 1599 while (read < len) {
1600 cond_resched();
1601
1602 thislen = mtd->oobsize - column;
1603 thislen = min_t(int, thislen, len);
1604
5988af23 1605 this->command(mtd, readcmd, from, mtd->oobsize);
211ac75f
KP		 1606
1607 onenand_update_bufferram(mtd, from, 0);
1608
31bb999e 1609 ret = this->bbt_wait(mtd, FL_READING);
5988af23
RH		 1610 if (unlikely(ret))
1611 ret = onenand_recover_lsb(mtd, from, ret);
1612
211ac75f
KP		 1613 if (ret)
1614 break;
1615
1616 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1617 read += thislen;
1618 if (read == len)
1619 break;
1620
1621 buf += thislen;
1622
1623 /* Read more? */
1624 if (read < len) {
1625 /* Update Page size */
ee9745fc 1626 from += this->writesize;
211ac75f
KP		 1627 column = 0;
1628 }
1629 }
1630
1631 /* Deselect and wake up anyone waiting on the device */
1632 onenand_release_device(mtd);
1633
1634 ops->oobretlen = read;
1635 return ret;
1636}
1637
cd5f6346 1638#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
8e6ec690
KP		 1639/**
1640 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1641 * @param mtd MTD device structure
1642 * @param buf the databuffer to verify
1643 * @param to offset to read from
8e6ec690 1644 */
a5e7c7b4 1645static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
8e6ec690
KP		 1646{
1647 struct onenand_chip *this = mtd->priv;
69d79186 1648 u_char *oob_buf = this->oob_buf;
5988af23
RH		 1649 int status, i, readcmd;
1650
8a8f632d 1651 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
8e6ec690 1652
5988af23 1653 this->command(mtd, readcmd, to, mtd->oobsize);
8e6ec690
KP		 1654 onenand_update_bufferram(mtd, to, 0);
1655 status = this->wait(mtd, FL_READING);
1656 if (status)
1657 return status;
1658
69d79186 1659 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
91014e9b 1660 for (i = 0; i < mtd->oobsize; i++)
69d79186 1661 if (buf[i] != 0xFF && buf[i] != oob_buf[i])
8e6ec690
KP		 1662 return -EBADMSG;
1663
1664 return 0;
1665}
1666
cd5f6346 1667/**
8b29c0b6
AH		 1668 * onenand_verify - [GENERIC] verify the chip contents after a write
1669 * @param mtd MTD device structure
1670 * @param buf the databuffer to verify
1671 * @param addr offset to read from
1672 * @param len number of bytes to read and compare
cd5f6346 1673 */
8b29c0b6 1674static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
cd5f6346
KP		 1675{
1676 struct onenand_chip *this = mtd->priv;
cd5f6346 1677 int ret = 0;
8b29c0b6 1678 int thislen, column;
cd5f6346 1679
e6da8568
RT		 1680 column = addr & (this->writesize - 1);
1681
8b29c0b6 1682 while (len != 0) {
e6da8568 1683 thislen = min_t(int, this->writesize - column, len);
60d84f97 1684
ee9745fc 1685 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
cd5f6346 1686
8b29c0b6
AH		 1687 onenand_update_bufferram(mtd, addr, 0);
1688
1689 ret = this->wait(mtd, FL_READING);
1690 if (ret)
1691 return ret;
cd5f6346 1692
8b29c0b6 1693 onenand_update_bufferram(mtd, addr, 1);
cd5f6346 1694
3328dc31 1695 this->read_bufferram(mtd, ONENAND_DATARAM, this->verify_buf, 0, mtd->writesize);
cd5f6346 1696
e6da8568 1697 if (memcmp(buf, this->verify_buf + column, thislen))
8b29c0b6
AH		 1698 return -EBADMSG;
1699
1700 len -= thislen;
1701 buf += thislen;
1702 addr += thislen;
e6da8568 1703 column = 0;
8b29c0b6 1704 }
d5c5e78a 1705
cd5f6346
KP		 1706 return 0;
1707}
1708#else
8b29c0b6 1709#define onenand_verify(...) (0)
8e6ec690 1710#define onenand_verify_oob(...) (0)
cd5f6346
KP		 1711#endif
1712
60d84f97 1713#define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
cd5f6346 1714
6c77fd64
RP		 1715static void onenand_panic_wait(struct mtd_info *mtd)
1716{
1717 struct onenand_chip *this = mtd->priv;
1718 unsigned int interrupt;
1719 int i;
1720
1721 for (i = 0; i < 2000; i++) {
1722 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1723 if (interrupt & ONENAND_INT_MASTER)
1724 break;
1725 udelay(10);
1726 }
1727}
1728
1729/**
1730 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
1731 * @param mtd MTD device structure
1732 * @param to offset to write to
1733 * @param len number of bytes to write
1734 * @param retlen pointer to variable to store the number of written bytes
1735 * @param buf the data to write
1736 *
1737 * Write with ECC
1738 */
1739static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
1740 size_t *retlen, const u_char *buf)
1741{
1742 struct onenand_chip *this = mtd->priv;
1743 int column, subpage;
1744 int written = 0;
1745 int ret = 0;
1746
1747 if (this->state == FL_PM_SUSPENDED)
1748 return -EBUSY;
1749
1750 /* Wait for any existing operation to clear */
1751 onenand_panic_wait(mtd);
1752
0a32a102
BN		 1753 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
1754 (int)len);
6c77fd64 1755
6c77fd64 1756 /* Reject writes, which are not page aligned */
b73d7e43 1757 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
297758f8
AKS		 1758 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1759 __func__);
6c77fd64
RP		 1760 return -EINVAL;
1761 }
1762
1763 column = to & (mtd->writesize - 1);
1764
1765 /* Loop until all data write */
1766 while (written < len) {
1767 int thislen = min_t(int, mtd->writesize - column, len - written);
1768 u_char *wbuf = (u_char *) buf;
1769
1770 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1771
1772 /* Partial page write */
1773 subpage = thislen < mtd->writesize;
1774 if (subpage) {
1775 memset(this->page_buf, 0xff, mtd->writesize);
1776 memcpy(this->page_buf + column, buf, thislen);
1777 wbuf = this->page_buf;
1778 }
1779
1780 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1781 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1782
1783 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1784
1785 onenand_panic_wait(mtd);
1786
1787 /* In partial page write we don't update bufferram */
1788 onenand_update_bufferram(mtd, to, !ret && !subpage);
1789 if (ONENAND_IS_2PLANE(this)) {
1790 ONENAND_SET_BUFFERRAM1(this);
1791 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1792 }
1793
1794 if (ret) {
297758f8 1795 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
6c77fd64
RP		 1796 break;
1797 }
1798
1799 written += thislen;
1800
1801 if (written == len)
1802 break;
1803
1804 column = 0;
1805 to += thislen;
1806 buf += thislen;
1807 }
1808
1809 *retlen = written;
1810 return ret;
1811}
1812
cd5f6346 1813/**
7854d3f7 1814 * onenand_fill_auto_oob - [INTERN] oob auto-placement transfer
d15057b7
KP		 1815 * @param mtd MTD device structure
1816 * @param oob_buf oob buffer
1817 * @param buf source address
1818 * @param column oob offset to write to
1819 * @param thislen oob length to write
1820 */
1821static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1822 const u_char *buf, int column, int thislen)
1823{
1824 struct onenand_chip *this = mtd->priv;
1825 struct nand_oobfree *free;
1826 int writecol = column;
1827 int writeend = column + thislen;
1828 int lastgap = 0;
1829 unsigned int i;
1830
1831 free = this->ecclayout->oobfree;
1832 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1833 if (writecol >= lastgap)
1834 writecol += free->offset - lastgap;
1835 if (writeend >= lastgap)
1836 writeend += free->offset - lastgap;
1837 lastgap = free->offset + free->length;
1838 }
1839 free = this->ecclayout->oobfree;
1840 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1841 int free_end = free->offset + free->length;
1842 if (free->offset < writeend && free_end > writecol) {
1843 int st = max_t(int,free->offset,writecol);
1844 int ed = min_t(int,free_end,writeend);
1845 int n = ed - st;
1846 memcpy(oob_buf + st, buf, n);
1847 buf += n;
1848 } else if (column == 0)
1849 break;
1850 }
1851 return 0;
1852}
1853
1854/**
49dc08ee 1855 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
cd5f6346
KP		 1856 * @param mtd MTD device structure
1857 * @param to offset to write to
d15057b7 1858 * @param ops oob operation description structure
cd5f6346 1859 *
d15057b7 1860 * Write main and/or oob with ECC
cd5f6346 1861 */
49dc08ee 1862static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
d15057b7 1863 struct mtd_oob_ops *ops)
cd5f6346
KP		 1864{
1865 struct onenand_chip *this = mtd->priv;
9ce96908
KP		 1866 int written = 0, column, thislen = 0, subpage = 0;
1867 int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
d15057b7
KP		 1868 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1869 size_t len = ops->len;
1870 size_t ooblen = ops->ooblen;
1871 const u_char *buf = ops->datbuf;
1872 const u_char *oob = ops->oobbuf;
1873 u_char *oobbuf;
ac80dac0 1874 int ret = 0, cmd;
cd5f6346 1875
0a32a102
BN		 1876 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
1877 (int)len);
cd5f6346
KP		 1878
1879 /* Initialize retlen, in case of early exit */
d15057b7
KP		 1880 ops->retlen = 0;
1881 ops->oobretlen = 0;
cd5f6346 1882
cd5f6346 1883 /* Reject writes, which are not page aligned */
b73d7e43 1884 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
297758f8
AKS		 1885 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1886 __func__);
cd5f6346
KP		 1887 return -EINVAL;
1888 }
1889
9ce96908
KP		 1890 /* Check zero length */
1891 if (!len)
1892 return 0;
1893
0612b9dd 1894 if (ops->mode == MTD_OPS_AUTO_OOB)
d15057b7
KP		 1895 oobsize = this->ecclayout->oobavail;
1896 else
1897 oobsize = mtd->oobsize;
1898
1899 oobcolumn = to & (mtd->oobsize - 1);
1900
60d84f97 1901 column = to & (mtd->writesize - 1);
60d84f97 1902
cd5f6346 1903 /* Loop until all data write */
9ce96908
KP		 1904 while (1) {
1905 if (written < len) {
1906 u_char *wbuf = (u_char *) buf;
60d84f97 1907
9ce96908
KP		 1908 thislen = min_t(int, mtd->writesize - column, len - written);
1909 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
d15057b7 1910
9ce96908 1911 cond_resched();
61a7e198 1912
9ce96908 1913 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
60d84f97 1914
9ce96908
KP		 1915 /* Partial page write */
1916 subpage = thislen < mtd->writesize;
1917 if (subpage) {
1918 memset(this->page_buf, 0xff, mtd->writesize);
1919 memcpy(this->page_buf + column, buf, thislen);
1920 wbuf = this->page_buf;
1921 }
cd5f6346 1922
9ce96908 1923 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
d15057b7 1924
9ce96908
KP		 1925 if (oob) {
1926 oobbuf = this->oob_buf;
d15057b7 1927
9ce96908
KP		 1928 /* We send data to spare ram with oobsize
1929 * to prevent byte access */
1930 memset(oobbuf, 0xff, mtd->oobsize);
0612b9dd 1931 if (ops->mode == MTD_OPS_AUTO_OOB)
9ce96908
KP		 1932 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1933 else
1934 memcpy(oobbuf + oobcolumn, oob, thisooblen);
d15057b7 1935
9ce96908
KP		 1936 oobwritten += thisooblen;
1937 oob += thisooblen;
1938 oobcolumn = 0;
1939 } else
1940 oobbuf = (u_char *) ffchars;
1941
1942 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
d15057b7 1943 } else
9ce96908 1944 ONENAND_SET_NEXT_BUFFERRAM(this);
d15057b7 1945
9ce96908 1946 /*
492e1501
MK		 1947 * 2 PLANE, MLC, and Flex-OneNAND do not support
1948 * write-while-program feature.
9ce96908 1949 */
6a88c47b 1950 if (!ONENAND_IS_2PLANE(this) && !ONENAND_IS_4KB_PAGE(this) && !first) {
9ce96908
KP		 1951 ONENAND_SET_PREV_BUFFERRAM(this);
1952
1953 ret = this->wait(mtd, FL_WRITING);
1954
1955 /* In partial page write we don't update bufferram */
1956 onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
1957 if (ret) {
1958 written -= prevlen;
297758f8
AKS		 1959 printk(KERN_ERR "%s: write failed %d\n",
1960 __func__, ret);
9ce96908
KP		 1961 break;
1962 }
cd5f6346 1963
9ce96908
KP		 1964 if (written == len) {
1965 /* Only check verify write turn on */
1966 ret = onenand_verify(mtd, buf - len, to - len, len);
1967 if (ret)
297758f8
AKS		 1968 printk(KERN_ERR "%s: verify failed %d\n",
1969 __func__, ret);
9ce96908
KP		 1970 break;
1971 }
cd5f6346 1972
9ce96908
KP		 1973 ONENAND_SET_NEXT_BUFFERRAM(this);
1974 }
81f38e11 1975
ac80dac0
RT		 1976 this->ongoing = 0;
1977 cmd = ONENAND_CMD_PROG;
1978
1979 /* Exclude 1st OTP and OTP blocks for cache program feature */
1980 if (ONENAND_IS_CACHE_PROGRAM(this) &&
1981 likely(onenand_block(this, to) != 0) &&
1982 ONENAND_IS_4KB_PAGE(this) &&
1983 ((written + thislen) < len)) {
1984 cmd = ONENAND_CMD_2X_CACHE_PROG;
1985 this->ongoing = 1;
1986 }
1987
1988 this->command(mtd, cmd, to, mtd->writesize);
9ce96908
KP		 1989
1990 /*
1991 * 2 PLANE, MLC, and Flex-OneNAND wait here
1992 */
6a88c47b 1993 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) {
9ce96908 1994 ret = this->wait(mtd, FL_WRITING);
cd5f6346 1995
9ce96908
KP		 1996 /* In partial page write we don't update bufferram */
1997 onenand_update_bufferram(mtd, to, !ret && !subpage);
1998 if (ret) {
297758f8
AKS		 1999 printk(KERN_ERR "%s: write failed %d\n",
2000 __func__, ret);
9ce96908
KP		 2001 break;
2002 }
cd5f6346 2003
9ce96908
KP		 2004 /* Only check verify write turn on */
2005 ret = onenand_verify(mtd, buf, to, thislen);
2006 if (ret) {
297758f8
AKS		 2007 printk(KERN_ERR "%s: verify failed %d\n",
2008 __func__, ret);
9ce96908
KP		 2009 break;
2010 }
cd5f6346 2011
9ce96908 2012 written += thislen;
81f38e11 2013
9ce96908
KP		 2014 if (written == len)
2015 break;
2016
2017 } else
2018 written += thislen;
cd5f6346 2019
60d84f97 2020 column = 0;
9ce96908
KP		 2021 prev_subpage = subpage;
2022 prev = to;
2023 prevlen = thislen;
cd5f6346
KP		 2024 to += thislen;
2025 buf += thislen;
9ce96908 2026 first = 0;
cd5f6346
KP		 2027 }
2028
9ce96908
KP		 2029 /* In error case, clear all bufferrams */
2030 if (written != len)
2031 onenand_invalidate_bufferram(mtd, 0, -1);
2032
d15057b7 2033 ops->retlen = written;
9ce96908 2034 ops->oobretlen = oobwritten;
d5c5e78a 2035
cd5f6346
KP		 2036 return ret;
2037}
2038
a5e7c7b4 2039
cd5f6346 2040/**
7854d3f7 2041 * onenand_write_oob_nolock - [INTERN] OneNAND write out-of-band
cd5f6346
KP		 2042 * @param mtd MTD device structure
2043 * @param to offset to write to
2044 * @param len number of bytes to write
2045 * @param retlen pointer to variable to store the number of written bytes
2046 * @param buf the data to write
a5e7c7b4 2047 * @param mode operation mode
cd5f6346
KP		 2048 *
2049 * OneNAND write out-of-band
2050 */
49dc08ee
AB		 2051static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2052 struct mtd_oob_ops *ops)
cd5f6346
KP		 2053{
2054 struct onenand_chip *this = mtd->priv;
a5e7c7b4 2055 int column, ret = 0, oobsize;
5988af23 2056 int written = 0, oobcmd;
91014e9b 2057 u_char *oobbuf;
12f77c9e
KP		 2058 size_t len = ops->ooblen;
2059 const u_char *buf = ops->oobbuf;
905c6bcd 2060 unsigned int mode = ops->mode;
12f77c9e
KP		 2061
2062 to += ops->ooboffs;
cd5f6346 2063
0a32a102
BN		 2064 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
2065 (int)len);
cd5f6346
KP		 2066
2067 /* Initialize retlen, in case of early exit */
12f77c9e 2068 ops->oobretlen = 0;
cd5f6346 2069
0612b9dd 2070 if (mode == MTD_OPS_AUTO_OOB)
a5e7c7b4
AH		 2071 oobsize = this->ecclayout->oobavail;
2072 else
2073 oobsize = mtd->oobsize;
2074
2075 column = to & (mtd->oobsize - 1);
2076
2077 if (unlikely(column >= oobsize)) {
297758f8
AKS		 2078 printk(KERN_ERR "%s: Attempted to start write outside oob\n",
2079 __func__);
a5e7c7b4
AH		 2080 return -EINVAL;
2081 }
2082
52e4200a 2083 /* For compatibility with NAND: Do not allow write past end of page */
91014e9b 2084 if (unlikely(column + len > oobsize)) {
297758f8
AKS		 2085 printk(KERN_ERR "%s: Attempt to write past end of page\n",
2086 __func__);
52e4200a
AH		 2087 return -EINVAL;
2088 }
2089
a5e7c7b4
AH		 2090 /* Do not allow reads past end of device */
2091 if (unlikely(to >= mtd->size ||
2092 column + len > ((mtd->size >> this->page_shift) -
2093 (to >> this->page_shift)) * oobsize)) {
8032747e
DW		 2094 printk(KERN_ERR "%s: Attempted to write past end of device\n",
2095 __func__);
cd5f6346
KP		 2096 return -EINVAL;
2097 }
2098
470bc844 2099 oobbuf = this->oob_buf;
91014e9b 2100
8a8f632d 2101 oobcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
5988af23 2102
cd5f6346
KP		 2103 /* Loop until all data write */
2104 while (written < len) {
a5e7c7b4 2105 int thislen = min_t(int, oobsize, len - written);
cd5f6346 2106
61a7e198
AB		 2107 cond_resched();
2108
cd5f6346
KP		 2109 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
2110
34c10609
KP		 2111 /* We send data to spare ram with oobsize
2112 * to prevent byte access */
91014e9b 2113 memset(oobbuf, 0xff, mtd->oobsize);
0612b9dd 2114 if (mode == MTD_OPS_AUTO_OOB)
91014e9b 2115 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
a5e7c7b4 2116 else
91014e9b
KP		 2117 memcpy(oobbuf + column, buf, thislen);
2118 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
cd5f6346 2119
8a8f632d 2120 if (ONENAND_IS_4KB_PAGE(this)) {
5988af23
RH		 2121 /* Set main area of DataRAM to 0xff*/
2122 memset(this->page_buf, 0xff, mtd->writesize);
2123 this->write_bufferram(mtd, ONENAND_DATARAM,
2124 this->page_buf, 0, mtd->writesize);
2125 }
2126
2127 this->command(mtd, oobcmd, to, mtd->oobsize);
cd5f6346
KP		 2128
2129 onenand_update_bufferram(mtd, to, 0);
ee9745fc
KP		 2130 if (ONENAND_IS_2PLANE(this)) {
2131 ONENAND_SET_BUFFERRAM1(this);
2132 onenand_update_bufferram(mtd, to + this->writesize, 0);
2133 }
cd5f6346 2134
8e6ec690
KP		 2135 ret = this->wait(mtd, FL_WRITING);
2136 if (ret) {
297758f8 2137 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
5b4246f1 2138 break;
8e6ec690
KP		 2139 }
2140
91014e9b 2141 ret = onenand_verify_oob(mtd, oobbuf, to);
8e6ec690 2142 if (ret) {
297758f8
AKS		 2143 printk(KERN_ERR "%s: verify failed %d\n",
2144 __func__, ret);
5b4246f1 2145 break;
8e6ec690 2146 }
cd5f6346
KP		 2147
2148 written += thislen;
cd5f6346
KP		 2149 if (written == len)
2150 break;
2151
a5e7c7b4 2152 to += mtd->writesize;
cd5f6346 2153 buf += thislen;
a5e7c7b4 2154 column = 0;
cd5f6346
KP		 2155 }
2156
12f77c9e 2157 ops->oobretlen = written;
d5c5e78a 2158
8e6ec690 2159 return ret;
cd5f6346
KP		 2160}
2161
d15057b7
KP		 2162/**
2163 * onenand_write - [MTD Interface] write buffer to FLASH
2164 * @param mtd MTD device structure
2165 * @param to offset to write to
2166 * @param len number of bytes to write
2167 * @param retlen pointer to variable to store the number of written bytes
2168 * @param buf the data to write
2169 *
2170 * Write with ECC
2171 */
2172static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
2173 size_t *retlen, const u_char *buf)
2174{
2175 struct mtd_oob_ops ops = {
2176 .len = len,
2177 .ooblen = 0,
2178 .datbuf = (u_char *) buf,
2179 .oobbuf = NULL,
2180 };
2181 int ret;
2182
49dc08ee
AB		 2183 onenand_get_device(mtd, FL_WRITING);
2184 ret = onenand_write_ops_nolock(mtd, to, &ops);
2185 onenand_release_device(mtd);
d15057b7 2186
49dc08ee 2187 *retlen = ops.retlen;
d15057b7
KP		 2188 return ret;
2189}
2190
8593fbc6
TG		 2191/**
2192 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
e3da8067
KP		 2193 * @param mtd: MTD device structure
2194 * @param to: offset to write
2195 * @param ops: oob operation description structure
8593fbc6
TG		 2196 */
2197static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
2198 struct mtd_oob_ops *ops)
2199{
49dc08ee
AB		 2200 int ret;
2201
4f4fad27 2202 switch (ops->mode) {
0612b9dd
BN		 2203 case MTD_OPS_PLACE_OOB:
2204 case MTD_OPS_AUTO_OOB:
a5e7c7b4 2205 break;
0612b9dd 2206 case MTD_OPS_RAW:
4f4fad27 2207 /* Not implemented yet */
a5e7c7b4
AH		 2208 default:
2209 return -EINVAL;
2210 }
d15057b7 2211
49dc08ee 2212 onenand_get_device(mtd, FL_WRITING);
d15057b7 2213 if (ops->datbuf)
49dc08ee
AB		 2214 ret = onenand_write_ops_nolock(mtd, to, ops);
2215 else
2216 ret = onenand_write_oob_nolock(mtd, to, ops);
2217 onenand_release_device(mtd);
d15057b7 2218
49dc08ee 2219 return ret;
8593fbc6
TG		 2220}
2221
cdc00130 2222/**
49dc08ee 2223 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
cdc00130
KP		 2224 * @param mtd MTD device structure
2225 * @param ofs offset from device start
cdc00130
KP		 2226 * @param allowbbt 1, if its allowed to access the bbt area
2227 *
2228 * Check, if the block is bad. Either by reading the bad block table or
2229 * calling of the scan function.
2230 */
49dc08ee 2231static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
cdc00130
KP		 2232{
2233 struct onenand_chip *this = mtd->priv;
2234 struct bbm_info *bbm = this->bbm;
2235
2236 /* Return info from the table */
2237 return bbm->isbad_bbt(mtd, ofs, allowbbt);
2238}
2239
72073027
MK		 2240
2241static int onenand_multiblock_erase_verify(struct mtd_info *mtd,
2242 struct erase_info *instr)
2243{
2244 struct onenand_chip *this = mtd->priv;
2245 loff_t addr = instr->addr;
2246 int len = instr->len;
2247 unsigned int block_size = (1 << this->erase_shift);
2248 int ret = 0;
2249
2250 while (len) {
2251 this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size);
2252 ret = this->wait(mtd, FL_VERIFYING_ERASE);
2253 if (ret) {
2254 printk(KERN_ERR "%s: Failed verify, block %d\n",
2255 __func__, onenand_block(this, addr));
2256 instr->state = MTD_ERASE_FAILED;
2257 instr->fail_addr = addr;
2258 return -1;
2259 }
2260 len -= block_size;
2261 addr += block_size;
2262 }
2263 return 0;
2264}
2265
2266/**
7854d3f7 2267 * onenand_multiblock_erase - [INTERN] erase block(s) using multiblock erase
72073027
MK		 2268 * @param mtd MTD device structure
2269 * @param instr erase instruction
2270 * @param region erase region
2271 *
2272 * Erase one or more blocks up to 64 block at a time
2273 */
2274static int onenand_multiblock_erase(struct mtd_info *mtd,
2275 struct erase_info *instr,
2276 unsigned int block_size)
2277{
2278 struct onenand_chip *this = mtd->priv;
2279 loff_t addr = instr->addr;
2280 int len = instr->len;
2281 int eb_count = 0;
2282 int ret = 0;
2283 int bdry_block = 0;
2284
2285 instr->state = MTD_ERASING;
2286
2287 if (ONENAND_IS_DDP(this)) {
2288 loff_t bdry_addr = this->chipsize >> 1;
2289 if (addr < bdry_addr && (addr + len) > bdry_addr)
2290 bdry_block = bdry_addr >> this->erase_shift;
2291 }
2292
2293 /* Pre-check bbs */
2294 while (len) {
2295 /* Check if we have a bad block, we do not erase bad blocks */
2296 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2297 printk(KERN_WARNING "%s: attempt to erase a bad block "
2298 "at addr 0x%012llx\n",
2299 __func__, (unsigned long long) addr);
2300 instr->state = MTD_ERASE_FAILED;
2301 return -EIO;
2302 }
2303 len -= block_size;
2304 addr += block_size;
2305 }
2306
2307 len = instr->len;
2308 addr = instr->addr;
2309
2310 /* loop over 64 eb batches */
2311 while (len) {
2312 struct erase_info verify_instr = *instr;
2313 int max_eb_count = MB_ERASE_MAX_BLK_COUNT;
2314
2315 verify_instr.addr = addr;
2316 verify_instr.len = 0;
2317
2318 /* do not cross chip boundary */
2319 if (bdry_block) {
2320 int this_block = (addr >> this->erase_shift);
2321
2322 if (this_block < bdry_block) {
2323 max_eb_count = min(max_eb_count,
2324 (bdry_block - this_block));
2325 }
2326 }
2327
2328 eb_count = 0;
2329
2330 while (len > block_size && eb_count < (max_eb_count - 1)) {
2331 this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE,
2332 addr, block_size);
2333 onenand_invalidate_bufferram(mtd, addr, block_size);
2334
2335 ret = this->wait(mtd, FL_PREPARING_ERASE);
2336 if (ret) {
2337 printk(KERN_ERR "%s: Failed multiblock erase, "
2338 "block %d\n", __func__,
2339 onenand_block(this, addr));
2340 instr->state = MTD_ERASE_FAILED;
2341 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2342 return -EIO;
2343 }
2344
2345 len -= block_size;
2346 addr += block_size;
2347 eb_count++;
2348 }
2349
2350 /* last block of 64-eb series */
2351 cond_resched();
2352 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2353 onenand_invalidate_bufferram(mtd, addr, block_size);
2354
2355 ret = this->wait(mtd, FL_ERASING);
2356 /* Check if it is write protected */
2357 if (ret) {
2358 printk(KERN_ERR "%s: Failed erase, block %d\n",
2359 __func__, onenand_block(this, addr));
2360 instr->state = MTD_ERASE_FAILED;
2361 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2362 return -EIO;
2363 }
2364
2365 len -= block_size;
2366 addr += block_size;
2367 eb_count++;
2368
2369 /* verify */
2370 verify_instr.len = eb_count * block_size;
2371 if (onenand_multiblock_erase_verify(mtd, &verify_instr)) {
2372 instr->state = verify_instr.state;
2373 instr->fail_addr = verify_instr.fail_addr;
2374 return -EIO;
2375 }
2376
2377 }
2378 return 0;
2379}
2380
2381
cd5f6346 2382/**
7854d3f7 2383 * onenand_block_by_block_erase - [INTERN] erase block(s) using regular erase
cd5f6346
KP		 2384 * @param mtd MTD device structure
2385 * @param instr erase instruction
73885aea
MK		 2386 * @param region erase region
2387 * @param block_size erase block size
cd5f6346 2388 *
73885aea 2389 * Erase one or more blocks one block at a time
cd5f6346 2390 */
73885aea
MK		 2391static int onenand_block_by_block_erase(struct mtd_info *mtd,
2392 struct erase_info *instr,
2393 struct mtd_erase_region_info *region,
2394 unsigned int block_size)
cd5f6346
KP		 2395{
2396 struct onenand_chip *this = mtd->priv;
5988af23 2397 loff_t addr = instr->addr;
73885aea 2398 int len = instr->len;
5988af23 2399 loff_t region_end = 0;
73885aea 2400 int ret = 0;
cd5f6346 2401
73885aea
MK		 2402 if (region) {
2403 /* region is set for Flex-OneNAND */
5988af23 2404 region_end = region->offset + region->erasesize * region->numblocks;
cd5f6346
KP		 2405 }
2406
cd5f6346
KP		 2407 instr->state = MTD_ERASING;
2408
73885aea 2409 /* Loop through the blocks */
cd5f6346 2410 while (len) {
61a7e198 2411 cond_resched();
cd5f6346 2412
cdc00130 2413 /* Check if we have a bad block, we do not erase bad blocks */
49dc08ee 2414 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
297758f8
AKS		 2415 printk(KERN_WARNING "%s: attempt to erase a bad block "
2416 "at addr 0x%012llx\n",
2417 __func__, (unsigned long long) addr);
cdc00130 2418 instr->state = MTD_ERASE_FAILED;
73885aea 2419 return -EIO;
cdc00130 2420 }
cd5f6346
KP		 2421
2422 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2423
480b9dfb
AH		 2424 onenand_invalidate_bufferram(mtd, addr, block_size);
2425
cd5f6346
KP		 2426 ret = this->wait(mtd, FL_ERASING);
2427 /* Check, if it is write protected */
2428 if (ret) {
297758f8
AKS		 2429 printk(KERN_ERR "%s: Failed erase, block %d\n",
2430 __func__, onenand_block(this, addr));
cd5f6346
KP		 2431 instr->state = MTD_ERASE_FAILED;
2432 instr->fail_addr = addr;
73885aea 2433 return -EIO;
cd5f6346
KP		 2434 }
2435
2436 len -= block_size;
2437 addr += block_size;
5988af23 2438
eff3bba6 2439 if (region && addr == region_end) {
5988af23
RH		 2440 if (!len)
2441 break;
2442 region++;
2443
2444 block_size = region->erasesize;
2445 region_end = region->offset + region->erasesize * region->numblocks;
2446
2447 if (len & (block_size - 1)) {
2448 /* FIXME: This should be handled at MTD partitioning level. */
297758f8
AKS		 2449 printk(KERN_ERR "%s: Unaligned address\n",
2450 __func__);
73885aea 2451 return -EIO;
5988af23
RH		 2452 }
2453 }
73885aea
MK		 2454 }
2455 return 0;
2456}
5988af23 2457
73885aea
MK		 2458/**
2459 * onenand_erase - [MTD Interface] erase block(s)
2460 * @param mtd MTD device structure
2461 * @param instr erase instruction
2462 *
2463 * Erase one or more blocks
2464 */
2465static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
2466{
2467 struct onenand_chip *this = mtd->priv;
2468 unsigned int block_size;
2469 loff_t addr = instr->addr;
2470 loff_t len = instr->len;
2471 int ret = 0;
2472 struct mtd_erase_region_info *region = NULL;
2473 loff_t region_offset = 0;
2474
289c0522 2475 pr_debug("%s: start=0x%012llx, len=%llu\n", __func__,
0a32a102
BN		 2476 (unsigned long long)instr->addr,
2477 (unsigned long long)instr->len);
73885aea 2478
73885aea
MK		 2479 if (FLEXONENAND(this)) {
2480 /* Find the eraseregion of this address */
2481 int i = flexonenand_region(mtd, addr);
cd5f6346 2482
73885aea
MK		 2483 region = &mtd->eraseregions[i];
2484 block_size = region->erasesize;
cd5f6346 2485
73885aea
MK		 2486 /* Start address within region must align on block boundary.
2487 * Erase region's start offset is always block start address.
2488 */
2489 region_offset = region->offset;
2490 } else
2491 block_size = 1 << this->erase_shift;
2492
2493 /* Start address must align on block boundary */
2494 if (unlikely((addr - region_offset) & (block_size - 1))) {
2495 printk(KERN_ERR "%s: Unaligned address\n", __func__);
2496 return -EINVAL;
2497 }
2498
2499 /* Length must align on block boundary */
2500 if (unlikely(len & (block_size - 1))) {
2501 printk(KERN_ERR "%s: Length not block aligned\n", __func__);
2502 return -EINVAL;
2503 }
2504
2505 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2506
2507 /* Grab the lock and see if the device is available */
2508 onenand_get_device(mtd, FL_ERASING);
2509
d983c54e
KP		 2510 if (ONENAND_IS_4KB_PAGE(this) || region ||
2511 instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) {
72073027
MK		 2512 /* region is set for Flex-OneNAND (no mb erase) */
2513 ret = onenand_block_by_block_erase(mtd, instr,
2514 region, block_size);
2515 } else {
2516 ret = onenand_multiblock_erase(mtd, instr, block_size);
2517 }
cd5f6346
KP		 2518
2519 /* Deselect and wake up anyone waiting on the device */
2520 onenand_release_device(mtd);
2521
3cd3a86b 2522 /* Do call back function */
73885aea
MK		 2523 if (!ret) {
2524 instr->state = MTD_ERASE_DONE;
3cd3a86b 2525 mtd_erase_callback(instr);
73885aea 2526 }
3cd3a86b 2527
cd5f6346
KP		 2528 return ret;
2529}
2530
2531/**
2532 * onenand_sync - [MTD Interface] sync
2533 * @param mtd MTD device structure
2534 *
2535 * Sync is actually a wait for chip ready function
2536 */
2537static void onenand_sync(struct mtd_info *mtd)
2538{
289c0522 2539 pr_debug("%s: called\n", __func__);
cd5f6346
KP		 2540
2541 /* Grab the lock and see if the device is available */
2542 onenand_get_device(mtd, FL_SYNCING);
2543
2544 /* Release it and go back */
2545 onenand_release_device(mtd);
2546}
2547
2548/**
2549 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
2550 * @param mtd MTD device structure
2551 * @param ofs offset relative to mtd start
cdc00130
KP		 2552 *
2553 * Check whether the block is bad
cd5f6346
KP		 2554 */
2555static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
2556{
49dc08ee
AB		 2557 int ret;
2558
cdc00130
KP		 2559 /* Check for invalid offset */
2560 if (ofs > mtd->size)
2561 return -EINVAL;
2562
49dc08ee
AB		 2563 onenand_get_device(mtd, FL_READING);
2564 ret = onenand_block_isbad_nolock(mtd, ofs, 0);
2565 onenand_release_device(mtd);
2566 return ret;
cdc00130
KP		 2567}
2568
2569/**
2570 * onenand_default_block_markbad - [DEFAULT] mark a block bad
2571 * @param mtd MTD device structure
2572 * @param ofs offset from device start
2573 *
2574 * This is the default implementation, which can be overridden by
2575 * a hardware specific driver.
2576 */
2577static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
2578{
2579 struct onenand_chip *this = mtd->priv;
2580 struct bbm_info *bbm = this->bbm;
2581 u_char buf[2] = {0, 0};
12f77c9e 2582 struct mtd_oob_ops ops = {
0612b9dd 2583 .mode = MTD_OPS_PLACE_OOB,
12f77c9e
KP		 2584 .ooblen = 2,
2585 .oobbuf = buf,
2586 .ooboffs = 0,
2587 };
cdc00130
KP		 2588 int block;
2589
2590 /* Get block number */
5988af23 2591 block = onenand_block(this, ofs);
cdc00130
KP		 2592 if (bbm->bbt)
2593 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
2594
492e1501 2595 /* We write two bytes, so we don't have to mess with 16-bit access */
cdc00130 2596 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
5988af23
RH		 2597 /* FIXME : What to do when marking SLC block in partition
2598 * with MLC erasesize? For now, it is not advisable to
2599 * create partitions containing both SLC and MLC regions.
2600 */
2601 return onenand_write_oob_nolock(mtd, ofs, &ops);
cd5f6346
KP		 2602}
2603
2604/**
2605 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
2606 * @param mtd MTD device structure
2607 * @param ofs offset relative to mtd start
cdc00130
KP		 2608 *
2609 * Mark the block as bad
cd5f6346
KP		 2610 */
2611static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2612{
cdc00130
KP		 2613 int ret;
2614
2615 ret = onenand_block_isbad(mtd, ofs);
2616 if (ret) {
2617 /* If it was bad already, return success and do nothing */
2618 if (ret > 0)
2619 return 0;
2620 return ret;
2621 }
2622
49dc08ee 2623 onenand_get_device(mtd, FL_WRITING);
5942ddbc 2624 ret = mtd_block_markbad(mtd, ofs);
49dc08ee
AB		 2625 onenand_release_device(mtd);
2626 return ret;
cd5f6346
KP		 2627}
2628
2629/**
08f782b6 2630 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
cd5f6346
KP		 2631 * @param mtd MTD device structure
2632 * @param ofs offset relative to mtd start
08f782b6 2633 * @param len number of bytes to lock or unlock
e3da8067 2634 * @param cmd lock or unlock command
cd5f6346 2635 *
08f782b6 2636 * Lock or unlock one or more blocks
cd5f6346 2637 */
08f782b6 2638static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
cd5f6346
KP		 2639{
2640 struct onenand_chip *this = mtd->priv;
2641 int start, end, block, value, status;
08f782b6 2642 int wp_status_mask;
cd5f6346 2643
5988af23
RH		 2644 start = onenand_block(this, ofs);
2645 end = onenand_block(this, ofs + len) - 1;
cd5f6346 2646
08f782b6
KP		 2647 if (cmd == ONENAND_CMD_LOCK)
2648 wp_status_mask = ONENAND_WP_LS;
2649 else
2650 wp_status_mask = ONENAND_WP_US;
2651
cd5f6346 2652 /* Continuous lock scheme */
28b79ff9 2653 if (this->options & ONENAND_HAS_CONT_LOCK) {
cd5f6346
KP		 2654 /* Set start block address */
2655 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2656 /* Set end block address */
5988af23 2657 this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
08f782b6
KP		 2658 /* Write lock command */
2659 this->command(mtd, cmd, 0, 0);
cd5f6346
KP		 2660
2661 /* There's no return value */
08f782b6 2662 this->wait(mtd, FL_LOCKING);
cd5f6346
KP		 2663
2664 /* Sanity check */
2665 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2666 & ONENAND_CTRL_ONGO)
2667 continue;
2668
2669 /* Check lock status */
2670 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
08f782b6 2671 if (!(status & wp_status_mask))
297758f8
AKS		 2672 printk(KERN_ERR "%s: wp status = 0x%x\n",
2673 __func__, status);
cd5f6346
KP		 2674
2675 return 0;
2676 }
2677
2678 /* Block lock scheme */
5988af23 2679 for (block = start; block < end + 1; block++) {
20ba89a3
KP		 2680 /* Set block address */
2681 value = onenand_block_address(this, block);
2682 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2683 /* Select DataRAM for DDP */
2684 value = onenand_bufferram_address(this, block);
2685 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
cd5f6346
KP		 2686 /* Set start block address */
2687 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
08f782b6
KP		 2688 /* Write lock command */
2689 this->command(mtd, cmd, 0, 0);
cd5f6346
KP		 2690
2691 /* There's no return value */
08f782b6 2692 this->wait(mtd, FL_LOCKING);
cd5f6346
KP		 2693
2694 /* Sanity check */
2695 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2696 & ONENAND_CTRL_ONGO)
2697 continue;
2698
cd5f6346
KP		 2699 /* Check lock status */
2700 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
08f782b6 2701 if (!(status & wp_status_mask))
297758f8
AKS		 2702 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2703 __func__, block, status);
cd5f6346 2704 }
d5c5e78a 2705
cd5f6346
KP		 2706 return 0;
2707}
2708
08f782b6
KP		 2709/**
2710 * onenand_lock - [MTD Interface] Lock block(s)
2711 * @param mtd MTD device structure
2712 * @param ofs offset relative to mtd start
2713 * @param len number of bytes to unlock
2714 *
2715 * Lock one or more blocks
2716 */
69423d99 2717static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
08f782b6 2718{
34627f0e
AH		 2719 int ret;
2720
2721 onenand_get_device(mtd, FL_LOCKING);
2722 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2723 onenand_release_device(mtd);
2724 return ret;
08f782b6
KP		 2725}
2726
08f782b6
KP		 2727/**
2728 * onenand_unlock - [MTD Interface] Unlock block(s)
2729 * @param mtd MTD device structure
2730 * @param ofs offset relative to mtd start
2731 * @param len number of bytes to unlock
2732 *
2733 * Unlock one or more blocks
2734 */
69423d99 2735static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
08f782b6 2736{
34627f0e
AH		 2737 int ret;
2738
2739 onenand_get_device(mtd, FL_LOCKING);
2740 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2741 onenand_release_device(mtd);
2742 return ret;
08f782b6
KP		 2743}
2744
28b79ff9
KP		 2745/**
2746 * onenand_check_lock_status - [OneNAND Interface] Check lock status
2747 * @param this onenand chip data structure
2748 *
2749 * Check lock status
2750 */
66a10506 2751static int onenand_check_lock_status(struct onenand_chip *this)
28b79ff9
KP		 2752{
2753 unsigned int value, block, status;
2754 unsigned int end;
2755
2756 end = this->chipsize >> this->erase_shift;
2757 for (block = 0; block < end; block++) {
2758 /* Set block address */
2759 value = onenand_block_address(this, block);
2760 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2761 /* Select DataRAM for DDP */
2762 value = onenand_bufferram_address(this, block);
2763 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2764 /* Set start block address */
2765 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2766
2767 /* Check lock status */
2768 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
66a10506 2769 if (!(status & ONENAND_WP_US)) {
297758f8
AKS		 2770 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2771 __func__, block, status);
66a10506
KP		 2772 return 0;
2773 }
28b79ff9 2774 }
66a10506
KP		 2775
2776 return 1;
28b79ff9
KP		 2777}
2778
2779/**
2780 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2781 * @param mtd MTD device structure
2782 *
2783 * Unlock all blocks
2784 */
66a10506 2785static void onenand_unlock_all(struct mtd_info *mtd)
28b79ff9
KP		 2786{
2787 struct onenand_chip *this = mtd->priv;
66a10506 2788 loff_t ofs = 0;
5988af23 2789 loff_t len = mtd->size;
28b79ff9
KP		 2790
2791 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
10b7a2bd
KP		 2792 /* Set start block address */
2793 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
28b79ff9
KP		 2794 /* Write unlock command */
2795 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2796
2797 /* There's no return value */
08f782b6 2798 this->wait(mtd, FL_LOCKING);
28b79ff9
KP		 2799
2800 /* Sanity check */
2801 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2802 & ONENAND_CTRL_ONGO)
2803 continue;
2804
31bb999e
KP		 2805 /* Don't check lock status */
2806 if (this->options & ONENAND_SKIP_UNLOCK_CHECK)
2807 return;
2808
66a10506
KP		 2809 /* Check lock status */
2810 if (onenand_check_lock_status(this))
2811 return;
2812
28b79ff9 2813 /* Workaround for all block unlock in DDP */
5988af23 2814 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
66a10506
KP		 2815 /* All blocks on another chip */
2816 ofs = this->chipsize >> 1;
2817 len = this->chipsize >> 1;
28b79ff9 2818 }
28b79ff9
KP		 2819 }
2820
66a10506 2821 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
28b79ff9
KP		 2822}
2823
493c6460
KP		 2824#ifdef CONFIG_MTD_ONENAND_OTP
2825
3cf60253
AKS		 2826/**
2827 * onenand_otp_command - Send OTP specific command to OneNAND device
2828 * @param mtd MTD device structure
2829 * @param cmd the command to be sent
2830 * @param addr offset to read from or write to
2831 * @param len number of bytes to read or write
2832 */
2833static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr,
2834 size_t len)
2835{
2836 struct onenand_chip *this = mtd->priv;
2837 int value, block, page;
2838
2839 /* Address translation */
2840 switch (cmd) {
2841 case ONENAND_CMD_OTP_ACCESS:
2842 block = (int) (addr >> this->erase_shift);
2843 page = -1;
2844 break;
2845
2846 default:
2847 block = (int) (addr >> this->erase_shift);
2848 page = (int) (addr >> this->page_shift);
2849
2850 if (ONENAND_IS_2PLANE(this)) {
2851 /* Make the even block number */
2852 block &= ~1;
2853 /* Is it the odd plane? */
2854 if (addr & this->writesize)
2855 block++;
2856 page >>= 1;
2857 }
2858 page &= this->page_mask;
2859 break;
2860 }
2861
2862 if (block != -1) {
2863 /* Write 'DFS, FBA' of Flash */
2864 value = onenand_block_address(this, block);
2865 this->write_word(value, this->base +
2866 ONENAND_REG_START_ADDRESS1);
2867 }
2868
2869 if (page != -1) {
2870 /* Now we use page size operation */
2871 int sectors = 4, count = 4;
2872 int dataram;
2873
2874 switch (cmd) {
2875 default:
2876 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
2877 cmd = ONENAND_CMD_2X_PROG;
2878 dataram = ONENAND_CURRENT_BUFFERRAM(this);
2879 break;
2880 }
2881
2882 /* Write 'FPA, FSA' of Flash */
2883 value = onenand_page_address(page, sectors);
2884 this->write_word(value, this->base +
2885 ONENAND_REG_START_ADDRESS8);
2886
2887 /* Write 'BSA, BSC' of DataRAM */
2888 value = onenand_buffer_address(dataram, sectors, count);
2889 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
2890 }
2891
2892 /* Interrupt clear */
2893 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
2894
2895 /* Write command */
2896 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
2897
2898 return 0;
2899}
2900
2901/**
7854d3f7 2902 * onenand_otp_write_oob_nolock - [INTERN] OneNAND write out-of-band, specific to OTP
3cf60253
AKS		 2903 * @param mtd MTD device structure
2904 * @param to offset to write to
2905 * @param len number of bytes to write
2906 * @param retlen pointer to variable to store the number of written bytes
2907 * @param buf the data to write
2908 *
2909 * OneNAND write out-of-band only for OTP
2910 */
2911static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2912 struct mtd_oob_ops *ops)
2913{
2914 struct onenand_chip *this = mtd->priv;
2915 int column, ret = 0, oobsize;
2916 int written = 0;
2917 u_char *oobbuf;
2918 size_t len = ops->ooblen;
2919 const u_char *buf = ops->oobbuf;
2920 int block, value, status;
2921
2922 to += ops->ooboffs;
2923
2924 /* Initialize retlen, in case of early exit */
2925 ops->oobretlen = 0;
2926
2927 oobsize = mtd->oobsize;
2928
2929 column = to & (mtd->oobsize - 1);
2930
2931 oobbuf = this->oob_buf;
2932
2933 /* Loop until all data write */
2934 while (written < len) {
2935 int thislen = min_t(int, oobsize, len - written);
2936
2937 cond_resched();
2938
2939 block = (int) (to >> this->erase_shift);
2940 /*
2941 * Write 'DFS, FBA' of Flash
2942 * Add: F100h DQ=DFS, FBA
2943 */
2944
2945 value = onenand_block_address(this, block);
2946 this->write_word(value, this->base +
2947 ONENAND_REG_START_ADDRESS1);
2948
2949 /*
2950 * Select DataRAM for DDP
2951 * Add: F101h DQ=DBS
2952 */
2953
2954 value = onenand_bufferram_address(this, block);
2955 this->write_word(value, this->base +
2956 ONENAND_REG_START_ADDRESS2);
2957 ONENAND_SET_NEXT_BUFFERRAM(this);
2958
2959 /*
2960 * Enter OTP access mode
2961 */
2962 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2963 this->wait(mtd, FL_OTPING);
2964
2965 /* We send data to spare ram with oobsize
2966 * to prevent byte access */
2967 memcpy(oobbuf + column, buf, thislen);
2968
2969 /*
2970 * Write Data into DataRAM
2971 * Add: 8th Word
2972 * in sector0/spare/page0
2973 * DQ=XXFCh
2974 */
2975 this->write_bufferram(mtd, ONENAND_SPARERAM,
2976 oobbuf, 0, mtd->oobsize);
2977
2978 onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
2979 onenand_update_bufferram(mtd, to, 0);
2980 if (ONENAND_IS_2PLANE(this)) {
2981 ONENAND_SET_BUFFERRAM1(this);
2982 onenand_update_bufferram(mtd, to + this->writesize, 0);
2983 }
2984
2985 ret = this->wait(mtd, FL_WRITING);
2986 if (ret) {
2987 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2988 break;
2989 }
2990
2991 /* Exit OTP access mode */
2992 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2993 this->wait(mtd, FL_RESETING);
2994
2995 status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
2996 status &= 0x60;
2997
2998 if (status == 0x60) {
2999 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
3000 printk(KERN_DEBUG "1st Block\tLOCKED\n");
3001 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
3002 } else if (status == 0x20) {
3003 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
3004 printk(KERN_DEBUG "1st Block\tLOCKED\n");
3005 printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n");
3006 } else if (status == 0x40) {
3007 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
3008 printk(KERN_DEBUG "1st Block\tUN-LOCKED\n");
3009 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
3010 } else {
3011 printk(KERN_DEBUG "Reboot to check\n");
3012 }
3013
3014 written += thislen;
3015 if (written == len)
3016 break;
3017
3018 to += mtd->writesize;
3019 buf += thislen;
3020 column = 0;
3021 }
3022
3023 ops->oobretlen = written;
3024
3025 return ret;
3026}
3027
492e1501 3028/* Internal OTP operation */
493c6460
KP		 3029typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
3030 size_t *retlen, u_char *buf);
3031
3032/**
3033 * do_otp_read - [DEFAULT] Read OTP block area
3034 * @param mtd MTD device structure
3035 * @param from The offset to read
3036 * @param len number of bytes to read
3037 * @param retlen pointer to variable to store the number of readbytes
3038 * @param buf the databuffer to put/get data
3039 *
3040 * Read OTP block area.
3041 */
3042static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
3043 size_t *retlen, u_char *buf)
3044{
3045 struct onenand_chip *this = mtd->priv;
49dc08ee
AB		 3046 struct mtd_oob_ops ops = {
3047 .len = len,
3048 .ooblen = 0,
3049 .datbuf = buf,
3050 .oobbuf = NULL,
3051 };
493c6460
KP		 3052 int ret;
3053
3054 /* Enter OTP access mode */
3055 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3056 this->wait(mtd, FL_OTPING);
3057
8a8f632d 3058 ret = ONENAND_IS_4KB_PAGE(this) ?
5988af23
RH		 3059 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
3060 onenand_read_ops_nolock(mtd, from, &ops);
493c6460
KP		 3061
3062 /* Exit OTP access mode */
3063 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3064 this->wait(mtd, FL_RESETING);
3065
3066 return ret;
3067}
3068
3069/**
3070 * do_otp_write - [DEFAULT] Write OTP block area
3071 * @param mtd MTD device structure
49dc08ee 3072 * @param to The offset to write
493c6460
KP		 3073 * @param len number of bytes to write
3074 * @param retlen pointer to variable to store the number of write bytes
3075 * @param buf the databuffer to put/get data
3076 *
3077 * Write OTP block area.
3078 */
49dc08ee 3079static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
493c6460
KP		 3080 size_t *retlen, u_char *buf)
3081{
3082 struct onenand_chip *this = mtd->priv;
3083 unsigned char *pbuf = buf;
3084 int ret;
49dc08ee 3085 struct mtd_oob_ops ops;
493c6460
KP		 3086
3087 /* Force buffer page aligned */
28318776 3088 if (len < mtd->writesize) {
493c6460 3089 memcpy(this->page_buf, buf, len);
28318776 3090 memset(this->page_buf + len, 0xff, mtd->writesize - len);
493c6460 3091 pbuf = this->page_buf;
28318776 3092 len = mtd->writesize;
493c6460
KP		 3093 }
3094
3095 /* Enter OTP access mode */
3096 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3097 this->wait(mtd, FL_OTPING);
3098
49dc08ee
AB		 3099 ops.len = len;
3100 ops.ooblen = 0;
1437085c 3101 ops.datbuf = pbuf;
49dc08ee
AB		 3102 ops.oobbuf = NULL;
3103 ret = onenand_write_ops_nolock(mtd, to, &ops);
3104 *retlen = ops.retlen;
493c6460
KP		 3105
3106 /* Exit OTP access mode */
3107 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3108 this->wait(mtd, FL_RESETING);
3109
3110 return ret;
3111}
3112
3113/**
3114 * do_otp_lock - [DEFAULT] Lock OTP block area
3115 * @param mtd MTD device structure
3116 * @param from The offset to lock
3117 * @param len number of bytes to lock
3118 * @param retlen pointer to variable to store the number of lock bytes
3119 * @param buf the databuffer to put/get data
3120 *
3121 * Lock OTP block area.
3122 */
3123static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
3124 size_t *retlen, u_char *buf)
3125{
3126 struct onenand_chip *this = mtd->priv;
5988af23 3127 struct mtd_oob_ops ops;
493c6460
KP		 3128 int ret;
3129
5988af23 3130 if (FLEXONENAND(this)) {
3cf60253
AKS		 3131
3132 /* Enter OTP access mode */
3133 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3134 this->wait(mtd, FL_OTPING);
5988af23
RH		 3135 /*
3136 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3137 * main area of page 49.
3138 */
3139 ops.len = mtd->writesize;
3140 ops.ooblen = 0;
3141 ops.datbuf = buf;
3142 ops.oobbuf = NULL;
3143 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
3144 *retlen = ops.retlen;
3cf60253
AKS		 3145
3146 /* Exit OTP access mode */
3147 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3148 this->wait(mtd, FL_RESETING);
5988af23 3149 } else {
0612b9dd 3150 ops.mode = MTD_OPS_PLACE_OOB;
5988af23
RH		 3151 ops.ooblen = len;
3152 ops.oobbuf = buf;
3153 ops.ooboffs = 0;
3cf60253 3154 ret = onenand_otp_write_oob_nolock(mtd, from, &ops);
5988af23
RH		 3155 *retlen = ops.oobretlen;
3156 }
493c6460 3157
493c6460
KP		 3158 return ret;
3159}
3160
3161/**
3162 * onenand_otp_walk - [DEFAULT] Handle OTP operation
3163 * @param mtd MTD device structure
3164 * @param from The offset to read/write
3165 * @param len number of bytes to read/write
3166 * @param retlen pointer to variable to store the number of read bytes
3167 * @param buf the databuffer to put/get data
3168 * @param action do given action
3169 * @param mode specify user and factory
3170 *
3171 * Handle OTP operation.
3172 */
3173static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
3174 size_t *retlen, u_char *buf,
3175 otp_op_t action, int mode)
3176{
3177 struct onenand_chip *this = mtd->priv;
3178 int otp_pages;
3179 int density;
3180 int ret = 0;
3181
3182 *retlen = 0;
3183
e71f04fc 3184 density = onenand_get_density(this->device_id);
493c6460
KP		 3185 if (density < ONENAND_DEVICE_DENSITY_512Mb)
3186 otp_pages = 20;
3187 else
3cf60253 3188 otp_pages = 50;
493c6460
KP		 3189
3190 if (mode == MTD_OTP_FACTORY) {
28318776 3191 from += mtd->writesize * otp_pages;
3cf60253 3192 otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages;
493c6460
KP		 3193 }
3194
3195 /* Check User/Factory boundary */
3cf60253 3196 if (mode == MTD_OTP_USER) {
0a032a4d 3197 if (mtd->writesize * otp_pages < from + len)
3cf60253
AKS		 3198 return 0;
3199 } else {
0a032a4d 3200 if (mtd->writesize * otp_pages < len)
3cf60253
AKS		 3201 return 0;
3202 }
493c6460 3203
49dc08ee 3204 onenand_get_device(mtd, FL_OTPING);
493c6460
KP		 3205 while (len > 0 && otp_pages > 0) {
3206 if (!action) { /* OTP Info functions */
3207 struct otp_info *otpinfo;
3208
3209 len -= sizeof(struct otp_info);
49dc08ee
AB		 3210 if (len <= 0) {
3211 ret = -ENOSPC;
3212 break;
3213 }
493c6460
KP		 3214
3215 otpinfo = (struct otp_info *) buf;
3216 otpinfo->start = from;
28318776 3217 otpinfo->length = mtd->writesize;
493c6460
KP		 3218 otpinfo->locked = 0;
3219
28318776 3220 from += mtd->writesize;
493c6460
KP		 3221 buf += sizeof(struct otp_info);
3222 *retlen += sizeof(struct otp_info);
3223 } else {
3224 size_t tmp_retlen;
493c6460
KP		 3225
3226 ret = action(mtd, from, len, &tmp_retlen, buf);
3227
3cf60253
AKS		 3228 buf += tmp_retlen;
3229 len -= tmp_retlen;
3230 *retlen += tmp_retlen;
493c6460 3231
49dc08ee
AB		 3232 if (ret)
3233 break;
493c6460
KP		 3234 }
3235 otp_pages--;
3236 }
49dc08ee 3237 onenand_release_device(mtd);
493c6460 3238
49dc08ee 3239 return ret;
493c6460
KP		 3240}
3241
3242/**
3243 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
3244 * @param mtd MTD device structure
3245 * @param buf the databuffer to put/get data
3246 * @param len number of bytes to read
3247 *
3248 * Read factory OTP info.
3249 */
3250static int onenand_get_fact_prot_info(struct mtd_info *mtd,
3251 struct otp_info *buf, size_t len)
3252{
3253 size_t retlen;
3254 int ret;
3255
3256 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
3257
3258 return ret ? : retlen;
3259}
3260
3261/**
3262 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
3263 * @param mtd MTD device structure
3264 * @param from The offset to read
3265 * @param len number of bytes to read
3266 * @param retlen pointer to variable to store the number of read bytes
3267 * @param buf the databuffer to put/get data
3268 *
3269 * Read factory OTP area.
3270 */
3271static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
3272 size_t len, size_t *retlen, u_char *buf)
3273{
3274 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
3275}
3276
3277/**
3278 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
3279 * @param mtd MTD device structure
3280 * @param buf the databuffer to put/get data
3281 * @param len number of bytes to read
3282 *
3283 * Read user OTP info.
3284 */
3285static int onenand_get_user_prot_info(struct mtd_info *mtd,
3286 struct otp_info *buf, size_t len)
3287{
3288 size_t retlen;
3289 int ret;
3290
3291 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
3292
3293 return ret ? : retlen;
3294}
3295
3296/**
3297 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
3298 * @param mtd MTD device structure
3299 * @param from The offset to read
3300 * @param len number of bytes to read
3301 * @param retlen pointer to variable to store the number of read bytes
3302 * @param buf the databuffer to put/get data
3303 *
3304 * Read user OTP area.
3305 */
3306static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
3307 size_t len, size_t *retlen, u_char *buf)
3308{
3309 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
3310}
3311
3312/**
3313 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
3314 * @param mtd MTD device structure
3315 * @param from The offset to write
3316 * @param len number of bytes to write
3317 * @param retlen pointer to variable to store the number of write bytes
3318 * @param buf the databuffer to put/get data
3319 *
3320 * Write user OTP area.
3321 */
3322static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
3323 size_t len, size_t *retlen, u_char *buf)
3324{
3325 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
3326}
3327
3328/**
3329 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
3330 * @param mtd MTD device structure
3331 * @param from The offset to lock
3332 * @param len number of bytes to unlock
3333 *
3334 * Write lock mark on spare area in page 0 in OTP block
3335 */
3336static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
3337 size_t len)
3338{
69d79186 3339 struct onenand_chip *this = mtd->priv;
5988af23 3340 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
493c6460
KP		 3341 size_t retlen;
3342 int ret;
3cf60253 3343 unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET;
493c6460 3344
5988af23
RH		 3345 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
3346 : mtd->oobsize);
493c6460
KP		 3347 /*
3348 * Write lock mark to 8th word of sector0 of page0 of the spare0.
3349 * We write 16 bytes spare area instead of 2 bytes.
5988af23
RH		 3350 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3351 * main area of page 49.
493c6460 3352 */
5988af23 3353
493c6460 3354 from = 0;
5988af23 3355 len = FLEXONENAND(this) ? mtd->writesize : 16;
493c6460 3356
3cf60253
AKS		 3357 /*
3358 * Note: OTP lock operation
3359 * OTP block : 0xXXFC XX 1111 1100
3360 * 1st block : 0xXXF3 (If chip support) XX 1111 0011
3361 * Both : 0xXXF0 (If chip support) XX 1111 0000
3362 */
3363 if (FLEXONENAND(this))
3364 otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET;
3365
3366 /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */
3367 if (otp == 1)
3368 buf[otp_lock_offset] = 0xFC;
3369 else if (otp == 2)
3370 buf[otp_lock_offset] = 0xF3;
3371 else if (otp == 3)
3372 buf[otp_lock_offset] = 0xF0;
3373 else if (otp != 0)
3374 printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n");
3375
5988af23 3376 ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER);
493c6460
KP		 3377
3378 return ret ? : retlen;
3379}
3cf60253 3380
493c6460
KP		 3381#endif /* CONFIG_MTD_ONENAND_OTP */
3382
28b79ff9 3383/**
75384b0d 3384 * onenand_check_features - Check and set OneNAND features
28b79ff9
KP		 3385 * @param mtd MTD data structure
3386 *
75384b0d
KP		 3387 * Check and set OneNAND features
3388 * - lock scheme
ee9745fc 3389 * - two plane
28b79ff9 3390 */
75384b0d 3391static void onenand_check_features(struct mtd_info *mtd)
28b79ff9
KP		 3392{
3393 struct onenand_chip *this = mtd->priv;
edb44b9b 3394 unsigned int density, process, numbufs;
28b79ff9
KP		 3395
3396 /* Lock scheme depends on density and process */
e71f04fc 3397 density = onenand_get_density(this->device_id);
28b79ff9 3398 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
edb44b9b 3399 numbufs = this->read_word(this->base + ONENAND_REG_NUM_BUFFERS) >> 8;
28b79ff9
KP		 3400
3401 /* Lock scheme */
ee9745fc
KP		 3402 switch (density) {
3403 case ONENAND_DEVICE_DENSITY_4Gb:
6a88c47b
KP		 3404 if (ONENAND_IS_DDP(this))
3405 this->options |= ONENAND_HAS_2PLANE;
ac80dac0 3406 else if (numbufs == 1) {
6a88c47b 3407 this->options |= ONENAND_HAS_4KB_PAGE;
ac80dac0 3408 this->options |= ONENAND_HAS_CACHE_PROGRAM;
e1c10243
KP		 3409 /*
3410 * There are two different 4KiB pagesize chips
3411 * and no way to detect it by H/W config values.
3412 *
3413 * To detect the correct NOP for each chips,
3414 * It should check the version ID as workaround.
3415 *
3416 * Now it has as following
3417 * KFM4G16Q4M has NOP 4 with version ID 0x0131
3418 * KFM4G16Q5M has NOP 1 with versoin ID 0x013e
3419 */
3420 if ((this->version_id & 0xf) == 0xe)
3421 this->options |= ONENAND_HAS_NOP_1;
ac80dac0 3422 }
ee9745fc
KP		 3423
3424 case ONENAND_DEVICE_DENSITY_2Gb:
492e1501 3425 /* 2Gb DDP does not have 2 plane */
ee9745fc
KP		 3426 if (!ONENAND_IS_DDP(this))
3427 this->options |= ONENAND_HAS_2PLANE;
3428 this->options |= ONENAND_HAS_UNLOCK_ALL;
3429
3430 case ONENAND_DEVICE_DENSITY_1Gb:
28b79ff9 3431 /* A-Die has all block unlock */
ee9745fc 3432 if (process)
28b79ff9 3433 this->options |= ONENAND_HAS_UNLOCK_ALL;
ee9745fc
KP		 3434 break;
3435
3436 default:
3437 /* Some OneNAND has continuous lock scheme */
3438 if (!process)
28b79ff9 3439 this->options |= ONENAND_HAS_CONT_LOCK;
ee9745fc 3440 break;
28b79ff9 3441 }
ee9745fc 3442
8a8f632d
KP		 3443 /* The MLC has 4KiB pagesize. */
3444 if (ONENAND_IS_MLC(this))
3445 this->options |= ONENAND_HAS_4KB_PAGE;
3446
3447 if (ONENAND_IS_4KB_PAGE(this))
5988af23
RH		 3448 this->options &= ~ONENAND_HAS_2PLANE;
3449
3450 if (FLEXONENAND(this)) {
3451 this->options &= ~ONENAND_HAS_CONT_LOCK;
3452 this->options |= ONENAND_HAS_UNLOCK_ALL;
3453 }
3454
ee9745fc
KP		 3455 if (this->options & ONENAND_HAS_CONT_LOCK)
3456 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
3457 if (this->options & ONENAND_HAS_UNLOCK_ALL)
3458 printk(KERN_DEBUG "Chip support all block unlock\n");
3459 if (this->options & ONENAND_HAS_2PLANE)
3460 printk(KERN_DEBUG "Chip has 2 plane\n");
6a88c47b
KP		 3461 if (this->options & ONENAND_HAS_4KB_PAGE)
3462 printk(KERN_DEBUG "Chip has 4KiB pagesize\n");
ac80dac0
RT		 3463 if (this->options & ONENAND_HAS_CACHE_PROGRAM)
3464 printk(KERN_DEBUG "Chip has cache program feature\n");
28b79ff9
KP		 3465}
3466
cd5f6346 3467/**
e3da8067 3468 * onenand_print_device_info - Print device & version ID
cd5f6346 3469 * @param device device ID
e3da8067 3470 * @param version version ID
cd5f6346 3471 *
e3da8067 3472 * Print device & version ID
cd5f6346 3473 */
28b79ff9 3474static void onenand_print_device_info(int device, int version)
cd5f6346 3475{
5988af23 3476 int vcc, demuxed, ddp, density, flexonenand;
cd5f6346
KP		 3477
3478 vcc = device & ONENAND_DEVICE_VCC_MASK;
3479 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
3480 ddp = device & ONENAND_DEVICE_IS_DDP;
e71f04fc 3481 density = onenand_get_density(device);
5988af23
RH		 3482 flexonenand = device & DEVICE_IS_FLEXONENAND;
3483 printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
3484 demuxed ? "" : "Muxed ",
3485 flexonenand ? "Flex-" : "",
cd5f6346
KP		 3486 ddp ? "(DDP)" : "",
3487 (16 << density),
3488 vcc ? "2.65/3.3" : "1.8",
3489 device);
49dc08ee 3490 printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
cd5f6346
KP		 3491}
3492
3493static const struct onenand_manufacturers onenand_manuf_ids[] = {
3494 {ONENAND_MFR_SAMSUNG, "Samsung"},
ee8f3768 3495 {ONENAND_MFR_NUMONYX, "Numonyx"},
cd5f6346
KP		 3496};
3497
3498/**
3499 * onenand_check_maf - Check manufacturer ID
3500 * @param manuf manufacturer ID
3501 *
3502 * Check manufacturer ID
3503 */
3504static int onenand_check_maf(int manuf)
3505{
37b1cc39
KP		 3506 int size = ARRAY_SIZE(onenand_manuf_ids);
3507 char *name;
cd5f6346
KP		 3508 int i;
3509
37b1cc39 3510 for (i = 0; i < size; i++)
cd5f6346
KP		 3511 if (manuf == onenand_manuf_ids[i].id)
3512 break;
cd5f6346 3513
37b1cc39
KP		 3514 if (i < size)
3515 name = onenand_manuf_ids[i].name;
3516 else
3517 name = "Unknown";
3518
3519 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
cd5f6346 3520
37b1cc39 3521 return (i == size);
cd5f6346
KP		 3522}
3523
5988af23
RH		 3524/**
3525* flexonenand_get_boundary - Reads the SLC boundary
3526* @param onenand_info - onenand info structure
3527**/
3528static int flexonenand_get_boundary(struct mtd_info *mtd)
3529{
3530 struct onenand_chip *this = mtd->priv;
3531 unsigned die, bdry;
3532 int ret, syscfg, locked;
3533
3534 /* Disable ECC */
3535 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3536 this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1);
3537
3538 for (die = 0; die < this->dies; die++) {
3539 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3540 this->wait(mtd, FL_SYNCING);
3541
3542 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3543 ret = this->wait(mtd, FL_READING);
3544
3545 bdry = this->read_word(this->base + ONENAND_DATARAM);
3546 if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3)
3547 locked = 0;
3548 else
3549 locked = 1;
3550 this->boundary[die] = bdry & FLEXONENAND_PI_MASK;
3551
3552 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3553 ret = this->wait(mtd, FL_RESETING);
3554
3555 printk(KERN_INFO "Die %d boundary: %d%s\n", die,
3556 this->boundary[die], locked ? "(Locked)" : "(Unlocked)");
3557 }
3558
3559 /* Enable ECC */
3560 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3561 return 0;
3562}
3563
3564/**
3565 * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info
3566 * boundary[], diesize[], mtd->size, mtd->erasesize
3567 * @param mtd - MTD device structure
3568 */
3569static void flexonenand_get_size(struct mtd_info *mtd)
3570{
3571 struct onenand_chip *this = mtd->priv;
3572 int die, i, eraseshift, density;
3573 int blksperdie, maxbdry;
3574 loff_t ofs;
3575
3576 density = onenand_get_density(this->device_id);
3577 blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift);
3578 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3579 maxbdry = blksperdie - 1;
3580 eraseshift = this->erase_shift - 1;
3581
3582 mtd->numeraseregions = this->dies << 1;
3583
3584 /* This fills up the device boundary */
3585 flexonenand_get_boundary(mtd);
3586 die = ofs = 0;
3587 i = -1;
3588 for (; die < this->dies; die++) {
3589 if (!die || this->boundary[die-1] != maxbdry) {
3590 i++;
3591 mtd->eraseregions[i].offset = ofs;
3592 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3593 mtd->eraseregions[i].numblocks =
3594 this->boundary[die] + 1;
3595 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3596 eraseshift++;
3597 } else {
3598 mtd->numeraseregions -= 1;
3599 mtd->eraseregions[i].numblocks +=
3600 this->boundary[die] + 1;
3601 ofs += (this->boundary[die] + 1) << (eraseshift - 1);
3602 }
3603 if (this->boundary[die] != maxbdry) {
3604 i++;
3605 mtd->eraseregions[i].offset = ofs;
3606 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3607 mtd->eraseregions[i].numblocks = maxbdry ^
3608 this->boundary[die];
3609 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3610 eraseshift--;
3611 } else
3612 mtd->numeraseregions -= 1;
3613 }
3614
3615 /* Expose MLC erase size except when all blocks are SLC */
3616 mtd->erasesize = 1 << this->erase_shift;
3617 if (mtd->numeraseregions == 1)
3618 mtd->erasesize >>= 1;
3619
3620 printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions);
3621 for (i = 0; i < mtd->numeraseregions; i++)
3622 printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x,"
3623 " numblocks: %04u]\n",
3624 (unsigned int) mtd->eraseregions[i].offset,
3625 mtd->eraseregions[i].erasesize,
3626 mtd->eraseregions[i].numblocks);
3627
3628 for (die = 0, mtd->size = 0; die < this->dies; die++) {
3629 this->diesize[die] = (loff_t)blksperdie << this->erase_shift;
3630 this->diesize[die] -= (loff_t)(this->boundary[die] + 1)
3631 << (this->erase_shift - 1);
3632 mtd->size += this->diesize[die];
3633 }
3634}
3635
3636/**
3637 * flexonenand_check_blocks_erased - Check if blocks are erased
3638 * @param mtd_info - mtd info structure
3639 * @param start - first erase block to check
3640 * @param end - last erase block to check
3641 *
3642 * Converting an unerased block from MLC to SLC
3643 * causes byte values to change. Since both data and its ECC
3644 * have changed, reads on the block give uncorrectable error.
3645 * This might lead to the block being detected as bad.
3646 *
3647 * Avoid this by ensuring that the block to be converted is
3648 * erased.
3649 */
3650static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end)
3651{
3652 struct onenand_chip *this = mtd->priv;
3653 int i, ret;
3654 int block;
3655 struct mtd_oob_ops ops = {
0612b9dd 3656 .mode = MTD_OPS_PLACE_OOB,
5988af23
RH		 3657 .ooboffs = 0,
3658 .ooblen = mtd->oobsize,
3659 .datbuf = NULL,
3660 .oobbuf = this->oob_buf,
3661 };
3662 loff_t addr;
3663
3664 printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end);
3665
3666 for (block = start; block <= end; block++) {
3667 addr = flexonenand_addr(this, block);
3668 if (onenand_block_isbad_nolock(mtd, addr, 0))
3669 continue;
3670
3671 /*
3672 * Since main area write results in ECC write to spare,
3673 * it is sufficient to check only ECC bytes for change.
3674 */
3675 ret = onenand_read_oob_nolock(mtd, addr, &ops);
3676 if (ret)
3677 return ret;
3678
3679 for (i = 0; i < mtd->oobsize; i++)
3680 if (this->oob_buf[i] != 0xff)
3681 break;
3682
3683 if (i != mtd->oobsize) {
297758f8
AKS		 3684 printk(KERN_WARNING "%s: Block %d not erased.\n",
3685 __func__, block);
5988af23
RH		 3686 return 1;
3687 }
3688 }
3689
3690 return 0;
3691}
3692
3693/**
3694 * flexonenand_set_boundary - Writes the SLC boundary
3695 * @param mtd - mtd info structure
3696 */
3697int flexonenand_set_boundary(struct mtd_info *mtd, int die,
3698 int boundary, int lock)
3699{
3700 struct onenand_chip *this = mtd->priv;
3701 int ret, density, blksperdie, old, new, thisboundary;
3702 loff_t addr;
3703
3704 /* Change only once for SDP Flex-OneNAND */
3705 if (die && (!ONENAND_IS_DDP(this)))
3706 return 0;
3707
3708 /* boundary value of -1 indicates no required change */
3709 if (boundary < 0 || boundary == this->boundary[die])
3710 return 0;
3711
3712 density = onenand_get_density(this->device_id);
3713 blksperdie = ((16 << density) << 20) >> this->erase_shift;
3714 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3715
3716 if (boundary >= blksperdie) {
297758f8
AKS		 3717 printk(KERN_ERR "%s: Invalid boundary value. "
3718 "Boundary not changed.\n", __func__);
5988af23
RH		 3719 return -EINVAL;
3720 }
3721
3722 /* Check if converting blocks are erased */
3723 old = this->boundary[die] + (die * this->density_mask);
3724 new = boundary + (die * this->density_mask);
3725 ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new));
3726 if (ret) {
297758f8
AKS		 3727 printk(KERN_ERR "%s: Please erase blocks "
3728 "before boundary change\n", __func__);
5988af23
RH		 3729 return ret;
3730 }
3731
3732 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3733 this->wait(mtd, FL_SYNCING);
3734
3735 /* Check is boundary is locked */
3736 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3737 ret = this->wait(mtd, FL_READING);
3738
3739 thisboundary = this->read_word(this->base + ONENAND_DATARAM);
3740 if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
297758f8 3741 printk(KERN_ERR "%s: boundary locked\n", __func__);
5988af23
RH		 3742 ret = 1;
3743 goto out;
3744 }
3745
297758f8 3746 printk(KERN_INFO "Changing die %d boundary: %d%s\n",
5988af23
RH		 3747 die, boundary, lock ? "(Locked)" : "(Unlocked)");
3748
3749 addr = die ? this->diesize[0] : 0;
3750
3751 boundary &= FLEXONENAND_PI_MASK;
3752 boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT);
3753
3754 this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
3755 ret = this->wait(mtd, FL_ERASING);
3756 if (ret) {
f369c7ec
MK		 3757 printk(KERN_ERR "%s: Failed PI erase for Die %d\n",
3758 __func__, die);
5988af23
RH		 3759 goto out;
3760 }
3761
3762 this->write_word(boundary, this->base + ONENAND_DATARAM);
3763 this->command(mtd, ONENAND_CMD_PROG, addr, 0);
3764 ret = this->wait(mtd, FL_WRITING);
3765 if (ret) {
297758f8
AKS		 3766 printk(KERN_ERR "%s: Failed PI write for Die %d\n",
3767 __func__, die);
5988af23
RH		 3768 goto out;
3769 }
3770
3771 this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0);
3772 ret = this->wait(mtd, FL_WRITING);
3773out:
3774 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND);
3775 this->wait(mtd, FL_RESETING);
3776 if (!ret)
3777 /* Recalculate device size on boundary change*/
3778 flexonenand_get_size(mtd);
3779
3780 return ret;
3781}
3782
cd5f6346 3783/**
ad0d363b 3784 * onenand_chip_probe - [OneNAND Interface] The generic chip probe
cd5f6346
KP		 3785 * @param mtd MTD device structure
3786 *
3787 * OneNAND detection method:
59c51591 3788 * Compare the values from command with ones from register
cd5f6346 3789 */
ad0d363b 3790static int onenand_chip_probe(struct mtd_info *mtd)
cd5f6346
KP		 3791{
3792 struct onenand_chip *this = mtd->priv;
ad0d363b 3793 int bram_maf_id, bram_dev_id, maf_id, dev_id;
47e777e0
KP		 3794 int syscfg;
3795
3796 /* Save system configuration 1 */
3797 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3798 /* Clear Sync. Burst Read mode to read BootRAM */
ee8f3768 3799 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1);
cd5f6346
KP		 3800
3801 /* Send the command for reading device ID from BootRAM */
3802 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
3803
3804 /* Read manufacturer and device IDs from BootRAM */
3805 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
3806 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
3807
47e777e0
KP		 3808 /* Reset OneNAND to read default register values */
3809 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
3810 /* Wait reset */
3811 this->wait(mtd, FL_RESETING);
3812
3813 /* Restore system configuration 1 */
3814 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3815
cd5f6346
KP		 3816 /* Check manufacturer ID */
3817 if (onenand_check_maf(bram_maf_id))
3818 return -ENXIO;
3819
cd5f6346
KP		 3820 /* Read manufacturer and device IDs from Register */
3821 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
3822 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3823
3824 /* Check OneNAND device */
3825 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
3826 return -ENXIO;
3827
ad0d363b
KP		 3828 return 0;
3829}
3830
3831/**
3832 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
3833 * @param mtd MTD device structure
3834 */
3835static int onenand_probe(struct mtd_info *mtd)
3836{
3837 struct onenand_chip *this = mtd->priv;
3838 int maf_id, dev_id, ver_id;
3839 int density;
3840 int ret;
3841
3842 ret = this->chip_probe(mtd);
3843 if (ret)
3844 return ret;
3845
3846 /* Read manufacturer and device IDs from Register */
3847 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
3848 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3849 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
3850 this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY);
3851
cd5f6346 3852 /* Flash device information */
28b79ff9 3853 onenand_print_device_info(dev_id, ver_id);
cd5f6346 3854 this->device_id = dev_id;
28b79ff9 3855 this->version_id = ver_id;
cd5f6346 3856
c37cb56f
KP		 3857 /* Check OneNAND features */
3858 onenand_check_features(mtd);
3859
e71f04fc 3860 density = onenand_get_density(dev_id);
5988af23
RH		 3861 if (FLEXONENAND(this)) {
3862 this->dies = ONENAND_IS_DDP(this) ? 2 : 1;
3863 /* Maximum possible erase regions */
3864 mtd->numeraseregions = this->dies << 1;
3865 mtd->eraseregions = kzalloc(sizeof(struct mtd_erase_region_info)
3866 * (this->dies << 1), GFP_KERNEL);
3867 if (!mtd->eraseregions)
3868 return -ENOMEM;
3869 }
3870
3871 /*
3872 * For Flex-OneNAND, chipsize represents maximum possible device size.
3873 * mtd->size represents the actual device size.
3874 */
cd5f6346
KP		 3875 this->chipsize = (16 << density) << 20;
3876
3877 /* OneNAND page size & block size */
3878 /* The data buffer size is equal to page size */
28318776 3879 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
5988af23 3880 /* We use the full BufferRAM */
8a8f632d 3881 if (ONENAND_IS_4KB_PAGE(this))
5988af23
RH		 3882 mtd->writesize <<= 1;
3883
28318776 3884 mtd->oobsize = mtd->writesize >> 5;
9bfbc9b2 3885 /* Pages per a block are always 64 in OneNAND */
28318776 3886 mtd->erasesize = mtd->writesize << 6;
5988af23
RH		 3887 /*
3888 * Flex-OneNAND SLC area has 64 pages per block.
3889 * Flex-OneNAND MLC area has 128 pages per block.
3890 * Expose MLC erase size to find erase_shift and page_mask.
3891 */
3892 if (FLEXONENAND(this))
3893 mtd->erasesize <<= 1;
cd5f6346
KP		 3894
3895 this->erase_shift = ffs(mtd->erasesize) - 1;
28318776 3896 this->page_shift = ffs(mtd->writesize) - 1;
9bfbc9b2 3897 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
5988af23
RH		 3898 /* Set density mask. it is used for DDP */
3899 if (ONENAND_IS_DDP(this))
3900 this->density_mask = this->chipsize >> (this->erase_shift + 1);
ee9745fc
KP		 3901 /* It's real page size */
3902 this->writesize = mtd->writesize;
cd5f6346 3903
492e1501 3904 /* REVISIT: Multichip handling */
cd5f6346 3905
5988af23
RH		 3906 if (FLEXONENAND(this))
3907 flexonenand_get_size(mtd);
3908 else
3909 mtd->size = this->chipsize;
cd5f6346 3910
ee9745fc
KP		 3911 /*
3912 * We emulate the 4KiB page and 256KiB erase block size
3913 * But oobsize is still 64 bytes.
3914 * It is only valid if you turn on 2X program support,
3915 * Otherwise it will be ignored by compiler.
3916 */
3917 if (ONENAND_IS_2PLANE(this)) {
3918 mtd->writesize <<= 1;
3919 mtd->erasesize <<= 1;
3920 }
3921
cd5f6346
KP		 3922 return 0;
3923}
3924
a41371eb
KP		 3925/**
3926 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
3927 * @param mtd MTD device structure
3928 */
3929static int onenand_suspend(struct mtd_info *mtd)
3930{
3931 return onenand_get_device(mtd, FL_PM_SUSPENDED);
3932}
3933
3934/**
3935 * onenand_resume - [MTD Interface] Resume the OneNAND flash
3936 * @param mtd MTD device structure
3937 */
3938static void onenand_resume(struct mtd_info *mtd)
3939{
3940 struct onenand_chip *this = mtd->priv;
3941
3942 if (this->state == FL_PM_SUSPENDED)
3943 onenand_release_device(mtd);
3944 else
297758f8
AKS		 3945 printk(KERN_ERR "%s: resume() called for the chip which is not "
3946 "in suspended state\n", __func__);
a41371eb
KP		 3947}
3948
cd5f6346
KP		 3949/**
3950 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
3951 * @param mtd MTD device structure
3952 * @param maxchips Number of chips to scan for
3953 *
3954 * This fills out all the not initialized function pointers
3955 * with the defaults.
3956 * The flash ID is read and the mtd/chip structures are
3957 * filled with the appropriate values.
3958 */
3959int onenand_scan(struct mtd_info *mtd, int maxchips)
3960{
5988af23 3961 int i, ret;
cd5f6346
KP		 3962 struct onenand_chip *this = mtd->priv;
3963
3964 if (!this->read_word)
3965 this->read_word = onenand_readw;
3966 if (!this->write_word)
3967 this->write_word = onenand_writew;
3968
3969 if (!this->command)
3970 this->command = onenand_command;
3971 if (!this->wait)
2c22120f 3972 onenand_setup_wait(mtd);
31bb999e
KP		 3973 if (!this->bbt_wait)
3974 this->bbt_wait = onenand_bbt_wait;
3975 if (!this->unlock_all)
3976 this->unlock_all = onenand_unlock_all;
cd5f6346 3977
ad0d363b
KP		 3978 if (!this->chip_probe)
3979 this->chip_probe = onenand_chip_probe;
3980
cd5f6346
KP		 3981 if (!this->read_bufferram)
3982 this->read_bufferram = onenand_read_bufferram;
3983 if (!this->write_bufferram)
3984 this->write_bufferram = onenand_write_bufferram;
3985
cdc00130
KP		 3986 if (!this->block_markbad)
3987 this->block_markbad = onenand_default_block_markbad;
3988 if (!this->scan_bbt)
3989 this->scan_bbt = onenand_default_bbt;
3990
cd5f6346
KP		 3991 if (onenand_probe(mtd))
3992 return -ENXIO;
3993
52b0eea7
KP		 3994 /* Set Sync. Burst Read after probing */
3995 if (this->mmcontrol) {
3996 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
3997 this->read_bufferram = onenand_sync_read_bufferram;
3998 }
3999
532a37cf
KP		 4000 /* Allocate buffers, if necessary */
4001 if (!this->page_buf) {
470bc844 4002 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
532a37cf 4003 if (!this->page_buf) {
297758f8
AKS		 4004 printk(KERN_ERR "%s: Can't allocate page_buf\n",
4005 __func__);
532a37cf
KP		 4006 return -ENOMEM;
4007 }
4a8ce0b0
KP		 4008#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
4009 this->verify_buf = kzalloc(mtd->writesize, GFP_KERNEL);
4010 if (!this->verify_buf) {
4011 kfree(this->page_buf);
4012 return -ENOMEM;
4013 }
4014#endif
532a37cf
KP		 4015 this->options |= ONENAND_PAGEBUF_ALLOC;
4016 }
470bc844
KP		 4017 if (!this->oob_buf) {
4018 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
4019 if (!this->oob_buf) {
297758f8
AKS		 4020 printk(KERN_ERR "%s: Can't allocate oob_buf\n",
4021 __func__);
470bc844
KP		 4022 if (this->options & ONENAND_PAGEBUF_ALLOC) {
4023 this->options &= ~ONENAND_PAGEBUF_ALLOC;
4024 kfree(this->page_buf);
4025 }
4026 return -ENOMEM;
4027 }
4028 this->options |= ONENAND_OOBBUF_ALLOC;
4029 }
532a37cf 4030
cd5f6346
KP		 4031 this->state = FL_READY;
4032 init_waitqueue_head(&this->wq);
4033 spin_lock_init(&this->chip_lock);
4034
60d84f97
KP		 4035 /*
4036 * Allow subpage writes up to oobsize.
4037 */
cd5f6346 4038 switch (mtd->oobsize) {
5988af23 4039 case 128:
99b17c08
RT		 4040 if (FLEXONENAND(this)) {
4041 this->ecclayout = &flexonenand_oob_128;
4042 mtd->subpage_sft = 0;
4043 } else {
4044 this->ecclayout = &onenand_oob_128;
4045 mtd->subpage_sft = 2;
4046 }
e1c10243
KP		 4047 if (ONENAND_IS_NOP_1(this))
4048 mtd->subpage_sft = 0;
5988af23 4049 break;
cd5f6346 4050 case 64:
5bd34c09 4051 this->ecclayout = &onenand_oob_64;
60d84f97 4052 mtd->subpage_sft = 2;
cd5f6346
KP		 4053 break;
4054
4055 case 32:
5bd34c09 4056 this->ecclayout = &onenand_oob_32;
60d84f97 4057 mtd->subpage_sft = 1;
cd5f6346
KP		 4058 break;
4059
4060 default:
297758f8
AKS		 4061 printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n",
4062 __func__, mtd->oobsize);
60d84f97 4063 mtd->subpage_sft = 0;
cd5f6346 4064 /* To prevent kernel oops */
5bd34c09 4065 this->ecclayout = &onenand_oob_32;
cd5f6346
KP		 4066 break;
4067 }
4068
60d84f97 4069 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
a5e7c7b4
AH		 4070
4071 /*
4072 * The number of bytes available for a client to place data into
4073 * the out of band area
4074 */
4075 this->ecclayout->oobavail = 0;
ad286343
KP		 4076 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
4077 this->ecclayout->oobfree[i].length; i++)
a5e7c7b4
AH		 4078 this->ecclayout->oobavail +=
4079 this->ecclayout->oobfree[i].length;
1f92267c 4080 mtd->oobavail = this->ecclayout->oobavail;
a5e7c7b4 4081
5bd34c09 4082 mtd->ecclayout = this->ecclayout;
6a918bad 4083 mtd->ecc_strength = 1;
d5c5e78a 4084
cd5f6346 4085 /* Fill in remaining MTD driver data */
c7626802 4086 mtd->type = ONENAND_IS_MLC(this) ? MTD_MLCNANDFLASH : MTD_NANDFLASH;
5fa43394 4087 mtd->flags = MTD_CAP_NANDFLASH;
3c3c10bb
AB		 4088 mtd->_erase = onenand_erase;
4089 mtd->_point = NULL;
4090 mtd->_unpoint = NULL;
4091 mtd->_read = onenand_read;
4092 mtd->_write = onenand_write;
4093 mtd->_read_oob = onenand_read_oob;
4094 mtd->_write_oob = onenand_write_oob;
4095 mtd->_panic_write = onenand_panic_write;
493c6460 4096#ifdef CONFIG_MTD_ONENAND_OTP
3c3c10bb
AB		 4097 mtd->_get_fact_prot_info = onenand_get_fact_prot_info;
4098 mtd->_read_fact_prot_reg = onenand_read_fact_prot_reg;
4099 mtd->_get_user_prot_info = onenand_get_user_prot_info;
4100 mtd->_read_user_prot_reg = onenand_read_user_prot_reg;
4101 mtd->_write_user_prot_reg = onenand_write_user_prot_reg;
4102 mtd->_lock_user_prot_reg = onenand_lock_user_prot_reg;
493c6460 4103#endif
3c3c10bb
AB		 4104 mtd->_sync = onenand_sync;
4105 mtd->_lock = onenand_lock;
4106 mtd->_unlock = onenand_unlock;
4107 mtd->_suspend = onenand_suspend;
4108 mtd->_resume = onenand_resume;
4109 mtd->_block_isbad = onenand_block_isbad;
4110 mtd->_block_markbad = onenand_block_markbad;
cd5f6346 4111 mtd->owner = THIS_MODULE;
25dcd297 4112 mtd->writebufsize = mtd->writesize;
cd5f6346
KP		 4113
4114 /* Unlock whole block */
b3dcfd35
RT		 4115 if (!(this->options & ONENAND_SKIP_INITIAL_UNLOCKING))
4116 this->unlock_all(mtd);
cd5f6346 4117
5988af23
RH		 4118 ret = this->scan_bbt(mtd);
4119 if ((!FLEXONENAND(this)) || ret)
4120 return ret;
4121
4122 /* Change Flex-OneNAND boundaries if required */
4123 for (i = 0; i < MAX_DIES; i++)
4124 flexonenand_set_boundary(mtd, i, flex_bdry[2 * i],
4125 flex_bdry[(2 * i) + 1]);
4126
4127 return 0;
cd5f6346
KP		 4128}
4129
4130/**
4131 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
4132 * @param mtd MTD device structure
4133 */
4134void onenand_release(struct mtd_info *mtd)
4135{
532a37cf
KP		 4136 struct onenand_chip *this = mtd->priv;
4137
cd5f6346 4138 /* Deregister partitions */
711a632d 4139 mtd_device_unregister(mtd);
532a37cf
KP		 4140
4141 /* Free bad block table memory, if allocated */
f00b0046
AH		 4142 if (this->bbm) {
4143 struct bbm_info *bbm = this->bbm;
4144 kfree(bbm->bbt);
532a37cf 4145 kfree(this->bbm);
f00b0046 4146 }
470bc844 4147 /* Buffers allocated by onenand_scan */
4a8ce0b0 4148 if (this->options & ONENAND_PAGEBUF_ALLOC) {
532a37cf 4149 kfree(this->page_buf);
4a8ce0b0
KP		 4150#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
4151 kfree(this->verify_buf);
4152#endif
4153 }
470bc844
KP		 4154 if (this->options & ONENAND_OOBBUF_ALLOC)
4155 kfree(this->oob_buf);
5988af23 4156 kfree(mtd->eraseregions);
cd5f6346
KP		 4157}
4158
4159EXPORT_SYMBOL_GPL(onenand_scan);
4160EXPORT_SYMBOL_GPL(onenand_release);
4161
4162MODULE_LICENSE("GPL");
4163MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
4164MODULE_DESCRIPTION("Generic OneNAND flash driver code");
Linux kernel - Deliverables
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