Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/drivers/net/am79c961.c | |
3 | * | |
4 | * by Russell King <rmk@arm.linux.org.uk> 1995-2001. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * Derived from various things including skeleton.c | |
11 | * | |
12 | * This is a special driver for the am79c961A Lance chip used in the | |
13 | * Intel (formally Digital Equipment Corp) EBSA110 platform. Please | |
14 | * note that this can not be built as a module (it doesn't make sense). | |
15 | */ | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/types.h> | |
1da177e4 LT |
18 | #include <linux/interrupt.h> |
19 | #include <linux/ioport.h> | |
1da177e4 LT |
20 | #include <linux/slab.h> |
21 | #include <linux/string.h> | |
22 | #include <linux/errno.h> | |
23 | #include <linux/netdevice.h> | |
24 | #include <linux/etherdevice.h> | |
1da177e4 LT |
25 | #include <linux/delay.h> |
26 | #include <linux/init.h> | |
27 | #include <linux/crc32.h> | |
28 | #include <linux/bitops.h> | |
29 | ||
30 | #include <asm/system.h> | |
31 | #include <asm/irq.h> | |
766529fa | 32 | #include <asm/hardware.h> |
1da177e4 | 33 | #include <asm/io.h> |
1da177e4 LT |
34 | |
35 | #define TX_BUFFERS 15 | |
36 | #define RX_BUFFERS 25 | |
37 | ||
38 | #include "am79c961a.h" | |
39 | ||
40 | static irqreturn_t | |
41 | am79c961_interrupt (int irq, void *dev_id, struct pt_regs *regs); | |
42 | ||
43 | static unsigned int net_debug = NET_DEBUG; | |
44 | ||
45 | static const char version[] = | |
46 | "am79c961 ethernet driver (C) 1995-2001 Russell King v0.04\n"; | |
47 | ||
48 | /* --------------------------------------------------------------------------- */ | |
49 | ||
50 | #ifdef __arm__ | |
51 | static void write_rreg(u_long base, u_int reg, u_int val) | |
52 | { | |
53 | __asm__( | |
54 | "str%?h %1, [%2] @ NET_RAP\n\t" | |
55 | "str%?h %0, [%2, #-4] @ NET_RDP" | |
56 | : | |
57 | : "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464)); | |
58 | } | |
59 | ||
60 | static inline unsigned short read_rreg(u_long base_addr, u_int reg) | |
61 | { | |
62 | unsigned short v; | |
63 | __asm__( | |
64 | "str%?h %1, [%2] @ NET_RAP\n\t" | |
65 | "ldr%?h %0, [%2, #-4] @ NET_RDP" | |
66 | : "=r" (v) | |
67 | : "r" (reg), "r" (ISAIO_BASE + 0x0464)); | |
68 | return v; | |
69 | } | |
70 | ||
71 | static inline void write_ireg(u_long base, u_int reg, u_int val) | |
72 | { | |
73 | __asm__( | |
74 | "str%?h %1, [%2] @ NET_RAP\n\t" | |
75 | "str%?h %0, [%2, #8] @ NET_IDP" | |
76 | : | |
77 | : "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464)); | |
78 | } | |
79 | ||
80 | static inline unsigned short read_ireg(u_long base_addr, u_int reg) | |
81 | { | |
82 | u_short v; | |
83 | __asm__( | |
84 | "str%?h %1, [%2] @ NAT_RAP\n\t" | |
0e3a64e2 | 85 | "ldr%?h %0, [%2, #8] @ NET_IDP\n\t" |
1da177e4 LT |
86 | : "=r" (v) |
87 | : "r" (reg), "r" (ISAIO_BASE + 0x0464)); | |
88 | return v; | |
89 | } | |
90 | ||
91 | #define am_writeword(dev,off,val) __raw_writew(val, ISAMEM_BASE + ((off) << 1)) | |
92 | #define am_readword(dev,off) __raw_readw(ISAMEM_BASE + ((off) << 1)) | |
93 | ||
94 | static inline void | |
95 | am_writebuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length) | |
96 | { | |
97 | offset = ISAMEM_BASE + (offset << 1); | |
98 | length = (length + 1) & ~1; | |
99 | if ((int)buf & 2) { | |
100 | __asm__ __volatile__("str%?h %2, [%0], #4" | |
101 | : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8))); | |
102 | buf += 2; | |
103 | length -= 2; | |
104 | } | |
105 | while (length > 8) { | |
106 | unsigned int tmp, tmp2; | |
107 | __asm__ __volatile__( | |
108 | "ldm%?ia %1!, {%2, %3}\n\t" | |
109 | "str%?h %2, [%0], #4\n\t" | |
110 | "mov%? %2, %2, lsr #16\n\t" | |
111 | "str%?h %2, [%0], #4\n\t" | |
112 | "str%?h %3, [%0], #4\n\t" | |
113 | "mov%? %3, %3, lsr #16\n\t" | |
114 | "str%?h %3, [%0], #4" | |
115 | : "=&r" (offset), "=&r" (buf), "=r" (tmp), "=r" (tmp2) | |
116 | : "0" (offset), "1" (buf)); | |
117 | length -= 8; | |
118 | } | |
119 | while (length > 0) { | |
120 | __asm__ __volatile__("str%?h %2, [%0], #4" | |
121 | : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8))); | |
122 | buf += 2; | |
123 | length -= 2; | |
124 | } | |
125 | } | |
126 | ||
127 | static inline void | |
128 | am_readbuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length) | |
129 | { | |
130 | offset = ISAMEM_BASE + (offset << 1); | |
131 | length = (length + 1) & ~1; | |
132 | if ((int)buf & 2) { | |
133 | unsigned int tmp; | |
134 | __asm__ __volatile__( | |
135 | "ldr%?h %2, [%0], #4\n\t" | |
136 | "str%?b %2, [%1], #1\n\t" | |
137 | "mov%? %2, %2, lsr #8\n\t" | |
138 | "str%?b %2, [%1], #1" | |
139 | : "=&r" (offset), "=&r" (buf), "=r" (tmp): "0" (offset), "1" (buf)); | |
140 | length -= 2; | |
141 | } | |
142 | while (length > 8) { | |
143 | unsigned int tmp, tmp2, tmp3; | |
144 | __asm__ __volatile__( | |
145 | "ldr%?h %2, [%0], #4\n\t" | |
146 | "ldr%?h %3, [%0], #4\n\t" | |
147 | "orr%? %2, %2, %3, lsl #16\n\t" | |
148 | "ldr%?h %3, [%0], #4\n\t" | |
149 | "ldr%?h %4, [%0], #4\n\t" | |
150 | "orr%? %3, %3, %4, lsl #16\n\t" | |
151 | "stm%?ia %1!, {%2, %3}" | |
152 | : "=&r" (offset), "=&r" (buf), "=r" (tmp), "=r" (tmp2), "=r" (tmp3) | |
153 | : "0" (offset), "1" (buf)); | |
154 | length -= 8; | |
155 | } | |
156 | while (length > 0) { | |
157 | unsigned int tmp; | |
158 | __asm__ __volatile__( | |
159 | "ldr%?h %2, [%0], #4\n\t" | |
160 | "str%?b %2, [%1], #1\n\t" | |
161 | "mov%? %2, %2, lsr #8\n\t" | |
162 | "str%?b %2, [%1], #1" | |
163 | : "=&r" (offset), "=&r" (buf), "=r" (tmp) : "0" (offset), "1" (buf)); | |
164 | length -= 2; | |
165 | } | |
166 | } | |
167 | #else | |
168 | #error Not compatible | |
169 | #endif | |
170 | ||
171 | static int | |
172 | am79c961_ramtest(struct net_device *dev, unsigned int val) | |
173 | { | |
174 | unsigned char *buffer = kmalloc (65536, GFP_KERNEL); | |
175 | int i, error = 0, errorcount = 0; | |
176 | ||
177 | if (!buffer) | |
178 | return 0; | |
179 | memset (buffer, val, 65536); | |
180 | am_writebuffer(dev, 0, buffer, 65536); | |
181 | memset (buffer, val ^ 255, 65536); | |
182 | am_readbuffer(dev, 0, buffer, 65536); | |
183 | for (i = 0; i < 65536; i++) { | |
184 | if (buffer[i] != val && !error) { | |
185 | printk ("%s: buffer error (%02X %02X) %05X - ", dev->name, val, buffer[i], i); | |
186 | error = 1; | |
187 | errorcount ++; | |
188 | } else if (error && buffer[i] == val) { | |
189 | printk ("%05X\n", i); | |
190 | error = 0; | |
191 | } | |
192 | } | |
193 | if (error) | |
194 | printk ("10000\n"); | |
195 | kfree (buffer); | |
196 | return errorcount; | |
197 | } | |
198 | ||
199 | static void | |
200 | am79c961_init_for_open(struct net_device *dev) | |
201 | { | |
202 | struct dev_priv *priv = netdev_priv(dev); | |
203 | unsigned long flags; | |
204 | unsigned char *p; | |
205 | u_int hdr_addr, first_free_addr; | |
206 | int i; | |
207 | ||
208 | /* | |
209 | * Stop the chip. | |
210 | */ | |
211 | spin_lock_irqsave(priv->chip_lock, flags); | |
212 | write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP); | |
213 | spin_unlock_irqrestore(priv->chip_lock, flags); | |
214 | ||
215 | write_ireg (dev->base_addr, 5, 0x00a0); /* Receive address LED */ | |
216 | write_ireg (dev->base_addr, 6, 0x0081); /* Collision LED */ | |
217 | write_ireg (dev->base_addr, 7, 0x0090); /* XMIT LED */ | |
218 | write_ireg (dev->base_addr, 2, 0x0000); /* MODE register selects media */ | |
219 | ||
220 | for (i = LADRL; i <= LADRH; i++) | |
221 | write_rreg (dev->base_addr, i, 0); | |
222 | ||
223 | for (i = PADRL, p = dev->dev_addr; i <= PADRH; i++, p += 2) | |
224 | write_rreg (dev->base_addr, i, p[0] | (p[1] << 8)); | |
225 | ||
226 | i = MODE_PORT_10BT; | |
227 | if (dev->flags & IFF_PROMISC) | |
228 | i |= MODE_PROMISC; | |
229 | ||
230 | write_rreg (dev->base_addr, MODE, i); | |
231 | write_rreg (dev->base_addr, POLLINT, 0); | |
232 | write_rreg (dev->base_addr, SIZERXR, -RX_BUFFERS); | |
233 | write_rreg (dev->base_addr, SIZETXR, -TX_BUFFERS); | |
234 | ||
235 | first_free_addr = RX_BUFFERS * 8 + TX_BUFFERS * 8 + 16; | |
236 | hdr_addr = 0; | |
237 | ||
238 | priv->rxhead = 0; | |
239 | priv->rxtail = 0; | |
240 | priv->rxhdr = hdr_addr; | |
241 | ||
242 | for (i = 0; i < RX_BUFFERS; i++) { | |
243 | priv->rxbuffer[i] = first_free_addr; | |
244 | am_writeword (dev, hdr_addr, first_free_addr); | |
245 | am_writeword (dev, hdr_addr + 2, RMD_OWN); | |
246 | am_writeword (dev, hdr_addr + 4, (-1600)); | |
247 | am_writeword (dev, hdr_addr + 6, 0); | |
248 | first_free_addr += 1600; | |
249 | hdr_addr += 8; | |
250 | } | |
251 | priv->txhead = 0; | |
252 | priv->txtail = 0; | |
253 | priv->txhdr = hdr_addr; | |
254 | for (i = 0; i < TX_BUFFERS; i++) { | |
255 | priv->txbuffer[i] = first_free_addr; | |
256 | am_writeword (dev, hdr_addr, first_free_addr); | |
257 | am_writeword (dev, hdr_addr + 2, TMD_STP|TMD_ENP); | |
258 | am_writeword (dev, hdr_addr + 4, 0xf000); | |
259 | am_writeword (dev, hdr_addr + 6, 0); | |
260 | first_free_addr += 1600; | |
261 | hdr_addr += 8; | |
262 | } | |
263 | ||
264 | write_rreg (dev->base_addr, BASERXL, priv->rxhdr); | |
265 | write_rreg (dev->base_addr, BASERXH, 0); | |
266 | write_rreg (dev->base_addr, BASETXL, priv->txhdr); | |
267 | write_rreg (dev->base_addr, BASERXH, 0); | |
268 | write_rreg (dev->base_addr, CSR0, CSR0_STOP); | |
269 | write_rreg (dev->base_addr, CSR3, CSR3_IDONM|CSR3_BABLM|CSR3_DXSUFLO); | |
270 | write_rreg (dev->base_addr, CSR4, CSR4_APAD_XMIT|CSR4_MFCOM|CSR4_RCVCCOM|CSR4_TXSTRTM|CSR4_JABM); | |
271 | write_rreg (dev->base_addr, CSR0, CSR0_IENA|CSR0_STRT); | |
272 | } | |
273 | ||
274 | static void am79c961_timer(unsigned long data) | |
275 | { | |
276 | struct net_device *dev = (struct net_device *)data; | |
277 | struct dev_priv *priv = netdev_priv(dev); | |
278 | unsigned int lnkstat, carrier; | |
279 | ||
280 | lnkstat = read_ireg(dev->base_addr, ISALED0) & ISALED0_LNKST; | |
281 | carrier = netif_carrier_ok(dev); | |
282 | ||
283 | if (lnkstat && !carrier) | |
284 | netif_carrier_on(dev); | |
285 | else if (!lnkstat && carrier) | |
286 | netif_carrier_off(dev); | |
287 | ||
487fd4eb | 288 | mod_timer(&priv->timer, jiffies + msecs_to_jiffies(500)); |
1da177e4 LT |
289 | } |
290 | ||
291 | /* | |
292 | * Open/initialize the board. | |
293 | */ | |
294 | static int | |
295 | am79c961_open(struct net_device *dev) | |
296 | { | |
297 | struct dev_priv *priv = netdev_priv(dev); | |
298 | int ret; | |
299 | ||
300 | memset (&priv->stats, 0, sizeof (priv->stats)); | |
301 | ||
302 | ret = request_irq(dev->irq, am79c961_interrupt, 0, dev->name, dev); | |
303 | if (ret) | |
304 | return ret; | |
305 | ||
306 | am79c961_init_for_open(dev); | |
307 | ||
308 | netif_carrier_off(dev); | |
309 | ||
310 | priv->timer.expires = jiffies; | |
311 | add_timer(&priv->timer); | |
312 | ||
313 | netif_start_queue(dev); | |
314 | ||
315 | return 0; | |
316 | } | |
317 | ||
318 | /* | |
319 | * The inverse routine to am79c961_open(). | |
320 | */ | |
321 | static int | |
322 | am79c961_close(struct net_device *dev) | |
323 | { | |
324 | struct dev_priv *priv = netdev_priv(dev); | |
325 | unsigned long flags; | |
326 | ||
327 | del_timer_sync(&priv->timer); | |
328 | ||
329 | netif_stop_queue(dev); | |
330 | netif_carrier_off(dev); | |
331 | ||
332 | spin_lock_irqsave(priv->chip_lock, flags); | |
333 | write_rreg (dev->base_addr, CSR0, CSR0_STOP); | |
334 | write_rreg (dev->base_addr, CSR3, CSR3_MASKALL); | |
335 | spin_unlock_irqrestore(priv->chip_lock, flags); | |
336 | ||
337 | free_irq (dev->irq, dev); | |
338 | ||
339 | return 0; | |
340 | } | |
341 | ||
342 | /* | |
343 | * Get the current statistics. | |
344 | */ | |
345 | static struct net_device_stats *am79c961_getstats (struct net_device *dev) | |
346 | { | |
347 | struct dev_priv *priv = netdev_priv(dev); | |
348 | return &priv->stats; | |
349 | } | |
350 | ||
351 | static void am79c961_mc_hash(struct dev_mc_list *dmi, unsigned short *hash) | |
352 | { | |
353 | if (dmi->dmi_addrlen == ETH_ALEN && dmi->dmi_addr[0] & 0x01) { | |
354 | int idx, bit; | |
355 | u32 crc; | |
356 | ||
357 | crc = ether_crc_le(ETH_ALEN, dmi->dmi_addr); | |
358 | ||
359 | idx = crc >> 30; | |
360 | bit = (crc >> 26) & 15; | |
361 | ||
362 | hash[idx] |= 1 << bit; | |
363 | } | |
364 | } | |
365 | ||
366 | /* | |
367 | * Set or clear promiscuous/multicast mode filter for this adapter. | |
368 | */ | |
369 | static void am79c961_setmulticastlist (struct net_device *dev) | |
370 | { | |
371 | struct dev_priv *priv = netdev_priv(dev); | |
372 | unsigned long flags; | |
373 | unsigned short multi_hash[4], mode; | |
374 | int i, stopped; | |
375 | ||
376 | mode = MODE_PORT_10BT; | |
377 | ||
378 | if (dev->flags & IFF_PROMISC) { | |
379 | mode |= MODE_PROMISC; | |
380 | } else if (dev->flags & IFF_ALLMULTI) { | |
381 | memset(multi_hash, 0xff, sizeof(multi_hash)); | |
382 | } else { | |
383 | struct dev_mc_list *dmi; | |
384 | ||
385 | memset(multi_hash, 0x00, sizeof(multi_hash)); | |
386 | ||
387 | for (dmi = dev->mc_list; dmi; dmi = dmi->next) | |
388 | am79c961_mc_hash(dmi, multi_hash); | |
389 | } | |
390 | ||
391 | spin_lock_irqsave(priv->chip_lock, flags); | |
392 | ||
393 | stopped = read_rreg(dev->base_addr, CSR0) & CSR0_STOP; | |
394 | ||
395 | if (!stopped) { | |
396 | /* | |
397 | * Put the chip into suspend mode | |
398 | */ | |
399 | write_rreg(dev->base_addr, CTRL1, CTRL1_SPND); | |
400 | ||
401 | /* | |
402 | * Spin waiting for chip to report suspend mode | |
403 | */ | |
404 | while ((read_rreg(dev->base_addr, CTRL1) & CTRL1_SPND) == 0) { | |
405 | spin_unlock_irqrestore(priv->chip_lock, flags); | |
406 | nop(); | |
407 | spin_lock_irqsave(priv->chip_lock, flags); | |
408 | } | |
409 | } | |
410 | ||
411 | /* | |
412 | * Update the multicast hash table | |
413 | */ | |
414 | for (i = 0; i < sizeof(multi_hash) / sizeof(multi_hash[0]); i++) | |
415 | write_rreg(dev->base_addr, i + LADRL, multi_hash[i]); | |
416 | ||
417 | /* | |
418 | * Write the mode register | |
419 | */ | |
420 | write_rreg(dev->base_addr, MODE, mode); | |
421 | ||
422 | if (!stopped) { | |
423 | /* | |
424 | * Put the chip back into running mode | |
425 | */ | |
426 | write_rreg(dev->base_addr, CTRL1, 0); | |
427 | } | |
428 | ||
429 | spin_unlock_irqrestore(priv->chip_lock, flags); | |
430 | } | |
431 | ||
432 | static void am79c961_timeout(struct net_device *dev) | |
433 | { | |
434 | printk(KERN_WARNING "%s: transmit timed out, network cable problem?\n", | |
435 | dev->name); | |
436 | ||
437 | /* | |
438 | * ought to do some setup of the tx side here | |
439 | */ | |
440 | ||
441 | netif_wake_queue(dev); | |
442 | } | |
443 | ||
444 | /* | |
445 | * Transmit a packet | |
446 | */ | |
447 | static int | |
448 | am79c961_sendpacket(struct sk_buff *skb, struct net_device *dev) | |
449 | { | |
450 | struct dev_priv *priv = netdev_priv(dev); | |
451 | unsigned int hdraddr, bufaddr; | |
452 | unsigned int head; | |
453 | unsigned long flags; | |
454 | ||
455 | head = priv->txhead; | |
456 | hdraddr = priv->txhdr + (head << 3); | |
457 | bufaddr = priv->txbuffer[head]; | |
458 | head += 1; | |
459 | if (head >= TX_BUFFERS) | |
460 | head = 0; | |
461 | ||
462 | am_writebuffer (dev, bufaddr, skb->data, skb->len); | |
463 | am_writeword (dev, hdraddr + 4, -skb->len); | |
464 | am_writeword (dev, hdraddr + 2, TMD_OWN|TMD_STP|TMD_ENP); | |
465 | priv->txhead = head; | |
466 | ||
467 | spin_lock_irqsave(priv->chip_lock, flags); | |
468 | write_rreg (dev->base_addr, CSR0, CSR0_TDMD|CSR0_IENA); | |
469 | dev->trans_start = jiffies; | |
470 | spin_unlock_irqrestore(priv->chip_lock, flags); | |
471 | ||
472 | /* | |
473 | * If the next packet is owned by the ethernet device, | |
474 | * then the tx ring is full and we can't add another | |
475 | * packet. | |
476 | */ | |
477 | if (am_readword(dev, priv->txhdr + (priv->txhead << 3) + 2) & TMD_OWN) | |
478 | netif_stop_queue(dev); | |
479 | ||
480 | dev_kfree_skb(skb); | |
481 | ||
482 | return 0; | |
483 | } | |
484 | ||
485 | /* | |
486 | * If we have a good packet(s), get it/them out of the buffers. | |
487 | */ | |
488 | static void | |
489 | am79c961_rx(struct net_device *dev, struct dev_priv *priv) | |
490 | { | |
491 | do { | |
492 | struct sk_buff *skb; | |
493 | u_int hdraddr; | |
494 | u_int pktaddr; | |
495 | u_int status; | |
496 | int len; | |
497 | ||
498 | hdraddr = priv->rxhdr + (priv->rxtail << 3); | |
499 | pktaddr = priv->rxbuffer[priv->rxtail]; | |
500 | ||
501 | status = am_readword (dev, hdraddr + 2); | |
502 | if (status & RMD_OWN) /* do we own it? */ | |
503 | break; | |
504 | ||
505 | priv->rxtail ++; | |
506 | if (priv->rxtail >= RX_BUFFERS) | |
507 | priv->rxtail = 0; | |
508 | ||
509 | if ((status & (RMD_ERR|RMD_STP|RMD_ENP)) != (RMD_STP|RMD_ENP)) { | |
510 | am_writeword (dev, hdraddr + 2, RMD_OWN); | |
511 | priv->stats.rx_errors ++; | |
512 | if (status & RMD_ERR) { | |
513 | if (status & RMD_FRAM) | |
514 | priv->stats.rx_frame_errors ++; | |
515 | if (status & RMD_CRC) | |
516 | priv->stats.rx_crc_errors ++; | |
517 | } else if (status & RMD_STP) | |
518 | priv->stats.rx_length_errors ++; | |
519 | continue; | |
520 | } | |
521 | ||
522 | len = am_readword(dev, hdraddr + 6); | |
523 | skb = dev_alloc_skb(len + 2); | |
524 | ||
525 | if (skb) { | |
526 | skb->dev = dev; | |
527 | skb_reserve(skb, 2); | |
528 | ||
529 | am_readbuffer(dev, pktaddr, skb_put(skb, len), len); | |
530 | am_writeword(dev, hdraddr + 2, RMD_OWN); | |
531 | skb->protocol = eth_type_trans(skb, dev); | |
532 | netif_rx(skb); | |
533 | dev->last_rx = jiffies; | |
534 | priv->stats.rx_bytes += len; | |
535 | priv->stats.rx_packets ++; | |
536 | } else { | |
537 | am_writeword (dev, hdraddr + 2, RMD_OWN); | |
538 | printk (KERN_WARNING "%s: memory squeeze, dropping packet.\n", dev->name); | |
539 | priv->stats.rx_dropped ++; | |
540 | break; | |
541 | } | |
542 | } while (1); | |
543 | } | |
544 | ||
545 | /* | |
546 | * Update stats for the transmitted packet | |
547 | */ | |
548 | static void | |
549 | am79c961_tx(struct net_device *dev, struct dev_priv *priv) | |
550 | { | |
551 | do { | |
552 | short len; | |
553 | u_int hdraddr; | |
554 | u_int status; | |
555 | ||
556 | hdraddr = priv->txhdr + (priv->txtail << 3); | |
557 | status = am_readword (dev, hdraddr + 2); | |
558 | if (status & TMD_OWN) | |
559 | break; | |
560 | ||
561 | priv->txtail ++; | |
562 | if (priv->txtail >= TX_BUFFERS) | |
563 | priv->txtail = 0; | |
564 | ||
565 | if (status & TMD_ERR) { | |
566 | u_int status2; | |
567 | ||
568 | priv->stats.tx_errors ++; | |
569 | ||
570 | status2 = am_readword (dev, hdraddr + 6); | |
571 | ||
572 | /* | |
573 | * Clear the error byte | |
574 | */ | |
575 | am_writeword (dev, hdraddr + 6, 0); | |
576 | ||
577 | if (status2 & TST_RTRY) | |
578 | priv->stats.collisions += 16; | |
579 | if (status2 & TST_LCOL) | |
580 | priv->stats.tx_window_errors ++; | |
581 | if (status2 & TST_LCAR) | |
582 | priv->stats.tx_carrier_errors ++; | |
583 | if (status2 & TST_UFLO) | |
584 | priv->stats.tx_fifo_errors ++; | |
585 | continue; | |
586 | } | |
587 | priv->stats.tx_packets ++; | |
588 | len = am_readword (dev, hdraddr + 4); | |
589 | priv->stats.tx_bytes += -len; | |
590 | } while (priv->txtail != priv->txhead); | |
591 | ||
592 | netif_wake_queue(dev); | |
593 | } | |
594 | ||
595 | static irqreturn_t | |
596 | am79c961_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
597 | { | |
598 | struct net_device *dev = (struct net_device *)dev_id; | |
599 | struct dev_priv *priv = netdev_priv(dev); | |
600 | u_int status, n = 100; | |
601 | int handled = 0; | |
602 | ||
603 | do { | |
604 | status = read_rreg(dev->base_addr, CSR0); | |
605 | write_rreg(dev->base_addr, CSR0, status & | |
606 | (CSR0_IENA|CSR0_TINT|CSR0_RINT| | |
607 | CSR0_MERR|CSR0_MISS|CSR0_CERR|CSR0_BABL)); | |
608 | ||
609 | if (status & CSR0_RINT) { | |
610 | handled = 1; | |
611 | am79c961_rx(dev, priv); | |
612 | } | |
613 | if (status & CSR0_TINT) { | |
614 | handled = 1; | |
615 | am79c961_tx(dev, priv); | |
616 | } | |
617 | if (status & CSR0_MISS) { | |
618 | handled = 1; | |
619 | priv->stats.rx_dropped ++; | |
620 | } | |
621 | if (status & CSR0_CERR) { | |
622 | handled = 1; | |
623 | mod_timer(&priv->timer, jiffies); | |
624 | } | |
625 | } while (--n && status & (CSR0_RINT | CSR0_TINT)); | |
626 | ||
627 | return IRQ_RETVAL(handled); | |
628 | } | |
629 | ||
630 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
631 | static void am79c961_poll_controller(struct net_device *dev) | |
632 | { | |
633 | unsigned long flags; | |
634 | local_irq_save(flags); | |
635 | am79c961_interrupt(dev->irq, dev, NULL); | |
636 | local_irq_restore(flags); | |
637 | } | |
638 | #endif | |
639 | ||
640 | /* | |
641 | * Initialise the chip. Note that we always expect | |
642 | * to be entered with interrupts enabled. | |
643 | */ | |
644 | static int | |
645 | am79c961_hw_init(struct net_device *dev) | |
646 | { | |
647 | struct dev_priv *priv = netdev_priv(dev); | |
648 | ||
649 | spin_lock_irq(&priv->chip_lock); | |
650 | write_rreg (dev->base_addr, CSR0, CSR0_STOP); | |
651 | write_rreg (dev->base_addr, CSR3, CSR3_MASKALL); | |
652 | spin_unlock_irq(&priv->chip_lock); | |
653 | ||
654 | am79c961_ramtest(dev, 0x66); | |
655 | am79c961_ramtest(dev, 0x99); | |
656 | ||
657 | return 0; | |
658 | } | |
659 | ||
660 | static void __init am79c961_banner(void) | |
661 | { | |
662 | static unsigned version_printed; | |
663 | ||
664 | if (net_debug && version_printed++ == 0) | |
665 | printk(KERN_INFO "%s", version); | |
666 | } | |
667 | ||
668 | static int __init am79c961_init(void) | |
669 | { | |
670 | struct net_device *dev; | |
671 | struct dev_priv *priv; | |
672 | int i, ret; | |
673 | ||
674 | dev = alloc_etherdev(sizeof(struct dev_priv)); | |
675 | ret = -ENOMEM; | |
676 | if (!dev) | |
677 | goto out; | |
678 | ||
679 | priv = netdev_priv(dev); | |
680 | ||
681 | /* | |
682 | * Fixed address and IRQ lines here. | |
683 | * The PNP initialisation should have been | |
684 | * done by the ether bootp loader. | |
685 | */ | |
686 | dev->base_addr = 0x220; | |
687 | dev->irq = IRQ_EBSA110_ETHERNET; | |
688 | ||
689 | ret = -ENODEV; | |
690 | if (!request_region(dev->base_addr, 0x18, dev->name)) | |
691 | goto nodev; | |
692 | ||
693 | /* | |
694 | * Reset the device. | |
695 | */ | |
696 | inb(dev->base_addr + NET_RESET); | |
697 | udelay(5); | |
698 | ||
699 | /* | |
700 | * Check the manufacturer part of the | |
701 | * ether address. | |
702 | */ | |
703 | if (inb(dev->base_addr) != 0x08 || | |
704 | inb(dev->base_addr + 2) != 0x00 || | |
705 | inb(dev->base_addr + 4) != 0x2b) | |
706 | goto release; | |
707 | ||
708 | am79c961_banner(); | |
1da177e4 | 709 | |
487fd4eb | 710 | for (i = 0; i < 6; i++) |
1da177e4 | 711 | dev->dev_addr[i] = inb(dev->base_addr + i * 2) & 0xff; |
1da177e4 LT |
712 | |
713 | spin_lock_init(&priv->chip_lock); | |
714 | init_timer(&priv->timer); | |
715 | priv->timer.data = (unsigned long)dev; | |
716 | priv->timer.function = am79c961_timer; | |
717 | ||
718 | if (am79c961_hw_init(dev)) | |
719 | goto release; | |
720 | ||
721 | dev->open = am79c961_open; | |
722 | dev->stop = am79c961_close; | |
723 | dev->hard_start_xmit = am79c961_sendpacket; | |
724 | dev->get_stats = am79c961_getstats; | |
725 | dev->set_multicast_list = am79c961_setmulticastlist; | |
726 | dev->tx_timeout = am79c961_timeout; | |
727 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
728 | dev->poll_controller = am79c961_poll_controller; | |
729 | #endif | |
730 | ||
731 | ret = register_netdev(dev); | |
487fd4eb RK |
732 | if (ret == 0) { |
733 | printk(KERN_INFO "%s: ether address ", dev->name); | |
734 | ||
735 | for (i = 0; i < 6; i++) | |
736 | printk (i == 5 ? "%02x\n" : "%02x:", dev->dev_addr[i]); | |
737 | ||
1da177e4 | 738 | return 0; |
487fd4eb | 739 | } |
1da177e4 LT |
740 | |
741 | release: | |
742 | release_region(dev->base_addr, 0x18); | |
743 | nodev: | |
744 | free_netdev(dev); | |
745 | out: | |
746 | return ret; | |
747 | } | |
748 | ||
749 | __initcall(am79c961_init); |