Commit | Line | Data |
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f3cc28c7 JC |
1 | /* |
2 | * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved. | |
3 | * Copyright(c) 2006 Chris Snook <csnook@redhat.com> | |
4 | * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com> | |
5 | * | |
6 | * Derived from Intel e1000 driver | |
7 | * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the Free | |
11 | * Software Foundation; either version 2 of the License, or (at your option) | |
12 | * any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
15 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
16 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
17 | * more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License along with | |
20 | * this program; if not, write to the Free Software Foundation, Inc., 59 | |
21 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | * | |
23 | * The full GNU General Public License is included in this distribution in the | |
24 | * file called COPYING. | |
25 | * | |
26 | * Contact Information: | |
27 | * Xiong Huang <xiong_huang@attansic.com> | |
28 | * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei, | |
29 | * Xinzhu 302, TAIWAN, REPUBLIC OF CHINA | |
30 | * | |
31 | * Chris Snook <csnook@redhat.com> | |
32 | * Jay Cliburn <jcliburn@gmail.com> | |
33 | * | |
34 | * This version is adapted from the Attansic reference driver for | |
35 | * inclusion in the Linux kernel. It is currently under heavy development. | |
36 | * A very incomplete list of things that need to be dealt with: | |
37 | * | |
38 | * TODO: | |
39 | * Fix TSO; tx performance is horrible with TSO enabled. | |
40 | * Wake on LAN. | |
53ffb42c | 41 | * Add more ethtool functions. |
f3cc28c7 JC |
42 | * Fix abstruse irq enable/disable condition described here: |
43 | * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2 | |
44 | * | |
45 | * NEEDS TESTING: | |
46 | * VLAN | |
47 | * multicast | |
48 | * promiscuous mode | |
49 | * interrupt coalescing | |
50 | * SMP torture testing | |
51 | */ | |
52 | ||
53 | #include <linux/types.h> | |
54 | #include <linux/netdevice.h> | |
55 | #include <linux/pci.h> | |
56 | #include <linux/spinlock.h> | |
57 | #include <linux/slab.h> | |
58 | #include <linux/string.h> | |
59 | #include <linux/skbuff.h> | |
60 | #include <linux/etherdevice.h> | |
61 | #include <linux/if_vlan.h> | |
a3093d9b | 62 | #include <linux/if_ether.h> |
f3cc28c7 JC |
63 | #include <linux/irqreturn.h> |
64 | #include <linux/workqueue.h> | |
65 | #include <linux/timer.h> | |
66 | #include <linux/jiffies.h> | |
67 | #include <linux/hardirq.h> | |
68 | #include <linux/interrupt.h> | |
69 | #include <linux/irqflags.h> | |
70 | #include <linux/dma-mapping.h> | |
71 | #include <linux/net.h> | |
72 | #include <linux/pm.h> | |
73 | #include <linux/in.h> | |
74 | #include <linux/ip.h> | |
75 | #include <linux/tcp.h> | |
76 | #include <linux/compiler.h> | |
77 | #include <linux/delay.h> | |
78 | #include <linux/mii.h> | |
79 | #include <net/checksum.h> | |
80 | ||
81 | #include <asm/atomic.h> | |
82 | #include <asm/byteorder.h> | |
83 | ||
84 | #include "atl1.h" | |
85 | ||
9cc6d14e | 86 | #define DRIVER_VERSION "2.0.7" |
f3cc28c7 JC |
87 | |
88 | char atl1_driver_name[] = "atl1"; | |
89 | static const char atl1_driver_string[] = "Attansic L1 Ethernet Network Driver"; | |
90 | static const char atl1_copyright[] = "Copyright(c) 2005-2006 Attansic Corporation."; | |
91 | char atl1_driver_version[] = DRIVER_VERSION; | |
92 | ||
93 | MODULE_AUTHOR | |
94 | ("Attansic Corporation <xiong_huang@attansic.com>, Chris Snook <csnook@redhat.com>, Jay Cliburn <jcliburn@gmail.com>"); | |
95 | MODULE_DESCRIPTION("Attansic 1000M Ethernet Network Driver"); | |
96 | MODULE_LICENSE("GPL"); | |
97 | MODULE_VERSION(DRIVER_VERSION); | |
98 | ||
99 | /* | |
100 | * atl1_pci_tbl - PCI Device ID Table | |
101 | */ | |
102 | static const struct pci_device_id atl1_pci_tbl[] = { | |
e81e557a | 103 | {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)}, |
f3cc28c7 JC |
104 | /* required last entry */ |
105 | {0,} | |
106 | }; | |
107 | ||
108 | MODULE_DEVICE_TABLE(pci, atl1_pci_tbl); | |
109 | ||
110 | /* | |
111 | * atl1_sw_init - Initialize general software structures (struct atl1_adapter) | |
112 | * @adapter: board private structure to initialize | |
113 | * | |
114 | * atl1_sw_init initializes the Adapter private data structure. | |
115 | * Fields are initialized based on PCI device information and | |
116 | * OS network device settings (MTU size). | |
117 | */ | |
118 | static int __devinit atl1_sw_init(struct atl1_adapter *adapter) | |
119 | { | |
120 | struct atl1_hw *hw = &adapter->hw; | |
121 | struct net_device *netdev = adapter->netdev; | |
f3cc28c7 | 122 | |
2a49128f | 123 | hw->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; |
a3093d9b | 124 | hw->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; |
f3cc28c7 JC |
125 | |
126 | adapter->wol = 0; | |
127 | adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7; | |
128 | adapter->ict = 50000; /* 100ms */ | |
129 | adapter->link_speed = SPEED_0; /* hardware init */ | |
130 | adapter->link_duplex = FULL_DUPLEX; | |
131 | ||
132 | hw->phy_configured = false; | |
133 | hw->preamble_len = 7; | |
134 | hw->ipgt = 0x60; | |
135 | hw->min_ifg = 0x50; | |
136 | hw->ipgr1 = 0x40; | |
137 | hw->ipgr2 = 0x60; | |
138 | hw->max_retry = 0xf; | |
139 | hw->lcol = 0x37; | |
140 | hw->jam_ipg = 7; | |
141 | hw->rfd_burst = 8; | |
142 | hw->rrd_burst = 8; | |
143 | hw->rfd_fetch_gap = 1; | |
144 | hw->rx_jumbo_th = adapter->rx_buffer_len / 8; | |
145 | hw->rx_jumbo_lkah = 1; | |
146 | hw->rrd_ret_timer = 16; | |
147 | hw->tpd_burst = 4; | |
148 | hw->tpd_fetch_th = 16; | |
149 | hw->txf_burst = 0x100; | |
150 | hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3; | |
151 | hw->tpd_fetch_gap = 1; | |
152 | hw->rcb_value = atl1_rcb_64; | |
153 | hw->dma_ord = atl1_dma_ord_enh; | |
154 | hw->dmar_block = atl1_dma_req_256; | |
155 | hw->dmaw_block = atl1_dma_req_256; | |
156 | hw->cmb_rrd = 4; | |
157 | hw->cmb_tpd = 4; | |
158 | hw->cmb_rx_timer = 1; /* about 2us */ | |
159 | hw->cmb_tx_timer = 1; /* about 2us */ | |
160 | hw->smb_timer = 100000; /* about 200ms */ | |
161 | ||
f3cc28c7 JC |
162 | spin_lock_init(&adapter->lock); |
163 | spin_lock_init(&adapter->mb_lock); | |
164 | ||
165 | return 0; | |
166 | } | |
167 | ||
05ffdd7b JC |
168 | static int mdio_read(struct net_device *netdev, int phy_id, int reg_num) |
169 | { | |
170 | struct atl1_adapter *adapter = netdev_priv(netdev); | |
171 | u16 result; | |
172 | ||
173 | atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result); | |
174 | ||
175 | return result; | |
176 | } | |
177 | ||
178 | static void mdio_write(struct net_device *netdev, int phy_id, int reg_num, | |
179 | int val) | |
180 | { | |
181 | struct atl1_adapter *adapter = netdev_priv(netdev); | |
182 | ||
183 | atl1_write_phy_reg(&adapter->hw, reg_num, val); | |
184 | } | |
185 | ||
186 | /* | |
187 | * atl1_mii_ioctl - | |
188 | * @netdev: | |
189 | * @ifreq: | |
190 | * @cmd: | |
191 | */ | |
192 | static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
193 | { | |
194 | struct atl1_adapter *adapter = netdev_priv(netdev); | |
195 | unsigned long flags; | |
196 | int retval; | |
197 | ||
198 | if (!netif_running(netdev)) | |
199 | return -EINVAL; | |
200 | ||
201 | spin_lock_irqsave(&adapter->lock, flags); | |
202 | retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL); | |
203 | spin_unlock_irqrestore(&adapter->lock, flags); | |
204 | ||
205 | return retval; | |
206 | } | |
207 | ||
208 | /* | |
209 | * atl1_ioctl - | |
210 | * @netdev: | |
211 | * @ifreq: | |
212 | * @cmd: | |
213 | */ | |
214 | static int atl1_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
215 | { | |
216 | switch (cmd) { | |
217 | case SIOCGMIIPHY: | |
218 | case SIOCGMIIREG: | |
219 | case SIOCSMIIREG: | |
220 | return atl1_mii_ioctl(netdev, ifr, cmd); | |
221 | default: | |
222 | return -EOPNOTSUPP; | |
223 | } | |
224 | } | |
225 | ||
f3cc28c7 JC |
226 | /* |
227 | * atl1_setup_mem_resources - allocate Tx / RX descriptor resources | |
228 | * @adapter: board private structure | |
229 | * | |
230 | * Return 0 on success, negative on failure | |
231 | */ | |
232 | s32 atl1_setup_ring_resources(struct atl1_adapter *adapter) | |
233 | { | |
234 | struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring; | |
235 | struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring; | |
236 | struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring; | |
237 | struct atl1_ring_header *ring_header = &adapter->ring_header; | |
238 | struct pci_dev *pdev = adapter->pdev; | |
239 | int size; | |
240 | u8 offset = 0; | |
241 | ||
242 | size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count); | |
243 | tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL); | |
244 | if (unlikely(!tpd_ring->buffer_info)) { | |
1e006364 | 245 | dev_err(&pdev->dev, "kzalloc failed , size = D%d\n", size); |
f3cc28c7 JC |
246 | goto err_nomem; |
247 | } | |
248 | rfd_ring->buffer_info = | |
53ffb42c | 249 | (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count); |
f3cc28c7 | 250 | |
53ffb42c JC |
251 | /* real ring DMA buffer |
252 | * each ring/block may need up to 8 bytes for alignment, hence the | |
253 | * additional 40 bytes tacked onto the end. | |
254 | */ | |
255 | ring_header->size = size = | |
256 | sizeof(struct tx_packet_desc) * tpd_ring->count | |
257 | + sizeof(struct rx_free_desc) * rfd_ring->count | |
258 | + sizeof(struct rx_return_desc) * rrd_ring->count | |
259 | + sizeof(struct coals_msg_block) | |
260 | + sizeof(struct stats_msg_block) | |
261 | + 40; | |
f3cc28c7 JC |
262 | |
263 | ring_header->desc = pci_alloc_consistent(pdev, ring_header->size, | |
53ffb42c | 264 | &ring_header->dma); |
f3cc28c7 | 265 | if (unlikely(!ring_header->desc)) { |
1e006364 | 266 | dev_err(&pdev->dev, "pci_alloc_consistent failed\n"); |
f3cc28c7 JC |
267 | goto err_nomem; |
268 | } | |
269 | ||
270 | memset(ring_header->desc, 0, ring_header->size); | |
271 | ||
272 | /* init TPD ring */ | |
273 | tpd_ring->dma = ring_header->dma; | |
274 | offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0; | |
275 | tpd_ring->dma += offset; | |
276 | tpd_ring->desc = (u8 *) ring_header->desc + offset; | |
277 | tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count; | |
f3cc28c7 JC |
278 | |
279 | /* init RFD ring */ | |
280 | rfd_ring->dma = tpd_ring->dma + tpd_ring->size; | |
281 | offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0; | |
282 | rfd_ring->dma += offset; | |
283 | rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset); | |
284 | rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count; | |
2ca13da7 | 285 | |
f3cc28c7 JC |
286 | |
287 | /* init RRD ring */ | |
288 | rrd_ring->dma = rfd_ring->dma + rfd_ring->size; | |
289 | offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0; | |
290 | rrd_ring->dma += offset; | |
291 | rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset); | |
292 | rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count; | |
2ca13da7 | 293 | |
f3cc28c7 JC |
294 | |
295 | /* init CMB */ | |
296 | adapter->cmb.dma = rrd_ring->dma + rrd_ring->size; | |
297 | offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0; | |
298 | adapter->cmb.dma += offset; | |
53ffb42c JC |
299 | adapter->cmb.cmb = (struct coals_msg_block *) |
300 | ((u8 *) rrd_ring->desc + (rrd_ring->size + offset)); | |
f3cc28c7 JC |
301 | |
302 | /* init SMB */ | |
303 | adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block); | |
304 | offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0; | |
305 | adapter->smb.dma += offset; | |
306 | adapter->smb.smb = (struct stats_msg_block *) | |
53ffb42c JC |
307 | ((u8 *) adapter->cmb.cmb + |
308 | (sizeof(struct coals_msg_block) + offset)); | |
f3cc28c7 JC |
309 | |
310 | return ATL1_SUCCESS; | |
311 | ||
312 | err_nomem: | |
313 | kfree(tpd_ring->buffer_info); | |
314 | return -ENOMEM; | |
315 | } | |
316 | ||
3d2557f6 | 317 | static void atl1_init_ring_ptrs(struct atl1_adapter *adapter) |
f3cc28c7 | 318 | { |
2ca13da7 JC |
319 | struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring; |
320 | struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring; | |
321 | struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring; | |
f3cc28c7 | 322 | |
2ca13da7 JC |
323 | atomic_set(&tpd_ring->next_to_use, 0); |
324 | atomic_set(&tpd_ring->next_to_clean, 0); | |
f3cc28c7 | 325 | |
2ca13da7 JC |
326 | rfd_ring->next_to_clean = 0; |
327 | atomic_set(&rfd_ring->next_to_use, 0); | |
328 | ||
329 | rrd_ring->next_to_use = 0; | |
330 | atomic_set(&rrd_ring->next_to_clean, 0); | |
f3cc28c7 JC |
331 | } |
332 | ||
f3cc28c7 | 333 | /* |
05ffdd7b | 334 | * atl1_clean_rx_ring - Free RFD Buffers |
f3cc28c7 JC |
335 | * @adapter: board private structure |
336 | */ | |
05ffdd7b | 337 | static void atl1_clean_rx_ring(struct atl1_adapter *adapter) |
f3cc28c7 | 338 | { |
05ffdd7b JC |
339 | struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring; |
340 | struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring; | |
341 | struct atl1_buffer *buffer_info; | |
342 | struct pci_dev *pdev = adapter->pdev; | |
343 | unsigned long size; | |
344 | unsigned int i; | |
f3cc28c7 | 345 | |
05ffdd7b JC |
346 | /* Free all the Rx ring sk_buffs */ |
347 | for (i = 0; i < rfd_ring->count; i++) { | |
348 | buffer_info = &rfd_ring->buffer_info[i]; | |
349 | if (buffer_info->dma) { | |
350 | pci_unmap_page(pdev, buffer_info->dma, | |
351 | buffer_info->length, PCI_DMA_FROMDEVICE); | |
352 | buffer_info->dma = 0; | |
353 | } | |
354 | if (buffer_info->skb) { | |
355 | dev_kfree_skb(buffer_info->skb); | |
356 | buffer_info->skb = NULL; | |
357 | } | |
358 | } | |
f3cc28c7 | 359 | |
05ffdd7b JC |
360 | size = sizeof(struct atl1_buffer) * rfd_ring->count; |
361 | memset(rfd_ring->buffer_info, 0, size); | |
f3cc28c7 | 362 | |
05ffdd7b JC |
363 | /* Zero out the descriptor ring */ |
364 | memset(rfd_ring->desc, 0, rfd_ring->size); | |
f3cc28c7 | 365 | |
05ffdd7b JC |
366 | rfd_ring->next_to_clean = 0; |
367 | atomic_set(&rfd_ring->next_to_use, 0); | |
f3cc28c7 | 368 | |
05ffdd7b JC |
369 | rrd_ring->next_to_use = 0; |
370 | atomic_set(&rrd_ring->next_to_clean, 0); | |
f3cc28c7 JC |
371 | } |
372 | ||
05ffdd7b JC |
373 | /* |
374 | * atl1_clean_tx_ring - Free Tx Buffers | |
375 | * @adapter: board private structure | |
376 | */ | |
377 | static void atl1_clean_tx_ring(struct atl1_adapter *adapter) | |
f3cc28c7 | 378 | { |
05ffdd7b JC |
379 | struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring; |
380 | struct atl1_buffer *buffer_info; | |
53ffb42c | 381 | struct pci_dev *pdev = adapter->pdev; |
05ffdd7b JC |
382 | unsigned long size; |
383 | unsigned int i; | |
f3cc28c7 | 384 | |
05ffdd7b JC |
385 | /* Free all the Tx ring sk_buffs */ |
386 | for (i = 0; i < tpd_ring->count; i++) { | |
387 | buffer_info = &tpd_ring->buffer_info[i]; | |
388 | if (buffer_info->dma) { | |
389 | pci_unmap_page(pdev, buffer_info->dma, | |
390 | buffer_info->length, PCI_DMA_TODEVICE); | |
391 | buffer_info->dma = 0; | |
f3cc28c7 JC |
392 | } |
393 | } | |
394 | ||
05ffdd7b JC |
395 | for (i = 0; i < tpd_ring->count; i++) { |
396 | buffer_info = &tpd_ring->buffer_info[i]; | |
397 | if (buffer_info->skb) { | |
398 | dev_kfree_skb_any(buffer_info->skb); | |
399 | buffer_info->skb = NULL; | |
f3cc28c7 | 400 | } |
f3cc28c7 JC |
401 | } |
402 | ||
05ffdd7b JC |
403 | size = sizeof(struct atl1_buffer) * tpd_ring->count; |
404 | memset(tpd_ring->buffer_info, 0, size); | |
f3cc28c7 | 405 | |
05ffdd7b JC |
406 | /* Zero out the descriptor ring */ |
407 | memset(tpd_ring->desc, 0, tpd_ring->size); | |
f3cc28c7 | 408 | |
05ffdd7b JC |
409 | atomic_set(&tpd_ring->next_to_use, 0); |
410 | atomic_set(&tpd_ring->next_to_clean, 0); | |
f3cc28c7 JC |
411 | } |
412 | ||
413 | /* | |
05ffdd7b JC |
414 | * atl1_free_ring_resources - Free Tx / RX descriptor Resources |
415 | * @adapter: board private structure | |
416 | * | |
417 | * Free all transmit software resources | |
f3cc28c7 | 418 | */ |
05ffdd7b | 419 | void atl1_free_ring_resources(struct atl1_adapter *adapter) |
f3cc28c7 | 420 | { |
f3cc28c7 | 421 | struct pci_dev *pdev = adapter->pdev; |
05ffdd7b JC |
422 | struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring; |
423 | struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring; | |
424 | struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring; | |
425 | struct atl1_ring_header *ring_header = &adapter->ring_header; | |
f3cc28c7 | 426 | |
05ffdd7b JC |
427 | atl1_clean_tx_ring(adapter); |
428 | atl1_clean_rx_ring(adapter); | |
f3cc28c7 | 429 | |
05ffdd7b JC |
430 | kfree(tpd_ring->buffer_info); |
431 | pci_free_consistent(pdev, ring_header->size, ring_header->desc, | |
432 | ring_header->dma); | |
f3cc28c7 | 433 | |
05ffdd7b JC |
434 | tpd_ring->buffer_info = NULL; |
435 | tpd_ring->desc = NULL; | |
436 | tpd_ring->dma = 0; | |
f3cc28c7 | 437 | |
05ffdd7b JC |
438 | rfd_ring->buffer_info = NULL; |
439 | rfd_ring->desc = NULL; | |
440 | rfd_ring->dma = 0; | |
f3cc28c7 | 441 | |
05ffdd7b JC |
442 | rrd_ring->desc = NULL; |
443 | rrd_ring->dma = 0; | |
f3cc28c7 JC |
444 | } |
445 | ||
05ffdd7b | 446 | static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter) |
f3cc28c7 | 447 | { |
f3cc28c7 | 448 | u32 value; |
05ffdd7b JC |
449 | struct atl1_hw *hw = &adapter->hw; |
450 | struct net_device *netdev = adapter->netdev; | |
451 | /* Config MAC CTRL Register */ | |
452 | value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN; | |
453 | /* duplex */ | |
454 | if (FULL_DUPLEX == adapter->link_duplex) | |
455 | value |= MAC_CTRL_DUPLX; | |
456 | /* speed */ | |
457 | value |= ((u32) ((SPEED_1000 == adapter->link_speed) ? | |
458 | MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) << | |
459 | MAC_CTRL_SPEED_SHIFT); | |
460 | /* flow control */ | |
461 | value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW); | |
462 | /* PAD & CRC */ | |
463 | value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD); | |
464 | /* preamble length */ | |
465 | value |= (((u32) adapter->hw.preamble_len | |
466 | & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT); | |
467 | /* vlan */ | |
468 | if (adapter->vlgrp) | |
469 | value |= MAC_CTRL_RMV_VLAN; | |
470 | /* rx checksum | |
471 | if (adapter->rx_csum) | |
472 | value |= MAC_CTRL_RX_CHKSUM_EN; | |
473 | */ | |
474 | /* filter mode */ | |
475 | value |= MAC_CTRL_BC_EN; | |
476 | if (netdev->flags & IFF_PROMISC) | |
477 | value |= MAC_CTRL_PROMIS_EN; | |
478 | else if (netdev->flags & IFF_ALLMULTI) | |
479 | value |= MAC_CTRL_MC_ALL_EN; | |
480 | /* value |= MAC_CTRL_LOOPBACK; */ | |
481 | iowrite32(value, hw->hw_addr + REG_MAC_CTRL); | |
482 | } | |
f3cc28c7 | 483 | |
05ffdd7b JC |
484 | /* |
485 | * atl1_set_mac - Change the Ethernet Address of the NIC | |
486 | * @netdev: network interface device structure | |
487 | * @p: pointer to an address structure | |
488 | * | |
489 | * Returns 0 on success, negative on failure | |
490 | */ | |
491 | static int atl1_set_mac(struct net_device *netdev, void *p) | |
492 | { | |
493 | struct atl1_adapter *adapter = netdev_priv(netdev); | |
494 | struct sockaddr *addr = p; | |
f3cc28c7 | 495 | |
05ffdd7b JC |
496 | if (netif_running(netdev)) |
497 | return -EBUSY; | |
f3cc28c7 | 498 | |
05ffdd7b JC |
499 | if (!is_valid_ether_addr(addr->sa_data)) |
500 | return -EADDRNOTAVAIL; | |
f3cc28c7 | 501 | |
05ffdd7b JC |
502 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); |
503 | memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); | |
f3cc28c7 | 504 | |
05ffdd7b JC |
505 | atl1_set_mac_addr(&adapter->hw); |
506 | return 0; | |
507 | } | |
f3cc28c7 | 508 | |
05ffdd7b JC |
509 | static u32 atl1_check_link(struct atl1_adapter *adapter) |
510 | { | |
511 | struct atl1_hw *hw = &adapter->hw; | |
512 | struct net_device *netdev = adapter->netdev; | |
513 | u32 ret_val; | |
514 | u16 speed, duplex, phy_data; | |
515 | int reconfig = 0; | |
f3cc28c7 | 516 | |
05ffdd7b JC |
517 | /* MII_BMSR must read twice */ |
518 | atl1_read_phy_reg(hw, MII_BMSR, &phy_data); | |
519 | atl1_read_phy_reg(hw, MII_BMSR, &phy_data); | |
520 | if (!(phy_data & BMSR_LSTATUS)) { /* link down */ | |
521 | if (netif_carrier_ok(netdev)) { /* old link state: Up */ | |
522 | dev_info(&adapter->pdev->dev, "link is down\n"); | |
523 | adapter->link_speed = SPEED_0; | |
524 | netif_carrier_off(netdev); | |
525 | netif_stop_queue(netdev); | |
f3cc28c7 | 526 | } |
05ffdd7b | 527 | return ATL1_SUCCESS; |
f3cc28c7 JC |
528 | } |
529 | ||
05ffdd7b JC |
530 | /* Link Up */ |
531 | ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex); | |
532 | if (ret_val) | |
533 | return ret_val; | |
f3cc28c7 | 534 | |
05ffdd7b JC |
535 | switch (hw->media_type) { |
536 | case MEDIA_TYPE_1000M_FULL: | |
537 | if (speed != SPEED_1000 || duplex != FULL_DUPLEX) | |
538 | reconfig = 1; | |
539 | break; | |
540 | case MEDIA_TYPE_100M_FULL: | |
541 | if (speed != SPEED_100 || duplex != FULL_DUPLEX) | |
542 | reconfig = 1; | |
543 | break; | |
544 | case MEDIA_TYPE_100M_HALF: | |
545 | if (speed != SPEED_100 || duplex != HALF_DUPLEX) | |
546 | reconfig = 1; | |
547 | break; | |
548 | case MEDIA_TYPE_10M_FULL: | |
549 | if (speed != SPEED_10 || duplex != FULL_DUPLEX) | |
550 | reconfig = 1; | |
551 | break; | |
552 | case MEDIA_TYPE_10M_HALF: | |
553 | if (speed != SPEED_10 || duplex != HALF_DUPLEX) | |
554 | reconfig = 1; | |
555 | break; | |
556 | } | |
f3cc28c7 | 557 | |
05ffdd7b JC |
558 | /* link result is our setting */ |
559 | if (!reconfig) { | |
560 | if (adapter->link_speed != speed | |
561 | || adapter->link_duplex != duplex) { | |
562 | adapter->link_speed = speed; | |
563 | adapter->link_duplex = duplex; | |
564 | atl1_setup_mac_ctrl(adapter); | |
565 | dev_info(&adapter->pdev->dev, | |
566 | "%s link is up %d Mbps %s\n", | |
567 | netdev->name, adapter->link_speed, | |
568 | adapter->link_duplex == FULL_DUPLEX ? | |
569 | "full duplex" : "half duplex"); | |
570 | } | |
571 | if (!netif_carrier_ok(netdev)) { /* Link down -> Up */ | |
572 | netif_carrier_on(netdev); | |
573 | netif_wake_queue(netdev); | |
574 | } | |
575 | return ATL1_SUCCESS; | |
f3cc28c7 | 576 | } |
f3cc28c7 | 577 | |
05ffdd7b JC |
578 | /* change orignal link status */ |
579 | if (netif_carrier_ok(netdev)) { | |
580 | adapter->link_speed = SPEED_0; | |
581 | netif_carrier_off(netdev); | |
582 | netif_stop_queue(netdev); | |
f3cc28c7 | 583 | } |
f3cc28c7 | 584 | |
05ffdd7b JC |
585 | if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR && |
586 | hw->media_type != MEDIA_TYPE_1000M_FULL) { | |
587 | switch (hw->media_type) { | |
588 | case MEDIA_TYPE_100M_FULL: | |
589 | phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 | | |
590 | MII_CR_RESET; | |
591 | break; | |
592 | case MEDIA_TYPE_100M_HALF: | |
593 | phy_data = MII_CR_SPEED_100 | MII_CR_RESET; | |
594 | break; | |
595 | case MEDIA_TYPE_10M_FULL: | |
596 | phy_data = | |
597 | MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET; | |
598 | break; | |
599 | default: /* MEDIA_TYPE_10M_HALF: */ | |
600 | phy_data = MII_CR_SPEED_10 | MII_CR_RESET; | |
601 | break; | |
f3cc28c7 | 602 | } |
05ffdd7b JC |
603 | atl1_write_phy_reg(hw, MII_BMCR, phy_data); |
604 | return ATL1_SUCCESS; | |
f3cc28c7 | 605 | } |
f3cc28c7 | 606 | |
05ffdd7b JC |
607 | /* auto-neg, insert timer to re-config phy */ |
608 | if (!adapter->phy_timer_pending) { | |
609 | adapter->phy_timer_pending = true; | |
610 | mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ); | |
f3cc28c7 | 611 | } |
f3cc28c7 | 612 | |
05ffdd7b | 613 | return ATL1_SUCCESS; |
f3cc28c7 JC |
614 | } |
615 | ||
616 | static void atl1_check_for_link(struct atl1_adapter *adapter) | |
617 | { | |
618 | struct net_device *netdev = adapter->netdev; | |
619 | u16 phy_data = 0; | |
620 | ||
621 | spin_lock(&adapter->lock); | |
622 | adapter->phy_timer_pending = false; | |
623 | atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); | |
624 | atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); | |
625 | spin_unlock(&adapter->lock); | |
626 | ||
627 | /* notify upper layer link down ASAP */ | |
628 | if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */ | |
629 | if (netif_carrier_ok(netdev)) { /* old link state: Up */ | |
1e006364 JC |
630 | dev_info(&adapter->pdev->dev, "%s link is down\n", |
631 | netdev->name); | |
f3cc28c7 JC |
632 | adapter->link_speed = SPEED_0; |
633 | netif_carrier_off(netdev); | |
634 | netif_stop_queue(netdev); | |
635 | } | |
636 | } | |
637 | schedule_work(&adapter->link_chg_task); | |
638 | } | |
639 | ||
05ffdd7b JC |
640 | /* |
641 | * atl1_set_multi - Multicast and Promiscuous mode set | |
642 | * @netdev: network interface device structure | |
643 | * | |
644 | * The set_multi entry point is called whenever the multicast address | |
645 | * list or the network interface flags are updated. This routine is | |
646 | * responsible for configuring the hardware for proper multicast, | |
647 | * promiscuous mode, and all-multi behavior. | |
648 | */ | |
649 | static void atl1_set_multi(struct net_device *netdev) | |
2ca13da7 | 650 | { |
05ffdd7b JC |
651 | struct atl1_adapter *adapter = netdev_priv(netdev); |
652 | struct atl1_hw *hw = &adapter->hw; | |
653 | struct dev_mc_list *mc_ptr; | |
654 | u32 rctl; | |
655 | u32 hash_value; | |
2ca13da7 | 656 | |
05ffdd7b JC |
657 | /* Check for Promiscuous and All Multicast modes */ |
658 | rctl = ioread32(hw->hw_addr + REG_MAC_CTRL); | |
659 | if (netdev->flags & IFF_PROMISC) | |
660 | rctl |= MAC_CTRL_PROMIS_EN; | |
661 | else if (netdev->flags & IFF_ALLMULTI) { | |
662 | rctl |= MAC_CTRL_MC_ALL_EN; | |
663 | rctl &= ~MAC_CTRL_PROMIS_EN; | |
664 | } else | |
665 | rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); | |
666 | ||
667 | iowrite32(rctl, hw->hw_addr + REG_MAC_CTRL); | |
668 | ||
669 | /* clear the old settings from the multicast hash table */ | |
670 | iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE); | |
671 | iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2)); | |
672 | ||
673 | /* compute mc addresses' hash value ,and put it into hash table */ | |
674 | for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) { | |
675 | hash_value = atl1_hash_mc_addr(hw, mc_ptr->dmi_addr); | |
676 | atl1_hash_set(hw, hash_value); | |
677 | } | |
2ca13da7 JC |
678 | } |
679 | ||
05ffdd7b JC |
680 | /* |
681 | * atl1_change_mtu - Change the Maximum Transfer Unit | |
682 | * @netdev: network interface device structure | |
683 | * @new_mtu: new value for maximum frame size | |
684 | * | |
685 | * Returns 0 on success, negative on failure | |
686 | */ | |
687 | static int atl1_change_mtu(struct net_device *netdev, int new_mtu) | |
f3cc28c7 | 688 | { |
05ffdd7b JC |
689 | struct atl1_adapter *adapter = netdev_priv(netdev); |
690 | int old_mtu = netdev->mtu; | |
2a49128f | 691 | int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; |
f3cc28c7 | 692 | |
a3093d9b | 693 | if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) || |
05ffdd7b JC |
694 | (max_frame > MAX_JUMBO_FRAME_SIZE)) { |
695 | dev_warn(&adapter->pdev->dev, "invalid MTU setting\n"); | |
696 | return -EINVAL; | |
697 | } | |
f3cc28c7 | 698 | |
05ffdd7b JC |
699 | adapter->hw.max_frame_size = max_frame; |
700 | adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3; | |
701 | adapter->rx_buffer_len = (max_frame + 7) & ~7; | |
702 | adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8; | |
f3cc28c7 | 703 | |
05ffdd7b JC |
704 | netdev->mtu = new_mtu; |
705 | if ((old_mtu != new_mtu) && netif_running(netdev)) { | |
706 | atl1_down(adapter); | |
707 | atl1_up(adapter); | |
708 | } | |
f3cc28c7 | 709 | |
05ffdd7b JC |
710 | return 0; |
711 | } | |
f3cc28c7 | 712 | |
05ffdd7b JC |
713 | static void set_flow_ctrl_old(struct atl1_adapter *adapter) |
714 | { | |
715 | u32 hi, lo, value; | |
f3cc28c7 | 716 | |
05ffdd7b JC |
717 | /* RFD Flow Control */ |
718 | value = adapter->rfd_ring.count; | |
719 | hi = value / 16; | |
720 | if (hi < 2) | |
721 | hi = 2; | |
722 | lo = value * 7 / 8; | |
f3cc28c7 | 723 | |
05ffdd7b JC |
724 | value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) | |
725 | ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT); | |
726 | iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH); | |
f3cc28c7 | 727 | |
05ffdd7b JC |
728 | /* RRD Flow Control */ |
729 | value = adapter->rrd_ring.count; | |
730 | lo = value / 16; | |
731 | hi = value * 7 / 8; | |
732 | if (lo < 2) | |
733 | lo = 2; | |
734 | value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) | | |
735 | ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT); | |
736 | iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH); | |
737 | } | |
f3cc28c7 | 738 | |
05ffdd7b JC |
739 | static void set_flow_ctrl_new(struct atl1_hw *hw) |
740 | { | |
741 | u32 hi, lo, value; | |
742 | ||
743 | /* RXF Flow Control */ | |
744 | value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN); | |
745 | lo = value / 16; | |
746 | if (lo < 192) | |
747 | lo = 192; | |
748 | hi = value * 7 / 8; | |
749 | if (hi < lo) | |
750 | hi = lo + 16; | |
751 | value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) | | |
752 | ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT); | |
753 | iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH); | |
754 | ||
755 | /* RRD Flow Control */ | |
756 | value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN); | |
757 | lo = value / 8; | |
758 | hi = value * 7 / 8; | |
759 | if (lo < 2) | |
760 | lo = 2; | |
761 | if (hi < lo) | |
762 | hi = lo + 3; | |
763 | value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) | | |
764 | ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT); | |
765 | iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH); | |
766 | } | |
767 | ||
768 | /* | |
769 | * atl1_configure - Configure Transmit&Receive Unit after Reset | |
770 | * @adapter: board private structure | |
771 | * | |
772 | * Configure the Tx /Rx unit of the MAC after a reset. | |
773 | */ | |
774 | static u32 atl1_configure(struct atl1_adapter *adapter) | |
775 | { | |
776 | struct atl1_hw *hw = &adapter->hw; | |
777 | u32 value; | |
778 | ||
779 | /* clear interrupt status */ | |
780 | iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR); | |
781 | ||
782 | /* set MAC Address */ | |
783 | value = (((u32) hw->mac_addr[2]) << 24) | | |
784 | (((u32) hw->mac_addr[3]) << 16) | | |
785 | (((u32) hw->mac_addr[4]) << 8) | | |
786 | (((u32) hw->mac_addr[5])); | |
787 | iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR); | |
788 | value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1])); | |
789 | iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4)); | |
790 | ||
791 | /* tx / rx ring */ | |
f3cc28c7 | 792 | |
05ffdd7b JC |
793 | /* HI base address */ |
794 | iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32), | |
795 | hw->hw_addr + REG_DESC_BASE_ADDR_HI); | |
796 | /* LO base address */ | |
797 | iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL), | |
798 | hw->hw_addr + REG_DESC_RFD_ADDR_LO); | |
799 | iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL), | |
800 | hw->hw_addr + REG_DESC_RRD_ADDR_LO); | |
801 | iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL), | |
802 | hw->hw_addr + REG_DESC_TPD_ADDR_LO); | |
803 | iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL), | |
804 | hw->hw_addr + REG_DESC_CMB_ADDR_LO); | |
805 | iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL), | |
806 | hw->hw_addr + REG_DESC_SMB_ADDR_LO); | |
f3cc28c7 | 807 | |
05ffdd7b JC |
808 | /* element count */ |
809 | value = adapter->rrd_ring.count; | |
810 | value <<= 16; | |
811 | value += adapter->rfd_ring.count; | |
812 | iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE); | |
813 | iowrite32(adapter->tpd_ring.count, hw->hw_addr + | |
814 | REG_DESC_TPD_RING_SIZE); | |
f3cc28c7 | 815 | |
05ffdd7b JC |
816 | /* Load Ptr */ |
817 | iowrite32(1, hw->hw_addr + REG_LOAD_PTR); | |
f3cc28c7 | 818 | |
05ffdd7b JC |
819 | /* config Mailbox */ |
820 | value = ((atomic_read(&adapter->tpd_ring.next_to_use) | |
821 | & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) | | |
822 | ((atomic_read(&adapter->rrd_ring.next_to_clean) | |
823 | & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) | | |
824 | ((atomic_read(&adapter->rfd_ring.next_to_use) | |
825 | & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT); | |
826 | iowrite32(value, hw->hw_addr + REG_MAILBOX); | |
f3cc28c7 | 827 | |
05ffdd7b JC |
828 | /* config IPG/IFG */ |
829 | value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK) | |
830 | << MAC_IPG_IFG_IPGT_SHIFT) | | |
831 | (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK) | |
832 | << MAC_IPG_IFG_MIFG_SHIFT) | | |
833 | (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK) | |
834 | << MAC_IPG_IFG_IPGR1_SHIFT) | | |
835 | (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK) | |
836 | << MAC_IPG_IFG_IPGR2_SHIFT); | |
837 | iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG); | |
f3cc28c7 | 838 | |
05ffdd7b JC |
839 | /* config Half-Duplex Control */ |
840 | value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) | | |
841 | (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK) | |
842 | << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) | | |
843 | MAC_HALF_DUPLX_CTRL_EXC_DEF_EN | | |
844 | (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) | | |
845 | (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK) | |
846 | << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT); | |
847 | iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL); | |
f3cc28c7 | 848 | |
05ffdd7b JC |
849 | /* set Interrupt Moderator Timer */ |
850 | iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT); | |
851 | iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL); | |
f3cc28c7 | 852 | |
05ffdd7b JC |
853 | /* set Interrupt Clear Timer */ |
854 | iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER); | |
f3cc28c7 | 855 | |
2a49128f JC |
856 | /* set max frame size hw will accept */ |
857 | iowrite32(hw->max_frame_size, hw->hw_addr + REG_MTU); | |
f3cc28c7 | 858 | |
05ffdd7b JC |
859 | /* jumbo size & rrd retirement timer */ |
860 | value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) | |
861 | << RXQ_JMBOSZ_TH_SHIFT) | | |
862 | (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK) | |
863 | << RXQ_JMBO_LKAH_SHIFT) | | |
864 | (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK) | |
865 | << RXQ_RRD_TIMER_SHIFT); | |
866 | iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM); | |
f3cc28c7 | 867 | |
05ffdd7b JC |
868 | /* Flow Control */ |
869 | switch (hw->dev_rev) { | |
870 | case 0x8001: | |
871 | case 0x9001: | |
872 | case 0x9002: | |
873 | case 0x9003: | |
874 | set_flow_ctrl_old(adapter); | |
875 | break; | |
876 | default: | |
877 | set_flow_ctrl_new(hw); | |
878 | break; | |
f3cc28c7 | 879 | } |
f3cc28c7 | 880 | |
05ffdd7b JC |
881 | /* config TXQ */ |
882 | value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK) | |
883 | << TXQ_CTRL_TPD_BURST_NUM_SHIFT) | | |
884 | (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK) | |
885 | << TXQ_CTRL_TXF_BURST_NUM_SHIFT) | | |
886 | (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK) | |
887 | << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE | | |
888 | TXQ_CTRL_EN; | |
889 | iowrite32(value, hw->hw_addr + REG_TXQ_CTRL); | |
f3cc28c7 | 890 | |
05ffdd7b JC |
891 | /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */ |
892 | value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK) | |
893 | << TX_JUMBO_TASK_TH_SHIFT) | | |
894 | (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK) | |
895 | << TX_TPD_MIN_IPG_SHIFT); | |
896 | iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG); | |
f3cc28c7 | 897 | |
05ffdd7b JC |
898 | /* config RXQ */ |
899 | value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK) | |
900 | << RXQ_CTRL_RFD_BURST_NUM_SHIFT) | | |
901 | (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK) | |
902 | << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) | | |
903 | (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK) | |
904 | << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) | RXQ_CTRL_CUT_THRU_EN | | |
905 | RXQ_CTRL_EN; | |
906 | iowrite32(value, hw->hw_addr + REG_RXQ_CTRL); | |
f3cc28c7 | 907 | |
05ffdd7b JC |
908 | /* config DMA Engine */ |
909 | value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK) | |
910 | << DMA_CTRL_DMAR_BURST_LEN_SHIFT) | | |
3f516c00 JC |
911 | ((((u32) hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK) |
912 | << DMA_CTRL_DMAW_BURST_LEN_SHIFT) | DMA_CTRL_DMAR_EN | | |
05ffdd7b JC |
913 | DMA_CTRL_DMAW_EN; |
914 | value |= (u32) hw->dma_ord; | |
915 | if (atl1_rcb_128 == hw->rcb_value) | |
916 | value |= DMA_CTRL_RCB_VALUE; | |
917 | iowrite32(value, hw->hw_addr + REG_DMA_CTRL); | |
f3cc28c7 | 918 | |
05ffdd7b | 919 | /* config CMB / SMB */ |
91a500ac JC |
920 | value = (hw->cmb_tpd > adapter->tpd_ring.count) ? |
921 | hw->cmb_tpd : adapter->tpd_ring.count; | |
922 | value <<= 16; | |
923 | value |= hw->cmb_rrd; | |
05ffdd7b JC |
924 | iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH); |
925 | value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16); | |
926 | iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER); | |
927 | iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER); | |
f3cc28c7 | 928 | |
05ffdd7b JC |
929 | /* --- enable CMB / SMB */ |
930 | value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN; | |
931 | iowrite32(value, hw->hw_addr + REG_CSMB_CTRL); | |
f3cc28c7 | 932 | |
05ffdd7b JC |
933 | value = ioread32(adapter->hw.hw_addr + REG_ISR); |
934 | if (unlikely((value & ISR_PHY_LINKDOWN) != 0)) | |
935 | value = 1; /* config failed */ | |
936 | else | |
937 | value = 0; | |
f3cc28c7 | 938 | |
05ffdd7b JC |
939 | /* clear all interrupt status */ |
940 | iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR); | |
941 | iowrite32(0, adapter->hw.hw_addr + REG_ISR); | |
942 | return value; | |
f3cc28c7 | 943 | } |
f3cc28c7 | 944 | |
05ffdd7b JC |
945 | /* |
946 | * atl1_pcie_patch - Patch for PCIE module | |
947 | */ | |
948 | static void atl1_pcie_patch(struct atl1_adapter *adapter) | |
f3cc28c7 | 949 | { |
05ffdd7b | 950 | u32 value; |
f3cc28c7 | 951 | |
05ffdd7b JC |
952 | /* much vendor magic here */ |
953 | value = 0x6500; | |
954 | iowrite32(value, adapter->hw.hw_addr + 0x12FC); | |
955 | /* pcie flow control mode change */ | |
956 | value = ioread32(adapter->hw.hw_addr + 0x1008); | |
957 | value |= 0x8000; | |
958 | iowrite32(value, adapter->hw.hw_addr + 0x1008); | |
f3cc28c7 | 959 | } |
f3cc28c7 | 960 | |
f3cc28c7 | 961 | /* |
05ffdd7b JC |
962 | * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400 |
963 | * on PCI Command register is disable. | |
964 | * The function enable this bit. | |
965 | * Brackett, 2006/03/15 | |
f3cc28c7 | 966 | */ |
05ffdd7b | 967 | static void atl1_via_workaround(struct atl1_adapter *adapter) |
f3cc28c7 | 968 | { |
05ffdd7b | 969 | unsigned long value; |
f3cc28c7 | 970 | |
05ffdd7b JC |
971 | value = ioread16(adapter->hw.hw_addr + PCI_COMMAND); |
972 | if (value & PCI_COMMAND_INTX_DISABLE) | |
973 | value &= ~PCI_COMMAND_INTX_DISABLE; | |
974 | iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND); | |
f3cc28c7 JC |
975 | } |
976 | ||
977 | /* | |
05ffdd7b JC |
978 | * atl1_irq_enable - Enable default interrupt generation settings |
979 | * @adapter: board private structure | |
f3cc28c7 | 980 | */ |
05ffdd7b | 981 | static void atl1_irq_enable(struct atl1_adapter *adapter) |
f3cc28c7 | 982 | { |
05ffdd7b JC |
983 | iowrite32(IMR_NORMAL_MASK, adapter->hw.hw_addr + REG_IMR); |
984 | ioread32(adapter->hw.hw_addr + REG_IMR); | |
985 | } | |
f3cc28c7 | 986 | |
05ffdd7b JC |
987 | /* |
988 | * atl1_irq_disable - Mask off interrupt generation on the NIC | |
989 | * @adapter: board private structure | |
990 | */ | |
991 | static void atl1_irq_disable(struct atl1_adapter *adapter) | |
992 | { | |
993 | iowrite32(0, adapter->hw.hw_addr + REG_IMR); | |
994 | ioread32(adapter->hw.hw_addr + REG_IMR); | |
995 | synchronize_irq(adapter->pdev->irq); | |
996 | } | |
f3cc28c7 | 997 | |
05ffdd7b JC |
998 | static void atl1_clear_phy_int(struct atl1_adapter *adapter) |
999 | { | |
1000 | u16 phy_data; | |
1001 | unsigned long flags; | |
f3cc28c7 | 1002 | |
05ffdd7b JC |
1003 | spin_lock_irqsave(&adapter->lock, flags); |
1004 | atl1_read_phy_reg(&adapter->hw, 19, &phy_data); | |
1005 | spin_unlock_irqrestore(&adapter->lock, flags); | |
1006 | } | |
f3cc28c7 | 1007 | |
05ffdd7b JC |
1008 | static void atl1_inc_smb(struct atl1_adapter *adapter) |
1009 | { | |
1010 | struct stats_msg_block *smb = adapter->smb.smb; | |
f3cc28c7 | 1011 | |
05ffdd7b JC |
1012 | /* Fill out the OS statistics structure */ |
1013 | adapter->soft_stats.rx_packets += smb->rx_ok; | |
1014 | adapter->soft_stats.tx_packets += smb->tx_ok; | |
1015 | adapter->soft_stats.rx_bytes += smb->rx_byte_cnt; | |
1016 | adapter->soft_stats.tx_bytes += smb->tx_byte_cnt; | |
1017 | adapter->soft_stats.multicast += smb->rx_mcast; | |
1018 | adapter->soft_stats.collisions += (smb->tx_1_col + smb->tx_2_col * 2 + | |
1019 | smb->tx_late_col + smb->tx_abort_col * adapter->hw.max_retry); | |
f3cc28c7 | 1020 | |
05ffdd7b JC |
1021 | /* Rx Errors */ |
1022 | adapter->soft_stats.rx_errors += (smb->rx_frag + smb->rx_fcs_err + | |
1023 | smb->rx_len_err + smb->rx_sz_ov + smb->rx_rxf_ov + | |
1024 | smb->rx_rrd_ov + smb->rx_align_err); | |
1025 | adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov; | |
1026 | adapter->soft_stats.rx_length_errors += smb->rx_len_err; | |
1027 | adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err; | |
1028 | adapter->soft_stats.rx_frame_errors += smb->rx_align_err; | |
1029 | adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov + | |
1030 | smb->rx_rxf_ov); | |
f3cc28c7 | 1031 | |
05ffdd7b JC |
1032 | adapter->soft_stats.rx_pause += smb->rx_pause; |
1033 | adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov; | |
1034 | adapter->soft_stats.rx_trunc += smb->rx_sz_ov; | |
f3cc28c7 | 1035 | |
05ffdd7b JC |
1036 | /* Tx Errors */ |
1037 | adapter->soft_stats.tx_errors += (smb->tx_late_col + | |
1038 | smb->tx_abort_col + smb->tx_underrun + smb->tx_trunc); | |
1039 | adapter->soft_stats.tx_fifo_errors += smb->tx_underrun; | |
1040 | adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col; | |
1041 | adapter->soft_stats.tx_window_errors += smb->tx_late_col; | |
f3cc28c7 | 1042 | |
05ffdd7b JC |
1043 | adapter->soft_stats.excecol += smb->tx_abort_col; |
1044 | adapter->soft_stats.deffer += smb->tx_defer; | |
1045 | adapter->soft_stats.scc += smb->tx_1_col; | |
1046 | adapter->soft_stats.mcc += smb->tx_2_col; | |
1047 | adapter->soft_stats.latecol += smb->tx_late_col; | |
1048 | adapter->soft_stats.tx_underun += smb->tx_underrun; | |
1049 | adapter->soft_stats.tx_trunc += smb->tx_trunc; | |
1050 | adapter->soft_stats.tx_pause += smb->tx_pause; | |
f3cc28c7 | 1051 | |
05ffdd7b JC |
1052 | adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets; |
1053 | adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets; | |
1054 | adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes; | |
1055 | adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes; | |
1056 | adapter->net_stats.multicast = adapter->soft_stats.multicast; | |
1057 | adapter->net_stats.collisions = adapter->soft_stats.collisions; | |
1058 | adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors; | |
1059 | adapter->net_stats.rx_over_errors = | |
1060 | adapter->soft_stats.rx_missed_errors; | |
1061 | adapter->net_stats.rx_length_errors = | |
1062 | adapter->soft_stats.rx_length_errors; | |
1063 | adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors; | |
1064 | adapter->net_stats.rx_frame_errors = | |
1065 | adapter->soft_stats.rx_frame_errors; | |
1066 | adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors; | |
1067 | adapter->net_stats.rx_missed_errors = | |
1068 | adapter->soft_stats.rx_missed_errors; | |
1069 | adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors; | |
1070 | adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors; | |
1071 | adapter->net_stats.tx_aborted_errors = | |
1072 | adapter->soft_stats.tx_aborted_errors; | |
1073 | adapter->net_stats.tx_window_errors = | |
1074 | adapter->soft_stats.tx_window_errors; | |
1075 | adapter->net_stats.tx_carrier_errors = | |
1076 | adapter->soft_stats.tx_carrier_errors; | |
f3cc28c7 JC |
1077 | } |
1078 | ||
f3cc28c7 | 1079 | /* |
05ffdd7b | 1080 | * atl1_get_stats - Get System Network Statistics |
f3cc28c7 JC |
1081 | * @netdev: network interface device structure |
1082 | * | |
05ffdd7b JC |
1083 | * Returns the address of the device statistics structure. |
1084 | * The statistics are actually updated from the timer callback. | |
f3cc28c7 | 1085 | */ |
05ffdd7b | 1086 | static struct net_device_stats *atl1_get_stats(struct net_device *netdev) |
f3cc28c7 JC |
1087 | { |
1088 | struct atl1_adapter *adapter = netdev_priv(netdev); | |
05ffdd7b JC |
1089 | return &adapter->net_stats; |
1090 | } | |
f3cc28c7 | 1091 | |
05ffdd7b | 1092 | static void atl1_update_mailbox(struct atl1_adapter *adapter) |
f3cc28c7 | 1093 | { |
05ffdd7b JC |
1094 | unsigned long flags; |
1095 | u32 tpd_next_to_use; | |
1096 | u32 rfd_next_to_use; | |
1097 | u32 rrd_next_to_clean; | |
f3cc28c7 | 1098 | u32 value; |
f3cc28c7 | 1099 | |
05ffdd7b | 1100 | spin_lock_irqsave(&adapter->mb_lock, flags); |
f3cc28c7 | 1101 | |
05ffdd7b JC |
1102 | tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use); |
1103 | rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use); | |
1104 | rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean); | |
f3cc28c7 | 1105 | |
05ffdd7b JC |
1106 | value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) << |
1107 | MB_RFD_PROD_INDX_SHIFT) | | |
1108 | ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) << | |
1109 | MB_RRD_CONS_INDX_SHIFT) | | |
1110 | ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) << | |
1111 | MB_TPD_PROD_INDX_SHIFT); | |
1112 | iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX); | |
f3cc28c7 | 1113 | |
05ffdd7b | 1114 | spin_unlock_irqrestore(&adapter->mb_lock, flags); |
f3cc28c7 JC |
1115 | } |
1116 | ||
05ffdd7b JC |
1117 | static void atl1_clean_alloc_flag(struct atl1_adapter *adapter, |
1118 | struct rx_return_desc *rrd, u16 offset) | |
f3cc28c7 | 1119 | { |
05ffdd7b | 1120 | struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring; |
f3cc28c7 | 1121 | |
05ffdd7b JC |
1122 | while (rfd_ring->next_to_clean != (rrd->buf_indx + offset)) { |
1123 | rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced = 0; | |
1124 | if (++rfd_ring->next_to_clean == rfd_ring->count) { | |
1125 | rfd_ring->next_to_clean = 0; | |
f3cc28c7 | 1126 | } |
f3cc28c7 | 1127 | } |
05ffdd7b | 1128 | } |
f3cc28c7 | 1129 | |
05ffdd7b JC |
1130 | static void atl1_update_rfd_index(struct atl1_adapter *adapter, |
1131 | struct rx_return_desc *rrd) | |
1132 | { | |
1133 | u16 num_buf; | |
f3cc28c7 | 1134 | |
05ffdd7b JC |
1135 | num_buf = (rrd->xsz.xsum_sz.pkt_size + adapter->rx_buffer_len - 1) / |
1136 | adapter->rx_buffer_len; | |
1137 | if (rrd->num_buf == num_buf) | |
1138 | /* clean alloc flag for bad rrd */ | |
1139 | atl1_clean_alloc_flag(adapter, rrd, num_buf); | |
1140 | } | |
f3cc28c7 | 1141 | |
05ffdd7b JC |
1142 | static void atl1_rx_checksum(struct atl1_adapter *adapter, |
1143 | struct rx_return_desc *rrd, struct sk_buff *skb) | |
1144 | { | |
1145 | struct pci_dev *pdev = adapter->pdev; | |
f3cc28c7 | 1146 | |
05ffdd7b | 1147 | skb->ip_summed = CHECKSUM_NONE; |
f3cc28c7 | 1148 | |
05ffdd7b JC |
1149 | if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) { |
1150 | if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC | | |
1151 | ERR_FLAG_CODE | ERR_FLAG_OV)) { | |
1152 | adapter->hw_csum_err++; | |
1153 | dev_printk(KERN_DEBUG, &pdev->dev, | |
1154 | "rx checksum error\n"); | |
1155 | return; | |
f3cc28c7 | 1156 | } |
f3cc28c7 JC |
1157 | } |
1158 | ||
05ffdd7b JC |
1159 | /* not IPv4 */ |
1160 | if (!(rrd->pkt_flg & PACKET_FLAG_IPV4)) | |
1161 | /* checksum is invalid, but it's not an IPv4 pkt, so ok */ | |
1162 | return; | |
1163 | ||
1164 | /* IPv4 packet */ | |
1165 | if (likely(!(rrd->err_flg & | |
1166 | (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) { | |
1167 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
1168 | adapter->hw_csum_good++; | |
1169 | return; | |
f3cc28c7 JC |
1170 | } |
1171 | ||
05ffdd7b JC |
1172 | /* IPv4, but hardware thinks its checksum is wrong */ |
1173 | dev_printk(KERN_DEBUG, &pdev->dev, | |
1174 | "hw csum wrong, pkt_flag:%x, err_flag:%x\n", | |
1175 | rrd->pkt_flg, rrd->err_flg); | |
1176 | skb->ip_summed = CHECKSUM_COMPLETE; | |
1177 | skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum); | |
1178 | adapter->hw_csum_err++; | |
1179 | return; | |
f3cc28c7 JC |
1180 | } |
1181 | ||
05ffdd7b JC |
1182 | /* |
1183 | * atl1_alloc_rx_buffers - Replace used receive buffers | |
1184 | * @adapter: address of board private structure | |
1185 | */ | |
1186 | static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter) | |
f3cc28c7 | 1187 | { |
05ffdd7b JC |
1188 | struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring; |
1189 | struct pci_dev *pdev = adapter->pdev; | |
1190 | struct page *page; | |
1191 | unsigned long offset; | |
1192 | struct atl1_buffer *buffer_info, *next_info; | |
1193 | struct sk_buff *skb; | |
1194 | u16 num_alloc = 0; | |
1195 | u16 rfd_next_to_use, next_next; | |
1196 | struct rx_free_desc *rfd_desc; | |
f3cc28c7 | 1197 | |
05ffdd7b JC |
1198 | next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use); |
1199 | if (++next_next == rfd_ring->count) | |
1200 | next_next = 0; | |
1201 | buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; | |
1202 | next_info = &rfd_ring->buffer_info[next_next]; | |
f3cc28c7 | 1203 | |
05ffdd7b JC |
1204 | while (!buffer_info->alloced && !next_info->alloced) { |
1205 | if (buffer_info->skb) { | |
1206 | buffer_info->alloced = 1; | |
1207 | goto next; | |
1208 | } | |
f3cc28c7 | 1209 | |
05ffdd7b | 1210 | rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use); |
f3cc28c7 | 1211 | |
05ffdd7b JC |
1212 | skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN); |
1213 | if (unlikely(!skb)) { /* Better luck next round */ | |
1214 | adapter->net_stats.rx_dropped++; | |
1215 | break; | |
1216 | } | |
f3cc28c7 | 1217 | |
05ffdd7b JC |
1218 | /* |
1219 | * Make buffer alignment 2 beyond a 16 byte boundary | |
1220 | * this will result in a 16 byte aligned IP header after | |
1221 | * the 14 byte MAC header is removed | |
1222 | */ | |
1223 | skb_reserve(skb, NET_IP_ALIGN); | |
f3cc28c7 | 1224 | |
05ffdd7b JC |
1225 | buffer_info->alloced = 1; |
1226 | buffer_info->skb = skb; | |
1227 | buffer_info->length = (u16) adapter->rx_buffer_len; | |
1228 | page = virt_to_page(skb->data); | |
1229 | offset = (unsigned long)skb->data & ~PAGE_MASK; | |
1230 | buffer_info->dma = pci_map_page(pdev, page, offset, | |
1231 | adapter->rx_buffer_len, | |
1232 | PCI_DMA_FROMDEVICE); | |
1233 | rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
1234 | rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len); | |
1235 | rfd_desc->coalese = 0; | |
f3cc28c7 | 1236 | |
05ffdd7b JC |
1237 | next: |
1238 | rfd_next_to_use = next_next; | |
1239 | if (unlikely(++next_next == rfd_ring->count)) | |
1240 | next_next = 0; | |
f3cc28c7 | 1241 | |
05ffdd7b JC |
1242 | buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; |
1243 | next_info = &rfd_ring->buffer_info[next_next]; | |
1244 | num_alloc++; | |
1245 | } | |
f3cc28c7 | 1246 | |
05ffdd7b JC |
1247 | if (num_alloc) { |
1248 | /* | |
1249 | * Force memory writes to complete before letting h/w | |
1250 | * know there are new descriptors to fetch. (Only | |
1251 | * applicable for weak-ordered memory model archs, | |
1252 | * such as IA-64). | |
1253 | */ | |
1254 | wmb(); | |
1255 | atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use); | |
1256 | } | |
1257 | return num_alloc; | |
f3cc28c7 JC |
1258 | } |
1259 | ||
05ffdd7b | 1260 | static void atl1_intr_rx(struct atl1_adapter *adapter) |
f3cc28c7 | 1261 | { |
05ffdd7b JC |
1262 | int i, count; |
1263 | u16 length; | |
1264 | u16 rrd_next_to_clean; | |
f3cc28c7 | 1265 | u32 value; |
05ffdd7b JC |
1266 | struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring; |
1267 | struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring; | |
1268 | struct atl1_buffer *buffer_info; | |
1269 | struct rx_return_desc *rrd; | |
1270 | struct sk_buff *skb; | |
f3cc28c7 | 1271 | |
05ffdd7b | 1272 | count = 0; |
f3cc28c7 | 1273 | |
05ffdd7b | 1274 | rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean); |
f3cc28c7 | 1275 | |
05ffdd7b JC |
1276 | while (1) { |
1277 | rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean); | |
1278 | i = 1; | |
1279 | if (likely(rrd->xsz.valid)) { /* packet valid */ | |
1280 | chk_rrd: | |
1281 | /* check rrd status */ | |
1282 | if (likely(rrd->num_buf == 1)) | |
1283 | goto rrd_ok; | |
f3cc28c7 | 1284 | |
05ffdd7b JC |
1285 | /* rrd seems to be bad */ |
1286 | if (unlikely(i-- > 0)) { | |
1287 | /* rrd may not be DMAed completely */ | |
1288 | dev_printk(KERN_DEBUG, &adapter->pdev->dev, | |
1289 | "incomplete RRD DMA transfer\n"); | |
1290 | udelay(1); | |
1291 | goto chk_rrd; | |
1292 | } | |
1293 | /* bad rrd */ | |
1294 | dev_printk(KERN_DEBUG, &adapter->pdev->dev, | |
1295 | "bad RRD\n"); | |
1296 | /* see if update RFD index */ | |
1297 | if (rrd->num_buf > 1) | |
1298 | atl1_update_rfd_index(adapter, rrd); | |
f3cc28c7 | 1299 | |
05ffdd7b JC |
1300 | /* update rrd */ |
1301 | rrd->xsz.valid = 0; | |
1302 | if (++rrd_next_to_clean == rrd_ring->count) | |
1303 | rrd_next_to_clean = 0; | |
1304 | count++; | |
1305 | continue; | |
1306 | } else { /* current rrd still not be updated */ | |
f3cc28c7 | 1307 | |
05ffdd7b JC |
1308 | break; |
1309 | } | |
1310 | rrd_ok: | |
1311 | /* clean alloc flag for bad rrd */ | |
1312 | atl1_clean_alloc_flag(adapter, rrd, 0); | |
f3cc28c7 | 1313 | |
05ffdd7b JC |
1314 | buffer_info = &rfd_ring->buffer_info[rrd->buf_indx]; |
1315 | if (++rfd_ring->next_to_clean == rfd_ring->count) | |
1316 | rfd_ring->next_to_clean = 0; | |
f3cc28c7 | 1317 | |
05ffdd7b JC |
1318 | /* update rrd next to clean */ |
1319 | if (++rrd_next_to_clean == rrd_ring->count) | |
1320 | rrd_next_to_clean = 0; | |
1321 | count++; | |
f3cc28c7 | 1322 | |
05ffdd7b JC |
1323 | if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) { |
1324 | if (!(rrd->err_flg & | |
1325 | (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM | |
1326 | | ERR_FLAG_LEN))) { | |
1327 | /* packet error, don't need upstream */ | |
1328 | buffer_info->alloced = 0; | |
1329 | rrd->xsz.valid = 0; | |
1330 | continue; | |
1331 | } | |
1332 | } | |
f3cc28c7 | 1333 | |
05ffdd7b JC |
1334 | /* Good Receive */ |
1335 | pci_unmap_page(adapter->pdev, buffer_info->dma, | |
1336 | buffer_info->length, PCI_DMA_FROMDEVICE); | |
1337 | skb = buffer_info->skb; | |
1338 | length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size); | |
f3cc28c7 | 1339 | |
a3093d9b | 1340 | skb_put(skb, length - ETH_FCS_LEN); |
f3cc28c7 | 1341 | |
05ffdd7b JC |
1342 | /* Receive Checksum Offload */ |
1343 | atl1_rx_checksum(adapter, rrd, skb); | |
1344 | skb->protocol = eth_type_trans(skb, adapter->netdev); | |
f3cc28c7 | 1345 | |
05ffdd7b JC |
1346 | if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) { |
1347 | u16 vlan_tag = (rrd->vlan_tag >> 4) | | |
1348 | ((rrd->vlan_tag & 7) << 13) | | |
1349 | ((rrd->vlan_tag & 8) << 9); | |
1350 | vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag); | |
1351 | } else | |
1352 | netif_rx(skb); | |
f3cc28c7 | 1353 | |
05ffdd7b JC |
1354 | /* let protocol layer free skb */ |
1355 | buffer_info->skb = NULL; | |
1356 | buffer_info->alloced = 0; | |
1357 | rrd->xsz.valid = 0; | |
f3cc28c7 | 1358 | |
05ffdd7b JC |
1359 | adapter->netdev->last_rx = jiffies; |
1360 | } | |
f3cc28c7 | 1361 | |
05ffdd7b | 1362 | atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean); |
f3cc28c7 | 1363 | |
05ffdd7b | 1364 | atl1_alloc_rx_buffers(adapter); |
f3cc28c7 | 1365 | |
05ffdd7b JC |
1366 | /* update mailbox ? */ |
1367 | if (count) { | |
1368 | u32 tpd_next_to_use; | |
1369 | u32 rfd_next_to_use; | |
f3cc28c7 | 1370 | |
05ffdd7b | 1371 | spin_lock(&adapter->mb_lock); |
f3cc28c7 | 1372 | |
05ffdd7b JC |
1373 | tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use); |
1374 | rfd_next_to_use = | |
1375 | atomic_read(&adapter->rfd_ring.next_to_use); | |
1376 | rrd_next_to_clean = | |
1377 | atomic_read(&adapter->rrd_ring.next_to_clean); | |
1378 | value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) << | |
1379 | MB_RFD_PROD_INDX_SHIFT) | | |
1380 | ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) << | |
1381 | MB_RRD_CONS_INDX_SHIFT) | | |
1382 | ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) << | |
1383 | MB_TPD_PROD_INDX_SHIFT); | |
1384 | iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX); | |
1385 | spin_unlock(&adapter->mb_lock); | |
1386 | } | |
f3cc28c7 JC |
1387 | } |
1388 | ||
05ffdd7b | 1389 | static void atl1_intr_tx(struct atl1_adapter *adapter) |
f3cc28c7 | 1390 | { |
05ffdd7b JC |
1391 | struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring; |
1392 | struct atl1_buffer *buffer_info; | |
1393 | u16 sw_tpd_next_to_clean; | |
1394 | u16 cmb_tpd_next_to_clean; | |
f3cc28c7 | 1395 | |
05ffdd7b JC |
1396 | sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean); |
1397 | cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx); | |
f3cc28c7 | 1398 | |
05ffdd7b JC |
1399 | while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) { |
1400 | struct tx_packet_desc *tpd; | |
f3cc28c7 | 1401 | |
05ffdd7b JC |
1402 | tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean); |
1403 | buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean]; | |
1404 | if (buffer_info->dma) { | |
1405 | pci_unmap_page(adapter->pdev, buffer_info->dma, | |
1406 | buffer_info->length, PCI_DMA_TODEVICE); | |
1407 | buffer_info->dma = 0; | |
1408 | } | |
f3cc28c7 | 1409 | |
05ffdd7b JC |
1410 | if (buffer_info->skb) { |
1411 | dev_kfree_skb_irq(buffer_info->skb); | |
1412 | buffer_info->skb = NULL; | |
1413 | } | |
1414 | tpd->buffer_addr = 0; | |
1415 | tpd->desc.data = 0; | |
f3cc28c7 | 1416 | |
05ffdd7b JC |
1417 | if (++sw_tpd_next_to_clean == tpd_ring->count) |
1418 | sw_tpd_next_to_clean = 0; | |
1419 | } | |
1420 | atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean); | |
1421 | ||
1422 | if (netif_queue_stopped(adapter->netdev) | |
1423 | && netif_carrier_ok(adapter->netdev)) | |
1424 | netif_wake_queue(adapter->netdev); | |
f3cc28c7 JC |
1425 | } |
1426 | ||
e6a7ff4a | 1427 | static u16 atl1_tpd_avail(struct atl1_tpd_ring *tpd_ring) |
f3cc28c7 JC |
1428 | { |
1429 | u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean); | |
1430 | u16 next_to_use = atomic_read(&tpd_ring->next_to_use); | |
53ffb42c JC |
1431 | return ((next_to_clean > next_to_use) ? |
1432 | next_to_clean - next_to_use - 1 : | |
1433 | tpd_ring->count + next_to_clean - next_to_use - 1); | |
f3cc28c7 JC |
1434 | } |
1435 | ||
1436 | static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb, | |
1437 | struct tso_param *tso) | |
1438 | { | |
1439 | /* We enter this function holding a spinlock. */ | |
1440 | u8 ipofst; | |
1441 | int err; | |
1442 | ||
1443 | if (skb_shinfo(skb)->gso_size) { | |
1444 | if (skb_header_cloned(skb)) { | |
1445 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); | |
1446 | if (unlikely(err)) | |
1447 | return err; | |
1448 | } | |
1449 | ||
1450 | if (skb->protocol == ntohs(ETH_P_IP)) { | |
eddc9ec5 ACM |
1451 | struct iphdr *iph = ip_hdr(skb); |
1452 | ||
1453 | iph->tot_len = 0; | |
1454 | iph->check = 0; | |
aa8223c7 | 1455 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, |
2ca13da7 | 1456 | iph->daddr, 0, IPPROTO_TCP, 0); |
bbe735e4 | 1457 | ipofst = skb_network_offset(skb); |
a3093d9b | 1458 | if (ipofst != ETH_HLEN) /* 802.3 frame */ |
f3cc28c7 JC |
1459 | tso->tsopl |= 1 << TSO_PARAM_ETHTYPE_SHIFT; |
1460 | ||
eddc9ec5 | 1461 | tso->tsopl |= (iph->ihl & |
f3cc28c7 | 1462 | CSUM_PARAM_IPHL_MASK) << CSUM_PARAM_IPHL_SHIFT; |
ab6a5bb6 | 1463 | tso->tsopl |= (tcp_hdrlen(skb) & |
53ffb42c JC |
1464 | TSO_PARAM_TCPHDRLEN_MASK) << |
1465 | TSO_PARAM_TCPHDRLEN_SHIFT; | |
f3cc28c7 JC |
1466 | tso->tsopl |= (skb_shinfo(skb)->gso_size & |
1467 | TSO_PARAM_MSS_MASK) << TSO_PARAM_MSS_SHIFT; | |
1468 | tso->tsopl |= 1 << TSO_PARAM_IPCKSUM_SHIFT; | |
1469 | tso->tsopl |= 1 << TSO_PARAM_TCPCKSUM_SHIFT; | |
1470 | tso->tsopl |= 1 << TSO_PARAM_SEGMENT_SHIFT; | |
1471 | return true; | |
1472 | } | |
1473 | } | |
1474 | return false; | |
1475 | } | |
1476 | ||
1477 | static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb, | |
53ffb42c | 1478 | struct csum_param *csum) |
f3cc28c7 JC |
1479 | { |
1480 | u8 css, cso; | |
1481 | ||
1482 | if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { | |
ea2ae17d | 1483 | cso = skb_transport_offset(skb); |
628592cc | 1484 | css = cso + skb->csum_offset; |
f3cc28c7 | 1485 | if (unlikely(cso & 0x1)) { |
53ffb42c | 1486 | dev_printk(KERN_DEBUG, &adapter->pdev->dev, |
1e006364 | 1487 | "payload offset not an even number\n"); |
f3cc28c7 JC |
1488 | return -1; |
1489 | } | |
1490 | csum->csumpl |= (cso & CSUM_PARAM_PLOADOFFSET_MASK) << | |
1491 | CSUM_PARAM_PLOADOFFSET_SHIFT; | |
1492 | csum->csumpl |= (css & CSUM_PARAM_XSUMOFFSET_MASK) << | |
1493 | CSUM_PARAM_XSUMOFFSET_SHIFT; | |
1494 | csum->csumpl |= 1 << CSUM_PARAM_CUSTOMCKSUM_SHIFT; | |
1495 | return true; | |
1496 | } | |
1497 | ||
1498 | return true; | |
1499 | } | |
1500 | ||
53ffb42c JC |
1501 | static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb, |
1502 | bool tcp_seg) | |
f3cc28c7 JC |
1503 | { |
1504 | /* We enter this function holding a spinlock. */ | |
1505 | struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring; | |
1506 | struct atl1_buffer *buffer_info; | |
1507 | struct page *page; | |
1508 | int first_buf_len = skb->len; | |
1509 | unsigned long offset; | |
1510 | unsigned int nr_frags; | |
1511 | unsigned int f; | |
1512 | u16 tpd_next_to_use; | |
1513 | u16 proto_hdr_len; | |
ddfce6bb | 1514 | u16 len12; |
f3cc28c7 JC |
1515 | |
1516 | first_buf_len -= skb->data_len; | |
1517 | nr_frags = skb_shinfo(skb)->nr_frags; | |
1518 | tpd_next_to_use = atomic_read(&tpd_ring->next_to_use); | |
1519 | buffer_info = &tpd_ring->buffer_info[tpd_next_to_use]; | |
1520 | if (unlikely(buffer_info->skb)) | |
1521 | BUG(); | |
1522 | buffer_info->skb = NULL; /* put skb in last TPD */ | |
1523 | ||
1524 | if (tcp_seg) { | |
1525 | /* TSO/GSO */ | |
ab6a5bb6 | 1526 | proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); |
f3cc28c7 JC |
1527 | buffer_info->length = proto_hdr_len; |
1528 | page = virt_to_page(skb->data); | |
1529 | offset = (unsigned long)skb->data & ~PAGE_MASK; | |
1530 | buffer_info->dma = pci_map_page(adapter->pdev, page, | |
1531 | offset, proto_hdr_len, | |
1532 | PCI_DMA_TODEVICE); | |
1533 | ||
1534 | if (++tpd_next_to_use == tpd_ring->count) | |
1535 | tpd_next_to_use = 0; | |
1536 | ||
1537 | if (first_buf_len > proto_hdr_len) { | |
ddfce6bb SH |
1538 | int i, m; |
1539 | ||
f3cc28c7 | 1540 | len12 = first_buf_len - proto_hdr_len; |
53ffb42c JC |
1541 | m = (len12 + ATL1_MAX_TX_BUF_LEN - 1) / |
1542 | ATL1_MAX_TX_BUF_LEN; | |
f3cc28c7 JC |
1543 | for (i = 0; i < m; i++) { |
1544 | buffer_info = | |
1545 | &tpd_ring->buffer_info[tpd_next_to_use]; | |
1546 | buffer_info->skb = NULL; | |
1547 | buffer_info->length = | |
2b116145 JC |
1548 | (ATL1_MAX_TX_BUF_LEN >= |
1549 | len12) ? ATL1_MAX_TX_BUF_LEN : len12; | |
f3cc28c7 JC |
1550 | len12 -= buffer_info->length; |
1551 | page = virt_to_page(skb->data + | |
53ffb42c JC |
1552 | (proto_hdr_len + |
1553 | i * ATL1_MAX_TX_BUF_LEN)); | |
f3cc28c7 | 1554 | offset = (unsigned long)(skb->data + |
53ffb42c JC |
1555 | (proto_hdr_len + |
1556 | i * ATL1_MAX_TX_BUF_LEN)) & ~PAGE_MASK; | |
1557 | buffer_info->dma = pci_map_page(adapter->pdev, | |
1558 | page, offset, buffer_info->length, | |
1559 | PCI_DMA_TODEVICE); | |
f3cc28c7 JC |
1560 | if (++tpd_next_to_use == tpd_ring->count) |
1561 | tpd_next_to_use = 0; | |
1562 | } | |
1563 | } | |
1564 | } else { | |
1565 | /* not TSO/GSO */ | |
1566 | buffer_info->length = first_buf_len; | |
1567 | page = virt_to_page(skb->data); | |
1568 | offset = (unsigned long)skb->data & ~PAGE_MASK; | |
1569 | buffer_info->dma = pci_map_page(adapter->pdev, page, | |
53ffb42c | 1570 | offset, first_buf_len, PCI_DMA_TODEVICE); |
f3cc28c7 JC |
1571 | if (++tpd_next_to_use == tpd_ring->count) |
1572 | tpd_next_to_use = 0; | |
1573 | } | |
1574 | ||
1575 | for (f = 0; f < nr_frags; f++) { | |
1576 | struct skb_frag_struct *frag; | |
1577 | u16 lenf, i, m; | |
1578 | ||
1579 | frag = &skb_shinfo(skb)->frags[f]; | |
1580 | lenf = frag->size; | |
1581 | ||
2b116145 | 1582 | m = (lenf + ATL1_MAX_TX_BUF_LEN - 1) / ATL1_MAX_TX_BUF_LEN; |
f3cc28c7 JC |
1583 | for (i = 0; i < m; i++) { |
1584 | buffer_info = &tpd_ring->buffer_info[tpd_next_to_use]; | |
1585 | if (unlikely(buffer_info->skb)) | |
1586 | BUG(); | |
1587 | buffer_info->skb = NULL; | |
53ffb42c JC |
1588 | buffer_info->length = (lenf > ATL1_MAX_TX_BUF_LEN) ? |
1589 | ATL1_MAX_TX_BUF_LEN : lenf; | |
f3cc28c7 | 1590 | lenf -= buffer_info->length; |
53ffb42c JC |
1591 | buffer_info->dma = pci_map_page(adapter->pdev, |
1592 | frag->page, | |
1593 | frag->page_offset + (i * ATL1_MAX_TX_BUF_LEN), | |
1594 | buffer_info->length, PCI_DMA_TODEVICE); | |
f3cc28c7 JC |
1595 | |
1596 | if (++tpd_next_to_use == tpd_ring->count) | |
1597 | tpd_next_to_use = 0; | |
1598 | } | |
1599 | } | |
1600 | ||
1601 | /* last tpd's buffer-info */ | |
1602 | buffer_info->skb = skb; | |
1603 | } | |
1604 | ||
1605 | static void atl1_tx_queue(struct atl1_adapter *adapter, int count, | |
53ffb42c | 1606 | union tpd_descr *descr) |
f3cc28c7 JC |
1607 | { |
1608 | /* We enter this function holding a spinlock. */ | |
1609 | struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring; | |
1610 | int j; | |
1611 | u32 val; | |
1612 | struct atl1_buffer *buffer_info; | |
1613 | struct tx_packet_desc *tpd; | |
1614 | u16 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use); | |
1615 | ||
1616 | for (j = 0; j < count; j++) { | |
1617 | buffer_info = &tpd_ring->buffer_info[tpd_next_to_use]; | |
1618 | tpd = ATL1_TPD_DESC(&adapter->tpd_ring, tpd_next_to_use); | |
1619 | tpd->desc.csum.csumpu = descr->csum.csumpu; | |
1620 | tpd->desc.csum.csumpl = descr->csum.csumpl; | |
1621 | tpd->desc.tso.tsopu = descr->tso.tsopu; | |
1622 | tpd->desc.tso.tsopl = descr->tso.tsopl; | |
1623 | tpd->buffer_addr = cpu_to_le64(buffer_info->dma); | |
1624 | tpd->desc.data = descr->data; | |
1625 | tpd->desc.csum.csumpu |= (cpu_to_le16(buffer_info->length) & | |
1626 | CSUM_PARAM_BUFLEN_MASK) << CSUM_PARAM_BUFLEN_SHIFT; | |
1627 | ||
1628 | val = (descr->tso.tsopl >> TSO_PARAM_SEGMENT_SHIFT) & | |
1629 | TSO_PARAM_SEGMENT_MASK; | |
1630 | if (val && !j) | |
1631 | tpd->desc.tso.tsopl |= 1 << TSO_PARAM_HDRFLAG_SHIFT; | |
1632 | ||
1633 | if (j == (count - 1)) | |
1634 | tpd->desc.csum.csumpl |= 1 << CSUM_PARAM_EOP_SHIFT; | |
1635 | ||
1636 | if (++tpd_next_to_use == tpd_ring->count) | |
1637 | tpd_next_to_use = 0; | |
1638 | } | |
1639 | /* | |
1640 | * Force memory writes to complete before letting h/w | |
1641 | * know there are new descriptors to fetch. (Only | |
1642 | * applicable for weak-ordered memory model archs, | |
1643 | * such as IA-64). | |
1644 | */ | |
1645 | wmb(); | |
1646 | ||
1647 | atomic_set(&tpd_ring->next_to_use, (int)tpd_next_to_use); | |
1648 | } | |
1649 | ||
f3cc28c7 JC |
1650 | static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev) |
1651 | { | |
1652 | struct atl1_adapter *adapter = netdev_priv(netdev); | |
1653 | int len = skb->len; | |
1654 | int tso; | |
1655 | int count = 1; | |
1656 | int ret_val; | |
1657 | u32 val; | |
1658 | union tpd_descr param; | |
1659 | u16 frag_size; | |
1660 | u16 vlan_tag; | |
1661 | unsigned long flags; | |
1662 | unsigned int nr_frags = 0; | |
1663 | unsigned int mss = 0; | |
1664 | unsigned int f; | |
1665 | unsigned int proto_hdr_len; | |
1666 | ||
1667 | len -= skb->data_len; | |
1668 | ||
1669 | if (unlikely(skb->len == 0)) { | |
1670 | dev_kfree_skb_any(skb); | |
1671 | return NETDEV_TX_OK; | |
1672 | } | |
1673 | ||
1674 | param.data = 0; | |
1675 | param.tso.tsopu = 0; | |
1676 | param.tso.tsopl = 0; | |
1677 | param.csum.csumpu = 0; | |
1678 | param.csum.csumpl = 0; | |
1679 | ||
1680 | /* nr_frags will be nonzero if we're doing scatter/gather (SG) */ | |
1681 | nr_frags = skb_shinfo(skb)->nr_frags; | |
1682 | for (f = 0; f < nr_frags; f++) { | |
1683 | frag_size = skb_shinfo(skb)->frags[f].size; | |
1684 | if (frag_size) | |
53ffb42c JC |
1685 | count += (frag_size + ATL1_MAX_TX_BUF_LEN - 1) / |
1686 | ATL1_MAX_TX_BUF_LEN; | |
f3cc28c7 JC |
1687 | } |
1688 | ||
1689 | /* mss will be nonzero if we're doing segment offload (TSO/GSO) */ | |
1690 | mss = skb_shinfo(skb)->gso_size; | |
1691 | if (mss) { | |
7ccec1b9 | 1692 | if (skb->protocol == htons(ETH_P_IP)) { |
ea2ae17d | 1693 | proto_hdr_len = (skb_transport_offset(skb) + |
ab6a5bb6 | 1694 | tcp_hdrlen(skb)); |
f3cc28c7 JC |
1695 | if (unlikely(proto_hdr_len > len)) { |
1696 | dev_kfree_skb_any(skb); | |
1697 | return NETDEV_TX_OK; | |
1698 | } | |
1699 | /* need additional TPD ? */ | |
1700 | if (proto_hdr_len != len) | |
1701 | count += (len - proto_hdr_len + | |
53ffb42c JC |
1702 | ATL1_MAX_TX_BUF_LEN - 1) / |
1703 | ATL1_MAX_TX_BUF_LEN; | |
f3cc28c7 JC |
1704 | } |
1705 | } | |
1706 | ||
5845b677 | 1707 | if (!spin_trylock_irqsave(&adapter->lock, flags)) { |
f3cc28c7 | 1708 | /* Can't get lock - tell upper layer to requeue */ |
53ffb42c | 1709 | dev_printk(KERN_DEBUG, &adapter->pdev->dev, "tx locked\n"); |
f3cc28c7 JC |
1710 | return NETDEV_TX_LOCKED; |
1711 | } | |
1712 | ||
e6a7ff4a | 1713 | if (atl1_tpd_avail(&adapter->tpd_ring) < count) { |
f3cc28c7 JC |
1714 | /* not enough descriptors */ |
1715 | netif_stop_queue(netdev); | |
1716 | spin_unlock_irqrestore(&adapter->lock, flags); | |
53ffb42c | 1717 | dev_printk(KERN_DEBUG, &adapter->pdev->dev, "tx busy\n"); |
f3cc28c7 JC |
1718 | return NETDEV_TX_BUSY; |
1719 | } | |
1720 | ||
1721 | param.data = 0; | |
1722 | ||
1723 | if (adapter->vlgrp && vlan_tx_tag_present(skb)) { | |
1724 | vlan_tag = vlan_tx_tag_get(skb); | |
1725 | vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) | | |
1726 | ((vlan_tag >> 9) & 0x8); | |
1727 | param.csum.csumpl |= 1 << CSUM_PARAM_INSVLAG_SHIFT; | |
1728 | param.csum.csumpu |= (vlan_tag & CSUM_PARAM_VALANTAG_MASK) << | |
1729 | CSUM_PARAM_VALAN_SHIFT; | |
1730 | } | |
1731 | ||
1732 | tso = atl1_tso(adapter, skb, ¶m.tso); | |
1733 | if (tso < 0) { | |
1734 | spin_unlock_irqrestore(&adapter->lock, flags); | |
1735 | dev_kfree_skb_any(skb); | |
1736 | return NETDEV_TX_OK; | |
1737 | } | |
1738 | ||
1739 | if (!tso) { | |
1740 | ret_val = atl1_tx_csum(adapter, skb, ¶m.csum); | |
1741 | if (ret_val < 0) { | |
1742 | spin_unlock_irqrestore(&adapter->lock, flags); | |
1743 | dev_kfree_skb_any(skb); | |
1744 | return NETDEV_TX_OK; | |
1745 | } | |
1746 | } | |
1747 | ||
1748 | val = (param.csum.csumpl >> CSUM_PARAM_SEGMENT_SHIFT) & | |
1749 | CSUM_PARAM_SEGMENT_MASK; | |
1750 | atl1_tx_map(adapter, skb, 1 == val); | |
1751 | atl1_tx_queue(adapter, count, ¶m); | |
1752 | netdev->trans_start = jiffies; | |
1753 | spin_unlock_irqrestore(&adapter->lock, flags); | |
1754 | atl1_update_mailbox(adapter); | |
1755 | return NETDEV_TX_OK; | |
1756 | } | |
1757 | ||
1758 | /* | |
05ffdd7b JC |
1759 | * atl1_intr - Interrupt Handler |
1760 | * @irq: interrupt number | |
1761 | * @data: pointer to a network interface device structure | |
1762 | * @pt_regs: CPU registers structure | |
f3cc28c7 | 1763 | */ |
05ffdd7b | 1764 | static irqreturn_t atl1_intr(int irq, void *data) |
f3cc28c7 | 1765 | { |
05ffdd7b JC |
1766 | struct atl1_adapter *adapter = netdev_priv(data); |
1767 | u32 status; | |
1768 | u8 update_rx; | |
1769 | int max_ints = 10; | |
f3cc28c7 | 1770 | |
05ffdd7b JC |
1771 | status = adapter->cmb.cmb->int_stats; |
1772 | if (!status) | |
1773 | return IRQ_NONE; | |
f3cc28c7 | 1774 | |
05ffdd7b JC |
1775 | update_rx = 0; |
1776 | ||
1777 | do { | |
1778 | /* clear CMB interrupt status at once */ | |
1779 | adapter->cmb.cmb->int_stats = 0; | |
1780 | ||
1781 | if (status & ISR_GPHY) /* clear phy status */ | |
1782 | atl1_clear_phy_int(adapter); | |
1783 | ||
1784 | /* clear ISR status, and Enable CMB DMA/Disable Interrupt */ | |
1785 | iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR); | |
1786 | ||
1787 | /* check if SMB intr */ | |
1788 | if (status & ISR_SMB) | |
1789 | atl1_inc_smb(adapter); | |
1790 | ||
1791 | /* check if PCIE PHY Link down */ | |
1792 | if (status & ISR_PHY_LINKDOWN) { | |
1793 | dev_printk(KERN_DEBUG, &adapter->pdev->dev, | |
1794 | "pcie phy link down %x\n", status); | |
1795 | if (netif_running(adapter->netdev)) { /* reset MAC */ | |
1796 | iowrite32(0, adapter->hw.hw_addr + REG_IMR); | |
1797 | schedule_work(&adapter->pcie_dma_to_rst_task); | |
1798 | return IRQ_HANDLED; | |
1799 | } | |
f3cc28c7 | 1800 | } |
05ffdd7b JC |
1801 | |
1802 | /* check if DMA read/write error ? */ | |
1803 | if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) { | |
1804 | dev_printk(KERN_DEBUG, &adapter->pdev->dev, | |
1805 | "pcie DMA r/w error (status = 0x%x)\n", | |
1806 | status); | |
1807 | iowrite32(0, adapter->hw.hw_addr + REG_IMR); | |
1808 | schedule_work(&adapter->pcie_dma_to_rst_task); | |
1809 | return IRQ_HANDLED; | |
f3cc28c7 | 1810 | } |
f3cc28c7 | 1811 | |
05ffdd7b JC |
1812 | /* link event */ |
1813 | if (status & ISR_GPHY) { | |
1814 | adapter->soft_stats.tx_carrier_errors++; | |
1815 | atl1_check_for_link(adapter); | |
1816 | } | |
f3cc28c7 | 1817 | |
05ffdd7b JC |
1818 | /* transmit event */ |
1819 | if (status & ISR_CMB_TX) | |
1820 | atl1_intr_tx(adapter); | |
f3cc28c7 | 1821 | |
05ffdd7b JC |
1822 | /* rx exception */ |
1823 | if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN | | |
1824 | ISR_RRD_OV | ISR_HOST_RFD_UNRUN | | |
1825 | ISR_HOST_RRD_OV | ISR_CMB_RX))) { | |
1826 | if (status & (ISR_RXF_OV | ISR_RFD_UNRUN | | |
1827 | ISR_RRD_OV | ISR_HOST_RFD_UNRUN | | |
1828 | ISR_HOST_RRD_OV)) | |
1829 | dev_printk(KERN_DEBUG, &adapter->pdev->dev, | |
1830 | "rx exception, ISR = 0x%x\n", status); | |
1831 | atl1_intr_rx(adapter); | |
1832 | } | |
f3cc28c7 | 1833 | |
05ffdd7b JC |
1834 | if (--max_ints < 0) |
1835 | break; | |
1836 | ||
1837 | } while ((status = adapter->cmb.cmb->int_stats)); | |
1838 | ||
1839 | /* re-enable Interrupt */ | |
1840 | iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR); | |
1841 | return IRQ_HANDLED; | |
f3cc28c7 JC |
1842 | } |
1843 | ||
1844 | /* | |
05ffdd7b JC |
1845 | * atl1_watchdog - Timer Call-back |
1846 | * @data: pointer to netdev cast into an unsigned long | |
f3cc28c7 | 1847 | */ |
05ffdd7b | 1848 | static void atl1_watchdog(unsigned long data) |
f3cc28c7 | 1849 | { |
05ffdd7b | 1850 | struct atl1_adapter *adapter = (struct atl1_adapter *)data; |
f3cc28c7 | 1851 | |
05ffdd7b JC |
1852 | /* Reset the timer */ |
1853 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | |
1854 | } | |
f3cc28c7 | 1855 | |
05ffdd7b JC |
1856 | /* |
1857 | * atl1_phy_config - Timer Call-back | |
1858 | * @data: pointer to netdev cast into an unsigned long | |
1859 | */ | |
1860 | static void atl1_phy_config(unsigned long data) | |
1861 | { | |
1862 | struct atl1_adapter *adapter = (struct atl1_adapter *)data; | |
1863 | struct atl1_hw *hw = &adapter->hw; | |
1864 | unsigned long flags; | |
f3cc28c7 | 1865 | |
05ffdd7b JC |
1866 | spin_lock_irqsave(&adapter->lock, flags); |
1867 | adapter->phy_timer_pending = false; | |
1868 | atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg); | |
1869 | atl1_write_phy_reg(hw, MII_AT001_CR, hw->mii_1000t_ctrl_reg); | |
1870 | atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN); | |
1871 | spin_unlock_irqrestore(&adapter->lock, flags); | |
1872 | } | |
f3cc28c7 | 1873 | |
05ffdd7b JC |
1874 | /* |
1875 | * atl1_tx_timeout - Respond to a Tx Hang | |
1876 | * @netdev: network interface device structure | |
1877 | */ | |
1878 | static void atl1_tx_timeout(struct net_device *netdev) | |
1879 | { | |
1880 | struct atl1_adapter *adapter = netdev_priv(netdev); | |
1881 | /* Do the reset outside of interrupt context */ | |
1882 | schedule_work(&adapter->tx_timeout_task); | |
1883 | } | |
f3cc28c7 | 1884 | |
05ffdd7b JC |
1885 | /* |
1886 | * Orphaned vendor comment left intact here: | |
1887 | * <vendor comment> | |
1888 | * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT | |
1889 | * will assert. We do soft reset <0x1400=1> according | |
1890 | * with the SPEC. BUT, it seemes that PCIE or DMA | |
1891 | * state-machine will not be reset. DMAR_TO_INT will | |
1892 | * assert again and again. | |
1893 | * </vendor comment> | |
1894 | */ | |
1895 | static void atl1_tx_timeout_task(struct work_struct *work) | |
1896 | { | |
1897 | struct atl1_adapter *adapter = | |
1898 | container_of(work, struct atl1_adapter, tx_timeout_task); | |
1899 | struct net_device *netdev = adapter->netdev; | |
f3cc28c7 | 1900 | |
05ffdd7b JC |
1901 | netif_device_detach(netdev); |
1902 | atl1_down(adapter); | |
1903 | atl1_up(adapter); | |
1904 | netif_device_attach(netdev); | |
f3cc28c7 JC |
1905 | } |
1906 | ||
1907 | /* | |
05ffdd7b | 1908 | * atl1_link_chg_task - deal with link change event Out of interrupt context |
f3cc28c7 | 1909 | */ |
05ffdd7b | 1910 | static void atl1_link_chg_task(struct work_struct *work) |
f3cc28c7 | 1911 | { |
05ffdd7b JC |
1912 | struct atl1_adapter *adapter = |
1913 | container_of(work, struct atl1_adapter, link_chg_task); | |
1914 | unsigned long flags; | |
f3cc28c7 | 1915 | |
05ffdd7b JC |
1916 | spin_lock_irqsave(&adapter->lock, flags); |
1917 | atl1_check_link(adapter); | |
1918 | spin_unlock_irqrestore(&adapter->lock, flags); | |
1919 | } | |
f3cc28c7 | 1920 | |
05ffdd7b JC |
1921 | static void atl1_vlan_rx_register(struct net_device *netdev, |
1922 | struct vlan_group *grp) | |
1923 | { | |
1924 | struct atl1_adapter *adapter = netdev_priv(netdev); | |
1925 | unsigned long flags; | |
1926 | u32 ctrl; | |
f3cc28c7 | 1927 | |
05ffdd7b JC |
1928 | spin_lock_irqsave(&adapter->lock, flags); |
1929 | /* atl1_irq_disable(adapter); */ | |
1930 | adapter->vlgrp = grp; | |
f3cc28c7 | 1931 | |
05ffdd7b JC |
1932 | if (grp) { |
1933 | /* enable VLAN tag insert/strip */ | |
1934 | ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL); | |
1935 | ctrl |= MAC_CTRL_RMV_VLAN; | |
1936 | iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL); | |
1937 | } else { | |
1938 | /* disable VLAN tag insert/strip */ | |
1939 | ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL); | |
1940 | ctrl &= ~MAC_CTRL_RMV_VLAN; | |
1941 | iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL); | |
1942 | } | |
f3cc28c7 | 1943 | |
05ffdd7b JC |
1944 | /* atl1_irq_enable(adapter); */ |
1945 | spin_unlock_irqrestore(&adapter->lock, flags); | |
1946 | } | |
1947 | ||
1948 | static void atl1_restore_vlan(struct atl1_adapter *adapter) | |
1949 | { | |
1950 | atl1_vlan_rx_register(adapter->netdev, adapter->vlgrp); | |
1951 | } | |
1952 | ||
1953 | int atl1_reset(struct atl1_adapter *adapter) | |
1954 | { | |
1955 | int ret; | |
1956 | ||
1957 | ret = atl1_reset_hw(&adapter->hw); | |
1958 | if (ret != ATL1_SUCCESS) | |
1959 | return ret; | |
1960 | return atl1_init_hw(&adapter->hw); | |
f3cc28c7 JC |
1961 | } |
1962 | ||
1963 | s32 atl1_up(struct atl1_adapter *adapter) | |
1964 | { | |
1965 | struct net_device *netdev = adapter->netdev; | |
1966 | int err; | |
1967 | int irq_flags = IRQF_SAMPLE_RANDOM; | |
1968 | ||
1969 | /* hardware has been reset, we need to reload some things */ | |
1970 | atl1_set_multi(netdev); | |
2ca13da7 | 1971 | atl1_init_ring_ptrs(adapter); |
f3cc28c7 JC |
1972 | atl1_restore_vlan(adapter); |
1973 | err = atl1_alloc_rx_buffers(adapter); | |
1974 | if (unlikely(!err)) /* no RX BUFFER allocated */ | |
1975 | return -ENOMEM; | |
1976 | ||
1977 | if (unlikely(atl1_configure(adapter))) { | |
1978 | err = -EIO; | |
1979 | goto err_up; | |
1980 | } | |
1981 | ||
1982 | err = pci_enable_msi(adapter->pdev); | |
1983 | if (err) { | |
1984 | dev_info(&adapter->pdev->dev, | |
1985 | "Unable to enable MSI: %d\n", err); | |
1986 | irq_flags |= IRQF_SHARED; | |
1987 | } | |
1988 | ||
1989 | err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags, | |
1990 | netdev->name, netdev); | |
1991 | if (unlikely(err)) | |
1992 | goto err_up; | |
1993 | ||
1994 | mod_timer(&adapter->watchdog_timer, jiffies); | |
1995 | atl1_irq_enable(adapter); | |
1996 | atl1_check_link(adapter); | |
1997 | return 0; | |
1998 | ||
f3cc28c7 JC |
1999 | err_up: |
2000 | pci_disable_msi(adapter->pdev); | |
2001 | /* free rx_buffers */ | |
2002 | atl1_clean_rx_ring(adapter); | |
2003 | return err; | |
2004 | } | |
2005 | ||
2006 | void atl1_down(struct atl1_adapter *adapter) | |
2007 | { | |
2008 | struct net_device *netdev = adapter->netdev; | |
2009 | ||
2010 | del_timer_sync(&adapter->watchdog_timer); | |
2011 | del_timer_sync(&adapter->phy_config_timer); | |
2012 | adapter->phy_timer_pending = false; | |
2013 | ||
2014 | atl1_irq_disable(adapter); | |
2015 | free_irq(adapter->pdev->irq, netdev); | |
2016 | pci_disable_msi(adapter->pdev); | |
2017 | atl1_reset_hw(&adapter->hw); | |
2018 | adapter->cmb.cmb->int_stats = 0; | |
2019 | ||
2020 | adapter->link_speed = SPEED_0; | |
2021 | adapter->link_duplex = -1; | |
2022 | netif_carrier_off(netdev); | |
2023 | netif_stop_queue(netdev); | |
f3cc28c7 | 2024 | |
f3cc28c7 JC |
2025 | atl1_clean_tx_ring(adapter); |
2026 | atl1_clean_rx_ring(adapter); | |
f3cc28c7 JC |
2027 | } |
2028 | ||
2029 | /* | |
2030 | * atl1_open - Called when a network interface is made active | |
2031 | * @netdev: network interface device structure | |
2032 | * | |
2033 | * Returns 0 on success, negative value on failure | |
2034 | * | |
2035 | * The open entry point is called when a network interface is made | |
2036 | * active by the system (IFF_UP). At this point all resources needed | |
2037 | * for transmit and receive operations are allocated, the interrupt | |
2038 | * handler is registered with the OS, the watchdog timer is started, | |
2039 | * and the stack is notified that the interface is ready. | |
2040 | */ | |
2041 | static int atl1_open(struct net_device *netdev) | |
2042 | { | |
2043 | struct atl1_adapter *adapter = netdev_priv(netdev); | |
2044 | int err; | |
2045 | ||
2046 | /* allocate transmit descriptors */ | |
2047 | err = atl1_setup_ring_resources(adapter); | |
2048 | if (err) | |
2049 | return err; | |
2050 | ||
2051 | err = atl1_up(adapter); | |
2052 | if (err) | |
2053 | goto err_up; | |
2054 | ||
2055 | return 0; | |
2056 | ||
2057 | err_up: | |
2058 | atl1_reset(adapter); | |
2059 | return err; | |
2060 | } | |
2061 | ||
2062 | /* | |
2063 | * atl1_close - Disables a network interface | |
2064 | * @netdev: network interface device structure | |
2065 | * | |
2066 | * Returns 0, this is not allowed to fail | |
2067 | * | |
2068 | * The close entry point is called when an interface is de-activated | |
2069 | * by the OS. The hardware is still under the drivers control, but | |
2070 | * needs to be disabled. A global MAC reset is issued to stop the | |
2071 | * hardware, and all transmit and receive resources are freed. | |
2072 | */ | |
2073 | static int atl1_close(struct net_device *netdev) | |
2074 | { | |
2075 | struct atl1_adapter *adapter = netdev_priv(netdev); | |
2076 | atl1_down(adapter); | |
2077 | atl1_free_ring_resources(adapter); | |
2078 | return 0; | |
2079 | } | |
2080 | ||
05ffdd7b JC |
2081 | #ifdef CONFIG_PM |
2082 | static int atl1_suspend(struct pci_dev *pdev, pm_message_t state) | |
f3cc28c7 | 2083 | { |
05ffdd7b JC |
2084 | struct net_device *netdev = pci_get_drvdata(pdev); |
2085 | struct atl1_adapter *adapter = netdev_priv(netdev); | |
2086 | struct atl1_hw *hw = &adapter->hw; | |
2087 | u32 ctrl = 0; | |
2088 | u32 wufc = adapter->wol; | |
f3cc28c7 JC |
2089 | |
2090 | netif_device_detach(netdev); | |
05ffdd7b JC |
2091 | if (netif_running(netdev)) |
2092 | atl1_down(adapter); | |
f3cc28c7 | 2093 | |
05ffdd7b JC |
2094 | atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl); |
2095 | atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl); | |
2096 | if (ctrl & BMSR_LSTATUS) | |
2097 | wufc &= ~ATL1_WUFC_LNKC; | |
f3cc28c7 | 2098 | |
05ffdd7b JC |
2099 | /* reduce speed to 10/100M */ |
2100 | if (wufc) { | |
2101 | atl1_phy_enter_power_saving(hw); | |
2102 | /* if resume, let driver to re- setup link */ | |
2103 | hw->phy_configured = false; | |
2104 | atl1_set_mac_addr(hw); | |
2105 | atl1_set_multi(netdev); | |
2106 | ||
2107 | ctrl = 0; | |
2108 | /* turn on magic packet wol */ | |
2109 | if (wufc & ATL1_WUFC_MAG) | |
2110 | ctrl = WOL_MAGIC_EN | WOL_MAGIC_PME_EN; | |
2111 | ||
2112 | /* turn on Link change WOL */ | |
2113 | if (wufc & ATL1_WUFC_LNKC) | |
2114 | ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN); | |
2115 | iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL); | |
2116 | ||
2117 | /* turn on all-multi mode if wake on multicast is enabled */ | |
2118 | ctrl = ioread32(hw->hw_addr + REG_MAC_CTRL); | |
2119 | ctrl &= ~MAC_CTRL_DBG; | |
2120 | ctrl &= ~MAC_CTRL_PROMIS_EN; | |
2121 | if (wufc & ATL1_WUFC_MC) | |
2122 | ctrl |= MAC_CTRL_MC_ALL_EN; | |
2123 | else | |
2124 | ctrl &= ~MAC_CTRL_MC_ALL_EN; | |
2125 | ||
2126 | /* turn on broadcast mode if wake on-BC is enabled */ | |
2127 | if (wufc & ATL1_WUFC_BC) | |
2128 | ctrl |= MAC_CTRL_BC_EN; | |
2129 | else | |
2130 | ctrl &= ~MAC_CTRL_BC_EN; | |
2131 | ||
2132 | /* enable RX */ | |
2133 | ctrl |= MAC_CTRL_RX_EN; | |
2134 | iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL); | |
2135 | pci_enable_wake(pdev, PCI_D3hot, 1); | |
2136 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
2137 | } else { | |
2138 | iowrite32(0, hw->hw_addr + REG_WOL_CTRL); | |
2139 | pci_enable_wake(pdev, PCI_D3hot, 0); | |
2140 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
2141 | } | |
2142 | ||
2143 | pci_save_state(pdev); | |
2144 | pci_disable_device(pdev); | |
2145 | ||
2146 | pci_set_power_state(pdev, PCI_D3hot); | |
2147 | ||
2148 | return 0; | |
f3cc28c7 JC |
2149 | } |
2150 | ||
05ffdd7b | 2151 | static int atl1_resume(struct pci_dev *pdev) |
f3cc28c7 | 2152 | { |
05ffdd7b JC |
2153 | struct net_device *netdev = pci_get_drvdata(pdev); |
2154 | struct atl1_adapter *adapter = netdev_priv(netdev); | |
2155 | u32 ret_val; | |
53ffb42c | 2156 | |
05ffdd7b JC |
2157 | pci_set_power_state(pdev, 0); |
2158 | pci_restore_state(pdev); | |
2159 | ||
2160 | ret_val = pci_enable_device(pdev); | |
2161 | pci_enable_wake(pdev, PCI_D3hot, 0); | |
2162 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
2163 | ||
2164 | iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL); | |
2165 | atl1_reset(adapter); | |
2166 | ||
2167 | if (netif_running(netdev)) | |
2168 | atl1_up(adapter); | |
2169 | netif_device_attach(netdev); | |
2170 | ||
2171 | atl1_via_workaround(adapter); | |
2172 | ||
2173 | return 0; | |
f3cc28c7 | 2174 | } |
05ffdd7b JC |
2175 | #else |
2176 | #define atl1_suspend NULL | |
2177 | #define atl1_resume NULL | |
2178 | #endif | |
f3cc28c7 | 2179 | |
05ffdd7b JC |
2180 | #ifdef CONFIG_NET_POLL_CONTROLLER |
2181 | static void atl1_poll_controller(struct net_device *netdev) | |
f3cc28c7 | 2182 | { |
05ffdd7b JC |
2183 | disable_irq(netdev->irq); |
2184 | atl1_intr(netdev->irq, netdev); | |
2185 | enable_irq(netdev->irq); | |
f3cc28c7 | 2186 | } |
05ffdd7b | 2187 | #endif |
f3cc28c7 JC |
2188 | |
2189 | /* | |
2190 | * atl1_probe - Device Initialization Routine | |
2191 | * @pdev: PCI device information struct | |
2192 | * @ent: entry in atl1_pci_tbl | |
2193 | * | |
2194 | * Returns 0 on success, negative on failure | |
2195 | * | |
2196 | * atl1_probe initializes an adapter identified by a pci_dev structure. | |
2197 | * The OS initialization, configuring of the adapter private structure, | |
2198 | * and a hardware reset occur. | |
2199 | */ | |
2200 | static int __devinit atl1_probe(struct pci_dev *pdev, | |
53ffb42c | 2201 | const struct pci_device_id *ent) |
f3cc28c7 JC |
2202 | { |
2203 | struct net_device *netdev; | |
2204 | struct atl1_adapter *adapter; | |
2205 | static int cards_found = 0; | |
f3cc28c7 JC |
2206 | int err; |
2207 | ||
2208 | err = pci_enable_device(pdev); | |
2209 | if (err) | |
2210 | return err; | |
2211 | ||
5f08e46b | 2212 | /* |
cdcc520d CS |
2213 | * The atl1 chip can DMA to 64-bit addresses, but it uses a single |
2214 | * shared register for the high 32 bits, so only a single, aligned, | |
2215 | * 4 GB physical address range can be used at a time. | |
2216 | * | |
2217 | * Supporting 64-bit DMA on this hardware is more trouble than it's | |
2218 | * worth. It is far easier to limit to 32-bit DMA than update | |
2219 | * various kernel subsystems to support the mechanics required by a | |
2220 | * fixed-high-32-bit system. | |
5f08e46b LT |
2221 | */ |
2222 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
f3cc28c7 | 2223 | if (err) { |
5f08e46b LT |
2224 | dev_err(&pdev->dev, "no usable DMA configuration\n"); |
2225 | goto err_dma; | |
f3cc28c7 JC |
2226 | } |
2227 | /* Mark all PCI regions associated with PCI device | |
2228 | * pdev as being reserved by owner atl1_driver_name | |
2229 | */ | |
2230 | err = pci_request_regions(pdev, atl1_driver_name); | |
2231 | if (err) | |
2232 | goto err_request_regions; | |
2233 | ||
2234 | /* Enables bus-mastering on the device and calls | |
2235 | * pcibios_set_master to do the needed arch specific settings | |
2236 | */ | |
2237 | pci_set_master(pdev); | |
2238 | ||
2239 | netdev = alloc_etherdev(sizeof(struct atl1_adapter)); | |
2240 | if (!netdev) { | |
2241 | err = -ENOMEM; | |
2242 | goto err_alloc_etherdev; | |
2243 | } | |
f3cc28c7 JC |
2244 | SET_NETDEV_DEV(netdev, &pdev->dev); |
2245 | ||
2246 | pci_set_drvdata(pdev, netdev); | |
2247 | adapter = netdev_priv(netdev); | |
2248 | adapter->netdev = netdev; | |
2249 | adapter->pdev = pdev; | |
2250 | adapter->hw.back = adapter; | |
2251 | ||
2252 | adapter->hw.hw_addr = pci_iomap(pdev, 0, 0); | |
2253 | if (!adapter->hw.hw_addr) { | |
2254 | err = -EIO; | |
2255 | goto err_pci_iomap; | |
2256 | } | |
2257 | /* get device revision number */ | |
1e006364 | 2258 | adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr + |
53ffb42c | 2259 | (REG_MASTER_CTRL + 2)); |
1e006364 | 2260 | dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION); |
f3cc28c7 JC |
2261 | |
2262 | /* set default ring resource counts */ | |
2263 | adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD; | |
2264 | adapter->tpd_ring.count = ATL1_DEFAULT_TPD; | |
2265 | ||
2266 | adapter->mii.dev = netdev; | |
2267 | adapter->mii.mdio_read = mdio_read; | |
2268 | adapter->mii.mdio_write = mdio_write; | |
2269 | adapter->mii.phy_id_mask = 0x1f; | |
2270 | adapter->mii.reg_num_mask = 0x1f; | |
2271 | ||
2272 | netdev->open = &atl1_open; | |
2273 | netdev->stop = &atl1_close; | |
2274 | netdev->hard_start_xmit = &atl1_xmit_frame; | |
2275 | netdev->get_stats = &atl1_get_stats; | |
2276 | netdev->set_multicast_list = &atl1_set_multi; | |
2277 | netdev->set_mac_address = &atl1_set_mac; | |
2278 | netdev->change_mtu = &atl1_change_mtu; | |
2279 | netdev->do_ioctl = &atl1_ioctl; | |
2280 | netdev->tx_timeout = &atl1_tx_timeout; | |
2281 | netdev->watchdog_timeo = 5 * HZ; | |
497f050c AD |
2282 | #ifdef CONFIG_NET_POLL_CONTROLLER |
2283 | netdev->poll_controller = atl1_poll_controller; | |
2284 | #endif | |
f3cc28c7 | 2285 | netdev->vlan_rx_register = atl1_vlan_rx_register; |
cb434e38 | 2286 | |
f3cc28c7 JC |
2287 | netdev->ethtool_ops = &atl1_ethtool_ops; |
2288 | adapter->bd_number = cards_found; | |
f3cc28c7 JC |
2289 | |
2290 | /* setup the private structure */ | |
2291 | err = atl1_sw_init(adapter); | |
2292 | if (err) | |
2293 | goto err_common; | |
2294 | ||
2295 | netdev->features = NETIF_F_HW_CSUM; | |
2296 | netdev->features |= NETIF_F_SG; | |
2297 | netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX); | |
2298 | ||
2299 | /* | |
2300 | * FIXME - Until tso performance gets fixed, disable the feature. | |
2301 | * Enable it with ethtool -K if desired. | |
2302 | */ | |
2303 | /* netdev->features |= NETIF_F_TSO; */ | |
2304 | ||
f3cc28c7 JC |
2305 | netdev->features |= NETIF_F_LLTX; |
2306 | ||
2307 | /* | |
2308 | * patch for some L1 of old version, | |
2309 | * the final version of L1 may not need these | |
2310 | * patches | |
2311 | */ | |
2312 | /* atl1_pcie_patch(adapter); */ | |
2313 | ||
2314 | /* really reset GPHY core */ | |
2315 | iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE); | |
2316 | ||
2317 | /* | |
2318 | * reset the controller to | |
2319 | * put the device in a known good starting state | |
2320 | */ | |
2321 | if (atl1_reset_hw(&adapter->hw)) { | |
2322 | err = -EIO; | |
2323 | goto err_common; | |
2324 | } | |
2325 | ||
2326 | /* copy the MAC address out of the EEPROM */ | |
2327 | atl1_read_mac_addr(&adapter->hw); | |
2328 | memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); | |
2329 | ||
2330 | if (!is_valid_ether_addr(netdev->dev_addr)) { | |
2331 | err = -EIO; | |
2332 | goto err_common; | |
2333 | } | |
2334 | ||
2335 | atl1_check_options(adapter); | |
2336 | ||
2337 | /* pre-init the MAC, and setup link */ | |
2338 | err = atl1_init_hw(&adapter->hw); | |
2339 | if (err) { | |
2340 | err = -EIO; | |
2341 | goto err_common; | |
2342 | } | |
2343 | ||
2344 | atl1_pcie_patch(adapter); | |
2345 | /* assume we have no link for now */ | |
2346 | netif_carrier_off(netdev); | |
2347 | netif_stop_queue(netdev); | |
2348 | ||
2349 | init_timer(&adapter->watchdog_timer); | |
2350 | adapter->watchdog_timer.function = &atl1_watchdog; | |
2351 | adapter->watchdog_timer.data = (unsigned long)adapter; | |
2352 | ||
2353 | init_timer(&adapter->phy_config_timer); | |
2354 | adapter->phy_config_timer.function = &atl1_phy_config; | |
2355 | adapter->phy_config_timer.data = (unsigned long)adapter; | |
2356 | adapter->phy_timer_pending = false; | |
2357 | ||
2358 | INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task); | |
2359 | ||
2360 | INIT_WORK(&adapter->link_chg_task, atl1_link_chg_task); | |
2361 | ||
2362 | INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task); | |
2363 | ||
2364 | err = register_netdev(netdev); | |
2365 | if (err) | |
2366 | goto err_common; | |
2367 | ||
2368 | cards_found++; | |
2369 | atl1_via_workaround(adapter); | |
2370 | return 0; | |
2371 | ||
2372 | err_common: | |
2373 | pci_iounmap(pdev, adapter->hw.hw_addr); | |
2374 | err_pci_iomap: | |
2375 | free_netdev(netdev); | |
2376 | err_alloc_etherdev: | |
2377 | pci_release_regions(pdev); | |
2378 | err_dma: | |
2379 | err_request_regions: | |
2380 | pci_disable_device(pdev); | |
2381 | return err; | |
2382 | } | |
2383 | ||
2384 | /* | |
2385 | * atl1_remove - Device Removal Routine | |
2386 | * @pdev: PCI device information struct | |
2387 | * | |
2388 | * atl1_remove is called by the PCI subsystem to alert the driver | |
2389 | * that it should release a PCI device. The could be caused by a | |
2390 | * Hot-Plug event, or because the driver is going to be removed from | |
2391 | * memory. | |
2392 | */ | |
2393 | static void __devexit atl1_remove(struct pci_dev *pdev) | |
2394 | { | |
2395 | struct net_device *netdev = pci_get_drvdata(pdev); | |
2396 | struct atl1_adapter *adapter; | |
2397 | /* Device not available. Return. */ | |
2398 | if (!netdev) | |
2399 | return; | |
2400 | ||
2401 | adapter = netdev_priv(netdev); | |
8c754a04 CS |
2402 | |
2403 | /* Some atl1 boards lack persistent storage for their MAC, and get it | |
2404 | * from the BIOS during POST. If we've been messing with the MAC | |
2405 | * address, we need to save the permanent one. | |
2406 | */ | |
2407 | if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) { | |
53ffb42c JC |
2408 | memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, |
2409 | ETH_ALEN); | |
8c754a04 CS |
2410 | atl1_set_mac_addr(&adapter->hw); |
2411 | } | |
2412 | ||
f3cc28c7 JC |
2413 | iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE); |
2414 | unregister_netdev(netdev); | |
2415 | pci_iounmap(pdev, adapter->hw.hw_addr); | |
2416 | pci_release_regions(pdev); | |
2417 | free_netdev(netdev); | |
2418 | pci_disable_device(pdev); | |
2419 | } | |
2420 | ||
f3cc28c7 JC |
2421 | static struct pci_driver atl1_driver = { |
2422 | .name = atl1_driver_name, | |
2423 | .id_table = atl1_pci_tbl, | |
2424 | .probe = atl1_probe, | |
2425 | .remove = __devexit_p(atl1_remove), | |
f3cc28c7 JC |
2426 | .suspend = atl1_suspend, |
2427 | .resume = atl1_resume | |
2428 | }; | |
2429 | ||
2430 | /* | |
2431 | * atl1_exit_module - Driver Exit Cleanup Routine | |
2432 | * | |
2433 | * atl1_exit_module is called just before the driver is removed | |
2434 | * from memory. | |
2435 | */ | |
2436 | static void __exit atl1_exit_module(void) | |
2437 | { | |
2438 | pci_unregister_driver(&atl1_driver); | |
2439 | } | |
2440 | ||
2441 | /* | |
2442 | * atl1_init_module - Driver Registration Routine | |
2443 | * | |
2444 | * atl1_init_module is the first routine called when the driver is | |
2445 | * loaded. All it does is register with the PCI subsystem. | |
2446 | */ | |
2447 | static int __init atl1_init_module(void) | |
2448 | { | |
f3cc28c7 JC |
2449 | return pci_register_driver(&atl1_driver); |
2450 | } | |
2451 | ||
2452 | module_init(atl1_init_module); | |
2453 | module_exit(atl1_exit_module); |