projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
atl1c: disable L1/L0s when link detected
[deliverable/linux.git] / drivers / net / atl1c / atl1c_main.c
CommitLineData
43250ddd
JY		 1/*
2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22#include "atl1c.h"
23
24#define ATL1C_DRV_VERSION "1.0.0.1-NAPI"
25char atl1c_driver_name[] = "atl1c";
26char atl1c_driver_version[] = ATL1C_DRV_VERSION;
27#define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
28#define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
29/*
30 * atl1c_pci_tbl - PCI Device ID Table
31 *
32 * Wildcard entries (PCI_ANY_ID) should come last
33 * Last entry must be all 0s
34 *
35 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
36 * Class, Class Mask, private data (not used) }
37 */
38static struct pci_device_id atl1c_pci_tbl[] = {
39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
41 /* required last entry */
42 { 0 }
43};
44MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
45
46MODULE_AUTHOR("Jie Yang <jie.yang@atheros.com>");
47MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
48MODULE_LICENSE("GPL");
49MODULE_VERSION(ATL1C_DRV_VERSION);
50
51static int atl1c_stop_mac(struct atl1c_hw *hw);
52static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
53static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
54static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
55static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
56static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
57static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
58 int *work_done, int work_to_do);
59
60static const u16 atl1c_pay_load_size[] = {
61 128, 256, 512, 1024, 2048, 4096,
62};
63
64static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =
65{
66 REG_MB_RFD0_PROD_IDX,
67 REG_MB_RFD1_PROD_IDX,
68 REG_MB_RFD2_PROD_IDX,
69 REG_MB_RFD3_PROD_IDX
70};
71
72static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
73{
74 REG_RFD0_HEAD_ADDR_LO,
75 REG_RFD1_HEAD_ADDR_LO,
76 REG_RFD2_HEAD_ADDR_LO,
77 REG_RFD3_HEAD_ADDR_LO
78};
79
80static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
81{
82 REG_RRD0_HEAD_ADDR_LO,
83 REG_RRD1_HEAD_ADDR_LO,
84 REG_RRD2_HEAD_ADDR_LO,
85 REG_RRD3_HEAD_ADDR_LO
86};
87
88static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
89 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
90
91/*
92 * atl1c_init_pcie - init PCIE module
93 */
94static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
95{
96 u32 data;
97 u32 pci_cmd;
98 struct pci_dev *pdev = hw->adapter->pdev;
99
100 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
101 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
102 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
103 PCI_COMMAND_IO);
104 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
105
106 /*
107 * Clear any PowerSaveing Settings
108 */
109 pci_enable_wake(pdev, PCI_D3hot, 0);
110 pci_enable_wake(pdev, PCI_D3cold, 0);
111
112 /*
113 * Mask some pcie error bits
114 */
115 AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
116 data &= ~PCIE_UC_SERVRITY_DLP;
117 data &= ~PCIE_UC_SERVRITY_FCP;
118 AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
119
120 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
121 atl1c_disable_l0s_l1(hw);
122 if (flag & ATL1C_PCIE_PHY_RESET)
123 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
124 else
125 AT_WRITE_REG(hw, REG_GPHY_CTRL,
126 GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
127
128 msleep(1);
129}
130
131/*
132 * atl1c_irq_enable - Enable default interrupt generation settings
133 * @adapter: board private structure
134 */
135static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
136{
137 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
138 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
139 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
140 AT_WRITE_FLUSH(&adapter->hw);
141 }
142}
143
144/*
145 * atl1c_irq_disable - Mask off interrupt generation on the NIC
146 * @adapter: board private structure
147 */
148static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
149{
150 atomic_inc(&adapter->irq_sem);
151 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
152 AT_WRITE_FLUSH(&adapter->hw);
153 synchronize_irq(adapter->pdev->irq);
154}
155
156/*
157 * atl1c_irq_reset - reset interrupt confiure on the NIC
158 * @adapter: board private structure
159 */
160static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
161{
162 atomic_set(&adapter->irq_sem, 1);
163 atl1c_irq_enable(adapter);
164}
165
166/*
167 * atl1c_phy_config - Timer Call-back
168 * @data: pointer to netdev cast into an unsigned long
169 */
170static void atl1c_phy_config(unsigned long data)
171{
172 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
173 struct atl1c_hw *hw = &adapter->hw;
174 unsigned long flags;
175
176 spin_lock_irqsave(&adapter->mdio_lock, flags);
177 atl1c_restart_autoneg(hw);
178 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
179}
180
181void atl1c_reinit_locked(struct atl1c_adapter *adapter)
182{
183
184 WARN_ON(in_interrupt());
185 atl1c_down(adapter);
186 atl1c_up(adapter);
187 clear_bit(__AT_RESETTING, &adapter->flags);
188}
189
190static void atl1c_reset_task(struct work_struct *work)
191{
192 struct atl1c_adapter *adapter;
193 struct net_device *netdev;
194
195 adapter = container_of(work, struct atl1c_adapter, reset_task);
196 netdev = adapter->netdev;
197
198 netif_device_detach(netdev);
199 atl1c_down(adapter);
200 atl1c_up(adapter);
201 netif_device_attach(netdev);
202}
203
204static void atl1c_check_link_status(struct atl1c_adapter *adapter)
205{
206 struct atl1c_hw *hw = &adapter->hw;
207 struct net_device *netdev = adapter->netdev;
208 struct pci_dev *pdev = adapter->pdev;
209 int err;
210 unsigned long flags;
211 u16 speed, duplex, phy_data;
212
213 spin_lock_irqsave(&adapter->mdio_lock, flags);
214 /* MII_BMSR must read twise */
215 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
216 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
217 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
218
219 if ((phy_data & BMSR_LSTATUS) == 0) {
220 /* link down */
221 if (netif_carrier_ok(netdev)) {
222 hw->hibernate = true;
43250ddd
JY		 223 if (atl1c_stop_mac(hw) != 0)
224 if (netif_msg_hw(adapter))
225 dev_warn(&pdev->dev,
226 "stop mac failed\n");
52fbc100 227 atl1c_set_aspm(hw, false);
43250ddd
JY		 228 }
229 netif_carrier_off(netdev);
230 } else {
231 /* Link Up */
232 hw->hibernate = false;
233 spin_lock_irqsave(&adapter->mdio_lock, flags);
234 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
235 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
236 if (unlikely(err))
237 return;
238 /* link result is our setting */
239 if (adapter->link_speed != speed ||
240 adapter->link_duplex != duplex) {
241 adapter->link_speed = speed;
242 adapter->link_duplex = duplex;
52fbc100 243 atl1c_set_aspm(hw, true);
43250ddd
JY		 244 atl1c_enable_tx_ctrl(hw);
245 atl1c_enable_rx_ctrl(hw);
246 atl1c_setup_mac_ctrl(adapter);
43250ddd
JY		 247 if (netif_msg_link(adapter))
248 dev_info(&pdev->dev,
249 "%s: %s NIC Link is Up<%d Mbps %s>\n",
250 atl1c_driver_name, netdev->name,
251 adapter->link_speed,
252 adapter->link_duplex == FULL_DUPLEX ?
253 "Full Duplex" : "Half Duplex");
254 }
255 if (!netif_carrier_ok(netdev))
256 netif_carrier_on(netdev);
257 }
258}
259
260/*
261 * atl1c_link_chg_task - deal with link change event Out of interrupt context
262 * @netdev: network interface device structure
263 */
264static void atl1c_link_chg_task(struct work_struct *work)
265{
266 struct atl1c_adapter *adapter;
267
268 adapter = container_of(work, struct atl1c_adapter, link_chg_task);
269 atl1c_check_link_status(adapter);
270}
271
272static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
273{
274 struct net_device *netdev = adapter->netdev;
275 struct pci_dev *pdev = adapter->pdev;
276 u16 phy_data;
277 u16 link_up;
278
279 spin_lock(&adapter->mdio_lock);
280 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
281 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
282 spin_unlock(&adapter->mdio_lock);
283 link_up = phy_data & BMSR_LSTATUS;
284 /* notify upper layer link down ASAP */
285 if (!link_up) {
286 if (netif_carrier_ok(netdev)) {
287 /* old link state: Up */
288 netif_carrier_off(netdev);
289 if (netif_msg_link(adapter))
290 dev_info(&pdev->dev,
291 "%s: %s NIC Link is Down\n",
292 atl1c_driver_name, netdev->name);
293 adapter->link_speed = SPEED_0;
294 }
295 }
296 schedule_work(&adapter->link_chg_task);
297}
298
299static void atl1c_del_timer(struct atl1c_adapter *adapter)
300{
301 del_timer_sync(&adapter->phy_config_timer);
302}
303
304static void atl1c_cancel_work(struct atl1c_adapter *adapter)
305{
306 cancel_work_sync(&adapter->reset_task);
307 cancel_work_sync(&adapter->link_chg_task);
308}
309
310/*
311 * atl1c_tx_timeout - Respond to a Tx Hang
312 * @netdev: network interface device structure
313 */
314static void atl1c_tx_timeout(struct net_device *netdev)
315{
316 struct atl1c_adapter *adapter = netdev_priv(netdev);
317
318 /* Do the reset outside of interrupt context */
319 schedule_work(&adapter->reset_task);
320}
321
322/*
323 * atl1c_set_multi - Multicast and Promiscuous mode set
324 * @netdev: network interface device structure
325 *
326 * The set_multi entry point is called whenever the multicast address
327 * list or the network interface flags are updated. This routine is
328 * responsible for configuring the hardware for proper multicast,
329 * promiscuous mode, and all-multi behavior.
330 */
331static void atl1c_set_multi(struct net_device *netdev)
332{
333 struct atl1c_adapter *adapter = netdev_priv(netdev);
334 struct atl1c_hw *hw = &adapter->hw;
335 struct dev_mc_list *mc_ptr;
336 u32 mac_ctrl_data;
337 u32 hash_value;
338
339 /* Check for Promiscuous and All Multicast modes */
340 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
341
342 if (netdev->flags & IFF_PROMISC) {
343 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
344 } else if (netdev->flags & IFF_ALLMULTI) {
345 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
346 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
347 } else {
348 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
349 }
350
351 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
352
353 /* clear the old settings from the multicast hash table */
354 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
355 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
356
357 /* comoute mc addresses' hash value ,and put it into hash table */
358 for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
359 hash_value = atl1c_hash_mc_addr(hw, mc_ptr->dmi_addr);
360 atl1c_hash_set(hw, hash_value);
361 }
362}
363
364static void atl1c_vlan_rx_register(struct net_device *netdev,
365 struct vlan_group *grp)
366{
367 struct atl1c_adapter *adapter = netdev_priv(netdev);
368 struct pci_dev *pdev = adapter->pdev;
369 u32 mac_ctrl_data = 0;
370
371 if (netif_msg_pktdata(adapter))
372 dev_dbg(&pdev->dev, "atl1c_vlan_rx_register\n");
373
374 atl1c_irq_disable(adapter);
375
376 adapter->vlgrp = grp;
377 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
378
379 if (grp) {
380 /* enable VLAN tag insert/strip */
381 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
382 } else {
383 /* disable VLAN tag insert/strip */
384 mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
385 }
386
387 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
388 atl1c_irq_enable(adapter);
389}
390
391static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
392{
393 struct pci_dev *pdev = adapter->pdev;
394
395 if (netif_msg_pktdata(adapter))
396 dev_dbg(&pdev->dev, "atl1c_restore_vlan !");
397 atl1c_vlan_rx_register(adapter->netdev, adapter->vlgrp);
398}
399/*
400 * atl1c_set_mac - Change the Ethernet Address of the NIC
401 * @netdev: network interface device structure
402 * @p: pointer to an address structure
403 *
404 * Returns 0 on success, negative on failure
405 */
406static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
407{
408 struct atl1c_adapter *adapter = netdev_priv(netdev);
409 struct sockaddr *addr = p;
410
411 if (!is_valid_ether_addr(addr->sa_data))
412 return -EADDRNOTAVAIL;
413
414 if (netif_running(netdev))
415 return -EBUSY;
416
417 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
418 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
419
420 atl1c_hw_set_mac_addr(&adapter->hw);
421
422 return 0;
423}
424
425static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
426 struct net_device *dev)
427{
428 int mtu = dev->mtu;
429
430 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
431 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
432}
433/*
434 * atl1c_change_mtu - Change the Maximum Transfer Unit
435 * @netdev: network interface device structure
436 * @new_mtu: new value for maximum frame size
437 *
438 * Returns 0 on success, negative on failure
439 */
440static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
441{
442 struct atl1c_adapter *adapter = netdev_priv(netdev);
443 int old_mtu = netdev->mtu;
444 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
445
446 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
447 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
448 if (netif_msg_link(adapter))
449 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
450 return -EINVAL;
451 }
452 /* set MTU */
453 if (old_mtu != new_mtu && netif_running(netdev)) {
454 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
455 msleep(1);
456 netdev->mtu = new_mtu;
457 adapter->hw.max_frame_size = new_mtu;
458 atl1c_set_rxbufsize(adapter, netdev);
459 atl1c_down(adapter);
460 atl1c_up(adapter);
461 clear_bit(__AT_RESETTING, &adapter->flags);
462 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
463 u32 phy_data;
464
465 AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
466 phy_data |= 0x10000000;
467 AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
468 }
469
470 }
471 return 0;
472}
473
474/*
475 * caller should hold mdio_lock
476 */
477static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
478{
479 struct atl1c_adapter *adapter = netdev_priv(netdev);
480 u16 result;
481
482 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
483 return result;
484}
485
486static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
487 int reg_num, int val)
488{
489 struct atl1c_adapter *adapter = netdev_priv(netdev);
490
491 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
492}
493
494/*
495 * atl1c_mii_ioctl -
496 * @netdev:
497 * @ifreq:
498 * @cmd:
499 */
500static int atl1c_mii_ioctl(struct net_device *netdev,
501 struct ifreq *ifr, int cmd)
502{
503 struct atl1c_adapter *adapter = netdev_priv(netdev);
504 struct pci_dev *pdev = adapter->pdev;
505 struct mii_ioctl_data *data = if_mii(ifr);
506 unsigned long flags;
507 int retval = 0;
508
509 if (!netif_running(netdev))
510 return -EINVAL;
511
512 spin_lock_irqsave(&adapter->mdio_lock, flags);
513 switch (cmd) {
514 case SIOCGMIIPHY:
515 data->phy_id = 0;
516 break;
517
518 case SIOCGMIIREG:
519 if (!capable(CAP_NET_ADMIN)) {
520 retval = -EPERM;
521 goto out;
522 }
523 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
524 &data->val_out)) {
525 retval = -EIO;
526 goto out;
527 }
528 break;
529
530 case SIOCSMIIREG:
531 if (!capable(CAP_NET_ADMIN)) {
532 retval = -EPERM;
533 goto out;
534 }
535 if (data->reg_num & ~(0x1F)) {
536 retval = -EFAULT;
537 goto out;
538 }
539
540 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
541 data->reg_num, data->val_in);
542 if (atl1c_write_phy_reg(&adapter->hw,
543 data->reg_num, data->val_in)) {
544 retval = -EIO;
545 goto out;
546 }
547 break;
548
549 default:
550 retval = -EOPNOTSUPP;
551 break;
552 }
553out:
554 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
555 return retval;
556}
557
558/*
559 * atl1c_ioctl -
560 * @netdev:
561 * @ifreq:
562 * @cmd:
563 */
564static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
565{
566 switch (cmd) {
567 case SIOCGMIIPHY:
568 case SIOCGMIIREG:
569 case SIOCSMIIREG:
570 return atl1c_mii_ioctl(netdev, ifr, cmd);
571 default:
572 return -EOPNOTSUPP;
573 }
574}
575
576/*
577 * atl1c_alloc_queues - Allocate memory for all rings
578 * @adapter: board private structure to initialize
579 *
580 */
581static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
582{
583 return 0;
584}
585
586static void atl1c_set_mac_type(struct atl1c_hw *hw)
587{
588 switch (hw->device_id) {
589 case PCI_DEVICE_ID_ATTANSIC_L2C:
590 hw->nic_type = athr_l2c;
591 break;
592
593 case PCI_DEVICE_ID_ATTANSIC_L1C:
594 hw->nic_type = athr_l1c;
595 break;
596
597 default:
598 break;
599 }
600}
601
602static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
603{
604 u32 phy_status_data;
605 u32 link_ctrl_data;
606
607 atl1c_set_mac_type(hw);
608 AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
609 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
610
611 hw->ctrl_flags = ATL1C_INTR_CLEAR_ON_READ |
612 ATL1C_INTR_MODRT_ENABLE |
613 ATL1C_RX_IPV6_CHKSUM |
614 ATL1C_TXQ_MODE_ENHANCE;
615 if (link_ctrl_data & LINK_CTRL_L0S_EN)
616 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
617 if (link_ctrl_data & LINK_CTRL_L1_EN)
618 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
619
620 if (hw->nic_type == athr_l1c) {
621 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
622 hw->ctrl_flags |= ATL1C_LINK_CAP_1000M;
623 }
624 return 0;
625}
626/*
627 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
628 * @adapter: board private structure to initialize
629 *
630 * atl1c_sw_init initializes the Adapter private data structure.
631 * Fields are initialized based on PCI device information and
632 * OS network device settings (MTU size).
633 */
634static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
635{
636 struct atl1c_hw *hw = &adapter->hw;
637 struct pci_dev *pdev = adapter->pdev;
638
639 adapter->wol = 0;
640 adapter->link_speed = SPEED_0;
641 adapter->link_duplex = FULL_DUPLEX;
642 adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE;
643 adapter->tpd_ring[0].count = 1024;
644 adapter->rfd_ring[0].count = 512;
645
646 hw->vendor_id = pdev->vendor;
647 hw->device_id = pdev->device;
648 hw->subsystem_vendor_id = pdev->subsystem_vendor;
649 hw->subsystem_id = pdev->subsystem_device;
650
651 /* before link up, we assume hibernate is true */
652 hw->hibernate = true;
653 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
654 if (atl1c_setup_mac_funcs(hw) != 0) {
655 dev_err(&pdev->dev, "set mac function pointers failed\n");
656 return -1;
657 }
658 hw->intr_mask = IMR_NORMAL_MASK;
659 hw->phy_configured = false;
660 hw->preamble_len = 7;
661 hw->max_frame_size = adapter->netdev->mtu;
662 if (adapter->num_rx_queues < 2) {
663 hw->rss_type = atl1c_rss_disable;
664 hw->rss_mode = atl1c_rss_mode_disable;
665 } else {
666 hw->rss_type = atl1c_rss_ipv4;
667 hw->rss_mode = atl1c_rss_mul_que_mul_int;
668 hw->rss_hash_bits = 16;
669 }
670 hw->autoneg_advertised = ADVERTISED_Autoneg;
671 hw->indirect_tab = 0xE4E4E4E4;
672 hw->base_cpu = 0;
673
674 hw->ict = 50000; /* 100ms */
675 hw->smb_timer = 200000; /* 400ms */
676 hw->cmb_tpd = 4;
677 hw->cmb_tx_timer = 1; /* 2 us */
678 hw->rx_imt = 200;
679 hw->tx_imt = 1000;
680
681 hw->tpd_burst = 5;
682 hw->rfd_burst = 8;
683 hw->dma_order = atl1c_dma_ord_out;
684 hw->dmar_block = atl1c_dma_req_1024;
685 hw->dmaw_block = atl1c_dma_req_1024;
686 hw->dmar_dly_cnt = 15;
687 hw->dmaw_dly_cnt = 4;
688
689 if (atl1c_alloc_queues(adapter)) {
690 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
691 return -ENOMEM;
692 }
693 /* TODO */
694 atl1c_set_rxbufsize(adapter, adapter->netdev);
695 atomic_set(&adapter->irq_sem, 1);
696 spin_lock_init(&adapter->mdio_lock);
697 spin_lock_init(&adapter->tx_lock);
698 set_bit(__AT_DOWN, &adapter->flags);
699
700 return 0;
701}
702
703/*
704 * atl1c_clean_tx_ring - Free Tx-skb
705 * @adapter: board private structure
706 */
707static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
708 enum atl1c_trans_queue type)
709{
710 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
711 struct atl1c_buffer *buffer_info;
712 struct pci_dev *pdev = adapter->pdev;
713 u16 index, ring_count;
714
715 ring_count = tpd_ring->count;
716 for (index = 0; index < ring_count; index++) {
717 buffer_info = &tpd_ring->buffer_info[index];
718 if (buffer_info->state == ATL1_BUFFER_FREE)
719 continue;
720 if (buffer_info->dma)
721 pci_unmap_single(pdev, buffer_info->dma,
722 buffer_info->length,
723 PCI_DMA_TODEVICE);
724 if (buffer_info->skb)
725 dev_kfree_skb(buffer_info->skb);
726 buffer_info->dma = 0;
727 buffer_info->skb = NULL;
728 buffer_info->state = ATL1_BUFFER_FREE;
729 }
730
731 /* Zero out Tx-buffers */
732 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
733 ring_count);
734 atomic_set(&tpd_ring->next_to_clean, 0);
735 tpd_ring->next_to_use = 0;
736}
737
738/*
739 * atl1c_clean_rx_ring - Free rx-reservation skbs
740 * @adapter: board private structure
741 */
742static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
743{
744 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
745 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
746 struct atl1c_buffer *buffer_info;
747 struct pci_dev *pdev = adapter->pdev;
748 int i, j;
749
750 for (i = 0; i < adapter->num_rx_queues; i++) {
751 for (j = 0; j < rfd_ring[i].count; j++) {
752 buffer_info = &rfd_ring[i].buffer_info[j];
753 if (buffer_info->state == ATL1_BUFFER_FREE)
754 continue;
755 if (buffer_info->dma)
756 pci_unmap_single(pdev, buffer_info->dma,
757 buffer_info->length,
758 PCI_DMA_FROMDEVICE);
759 if (buffer_info->skb)
760 dev_kfree_skb(buffer_info->skb);
761 buffer_info->state = ATL1_BUFFER_FREE;
762 buffer_info->skb = NULL;
763 }
764 /* zero out the descriptor ring */
765 memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
766 rfd_ring[i].next_to_clean = 0;
767 rfd_ring[i].next_to_use = 0;
768 rrd_ring[i].next_to_use = 0;
769 rrd_ring[i].next_to_clean = 0;
770 }
771}
772
773/*
774 * Read / Write Ptr Initialize:
775 */
776static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
777{
778 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
779 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
780 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
781 struct atl1c_buffer *buffer_info;
782 int i, j;
783
784 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
785 tpd_ring[i].next_to_use = 0;
786 atomic_set(&tpd_ring[i].next_to_clean, 0);
787 buffer_info = tpd_ring[i].buffer_info;
788 for (j = 0; j < tpd_ring->count; j++)
789 buffer_info[i].state = ATL1_BUFFER_FREE;
790 }
791 for (i = 0; i < adapter->num_rx_queues; i++) {
792 rfd_ring[i].next_to_use = 0;
793 rfd_ring[i].next_to_clean = 0;
794 rrd_ring[i].next_to_use = 0;
795 rrd_ring[i].next_to_clean = 0;
796 for (j = 0; j < rfd_ring[i].count; j++) {
797 buffer_info = &rfd_ring[i].buffer_info[j];
798 buffer_info->state = ATL1_BUFFER_FREE;
799 }
800 }
801}
802
803/*
804 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
805 * @adapter: board private structure
806 *
807 * Free all transmit software resources
808 */
809static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
810{
811 struct pci_dev *pdev = adapter->pdev;
812
813 pci_free_consistent(pdev, adapter->ring_header.size,
814 adapter->ring_header.desc,
815 adapter->ring_header.dma);
816 adapter->ring_header.desc = NULL;
817
818 /* Note: just free tdp_ring.buffer_info,
819 * it contain rfd_ring.buffer_info, do not double free */
820 if (adapter->tpd_ring[0].buffer_info) {
821 kfree(adapter->tpd_ring[0].buffer_info);
822 adapter->tpd_ring[0].buffer_info = NULL;
823 }
824}
825
826/*
827 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
828 * @adapter: board private structure
829 *
830 * Return 0 on success, negative on failure
831 */
832static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
833{
834 struct pci_dev *pdev = adapter->pdev;
835 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
836 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
837 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
838 struct atl1c_ring_header *ring_header = &adapter->ring_header;
839 int num_rx_queues = adapter->num_rx_queues;
840 int size;
841 int i;
842 int count = 0;
843 int rx_desc_count = 0;
844 u32 offset = 0;
845
846 rrd_ring[0].count = rfd_ring[0].count;
847 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
848 tpd_ring[i].count = tpd_ring[0].count;
849
850 for (i = 1; i < adapter->num_rx_queues; i++)
851 rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;
852
853 /* 2 tpd queue, one high priority queue,
854 * another normal priority queue */
855 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
856 rfd_ring->count * num_rx_queues);
857 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
858 if (unlikely(!tpd_ring->buffer_info)) {
859 dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
860 size);
861 goto err_nomem;
862 }
863 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
864 tpd_ring[i].buffer_info =
865 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
866 count += tpd_ring[i].count;
867 }
868
869 for (i = 0; i < num_rx_queues; i++) {
870 rfd_ring[i].buffer_info =
871 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
872 count += rfd_ring[i].count;
873 rx_desc_count += rfd_ring[i].count;
874 }
875 /*
876 * real ring DMA buffer
877 * each ring/block may need up to 8 bytes for alignment, hence the
878 * additional bytes tacked onto the end.
879 */
880 ring_header->size = size =
881 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
882 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
883 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
884 sizeof(struct atl1c_hw_stats) +
885 8 * 4 + 8 * 2 * num_rx_queues;
886
887 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
888 &ring_header->dma);
889 if (unlikely(!ring_header->desc)) {
890 dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
891 goto err_nomem;
892 }
893 memset(ring_header->desc, 0, ring_header->size);
894 /* init TPD ring */
895
896 tpd_ring[0].dma = roundup(ring_header->dma, 8);
897 offset = tpd_ring[0].dma - ring_header->dma;
898 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
899 tpd_ring[i].dma = ring_header->dma + offset;
900 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
901 tpd_ring[i].size =
902 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
903 offset += roundup(tpd_ring[i].size, 8);
904 }
905 /* init RFD ring */
906 for (i = 0; i < num_rx_queues; i++) {
907 rfd_ring[i].dma = ring_header->dma + offset;
908 rfd_ring[i].desc = (u8 *) ring_header->desc + offset;
909 rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
910 rfd_ring[i].count;
911 offset += roundup(rfd_ring[i].size, 8);
912 }
913
914 /* init RRD ring */
915 for (i = 0; i < num_rx_queues; i++) {
916 rrd_ring[i].dma = ring_header->dma + offset;
917 rrd_ring[i].desc = (u8 *) ring_header->desc + offset;
918 rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
919 rrd_ring[i].count;
920 offset += roundup(rrd_ring[i].size, 8);
921 }
922
923 adapter->smb.dma = ring_header->dma + offset;
924 adapter->smb.smb = (u8 *)ring_header->desc + offset;
925 return 0;
926
927err_nomem:
928 kfree(tpd_ring->buffer_info);
929 return -ENOMEM;
930}
931
932static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
933{
934 struct atl1c_hw *hw = &adapter->hw;
935 struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *)
936 adapter->rfd_ring;
937 struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *)
938 adapter->rrd_ring;
939 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
940 adapter->tpd_ring;
941 struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
942 struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
943 int i;
944
945 /* TPD */
946 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
947 (u32)((tpd_ring[atl1c_trans_normal].dma &
948 AT_DMA_HI_ADDR_MASK) >> 32));
949 /* just enable normal priority TX queue */
950 AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,
951 (u32)(tpd_ring[atl1c_trans_normal].dma &
952 AT_DMA_LO_ADDR_MASK));
953 AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,
954 (u32)(tpd_ring[atl1c_trans_high].dma &
955 AT_DMA_LO_ADDR_MASK));
956 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
957 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
958
959
960 /* RFD */
961 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
962 (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
963 for (i = 0; i < adapter->num_rx_queues; i++)
964 AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i],
965 (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
966
967 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
968 rfd_ring[0].count & RFD_RING_SIZE_MASK);
969 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
970 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
971
972 /* RRD */
973 for (i = 0; i < adapter->num_rx_queues; i++)
974 AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i],
975 (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
976 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
977 (rrd_ring[0].count & RRD_RING_SIZE_MASK));
978
979 /* CMB */
980 AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
981
982 /* SMB */
983 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,
984 (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32));
985 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,
986 (u32)(smb->dma & AT_DMA_LO_ADDR_MASK));
987 /* Load all of base address above */
988 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
989}
990
991static void atl1c_configure_tx(struct atl1c_adapter *adapter)
992{
993 struct atl1c_hw *hw = &adapter->hw;
994 u32 dev_ctrl_data;
995 u32 max_pay_load;
996 u16 tx_offload_thresh;
997 u32 txq_ctrl_data;
998 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
999
1000 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
1001 tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
1002 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1003 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1004 AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
1005 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
1006 DEVICE_CTRL_MAX_PAYLOAD_MASK;
1007 hw->dmaw_block = min(max_pay_load, hw->dmaw_block);
1008 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
1009 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
1010 hw->dmar_block = min(max_pay_load, hw->dmar_block);
1011
1012 txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
1013 TXQ_NUM_TPD_BURST_SHIFT;
1014 if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
1015 txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
1016 txq_ctrl_data |= (atl1c_pay_load_size[hw->dmar_block] &
1017 TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
1018
1019 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1020}
1021
1022static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1023{
1024 struct atl1c_hw *hw = &adapter->hw;
1025 u32 rxq_ctrl_data;
1026
1027 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1028 RXQ_RFD_BURST_NUM_SHIFT;
1029
1030 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1031 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
1032 if (hw->rss_type == atl1c_rss_ipv4)
1033 rxq_ctrl_data |= RSS_HASH_IPV4;
1034 if (hw->rss_type == atl1c_rss_ipv4_tcp)
1035 rxq_ctrl_data |= RSS_HASH_IPV4_TCP;
1036 if (hw->rss_type == atl1c_rss_ipv6)
1037 rxq_ctrl_data |= RSS_HASH_IPV6;
1038 if (hw->rss_type == atl1c_rss_ipv6_tcp)
1039 rxq_ctrl_data |= RSS_HASH_IPV6_TCP;
1040 if (hw->rss_type != atl1c_rss_disable)
1041 rxq_ctrl_data |= RRS_HASH_CTRL_EN;
1042
1043 rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) <<
1044 RSS_MODE_SHIFT;
1045 rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) <<
1046 RSS_HASH_BITS_SHIFT;
1047 if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
1048 rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_100M &
1049 ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
1050
1051 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1052}
1053
1054static void atl1c_configure_rss(struct atl1c_adapter *adapter)
1055{
1056 struct atl1c_hw *hw = &adapter->hw;
1057
1058 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
1059 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
1060}
1061
1062static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1063{
1064 struct atl1c_hw *hw = &adapter->hw;
1065 u32 dma_ctrl_data;
1066
1067 dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
1068 if (hw->ctrl_flags & ATL1C_CMB_ENABLE)
1069 dma_ctrl_data |= DMA_CTRL_CMB_EN;
1070 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1071 dma_ctrl_data |= DMA_CTRL_SMB_EN;
1072 else
1073 dma_ctrl_data |= MAC_CTRL_SMB_DIS;
1074
1075 switch (hw->dma_order) {
1076 case atl1c_dma_ord_in:
1077 dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
1078 break;
1079 case atl1c_dma_ord_enh:
1080 dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
1081 break;
1082 case atl1c_dma_ord_out:
1083 dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
1084 break;
1085 default:
1086 break;
1087 }
1088
1089 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1090 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1091 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1092 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1093 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1094 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1095 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1096 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1097
1098 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1099}
1100
1101/*
1102 * Stop the mac, transmit and receive units
1103 * hw - Struct containing variables accessed by shared code
1104 * return : 0 or idle status (if error)
1105 */
1106static int atl1c_stop_mac(struct atl1c_hw *hw)
1107{
1108 u32 data;
1109 int timeout;
1110
1111 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1112 data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
1113 RXQ3_CTRL_EN | RXQ_CTRL_EN);
1114 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1115
1116 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1117 data &= ~TXQ_CTRL_EN;
1118 AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
1119
1120 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
1121 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
1122 if ((data & (IDLE_STATUS_RXQ_NO_IDLE |
1123 IDLE_STATUS_TXQ_NO_IDLE)) == 0)
1124 break;
1125 msleep(1);
1126 }
1127
1128 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1129 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1130 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1131
1132 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
1133 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
1134 if ((data & IDLE_STATUS_MASK) == 0)
1135 return 0;
1136 msleep(1);
1137 }
1138 return data;
1139}
1140
1141static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
1142{
1143 u32 data;
1144
1145 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1146 switch (hw->adapter->num_rx_queues) {
1147 case 4:
1148 data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1149 break;
1150 case 3:
1151 data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1152 break;
1153 case 2:
1154 data |= RXQ1_CTRL_EN;
1155 break;
1156 default:
1157 break;
1158 }
1159 data |= RXQ_CTRL_EN;
1160 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1161}
1162
1163static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
1164{
1165 u32 data;
1166
1167 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1168 data |= TXQ_CTRL_EN;
1169 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1170}
1171
1172/*
1173 * Reset the transmit and receive units; mask and clear all interrupts.
1174 * hw - Struct containing variables accessed by shared code
1175 * return : 0 or idle status (if error)
1176 */
1177static int atl1c_reset_mac(struct atl1c_hw *hw)
1178{
1179 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
1180 struct pci_dev *pdev = adapter->pdev;
1181 u32 idle_status_data = 0;
1182 int timeout = 0;
1183 int ret;
1184
1185 AT_WRITE_REG(hw, REG_IMR, 0);
1186 AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
1187
1188 ret = atl1c_stop_mac(hw);
1189 if (ret)
1190 return ret;
1191 /*
1192 * Issue Soft Reset to the MAC. This will reset the chip's
1193 * transmit, receive, DMA. It will not effect
1194 * the current PCI configuration. The global reset bit is self-
1195 * clearing, and should clear within a microsecond.
1196 */
1197 AT_WRITE_REGW(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);
1198 AT_WRITE_FLUSH(hw);
1199 msleep(10);
1200 /* Wait at least 10ms for All module to be Idle */
1201 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
1202 AT_READ_REG(hw, REG_IDLE_STATUS, &idle_status_data);
1203 if ((idle_status_data & IDLE_STATUS_MASK) == 0)
1204 break;
1205 msleep(1);
1206 }
1207 if (timeout >= AT_HW_MAX_IDLE_DELAY) {
1208 dev_err(&pdev->dev,
1209 "MAC state machine cann't be idle since"
1210 " disabled for 10ms second\n");
1211 return -1;
1212 }
1213 return 0;
1214}
1215
1216static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1217{
1218 u32 pm_ctrl_data;
1219
1220 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1221 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1222 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1223 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1224 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1225 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1226 pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
1227 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1228
1229 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1230 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1231 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1232 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1233}
1234
1235/*
1236 * Set ASPM state.
1237 * Enable/disable L0s/L1 depend on link state.
1238 */
1239static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
1240{
1241 u32 pm_ctrl_data;
1242
1243 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1244
52fbc100 1245 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
43250ddd
JY		 1246 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1247 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1248
1249 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
1250
1251 if (linkup) {
1252 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1253 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1254
52fbc100
JY		 1255 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1256 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
43250ddd 1257 } else {
52fbc100
JY		 1258 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1259 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
43250ddd
JY		 1260 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1261 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1262
1263 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1264
1265 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1266 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1267 else
1268 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1269 }
1270
1271 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1272}
1273
1274static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
1275{
1276 struct atl1c_hw *hw = &adapter->hw;
1277 struct net_device *netdev = adapter->netdev;
1278 u32 mac_ctrl_data;
1279
1280 mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1281 mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1282
1283 if (adapter->link_duplex == FULL_DUPLEX) {
1284 hw->mac_duplex = true;
1285 mac_ctrl_data |= MAC_CTRL_DUPLX;
1286 }
1287
1288 if (adapter->link_speed == SPEED_1000)
1289 hw->mac_speed = atl1c_mac_speed_1000;
1290 else
1291 hw->mac_speed = atl1c_mac_speed_10_100;
1292
1293 mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
1294 MAC_CTRL_SPEED_SHIFT;
1295
1296 mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1297 mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1298 MAC_CTRL_PRMLEN_SHIFT);
1299
1300 if (adapter->vlgrp)
1301 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
1302
1303 mac_ctrl_data |= MAC_CTRL_BC_EN;
1304 if (netdev->flags & IFF_PROMISC)
1305 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
1306 if (netdev->flags & IFF_ALLMULTI)
1307 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
1308
1309 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
1310 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
1311}
1312
1313/*
1314 * atl1c_configure - Configure Transmit&Receive Unit after Reset
1315 * @adapter: board private structure
1316 *
1317 * Configure the Tx /Rx unit of the MAC after a reset.
1318 */
1319static int atl1c_configure(struct atl1c_adapter *adapter)
1320{
1321 struct atl1c_hw *hw = &adapter->hw;
1322 u32 master_ctrl_data = 0;
1323 u32 intr_modrt_data;
1324
1325 /* clear interrupt status */
1326 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1327 /* Clear any WOL status */
1328 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1329 /* set Interrupt Clear Timer
1330 * HW will enable self to assert interrupt event to system after
1331 * waiting x-time for software to notify it accept interrupt.
1332 */
1333 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1334 hw->ict & INT_RETRIG_TIMER_MASK);
1335
1336 atl1c_configure_des_ring(adapter);
1337
1338 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1339 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1340 IRQ_MODRT_TX_TIMER_SHIFT;
1341 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1342 IRQ_MODRT_RX_TIMER_SHIFT;
1343 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1344 master_ctrl_data |=
1345 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1346 }
1347
1348 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1349 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1350
1351 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1352
1353 if (hw->ctrl_flags & ATL1C_CMB_ENABLE) {
1354 AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,
1355 hw->cmb_tpd & CMB_TPD_THRESH_MASK);
1356 AT_WRITE_REG(hw, REG_CMB_TX_TIMER,
1357 hw->cmb_tx_timer & CMB_TX_TIMER_MASK);
1358 }
1359
1360 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1361 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1362 hw->smb_timer & SMB_STAT_TIMER_MASK);
1363 /* set MTU */
1364 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1365 VLAN_HLEN + ETH_FCS_LEN);
1366 /* HDS, disable */
1367 AT_WRITE_REG(hw, REG_HDS_CTRL, 0);
1368
1369 atl1c_configure_tx(adapter);
1370 atl1c_configure_rx(adapter);
1371 atl1c_configure_rss(adapter);
1372 atl1c_configure_dma(adapter);
1373
1374 return 0;
1375}
1376
1377static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1378{
1379 u16 hw_reg_addr = 0;
1380 unsigned long *stats_item = NULL;
1381 u32 data;
1382
1383 /* update rx status */
1384 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1385 stats_item = &adapter->hw_stats.rx_ok;
1386 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1387 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1388 *stats_item += data;
1389 stats_item++;
1390 hw_reg_addr += 4;
1391 }
1392/* update tx status */
1393 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1394 stats_item = &adapter->hw_stats.tx_ok;
1395 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1396 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1397 *stats_item += data;
1398 stats_item++;
1399 hw_reg_addr += 4;
1400 }
1401}
1402
1403/*
1404 * atl1c_get_stats - Get System Network Statistics
1405 * @netdev: network interface device structure
1406 *
1407 * Returns the address of the device statistics structure.
1408 * The statistics are actually updated from the timer callback.
1409 */
1410static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1411{
1412 struct atl1c_adapter *adapter = netdev_priv(netdev);
1413 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
1414 struct net_device_stats *net_stats = &adapter->net_stats;
1415
1416 atl1c_update_hw_stats(adapter);
1417 net_stats->rx_packets = hw_stats->rx_ok;
1418 net_stats->tx_packets = hw_stats->tx_ok;
1419 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1420 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1421 net_stats->multicast = hw_stats->rx_mcast;
1422 net_stats->collisions = hw_stats->tx_1_col +
1423 hw_stats->tx_2_col * 2 +
1424 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1425 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1426 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1427 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1428 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1429 net_stats->rx_length_errors = hw_stats->rx_len_err;
1430 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1431 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1432 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1433
1434 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1435
1436 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1437 hw_stats->tx_underrun + hw_stats->tx_trunc;
1438 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1439 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1440 net_stats->tx_window_errors = hw_stats->tx_late_col;
1441
1442 return &adapter->net_stats;
1443}
1444
1445static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1446{
1447 u16 phy_data;
1448
1449 spin_lock(&adapter->mdio_lock);
1450 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1451 spin_unlock(&adapter->mdio_lock);
1452}
1453
1454static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
1455 enum atl1c_trans_queue type)
1456{
1457 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1458 &adapter->tpd_ring[type];
1459 struct atl1c_buffer *buffer_info;
1460 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1461 u16 hw_next_to_clean;
1462 u16 shift;
1463 u32 data;
1464
1465 if (type == atl1c_trans_high)
1466 shift = MB_HTPD_CONS_IDX_SHIFT;
1467 else
1468 shift = MB_NTPD_CONS_IDX_SHIFT;
1469
1470 AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data);
1471 hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK;
1472
1473 while (next_to_clean != hw_next_to_clean) {
1474 buffer_info = &tpd_ring->buffer_info[next_to_clean];
1475 if (buffer_info->state == ATL1_BUFFER_BUSY) {
1476 pci_unmap_page(adapter->pdev, buffer_info->dma,
1477 buffer_info->length, PCI_DMA_TODEVICE);
1478 buffer_info->dma = 0;
1479 if (buffer_info->skb) {
1480 dev_kfree_skb_irq(buffer_info->skb);
1481 buffer_info->skb = NULL;
1482 }
1483 buffer_info->state = ATL1_BUFFER_FREE;
1484 }
1485 if (++next_to_clean == tpd_ring->count)
1486 next_to_clean = 0;
1487 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1488 }
1489
1490 if (netif_queue_stopped(adapter->netdev) &&
1491 netif_carrier_ok(adapter->netdev)) {
1492 netif_wake_queue(adapter->netdev);
1493 }
1494
1495 return true;
1496}
1497
1498/*
1499 * atl1c_intr - Interrupt Handler
1500 * @irq: interrupt number
1501 * @data: pointer to a network interface device structure
1502 * @pt_regs: CPU registers structure
1503 */
1504static irqreturn_t atl1c_intr(int irq, void *data)
1505{
1506 struct net_device *netdev = data;
1507 struct atl1c_adapter *adapter = netdev_priv(netdev);
1508 struct pci_dev *pdev = adapter->pdev;
1509 struct atl1c_hw *hw = &adapter->hw;
1510 int max_ints = AT_MAX_INT_WORK;
1511 int handled = IRQ_NONE;
1512 u32 status;
1513 u32 reg_data;
1514
1515 do {
1516 AT_READ_REG(hw, REG_ISR, &reg_data);
1517 status = reg_data & hw->intr_mask;
1518
1519 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1520 if (max_ints != AT_MAX_INT_WORK)
1521 handled = IRQ_HANDLED;
1522 break;
1523 }
1524 /* link event */
1525 if (status & ISR_GPHY)
1526 atl1c_clear_phy_int(adapter);
1527 /* Ack ISR */
1528 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1529 if (status & ISR_RX_PKT) {
1530 if (likely(napi_schedule_prep(&adapter->napi))) {
1531 hw->intr_mask &= ~ISR_RX_PKT;
1532 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1533 __napi_schedule(&adapter->napi);
1534 }
1535 }
1536 if (status & ISR_TX_PKT)
1537 atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
1538
1539 handled = IRQ_HANDLED;
1540 /* check if PCIE PHY Link down */
1541 if (status & ISR_ERROR) {
1542 if (netif_msg_hw(adapter))
1543 dev_err(&pdev->dev,
1544 "atl1c hardware error (status = 0x%x)\n",
1545 status & ISR_ERROR);
1546 /* reset MAC */
1547 hw->intr_mask &= ~ISR_ERROR;
1548 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1549 schedule_work(&adapter->reset_task);
1550 break;
1551 }
1552
1553 if (status & ISR_OVER)
1554 if (netif_msg_intr(adapter))
1555 dev_warn(&pdev->dev,
1556 "TX/RX over flow (status = 0x%x)\n",
1557 status & ISR_OVER);
1558
1559 /* link event */
1560 if (status & (ISR_GPHY | ISR_MANUAL)) {
1561 adapter->net_stats.tx_carrier_errors++;
1562 atl1c_link_chg_event(adapter);
1563 break;
1564 }
1565
1566 } while (--max_ints > 0);
1567 /* re-enable Interrupt*/
1568 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1569 return handled;
1570}
1571
1572static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1573 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1574{
1575 /*
1576 * The pid field in RRS in not correct sometimes, so we
1577 * cannot figure out if the packet is fragmented or not,
1578 * so we tell the KERNEL CHECKSUM_NONE
1579 */
1580 skb->ip_summed = CHECKSUM_NONE;
1581}
1582
1583static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid)
1584{
1585 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid];
1586 struct pci_dev *pdev = adapter->pdev;
1587 struct atl1c_buffer *buffer_info, *next_info;
1588 struct sk_buff *skb;
1589 void *vir_addr = NULL;
1590 u16 num_alloc = 0;
1591 u16 rfd_next_to_use, next_next;
1592 struct atl1c_rx_free_desc *rfd_desc;
1593
1594 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1595 if (++next_next == rfd_ring->count)
1596 next_next = 0;
1597 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1598 next_info = &rfd_ring->buffer_info[next_next];
1599
1600 while (next_info->state == ATL1_BUFFER_FREE) {
1601 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1602
1603 skb = dev_alloc_skb(adapter->rx_buffer_len);
1604 if (unlikely(!skb)) {
1605 if (netif_msg_rx_err(adapter))
1606 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1607 break;
1608 }
1609
1610 /*
1611 * Make buffer alignment 2 beyond a 16 byte boundary
1612 * this will result in a 16 byte aligned IP header after
1613 * the 14 byte MAC header is removed
1614 */
1615 vir_addr = skb->data;
1616 buffer_info->state = ATL1_BUFFER_BUSY;
1617 buffer_info->skb = skb;
1618 buffer_info->length = adapter->rx_buffer_len;
1619 buffer_info->dma = pci_map_single(pdev, vir_addr,
1620 buffer_info->length,
1621 PCI_DMA_FROMDEVICE);
1622 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1623 rfd_next_to_use = next_next;
1624 if (++next_next == rfd_ring->count)
1625 next_next = 0;
1626 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1627 next_info = &rfd_ring->buffer_info[next_next];
1628 num_alloc++;
1629 }
1630
1631 if (num_alloc) {
1632 /* TODO: update mailbox here */
1633 wmb();
1634 rfd_ring->next_to_use = rfd_next_to_use;
1635 AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid],
1636 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1637 }
1638
1639 return num_alloc;
1640}
1641
1642static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1643 struct atl1c_recv_ret_status *rrs, u16 num)
1644{
1645 u16 i;
1646 /* the relationship between rrd and rfd is one map one */
1647 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1648 rrd_ring->next_to_clean)) {
1649 rrs->word3 &= ~RRS_RXD_UPDATED;
1650 if (++rrd_ring->next_to_clean == rrd_ring->count)
1651 rrd_ring->next_to_clean = 0;
1652 }
1653}
1654
1655static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1656 struct atl1c_recv_ret_status *rrs, u16 num)
1657{
1658 u16 i;
1659 u16 rfd_index;
1660 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1661
1662 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1663 RRS_RX_RFD_INDEX_MASK;
1664 for (i = 0; i < num; i++) {
1665 buffer_info[rfd_index].skb = NULL;
1666 buffer_info[rfd_index].state = ATL1_BUFFER_FREE;
1667 if (++rfd_index == rfd_ring->count)
1668 rfd_index = 0;
1669 }
1670 rfd_ring->next_to_clean = rfd_index;
1671}
1672
1673static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
1674 int *work_done, int work_to_do)
1675{
1676 u16 rfd_num, rfd_index;
1677 u16 count = 0;
1678 u16 length;
1679 struct pci_dev *pdev = adapter->pdev;
1680 struct net_device *netdev = adapter->netdev;
1681 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que];
1682 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que];
1683 struct sk_buff *skb;
1684 struct atl1c_recv_ret_status *rrs;
1685 struct atl1c_buffer *buffer_info;
1686
1687 while (1) {
1688 if (*work_done >= work_to_do)
1689 break;
1690 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1691 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1692 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1693 RRS_RX_RFD_CNT_MASK;
1694 if (unlikely(rfd_num) != 1)
1695 /* TODO support mul rfd*/
1696 if (netif_msg_rx_err(adapter))
1697 dev_warn(&pdev->dev,
1698 "Multi rfd not support yet!\n");
1699 goto rrs_checked;
1700 } else {
1701 break;
1702 }
1703rrs_checked:
1704 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1705 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1706 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1707 if (netif_msg_rx_err(adapter))
1708 dev_warn(&pdev->dev,
1709 "wrong packet! rrs word3 is %x\n",
1710 rrs->word3);
1711 continue;
1712 }
1713
1714 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1715 RRS_PKT_SIZE_MASK);
1716 /* Good Receive */
1717 if (likely(rfd_num == 1)) {
1718 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1719 RRS_RX_RFD_INDEX_MASK;
1720 buffer_info = &rfd_ring->buffer_info[rfd_index];
1721 pci_unmap_single(pdev, buffer_info->dma,
1722 buffer_info->length, PCI_DMA_FROMDEVICE);
1723 skb = buffer_info->skb;
1724 } else {
1725 /* TODO */
1726 if (netif_msg_rx_err(adapter))
1727 dev_warn(&pdev->dev,
1728 "Multi rfd not support yet!\n");
1729 break;
1730 }
1731 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1732 skb_put(skb, length - ETH_FCS_LEN);
1733 skb->protocol = eth_type_trans(skb, netdev);
1734 skb->dev = netdev;
1735 atl1c_rx_checksum(adapter, skb, rrs);
1736 if (unlikely(adapter->vlgrp) && rrs->word3 & RRS_VLAN_INS) {
1737 u16 vlan;
1738
1739 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1740 vlan = le16_to_cpu(vlan);
1741 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vlan);
1742 } else
1743 netif_receive_skb(skb);
1744
1745 netdev->last_rx = jiffies;
1746 (*work_done)++;
1747 count++;
1748 }
1749 if (count)
1750 atl1c_alloc_rx_buffer(adapter, que);
1751}
1752
1753/*
1754 * atl1c_clean - NAPI Rx polling callback
1755 * @adapter: board private structure
1756 */
1757static int atl1c_clean(struct napi_struct *napi, int budget)
1758{
1759 struct atl1c_adapter *adapter =
1760 container_of(napi, struct atl1c_adapter, napi);
1761 int work_done = 0;
1762
1763 /* Keep link state information with original netdev */
1764 if (!netif_carrier_ok(adapter->netdev))
1765 goto quit_polling;
1766 /* just enable one RXQ */
1767 atl1c_clean_rx_irq(adapter, 0, &work_done, budget);
1768
1769 if (work_done < budget) {
1770quit_polling:
1771 napi_complete(napi);
1772 adapter->hw.intr_mask |= ISR_RX_PKT;
1773 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1774 }
1775 return work_done;
1776}
1777
1778#ifdef CONFIG_NET_POLL_CONTROLLER
1779
1780/*
1781 * Polling 'interrupt' - used by things like netconsole to send skbs
1782 * without having to re-enable interrupts. It's not called while
1783 * the interrupt routine is executing.
1784 */
1785static void atl1c_netpoll(struct net_device *netdev)
1786{
1787 struct atl1c_adapter *adapter = netdev_priv(netdev);
1788
1789 disable_irq(adapter->pdev->irq);
1790 atl1c_intr(adapter->pdev->irq, netdev);
1791 enable_irq(adapter->pdev->irq);
1792}
1793#endif
1794
1795static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1796{
1797 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1798 u16 next_to_use = 0;
1799 u16 next_to_clean = 0;
1800
1801 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1802 next_to_use = tpd_ring->next_to_use;
1803
1804 return (u16)(next_to_clean > next_to_use) ?
1805 (next_to_clean - next_to_use - 1) :
1806 (tpd_ring->count + next_to_clean - next_to_use - 1);
1807}
1808
1809/*
1810 * get next usable tpd
1811 * Note: should call atl1c_tdp_avail to make sure
1812 * there is enough tpd to use
1813 */
1814static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1815 enum atl1c_trans_queue type)
1816{
1817 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1818 struct atl1c_tpd_desc *tpd_desc;
1819 u16 next_to_use = 0;
1820
1821 next_to_use = tpd_ring->next_to_use;
1822 if (++tpd_ring->next_to_use == tpd_ring->count)
1823 tpd_ring->next_to_use = 0;
1824 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1825 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1826 return tpd_desc;
1827}
1828
1829static struct atl1c_buffer *
1830atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1831{
1832 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1833
1834 return &tpd_ring->buffer_info[tpd -
1835 (struct atl1c_tpd_desc *)tpd_ring->desc];
1836}
1837
1838/* Calculate the transmit packet descript needed*/
1839static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
1840{
1841 u16 tpd_req;
1842 u16 proto_hdr_len = 0;
1843
1844 tpd_req = skb_shinfo(skb)->nr_frags + 1;
1845
1846 if (skb_is_gso(skb)) {
1847 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1848 if (proto_hdr_len < skb_headlen(skb))
1849 tpd_req++;
1850 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
1851 tpd_req++;
1852 }
1853 return tpd_req;
1854}
1855
1856static int atl1c_tso_csum(struct atl1c_adapter *adapter,
1857 struct sk_buff *skb,
1858 struct atl1c_tpd_desc **tpd,
1859 enum atl1c_trans_queue type)
1860{
1861 struct pci_dev *pdev = adapter->pdev;
1862 u8 hdr_len;
1863 u32 real_len;
1864 unsigned short offload_type;
1865 int err;
1866
1867 if (skb_is_gso(skb)) {
1868 if (skb_header_cloned(skb)) {
1869 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1870 if (unlikely(err))
1871 return -1;
1872 }
1873 offload_type = skb_shinfo(skb)->gso_type;
1874
1875 if (offload_type & SKB_GSO_TCPV4) {
1876 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1877 + ntohs(ip_hdr(skb)->tot_len));
1878
1879 if (real_len < skb->len)
1880 pskb_trim(skb, real_len);
1881
1882 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1883 if (unlikely(skb->len == hdr_len)) {
1884 /* only xsum need */
1885 if (netif_msg_tx_queued(adapter))
1886 dev_warn(&pdev->dev,
1887 "IPV4 tso with zero data??\n");
1888 goto check_sum;
1889 } else {
1890 ip_hdr(skb)->check = 0;
1891 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1892 ip_hdr(skb)->saddr,
1893 ip_hdr(skb)->daddr,
1894 0, IPPROTO_TCP, 0);
1895 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
1896 }
1897 }
1898
1899 if (offload_type & SKB_GSO_TCPV6) {
1900 struct atl1c_tpd_ext_desc *etpd =
1901 *(struct atl1c_tpd_ext_desc **)(tpd);
1902
1903 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
1904 *tpd = atl1c_get_tpd(adapter, type);
1905 ipv6_hdr(skb)->payload_len = 0;
1906 /* check payload == 0 byte ? */
1907 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1908 if (unlikely(skb->len == hdr_len)) {
1909 /* only xsum need */
1910 if (netif_msg_tx_queued(adapter))
1911 dev_warn(&pdev->dev,
1912 "IPV6 tso with zero data??\n");
1913 goto check_sum;
1914 } else
1915 tcp_hdr(skb)->check = ~csum_ipv6_magic(
1916 &ipv6_hdr(skb)->saddr,
1917 &ipv6_hdr(skb)->daddr,
1918 0, IPPROTO_TCP, 0);
1919 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
1920 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
1921 etpd->pkt_len = cpu_to_le32(skb->len);
1922 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
1923 }
1924
1925 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
1926 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
1927 TPD_TCPHDR_OFFSET_SHIFT;
1928 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
1929 TPD_MSS_SHIFT;
1930 return 0;
1931 }
1932
1933check_sum:
1934 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1935 u8 css, cso;
1936 cso = skb_transport_offset(skb);
1937
1938 if (unlikely(cso & 0x1)) {
1939 if (netif_msg_tx_err(adapter))
1940 dev_err(&adapter->pdev->dev,
1941 "payload offset should not an event number\n");
1942 return -1;
1943 } else {
1944 css = cso + skb->csum_offset;
1945
1946 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
1947 TPD_PLOADOFFSET_SHIFT;
1948 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
1949 TPD_CCSUM_OFFSET_SHIFT;
1950 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
1951 }
1952 }
1953 return 0;
1954}
1955
1956static void atl1c_tx_map(struct atl1c_adapter *adapter,
1957 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
1958 enum atl1c_trans_queue type)
1959{
1960 struct atl1c_tpd_desc *use_tpd = NULL;
1961 struct atl1c_buffer *buffer_info = NULL;
1962 u16 buf_len = skb_headlen(skb);
1963 u16 map_len = 0;
1964 u16 mapped_len = 0;
1965 u16 hdr_len = 0;
1966 u16 nr_frags;
1967 u16 f;
1968 int tso;
1969
1970 nr_frags = skb_shinfo(skb)->nr_frags;
1971 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
1972 if (tso) {
1973 /* TSO */
1974 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1975 use_tpd = tpd;
1976
1977 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
1978 buffer_info->length = map_len;
1979 buffer_info->dma = pci_map_single(adapter->pdev,
1980 skb->data, hdr_len, PCI_DMA_TODEVICE);
1981 buffer_info->state = ATL1_BUFFER_BUSY;
1982 mapped_len += map_len;
1983 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
1984 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
1985 }
1986
1987 if (mapped_len < buf_len) {
1988 /* mapped_len == 0, means we should use the first tpd,
1989 which is given by caller */
1990 if (mapped_len == 0)
1991 use_tpd = tpd;
1992 else {
1993 use_tpd = atl1c_get_tpd(adapter, type);
1994 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
1995 use_tpd = atl1c_get_tpd(adapter, type);
1996 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
1997 }
1998 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
1999 buffer_info->length = buf_len - mapped_len;
2000 buffer_info->dma =
2001 pci_map_single(adapter->pdev, skb->data + mapped_len,
2002 buffer_info->length, PCI_DMA_TODEVICE);
2003 buffer_info->state = ATL1_BUFFER_BUSY;
2004
2005 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2006 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2007 }
2008
2009 for (f = 0; f < nr_frags; f++) {
2010 struct skb_frag_struct *frag;
2011
2012 frag = &skb_shinfo(skb)->frags[f];
2013
2014 use_tpd = atl1c_get_tpd(adapter, type);
2015 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2016
2017 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2018 buffer_info->length = frag->size;
2019 buffer_info->dma =
2020 pci_map_page(adapter->pdev, frag->page,
2021 frag->page_offset,
2022 buffer_info->length,
2023 PCI_DMA_TODEVICE);
2024 buffer_info->state = ATL1_BUFFER_BUSY;
2025
2026 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2027 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2028 }
2029
2030 /* The last tpd */
2031 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2032 /* The last buffer info contain the skb address,
2033 so it will be free after unmap */
2034 buffer_info->skb = skb;
2035}
2036
2037static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
2038 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
2039{
2040 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
2041 u32 prod_data;
2042
2043 AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data);
2044 switch (type) {
2045 case atl1c_trans_high:
2046 prod_data &= 0xFFFF0000;
2047 prod_data |= tpd_ring->next_to_use & 0xFFFF;
2048 break;
2049 case atl1c_trans_normal:
2050 prod_data &= 0x0000FFFF;
2051 prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16;
2052 break;
2053 default:
2054 break;
2055 }
2056 wmb();
2057 AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
2058}
2059
2060static int atl1c_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2061{
2062 struct atl1c_adapter *adapter = netdev_priv(netdev);
2063 unsigned long flags;
2064 u16 tpd_req = 1;
2065 struct atl1c_tpd_desc *tpd;
2066 enum atl1c_trans_queue type = atl1c_trans_normal;
2067
2068 if (test_bit(__AT_DOWN, &adapter->flags)) {
2069 dev_kfree_skb_any(skb);
2070 return NETDEV_TX_OK;
2071 }
2072
2073 tpd_req = atl1c_cal_tpd_req(skb);
2074 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
2075 if (netif_msg_pktdata(adapter))
2076 dev_info(&adapter->pdev->dev, "tx locked\n");
2077 return NETDEV_TX_LOCKED;
2078 }
2079 if (skb->mark == 0x01)
2080 type = atl1c_trans_high;
2081 else
2082 type = atl1c_trans_normal;
2083
2084 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2085 /* no enough descriptor, just stop queue */
2086 netif_stop_queue(netdev);
2087 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2088 return NETDEV_TX_BUSY;
2089 }
2090
2091 tpd = atl1c_get_tpd(adapter, type);
2092
2093 /* do TSO and check sum */
2094 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
2095 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2096 dev_kfree_skb_any(skb);
2097 return NETDEV_TX_OK;
2098 }
2099
2100 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2101 u16 vlan = vlan_tx_tag_get(skb);
2102 __le16 tag;
2103
2104 vlan = cpu_to_le16(vlan);
2105 AT_VLAN_TO_TAG(vlan, tag);
2106 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2107 tpd->vlan_tag = tag;
2108 }
2109
2110 if (skb_network_offset(skb) != ETH_HLEN)
2111 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2112
2113 atl1c_tx_map(adapter, skb, tpd, type);
2114 atl1c_tx_queue(adapter, skb, tpd, type);
2115
2116 netdev->trans_start = jiffies;
2117 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2118 return NETDEV_TX_OK;
2119}
2120
2121static void atl1c_free_irq(struct atl1c_adapter *adapter)
2122{
2123 struct net_device *netdev = adapter->netdev;
2124
2125 free_irq(adapter->pdev->irq, netdev);
2126
2127 if (adapter->have_msi)
2128 pci_disable_msi(adapter->pdev);
2129}
2130
2131static int atl1c_request_irq(struct atl1c_adapter *adapter)
2132{
2133 struct pci_dev *pdev = adapter->pdev;
2134 struct net_device *netdev = adapter->netdev;
2135 int flags = 0;
2136 int err = 0;
2137
2138 adapter->have_msi = true;
2139 err = pci_enable_msi(adapter->pdev);
2140 if (err) {
2141 if (netif_msg_ifup(adapter))
2142 dev_err(&pdev->dev,
2143 "Unable to allocate MSI interrupt Error: %d\n",
2144 err);
2145 adapter->have_msi = false;
2146 } else
2147 netdev->irq = pdev->irq;
2148
2149 if (!adapter->have_msi)
2150 flags |= IRQF_SHARED;
2151 err = request_irq(adapter->pdev->irq, &atl1c_intr, flags,
2152 netdev->name, netdev);
2153 if (err) {
2154 if (netif_msg_ifup(adapter))
2155 dev_err(&pdev->dev,
2156 "Unable to allocate interrupt Error: %d\n",
2157 err);
2158 if (adapter->have_msi)
2159 pci_disable_msi(adapter->pdev);
2160 return err;
2161 }
2162 if (netif_msg_ifup(adapter))
2163 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2164 return err;
2165}
2166
2167int atl1c_up(struct atl1c_adapter *adapter)
2168{
2169 struct net_device *netdev = adapter->netdev;
2170 int num;
2171 int err;
2172 int i;
2173
2174 netif_carrier_off(netdev);
2175 atl1c_init_ring_ptrs(adapter);
2176 atl1c_set_multi(netdev);
2177 atl1c_restore_vlan(adapter);
2178
2179 for (i = 0; i < adapter->num_rx_queues; i++) {
2180 num = atl1c_alloc_rx_buffer(adapter, i);
2181 if (unlikely(num == 0)) {
2182 err = -ENOMEM;
2183 goto err_alloc_rx;
2184 }
2185 }
2186
2187 if (atl1c_configure(adapter)) {
2188 err = -EIO;
2189 goto err_up;
2190 }
2191
2192 err = atl1c_request_irq(adapter);
2193 if (unlikely(err))
2194 goto err_up;
2195
2196 clear_bit(__AT_DOWN, &adapter->flags);
2197 napi_enable(&adapter->napi);
2198 atl1c_irq_enable(adapter);
2199 atl1c_check_link_status(adapter);
2200 netif_start_queue(netdev);
2201 return err;
2202
2203err_up:
2204err_alloc_rx:
2205 atl1c_clean_rx_ring(adapter);
2206 return err;
2207}
2208
2209void atl1c_down(struct atl1c_adapter *adapter)
2210{
2211 struct net_device *netdev = adapter->netdev;
2212
2213 atl1c_del_timer(adapter);
2214 atl1c_cancel_work(adapter);
2215
2216 /* signal that we're down so the interrupt handler does not
2217 * reschedule our watchdog timer */
2218 set_bit(__AT_DOWN, &adapter->flags);
2219 netif_carrier_off(netdev);
2220 napi_disable(&adapter->napi);
2221 atl1c_irq_disable(adapter);
2222 atl1c_free_irq(adapter);
2223 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
2224 /* reset MAC to disable all RX/TX */
2225 atl1c_reset_mac(&adapter->hw);
2226 msleep(1);
2227
2228 adapter->link_speed = SPEED_0;
2229 adapter->link_duplex = -1;
2230 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2231 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2232 atl1c_clean_rx_ring(adapter);
2233}
2234
2235/*
2236 * atl1c_open - Called when a network interface is made active
2237 * @netdev: network interface device structure
2238 *
2239 * Returns 0 on success, negative value on failure
2240 *
2241 * The open entry point is called when a network interface is made
2242 * active by the system (IFF_UP). At this point all resources needed
2243 * for transmit and receive operations are allocated, the interrupt
2244 * handler is registered with the OS, the watchdog timer is started,
2245 * and the stack is notified that the interface is ready.
2246 */
2247static int atl1c_open(struct net_device *netdev)
2248{
2249 struct atl1c_adapter *adapter = netdev_priv(netdev);
2250 int err;
2251
2252 /* disallow open during test */
2253 if (test_bit(__AT_TESTING, &adapter->flags))
2254 return -EBUSY;
2255
2256 /* allocate rx/tx dma buffer & descriptors */
2257 err = atl1c_setup_ring_resources(adapter);
2258 if (unlikely(err))
2259 return err;
2260
2261 err = atl1c_up(adapter);
2262 if (unlikely(err))
2263 goto err_up;
2264
2265 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
2266 u32 phy_data;
2267
2268 AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
2269 phy_data |= MDIO_AP_EN;
2270 AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
2271 }
2272 return 0;
2273
2274err_up:
2275 atl1c_free_irq(adapter);
2276 atl1c_free_ring_resources(adapter);
2277 atl1c_reset_mac(&adapter->hw);
2278 return err;
2279}
2280
2281/*
2282 * atl1c_close - Disables a network interface
2283 * @netdev: network interface device structure
2284 *
2285 * Returns 0, this is not allowed to fail
2286 *
2287 * The close entry point is called when an interface is de-activated
2288 * by the OS. The hardware is still under the drivers control, but
2289 * needs to be disabled. A global MAC reset is issued to stop the
2290 * hardware, and all transmit and receive resources are freed.
2291 */
2292static int atl1c_close(struct net_device *netdev)
2293{
2294 struct atl1c_adapter *adapter = netdev_priv(netdev);
2295
2296 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2297 atl1c_down(adapter);
2298 atl1c_free_ring_resources(adapter);
2299 return 0;
2300}
2301
2302static int atl1c_suspend(struct pci_dev *pdev, pm_message_t state)
2303{
2304 struct net_device *netdev = pci_get_drvdata(pdev);
2305 struct atl1c_adapter *adapter = netdev_priv(netdev);
2306 struct atl1c_hw *hw = &adapter->hw;
2307 u32 ctrl;
2308 u32 mac_ctrl_data;
2309 u32 master_ctrl_data;
2310 u32 wol_ctrl_data;
2311 u16 mii_bmsr_data;
2312 u16 save_autoneg_advertised;
2313 u16 mii_intr_status_data;
2314 u32 wufc = adapter->wol;
2315 u32 i;
2316 int retval = 0;
2317
2318 if (netif_running(netdev)) {
2319 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2320 atl1c_down(adapter);
2321 }
2322 netif_device_detach(netdev);
2323 atl1c_disable_l0s_l1(hw);
2324 retval = pci_save_state(pdev);
2325 if (retval)
2326 return retval;
2327 if (wufc) {
2328 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
2329 master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
2330
2331 /* get link status */
2332 atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2333 atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2334 save_autoneg_advertised = hw->autoneg_advertised;
2335 hw->autoneg_advertised = ADVERTISED_10baseT_Half;
2336 if (atl1c_restart_autoneg(hw) != 0)
2337 if (netif_msg_link(adapter))
2338 dev_warn(&pdev->dev, "phy autoneg failed\n");
2339 hw->phy_configured = false; /* re-init PHY when resume */
2340 hw->autoneg_advertised = save_autoneg_advertised;
2341 /* turn on magic packet wol */
2342 if (wufc & AT_WUFC_MAG)
2343 wol_ctrl_data = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2344
2345 if (wufc & AT_WUFC_LNKC) {
2346 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2347 msleep(100);
2348 atl1c_read_phy_reg(hw, MII_BMSR,
2349 (u16 *)&mii_bmsr_data);
2350 if (mii_bmsr_data & BMSR_LSTATUS)
2351 break;
2352 }
2353 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2354 if (netif_msg_link(adapter))
2355 dev_warn(&pdev->dev,
2356 "%s: Link may change"
2357 "when suspend\n",
2358 atl1c_driver_name);
2359 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2360 /* only link up can wake up */
2361 if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
2362 if (netif_msg_link(adapter))
2363 dev_err(&pdev->dev,
2364 "%s: read write phy "
2365 "register failed.\n",
2366 atl1c_driver_name);
2367 goto wol_dis;
2368 }
2369 }
2370 /* clear phy interrupt */
2371 atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
2372 /* Config MAC Ctrl register */
2373 mac_ctrl_data = MAC_CTRL_RX_EN;
2374 /* set to 10/100M halt duplex */
2375 mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
2376 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2377 MAC_CTRL_PRMLEN_MASK) <<
2378 MAC_CTRL_PRMLEN_SHIFT);
2379
2380 if (adapter->vlgrp)
2381 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
2382
2383 /* magic packet maybe Broadcast&multicast&Unicast frame */
2384 if (wufc & AT_WUFC_MAG)
2385 mac_ctrl_data |= MAC_CTRL_BC_EN;
2386
2387 if (netif_msg_hw(adapter))
2388 dev_dbg(&pdev->dev,
2389 "%s: suspend MAC=0x%x\n",
2390 atl1c_driver_name, mac_ctrl_data);
2391 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2392 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2393 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2394
2395 /* pcie patch */
2396 AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
2397 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2398 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2399
2400 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2401 goto suspend_exit;
2402 }
2403wol_dis:
2404
2405 /* WOL disabled */
2406 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2407
2408 /* pcie patch */
2409 AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
2410 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2411 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2412
2413 atl1c_phy_disable(hw);
2414 hw->phy_configured = false; /* re-init PHY when resume */
2415
2416 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2417suspend_exit:
2418
2419 pci_disable_device(pdev);
2420 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2421
2422 return 0;
2423}
2424
2425static int atl1c_resume(struct pci_dev *pdev)
2426{
2427 struct net_device *netdev = pci_get_drvdata(pdev);
2428 struct atl1c_adapter *adapter = netdev_priv(netdev);
2429
2430 pci_set_power_state(pdev, PCI_D0);
2431 pci_restore_state(pdev);
2432 pci_enable_wake(pdev, PCI_D3hot, 0);
2433 pci_enable_wake(pdev, PCI_D3cold, 0);
2434
2435 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2436
2437 atl1c_phy_reset(&adapter->hw);
2438 atl1c_reset_mac(&adapter->hw);
2439 netif_device_attach(netdev);
2440 if (netif_running(netdev))
2441 atl1c_up(adapter);
2442
2443 return 0;
2444}
2445
2446static void atl1c_shutdown(struct pci_dev *pdev)
2447{
2448 atl1c_suspend(pdev, PMSG_SUSPEND);
2449}
2450
2451static const struct net_device_ops atl1c_netdev_ops = {
2452 .ndo_open = atl1c_open,
2453 .ndo_stop = atl1c_close,
2454 .ndo_validate_addr = eth_validate_addr,
2455 .ndo_start_xmit = atl1c_xmit_frame,
2456 .ndo_set_mac_address = atl1c_set_mac_addr,
2457 .ndo_set_multicast_list = atl1c_set_multi,
2458 .ndo_change_mtu = atl1c_change_mtu,
2459 .ndo_do_ioctl = atl1c_ioctl,
2460 .ndo_tx_timeout = atl1c_tx_timeout,
2461 .ndo_get_stats = atl1c_get_stats,
2462 .ndo_vlan_rx_register = atl1c_vlan_rx_register,
2463#ifdef CONFIG_NET_POLL_CONTROLLER
2464 .ndo_poll_controller = atl1c_netpoll,
2465#endif
2466};
2467
2468static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2469{
2470 SET_NETDEV_DEV(netdev, &pdev->dev);
2471 pci_set_drvdata(pdev, netdev);
2472
2473 netdev->irq = pdev->irq;
2474 netdev->netdev_ops = &atl1c_netdev_ops;
2475 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2476 atl1c_set_ethtool_ops(netdev);
2477
2478 /* TODO: add when ready */
2479 netdev->features = NETIF_F_SG |
2480 NETIF_F_HW_CSUM |
2481 NETIF_F_HW_VLAN_TX |
2482 NETIF_F_HW_VLAN_RX |
2483 NETIF_F_TSO |
2484 NETIF_F_TSO6;
2485 return 0;
2486}
2487
2488/*
2489 * atl1c_probe - Device Initialization Routine
2490 * @pdev: PCI device information struct
2491 * @ent: entry in atl1c_pci_tbl
2492 *
2493 * Returns 0 on success, negative on failure
2494 *
2495 * atl1c_probe initializes an adapter identified by a pci_dev structure.
2496 * The OS initialization, configuring of the adapter private structure,
2497 * and a hardware reset occur.
2498 */
2499static int __devinit atl1c_probe(struct pci_dev *pdev,
2500 const struct pci_device_id *ent)
2501{
2502 struct net_device *netdev;
2503 struct atl1c_adapter *adapter;
2504 static int cards_found;
2505
2506 int err = 0;
2507
2508 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2509 err = pci_enable_device_mem(pdev);
2510 if (err) {
2511 dev_err(&pdev->dev, "cannot enable PCI device\n");
2512 return err;
2513 }
2514
2515 /*
2516 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2517 * shared register for the high 32 bits, so only a single, aligned,
2518 * 4 GB physical address range can be used at a time.
2519 *
2520 * Supporting 64-bit DMA on this hardware is more trouble than it's
2521 * worth. It is far easier to limit to 32-bit DMA than update
2522 * various kernel subsystems to support the mechanics required by a
2523 * fixed-high-32-bit system.
2524 */
2525 if ((pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0) ||
2526 (pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK) != 0)) {
2527 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2528 goto err_dma;
2529 }
2530
2531 err = pci_request_regions(pdev, atl1c_driver_name);
2532 if (err) {
2533 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2534 goto err_pci_reg;
2535 }
2536
2537 pci_set_master(pdev);
2538
2539 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2540 if (netdev == NULL) {
2541 err = -ENOMEM;
2542 dev_err(&pdev->dev, "etherdev alloc failed\n");
2543 goto err_alloc_etherdev;
2544 }
2545
2546 err = atl1c_init_netdev(netdev, pdev);
2547 if (err) {
2548 dev_err(&pdev->dev, "init netdevice failed\n");
2549 goto err_init_netdev;
2550 }
2551 adapter = netdev_priv(netdev);
2552 adapter->bd_number = cards_found;
2553 adapter->netdev = netdev;
2554 adapter->pdev = pdev;
2555 adapter->hw.adapter = adapter;
2556 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2557 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2558 if (!adapter->hw.hw_addr) {
2559 err = -EIO;
2560 dev_err(&pdev->dev, "cannot map device registers\n");
2561 goto err_ioremap;
2562 }
2563 netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
2564
2565 /* init mii data */
2566 adapter->mii.dev = netdev;
2567 adapter->mii.mdio_read = atl1c_mdio_read;
2568 adapter->mii.mdio_write = atl1c_mdio_write;
2569 adapter->mii.phy_id_mask = 0x1f;
2570 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2571 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
2572 setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
2573 (unsigned long)adapter);
2574 /* setup the private structure */
2575 err = atl1c_sw_init(adapter);
2576 if (err) {
2577 dev_err(&pdev->dev, "net device private data init failed\n");
2578 goto err_sw_init;
2579 }
2580 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2581 ATL1C_PCIE_PHY_RESET);
2582
2583 /* Init GPHY as early as possible due to power saving issue */
2584 atl1c_phy_reset(&adapter->hw);
2585
2586 err = atl1c_reset_mac(&adapter->hw);
2587 if (err) {
2588 err = -EIO;
2589 goto err_reset;
2590 }
2591
2592 device_init_wakeup(&pdev->dev, 1);
2593 /* reset the controller to
2594 * put the device in a known good starting state */
2595 err = atl1c_phy_init(&adapter->hw);
2596 if (err) {
2597 err = -EIO;
2598 goto err_reset;
2599 }
2600 if (atl1c_read_mac_addr(&adapter->hw) != 0) {
2601 err = -EIO;
2602 dev_err(&pdev->dev, "get mac address failed\n");
2603 goto err_eeprom;
2604 }
2605 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2606 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2607 if (netif_msg_probe(adapter))
2608 dev_dbg(&pdev->dev,
2609 "mac address : %02x-%02x-%02x-%02x-%02x-%02x\n",
2610 adapter->hw.mac_addr[0], adapter->hw.mac_addr[1],
2611 adapter->hw.mac_addr[2], adapter->hw.mac_addr[3],
2612 adapter->hw.mac_addr[4], adapter->hw.mac_addr[5]);
2613
2614 atl1c_hw_set_mac_addr(&adapter->hw);
2615 INIT_WORK(&adapter->reset_task, atl1c_reset_task);
2616 INIT_WORK(&adapter->link_chg_task, atl1c_link_chg_task);
2617 err = register_netdev(netdev);
2618 if (err) {
2619 dev_err(&pdev->dev, "register netdevice failed\n");
2620 goto err_register;
2621 }
2622
2623 if (netif_msg_probe(adapter))
2624 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
2625 cards_found++;
2626 return 0;
2627
2628err_reset:
2629err_register:
2630err_sw_init:
2631err_eeprom:
2632 iounmap(adapter->hw.hw_addr);
2633err_init_netdev:
2634err_ioremap:
2635 free_netdev(netdev);
2636err_alloc_etherdev:
2637 pci_release_regions(pdev);
2638err_pci_reg:
2639err_dma:
2640 pci_disable_device(pdev);
2641 return err;
2642}
2643
2644/*
2645 * atl1c_remove - Device Removal Routine
2646 * @pdev: PCI device information struct
2647 *
2648 * atl1c_remove is called by the PCI subsystem to alert the driver
2649 * that it should release a PCI device. The could be caused by a
2650 * Hot-Plug event, or because the driver is going to be removed from
2651 * memory.
2652 */
2653static void __devexit atl1c_remove(struct pci_dev *pdev)
2654{
2655 struct net_device *netdev = pci_get_drvdata(pdev);
2656 struct atl1c_adapter *adapter = netdev_priv(netdev);
2657
2658 unregister_netdev(netdev);
2659 atl1c_phy_disable(&adapter->hw);
2660
2661 iounmap(adapter->hw.hw_addr);
2662
2663 pci_release_regions(pdev);
2664 pci_disable_device(pdev);
2665 free_netdev(netdev);
2666}
2667
2668/*
2669 * atl1c_io_error_detected - called when PCI error is detected
2670 * @pdev: Pointer to PCI device
2671 * @state: The current pci connection state
2672 *
2673 * This function is called after a PCI bus error affecting
2674 * this device has been detected.
2675 */
2676static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2677 pci_channel_state_t state)
2678{
2679 struct net_device *netdev = pci_get_drvdata(pdev);
2680 struct atl1c_adapter *adapter = netdev_priv(netdev);
2681
2682 netif_device_detach(netdev);
2683
2684 if (netif_running(netdev))
2685 atl1c_down(adapter);
2686
2687 pci_disable_device(pdev);
2688
2689 /* Request a slot slot reset. */
2690 return PCI_ERS_RESULT_NEED_RESET;
2691}
2692
2693/*
2694 * atl1c_io_slot_reset - called after the pci bus has been reset.
2695 * @pdev: Pointer to PCI device
2696 *
2697 * Restart the card from scratch, as if from a cold-boot. Implementation
2698 * resembles the first-half of the e1000_resume routine.
2699 */
2700static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2701{
2702 struct net_device *netdev = pci_get_drvdata(pdev);
2703 struct atl1c_adapter *adapter = netdev_priv(netdev);
2704
2705 if (pci_enable_device(pdev)) {
2706 if (netif_msg_hw(adapter))
2707 dev_err(&pdev->dev,
2708 "Cannot re-enable PCI device after reset\n");
2709 return PCI_ERS_RESULT_DISCONNECT;
2710 }
2711 pci_set_master(pdev);
2712
2713 pci_enable_wake(pdev, PCI_D3hot, 0);
2714 pci_enable_wake(pdev, PCI_D3cold, 0);
2715
2716 atl1c_reset_mac(&adapter->hw);
2717
2718 return PCI_ERS_RESULT_RECOVERED;
2719}
2720
2721/*
2722 * atl1c_io_resume - called when traffic can start flowing again.
2723 * @pdev: Pointer to PCI device
2724 *
2725 * This callback is called when the error recovery driver tells us that
2726 * its OK to resume normal operation. Implementation resembles the
2727 * second-half of the atl1c_resume routine.
2728 */
2729static void atl1c_io_resume(struct pci_dev *pdev)
2730{
2731 struct net_device *netdev = pci_get_drvdata(pdev);
2732 struct atl1c_adapter *adapter = netdev_priv(netdev);
2733
2734 if (netif_running(netdev)) {
2735 if (atl1c_up(adapter)) {
2736 if (netif_msg_hw(adapter))
2737 dev_err(&pdev->dev,
2738 "Cannot bring device back up after reset\n");
2739 return;
2740 }
2741 }
2742
2743 netif_device_attach(netdev);
2744}
2745
2746static struct pci_error_handlers atl1c_err_handler = {
2747 .error_detected = atl1c_io_error_detected,
2748 .slot_reset = atl1c_io_slot_reset,
2749 .resume = atl1c_io_resume,
2750};
2751
2752static struct pci_driver atl1c_driver = {
2753 .name = atl1c_driver_name,
2754 .id_table = atl1c_pci_tbl,
2755 .probe = atl1c_probe,
2756 .remove = __devexit_p(atl1c_remove),
2757 /* Power Managment Hooks */
2758 .suspend = atl1c_suspend,
2759 .resume = atl1c_resume,
2760 .shutdown = atl1c_shutdown,
2761 .err_handler = &atl1c_err_handler
2762};
2763
2764/*
2765 * atl1c_init_module - Driver Registration Routine
2766 *
2767 * atl1c_init_module is the first routine called when the driver is
2768 * loaded. All it does is register with the PCI subsystem.
2769 */
2770static int __init atl1c_init_module(void)
2771{
2772 return pci_register_driver(&atl1c_driver);
2773}
2774
2775/*
2776 * atl1c_exit_module - Driver Exit Cleanup Routine
2777 *
2778 * atl1c_exit_module is called just before the driver is removed
2779 * from memory.
2780 */
2781static void __exit atl1c_exit_module(void)
2782{
2783 pci_unregister_driver(&atl1c_driver);
2784}
2785
2786module_init(atl1c_init_module);
2787module_exit(atl1c_exit_module);
Linux kernel - Deliverables
This page took 0.165113 seconds and 5 git commands to generate.