au1000-eth: prefix all functions with au1000_
[deliverable/linux.git] / drivers / net / au1000_eth.c
CommitLineData
1da177e4
LT
1/*
2 *
3 * Alchemy Au1x00 ethernet driver
4 *
89be0501 5 * Copyright 2001-2003, 2006 MontaVista Software Inc.
1da177e4
LT
6 * Copyright 2002 TimeSys Corp.
7 * Added ethtool/mii-tool support,
8 * Copyright 2004 Matt Porter <mporter@kernel.crashing.org>
6aa20a22
JG
9 * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de
10 * or riemer@riemer-nt.de: fixed the link beat detection with
1da177e4 11 * ioctls (SIOCGMIIPHY)
0638dec0
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12 * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org>
13 * converted to use linux-2.6.x's PHY framework
14 *
1da177e4
LT
15 * Author: MontaVista Software, Inc.
16 * ppopov@mvista.com or source@mvista.com
17 *
18 * ########################################################################
19 *
20 * This program is free software; you can distribute it and/or modify it
21 * under the terms of the GNU General Public License (Version 2) as
22 * published by the Free Software Foundation.
23 *
24 * This program is distributed in the hope it will be useful, but WITHOUT
25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
27 * for more details.
28 *
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
32 *
33 * ########################################################################
34 *
6aa20a22 35 *
1da177e4 36 */
bc36b428 37#include <linux/capability.h>
d791c2bd 38#include <linux/dma-mapping.h>
1da177e4
LT
39#include <linux/module.h>
40#include <linux/kernel.h>
1da177e4
LT
41#include <linux/string.h>
42#include <linux/timer.h>
43#include <linux/errno.h>
44#include <linux/in.h>
45#include <linux/ioport.h>
46#include <linux/bitops.h>
47#include <linux/slab.h>
48#include <linux/interrupt.h>
1da177e4
LT
49#include <linux/init.h>
50#include <linux/netdevice.h>
51#include <linux/etherdevice.h>
52#include <linux/ethtool.h>
53#include <linux/mii.h>
54#include <linux/skbuff.h>
55#include <linux/delay.h>
8cd35da0 56#include <linux/crc32.h>
0638dec0 57#include <linux/phy.h>
bd2302c2 58#include <linux/platform_device.h>
25b31cb1
YY
59
60#include <asm/cpu.h>
1da177e4
LT
61#include <asm/mipsregs.h>
62#include <asm/irq.h>
63#include <asm/io.h>
64#include <asm/processor.h>
65
25b31cb1 66#include <au1000.h>
bd2302c2 67#include <au1xxx_eth.h>
25b31cb1
YY
68#include <prom.h>
69
1da177e4
LT
70#include "au1000_eth.h"
71
72#ifdef AU1000_ETH_DEBUG
73static int au1000_debug = 5;
74#else
75static int au1000_debug = 3;
76#endif
77
89be0501 78#define DRV_NAME "au1000_eth"
d5b20697 79#define DRV_VERSION "1.6"
1da177e4
LT
80#define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>"
81#define DRV_DESC "Au1xxx on-chip Ethernet driver"
82
83MODULE_AUTHOR(DRV_AUTHOR);
84MODULE_DESCRIPTION(DRV_DESC);
85MODULE_LICENSE("GPL");
13130c7a 86MODULE_VERSION(DRV_VERSION);
1da177e4 87
1da177e4
LT
88/*
89 * Theory of operation
90 *
6aa20a22
JG
91 * The Au1000 MACs use a simple rx and tx descriptor ring scheme.
92 * There are four receive and four transmit descriptors. These
93 * descriptors are not in memory; rather, they are just a set of
1da177e4
LT
94 * hardware registers.
95 *
96 * Since the Au1000 has a coherent data cache, the receive and
6aa20a22 97 * transmit buffers are allocated from the KSEG0 segment. The
1da177e4
LT
98 * hardware registers, however, are still mapped at KSEG1 to
99 * make sure there's no out-of-order writes, and that all writes
100 * complete immediately.
101 */
102
103/* These addresses are only used if yamon doesn't tell us what
104 * the mac address is, and the mac address is not passed on the
105 * command line.
106 */
6aa20a22 107static unsigned char au1000_mac_addr[6] __devinitdata = {
1da177e4
LT
108 0x00, 0x50, 0xc2, 0x0c, 0x30, 0x00
109};
110
1da177e4
LT
111struct au1000_private *au_macs[NUM_ETH_INTERFACES];
112
0638dec0
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113/*
114 * board-specific configurations
115 *
116 * PHY detection algorithm
117 *
bd2302c2 118 * If phy_static_config is undefined, the PHY setup is
0638dec0
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119 * autodetected:
120 *
121 * mii_probe() first searches the current MAC's MII bus for a PHY,
bd2302c2 122 * selecting the first (or last, if phy_search_highest_addr is
0638dec0
HVR
123 * defined) PHY address not already claimed by another netdev.
124 *
125 * If nothing was found that way when searching for the 2nd ethernet
bd2302c2 126 * controller's PHY and phy1_search_mac0 is defined, then
0638dec0
HVR
127 * the first MII bus is searched as well for an unclaimed PHY; this is
128 * needed in case of a dual-PHY accessible only through the MAC0's MII
129 * bus.
130 *
131 * Finally, if no PHY is found, then the corresponding ethernet
132 * controller is not registered to the network subsystem.
1da177e4
LT
133 */
134
bd2302c2 135/* autodetection defaults: phy1_search_mac0 */
1da177e4 136
0638dec0
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137/* static PHY setup
138 *
139 * most boards PHY setup should be detectable properly with the
140 * autodetection algorithm in mii_probe(), but in some cases (e.g. if
141 * you have a switch attached, or want to use the PHY's interrupt
142 * notification capabilities) you can provide a static PHY
143 * configuration here
144 *
145 * IRQs may only be set, if a PHY address was configured
146 * If a PHY address is given, also a bus id is required to be set
147 *
148 * ps: make sure the used irqs are configured properly in the board
149 * specific irq-map
150 */
1da177e4 151
eb049630 152static void au1000_enable_mac(struct net_device *dev, int force_reset)
5ef3041e
FF
153{
154 unsigned long flags;
155 struct au1000_private *aup = netdev_priv(dev);
156
157 spin_lock_irqsave(&aup->lock, flags);
158
159 if(force_reset || (!aup->mac_enabled)) {
160 *aup->enable = MAC_EN_CLOCK_ENABLE;
161 au_sync_delay(2);
162 *aup->enable = (MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
163 | MAC_EN_CLOCK_ENABLE);
164 au_sync_delay(2);
165
166 aup->mac_enabled = 1;
167 }
168
169 spin_unlock_irqrestore(&aup->lock, flags);
170}
171
0638dec0
HVR
172/*
173 * MII operations
174 */
1210dde7 175static int au1000_mdio_read(struct net_device *dev, int phy_addr, int reg)
1da177e4 176{
454d7c9b 177 struct au1000_private *aup = netdev_priv(dev);
0638dec0
HVR
178 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
179 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
1da177e4
LT
180 u32 timedout = 20;
181 u32 mii_control;
182
1da177e4
LT
183 while (*mii_control_reg & MAC_MII_BUSY) {
184 mdelay(1);
185 if (--timedout == 0) {
6aa20a22 186 printk(KERN_ERR "%s: read_MII busy timeout!!\n",
1da177e4
LT
187 dev->name);
188 return -1;
189 }
190 }
191
6aa20a22 192 mii_control = MAC_SET_MII_SELECT_REG(reg) |
0638dec0 193 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ;
1da177e4
LT
194
195 *mii_control_reg = mii_control;
196
197 timedout = 20;
198 while (*mii_control_reg & MAC_MII_BUSY) {
199 mdelay(1);
200 if (--timedout == 0) {
6aa20a22 201 printk(KERN_ERR "%s: mdio_read busy timeout!!\n",
1da177e4
LT
202 dev->name);
203 return -1;
204 }
205 }
206 return (int)*mii_data_reg;
207}
208
1210dde7
AB
209static void au1000_mdio_write(struct net_device *dev, int phy_addr,
210 int reg, u16 value)
1da177e4 211{
454d7c9b 212 struct au1000_private *aup = netdev_priv(dev);
0638dec0
HVR
213 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
214 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
1da177e4
LT
215 u32 timedout = 20;
216 u32 mii_control;
217
1da177e4
LT
218 while (*mii_control_reg & MAC_MII_BUSY) {
219 mdelay(1);
220 if (--timedout == 0) {
6aa20a22 221 printk(KERN_ERR "%s: mdio_write busy timeout!!\n",
1da177e4
LT
222 dev->name);
223 return;
224 }
225 }
226
6aa20a22 227 mii_control = MAC_SET_MII_SELECT_REG(reg) |
0638dec0 228 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE;
1da177e4
LT
229
230 *mii_data_reg = value;
231 *mii_control_reg = mii_control;
232}
233
1210dde7 234static int au1000_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
0638dec0
HVR
235{
236 /* WARNING: bus->phy_map[phy_addr].attached_dev == dev does
237 * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus) */
238 struct net_device *const dev = bus->priv;
239
eb049630 240 au1000_enable_mac(dev, 0); /* make sure the MAC associated with this
0638dec0 241 * mii_bus is enabled */
1210dde7 242 return au1000_mdio_read(dev, phy_addr, regnum);
0638dec0 243}
1da177e4 244
1210dde7
AB
245static int au1000_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
246 u16 value)
1da177e4 247{
0638dec0 248 struct net_device *const dev = bus->priv;
1da177e4 249
eb049630 250 au1000_enable_mac(dev, 0); /* make sure the MAC associated with this
0638dec0 251 * mii_bus is enabled */
1210dde7 252 au1000_mdio_write(dev, phy_addr, regnum, value);
0638dec0 253 return 0;
1da177e4
LT
254}
255
1210dde7 256static int au1000_mdiobus_reset(struct mii_bus *bus)
1da177e4 257{
0638dec0 258 struct net_device *const dev = bus->priv;
1da177e4 259
eb049630 260 au1000_enable_mac(dev, 0); /* make sure the MAC associated with this
0638dec0
HVR
261 * mii_bus is enabled */
262 return 0;
263}
1da177e4 264
eb049630 265static void au1000_hard_stop(struct net_device *dev)
5ef3041e
FF
266{
267 struct au1000_private *aup = netdev_priv(dev);
268
269 if (au1000_debug > 4)
270 printk(KERN_INFO "%s: hard stop\n", dev->name);
271
272 aup->mac->control &= ~(MAC_RX_ENABLE | MAC_TX_ENABLE);
273 au_sync_delay(10);
274}
275
eb049630 276static void au1000_enable_rx_tx(struct net_device *dev)
5ef3041e
FF
277{
278 struct au1000_private *aup = netdev_priv(dev);
279
280 if (au1000_debug > 4)
281 printk(KERN_INFO "%s: enable_rx_tx\n", dev->name);
282
283 aup->mac->control |= (MAC_RX_ENABLE | MAC_TX_ENABLE);
284 au_sync_delay(10);
285}
286
287static void
288au1000_adjust_link(struct net_device *dev)
289{
290 struct au1000_private *aup = netdev_priv(dev);
291 struct phy_device *phydev = aup->phy_dev;
292 unsigned long flags;
293
294 int status_change = 0;
295
296 BUG_ON(!aup->phy_dev);
297
298 spin_lock_irqsave(&aup->lock, flags);
299
300 if (phydev->link && (aup->old_speed != phydev->speed)) {
301 // speed changed
302
303 switch(phydev->speed) {
304 case SPEED_10:
305 case SPEED_100:
306 break;
307 default:
308 printk(KERN_WARNING
309 "%s: Speed (%d) is not 10/100 ???\n",
310 dev->name, phydev->speed);
311 break;
312 }
313
314 aup->old_speed = phydev->speed;
315
316 status_change = 1;
317 }
318
319 if (phydev->link && (aup->old_duplex != phydev->duplex)) {
320 // duplex mode changed
321
322 /* switching duplex mode requires to disable rx and tx! */
eb049630 323 au1000_hard_stop(dev);
5ef3041e
FF
324
325 if (DUPLEX_FULL == phydev->duplex)
326 aup->mac->control = ((aup->mac->control
327 | MAC_FULL_DUPLEX)
328 & ~MAC_DISABLE_RX_OWN);
329 else
330 aup->mac->control = ((aup->mac->control
331 & ~MAC_FULL_DUPLEX)
332 | MAC_DISABLE_RX_OWN);
333 au_sync_delay(1);
334
eb049630 335 au1000_enable_rx_tx(dev);
5ef3041e
FF
336 aup->old_duplex = phydev->duplex;
337
338 status_change = 1;
339 }
340
341 if(phydev->link != aup->old_link) {
342 // link state changed
343
344 if (!phydev->link) {
345 /* link went down */
346 aup->old_speed = 0;
347 aup->old_duplex = -1;
348 }
349
350 aup->old_link = phydev->link;
351 status_change = 1;
352 }
353
354 spin_unlock_irqrestore(&aup->lock, flags);
355
356 if (status_change) {
357 if (phydev->link)
358 printk(KERN_INFO "%s: link up (%d/%s)\n",
359 dev->name, phydev->speed,
360 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
361 else
362 printk(KERN_INFO "%s: link down\n", dev->name);
363 }
364}
365
eb049630 366static int au1000_mii_probe (struct net_device *dev)
0638dec0 367{
454d7c9b 368 struct au1000_private *const aup = netdev_priv(dev);
0638dec0
HVR
369 struct phy_device *phydev = NULL;
370
bd2302c2
FF
371 if (aup->phy_static_config) {
372 BUG_ON(aup->mac_id < 0 || aup->mac_id > 1);
0638dec0 373
bd2302c2
FF
374 if (aup->phy_addr)
375 phydev = aup->mii_bus->phy_map[aup->phy_addr];
376 else
377 printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n",
378 dev->name);
0638dec0 379 return 0;
bd2302c2
FF
380 } else {
381 int phy_addr;
382
383 /* find the first (lowest address) PHY on the current MAC's MII bus */
384 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
385 if (aup->mii_bus->phy_map[phy_addr]) {
386 phydev = aup->mii_bus->phy_map[phy_addr];
387 if (!aup->phy_search_highest_addr)
388 break; /* break out with first one found */
389 }
1da177e4 390
bd2302c2
FF
391 if (aup->phy1_search_mac0) {
392 /* try harder to find a PHY */
393 if (!phydev && (aup->mac_id == 1)) {
394 /* no PHY found, maybe we have a dual PHY? */
395 printk (KERN_INFO DRV_NAME ": no PHY found on MAC1, "
396 "let's see if it's attached to MAC0...\n");
0638dec0 397
bd2302c2
FF
398 /* find the first (lowest address) non-attached PHY on
399 * the MAC0 MII bus */
400 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
401 struct phy_device *const tmp_phydev =
402 aup->mii_bus->phy_map[phy_addr];
0638dec0 403
bd2302c2
FF
404 if (aup->mac_id == 1)
405 break;
0638dec0 406
bd2302c2
FF
407 if (!tmp_phydev)
408 continue; /* no PHY here... */
0638dec0 409
bd2302c2
FF
410 if (tmp_phydev->attached_dev)
411 continue; /* already claimed by MAC0 */
0638dec0 412
bd2302c2
FF
413 phydev = tmp_phydev;
414 break; /* found it */
415 }
416 }
1da177e4
LT
417 }
418 }
1da177e4 419
0638dec0
HVR
420 if (!phydev) {
421 printk (KERN_ERR DRV_NAME ":%s: no PHY found\n", dev->name);
1da177e4
LT
422 return -1;
423 }
424
0638dec0 425 /* now we are supposed to have a proper phydev, to attach to... */
0638dec0
HVR
426 BUG_ON(phydev->attached_dev);
427
db1d7bf7
KS
428 phydev = phy_connect(dev, dev_name(&phydev->dev), &au1000_adjust_link,
429 0, PHY_INTERFACE_MODE_MII);
0638dec0
HVR
430
431 if (IS_ERR(phydev)) {
432 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
433 return PTR_ERR(phydev);
434 }
435
436 /* mask with MAC supported features */
437 phydev->supported &= (SUPPORTED_10baseT_Half
438 | SUPPORTED_10baseT_Full
439 | SUPPORTED_100baseT_Half
440 | SUPPORTED_100baseT_Full
441 | SUPPORTED_Autoneg
442 /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
443 | SUPPORTED_MII
444 | SUPPORTED_TP);
445
446 phydev->advertising = phydev->supported;
447
448 aup->old_link = 0;
449 aup->old_speed = 0;
450 aup->old_duplex = -1;
451 aup->phy_dev = phydev;
452
453 printk(KERN_INFO "%s: attached PHY driver [%s] "
db1d7bf7
KS
454 "(mii_bus:phy_addr=%s, irq=%d)\n", dev->name,
455 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
1da177e4
LT
456
457 return 0;
458}
459
460
461/*
462 * Buffer allocation/deallocation routines. The buffer descriptor returned
6aa20a22 463 * has the virtual and dma address of a buffer suitable for
1da177e4
LT
464 * both, receive and transmit operations.
465 */
eb049630 466static db_dest_t *au1000_GetFreeDB(struct au1000_private *aup)
1da177e4
LT
467{
468 db_dest_t *pDB;
469 pDB = aup->pDBfree;
470
471 if (pDB) {
472 aup->pDBfree = pDB->pnext;
473 }
474 return pDB;
475}
476
eb049630 477void au1000_ReleaseDB(struct au1000_private *aup, db_dest_t *pDB)
1da177e4
LT
478{
479 db_dest_t *pDBfree = aup->pDBfree;
480 if (pDBfree)
481 pDBfree->pnext = pDB;
482 aup->pDBfree = pDB;
483}
484
eb049630 485static void au1000_reset_mac_unlocked(struct net_device *dev)
0638dec0 486{
454d7c9b 487 struct au1000_private *const aup = netdev_priv(dev);
0638dec0
HVR
488 int i;
489
eb049630 490 au1000_hard_stop(dev);
0638dec0
HVR
491
492 *aup->enable = MAC_EN_CLOCK_ENABLE;
493 au_sync_delay(2);
494 *aup->enable = 0;
495 au_sync_delay(2);
496
1da177e4
LT
497 aup->tx_full = 0;
498 for (i = 0; i < NUM_RX_DMA; i++) {
499 /* reset control bits */
500 aup->rx_dma_ring[i]->buff_stat &= ~0xf;
501 }
502 for (i = 0; i < NUM_TX_DMA; i++) {
503 /* reset control bits */
504 aup->tx_dma_ring[i]->buff_stat &= ~0xf;
505 }
0638dec0
HVR
506
507 aup->mac_enabled = 0;
508
1da177e4
LT
509}
510
eb049630 511static void au1000_reset_mac(struct net_device *dev)
0638dec0 512{
454d7c9b 513 struct au1000_private *const aup = netdev_priv(dev);
0638dec0
HVR
514 unsigned long flags;
515
516 if (au1000_debug > 4)
517 printk(KERN_INFO "%s: reset mac, aup %x\n",
518 dev->name, (unsigned)aup);
519
520 spin_lock_irqsave(&aup->lock, flags);
521
eb049630 522 au1000_reset_mac_unlocked (dev);
0638dec0
HVR
523
524 spin_unlock_irqrestore(&aup->lock, flags);
525}
1da177e4 526
6aa20a22 527/*
1da177e4
LT
528 * Setup the receive and transmit "rings". These pointers are the addresses
529 * of the rx and tx MAC DMA registers so they are fixed by the hardware --
530 * these are not descriptors sitting in memory.
531 */
6aa20a22 532static void
eb049630 533au1000_setup_hw_rings(struct au1000_private *aup, u32 rx_base, u32 tx_base)
1da177e4
LT
534{
535 int i;
536
537 for (i = 0; i < NUM_RX_DMA; i++) {
6aa20a22 538 aup->rx_dma_ring[i] =
1da177e4
LT
539 (volatile rx_dma_t *) (rx_base + sizeof(rx_dma_t)*i);
540 }
541 for (i = 0; i < NUM_TX_DMA; i++) {
6aa20a22 542 aup->tx_dma_ring[i] =
1da177e4
LT
543 (volatile tx_dma_t *) (tx_base + sizeof(tx_dma_t)*i);
544 }
545}
546
0638dec0
HVR
547/*
548 * ethtool operations
549 */
1da177e4 550
0638dec0 551static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1da177e4 552{
454d7c9b 553 struct au1000_private *aup = netdev_priv(dev);
1da177e4 554
0638dec0
HVR
555 if (aup->phy_dev)
556 return phy_ethtool_gset(aup->phy_dev, cmd);
1da177e4 557
0638dec0 558 return -EINVAL;
1da177e4
LT
559}
560
0638dec0 561static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1da177e4 562{
454d7c9b 563 struct au1000_private *aup = netdev_priv(dev);
1da177e4 564
0638dec0
HVR
565 if (!capable(CAP_NET_ADMIN))
566 return -EPERM;
1da177e4 567
0638dec0
HVR
568 if (aup->phy_dev)
569 return phy_ethtool_sset(aup->phy_dev, cmd);
1da177e4 570
0638dec0 571 return -EINVAL;
1da177e4
LT
572}
573
574static void
575au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
576{
454d7c9b 577 struct au1000_private *aup = netdev_priv(dev);
1da177e4
LT
578
579 strcpy(info->driver, DRV_NAME);
580 strcpy(info->version, DRV_VERSION);
581 info->fw_version[0] = '\0';
582 sprintf(info->bus_info, "%s %d", DRV_NAME, aup->mac_id);
583 info->regdump_len = 0;
584}
585
7282d491 586static const struct ethtool_ops au1000_ethtool_ops = {
1da177e4
LT
587 .get_settings = au1000_get_settings,
588 .set_settings = au1000_set_settings,
589 .get_drvinfo = au1000_get_drvinfo,
0638dec0 590 .get_link = ethtool_op_get_link,
1da177e4
LT
591};
592
5ef3041e
FF
593
594/*
595 * Initialize the interface.
596 *
597 * When the device powers up, the clocks are disabled and the
598 * mac is in reset state. When the interface is closed, we
599 * do the same -- reset the device and disable the clocks to
600 * conserve power. Thus, whenever au1000_init() is called,
601 * the device should already be in reset state.
602 */
603static int au1000_init(struct net_device *dev)
1da177e4 604{
5ef3041e
FF
605 struct au1000_private *aup = netdev_priv(dev);
606 unsigned long flags;
607 int i;
608 u32 control;
89be0501 609
5ef3041e
FF
610 if (au1000_debug > 4)
611 printk("%s: au1000_init\n", dev->name);
1da177e4 612
5ef3041e 613 /* bring the device out of reset */
eb049630 614 au1000_enable_mac(dev, 1);
89be0501 615
5ef3041e 616 spin_lock_irqsave(&aup->lock, flags);
1da177e4 617
5ef3041e
FF
618 aup->mac->control = 0;
619 aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2;
620 aup->tx_tail = aup->tx_head;
621 aup->rx_head = (aup->rx_dma_ring[0]->buff_stat & 0xC) >> 2;
1da177e4 622
5ef3041e
FF
623 aup->mac->mac_addr_high = dev->dev_addr[5]<<8 | dev->dev_addr[4];
624 aup->mac->mac_addr_low = dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 |
625 dev->dev_addr[1]<<8 | dev->dev_addr[0];
626
627 for (i = 0; i < NUM_RX_DMA; i++) {
628 aup->rx_dma_ring[i]->buff_stat |= RX_DMA_ENABLE;
1da177e4 629 }
5ef3041e 630 au_sync();
1da177e4 631
5ef3041e
FF
632 control = MAC_RX_ENABLE | MAC_TX_ENABLE;
633#ifndef CONFIG_CPU_LITTLE_ENDIAN
634 control |= MAC_BIG_ENDIAN;
635#endif
636 if (aup->phy_dev) {
637 if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex))
638 control |= MAC_FULL_DUPLEX;
639 else
640 control |= MAC_DISABLE_RX_OWN;
641 } else { /* PHY-less op, assume full-duplex */
642 control |= MAC_FULL_DUPLEX;
1da177e4
LT
643 }
644
5ef3041e
FF
645 aup->mac->control = control;
646 aup->mac->vlan1_tag = 0x8100; /* activate vlan support */
647 au_sync();
1da177e4 648
5ef3041e
FF
649 spin_unlock_irqrestore(&aup->lock, flags);
650 return 0;
651}
1da177e4 652
eb049630 653static inline void au1000_update_rx_stats(struct net_device *dev, u32 status)
5ef3041e 654{
5ef3041e 655 struct net_device_stats *ps = &dev->stats;
1da177e4 656
5ef3041e
FF
657 ps->rx_packets++;
658 if (status & RX_MCAST_FRAME)
659 ps->multicast++;
1da177e4 660
5ef3041e
FF
661 if (status & RX_ERROR) {
662 ps->rx_errors++;
663 if (status & RX_MISSED_FRAME)
664 ps->rx_missed_errors++;
4989ccb2 665 if (status & (RX_OVERLEN | RX_RUNT | RX_LEN_ERROR))
5ef3041e
FF
666 ps->rx_length_errors++;
667 if (status & RX_CRC_ERROR)
668 ps->rx_crc_errors++;
669 if (status & RX_COLL)
670 ps->collisions++;
298cf9be 671 }
5ef3041e
FF
672 else
673 ps->rx_bytes += status & RX_FRAME_LEN_MASK;
298cf9be 674
1da177e4
LT
675}
676
6aa20a22 677/*
5ef3041e 678 * Au1000 receive routine.
1da177e4 679 */
5ef3041e 680static int au1000_rx(struct net_device *dev)
1da177e4 681{
454d7c9b 682 struct au1000_private *aup = netdev_priv(dev);
5ef3041e
FF
683 struct sk_buff *skb;
684 volatile rx_dma_t *prxd;
685 u32 buff_stat, status;
686 db_dest_t *pDB;
687 u32 frmlen;
1da177e4 688
5ef3041e
FF
689 if (au1000_debug > 5)
690 printk("%s: au1000_rx head %d\n", dev->name, aup->rx_head);
1da177e4 691
5ef3041e
FF
692 prxd = aup->rx_dma_ring[aup->rx_head];
693 buff_stat = prxd->buff_stat;
694 while (buff_stat & RX_T_DONE) {
695 status = prxd->status;
696 pDB = aup->rx_db_inuse[aup->rx_head];
eb049630 697 au1000_update_rx_stats(dev, status);
5ef3041e 698 if (!(status & RX_ERROR)) {
1da177e4 699
5ef3041e
FF
700 /* good frame */
701 frmlen = (status & RX_FRAME_LEN_MASK);
702 frmlen -= 4; /* Remove FCS */
703 skb = dev_alloc_skb(frmlen + 2);
704 if (skb == NULL) {
705 printk(KERN_ERR
706 "%s: Memory squeeze, dropping packet.\n",
707 dev->name);
708 dev->stats.rx_dropped++;
709 continue;
710 }
711 skb_reserve(skb, 2); /* 16 byte IP header align */
712 skb_copy_to_linear_data(skb,
713 (unsigned char *)pDB->vaddr, frmlen);
714 skb_put(skb, frmlen);
715 skb->protocol = eth_type_trans(skb, dev);
716 netif_rx(skb); /* pass the packet to upper layers */
717 }
718 else {
719 if (au1000_debug > 4) {
720 if (status & RX_MISSED_FRAME)
721 printk("rx miss\n");
722 if (status & RX_WDOG_TIMER)
723 printk("rx wdog\n");
724 if (status & RX_RUNT)
725 printk("rx runt\n");
726 if (status & RX_OVERLEN)
727 printk("rx overlen\n");
728 if (status & RX_COLL)
729 printk("rx coll\n");
730 if (status & RX_MII_ERROR)
731 printk("rx mii error\n");
732 if (status & RX_CRC_ERROR)
733 printk("rx crc error\n");
734 if (status & RX_LEN_ERROR)
735 printk("rx len error\n");
736 if (status & RX_U_CNTRL_FRAME)
737 printk("rx u control frame\n");
5ef3041e
FF
738 }
739 }
740 prxd->buff_stat = (u32)(pDB->dma_addr | RX_DMA_ENABLE);
741 aup->rx_head = (aup->rx_head + 1) & (NUM_RX_DMA - 1);
742 au_sync();
1da177e4 743
5ef3041e
FF
744 /* next descriptor */
745 prxd = aup->rx_dma_ring[aup->rx_head];
746 buff_stat = prxd->buff_stat;
1da177e4 747 }
1da177e4
LT
748 return 0;
749}
750
eb049630 751static void au1000_update_tx_stats(struct net_device *dev, u32 status)
1da177e4 752{
454d7c9b 753 struct au1000_private *aup = netdev_priv(dev);
5ef3041e 754 struct net_device_stats *ps = &dev->stats;
0638dec0 755
5ef3041e
FF
756 if (status & TX_FRAME_ABORTED) {
757 if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) {
758 if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) {
759 /* any other tx errors are only valid
760 * in half duplex mode */
761 ps->tx_errors++;
762 ps->tx_aborted_errors++;
763 }
1da177e4 764 }
5ef3041e
FF
765 else {
766 ps->tx_errors++;
767 ps->tx_aborted_errors++;
768 if (status & (TX_NO_CARRIER | TX_LOSS_CARRIER))
769 ps->tx_carrier_errors++;
770 }
771 }
772}
0638dec0 773
5ef3041e
FF
774/*
775 * Called from the interrupt service routine to acknowledge
776 * the TX DONE bits. This is a must if the irq is setup as
777 * edge triggered.
778 */
779static void au1000_tx_ack(struct net_device *dev)
780{
781 struct au1000_private *aup = netdev_priv(dev);
782 volatile tx_dma_t *ptxd;
0638dec0 783
5ef3041e 784 ptxd = aup->tx_dma_ring[aup->tx_tail];
0638dec0 785
5ef3041e 786 while (ptxd->buff_stat & TX_T_DONE) {
eb049630 787 au1000_update_tx_stats(dev, ptxd->status);
5ef3041e
FF
788 ptxd->buff_stat &= ~TX_T_DONE;
789 ptxd->len = 0;
790 au_sync();
0638dec0 791
5ef3041e
FF
792 aup->tx_tail = (aup->tx_tail + 1) & (NUM_TX_DMA - 1);
793 ptxd = aup->tx_dma_ring[aup->tx_tail];
0638dec0 794
5ef3041e
FF
795 if (aup->tx_full) {
796 aup->tx_full = 0;
797 netif_wake_queue(dev);
798 }
1da177e4 799 }
5ef3041e 800}
1da177e4 801
5ef3041e
FF
802/*
803 * Au1000 interrupt service routine.
804 */
805static irqreturn_t au1000_interrupt(int irq, void *dev_id)
806{
807 struct net_device *dev = dev_id;
1da177e4 808
5ef3041e
FF
809 /* Handle RX interrupts first to minimize chance of overrun */
810
811 au1000_rx(dev);
812 au1000_tx_ack(dev);
813 return IRQ_RETVAL(1);
1da177e4
LT
814}
815
816static int au1000_open(struct net_device *dev)
817{
818 int retval;
454d7c9b 819 struct au1000_private *aup = netdev_priv(dev);
1da177e4
LT
820
821 if (au1000_debug > 4)
822 printk("%s: open: dev=%p\n", dev->name, dev);
823
a0607fd3 824 if ((retval = request_irq(dev->irq, au1000_interrupt, 0,
0638dec0
HVR
825 dev->name, dev))) {
826 printk(KERN_ERR "%s: unable to get IRQ %d\n",
827 dev->name, dev->irq);
828 return retval;
829 }
830
1da177e4
LT
831 if ((retval = au1000_init(dev))) {
832 printk(KERN_ERR "%s: error in au1000_init\n", dev->name);
833 free_irq(dev->irq, dev);
834 return retval;
835 }
1da177e4 836
0638dec0
HVR
837 if (aup->phy_dev) {
838 /* cause the PHY state machine to schedule a link state check */
839 aup->phy_dev->state = PHY_CHANGELINK;
840 phy_start(aup->phy_dev);
1da177e4
LT
841 }
842
0638dec0 843 netif_start_queue(dev);
1da177e4
LT
844
845 if (au1000_debug > 4)
846 printk("%s: open: Initialization done.\n", dev->name);
847
848 return 0;
849}
850
851static int au1000_close(struct net_device *dev)
852{
0638dec0 853 unsigned long flags;
454d7c9b 854 struct au1000_private *const aup = netdev_priv(dev);
1da177e4
LT
855
856 if (au1000_debug > 4)
857 printk("%s: close: dev=%p\n", dev->name, dev);
858
0638dec0
HVR
859 if (aup->phy_dev)
860 phy_stop(aup->phy_dev);
1da177e4
LT
861
862 spin_lock_irqsave(&aup->lock, flags);
0638dec0 863
eb049630 864 au1000_reset_mac_unlocked (dev);
0638dec0 865
1da177e4
LT
866 /* stop the device */
867 netif_stop_queue(dev);
868
869 /* disable the interrupt */
870 free_irq(dev->irq, dev);
871 spin_unlock_irqrestore(&aup->lock, flags);
872
873 return 0;
874}
875
1da177e4
LT
876/*
877 * Au1000 transmit routine.
878 */
61357325 879static netdev_tx_t au1000_tx(struct sk_buff *skb, struct net_device *dev)
1da177e4 880{
454d7c9b 881 struct au1000_private *aup = netdev_priv(dev);
09f75cd7 882 struct net_device_stats *ps = &dev->stats;
1da177e4
LT
883 volatile tx_dma_t *ptxd;
884 u32 buff_stat;
885 db_dest_t *pDB;
886 int i;
887
888 if (au1000_debug > 5)
6aa20a22
JG
889 printk("%s: tx: aup %x len=%d, data=%p, head %d\n",
890 dev->name, (unsigned)aup, skb->len,
1da177e4
LT
891 skb->data, aup->tx_head);
892
893 ptxd = aup->tx_dma_ring[aup->tx_head];
894 buff_stat = ptxd->buff_stat;
895 if (buff_stat & TX_DMA_ENABLE) {
896 /* We've wrapped around and the transmitter is still busy */
897 netif_stop_queue(dev);
898 aup->tx_full = 1;
5b548140 899 return NETDEV_TX_BUSY;
1da177e4
LT
900 }
901 else if (buff_stat & TX_T_DONE) {
eb049630 902 au1000_update_tx_stats(dev, ptxd->status);
1da177e4
LT
903 ptxd->len = 0;
904 }
905
906 if (aup->tx_full) {
907 aup->tx_full = 0;
908 netif_wake_queue(dev);
909 }
910
911 pDB = aup->tx_db_inuse[aup->tx_head];
bd2302c2 912 skb_copy_from_linear_data(skb, (void *)pDB->vaddr, skb->len);
1da177e4 913 if (skb->len < ETH_ZLEN) {
6aa20a22 914 for (i=skb->len; i<ETH_ZLEN; i++) {
1da177e4
LT
915 ((char *)pDB->vaddr)[i] = 0;
916 }
917 ptxd->len = ETH_ZLEN;
918 }
919 else
5ef3041e 920 ptxd->len = skb->len;
1da177e4 921
5ef3041e
FF
922 ps->tx_packets++;
923 ps->tx_bytes += ptxd->len;
1da177e4 924
5ef3041e
FF
925 ptxd->buff_stat = pDB->dma_addr | TX_DMA_ENABLE;
926 au_sync();
927 dev_kfree_skb(skb);
928 aup->tx_head = (aup->tx_head + 1) & (NUM_TX_DMA - 1);
929 dev->trans_start = jiffies;
6ed10654 930 return NETDEV_TX_OK;
1da177e4
LT
931}
932
1da177e4
LT
933/*
934 * The Tx ring has been full longer than the watchdog timeout
935 * value. The transmitter must be hung?
936 */
937static void au1000_tx_timeout(struct net_device *dev)
938{
939 printk(KERN_ERR "%s: au1000_tx_timeout: dev=%p\n", dev->name, dev);
eb049630 940 au1000_reset_mac(dev);
1da177e4
LT
941 au1000_init(dev);
942 dev->trans_start = jiffies;
943 netif_wake_queue(dev);
944}
945
d9a92cee 946static void au1000_multicast_list(struct net_device *dev)
1da177e4 947{
454d7c9b 948 struct au1000_private *aup = netdev_priv(dev);
1da177e4 949
6aa20a22 950 if (au1000_debug > 4)
d9a92cee 951 printk("%s: au1000_multicast_list: flags=%x\n", dev->name, dev->flags);
1da177e4
LT
952
953 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
954 aup->mac->control |= MAC_PROMISCUOUS;
1da177e4 955 } else if ((dev->flags & IFF_ALLMULTI) ||
4cd24eaf 956 netdev_mc_count(dev) > MULTICAST_FILTER_LIMIT) {
1da177e4
LT
957 aup->mac->control |= MAC_PASS_ALL_MULTI;
958 aup->mac->control &= ~MAC_PROMISCUOUS;
959 printk(KERN_INFO "%s: Pass all multicast\n", dev->name);
960 } else {
22bedad3 961 struct netdev_hw_addr *ha;
1da177e4
LT
962 u32 mc_filter[2]; /* Multicast hash filter */
963
964 mc_filter[1] = mc_filter[0] = 0;
22bedad3
JP
965 netdev_for_each_mc_addr(ha, dev)
966 set_bit(ether_crc(ETH_ALEN, ha->addr)>>26,
1da177e4 967 (long *)mc_filter);
1da177e4
LT
968 aup->mac->multi_hash_high = mc_filter[1];
969 aup->mac->multi_hash_low = mc_filter[0];
970 aup->mac->control &= ~MAC_PROMISCUOUS;
971 aup->mac->control |= MAC_HASH_MODE;
972 }
973}
974
1da177e4
LT
975static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
976{
454d7c9b 977 struct au1000_private *aup = netdev_priv(dev);
1da177e4 978
0638dec0 979 if (!netif_running(dev)) return -EINVAL;
1da177e4 980
0638dec0 981 if (!aup->phy_dev) return -EINVAL; // PHY not controllable
1da177e4 982
0638dec0 983 return phy_mii_ioctl(aup->phy_dev, if_mii(rq), cmd);
1da177e4
LT
984}
985
d9a92cee
AB
986static const struct net_device_ops au1000_netdev_ops = {
987 .ndo_open = au1000_open,
988 .ndo_stop = au1000_close,
989 .ndo_start_xmit = au1000_tx,
990 .ndo_set_multicast_list = au1000_multicast_list,
991 .ndo_do_ioctl = au1000_ioctl,
992 .ndo_tx_timeout = au1000_tx_timeout,
993 .ndo_set_mac_address = eth_mac_addr,
994 .ndo_validate_addr = eth_validate_addr,
995 .ndo_change_mtu = eth_change_mtu,
996};
997
bd2302c2 998static int __devinit au1000_probe(struct platform_device *pdev)
5ef3041e
FF
999{
1000 static unsigned version_printed = 0;
1001 struct au1000_private *aup = NULL;
bd2302c2 1002 struct au1000_eth_platform_data *pd;
5ef3041e
FF
1003 struct net_device *dev = NULL;
1004 db_dest_t *pDB, *pDBfree;
bd2302c2
FF
1005 int irq, i, err = 0;
1006 struct resource *base, *macen;
5ef3041e 1007 char ethaddr[6];
5ef3041e 1008
bd2302c2
FF
1009 base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1010 if (!base) {
1011 printk(KERN_ERR DRV_NAME ": failed to retrieve base register\n");
1012 err = -ENODEV;
1013 goto out;
1014 }
5ef3041e 1015
bd2302c2
FF
1016 macen = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1017 if (!macen) {
1018 printk(KERN_ERR DRV_NAME ": failed to retrieve MAC Enable register\n");
1019 err = -ENODEV;
1020 goto out;
1021 }
5ef3041e 1022
bd2302c2
FF
1023 irq = platform_get_irq(pdev, 0);
1024 if (irq < 0) {
1025 printk(KERN_ERR DRV_NAME ": failed to retrieve IRQ\n");
1026 err = -ENODEV;
1027 goto out;
1028 }
5ef3041e 1029
bd2302c2
FF
1030 if (!request_mem_region(base->start, resource_size(base), pdev->name)) {
1031 printk(KERN_ERR DRV_NAME ": failed to request memory region for base registers\n");
1032 err = -ENXIO;
1033 goto out;
1034 }
1035
1036 if (!request_mem_region(macen->start, resource_size(macen), pdev->name)) {
1037 printk(KERN_ERR DRV_NAME ": failed to request memory region for MAC enable register\n");
1038 err = -ENXIO;
1039 goto err_request;
1040 }
5ef3041e
FF
1041
1042 dev = alloc_etherdev(sizeof(struct au1000_private));
1043 if (!dev) {
1044 printk(KERN_ERR "%s: alloc_etherdev failed\n", DRV_NAME);
bd2302c2
FF
1045 err = -ENOMEM;
1046 goto err_alloc;
5ef3041e
FF
1047 }
1048
bd2302c2
FF
1049 SET_NETDEV_DEV(dev, &pdev->dev);
1050 platform_set_drvdata(pdev, dev);
5ef3041e
FF
1051 aup = netdev_priv(dev);
1052
1053 spin_lock_init(&aup->lock);
1054
1055 /* Allocate the data buffers */
1056 /* Snooping works fine with eth on all au1xxx */
1057 aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *
1058 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1059 &aup->dma_addr, 0);
1060 if (!aup->vaddr) {
bd2302c2
FF
1061 printk(KERN_ERR DRV_NAME ": failed to allocate data buffers\n");
1062 err = -ENOMEM;
1063 goto err_vaddr;
5ef3041e
FF
1064 }
1065
1066 /* aup->mac is the base address of the MAC's registers */
bd2302c2
FF
1067 aup->mac = (volatile mac_reg_t *)ioremap_nocache(base->start, resource_size(base));
1068 if (!aup->mac) {
1069 printk(KERN_ERR DRV_NAME ": failed to ioremap MAC registers\n");
1070 err = -ENXIO;
1071 goto err_remap1;
1072 }
5ef3041e 1073
bd2302c2
FF
1074 /* Setup some variables for quick register address access */
1075 aup->enable = (volatile u32 *)ioremap_nocache(macen->start, resource_size(macen));
1076 if (!aup->enable) {
1077 printk(KERN_ERR DRV_NAME ": failed to ioremap MAC enable register\n");
1078 err = -ENXIO;
1079 goto err_remap2;
1080 }
1081 aup->mac_id = pdev->id;
5ef3041e 1082
bd2302c2 1083 if (pdev->id == 0) {
5ef3041e
FF
1084 if (prom_get_ethernet_addr(ethaddr) == 0)
1085 memcpy(au1000_mac_addr, ethaddr, sizeof(au1000_mac_addr));
1086 else {
1087 printk(KERN_INFO "%s: No MAC address found\n",
1088 dev->name);
1089 /* Use the hard coded MAC addresses */
1090 }
1091
eb049630 1092 au1000_setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
bd2302c2 1093 } else if (pdev->id == 1)
eb049630 1094 au1000_setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
5ef3041e
FF
1095
1096 /*
1097 * Assign to the Ethernet ports two consecutive MAC addresses
1098 * to match those that are printed on their stickers
1099 */
1100 memcpy(dev->dev_addr, au1000_mac_addr, sizeof(au1000_mac_addr));
bd2302c2 1101 dev->dev_addr[5] += pdev->id;
5ef3041e
FF
1102
1103 *aup->enable = 0;
1104 aup->mac_enabled = 0;
1105
bd2302c2
FF
1106 pd = pdev->dev.platform_data;
1107 if (!pd) {
1108 printk(KERN_INFO DRV_NAME ": no platform_data passed, PHY search on MAC0\n");
1109 aup->phy1_search_mac0 = 1;
1110 } else {
1111 aup->phy_static_config = pd->phy_static_config;
1112 aup->phy_search_highest_addr = pd->phy_search_highest_addr;
1113 aup->phy1_search_mac0 = pd->phy1_search_mac0;
1114 aup->phy_addr = pd->phy_addr;
1115 aup->phy_busid = pd->phy_busid;
1116 aup->phy_irq = pd->phy_irq;
1117 }
1118
1119 if (aup->phy_busid && aup->phy_busid > 0) {
1120 printk(KERN_ERR DRV_NAME ": MAC0-associated PHY attached 2nd MACs MII"
1121 "bus not supported yet\n");
1122 err = -ENODEV;
1123 goto err_mdiobus_alloc;
1124 }
1125
5ef3041e 1126 aup->mii_bus = mdiobus_alloc();
bd2302c2
FF
1127 if (aup->mii_bus == NULL) {
1128 printk(KERN_ERR DRV_NAME ": failed to allocate mdiobus structure\n");
1129 err = -ENOMEM;
1130 goto err_mdiobus_alloc;
1131 }
5ef3041e
FF
1132
1133 aup->mii_bus->priv = dev;
1134 aup->mii_bus->read = au1000_mdiobus_read;
1135 aup->mii_bus->write = au1000_mdiobus_write;
1136 aup->mii_bus->reset = au1000_mdiobus_reset;
1137 aup->mii_bus->name = "au1000_eth_mii";
1138 snprintf(aup->mii_bus->id, MII_BUS_ID_SIZE, "%x", aup->mac_id);
1139 aup->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
dcbfef82 1140 if (aup->mii_bus->irq == NULL)
1141 goto err_out;
1142
5ef3041e
FF
1143 for(i = 0; i < PHY_MAX_ADDR; ++i)
1144 aup->mii_bus->irq[i] = PHY_POLL;
5ef3041e 1145 /* if known, set corresponding PHY IRQs */
bd2302c2
FF
1146 if (aup->phy_static_config)
1147 if (aup->phy_irq && aup->phy_busid == aup->mac_id)
1148 aup->mii_bus->irq[aup->phy_addr] = aup->phy_irq;
1149
1150 err = mdiobus_register(aup->mii_bus);
1151 if (err) {
1152 printk(KERN_ERR DRV_NAME " failed to register MDIO bus\n");
1153 goto err_mdiobus_reg;
1154 }
5ef3041e 1155
eb049630 1156 if (au1000_mii_probe(dev) != 0)
5ef3041e 1157 goto err_out;
5ef3041e
FF
1158
1159 pDBfree = NULL;
1160 /* setup the data buffer descriptors and attach a buffer to each one */
1161 pDB = aup->db;
1162 for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
1163 pDB->pnext = pDBfree;
1164 pDBfree = pDB;
1165 pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
1166 pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
1167 pDB++;
1168 }
1169 aup->pDBfree = pDBfree;
1170
1171 for (i = 0; i < NUM_RX_DMA; i++) {
eb049630 1172 pDB = au1000_GetFreeDB(aup);
5ef3041e
FF
1173 if (!pDB) {
1174 goto err_out;
1175 }
1176 aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
1177 aup->rx_db_inuse[i] = pDB;
1178 }
1179 for (i = 0; i < NUM_TX_DMA; i++) {
eb049630 1180 pDB = au1000_GetFreeDB(aup);
5ef3041e
FF
1181 if (!pDB) {
1182 goto err_out;
1183 }
1184 aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
1185 aup->tx_dma_ring[i]->len = 0;
1186 aup->tx_db_inuse[i] = pDB;
1187 }
1188
bd2302c2
FF
1189 dev->base_addr = base->start;
1190 dev->irq = irq;
1191 dev->netdev_ops = &au1000_netdev_ops;
1192 SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
1193 dev->watchdog_timeo = ETH_TX_TIMEOUT;
1194
5ef3041e
FF
1195 /*
1196 * The boot code uses the ethernet controller, so reset it to start
1197 * fresh. au1000_init() expects that the device is in reset state.
1198 */
eb049630 1199 au1000_reset_mac(dev);
5ef3041e 1200
bd2302c2
FF
1201 err = register_netdev(dev);
1202 if (err) {
1203 printk(KERN_ERR DRV_NAME "%s: Cannot register net device, aborting.\n",
1204 dev->name);
1205 goto err_out;
1206 }
1207
1208 printk("%s: Au1xx0 Ethernet found at 0x%lx, irq %d\n",
1209 dev->name, (unsigned long)base->start, irq);
1210 if (version_printed++ == 0)
1211 printk("%s version %s %s\n", DRV_NAME, DRV_VERSION, DRV_AUTHOR);
1212
1213 return 0;
5ef3041e
FF
1214
1215err_out:
bd2302c2 1216 if (aup->mii_bus != NULL)
5ef3041e 1217 mdiobus_unregister(aup->mii_bus);
5ef3041e
FF
1218
1219 /* here we should have a valid dev plus aup-> register addresses
1220 * so we can reset the mac properly.*/
eb049630 1221 au1000_reset_mac(dev);
5ef3041e
FF
1222
1223 for (i = 0; i < NUM_RX_DMA; i++) {
1224 if (aup->rx_db_inuse[i])
eb049630 1225 au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
5ef3041e
FF
1226 }
1227 for (i = 0; i < NUM_TX_DMA; i++) {
1228 if (aup->tx_db_inuse[i])
eb049630 1229 au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
5ef3041e 1230 }
bd2302c2
FF
1231err_mdiobus_reg:
1232 mdiobus_free(aup->mii_bus);
1233err_mdiobus_alloc:
1234 iounmap(aup->enable);
1235err_remap2:
1236 iounmap(aup->mac);
1237err_remap1:
5ef3041e
FF
1238 dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),
1239 (void *)aup->vaddr, aup->dma_addr);
bd2302c2 1240err_vaddr:
5ef3041e 1241 free_netdev(dev);
bd2302c2
FF
1242err_alloc:
1243 release_mem_region(macen->start, resource_size(macen));
1244err_request:
1245 release_mem_region(base->start, resource_size(base));
1246out:
1247 return err;
5ef3041e
FF
1248}
1249
bd2302c2 1250static int __devexit au1000_remove(struct platform_device *pdev)
5ef3041e 1251{
bd2302c2
FF
1252 struct net_device *dev = platform_get_drvdata(pdev);
1253 struct au1000_private *aup = netdev_priv(dev);
1254 int i;
1255 struct resource *base, *macen;
5ef3041e 1256
bd2302c2
FF
1257 platform_set_drvdata(pdev, NULL);
1258
1259 unregister_netdev(dev);
1260 mdiobus_unregister(aup->mii_bus);
1261 mdiobus_free(aup->mii_bus);
1262
1263 for (i = 0; i < NUM_RX_DMA; i++)
1264 if (aup->rx_db_inuse[i])
eb049630 1265 au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
bd2302c2
FF
1266
1267 for (i = 0; i < NUM_TX_DMA; i++)
1268 if (aup->tx_db_inuse[i])
eb049630 1269 au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
bd2302c2
FF
1270
1271 dma_free_noncoherent(NULL, MAX_BUF_SIZE *
1272 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1273 (void *)aup->vaddr, aup->dma_addr);
1274
1275 iounmap(aup->mac);
1276 iounmap(aup->enable);
1277
1278 base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1279 release_mem_region(base->start, resource_size(base));
1280
1281 macen = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1282 release_mem_region(macen->start, resource_size(macen));
1283
1284 free_netdev(dev);
5ef3041e 1285
5ef3041e
FF
1286 return 0;
1287}
1288
bd2302c2
FF
1289static struct platform_driver au1000_eth_driver = {
1290 .probe = au1000_probe,
1291 .remove = __devexit_p(au1000_remove),
1292 .driver = {
1293 .name = "au1000-eth",
1294 .owner = THIS_MODULE,
1295 },
1296};
1297MODULE_ALIAS("platform:au1000-eth");
1298
1299
1300static int __init au1000_init_module(void)
1301{
1302 return platform_driver_register(&au1000_eth_driver);
1303}
1304
1305static void __exit au1000_exit_module(void)
5ef3041e 1306{
bd2302c2 1307 platform_driver_unregister(&au1000_eth_driver);
5ef3041e
FF
1308}
1309
1da177e4 1310module_init(au1000_init_module);
bd2302c2 1311module_exit(au1000_exit_module);
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