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Merge branch 'for-davem' of git://git.kernel.org/pub/scm/linux/kernel/git/linville...
[deliverable/linux.git] / drivers / net / benet / be_main.c
CommitLineData
6b7c5b94 1/*
294aedcf 2 * Copyright (C) 2005 - 2010 ServerEngines
6b7c5b94
SP		 3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18#include "be.h"
8788fdc2 19#include "be_cmds.h"
65f71b8b 20#include <asm/div64.h>
6b7c5b94
SP		 21
22MODULE_VERSION(DRV_VER);
23MODULE_DEVICE_TABLE(pci, be_dev_ids);
24MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25MODULE_AUTHOR("ServerEngines Corporation");
26MODULE_LICENSE("GPL");
27
28static unsigned int rx_frag_size = 2048;
ba343c77 29static unsigned int num_vfs;
6b7c5b94 30module_param(rx_frag_size, uint, S_IRUGO);
ba343c77 31module_param(num_vfs, uint, S_IRUGO);
6b7c5b94 32MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
ba343c77 33MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
6b7c5b94 34
6b7c5b94 35static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
c4ca2374 36 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
59fd5d87 37 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
c4ca2374
AK		 38 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
39 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
6b7c5b94
SP		 40 { 0 }
41};
42MODULE_DEVICE_TABLE(pci, be_dev_ids);
7c185276
AK		 43/* UE Status Low CSR */
44static char *ue_status_low_desc[] = {
45 "CEV",
46 "CTX",
47 "DBUF",
48 "ERX",
49 "Host",
50 "MPU",
51 "NDMA",
52 "PTC ",
53 "RDMA ",
54 "RXF ",
55 "RXIPS ",
56 "RXULP0 ",
57 "RXULP1 ",
58 "RXULP2 ",
59 "TIM ",
60 "TPOST ",
61 "TPRE ",
62 "TXIPS ",
63 "TXULP0 ",
64 "TXULP1 ",
65 "UC ",
66 "WDMA ",
67 "TXULP2 ",
68 "HOST1 ",
69 "P0_OB_LINK ",
70 "P1_OB_LINK ",
71 "HOST_GPIO ",
72 "MBOX ",
73 "AXGMAC0",
74 "AXGMAC1",
75 "JTAG",
76 "MPU_INTPEND"
77};
78/* UE Status High CSR */
79static char *ue_status_hi_desc[] = {
80 "LPCMEMHOST",
81 "MGMT_MAC",
82 "PCS0ONLINE",
83 "MPU_IRAM",
84 "PCS1ONLINE",
85 "PCTL0",
86 "PCTL1",
87 "PMEM",
88 "RR",
89 "TXPB",
90 "RXPP",
91 "XAUI",
92 "TXP",
93 "ARM",
94 "IPC",
95 "HOST2",
96 "HOST3",
97 "HOST4",
98 "HOST5",
99 "HOST6",
100 "HOST7",
101 "HOST8",
102 "HOST9",
103 "NETC"
104 "Unknown",
105 "Unknown",
106 "Unknown",
107 "Unknown",
108 "Unknown",
109 "Unknown",
110 "Unknown",
111 "Unknown"
112};
6b7c5b94
SP		 113
114static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
115{
116 struct be_dma_mem *mem = &q->dma_mem;
117 if (mem->va)
118 pci_free_consistent(adapter->pdev, mem->size,
119 mem->va, mem->dma);
120}
121
122static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
123 u16 len, u16 entry_size)
124{
125 struct be_dma_mem *mem = &q->dma_mem;
126
127 memset(q, 0, sizeof(*q));
128 q->len = len;
129 q->entry_size = entry_size;
130 mem->size = len * entry_size;
131 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
132 if (!mem->va)
133 return -1;
134 memset(mem->va, 0, mem->size);
135 return 0;
136}
137
8788fdc2 138static void be_intr_set(struct be_adapter *adapter, bool enable)
6b7c5b94 139{
8788fdc2 140 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
6b7c5b94
SP		 141 u32 reg = ioread32(addr);
142 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 143
cf588477
SP		 144 if (adapter->eeh_err)
145 return;
146
5f0b849e 147 if (!enabled && enable)
6b7c5b94 148 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 149 else if (enabled && !enable)
6b7c5b94 150 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 151 else
6b7c5b94 152 return;
5f0b849e 153
6b7c5b94
SP		 154 iowrite32(reg, addr);
155}
156
8788fdc2 157static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 158{
159 u32 val = 0;
160 val |= qid & DB_RQ_RING_ID_MASK;
161 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
f3eb62d2
SP		 162
163 wmb();
8788fdc2 164 iowrite32(val, adapter->db + DB_RQ_OFFSET);
6b7c5b94
SP		 165}
166
8788fdc2 167static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 168{
169 u32 val = 0;
170 val |= qid & DB_TXULP_RING_ID_MASK;
171 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
f3eb62d2
SP		 172
173 wmb();
8788fdc2 174 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
6b7c5b94
SP		 175}
176
8788fdc2 177static void be_eq_notify(struct be_adapter *adapter, u16 qid,
6b7c5b94
SP		 178 bool arm, bool clear_int, u16 num_popped)
179{
180 u32 val = 0;
181 val |= qid & DB_EQ_RING_ID_MASK;
cf588477
SP		 182
183 if (adapter->eeh_err)
184 return;
185
6b7c5b94
SP		 186 if (arm)
187 val |= 1 << DB_EQ_REARM_SHIFT;
188 if (clear_int)
189 val |= 1 << DB_EQ_CLR_SHIFT;
190 val |= 1 << DB_EQ_EVNT_SHIFT;
191 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
8788fdc2 192 iowrite32(val, adapter->db + DB_EQ_OFFSET);
6b7c5b94
SP		 193}
194
8788fdc2 195void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
6b7c5b94
SP		 196{
197 u32 val = 0;
198 val |= qid & DB_CQ_RING_ID_MASK;
cf588477
SP		 199
200 if (adapter->eeh_err)
201 return;
202
6b7c5b94
SP		 203 if (arm)
204 val |= 1 << DB_CQ_REARM_SHIFT;
205 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
8788fdc2 206 iowrite32(val, adapter->db + DB_CQ_OFFSET);
6b7c5b94
SP		 207}
208
6b7c5b94
SP		 209static int be_mac_addr_set(struct net_device *netdev, void *p)
210{
211 struct be_adapter *adapter = netdev_priv(netdev);
212 struct sockaddr *addr = p;
213 int status = 0;
214
ca9e4988
AK		 215 if (!is_valid_ether_addr(addr->sa_data))
216 return -EADDRNOTAVAIL;
217
ba343c77
SB		 218 /* MAC addr configuration will be done in hardware for VFs
219 * by their corresponding PFs. Just copy to netdev addr here
220 */
221 if (!be_physfn(adapter))
222 goto netdev_addr;
223
a65027e4
SP		 224 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
225 if (status)
226 return status;
6b7c5b94 227
a65027e4
SP		 228 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
229 adapter->if_handle, &adapter->pmac_id);
ba343c77 230netdev_addr:
6b7c5b94
SP		 231 if (!status)
232 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
233
234 return status;
235}
236
b31c50a7 237void netdev_stats_update(struct be_adapter *adapter)
6b7c5b94
SP		 238{
239 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
240 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
241 struct be_port_rxf_stats *port_stats =
242 &rxf_stats->port[adapter->port_num];
78122a52 243 struct net_device_stats *dev_stats = &adapter->netdev->stats;
68110868 244 struct be_erx_stats *erx_stats = &hw_stats->erx;
6b7c5b94 245
91992e44
AK		 246 dev_stats->rx_packets = drvr_stats(adapter)->be_rx_pkts;
247 dev_stats->tx_packets = drvr_stats(adapter)->be_tx_pkts;
248 dev_stats->rx_bytes = drvr_stats(adapter)->be_rx_bytes;
249 dev_stats->tx_bytes = drvr_stats(adapter)->be_tx_bytes;
1ef78abe 250 dev_stats->multicast = drvr_stats(adapter)->be_rx_mcast_pkt;
6b7c5b94
SP		 251
252 /* bad pkts received */
253 dev_stats->rx_errors = port_stats->rx_crc_errors +
254 port_stats->rx_alignment_symbol_errors +
255 port_stats->rx_in_range_errors +
68110868
SP		 256 port_stats->rx_out_range_errors +
257 port_stats->rx_frame_too_long +
258 port_stats->rx_dropped_too_small +
259 port_stats->rx_dropped_too_short +
260 port_stats->rx_dropped_header_too_small +
261 port_stats->rx_dropped_tcp_length +
262 port_stats->rx_dropped_runt +
263 port_stats->rx_tcp_checksum_errs +
264 port_stats->rx_ip_checksum_errs +
265 port_stats->rx_udp_checksum_errs;
266
267 /* no space in linux buffers: best possible approximation */
01ed30da
SP		 268 dev_stats->rx_dropped =
269 erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
6b7c5b94
SP		 270
271 /* detailed rx errors */
272 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
68110868
SP		 273 port_stats->rx_out_range_errors +
274 port_stats->rx_frame_too_long;
275
6b7c5b94
SP		 276 /* receive ring buffer overflow */
277 dev_stats->rx_over_errors = 0;
68110868 278
6b7c5b94
SP		 279 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
280
281 /* frame alignment errors */
282 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
68110868 283
6b7c5b94
SP		 284 /* receiver fifo overrun */
285 /* drops_no_pbuf is no per i/f, it's per BE card */
286 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
287 port_stats->rx_input_fifo_overflow +
288 rxf_stats->rx_drops_no_pbuf;
289 /* receiver missed packetd */
290 dev_stats->rx_missed_errors = 0;
68110868
SP		 291
292 /* packet transmit problems */
293 dev_stats->tx_errors = 0;
294
295 /* no space available in linux */
296 dev_stats->tx_dropped = 0;
297
68110868
SP		 298 dev_stats->collisions = 0;
299
6b7c5b94
SP		 300 /* detailed tx_errors */
301 dev_stats->tx_aborted_errors = 0;
302 dev_stats->tx_carrier_errors = 0;
303 dev_stats->tx_fifo_errors = 0;
304 dev_stats->tx_heartbeat_errors = 0;
305 dev_stats->tx_window_errors = 0;
306}
307
8788fdc2 308void be_link_status_update(struct be_adapter *adapter, bool link_up)
6b7c5b94 309{
6b7c5b94
SP		 310 struct net_device *netdev = adapter->netdev;
311
6b7c5b94 312 /* If link came up or went down */
a8f447bd 313 if (adapter->link_up != link_up) {
0dffc83e 314 adapter->link_speed = -1;
a8f447bd 315 if (link_up) {
6b7c5b94
SP		 316 netif_start_queue(netdev);
317 netif_carrier_on(netdev);
318 printk(KERN_INFO "%s: Link up\n", netdev->name);
a8f447bd
SP		 319 } else {
320 netif_stop_queue(netdev);
321 netif_carrier_off(netdev);
322 printk(KERN_INFO "%s: Link down\n", netdev->name);
6b7c5b94 323 }
a8f447bd 324 adapter->link_up = link_up;
6b7c5b94 325 }
6b7c5b94
SP		 326}
327
328/* Update the EQ delay n BE based on the RX frags consumed / sec */
329static void be_rx_eqd_update(struct be_adapter *adapter)
330{
6b7c5b94
SP		 331 struct be_eq_obj *rx_eq = &adapter->rx_eq;
332 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
4097f663
SP		 333 ulong now = jiffies;
334 u32 eqd;
335
336 if (!rx_eq->enable_aic)
337 return;
338
339 /* Wrapped around */
340 if (time_before(now, stats->rx_fps_jiffies)) {
341 stats->rx_fps_jiffies = now;
342 return;
343 }
6b7c5b94
SP		 344
345 /* Update once a second */
4097f663 346 if ((now - stats->rx_fps_jiffies) < HZ)
6b7c5b94
SP		 347 return;
348
349 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
4097f663 350 ((now - stats->rx_fps_jiffies) / HZ);
6b7c5b94 351
4097f663 352 stats->rx_fps_jiffies = now;
6b7c5b94
SP		 353 stats->be_prev_rx_frags = stats->be_rx_frags;
354 eqd = stats->be_rx_fps / 110000;
355 eqd = eqd << 3;
356 if (eqd > rx_eq->max_eqd)
357 eqd = rx_eq->max_eqd;
358 if (eqd < rx_eq->min_eqd)
359 eqd = rx_eq->min_eqd;
360 if (eqd < 10)
361 eqd = 0;
362 if (eqd != rx_eq->cur_eqd)
8788fdc2 363 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
6b7c5b94
SP		 364
365 rx_eq->cur_eqd = eqd;
366}
367
65f71b8b
SH		 368static u32 be_calc_rate(u64 bytes, unsigned long ticks)
369{
370 u64 rate = bytes;
371
372 do_div(rate, ticks / HZ);
373 rate <<= 3; /* bytes/sec -> bits/sec */
374 do_div(rate, 1000000ul); /* MB/Sec */
375
376 return rate;
377}
378
4097f663
SP		 379static void be_tx_rate_update(struct be_adapter *adapter)
380{
381 struct be_drvr_stats *stats = drvr_stats(adapter);
382 ulong now = jiffies;
383
384 /* Wrapped around? */
385 if (time_before(now, stats->be_tx_jiffies)) {
386 stats->be_tx_jiffies = now;
387 return;
388 }
389
390 /* Update tx rate once in two seconds */
391 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
65f71b8b
SH		 392 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
393 - stats->be_tx_bytes_prev,
394 now - stats->be_tx_jiffies);
4097f663
SP		 395 stats->be_tx_jiffies = now;
396 stats->be_tx_bytes_prev = stats->be_tx_bytes;
397 }
398}
399
6b7c5b94 400static void be_tx_stats_update(struct be_adapter *adapter,
91992e44 401 u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
6b7c5b94 402{
4097f663 403 struct be_drvr_stats *stats = drvr_stats(adapter);
6b7c5b94
SP		 404 stats->be_tx_reqs++;
405 stats->be_tx_wrbs += wrb_cnt;
406 stats->be_tx_bytes += copied;
91992e44 407 stats->be_tx_pkts += (gso_segs ? gso_segs : 1);
6b7c5b94
SP		 408 if (stopped)
409 stats->be_tx_stops++;
6b7c5b94
SP		 410}
411
412/* Determine number of WRB entries needed to xmit data in an skb */
413static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
414{
ebc8d2ab
DM		 415 int cnt = (skb->len > skb->data_len);
416
417 cnt += skb_shinfo(skb)->nr_frags;
418
6b7c5b94
SP		 419 /* to account for hdr wrb */
420 cnt++;
421 if (cnt & 1) {
422 /* add a dummy to make it an even num */
423 cnt++;
424 *dummy = true;
425 } else
426 *dummy = false;
427 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
428 return cnt;
429}
430
431static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
432{
433 wrb->frag_pa_hi = upper_32_bits(addr);
434 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
435 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
436}
437
438static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
439 bool vlan, u32 wrb_cnt, u32 len)
440{
441 memset(hdr, 0, sizeof(*hdr));
442
443 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
444
49e4b847 445 if (skb_is_gso(skb)) {
6b7c5b94
SP		 446 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
447 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
448 hdr, skb_shinfo(skb)->gso_size);
49e4b847
AK		 449 if (skb_is_gso_v6(skb))
450 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso6, hdr, 1);
6b7c5b94
SP		 451 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
452 if (is_tcp_pkt(skb))
453 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
454 else if (is_udp_pkt(skb))
455 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
456 }
457
458 if (vlan && vlan_tx_tag_present(skb)) {
459 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
460 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
461 hdr, vlan_tx_tag_get(skb));
462 }
463
464 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
465 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
466 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
467 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
468}
469
7101e111
SP		 470static void unmap_tx_frag(struct pci_dev *pdev, struct be_eth_wrb *wrb,
471 bool unmap_single)
472{
473 dma_addr_t dma;
474
475 be_dws_le_to_cpu(wrb, sizeof(*wrb));
476
477 dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo;
b681ee77 478 if (wrb->frag_len) {
7101e111
SP		 479 if (unmap_single)
480 pci_unmap_single(pdev, dma, wrb->frag_len,
481 PCI_DMA_TODEVICE);
482 else
483 pci_unmap_page(pdev, dma, wrb->frag_len,
484 PCI_DMA_TODEVICE);
485 }
486}
6b7c5b94
SP		 487
488static int make_tx_wrbs(struct be_adapter *adapter,
489 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
490{
7101e111
SP		 491 dma_addr_t busaddr;
492 int i, copied = 0;
6b7c5b94
SP		 493 struct pci_dev *pdev = adapter->pdev;
494 struct sk_buff *first_skb = skb;
495 struct be_queue_info *txq = &adapter->tx_obj.q;
496 struct be_eth_wrb *wrb;
497 struct be_eth_hdr_wrb *hdr;
7101e111
SP		 498 bool map_single = false;
499 u16 map_head;
6b7c5b94 500
6b7c5b94
SP		 501 hdr = queue_head_node(txq);
502 queue_head_inc(txq);
7101e111 503 map_head = txq->head;
6b7c5b94 504
ebc8d2ab 505 if (skb->len > skb->data_len) {
e743d313 506 int len = skb_headlen(skb);
a73b796e
AD		 507 busaddr = pci_map_single(pdev, skb->data, len,
508 PCI_DMA_TODEVICE);
7101e111
SP		 509 if (pci_dma_mapping_error(pdev, busaddr))
510 goto dma_err;
511 map_single = true;
ebc8d2ab
DM		 512 wrb = queue_head_node(txq);
513 wrb_fill(wrb, busaddr, len);
514 be_dws_cpu_to_le(wrb, sizeof(*wrb));
515 queue_head_inc(txq);
516 copied += len;
517 }
6b7c5b94 518
ebc8d2ab
DM		 519 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
520 struct skb_frag_struct *frag =
521 &skb_shinfo(skb)->frags[i];
a73b796e
AD		 522 busaddr = pci_map_page(pdev, frag->page,
523 frag->page_offset,
524 frag->size, PCI_DMA_TODEVICE);
7101e111
SP		 525 if (pci_dma_mapping_error(pdev, busaddr))
526 goto dma_err;
ebc8d2ab
DM		 527 wrb = queue_head_node(txq);
528 wrb_fill(wrb, busaddr, frag->size);
529 be_dws_cpu_to_le(wrb, sizeof(*wrb));
530 queue_head_inc(txq);
531 copied += frag->size;
6b7c5b94
SP		 532 }
533
534 if (dummy_wrb) {
535 wrb = queue_head_node(txq);
536 wrb_fill(wrb, 0, 0);
537 be_dws_cpu_to_le(wrb, sizeof(*wrb));
538 queue_head_inc(txq);
539 }
540
541 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
542 wrb_cnt, copied);
543 be_dws_cpu_to_le(hdr, sizeof(*hdr));
544
545 return copied;
7101e111
SP		 546dma_err:
547 txq->head = map_head;
548 while (copied) {
549 wrb = queue_head_node(txq);
550 unmap_tx_frag(pdev, wrb, map_single);
551 map_single = false;
552 copied -= wrb->frag_len;
553 queue_head_inc(txq);
554 }
555 return 0;
6b7c5b94
SP		 556}
557
61357325 558static netdev_tx_t be_xmit(struct sk_buff *skb,
b31c50a7 559 struct net_device *netdev)
6b7c5b94
SP		 560{
561 struct be_adapter *adapter = netdev_priv(netdev);
562 struct be_tx_obj *tx_obj = &adapter->tx_obj;
563 struct be_queue_info *txq = &tx_obj->q;
564 u32 wrb_cnt = 0, copied = 0;
565 u32 start = txq->head;
566 bool dummy_wrb, stopped = false;
567
568 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
569
570 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
c190e3c8
AK		 571 if (copied) {
572 /* record the sent skb in the sent_skb table */
573 BUG_ON(tx_obj->sent_skb_list[start]);
574 tx_obj->sent_skb_list[start] = skb;
575
576 /* Ensure txq has space for the next skb; Else stop the queue
577 * *BEFORE* ringing the tx doorbell, so that we serialze the
578 * tx compls of the current transmit which'll wake up the queue
579 */
7101e111 580 atomic_add(wrb_cnt, &txq->used);
c190e3c8
AK		 581 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
582 txq->len) {
583 netif_stop_queue(netdev);
584 stopped = true;
585 }
6b7c5b94 586
c190e3c8 587 be_txq_notify(adapter, txq->id, wrb_cnt);
6b7c5b94 588
91992e44
AK		 589 be_tx_stats_update(adapter, wrb_cnt, copied,
590 skb_shinfo(skb)->gso_segs, stopped);
c190e3c8
AK		 591 } else {
592 txq->head = start;
593 dev_kfree_skb_any(skb);
6b7c5b94 594 }
6b7c5b94
SP		 595 return NETDEV_TX_OK;
596}
597
598static int be_change_mtu(struct net_device *netdev, int new_mtu)
599{
600 struct be_adapter *adapter = netdev_priv(netdev);
601 if (new_mtu < BE_MIN_MTU ||
34a89b8c
AK		 602 new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
603 (ETH_HLEN + ETH_FCS_LEN))) {
6b7c5b94
SP		 604 dev_info(&adapter->pdev->dev,
605 "MTU must be between %d and %d bytes\n",
34a89b8c
AK		 606 BE_MIN_MTU,
607 (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
6b7c5b94
SP		 608 return -EINVAL;
609 }
610 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
611 netdev->mtu, new_mtu);
612 netdev->mtu = new_mtu;
613 return 0;
614}
615
616/*
82903e4b
AK		 617 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
618 * If the user configures more, place BE in vlan promiscuous mode.
6b7c5b94 619 */
1da87b7f 620static int be_vid_config(struct be_adapter *adapter, bool vf, u32 vf_num)
6b7c5b94 621{
6b7c5b94
SP		 622 u16 vtag[BE_NUM_VLANS_SUPPORTED];
623 u16 ntags = 0, i;
82903e4b 624 int status = 0;
1da87b7f
AK		 625 u32 if_handle;
626
627 if (vf) {
628 if_handle = adapter->vf_cfg[vf_num].vf_if_handle;
629 vtag[0] = cpu_to_le16(adapter->vf_cfg[vf_num].vf_vlan_tag);
630 status = be_cmd_vlan_config(adapter, if_handle, vtag, 1, 1, 0);
631 }
6b7c5b94 632
82903e4b 633 if (adapter->vlans_added <= adapter->max_vlans) {
6b7c5b94
SP		 634 /* Construct VLAN Table to give to HW */
635 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
636 if (adapter->vlan_tag[i]) {
637 vtag[ntags] = cpu_to_le16(i);
638 ntags++;
639 }
640 }
b31c50a7
SP		 641 status = be_cmd_vlan_config(adapter, adapter->if_handle,
642 vtag, ntags, 1, 0);
6b7c5b94 643 } else {
b31c50a7
SP		 644 status = be_cmd_vlan_config(adapter, adapter->if_handle,
645 NULL, 0, 1, 1);
6b7c5b94 646 }
1da87b7f 647
b31c50a7 648 return status;
6b7c5b94
SP		 649}
650
651static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
652{
653 struct be_adapter *adapter = netdev_priv(netdev);
654 struct be_eq_obj *rx_eq = &adapter->rx_eq;
655 struct be_eq_obj *tx_eq = &adapter->tx_eq;
6b7c5b94 656
8788fdc2
SP		 657 be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
658 be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
6b7c5b94 659 adapter->vlan_grp = grp;
8788fdc2
SP		 660 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
661 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
6b7c5b94
SP		 662}
663
664static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
665{
666 struct be_adapter *adapter = netdev_priv(netdev);
667
1da87b7f 668 adapter->vlans_added++;
ba343c77
SB		 669 if (!be_physfn(adapter))
670 return;
671
6b7c5b94 672 adapter->vlan_tag[vid] = 1;
82903e4b 673 if (adapter->vlans_added <= (adapter->max_vlans + 1))
1da87b7f 674 be_vid_config(adapter, false, 0);
6b7c5b94
SP		 675}
676
677static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
678{
679 struct be_adapter *adapter = netdev_priv(netdev);
680
1da87b7f
AK		 681 adapter->vlans_added--;
682 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
683
ba343c77
SB		 684 if (!be_physfn(adapter))
685 return;
686
6b7c5b94 687 adapter->vlan_tag[vid] = 0;
82903e4b 688 if (adapter->vlans_added <= adapter->max_vlans)
1da87b7f 689 be_vid_config(adapter, false, 0);
6b7c5b94
SP		 690}
691
24307eef 692static void be_set_multicast_list(struct net_device *netdev)
6b7c5b94
SP		 693{
694 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94 695
24307eef 696 if (netdev->flags & IFF_PROMISC) {
8788fdc2 697 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
24307eef
SP		 698 adapter->promiscuous = true;
699 goto done;
6b7c5b94
SP		 700 }
701
24307eef
SP		 702 /* BE was previously in promiscous mode; disable it */
703 if (adapter->promiscuous) {
704 adapter->promiscuous = false;
8788fdc2 705 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
6b7c5b94
SP		 706 }
707
e7b909a6 708 /* Enable multicast promisc if num configured exceeds what we support */
4cd24eaf
JP		 709 if (netdev->flags & IFF_ALLMULTI ||
710 netdev_mc_count(netdev) > BE_MAX_MC) {
0ddf477b 711 be_cmd_multicast_set(adapter, adapter->if_handle, NULL,
e7b909a6 712 &adapter->mc_cmd_mem);
24307eef 713 goto done;
6b7c5b94 714 }
6b7c5b94 715
0ddf477b 716 be_cmd_multicast_set(adapter, adapter->if_handle, netdev,
f31e50a8 717 &adapter->mc_cmd_mem);
24307eef
SP		 718done:
719 return;
6b7c5b94
SP		 720}
721
ba343c77
SB		 722static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
723{
724 struct be_adapter *adapter = netdev_priv(netdev);
725 int status;
726
727 if (!adapter->sriov_enabled)
728 return -EPERM;
729
730 if (!is_valid_ether_addr(mac) || (vf >= num_vfs))
731 return -EINVAL;
732
64600ea5
AK		 733 if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
734 status = be_cmd_pmac_del(adapter,
735 adapter->vf_cfg[vf].vf_if_handle,
736 adapter->vf_cfg[vf].vf_pmac_id);
ba343c77 737
64600ea5
AK		 738 status = be_cmd_pmac_add(adapter, mac,
739 adapter->vf_cfg[vf].vf_if_handle,
740 &adapter->vf_cfg[vf].vf_pmac_id);
741
742 if (status)
ba343c77
SB		 743 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n",
744 mac, vf);
64600ea5
AK		 745 else
746 memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
747
ba343c77
SB		 748 return status;
749}
750
64600ea5
AK		 751static int be_get_vf_config(struct net_device *netdev, int vf,
752 struct ifla_vf_info *vi)
753{
754 struct be_adapter *adapter = netdev_priv(netdev);
755
756 if (!adapter->sriov_enabled)
757 return -EPERM;
758
759 if (vf >= num_vfs)
760 return -EINVAL;
761
762 vi->vf = vf;
e1d18735 763 vi->tx_rate = adapter->vf_cfg[vf].vf_tx_rate;
1da87b7f 764 vi->vlan = adapter->vf_cfg[vf].vf_vlan_tag;
64600ea5
AK		 765 vi->qos = 0;
766 memcpy(&vi->mac, adapter->vf_cfg[vf].vf_mac_addr, ETH_ALEN);
767
768 return 0;
769}
770
1da87b7f
AK		 771static int be_set_vf_vlan(struct net_device *netdev,
772 int vf, u16 vlan, u8 qos)
773{
774 struct be_adapter *adapter = netdev_priv(netdev);
775 int status = 0;
776
777 if (!adapter->sriov_enabled)
778 return -EPERM;
779
780 if ((vf >= num_vfs) || (vlan > 4095))
781 return -EINVAL;
782
783 if (vlan) {
784 adapter->vf_cfg[vf].vf_vlan_tag = vlan;
785 adapter->vlans_added++;
786 } else {
787 adapter->vf_cfg[vf].vf_vlan_tag = 0;
788 adapter->vlans_added--;
789 }
790
791 status = be_vid_config(adapter, true, vf);
792
793 if (status)
794 dev_info(&adapter->pdev->dev,
795 "VLAN %d config on VF %d failed\n", vlan, vf);
796 return status;
797}
798
e1d18735
AK		 799static int be_set_vf_tx_rate(struct net_device *netdev,
800 int vf, int rate)
801{
802 struct be_adapter *adapter = netdev_priv(netdev);
803 int status = 0;
804
805 if (!adapter->sriov_enabled)
806 return -EPERM;
807
808 if ((vf >= num_vfs) || (rate < 0))
809 return -EINVAL;
810
811 if (rate > 10000)
812 rate = 10000;
813
814 adapter->vf_cfg[vf].vf_tx_rate = rate;
815 status = be_cmd_set_qos(adapter, rate / 10, vf);
816
817 if (status)
818 dev_info(&adapter->pdev->dev,
819 "tx rate %d on VF %d failed\n", rate, vf);
820 return status;
821}
822
4097f663 823static void be_rx_rate_update(struct be_adapter *adapter)
6b7c5b94 824{
4097f663
SP		 825 struct be_drvr_stats *stats = drvr_stats(adapter);
826 ulong now = jiffies;
6b7c5b94 827
4097f663
SP		 828 /* Wrapped around */
829 if (time_before(now, stats->be_rx_jiffies)) {
830 stats->be_rx_jiffies = now;
831 return;
832 }
6b7c5b94
SP		 833
834 /* Update the rate once in two seconds */
4097f663 835 if ((now - stats->be_rx_jiffies) < 2 * HZ)
6b7c5b94
SP		 836 return;
837
65f71b8b
SH		 838 stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
839 - stats->be_rx_bytes_prev,
840 now - stats->be_rx_jiffies);
4097f663 841 stats->be_rx_jiffies = now;
6b7c5b94
SP		 842 stats->be_rx_bytes_prev = stats->be_rx_bytes;
843}
844
4097f663 845static void be_rx_stats_update(struct be_adapter *adapter,
1ef78abe 846 u32 pktsize, u16 numfrags, u8 pkt_type)
4097f663
SP		 847{
848 struct be_drvr_stats *stats = drvr_stats(adapter);
849
850 stats->be_rx_compl++;
851 stats->be_rx_frags += numfrags;
852 stats->be_rx_bytes += pktsize;
91992e44 853 stats->be_rx_pkts++;
1ef78abe
AK		 854
855 if (pkt_type == BE_MULTICAST_PACKET)
856 stats->be_rx_mcast_pkt++;
4097f663
SP		 857}
858
728a9972
AK		 859static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
860{
861 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
862
863 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
864 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
865 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
866 if (ip_version) {
867 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
868 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
869 }
870 ipv6_chk = (ip_version && (tcpf || udpf));
871
872 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
873}
874
6b7c5b94
SP		 875static struct be_rx_page_info *
876get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
877{
878 struct be_rx_page_info *rx_page_info;
879 struct be_queue_info *rxq = &adapter->rx_obj.q;
880
881 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
882 BUG_ON(!rx_page_info->page);
883
205859a2 884 if (rx_page_info->last_page_user) {
fac6da5b 885 pci_unmap_page(adapter->pdev, dma_unmap_addr(rx_page_info, bus),
6b7c5b94 886 adapter->big_page_size, PCI_DMA_FROMDEVICE);
205859a2
AK		 887 rx_page_info->last_page_user = false;
888 }
6b7c5b94
SP		 889
890 atomic_dec(&rxq->used);
891 return rx_page_info;
892}
893
894/* Throwaway the data in the Rx completion */
895static void be_rx_compl_discard(struct be_adapter *adapter,
896 struct be_eth_rx_compl *rxcp)
897{
898 struct be_queue_info *rxq = &adapter->rx_obj.q;
899 struct be_rx_page_info *page_info;
900 u16 rxq_idx, i, num_rcvd;
901
902 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
903 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
904
905 for (i = 0; i < num_rcvd; i++) {
906 page_info = get_rx_page_info(adapter, rxq_idx);
907 put_page(page_info->page);
908 memset(page_info, 0, sizeof(*page_info));
909 index_inc(&rxq_idx, rxq->len);
910 }
911}
912
913/*
914 * skb_fill_rx_data forms a complete skb for an ether frame
915 * indicated by rxcp.
916 */
917static void skb_fill_rx_data(struct be_adapter *adapter,
89420424
SP		 918 struct sk_buff *skb, struct be_eth_rx_compl *rxcp,
919 u16 num_rcvd)
6b7c5b94
SP		 920{
921 struct be_queue_info *rxq = &adapter->rx_obj.q;
922 struct be_rx_page_info *page_info;
89420424 923 u16 rxq_idx, i, j;
fa77406a 924 u32 pktsize, hdr_len, curr_frag_len, size;
6b7c5b94 925 u8 *start;
1ef78abe 926 u8 pkt_type;
6b7c5b94
SP		 927
928 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
929 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
1ef78abe 930 pkt_type = AMAP_GET_BITS(struct amap_eth_rx_compl, cast_enc, rxcp);
6b7c5b94
SP		 931
932 page_info = get_rx_page_info(adapter, rxq_idx);
933
934 start = page_address(page_info->page) + page_info->page_offset;
935 prefetch(start);
936
937 /* Copy data in the first descriptor of this completion */
938 curr_frag_len = min(pktsize, rx_frag_size);
939
940 /* Copy the header portion into skb_data */
941 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
942 memcpy(skb->data, start, hdr_len);
943 skb->len = curr_frag_len;
944 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
945 /* Complete packet has now been moved to data */
946 put_page(page_info->page);
947 skb->data_len = 0;
948 skb->tail += curr_frag_len;
949 } else {
950 skb_shinfo(skb)->nr_frags = 1;
951 skb_shinfo(skb)->frags[0].page = page_info->page;
952 skb_shinfo(skb)->frags[0].page_offset =
953 page_info->page_offset + hdr_len;
954 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
955 skb->data_len = curr_frag_len - hdr_len;
956 skb->tail += hdr_len;
957 }
205859a2 958 page_info->page = NULL;
6b7c5b94
SP		 959
960 if (pktsize <= rx_frag_size) {
961 BUG_ON(num_rcvd != 1);
76fbb429 962 goto done;
6b7c5b94
SP		 963 }
964
965 /* More frags present for this completion */
fa77406a 966 size = pktsize;
bd46cb6c 967 for (i = 1, j = 0; i < num_rcvd; i++) {
fa77406a 968 size -= curr_frag_len;
6b7c5b94
SP		 969 index_inc(&rxq_idx, rxq->len);
970 page_info = get_rx_page_info(adapter, rxq_idx);
971
fa77406a 972 curr_frag_len = min(size, rx_frag_size);
6b7c5b94 973
bd46cb6c
AK		 974 /* Coalesce all frags from the same physical page in one slot */
975 if (page_info->page_offset == 0) {
976 /* Fresh page */
977 j++;
978 skb_shinfo(skb)->frags[j].page = page_info->page;
979 skb_shinfo(skb)->frags[j].page_offset =
980 page_info->page_offset;
981 skb_shinfo(skb)->frags[j].size = 0;
982 skb_shinfo(skb)->nr_frags++;
983 } else {
984 put_page(page_info->page);
985 }
986
987 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94
SP		 988 skb->len += curr_frag_len;
989 skb->data_len += curr_frag_len;
6b7c5b94 990
205859a2 991 page_info->page = NULL;
6b7c5b94 992 }
bd46cb6c 993 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 994
76fbb429 995done:
1ef78abe 996 be_rx_stats_update(adapter, pktsize, num_rcvd, pkt_type);
6b7c5b94
SP		 997}
998
5be93b9a 999/* Process the RX completion indicated by rxcp when GRO is disabled */
6b7c5b94
SP		 1000static void be_rx_compl_process(struct be_adapter *adapter,
1001 struct be_eth_rx_compl *rxcp)
1002{
1003 struct sk_buff *skb;
dcb9b564 1004 u32 vlanf, vid;
89420424 1005 u16 num_rcvd;
dcb9b564 1006 u8 vtm;
6b7c5b94 1007
89420424
SP		 1008 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
1009 /* Is it a flush compl that has no data */
1010 if (unlikely(num_rcvd == 0))
1011 return;
1012
89d71a66 1013 skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
a058a632 1014 if (unlikely(!skb)) {
6b7c5b94
SP		 1015 if (net_ratelimit())
1016 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
1017 be_rx_compl_discard(adapter, rxcp);
1018 return;
1019 }
1020
89420424 1021 skb_fill_rx_data(adapter, skb, rxcp, num_rcvd);
6b7c5b94 1022
728a9972 1023 if (do_pkt_csum(rxcp, adapter->rx_csum))
bc8acf2c 1024 skb_checksum_none_assert(skb);
728a9972
AK		 1025 else
1026 skb->ip_summed = CHECKSUM_UNNECESSARY;
6b7c5b94
SP		 1027
1028 skb->truesize = skb->len + sizeof(struct sk_buff);
1029 skb->protocol = eth_type_trans(skb, adapter->netdev);
6b7c5b94 1030
a058a632
SP		 1031 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
1032 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
1033
1034 /* vlanf could be wrongly set in some cards.
1035 * ignore if vtm is not set */
3486be29 1036 if ((adapter->function_mode & 0x400) && !vtm)
a058a632
SP		 1037 vlanf = 0;
1038
1039 if (unlikely(vlanf)) {
82903e4b 1040 if (!adapter->vlan_grp || adapter->vlans_added == 0) {
6b7c5b94
SP		 1041 kfree_skb(skb);
1042 return;
1043 }
1044 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
9cae9e4f 1045 vid = swab16(vid);
6b7c5b94
SP		 1046 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
1047 } else {
1048 netif_receive_skb(skb);
1049 }
6b7c5b94
SP		 1050}
1051
5be93b9a
AK		 1052/* Process the RX completion indicated by rxcp when GRO is enabled */
1053static void be_rx_compl_process_gro(struct be_adapter *adapter,
6b7c5b94
SP		 1054 struct be_eth_rx_compl *rxcp)
1055{
1056 struct be_rx_page_info *page_info;
5be93b9a 1057 struct sk_buff *skb = NULL;
6b7c5b94 1058 struct be_queue_info *rxq = &adapter->rx_obj.q;
5be93b9a 1059 struct be_eq_obj *eq_obj = &adapter->rx_eq;
6b7c5b94 1060 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
bd46cb6c 1061 u16 i, rxq_idx = 0, vid, j;
dcb9b564 1062 u8 vtm;
1ef78abe 1063 u8 pkt_type;
6b7c5b94
SP		 1064
1065 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
89420424
SP		 1066 /* Is it a flush compl that has no data */
1067 if (unlikely(num_rcvd == 0))
1068 return;
1069
6b7c5b94
SP		 1070 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
1071 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
1072 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
dcb9b564 1073 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
1ef78abe 1074 pkt_type = AMAP_GET_BITS(struct amap_eth_rx_compl, cast_enc, rxcp);
dcb9b564
AK		 1075
1076 /* vlanf could be wrongly set in some cards.
1077 * ignore if vtm is not set */
3486be29 1078 if ((adapter->function_mode & 0x400) && !vtm)
dcb9b564 1079 vlanf = 0;
6b7c5b94 1080
5be93b9a
AK		 1081 skb = napi_get_frags(&eq_obj->napi);
1082 if (!skb) {
1083 be_rx_compl_discard(adapter, rxcp);
1084 return;
1085 }
1086
6b7c5b94 1087 remaining = pkt_size;
bd46cb6c 1088 for (i = 0, j = -1; i < num_rcvd; i++) {
6b7c5b94
SP		 1089 page_info = get_rx_page_info(adapter, rxq_idx);
1090
1091 curr_frag_len = min(remaining, rx_frag_size);
1092
bd46cb6c
AK		 1093 /* Coalesce all frags from the same physical page in one slot */
1094 if (i == 0 || page_info->page_offset == 0) {
1095 /* First frag or Fresh page */
1096 j++;
5be93b9a
AK		 1097 skb_shinfo(skb)->frags[j].page = page_info->page;
1098 skb_shinfo(skb)->frags[j].page_offset =
1099 page_info->page_offset;
1100 skb_shinfo(skb)->frags[j].size = 0;
bd46cb6c
AK		 1101 } else {
1102 put_page(page_info->page);
1103 }
5be93b9a 1104 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94 1105
bd46cb6c 1106 remaining -= curr_frag_len;
6b7c5b94 1107 index_inc(&rxq_idx, rxq->len);
6b7c5b94
SP		 1108 memset(page_info, 0, sizeof(*page_info));
1109 }
bd46cb6c 1110 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 1111
5be93b9a
AK		 1112 skb_shinfo(skb)->nr_frags = j + 1;
1113 skb->len = pkt_size;
1114 skb->data_len = pkt_size;
1115 skb->truesize += pkt_size;
1116 skb->ip_summed = CHECKSUM_UNNECESSARY;
1117
6b7c5b94 1118 if (likely(!vlanf)) {
5be93b9a 1119 napi_gro_frags(&eq_obj->napi);
6b7c5b94
SP		 1120 } else {
1121 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
9cae9e4f 1122 vid = swab16(vid);
6b7c5b94 1123
82903e4b 1124 if (!adapter->vlan_grp || adapter->vlans_added == 0)
6b7c5b94
SP		 1125 return;
1126
5be93b9a 1127 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
6b7c5b94
SP		 1128 }
1129
1ef78abe 1130 be_rx_stats_update(adapter, pkt_size, num_rcvd, pkt_type);
6b7c5b94
SP		 1131}
1132
1133static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
1134{
1135 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
1136
1137 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
1138 return NULL;
1139
f3eb62d2 1140 rmb();
6b7c5b94
SP		 1141 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
1142
6b7c5b94
SP		 1143 queue_tail_inc(&adapter->rx_obj.cq);
1144 return rxcp;
1145}
1146
a7a0ef31
SP		 1147/* To reset the valid bit, we need to reset the whole word as
1148 * when walking the queue the valid entries are little-endian
1149 * and invalid entries are host endian
1150 */
1151static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
1152{
1153 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
1154}
1155
6b7c5b94
SP		 1156static inline struct page *be_alloc_pages(u32 size)
1157{
1158 gfp_t alloc_flags = GFP_ATOMIC;
1159 u32 order = get_order(size);
1160 if (order > 0)
1161 alloc_flags |= __GFP_COMP;
1162 return alloc_pages(alloc_flags, order);
1163}
1164
1165/*
1166 * Allocate a page, split it to fragments of size rx_frag_size and post as
1167 * receive buffers to BE
1168 */
1169static void be_post_rx_frags(struct be_adapter *adapter)
1170{
1171 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
26d92f92 1172 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
6b7c5b94
SP		 1173 struct be_queue_info *rxq = &adapter->rx_obj.q;
1174 struct page *pagep = NULL;
1175 struct be_eth_rx_d *rxd;
1176 u64 page_dmaaddr = 0, frag_dmaaddr;
1177 u32 posted, page_offset = 0;
1178
6b7c5b94
SP		 1179 page_info = &page_info_tbl[rxq->head];
1180 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
1181 if (!pagep) {
1182 pagep = be_alloc_pages(adapter->big_page_size);
1183 if (unlikely(!pagep)) {
1184 drvr_stats(adapter)->be_ethrx_post_fail++;
1185 break;
1186 }
1187 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
1188 adapter->big_page_size,
1189 PCI_DMA_FROMDEVICE);
1190 page_info->page_offset = 0;
1191 } else {
1192 get_page(pagep);
1193 page_info->page_offset = page_offset + rx_frag_size;
1194 }
1195 page_offset = page_info->page_offset;
1196 page_info->page = pagep;
fac6da5b 1197 dma_unmap_addr_set(page_info, bus, page_dmaaddr);
6b7c5b94
SP		 1198 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
1199
1200 rxd = queue_head_node(rxq);
1201 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
1202 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
6b7c5b94
SP		 1203
1204 /* Any space left in the current big page for another frag? */
1205 if ((page_offset + rx_frag_size + rx_frag_size) >
1206 adapter->big_page_size) {
1207 pagep = NULL;
1208 page_info->last_page_user = true;
1209 }
26d92f92
SP		 1210
1211 prev_page_info = page_info;
1212 queue_head_inc(rxq);
6b7c5b94
SP		 1213 page_info = &page_info_tbl[rxq->head];
1214 }
1215 if (pagep)
26d92f92 1216 prev_page_info->last_page_user = true;
6b7c5b94
SP		 1217
1218 if (posted) {
6b7c5b94 1219 atomic_add(posted, &rxq->used);
8788fdc2 1220 be_rxq_notify(adapter, rxq->id, posted);
ea1dae11
SP		 1221 } else if (atomic_read(&rxq->used) == 0) {
1222 /* Let be_worker replenish when memory is available */
1223 adapter->rx_post_starved = true;
6b7c5b94 1224 }
6b7c5b94
SP		 1225}
1226
5fb379ee 1227static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
6b7c5b94 1228{
6b7c5b94
SP		 1229 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
1230
1231 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
1232 return NULL;
1233
f3eb62d2 1234 rmb();
6b7c5b94
SP		 1235 be_dws_le_to_cpu(txcp, sizeof(*txcp));
1236
1237 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
1238
1239 queue_tail_inc(tx_cq);
1240 return txcp;
1241}
1242
1243static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
1244{
1245 struct be_queue_info *txq = &adapter->tx_obj.q;
a73b796e 1246 struct be_eth_wrb *wrb;
6b7c5b94
SP		 1247 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1248 struct sk_buff *sent_skb;
ec43b1a6
SP		 1249 u16 cur_index, num_wrbs = 1; /* account for hdr wrb */
1250 bool unmap_skb_hdr = true;
6b7c5b94 1251
ec43b1a6 1252 sent_skb = sent_skbs[txq->tail];
6b7c5b94 1253 BUG_ON(!sent_skb);
ec43b1a6
SP		 1254 sent_skbs[txq->tail] = NULL;
1255
1256 /* skip header wrb */
a73b796e 1257 queue_tail_inc(txq);
6b7c5b94 1258
ec43b1a6 1259 do {
6b7c5b94 1260 cur_index = txq->tail;
a73b796e 1261 wrb = queue_tail_node(txq);
ec43b1a6 1262 unmap_tx_frag(adapter->pdev, wrb, (unmap_skb_hdr &&
e743d313 1263 skb_headlen(sent_skb)));
ec43b1a6
SP		 1264 unmap_skb_hdr = false;
1265
6b7c5b94
SP		 1266 num_wrbs++;
1267 queue_tail_inc(txq);
ec43b1a6 1268 } while (cur_index != last_index);
6b7c5b94
SP		 1269
1270 atomic_sub(num_wrbs, &txq->used);
a73b796e 1271
6b7c5b94
SP		 1272 kfree_skb(sent_skb);
1273}
1274
859b1e4e
SP		 1275static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1276{
1277 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1278
1279 if (!eqe->evt)
1280 return NULL;
1281
f3eb62d2 1282 rmb();
859b1e4e
SP		 1283 eqe->evt = le32_to_cpu(eqe->evt);
1284 queue_tail_inc(&eq_obj->q);
1285 return eqe;
1286}
1287
1288static int event_handle(struct be_adapter *adapter,
1289 struct be_eq_obj *eq_obj)
1290{
1291 struct be_eq_entry *eqe;
1292 u16 num = 0;
1293
1294 while ((eqe = event_get(eq_obj)) != NULL) {
1295 eqe->evt = 0;
1296 num++;
1297 }
1298
1299 /* Deal with any spurious interrupts that come
1300 * without events
1301 */
1302 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1303 if (num)
1304 napi_schedule(&eq_obj->napi);
1305
1306 return num;
1307}
1308
1309/* Just read and notify events without processing them.
1310 * Used at the time of destroying event queues */
1311static void be_eq_clean(struct be_adapter *adapter,
1312 struct be_eq_obj *eq_obj)
1313{
1314 struct be_eq_entry *eqe;
1315 u16 num = 0;
1316
1317 while ((eqe = event_get(eq_obj)) != NULL) {
1318 eqe->evt = 0;
1319 num++;
1320 }
1321
1322 if (num)
1323 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1324}
1325
6b7c5b94
SP		 1326static void be_rx_q_clean(struct be_adapter *adapter)
1327{
1328 struct be_rx_page_info *page_info;
1329 struct be_queue_info *rxq = &adapter->rx_obj.q;
1330 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1331 struct be_eth_rx_compl *rxcp;
1332 u16 tail;
1333
1334 /* First cleanup pending rx completions */
1335 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
1336 be_rx_compl_discard(adapter, rxcp);
a7a0ef31 1337 be_rx_compl_reset(rxcp);
8788fdc2 1338 be_cq_notify(adapter, rx_cq->id, true, 1);
6b7c5b94
SP		 1339 }
1340
1341 /* Then free posted rx buffer that were not used */
1342 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
cdab23b7 1343 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
6b7c5b94
SP		 1344 page_info = get_rx_page_info(adapter, tail);
1345 put_page(page_info->page);
1346 memset(page_info, 0, sizeof(*page_info));
1347 }
1348 BUG_ON(atomic_read(&rxq->used));
1349}
1350
a8e9179a 1351static void be_tx_compl_clean(struct be_adapter *adapter)
6b7c5b94 1352{
a8e9179a 1353 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94 1354 struct be_queue_info *txq = &adapter->tx_obj.q;
a8e9179a
SP		 1355 struct be_eth_tx_compl *txcp;
1356 u16 end_idx, cmpl = 0, timeo = 0;
b03388d6
SP		 1357 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1358 struct sk_buff *sent_skb;
1359 bool dummy_wrb;
a8e9179a
SP		 1360
1361 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1362 do {
1363 while ((txcp = be_tx_compl_get(tx_cq))) {
1364 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1365 wrb_index, txcp);
1366 be_tx_compl_process(adapter, end_idx);
1367 cmpl++;
1368 }
1369 if (cmpl) {
1370 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1371 cmpl = 0;
1372 }
1373
1374 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1375 break;
1376
1377 mdelay(1);
1378 } while (true);
1379
1380 if (atomic_read(&txq->used))
1381 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1382 atomic_read(&txq->used));
b03388d6
SP		 1383
1384 /* free posted tx for which compls will never arrive */
1385 while (atomic_read(&txq->used)) {
1386 sent_skb = sent_skbs[txq->tail];
1387 end_idx = txq->tail;
1388 index_adv(&end_idx,
1389 wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
1390 be_tx_compl_process(adapter, end_idx);
1391 }
6b7c5b94
SP		 1392}
1393
5fb379ee
SP		 1394static void be_mcc_queues_destroy(struct be_adapter *adapter)
1395{
1396 struct be_queue_info *q;
5fb379ee 1397
8788fdc2 1398 q = &adapter->mcc_obj.q;
5fb379ee 1399 if (q->created)
8788fdc2 1400 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
5fb379ee
SP		 1401 be_queue_free(adapter, q);
1402
8788fdc2 1403 q = &adapter->mcc_obj.cq;
5fb379ee 1404 if (q->created)
8788fdc2 1405 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
5fb379ee
SP		 1406 be_queue_free(adapter, q);
1407}
1408
1409/* Must be called only after TX qs are created as MCC shares TX EQ */
1410static int be_mcc_queues_create(struct be_adapter *adapter)
1411{
1412 struct be_queue_info *q, *cq;
5fb379ee
SP		 1413
1414 /* Alloc MCC compl queue */
8788fdc2 1415 cq = &adapter->mcc_obj.cq;
5fb379ee 1416 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
efd2e40a 1417 sizeof(struct be_mcc_compl)))
5fb379ee
SP		 1418 goto err;
1419
1420 /* Ask BE to create MCC compl queue; share TX's eq */
8788fdc2 1421 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
5fb379ee
SP		 1422 goto mcc_cq_free;
1423
1424 /* Alloc MCC queue */
8788fdc2 1425 q = &adapter->mcc_obj.q;
5fb379ee
SP		 1426 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1427 goto mcc_cq_destroy;
1428
1429 /* Ask BE to create MCC queue */
8788fdc2 1430 if (be_cmd_mccq_create(adapter, q, cq))
5fb379ee
SP		 1431 goto mcc_q_free;
1432
1433 return 0;
1434
1435mcc_q_free:
1436 be_queue_free(adapter, q);
1437mcc_cq_destroy:
8788fdc2 1438 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
5fb379ee
SP		 1439mcc_cq_free:
1440 be_queue_free(adapter, cq);
1441err:
1442 return -1;
1443}
1444
6b7c5b94
SP		 1445static void be_tx_queues_destroy(struct be_adapter *adapter)
1446{
1447 struct be_queue_info *q;
1448
1449 q = &adapter->tx_obj.q;
a8e9179a 1450 if (q->created)
8788fdc2 1451 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
6b7c5b94
SP		 1452 be_queue_free(adapter, q);
1453
1454 q = &adapter->tx_obj.cq;
1455 if (q->created)
8788fdc2 1456 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1457 be_queue_free(adapter, q);
1458
859b1e4e
SP		 1459 /* Clear any residual events */
1460 be_eq_clean(adapter, &adapter->tx_eq);
1461
6b7c5b94
SP		 1462 q = &adapter->tx_eq.q;
1463 if (q->created)
8788fdc2 1464 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1465 be_queue_free(adapter, q);
1466}
1467
1468static int be_tx_queues_create(struct be_adapter *adapter)
1469{
1470 struct be_queue_info *eq, *q, *cq;
1471
1472 adapter->tx_eq.max_eqd = 0;
1473 adapter->tx_eq.min_eqd = 0;
1474 adapter->tx_eq.cur_eqd = 96;
1475 adapter->tx_eq.enable_aic = false;
1476 /* Alloc Tx Event queue */
1477 eq = &adapter->tx_eq.q;
1478 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1479 return -1;
1480
1481 /* Ask BE to create Tx Event queue */
8788fdc2 1482 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
6b7c5b94 1483 goto tx_eq_free;
ba343c77
SB		 1484 adapter->base_eq_id = adapter->tx_eq.q.id;
1485
6b7c5b94
SP		 1486 /* Alloc TX eth compl queue */
1487 cq = &adapter->tx_obj.cq;
1488 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1489 sizeof(struct be_eth_tx_compl)))
1490 goto tx_eq_destroy;
1491
1492 /* Ask BE to create Tx eth compl queue */
8788fdc2 1493 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
6b7c5b94
SP		 1494 goto tx_cq_free;
1495
1496 /* Alloc TX eth queue */
1497 q = &adapter->tx_obj.q;
1498 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1499 goto tx_cq_destroy;
1500
1501 /* Ask BE to create Tx eth queue */
8788fdc2 1502 if (be_cmd_txq_create(adapter, q, cq))
6b7c5b94
SP		 1503 goto tx_q_free;
1504 return 0;
1505
1506tx_q_free:
1507 be_queue_free(adapter, q);
1508tx_cq_destroy:
8788fdc2 1509 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1510tx_cq_free:
1511 be_queue_free(adapter, cq);
1512tx_eq_destroy:
8788fdc2 1513 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1514tx_eq_free:
1515 be_queue_free(adapter, eq);
1516 return -1;
1517}
1518
1519static void be_rx_queues_destroy(struct be_adapter *adapter)
1520{
1521 struct be_queue_info *q;
1522
1523 q = &adapter->rx_obj.q;
1524 if (q->created) {
8788fdc2 1525 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
89420424
SP		 1526
1527 /* After the rxq is invalidated, wait for a grace time
1528 * of 1ms for all dma to end and the flush compl to arrive
1529 */
1530 mdelay(1);
6b7c5b94
SP		 1531 be_rx_q_clean(adapter);
1532 }
1533 be_queue_free(adapter, q);
1534
1535 q = &adapter->rx_obj.cq;
1536 if (q->created)
8788fdc2 1537 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1538 be_queue_free(adapter, q);
1539
859b1e4e
SP		 1540 /* Clear any residual events */
1541 be_eq_clean(adapter, &adapter->rx_eq);
1542
6b7c5b94
SP		 1543 q = &adapter->rx_eq.q;
1544 if (q->created)
8788fdc2 1545 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1546 be_queue_free(adapter, q);
1547}
1548
1549static int be_rx_queues_create(struct be_adapter *adapter)
1550{
1551 struct be_queue_info *eq, *q, *cq;
1552 int rc;
1553
6b7c5b94
SP		 1554 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1555 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1556 adapter->rx_eq.min_eqd = 0;
1557 adapter->rx_eq.cur_eqd = 0;
1558 adapter->rx_eq.enable_aic = true;
1559
1560 /* Alloc Rx Event queue */
1561 eq = &adapter->rx_eq.q;
1562 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1563 sizeof(struct be_eq_entry));
1564 if (rc)
1565 return rc;
1566
1567 /* Ask BE to create Rx Event queue */
8788fdc2 1568 rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
6b7c5b94
SP		 1569 if (rc)
1570 goto rx_eq_free;
1571
1572 /* Alloc RX eth compl queue */
1573 cq = &adapter->rx_obj.cq;
1574 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1575 sizeof(struct be_eth_rx_compl));
1576 if (rc)
1577 goto rx_eq_destroy;
1578
1579 /* Ask BE to create Rx eth compl queue */
8788fdc2 1580 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
6b7c5b94
SP		 1581 if (rc)
1582 goto rx_cq_free;
1583
1584 /* Alloc RX eth queue */
1585 q = &adapter->rx_obj.q;
1586 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1587 if (rc)
1588 goto rx_cq_destroy;
1589
1590 /* Ask BE to create Rx eth queue */
8788fdc2 1591 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
6b7c5b94
SP		 1592 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1593 if (rc)
1594 goto rx_q_free;
1595
1596 return 0;
1597rx_q_free:
1598 be_queue_free(adapter, q);
1599rx_cq_destroy:
8788fdc2 1600 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1601rx_cq_free:
1602 be_queue_free(adapter, cq);
1603rx_eq_destroy:
8788fdc2 1604 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1605rx_eq_free:
1606 be_queue_free(adapter, eq);
1607 return rc;
1608}
6b7c5b94 1609
b628bde2
SP		 1610/* There are 8 evt ids per func. Retruns the evt id's bit number */
1611static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1612{
ba343c77 1613 return eq_id - adapter->base_eq_id;
b628bde2
SP		 1614}
1615
6b7c5b94
SP		 1616static irqreturn_t be_intx(int irq, void *dev)
1617{
1618 struct be_adapter *adapter = dev;
8788fdc2 1619 int isr;
6b7c5b94 1620
8788fdc2 1621 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
55bdeed9 1622 (adapter->tx_eq.q.id/ 8) * CEV_ISR_SIZE);
c001c213 1623 if (!isr)
8788fdc2 1624 return IRQ_NONE;
6b7c5b94 1625
8788fdc2
SP		 1626 event_handle(adapter, &adapter->tx_eq);
1627 event_handle(adapter, &adapter->rx_eq);
c001c213 1628
8788fdc2 1629 return IRQ_HANDLED;
6b7c5b94
SP		 1630}
1631
1632static irqreturn_t be_msix_rx(int irq, void *dev)
1633{
1634 struct be_adapter *adapter = dev;
1635
8788fdc2 1636 event_handle(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1637
1638 return IRQ_HANDLED;
1639}
1640
5fb379ee 1641static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
6b7c5b94
SP		 1642{
1643 struct be_adapter *adapter = dev;
1644
8788fdc2 1645 event_handle(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1646
1647 return IRQ_HANDLED;
1648}
1649
5be93b9a 1650static inline bool do_gro(struct be_adapter *adapter,
6b7c5b94
SP		 1651 struct be_eth_rx_compl *rxcp)
1652{
1653 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1654 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1655
1656 if (err)
1657 drvr_stats(adapter)->be_rxcp_err++;
1658
5be93b9a 1659 return (tcp_frame && !err) ? true : false;
6b7c5b94
SP		 1660}
1661
1662int be_poll_rx(struct napi_struct *napi, int budget)
1663{
1664 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1665 struct be_adapter *adapter =
1666 container_of(rx_eq, struct be_adapter, rx_eq);
1667 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1668 struct be_eth_rx_compl *rxcp;
1669 u32 work_done;
1670
b7b83ac3 1671 adapter->stats.drvr_stats.be_rx_polls++;
6b7c5b94
SP		 1672 for (work_done = 0; work_done < budget; work_done++) {
1673 rxcp = be_rx_compl_get(adapter);
1674 if (!rxcp)
1675 break;
1676
5be93b9a
AK		 1677 if (do_gro(adapter, rxcp))
1678 be_rx_compl_process_gro(adapter, rxcp);
6b7c5b94
SP		 1679 else
1680 be_rx_compl_process(adapter, rxcp);
a7a0ef31
SP		 1681
1682 be_rx_compl_reset(rxcp);
6b7c5b94
SP		 1683 }
1684
6b7c5b94
SP		 1685 /* Refill the queue */
1686 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1687 be_post_rx_frags(adapter);
1688
1689 /* All consumed */
1690 if (work_done < budget) {
1691 napi_complete(napi);
8788fdc2 1692 be_cq_notify(adapter, rx_cq->id, true, work_done);
6b7c5b94
SP		 1693 } else {
1694 /* More to be consumed; continue with interrupts disabled */
8788fdc2 1695 be_cq_notify(adapter, rx_cq->id, false, work_done);
6b7c5b94
SP		 1696 }
1697 return work_done;
1698}
1699
f31e50a8
SP		 1700/* As TX and MCC share the same EQ check for both TX and MCC completions.
1701 * For TX/MCC we don't honour budget; consume everything
1702 */
1703static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
6b7c5b94 1704{
f31e50a8
SP		 1705 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1706 struct be_adapter *adapter =
1707 container_of(tx_eq, struct be_adapter, tx_eq);
5fb379ee
SP		 1708 struct be_queue_info *txq = &adapter->tx_obj.q;
1709 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94 1710 struct be_eth_tx_compl *txcp;
f31e50a8 1711 int tx_compl = 0, mcc_compl, status = 0;
6b7c5b94
SP		 1712 u16 end_idx;
1713
5fb379ee 1714 while ((txcp = be_tx_compl_get(tx_cq))) {
6b7c5b94 1715 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
f31e50a8 1716 wrb_index, txcp);
6b7c5b94 1717 be_tx_compl_process(adapter, end_idx);
f31e50a8 1718 tx_compl++;
6b7c5b94
SP		 1719 }
1720
f31e50a8
SP		 1721 mcc_compl = be_process_mcc(adapter, &status);
1722
1723 napi_complete(napi);
1724
1725 if (mcc_compl) {
1726 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
1727 be_cq_notify(adapter, mcc_obj->cq.id, true, mcc_compl);
1728 }
1729
1730 if (tx_compl) {
1731 be_cq_notify(adapter, adapter->tx_obj.cq.id, true, tx_compl);
5fb379ee
SP		 1732
1733 /* As Tx wrbs have been freed up, wake up netdev queue if
1734 * it was stopped due to lack of tx wrbs.
1735 */
1736 if (netif_queue_stopped(adapter->netdev) &&
6b7c5b94 1737 atomic_read(&txq->used) < txq->len / 2) {
5fb379ee
SP		 1738 netif_wake_queue(adapter->netdev);
1739 }
1740
1741 drvr_stats(adapter)->be_tx_events++;
f31e50a8 1742 drvr_stats(adapter)->be_tx_compl += tx_compl;
6b7c5b94 1743 }
6b7c5b94
SP		 1744
1745 return 1;
1746}
1747
d053de91 1748void be_detect_dump_ue(struct be_adapter *adapter)
7c185276
AK		 1749{
1750 u32 ue_status_lo, ue_status_hi, ue_status_lo_mask, ue_status_hi_mask;
1751 u32 i;
1752
1753 pci_read_config_dword(adapter->pdev,
1754 PCICFG_UE_STATUS_LOW, &ue_status_lo);
1755 pci_read_config_dword(adapter->pdev,
1756 PCICFG_UE_STATUS_HIGH, &ue_status_hi);
1757 pci_read_config_dword(adapter->pdev,
1758 PCICFG_UE_STATUS_LOW_MASK, &ue_status_lo_mask);
1759 pci_read_config_dword(adapter->pdev,
1760 PCICFG_UE_STATUS_HI_MASK, &ue_status_hi_mask);
1761
1762 ue_status_lo = (ue_status_lo & (~ue_status_lo_mask));
1763 ue_status_hi = (ue_status_hi & (~ue_status_hi_mask));
1764
d053de91
AK		 1765 if (ue_status_lo || ue_status_hi) {
1766 adapter->ue_detected = true;
1767 dev_err(&adapter->pdev->dev, "UE Detected!!\n");
1768 }
1769
7c185276
AK		 1770 if (ue_status_lo) {
1771 for (i = 0; ue_status_lo; ue_status_lo >>= 1, i++) {
1772 if (ue_status_lo & 1)
1773 dev_err(&adapter->pdev->dev,
1774 "UE: %s bit set\n", ue_status_low_desc[i]);
1775 }
1776 }
1777 if (ue_status_hi) {
1778 for (i = 0; ue_status_hi; ue_status_hi >>= 1, i++) {
1779 if (ue_status_hi & 1)
1780 dev_err(&adapter->pdev->dev,
1781 "UE: %s bit set\n", ue_status_hi_desc[i]);
1782 }
1783 }
1784
1785}
1786
ea1dae11
SP		 1787static void be_worker(struct work_struct *work)
1788{
1789 struct be_adapter *adapter =
1790 container_of(work, struct be_adapter, work.work);
ea1dae11 1791
0fc48c37
AK		 1792 if (!adapter->stats_ioctl_sent)
1793 be_cmd_get_stats(adapter, &adapter->stats.cmd);
ea1dae11
SP		 1794
1795 /* Set EQ delay */
1796 be_rx_eqd_update(adapter);
1797
4097f663
SP		 1798 be_tx_rate_update(adapter);
1799 be_rx_rate_update(adapter);
1800
ea1dae11
SP		 1801 if (adapter->rx_post_starved) {
1802 adapter->rx_post_starved = false;
1803 be_post_rx_frags(adapter);
1804 }
d053de91
AK		 1805 if (!adapter->ue_detected)
1806 be_detect_dump_ue(adapter);
ea1dae11
SP		 1807
1808 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1809}
1810
8d56ff11
SP		 1811static void be_msix_disable(struct be_adapter *adapter)
1812{
1813 if (adapter->msix_enabled) {
1814 pci_disable_msix(adapter->pdev);
1815 adapter->msix_enabled = false;
1816 }
1817}
1818
6b7c5b94
SP		 1819static void be_msix_enable(struct be_adapter *adapter)
1820{
1821 int i, status;
1822
1823 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1824 adapter->msix_entries[i].entry = i;
1825
1826 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1827 BE_NUM_MSIX_VECTORS);
1828 if (status == 0)
1829 adapter->msix_enabled = true;
6b7c5b94
SP		 1830}
1831
ba343c77
SB		 1832static void be_sriov_enable(struct be_adapter *adapter)
1833{
344dbf10 1834 be_check_sriov_fn_type(adapter);
6dedec81 1835#ifdef CONFIG_PCI_IOV
ba343c77 1836 if (be_physfn(adapter) && num_vfs) {
6dedec81
AK		 1837 int status;
1838
ba343c77
SB		 1839 status = pci_enable_sriov(adapter->pdev, num_vfs);
1840 adapter->sriov_enabled = status ? false : true;
1841 }
1842#endif
ba343c77
SB		 1843}
1844
1845static void be_sriov_disable(struct be_adapter *adapter)
1846{
1847#ifdef CONFIG_PCI_IOV
1848 if (adapter->sriov_enabled) {
1849 pci_disable_sriov(adapter->pdev);
1850 adapter->sriov_enabled = false;
1851 }
1852#endif
1853}
1854
6b7c5b94
SP		 1855static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1856{
b628bde2
SP		 1857 return adapter->msix_entries[
1858 be_evt_bit_get(adapter, eq_id)].vector;
6b7c5b94
SP		 1859}
1860
b628bde2
SP		 1861static int be_request_irq(struct be_adapter *adapter,
1862 struct be_eq_obj *eq_obj,
1863 void *handler, char *desc)
6b7c5b94
SP		 1864{
1865 struct net_device *netdev = adapter->netdev;
b628bde2
SP		 1866 int vec;
1867
1868 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1869 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1870 return request_irq(vec, handler, 0, eq_obj->desc, adapter);
1871}
1872
1873static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
1874{
1875 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1876 free_irq(vec, adapter);
1877}
6b7c5b94 1878
b628bde2
SP		 1879static int be_msix_register(struct be_adapter *adapter)
1880{
1881 int status;
1882
1883 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
6b7c5b94
SP		 1884 if (status)
1885 goto err;
1886
b628bde2
SP		 1887 status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
1888 if (status)
1889 goto free_tx_irq;
1890
6b7c5b94 1891 return 0;
b628bde2
SP		 1892
1893free_tx_irq:
1894 be_free_irq(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1895err:
1896 dev_warn(&adapter->pdev->dev,
1897 "MSIX Request IRQ failed - err %d\n", status);
1898 pci_disable_msix(adapter->pdev);
1899 adapter->msix_enabled = false;
1900 return status;
1901}
1902
1903static int be_irq_register(struct be_adapter *adapter)
1904{
1905 struct net_device *netdev = adapter->netdev;
1906 int status;
1907
1908 if (adapter->msix_enabled) {
1909 status = be_msix_register(adapter);
1910 if (status == 0)
1911 goto done;
ba343c77
SB		 1912 /* INTx is not supported for VF */
1913 if (!be_physfn(adapter))
1914 return status;
6b7c5b94
SP		 1915 }
1916
1917 /* INTx */
1918 netdev->irq = adapter->pdev->irq;
1919 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1920 adapter);
1921 if (status) {
1922 dev_err(&adapter->pdev->dev,
1923 "INTx request IRQ failed - err %d\n", status);
1924 return status;
1925 }
1926done:
1927 adapter->isr_registered = true;
1928 return 0;
1929}
1930
1931static void be_irq_unregister(struct be_adapter *adapter)
1932{
1933 struct net_device *netdev = adapter->netdev;
6b7c5b94
SP		 1934
1935 if (!adapter->isr_registered)
1936 return;
1937
1938 /* INTx */
1939 if (!adapter->msix_enabled) {
1940 free_irq(netdev->irq, adapter);
1941 goto done;
1942 }
1943
1944 /* MSIx */
b628bde2
SP		 1945 be_free_irq(adapter, &adapter->tx_eq);
1946 be_free_irq(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1947done:
1948 adapter->isr_registered = false;
6b7c5b94
SP		 1949}
1950
889cd4b2
SP		 1951static int be_close(struct net_device *netdev)
1952{
1953 struct be_adapter *adapter = netdev_priv(netdev);
1954 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1955 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1956 int vec;
1957
1958 cancel_delayed_work_sync(&adapter->work);
1959
1960 be_async_mcc_disable(adapter);
1961
1962 netif_stop_queue(netdev);
1963 netif_carrier_off(netdev);
1964 adapter->link_up = false;
1965
1966 be_intr_set(adapter, false);
1967
1968 if (adapter->msix_enabled) {
1969 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1970 synchronize_irq(vec);
1971 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1972 synchronize_irq(vec);
1973 } else {
1974 synchronize_irq(netdev->irq);
1975 }
1976 be_irq_unregister(adapter);
1977
1978 napi_disable(&rx_eq->napi);
1979 napi_disable(&tx_eq->napi);
1980
1981 /* Wait for all pending tx completions to arrive so that
1982 * all tx skbs are freed.
1983 */
1984 be_tx_compl_clean(adapter);
1985
1986 return 0;
1987}
1988
6b7c5b94
SP		 1989static int be_open(struct net_device *netdev)
1990{
1991 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 1992 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1993 struct be_eq_obj *tx_eq = &adapter->tx_eq;
a8f447bd
SP		 1994 bool link_up;
1995 int status;
0388f251
SB		 1996 u8 mac_speed;
1997 u16 link_speed;
5fb379ee
SP		 1998
1999 /* First time posting */
2000 be_post_rx_frags(adapter);
2001
2002 napi_enable(&rx_eq->napi);
2003 napi_enable(&tx_eq->napi);
2004
2005 be_irq_register(adapter);
2006
8788fdc2 2007 be_intr_set(adapter, true);
5fb379ee
SP		 2008
2009 /* The evt queues are created in unarmed state; arm them */
8788fdc2
SP		 2010 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
2011 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
5fb379ee
SP		 2012
2013 /* Rx compl queue may be in unarmed state; rearm it */
8788fdc2 2014 be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
5fb379ee 2015
7a1e9b20
SP		 2016 /* Now that interrupts are on we can process async mcc */
2017 be_async_mcc_enable(adapter);
2018
889cd4b2
SP		 2019 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
2020
0388f251
SB		 2021 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
2022 &link_speed);
a8f447bd 2023 if (status)
889cd4b2 2024 goto err;
a8f447bd 2025 be_link_status_update(adapter, link_up);
5fb379ee 2026
889cd4b2 2027 if (be_physfn(adapter)) {
1da87b7f 2028 status = be_vid_config(adapter, false, 0);
889cd4b2
SP		 2029 if (status)
2030 goto err;
4f2aa89c 2031
ba343c77
SB		 2032 status = be_cmd_set_flow_control(adapter,
2033 adapter->tx_fc, adapter->rx_fc);
2034 if (status)
889cd4b2 2035 goto err;
ba343c77 2036 }
4f2aa89c 2037
889cd4b2
SP		 2038 return 0;
2039err:
2040 be_close(adapter->netdev);
2041 return -EIO;
5fb379ee
SP		 2042}
2043
71d8d1b5
AK		 2044static int be_setup_wol(struct be_adapter *adapter, bool enable)
2045{
2046 struct be_dma_mem cmd;
2047 int status = 0;
2048 u8 mac[ETH_ALEN];
2049
2050 memset(mac, 0, ETH_ALEN);
2051
2052 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
2053 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
2054 if (cmd.va == NULL)
2055 return -1;
2056 memset(cmd.va, 0, cmd.size);
2057
2058 if (enable) {
2059 status = pci_write_config_dword(adapter->pdev,
2060 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
2061 if (status) {
2062 dev_err(&adapter->pdev->dev,
2381a55c 2063 "Could not enable Wake-on-lan\n");
71d8d1b5
AK		 2064 pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
2065 cmd.dma);
2066 return status;
2067 }
2068 status = be_cmd_enable_magic_wol(adapter,
2069 adapter->netdev->dev_addr, &cmd);
2070 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
2071 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
2072 } else {
2073 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
2074 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
2075 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
2076 }
2077
2078 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
2079 return status;
2080}
2081
6d87f5c3
AK		 2082/*
2083 * Generate a seed MAC address from the PF MAC Address using jhash.
2084 * MAC Address for VFs are assigned incrementally starting from the seed.
2085 * These addresses are programmed in the ASIC by the PF and the VF driver
2086 * queries for the MAC address during its probe.
2087 */
2088static inline int be_vf_eth_addr_config(struct be_adapter *adapter)
2089{
2090 u32 vf = 0;
2091 int status;
2092 u8 mac[ETH_ALEN];
2093
2094 be_vf_eth_addr_generate(adapter, mac);
2095
2096 for (vf = 0; vf < num_vfs; vf++) {
2097 status = be_cmd_pmac_add(adapter, mac,
2098 adapter->vf_cfg[vf].vf_if_handle,
2099 &adapter->vf_cfg[vf].vf_pmac_id);
2100 if (status)
2101 dev_err(&adapter->pdev->dev,
2102 "Mac address add failed for VF %d\n", vf);
2103 else
2104 memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
2105
2106 mac[5] += 1;
2107 }
2108 return status;
2109}
2110
2111static inline void be_vf_eth_addr_rem(struct be_adapter *adapter)
2112{
2113 u32 vf;
2114
2115 for (vf = 0; vf < num_vfs; vf++) {
2116 if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
2117 be_cmd_pmac_del(adapter,
2118 adapter->vf_cfg[vf].vf_if_handle,
2119 adapter->vf_cfg[vf].vf_pmac_id);
2120 }
2121}
2122
5fb379ee
SP		 2123static int be_setup(struct be_adapter *adapter)
2124{
5fb379ee 2125 struct net_device *netdev = adapter->netdev;
ba343c77 2126 u32 cap_flags, en_flags, vf = 0;
6b7c5b94 2127 int status;
ba343c77
SB		 2128 u8 mac[ETH_ALEN];
2129
2130 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST;
6b7c5b94 2131
ba343c77
SB		 2132 if (be_physfn(adapter)) {
2133 cap_flags |= BE_IF_FLAGS_MCAST_PROMISCUOUS |
2134 BE_IF_FLAGS_PROMISCUOUS |
2135 BE_IF_FLAGS_PASS_L3L4_ERRORS;
2136 en_flags |= BE_IF_FLAGS_PASS_L3L4_ERRORS;
2137 }
73d540f2
SP		 2138
2139 status = be_cmd_if_create(adapter, cap_flags, en_flags,
2140 netdev->dev_addr, false/* pmac_invalid */,
ba343c77 2141 &adapter->if_handle, &adapter->pmac_id, 0);
6b7c5b94
SP		 2142 if (status != 0)
2143 goto do_none;
2144
ba343c77
SB		 2145 if (be_physfn(adapter)) {
2146 while (vf < num_vfs) {
2147 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED
2148 | BE_IF_FLAGS_BROADCAST;
2149 status = be_cmd_if_create(adapter, cap_flags, en_flags,
64600ea5
AK		 2150 mac, true,
2151 &adapter->vf_cfg[vf].vf_if_handle,
ba343c77
SB		 2152 NULL, vf+1);
2153 if (status) {
2154 dev_err(&adapter->pdev->dev,
2155 "Interface Create failed for VF %d\n", vf);
2156 goto if_destroy;
2157 }
64600ea5 2158 adapter->vf_cfg[vf].vf_pmac_id = BE_INVALID_PMAC_ID;
ba343c77 2159 vf++;
84e5b9f7 2160 }
ba343c77
SB		 2161 } else if (!be_physfn(adapter)) {
2162 status = be_cmd_mac_addr_query(adapter, mac,
2163 MAC_ADDRESS_TYPE_NETWORK, false, adapter->if_handle);
2164 if (!status) {
2165 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2166 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2167 }
2168 }
2169
6b7c5b94
SP		 2170 status = be_tx_queues_create(adapter);
2171 if (status != 0)
2172 goto if_destroy;
2173
2174 status = be_rx_queues_create(adapter);
2175 if (status != 0)
2176 goto tx_qs_destroy;
2177
5fb379ee
SP		 2178 status = be_mcc_queues_create(adapter);
2179 if (status != 0)
2180 goto rx_qs_destroy;
6b7c5b94 2181
6d87f5c3
AK		 2182 if (be_physfn(adapter)) {
2183 status = be_vf_eth_addr_config(adapter);
2184 if (status)
2185 goto mcc_q_destroy;
2186 }
2187
0dffc83e
AK		 2188 adapter->link_speed = -1;
2189
6b7c5b94
SP		 2190 return 0;
2191
6d87f5c3
AK		 2192mcc_q_destroy:
2193 if (be_physfn(adapter))
2194 be_vf_eth_addr_rem(adapter);
2195 be_mcc_queues_destroy(adapter);
5fb379ee
SP		 2196rx_qs_destroy:
2197 be_rx_queues_destroy(adapter);
6b7c5b94
SP		 2198tx_qs_destroy:
2199 be_tx_queues_destroy(adapter);
2200if_destroy:
ba343c77 2201 for (vf = 0; vf < num_vfs; vf++)
64600ea5
AK		 2202 if (adapter->vf_cfg[vf].vf_if_handle)
2203 be_cmd_if_destroy(adapter,
2204 adapter->vf_cfg[vf].vf_if_handle);
8788fdc2 2205 be_cmd_if_destroy(adapter, adapter->if_handle);
6b7c5b94
SP		 2206do_none:
2207 return status;
2208}
2209
5fb379ee
SP		 2210static int be_clear(struct be_adapter *adapter)
2211{
6d87f5c3
AK		 2212 if (be_physfn(adapter))
2213 be_vf_eth_addr_rem(adapter);
2214
1a8887d8 2215 be_mcc_queues_destroy(adapter);
5fb379ee
SP		 2216 be_rx_queues_destroy(adapter);
2217 be_tx_queues_destroy(adapter);
2218
8788fdc2 2219 be_cmd_if_destroy(adapter, adapter->if_handle);
5fb379ee 2220
2243e2e9
SP		 2221 /* tell fw we're done with firing cmds */
2222 be_cmd_fw_clean(adapter);
5fb379ee
SP		 2223 return 0;
2224}
2225
6b7c5b94 2226
84517482
AK		 2227#define FW_FILE_HDR_SIGN "ServerEngines Corp. "
2228char flash_cookie[2][16] = {"*** SE FLAS",
2229 "H DIRECTORY *** "};
fa9a6fed
SB		 2230
2231static bool be_flash_redboot(struct be_adapter *adapter,
3f0d4560
AK		 2232 const u8 *p, u32 img_start, int image_size,
2233 int hdr_size)
fa9a6fed
SB		 2234{
2235 u32 crc_offset;
2236 u8 flashed_crc[4];
2237 int status;
3f0d4560
AK		 2238
2239 crc_offset = hdr_size + img_start + image_size - 4;
2240
fa9a6fed 2241 p += crc_offset;
3f0d4560
AK		 2242
2243 status = be_cmd_get_flash_crc(adapter, flashed_crc,
f510fc64 2244 (image_size - 4));
fa9a6fed
SB		 2245 if (status) {
2246 dev_err(&adapter->pdev->dev,
2247 "could not get crc from flash, not flashing redboot\n");
2248 return false;
2249 }
2250
2251 /*update redboot only if crc does not match*/
2252 if (!memcmp(flashed_crc, p, 4))
2253 return false;
2254 else
2255 return true;
fa9a6fed
SB		 2256}
2257
3f0d4560 2258static int be_flash_data(struct be_adapter *adapter,
84517482 2259 const struct firmware *fw,
3f0d4560
AK		 2260 struct be_dma_mem *flash_cmd, int num_of_images)
2261
84517482 2262{
3f0d4560
AK		 2263 int status = 0, i, filehdr_size = 0;
2264 u32 total_bytes = 0, flash_op;
84517482
AK		 2265 int num_bytes;
2266 const u8 *p = fw->data;
2267 struct be_cmd_write_flashrom *req = flash_cmd->va;
3f0d4560 2268 struct flash_comp *pflashcomp;
9fe96934 2269 int num_comp;
3f0d4560 2270
9fe96934 2271 struct flash_comp gen3_flash_types[9] = {
3f0d4560
AK		 2272 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
2273 FLASH_IMAGE_MAX_SIZE_g3},
2274 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
2275 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},
2276 { FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,
2277 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2278 { FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,
2279 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2280 { FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,
2281 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2282 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,
2283 FLASH_IMAGE_MAX_SIZE_g3},
2284 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
2285 FLASH_IMAGE_MAX_SIZE_g3},
2286 { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
9fe96934
SB		 2287 FLASH_IMAGE_MAX_SIZE_g3},
2288 { FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW,
2289 FLASH_NCSI_IMAGE_MAX_SIZE_g3}
3f0d4560
AK		 2290 };
2291 struct flash_comp gen2_flash_types[8] = {
2292 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
2293 FLASH_IMAGE_MAX_SIZE_g2},
2294 { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
2295 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},
2296 { FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,
2297 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2298 { FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,
2299 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2300 { FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,
2301 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2302 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,
2303 FLASH_IMAGE_MAX_SIZE_g2},
2304 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,
2305 FLASH_IMAGE_MAX_SIZE_g2},
2306 { FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,
2307 FLASH_IMAGE_MAX_SIZE_g2}
2308 };
2309
2310 if (adapter->generation == BE_GEN3) {
2311 pflashcomp = gen3_flash_types;
2312 filehdr_size = sizeof(struct flash_file_hdr_g3);
9fe96934 2313 num_comp = 9;
3f0d4560
AK		 2314 } else {
2315 pflashcomp = gen2_flash_types;
2316 filehdr_size = sizeof(struct flash_file_hdr_g2);
9fe96934 2317 num_comp = 8;
84517482 2318 }
9fe96934
SB		 2319 for (i = 0; i < num_comp; i++) {
2320 if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &&
2321 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
2322 continue;
3f0d4560
AK		 2323 if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
2324 (!be_flash_redboot(adapter, fw->data,
2325 pflashcomp[i].offset, pflashcomp[i].size,
2326 filehdr_size)))
2327 continue;
2328 p = fw->data;
2329 p += filehdr_size + pflashcomp[i].offset
2330 + (num_of_images * sizeof(struct image_hdr));
2331 if (p + pflashcomp[i].size > fw->data + fw->size)
84517482 2332 return -1;
3f0d4560
AK		 2333 total_bytes = pflashcomp[i].size;
2334 while (total_bytes) {
2335 if (total_bytes > 32*1024)
2336 num_bytes = 32*1024;
2337 else
2338 num_bytes = total_bytes;
2339 total_bytes -= num_bytes;
2340
2341 if (!total_bytes)
2342 flash_op = FLASHROM_OPER_FLASH;
2343 else
2344 flash_op = FLASHROM_OPER_SAVE;
2345 memcpy(req->params.data_buf, p, num_bytes);
2346 p += num_bytes;
2347 status = be_cmd_write_flashrom(adapter, flash_cmd,
2348 pflashcomp[i].optype, flash_op, num_bytes);
2349 if (status) {
2350 dev_err(&adapter->pdev->dev,
2351 "cmd to write to flash rom failed.\n");
2352 return -1;
2353 }
2354 yield();
84517482 2355 }
84517482 2356 }
84517482
AK		 2357 return 0;
2358}
2359
3f0d4560
AK		 2360static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
2361{
2362 if (fhdr == NULL)
2363 return 0;
2364 if (fhdr->build[0] == '3')
2365 return BE_GEN3;
2366 else if (fhdr->build[0] == '2')
2367 return BE_GEN2;
2368 else
2369 return 0;
2370}
2371
84517482
AK		 2372int be_load_fw(struct be_adapter *adapter, u8 *func)
2373{
2374 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
2375 const struct firmware *fw;
3f0d4560
AK		 2376 struct flash_file_hdr_g2 *fhdr;
2377 struct flash_file_hdr_g3 *fhdr3;
2378 struct image_hdr *img_hdr_ptr = NULL;
84517482 2379 struct be_dma_mem flash_cmd;
8b93b710 2380 int status, i = 0, num_imgs = 0;
84517482 2381 const u8 *p;
84517482 2382
84517482
AK		 2383 strcpy(fw_file, func);
2384
2385 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
2386 if (status)
2387 goto fw_exit;
2388
2389 p = fw->data;
3f0d4560 2390 fhdr = (struct flash_file_hdr_g2 *) p;
84517482
AK		 2391 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
2392
84517482
AK		 2393 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
2394 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
2395 &flash_cmd.dma);
2396 if (!flash_cmd.va) {
2397 status = -ENOMEM;
2398 dev_err(&adapter->pdev->dev,
2399 "Memory allocation failure while flashing\n");
2400 goto fw_exit;
2401 }
2402
3f0d4560
AK		 2403 if ((adapter->generation == BE_GEN3) &&
2404 (get_ufigen_type(fhdr) == BE_GEN3)) {
2405 fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
8b93b710
AK		 2406 num_imgs = le32_to_cpu(fhdr3->num_imgs);
2407 for (i = 0; i < num_imgs; i++) {
3f0d4560
AK		 2408 img_hdr_ptr = (struct image_hdr *) (fw->data +
2409 (sizeof(struct flash_file_hdr_g3) +
8b93b710
AK		 2410 i * sizeof(struct image_hdr)));
2411 if (le32_to_cpu(img_hdr_ptr->imageid) == 1)
2412 status = be_flash_data(adapter, fw, &flash_cmd,
2413 num_imgs);
3f0d4560
AK		 2414 }
2415 } else if ((adapter->generation == BE_GEN2) &&
2416 (get_ufigen_type(fhdr) == BE_GEN2)) {
2417 status = be_flash_data(adapter, fw, &flash_cmd, 0);
2418 } else {
2419 dev_err(&adapter->pdev->dev,
2420 "UFI and Interface are not compatible for flashing\n");
2421 status = -1;
84517482
AK		 2422 }
2423
2424 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
2425 flash_cmd.dma);
2426 if (status) {
2427 dev_err(&adapter->pdev->dev, "Firmware load error\n");
2428 goto fw_exit;
2429 }
2430
af901ca1 2431 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
84517482
AK		 2432
2433fw_exit:
2434 release_firmware(fw);
2435 return status;
2436}
2437
6b7c5b94
SP		 2438static struct net_device_ops be_netdev_ops = {
2439 .ndo_open = be_open,
2440 .ndo_stop = be_close,
2441 .ndo_start_xmit = be_xmit,
6b7c5b94
SP		 2442 .ndo_set_rx_mode = be_set_multicast_list,
2443 .ndo_set_mac_address = be_mac_addr_set,
2444 .ndo_change_mtu = be_change_mtu,
2445 .ndo_validate_addr = eth_validate_addr,
2446 .ndo_vlan_rx_register = be_vlan_register,
2447 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2448 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
64600ea5 2449 .ndo_set_vf_mac = be_set_vf_mac,
1da87b7f 2450 .ndo_set_vf_vlan = be_set_vf_vlan,
e1d18735 2451 .ndo_set_vf_tx_rate = be_set_vf_tx_rate,
64600ea5 2452 .ndo_get_vf_config = be_get_vf_config
6b7c5b94
SP		 2453};
2454
2455static void be_netdev_init(struct net_device *netdev)
2456{
2457 struct be_adapter *adapter = netdev_priv(netdev);
2458
2459 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
583e3f34 2460 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
49e4b847 2461 NETIF_F_GRO | NETIF_F_TSO6;
6b7c5b94 2462
51c59870
AK		 2463 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
2464
6b7c5b94
SP		 2465 netdev->flags |= IFF_MULTICAST;
2466
728a9972
AK		 2467 adapter->rx_csum = true;
2468
9e90c961
AK		 2469 /* Default settings for Rx and Tx flow control */
2470 adapter->rx_fc = true;
2471 adapter->tx_fc = true;
2472
c190e3c8
AK		 2473 netif_set_gso_max_size(netdev, 65535);
2474
6b7c5b94
SP		 2475 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2476
2477 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2478
6b7c5b94
SP		 2479 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
2480 BE_NAPI_WEIGHT);
5fb379ee 2481 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
6b7c5b94
SP		 2482 BE_NAPI_WEIGHT);
2483
2484 netif_carrier_off(netdev);
2485 netif_stop_queue(netdev);
2486}
2487
2488static void be_unmap_pci_bars(struct be_adapter *adapter)
2489{
8788fdc2
SP		 2490 if (adapter->csr)
2491 iounmap(adapter->csr);
2492 if (adapter->db)
2493 iounmap(adapter->db);
ba343c77 2494 if (adapter->pcicfg && be_physfn(adapter))
8788fdc2 2495 iounmap(adapter->pcicfg);
6b7c5b94
SP		 2496}
2497
2498static int be_map_pci_bars(struct be_adapter *adapter)
2499{
2500 u8 __iomem *addr;
ba343c77 2501 int pcicfg_reg, db_reg;
6b7c5b94 2502
ba343c77
SB		 2503 if (be_physfn(adapter)) {
2504 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2505 pci_resource_len(adapter->pdev, 2));
2506 if (addr == NULL)
2507 return -ENOMEM;
2508 adapter->csr = addr;
2509 }
6b7c5b94 2510
ba343c77 2511 if (adapter->generation == BE_GEN2) {
7b139c83 2512 pcicfg_reg = 1;
ba343c77
SB		 2513 db_reg = 4;
2514 } else {
7b139c83 2515 pcicfg_reg = 0;
ba343c77
SB		 2516 if (be_physfn(adapter))
2517 db_reg = 4;
2518 else
2519 db_reg = 0;
2520 }
2521 addr = ioremap_nocache(pci_resource_start(adapter->pdev, db_reg),
2522 pci_resource_len(adapter->pdev, db_reg));
6b7c5b94
SP		 2523 if (addr == NULL)
2524 goto pci_map_err;
ba343c77
SB		 2525 adapter->db = addr;
2526
2527 if (be_physfn(adapter)) {
2528 addr = ioremap_nocache(
2529 pci_resource_start(adapter->pdev, pcicfg_reg),
2530 pci_resource_len(adapter->pdev, pcicfg_reg));
2531 if (addr == NULL)
2532 goto pci_map_err;
2533 adapter->pcicfg = addr;
2534 } else
2535 adapter->pcicfg = adapter->db + SRIOV_VF_PCICFG_OFFSET;
6b7c5b94
SP		 2536
2537 return 0;
2538pci_map_err:
2539 be_unmap_pci_bars(adapter);
2540 return -ENOMEM;
2541}
2542
2543
2544static void be_ctrl_cleanup(struct be_adapter *adapter)
2545{
8788fdc2 2546 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
6b7c5b94
SP		 2547
2548 be_unmap_pci_bars(adapter);
2549
2550 if (mem->va)
2551 pci_free_consistent(adapter->pdev, mem->size,
2552 mem->va, mem->dma);
e7b909a6
SP		 2553
2554 mem = &adapter->mc_cmd_mem;
2555 if (mem->va)
2556 pci_free_consistent(adapter->pdev, mem->size,
2557 mem->va, mem->dma);
6b7c5b94
SP		 2558}
2559
6b7c5b94
SP		 2560static int be_ctrl_init(struct be_adapter *adapter)
2561{
8788fdc2
SP		 2562 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
2563 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
e7b909a6 2564 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
6b7c5b94 2565 int status;
6b7c5b94
SP		 2566
2567 status = be_map_pci_bars(adapter);
2568 if (status)
e7b909a6 2569 goto done;
6b7c5b94
SP		 2570
2571 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2572 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
2573 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
2574 if (!mbox_mem_alloc->va) {
e7b909a6
SP		 2575 status = -ENOMEM;
2576 goto unmap_pci_bars;
6b7c5b94 2577 }
e7b909a6 2578
6b7c5b94
SP		 2579 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2580 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2581 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2582 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
e7b909a6
SP		 2583
2584 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
2585 mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
2586 &mc_cmd_mem->dma);
2587 if (mc_cmd_mem->va == NULL) {
2588 status = -ENOMEM;
2589 goto free_mbox;
2590 }
2591 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
2592
8788fdc2
SP		 2593 spin_lock_init(&adapter->mbox_lock);
2594 spin_lock_init(&adapter->mcc_lock);
2595 spin_lock_init(&adapter->mcc_cq_lock);
a8f447bd 2596
dd131e76 2597 init_completion(&adapter->flash_compl);
cf588477 2598 pci_save_state(adapter->pdev);
6b7c5b94 2599 return 0;
e7b909a6
SP		 2600
2601free_mbox:
2602 pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
2603 mbox_mem_alloc->va, mbox_mem_alloc->dma);
2604
2605unmap_pci_bars:
2606 be_unmap_pci_bars(adapter);
2607
2608done:
2609 return status;
6b7c5b94
SP		 2610}
2611
2612static void be_stats_cleanup(struct be_adapter *adapter)
2613{
2614 struct be_stats_obj *stats = &adapter->stats;
2615 struct be_dma_mem *cmd = &stats->cmd;
2616
2617 if (cmd->va)
2618 pci_free_consistent(adapter->pdev, cmd->size,
2619 cmd->va, cmd->dma);
2620}
2621
2622static int be_stats_init(struct be_adapter *adapter)
2623{
2624 struct be_stats_obj *stats = &adapter->stats;
2625 struct be_dma_mem *cmd = &stats->cmd;
2626
2627 cmd->size = sizeof(struct be_cmd_req_get_stats);
2628 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2629 if (cmd->va == NULL)
2630 return -1;
d291b9af 2631 memset(cmd->va, 0, cmd->size);
6b7c5b94
SP		 2632 return 0;
2633}
2634
2635static void __devexit be_remove(struct pci_dev *pdev)
2636{
2637 struct be_adapter *adapter = pci_get_drvdata(pdev);
8d56ff11 2638
6b7c5b94
SP		 2639 if (!adapter)
2640 return;
2641
2642 unregister_netdev(adapter->netdev);
2643
5fb379ee
SP		 2644 be_clear(adapter);
2645
6b7c5b94
SP		 2646 be_stats_cleanup(adapter);
2647
2648 be_ctrl_cleanup(adapter);
2649
ba343c77
SB		 2650 be_sriov_disable(adapter);
2651
8d56ff11 2652 be_msix_disable(adapter);
6b7c5b94
SP		 2653
2654 pci_set_drvdata(pdev, NULL);
2655 pci_release_regions(pdev);
2656 pci_disable_device(pdev);
2657
2658 free_netdev(adapter->netdev);
2659}
2660
2243e2e9 2661static int be_get_config(struct be_adapter *adapter)
6b7c5b94 2662{
6b7c5b94 2663 int status;
2243e2e9 2664 u8 mac[ETH_ALEN];
6b7c5b94 2665
2243e2e9 2666 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
6b7c5b94
SP		 2667 if (status)
2668 return status;
2669
2243e2e9 2670 status = be_cmd_query_fw_cfg(adapter,
3486be29 2671 &adapter->port_num, &adapter->function_mode);
43a04fdc
SP		 2672 if (status)
2673 return status;
2674
2243e2e9 2675 memset(mac, 0, ETH_ALEN);
ba343c77
SB		 2676
2677 if (be_physfn(adapter)) {
2678 status = be_cmd_mac_addr_query(adapter, mac,
2243e2e9 2679 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
ca9e4988 2680
ba343c77
SB		 2681 if (status)
2682 return status;
ca9e4988 2683
ba343c77
SB		 2684 if (!is_valid_ether_addr(mac))
2685 return -EADDRNOTAVAIL;
2686
2687 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2688 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2689 }
6b7c5b94 2690
3486be29 2691 if (adapter->function_mode & 0x400)
82903e4b
AK		 2692 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/4;
2693 else
2694 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
2695
2243e2e9 2696 return 0;
6b7c5b94
SP		 2697}
2698
2699static int __devinit be_probe(struct pci_dev *pdev,
2700 const struct pci_device_id *pdev_id)
2701{
2702 int status = 0;
2703 struct be_adapter *adapter;
2704 struct net_device *netdev;
6b7c5b94 2705
ba343c77 2706
6b7c5b94
SP		 2707 status = pci_enable_device(pdev);
2708 if (status)
2709 goto do_none;
2710
2711 status = pci_request_regions(pdev, DRV_NAME);
2712 if (status)
2713 goto disable_dev;
2714 pci_set_master(pdev);
2715
2716 netdev = alloc_etherdev(sizeof(struct be_adapter));
2717 if (netdev == NULL) {
2718 status = -ENOMEM;
2719 goto rel_reg;
2720 }
2721 adapter = netdev_priv(netdev);
7b139c83
AK		 2722
2723 switch (pdev->device) {
2724 case BE_DEVICE_ID1:
2725 case OC_DEVICE_ID1:
2726 adapter->generation = BE_GEN2;
2727 break;
2728 case BE_DEVICE_ID2:
2729 case OC_DEVICE_ID2:
2730 adapter->generation = BE_GEN3;
2731 break;
2732 default:
2733 adapter->generation = 0;
2734 }
2735
6b7c5b94
SP		 2736 adapter->pdev = pdev;
2737 pci_set_drvdata(pdev, adapter);
2738 adapter->netdev = netdev;
2243e2e9
SP		 2739 be_netdev_init(netdev);
2740 SET_NETDEV_DEV(netdev, &pdev->dev);
6b7c5b94
SP		 2741
2742 be_msix_enable(adapter);
2743
e930438c 2744 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
6b7c5b94
SP		 2745 if (!status) {
2746 netdev->features |= NETIF_F_HIGHDMA;
2747 } else {
e930438c 2748 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6b7c5b94
SP		 2749 if (status) {
2750 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2751 goto free_netdev;
2752 }
2753 }
2754
ba343c77
SB		 2755 be_sriov_enable(adapter);
2756
6b7c5b94
SP		 2757 status = be_ctrl_init(adapter);
2758 if (status)
2759 goto free_netdev;
2760
2243e2e9 2761 /* sync up with fw's ready state */
ba343c77
SB		 2762 if (be_physfn(adapter)) {
2763 status = be_cmd_POST(adapter);
2764 if (status)
2765 goto ctrl_clean;
ba343c77 2766 }
6b7c5b94 2767
2243e2e9
SP		 2768 /* tell fw we're ready to fire cmds */
2769 status = be_cmd_fw_init(adapter);
6b7c5b94 2770 if (status)
2243e2e9
SP		 2771 goto ctrl_clean;
2772
556ae191
SB		 2773 if (be_physfn(adapter)) {
2774 status = be_cmd_reset_function(adapter);
2775 if (status)
2776 goto ctrl_clean;
2777 }
2778
2243e2e9
SP		 2779 status = be_stats_init(adapter);
2780 if (status)
2781 goto ctrl_clean;
2782
2783 status = be_get_config(adapter);
6b7c5b94
SP		 2784 if (status)
2785 goto stats_clean;
6b7c5b94
SP		 2786
2787 INIT_DELAYED_WORK(&adapter->work, be_worker);
6b7c5b94 2788
5fb379ee
SP		 2789 status = be_setup(adapter);
2790 if (status)
2791 goto stats_clean;
2243e2e9 2792
6b7c5b94
SP		 2793 status = register_netdev(netdev);
2794 if (status != 0)
5fb379ee 2795 goto unsetup;
6b7c5b94 2796
c4ca2374 2797 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
6b7c5b94
SP		 2798 return 0;
2799
5fb379ee
SP		 2800unsetup:
2801 be_clear(adapter);
6b7c5b94
SP		 2802stats_clean:
2803 be_stats_cleanup(adapter);
2804ctrl_clean:
2805 be_ctrl_cleanup(adapter);
2806free_netdev:
8d56ff11 2807 be_msix_disable(adapter);
ba343c77 2808 be_sriov_disable(adapter);
6b7c5b94 2809 free_netdev(adapter->netdev);
8d56ff11 2810 pci_set_drvdata(pdev, NULL);
6b7c5b94
SP		 2811rel_reg:
2812 pci_release_regions(pdev);
2813disable_dev:
2814 pci_disable_device(pdev);
2815do_none:
c4ca2374 2816 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
6b7c5b94
SP		 2817 return status;
2818}
2819
2820static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2821{
2822 struct be_adapter *adapter = pci_get_drvdata(pdev);
2823 struct net_device *netdev = adapter->netdev;
2824
71d8d1b5
AK		 2825 if (adapter->wol)
2826 be_setup_wol(adapter, true);
2827
6b7c5b94
SP		 2828 netif_device_detach(netdev);
2829 if (netif_running(netdev)) {
2830 rtnl_lock();
2831 be_close(netdev);
2832 rtnl_unlock();
2833 }
9e90c961 2834 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
9b0365f1 2835 be_clear(adapter);
6b7c5b94
SP		 2836
2837 pci_save_state(pdev);
2838 pci_disable_device(pdev);
2839 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2840 return 0;
2841}
2842
2843static int be_resume(struct pci_dev *pdev)
2844{
2845 int status = 0;
2846 struct be_adapter *adapter = pci_get_drvdata(pdev);
2847 struct net_device *netdev = adapter->netdev;
2848
2849 netif_device_detach(netdev);
2850
2851 status = pci_enable_device(pdev);
2852 if (status)
2853 return status;
2854
2855 pci_set_power_state(pdev, 0);
2856 pci_restore_state(pdev);
2857
2243e2e9
SP		 2858 /* tell fw we're ready to fire cmds */
2859 status = be_cmd_fw_init(adapter);
2860 if (status)
2861 return status;
2862
9b0365f1 2863 be_setup(adapter);
6b7c5b94
SP		 2864 if (netif_running(netdev)) {
2865 rtnl_lock();
2866 be_open(netdev);
2867 rtnl_unlock();
2868 }
2869 netif_device_attach(netdev);
71d8d1b5
AK		 2870
2871 if (adapter->wol)
2872 be_setup_wol(adapter, false);
6b7c5b94
SP		 2873 return 0;
2874}
2875
82456b03
SP		 2876/*
2877 * An FLR will stop BE from DMAing any data.
2878 */
2879static void be_shutdown(struct pci_dev *pdev)
2880{
2881 struct be_adapter *adapter = pci_get_drvdata(pdev);
2882 struct net_device *netdev = adapter->netdev;
2883
2884 netif_device_detach(netdev);
2885
2886 be_cmd_reset_function(adapter);
2887
2888 if (adapter->wol)
2889 be_setup_wol(adapter, true);
2890
2891 pci_disable_device(pdev);
82456b03
SP		 2892}
2893
cf588477
SP		 2894static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
2895 pci_channel_state_t state)
2896{
2897 struct be_adapter *adapter = pci_get_drvdata(pdev);
2898 struct net_device *netdev = adapter->netdev;
2899
2900 dev_err(&adapter->pdev->dev, "EEH error detected\n");
2901
2902 adapter->eeh_err = true;
2903
2904 netif_device_detach(netdev);
2905
2906 if (netif_running(netdev)) {
2907 rtnl_lock();
2908 be_close(netdev);
2909 rtnl_unlock();
2910 }
2911 be_clear(adapter);
2912
2913 if (state == pci_channel_io_perm_failure)
2914 return PCI_ERS_RESULT_DISCONNECT;
2915
2916 pci_disable_device(pdev);
2917
2918 return PCI_ERS_RESULT_NEED_RESET;
2919}
2920
2921static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
2922{
2923 struct be_adapter *adapter = pci_get_drvdata(pdev);
2924 int status;
2925
2926 dev_info(&adapter->pdev->dev, "EEH reset\n");
2927 adapter->eeh_err = false;
2928
2929 status = pci_enable_device(pdev);
2930 if (status)
2931 return PCI_ERS_RESULT_DISCONNECT;
2932
2933 pci_set_master(pdev);
2934 pci_set_power_state(pdev, 0);
2935 pci_restore_state(pdev);
2936
2937 /* Check if card is ok and fw is ready */
2938 status = be_cmd_POST(adapter);
2939 if (status)
2940 return PCI_ERS_RESULT_DISCONNECT;
2941
2942 return PCI_ERS_RESULT_RECOVERED;
2943}
2944
2945static void be_eeh_resume(struct pci_dev *pdev)
2946{
2947 int status = 0;
2948 struct be_adapter *adapter = pci_get_drvdata(pdev);
2949 struct net_device *netdev = adapter->netdev;
2950
2951 dev_info(&adapter->pdev->dev, "EEH resume\n");
2952
2953 pci_save_state(pdev);
2954
2955 /* tell fw we're ready to fire cmds */
2956 status = be_cmd_fw_init(adapter);
2957 if (status)
2958 goto err;
2959
2960 status = be_setup(adapter);
2961 if (status)
2962 goto err;
2963
2964 if (netif_running(netdev)) {
2965 status = be_open(netdev);
2966 if (status)
2967 goto err;
2968 }
2969 netif_device_attach(netdev);
2970 return;
2971err:
2972 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
cf588477
SP		 2973}
2974
2975static struct pci_error_handlers be_eeh_handlers = {
2976 .error_detected = be_eeh_err_detected,
2977 .slot_reset = be_eeh_reset,
2978 .resume = be_eeh_resume,
2979};
2980
6b7c5b94
SP		 2981static struct pci_driver be_driver = {
2982 .name = DRV_NAME,
2983 .id_table = be_dev_ids,
2984 .probe = be_probe,
2985 .remove = be_remove,
2986 .suspend = be_suspend,
cf588477 2987 .resume = be_resume,
82456b03 2988 .shutdown = be_shutdown,
cf588477 2989 .err_handler = &be_eeh_handlers
6b7c5b94
SP		 2990};
2991
2992static int __init be_init_module(void)
2993{
8e95a202
JP		 2994 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
2995 rx_frag_size != 2048) {
6b7c5b94
SP		 2996 printk(KERN_WARNING DRV_NAME
2997 " : Module param rx_frag_size must be 2048/4096/8192."
2998 " Using 2048\n");
2999 rx_frag_size = 2048;
3000 }
6b7c5b94 3001
ba343c77
SB		 3002 if (num_vfs > 32) {
3003 printk(KERN_WARNING DRV_NAME
3004 " : Module param num_vfs must not be greater than 32."
3005 "Using 32\n");
3006 num_vfs = 32;
3007 }
3008
6b7c5b94
SP		 3009 return pci_register_driver(&be_driver);
3010}
3011module_init(be_init_module);
3012
3013static void __exit be_exit_module(void)
3014{
3015 pci_unregister_driver(&be_driver);
3016}
3017module_exit(be_exit_module);
Linux kernel - Deliverables
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