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EMAC driver: add power down mode
[deliverable/linux.git] / drivers / net / bfin_mac.c
CommitLineData
e190d6b1 1/*
2fb9d6f5 2 * Blackfin On-Chip MAC Driver
e190d6b1 3 *
2fb9d6f5 4 * Copyright 2004-2007 Analog Devices Inc.
e190d6b1 5 *
2fb9d6f5 6 * Enter bugs at http://blackfin.uclinux.org/
e190d6b1 7 *
2fb9d6f5 8 * Licensed under the GPL-2 or later.
e190d6b1
BW		 9 */
10
11#include <linux/init.h>
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/sched.h>
15#include <linux/slab.h>
16#include <linux/delay.h>
17#include <linux/timer.h>
18#include <linux/errno.h>
19#include <linux/irq.h>
20#include <linux/io.h>
21#include <linux/ioport.h>
22#include <linux/crc32.h>
23#include <linux/device.h>
24#include <linux/spinlock.h>
25#include <linux/ethtool.h>
26#include <linux/mii.h>
4ae5a3ad 27#include <linux/phy.h>
e190d6b1
BW		 28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/skbuff.h>
e190d6b1 31#include <linux/platform_device.h>
e190d6b1
BW		 32
33#include <asm/dma.h>
34#include <linux/dma-mapping.h>
35
36#include <asm/blackfin.h>
37#include <asm/cacheflush.h>
38#include <asm/portmux.h>
39
40#include "bfin_mac.h"
41
42#define DRV_NAME "bfin_mac"
43#define DRV_VERSION "1.1"
44#define DRV_AUTHOR "Bryan Wu, Luke Yang"
6893ff1c 45#define DRV_DESC "Blackfin BF53[67] BF527 on-chip Ethernet MAC driver"
e190d6b1
BW		 46
47MODULE_AUTHOR(DRV_AUTHOR);
48MODULE_LICENSE("GPL");
49MODULE_DESCRIPTION(DRV_DESC);
50
51#if defined(CONFIG_BFIN_MAC_USE_L1)
52# define bfin_mac_alloc(dma_handle, size) l1_data_sram_zalloc(size)
53# define bfin_mac_free(dma_handle, ptr) l1_data_sram_free(ptr)
54#else
55# define bfin_mac_alloc(dma_handle, size) \
56 dma_alloc_coherent(NULL, size, dma_handle, GFP_KERNEL)
57# define bfin_mac_free(dma_handle, ptr) \
58 dma_free_coherent(NULL, sizeof(*ptr), ptr, dma_handle)
59#endif
60
61#define PKT_BUF_SZ 1580
62
63#define MAX_TIMEOUT_CNT 500
64
65/* pointers to maintain transmit list */
66static struct net_dma_desc_tx *tx_list_head;
67static struct net_dma_desc_tx *tx_list_tail;
68static struct net_dma_desc_rx *rx_list_head;
69static struct net_dma_desc_rx *rx_list_tail;
70static struct net_dma_desc_rx *current_rx_ptr;
71static struct net_dma_desc_tx *current_tx_ptr;
72static struct net_dma_desc_tx *tx_desc;
73static struct net_dma_desc_rx *rx_desc;
74
4ae5a3ad
BW		 75static void bf537mac_disable(void);
76static void bf537mac_enable(void);
77
e190d6b1
BW		 78static void desc_list_free(void)
79{
80 struct net_dma_desc_rx *r;
81 struct net_dma_desc_tx *t;
82 int i;
83#if !defined(CONFIG_BFIN_MAC_USE_L1)
84 dma_addr_t dma_handle = 0;
85#endif
86
87 if (tx_desc) {
88 t = tx_list_head;
89 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
90 if (t) {
91 if (t->skb) {
92 dev_kfree_skb(t->skb);
93 t->skb = NULL;
94 }
95 t = t->next;
96 }
97 }
98 bfin_mac_free(dma_handle, tx_desc);
99 }
100
101 if (rx_desc) {
102 r = rx_list_head;
103 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
104 if (r) {
105 if (r->skb) {
106 dev_kfree_skb(r->skb);
107 r->skb = NULL;
108 }
109 r = r->next;
110 }
111 }
112 bfin_mac_free(dma_handle, rx_desc);
113 }
114}
115
116static int desc_list_init(void)
117{
118 int i;
119 struct sk_buff *new_skb;
120#if !defined(CONFIG_BFIN_MAC_USE_L1)
121 /*
122 * This dma_handle is useless in Blackfin dma_alloc_coherent().
123 * The real dma handler is the return value of dma_alloc_coherent().
124 */
125 dma_addr_t dma_handle;
126#endif
127
128 tx_desc = bfin_mac_alloc(&dma_handle,
129 sizeof(struct net_dma_desc_tx) *
130 CONFIG_BFIN_TX_DESC_NUM);
131 if (tx_desc == NULL)
132 goto init_error;
133
134 rx_desc = bfin_mac_alloc(&dma_handle,
135 sizeof(struct net_dma_desc_rx) *
136 CONFIG_BFIN_RX_DESC_NUM);
137 if (rx_desc == NULL)
138 goto init_error;
139
140 /* init tx_list */
141 tx_list_head = tx_list_tail = tx_desc;
142
143 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
144 struct net_dma_desc_tx *t = tx_desc + i;
145 struct dma_descriptor *a = &(t->desc_a);
146 struct dma_descriptor *b = &(t->desc_b);
147
148 /*
149 * disable DMA
150 * read from memory WNR = 0
151 * wordsize is 32 bits
152 * 6 half words is desc size
153 * large desc flow
154 */
155 a->config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
156 a->start_addr = (unsigned long)t->packet;
157 a->x_count = 0;
158 a->next_dma_desc = b;
159
160 /*
161 * enabled DMA
162 * write to memory WNR = 1
163 * wordsize is 32 bits
164 * disable interrupt
165 * 6 half words is desc size
166 * large desc flow
167 */
168 b->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
169 b->start_addr = (unsigned long)(&(t->status));
170 b->x_count = 0;
171
172 t->skb = NULL;
173 tx_list_tail->desc_b.next_dma_desc = a;
174 tx_list_tail->next = t;
175 tx_list_tail = t;
176 }
177 tx_list_tail->next = tx_list_head; /* tx_list is a circle */
178 tx_list_tail->desc_b.next_dma_desc = &(tx_list_head->desc_a);
179 current_tx_ptr = tx_list_head;
180
181 /* init rx_list */
182 rx_list_head = rx_list_tail = rx_desc;
183
184 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
185 struct net_dma_desc_rx *r = rx_desc + i;
186 struct dma_descriptor *a = &(r->desc_a);
187 struct dma_descriptor *b = &(r->desc_b);
188
189 /* allocate a new skb for next time receive */
190 new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
191 if (!new_skb) {
192 printk(KERN_NOTICE DRV_NAME
193 ": init: low on mem - packet dropped\n");
194 goto init_error;
195 }
196 skb_reserve(new_skb, 2);
197 r->skb = new_skb;
198
199 /*
200 * enabled DMA
201 * write to memory WNR = 1
202 * wordsize is 32 bits
203 * disable interrupt
204 * 6 half words is desc size
205 * large desc flow
206 */
207 a->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
208 /* since RXDWA is enabled */
209 a->start_addr = (unsigned long)new_skb->data - 2;
210 a->x_count = 0;
211 a->next_dma_desc = b;
212
213 /*
214 * enabled DMA
215 * write to memory WNR = 1
216 * wordsize is 32 bits
217 * enable interrupt
218 * 6 half words is desc size
219 * large desc flow
220 */
221 b->config = DMAEN | WNR | WDSIZE_32 | DI_EN |
222 NDSIZE_6 | DMAFLOW_LARGE;
223 b->start_addr = (unsigned long)(&(r->status));
224 b->x_count = 0;
225
226 rx_list_tail->desc_b.next_dma_desc = a;
227 rx_list_tail->next = r;
228 rx_list_tail = r;
229 }
230 rx_list_tail->next = rx_list_head; /* rx_list is a circle */
231 rx_list_tail->desc_b.next_dma_desc = &(rx_list_head->desc_a);
232 current_rx_ptr = rx_list_head;
233
234 return 0;
235
236init_error:
237 desc_list_free();
238 printk(KERN_ERR DRV_NAME ": kmalloc failed\n");
239 return -ENOMEM;
240}
241
242
243/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
244
245/* Set FER regs to MUX in Ethernet pins */
246static int setup_pin_mux(int action)
247{
248#if defined(CONFIG_BFIN_MAC_RMII)
249 u16 pin_req[] = P_RMII0;
250#else
251 u16 pin_req[] = P_MII0;
252#endif
253
254 if (action) {
255 if (peripheral_request_list(pin_req, DRV_NAME)) {
256 printk(KERN_ERR DRV_NAME
257 ": Requesting Peripherals failed\n");
258 return -EFAULT;
259 }
260 } else
261 peripheral_free_list(pin_req);
262
263 return 0;
264}
265
4ae5a3ad
BW		 266/*
267 * MII operations
268 */
e190d6b1 269/* Wait until the previous MDC/MDIO transaction has completed */
4ae5a3ad 270static void mdio_poll(void)
e190d6b1
BW		 271{
272 int timeout_cnt = MAX_TIMEOUT_CNT;
273
274 /* poll the STABUSY bit */
275 while ((bfin_read_EMAC_STAADD()) & STABUSY) {
6db9e461 276 udelay(1);
e190d6b1
BW		 277 if (timeout_cnt-- < 0) {
278 printk(KERN_ERR DRV_NAME
279 ": wait MDC/MDIO transaction to complete timeout\n");
280 break;
281 }
282 }
283}
284
285/* Read an off-chip register in a PHY through the MDC/MDIO port */
4ae5a3ad 286static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
e190d6b1 287{
4ae5a3ad
BW		 288 mdio_poll();
289
e190d6b1 290 /* read mode */
4ae5a3ad
BW		 291 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
292 SET_REGAD((u16) regnum) |
e190d6b1 293 STABUSY);
e190d6b1 294
4ae5a3ad
BW		 295 mdio_poll();
296
297 return (int) bfin_read_EMAC_STADAT();
e190d6b1
BW		 298}
299
300/* Write an off-chip register in a PHY through the MDC/MDIO port */
4ae5a3ad
BW		 301static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
302 u16 value)
e190d6b1 303{
4ae5a3ad
BW		 304 mdio_poll();
305
306 bfin_write_EMAC_STADAT((u32) value);
e190d6b1
BW		 307
308 /* write mode */
4ae5a3ad
BW		 309 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
310 SET_REGAD((u16) regnum) |
e190d6b1
BW		 311 STAOP |
312 STABUSY);
313
4ae5a3ad
BW		 314 mdio_poll();
315
316 return 0;
e190d6b1
BW		 317}
318
4ae5a3ad 319static int mdiobus_reset(struct mii_bus *bus)
e190d6b1 320{
4ae5a3ad 321 return 0;
e190d6b1
BW		 322}
323
4ae5a3ad 324static void bf537_adjust_link(struct net_device *dev)
e190d6b1 325{
e190d6b1 326 struct bf537mac_local *lp = netdev_priv(dev);
4ae5a3ad
BW		 327 struct phy_device *phydev = lp->phydev;
328 unsigned long flags;
329 int new_state = 0;
330
331 spin_lock_irqsave(&lp->lock, flags);
332 if (phydev->link) {
333 /* Now we make sure that we can be in full duplex mode.
334 * If not, we operate in half-duplex mode. */
335 if (phydev->duplex != lp->old_duplex) {
336 u32 opmode = bfin_read_EMAC_OPMODE();
337 new_state = 1;
338
339 if (phydev->duplex)
340 opmode |= FDMODE;
341 else
342 opmode &= ~(FDMODE);
343
344 bfin_write_EMAC_OPMODE(opmode);
345 lp->old_duplex = phydev->duplex;
346 }
e190d6b1 347
4ae5a3ad
BW		 348 if (phydev->speed != lp->old_speed) {
349#if defined(CONFIG_BFIN_MAC_RMII)
350 u32 opmode = bfin_read_EMAC_OPMODE();
4ae5a3ad
BW		 351 switch (phydev->speed) {
352 case 10:
353 opmode |= RMII_10;
354 break;
355 case 100:
356 opmode &= ~(RMII_10);
357 break;
358 default:
359 printk(KERN_WARNING
360 "%s: Ack! Speed (%d) is not 10/100!\n",
361 DRV_NAME, phydev->speed);
362 break;
363 }
364 bfin_write_EMAC_OPMODE(opmode);
4ae5a3ad 365#endif
e190d6b1 366
4ae5a3ad
BW		 367 new_state = 1;
368 lp->old_speed = phydev->speed;
369 }
e190d6b1 370
4ae5a3ad
BW		 371 if (!lp->old_link) {
372 new_state = 1;
373 lp->old_link = 1;
374 netif_schedule(dev);
375 }
376 } else if (lp->old_link) {
377 new_state = 1;
378 lp->old_link = 0;
379 lp->old_speed = 0;
380 lp->old_duplex = -1;
e190d6b1
BW		 381 }
382
4ae5a3ad
BW		 383 if (new_state) {
384 u32 opmode = bfin_read_EMAC_OPMODE();
385 phy_print_status(phydev);
386 pr_debug("EMAC_OPMODE = 0x%08x\n", opmode);
e190d6b1 387 }
4ae5a3ad
BW		 388
389 spin_unlock_irqrestore(&lp->lock, flags);
e190d6b1
BW		 390}
391
7cc8f381
BW		 392/* MDC = 2.5 MHz */
393#define MDC_CLK 2500000
394
4ae5a3ad 395static int mii_probe(struct net_device *dev)
e190d6b1 396{
e190d6b1 397 struct bf537mac_local *lp = netdev_priv(dev);
4ae5a3ad
BW		 398 struct phy_device *phydev = NULL;
399 unsigned short sysctl;
400 int i;
7cc8f381 401 u32 sclk, mdc_div;
e190d6b1 402
4ae5a3ad 403 /* Enable PHY output early */
e190d6b1
BW		 404 if (!(bfin_read_VR_CTL() & PHYCLKOE))
405 bfin_write_VR_CTL(bfin_read_VR_CTL() | PHYCLKOE);
406
7cc8f381
BW		 407 sclk = get_sclk();
408 mdc_div = ((sclk / MDC_CLK) / 2) - 1;
409
4ae5a3ad 410 sysctl = bfin_read_EMAC_SYSCTL();
7cc8f381 411 sysctl |= SET_MDCDIV(mdc_div);
e190d6b1 412 bfin_write_EMAC_SYSCTL(sysctl);
e190d6b1 413
4ae5a3ad
BW		 414 /* search for connect PHY device */
415 for (i = 0; i < PHY_MAX_ADDR; i++) {
416 struct phy_device *const tmp_phydev = lp->mii_bus.phy_map[i];
e190d6b1 417
4ae5a3ad
BW		 418 if (!tmp_phydev)
419 continue; /* no PHY here... */
e190d6b1 420
4ae5a3ad
BW		 421 phydev = tmp_phydev;
422 break; /* found it */
423 }
424
425 /* now we are supposed to have a proper phydev, to attach to... */
426 if (!phydev) {
427 printk(KERN_INFO "%s: Don't found any phy device at all\n",
428 dev->name);
429 return -ENODEV;
e190d6b1
BW		 430 }
431
432#if defined(CONFIG_BFIN_MAC_RMII)
4ae5a3ad
BW		 433 phydev = phy_connect(dev, phydev->dev.bus_id, &bf537_adjust_link, 0,
434 PHY_INTERFACE_MODE_RMII);
435#else
436 phydev = phy_connect(dev, phydev->dev.bus_id, &bf537_adjust_link, 0,
437 PHY_INTERFACE_MODE_MII);
e190d6b1
BW		 438#endif
439
4ae5a3ad
BW		 440 if (IS_ERR(phydev)) {
441 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
442 return PTR_ERR(phydev);
443 }
444
445 /* mask with MAC supported features */
446 phydev->supported &= (SUPPORTED_10baseT_Half
447 | SUPPORTED_10baseT_Full
448 | SUPPORTED_100baseT_Half
449 | SUPPORTED_100baseT_Full
450 | SUPPORTED_Autoneg
451 | SUPPORTED_Pause | SUPPORTED_Asym_Pause
452 | SUPPORTED_MII
453 | SUPPORTED_TP);
454
455 phydev->advertising = phydev->supported;
456
457 lp->old_link = 0;
458 lp->old_speed = 0;
459 lp->old_duplex = -1;
460 lp->phydev = phydev;
461
462 printk(KERN_INFO "%s: attached PHY driver [%s] "
7cc8f381
BW		 463 "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)"
464 "@sclk=%dMHz)\n",
465 DRV_NAME, phydev->drv->name, phydev->dev.bus_id, phydev->irq,
466 MDC_CLK, mdc_div, sclk/1000000);
4ae5a3ad
BW		 467
468 return 0;
469}
470
471/**************************************************************************/
472void setup_system_regs(struct net_device *dev)
473{
474 unsigned short sysctl;
475
476 /*
477 * Odd word alignment for Receive Frame DMA word
478 * Configure checksum support and rcve frame word alignment
479 */
480 sysctl = bfin_read_EMAC_SYSCTL();
481#if defined(BFIN_MAC_CSUM_OFFLOAD)
482 sysctl |= RXDWA | RXCKS;
483#else
484 sysctl |= RXDWA;
485#endif
486 bfin_write_EMAC_SYSCTL(sysctl);
e190d6b1
BW		 487
488 bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
489
490 /* Initialize the TX DMA channel registers */
491 bfin_write_DMA2_X_COUNT(0);
492 bfin_write_DMA2_X_MODIFY(4);
493 bfin_write_DMA2_Y_COUNT(0);
494 bfin_write_DMA2_Y_MODIFY(0);
495
496 /* Initialize the RX DMA channel registers */
497 bfin_write_DMA1_X_COUNT(0);
498 bfin_write_DMA1_X_MODIFY(4);
499 bfin_write_DMA1_Y_COUNT(0);
500 bfin_write_DMA1_Y_MODIFY(0);
501}
502
73f83182 503static void setup_mac_addr(u8 *mac_addr)
e190d6b1
BW		 504{
505 u32 addr_low = le32_to_cpu(*(__le32 *) & mac_addr[0]);
506 u16 addr_hi = le16_to_cpu(*(__le16 *) & mac_addr[4]);
507
508 /* this depends on a little-endian machine */
509 bfin_write_EMAC_ADDRLO(addr_low);
510 bfin_write_EMAC_ADDRHI(addr_hi);
511}
512
73f83182
AL		 513static int bf537mac_set_mac_address(struct net_device *dev, void *p)
514{
515 struct sockaddr *addr = p;
516 if (netif_running(dev))
517 return -EBUSY;
518 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
519 setup_mac_addr(dev->dev_addr);
520 return 0;
521}
522
e190d6b1
BW		 523static void adjust_tx_list(void)
524{
525 int timeout_cnt = MAX_TIMEOUT_CNT;
526
527 if (tx_list_head->status.status_word != 0
528 && current_tx_ptr != tx_list_head) {
529 goto adjust_head; /* released something, just return; */
530 }
531
532 /*
533 * if nothing released, check wait condition
534 * current's next can not be the head,
535 * otherwise the dma will not stop as we want
536 */
537 if (current_tx_ptr->next->next == tx_list_head) {
538 while (tx_list_head->status.status_word == 0) {
6db9e461 539 mdelay(1);
e190d6b1
BW		 540 if (tx_list_head->status.status_word != 0
541 || !(bfin_read_DMA2_IRQ_STATUS() & 0x08)) {
542 goto adjust_head;
543 }
544 if (timeout_cnt-- < 0) {
545 printk(KERN_ERR DRV_NAME
546 ": wait for adjust tx list head timeout\n");
547 break;
548 }
549 }
550 if (tx_list_head->status.status_word != 0) {
551 goto adjust_head;
552 }
553 }
554
555 return;
556
557adjust_head:
558 do {
559 tx_list_head->desc_a.config &= ~DMAEN;
560 tx_list_head->status.status_word = 0;
561 if (tx_list_head->skb) {
562 dev_kfree_skb(tx_list_head->skb);
563 tx_list_head->skb = NULL;
564 } else {
565 printk(KERN_ERR DRV_NAME
566 ": no sk_buff in a transmitted frame!\n");
567 }
568 tx_list_head = tx_list_head->next;
569 } while (tx_list_head->status.status_word != 0
570 && current_tx_ptr != tx_list_head);
571 return;
572
573}
574
575static int bf537mac_hard_start_xmit(struct sk_buff *skb,
576 struct net_device *dev)
577{
578 struct bf537mac_local *lp = netdev_priv(dev);
579 unsigned int data;
580
581 current_tx_ptr->skb = skb;
582
583 /*
584 * Is skb->data always 16-bit aligned?
585 * Do we need to memcpy((char *)(tail->packet + 2), skb->data, len)?
586 */
587 if ((((unsigned int)(skb->data)) & 0x02) == 2) {
588 /* move skb->data to current_tx_ptr payload */
589 data = (unsigned int)(skb->data) - 2;
590 *((unsigned short *)data) = (unsigned short)(skb->len);
591 current_tx_ptr->desc_a.start_addr = (unsigned long)data;
592 /* this is important! */
593 blackfin_dcache_flush_range(data, (data + (skb->len)) + 2);
594
595 } else {
596 *((unsigned short *)(current_tx_ptr->packet)) =
597 (unsigned short)(skb->len);
598 memcpy((char *)(current_tx_ptr->packet + 2), skb->data,
599 (skb->len));
600 current_tx_ptr->desc_a.start_addr =
601 (unsigned long)current_tx_ptr->packet;
602 if (current_tx_ptr->status.status_word != 0)
603 current_tx_ptr->status.status_word = 0;
604 blackfin_dcache_flush_range((unsigned int)current_tx_ptr->
605 packet,
606 (unsigned int)(current_tx_ptr->
607 packet + skb->len) +
608 2);
609 }
610
611 /* enable this packet's dma */
612 current_tx_ptr->desc_a.config |= DMAEN;
613
614 /* tx dma is running, just return */
615 if (bfin_read_DMA2_IRQ_STATUS() & 0x08)
616 goto out;
617
618 /* tx dma is not running */
619 bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr->desc_a));
620 /* dma enabled, read from memory, size is 6 */
621 bfin_write_DMA2_CONFIG(current_tx_ptr->desc_a.config);
622 /* Turn on the EMAC tx */
623 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
624
625out:
626 adjust_tx_list();
627 current_tx_ptr = current_tx_ptr->next;
628 dev->trans_start = jiffies;
09f75cd7
JG		 629 dev->stats.tx_packets++;
630 dev->stats.tx_bytes += (skb->len);
e190d6b1
BW		 631 return 0;
632}
633
634static void bf537mac_rx(struct net_device *dev)
635{
636 struct sk_buff *skb, *new_skb;
637 struct bf537mac_local *lp = netdev_priv(dev);
638 unsigned short len;
639
640 /* allocate a new skb for next time receive */
641 skb = current_rx_ptr->skb;
642 new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
643 if (!new_skb) {
644 printk(KERN_NOTICE DRV_NAME
645 ": rx: low on mem - packet dropped\n");
09f75cd7 646 dev->stats.rx_dropped++;
e190d6b1
BW		 647 goto out;
648 }
649 /* reserve 2 bytes for RXDWA padding */
650 skb_reserve(new_skb, 2);
651 current_rx_ptr->skb = new_skb;
652 current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2;
653
654 len = (unsigned short)((current_rx_ptr->status.status_word) & RX_FRLEN);
655 skb_put(skb, len);
656 blackfin_dcache_invalidate_range((unsigned long)skb->head,
657 (unsigned long)skb->tail);
658
659 dev->last_rx = jiffies;
660 skb->dev = dev;
661 skb->protocol = eth_type_trans(skb, dev);
662#if defined(BFIN_MAC_CSUM_OFFLOAD)
663 skb->csum = current_rx_ptr->status.ip_payload_csum;
00ff49a9 664 skb->ip_summed = CHECKSUM_COMPLETE;
e190d6b1
BW		 665#endif
666
667 netif_rx(skb);
09f75cd7
JG		 668 dev->stats.rx_packets++;
669 dev->stats.rx_bytes += len;
e190d6b1
BW		 670 current_rx_ptr->status.status_word = 0x00000000;
671 current_rx_ptr = current_rx_ptr->next;
672
673out:
674 return;
675}
676
677/* interrupt routine to handle rx and error signal */
678static irqreturn_t bf537mac_interrupt(int irq, void *dev_id)
679{
680 struct net_device *dev = dev_id;
681 int number = 0;
682
683get_one_packet:
684 if (current_rx_ptr->status.status_word == 0) {
685 /* no more new packet received */
686 if (number == 0) {
687 if (current_rx_ptr->next->status.status_word != 0) {
688 current_rx_ptr = current_rx_ptr->next;
689 goto real_rx;
690 }
691 }
692 bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
693 DMA_DONE | DMA_ERR);
694 return IRQ_HANDLED;
695 }
696
697real_rx:
698 bf537mac_rx(dev);
699 number++;
700 goto get_one_packet;
701}
702
703#ifdef CONFIG_NET_POLL_CONTROLLER
704static void bf537mac_poll(struct net_device *dev)
705{
706 disable_irq(IRQ_MAC_RX);
707 bf537mac_interrupt(IRQ_MAC_RX, dev);
708 enable_irq(IRQ_MAC_RX);
709}
710#endif /* CONFIG_NET_POLL_CONTROLLER */
711
496a34c2 712static void bf537mac_disable(void)
e190d6b1
BW		 713{
714 unsigned int opmode;
715
716 opmode = bfin_read_EMAC_OPMODE();
717 opmode &= (~RE);
718 opmode &= (~TE);
719 /* Turn off the EMAC */
720 bfin_write_EMAC_OPMODE(opmode);
721}
722
723/*
724 * Enable Interrupts, Receive, and Transmit
725 */
4ae5a3ad 726static void bf537mac_enable(void)
e190d6b1
BW		 727{
728 u32 opmode;
729
4ae5a3ad 730 pr_debug("%s: %s\n", DRV_NAME, __FUNCTION__);
e190d6b1
BW		 731
732 /* Set RX DMA */
733 bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head->desc_a));
734 bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config);
735
736 /* Wait MII done */
4ae5a3ad 737 mdio_poll();
e190d6b1
BW		 738
739 /* We enable only RX here */
740 /* ASTP : Enable Automatic Pad Stripping
741 PR : Promiscuous Mode for test
742 PSF : Receive frames with total length less than 64 bytes.
743 FDMODE : Full Duplex Mode
744 LB : Internal Loopback for test
745 RE : Receiver Enable */
746 opmode = bfin_read_EMAC_OPMODE();
747 if (opmode & FDMODE)
748 opmode |= PSF;
749 else
750 opmode |= DRO | DC | PSF;
751 opmode |= RE;
752
753#if defined(CONFIG_BFIN_MAC_RMII)
754 opmode |= RMII; /* For Now only 100MBit are supported */
6893ff1c 755#if (defined(CONFIG_BF537) || defined(CONFIG_BF536)) && CONFIG_BF_REV_0_2
e190d6b1
BW		 756 opmode |= TE;
757#endif
758#endif
759 /* Turn on the EMAC rx */
760 bfin_write_EMAC_OPMODE(opmode);
e190d6b1
BW		 761}
762
763/* Our watchdog timed out. Called by the networking layer */
764static void bf537mac_timeout(struct net_device *dev)
765{
766 pr_debug("%s: %s\n", dev->name, __FUNCTION__);
767
496a34c2 768 bf537mac_disable();
e190d6b1
BW		 769
770 /* reset tx queue */
771 tx_list_tail = tx_list_head->next;
772
4ae5a3ad 773 bf537mac_enable();
e190d6b1
BW		 774
775 /* We can accept TX packets again */
776 dev->trans_start = jiffies;
777 netif_wake_queue(dev);
778}
779
775919bc
AW		 780static void bf537mac_multicast_hash(struct net_device *dev)
781{
782 u32 emac_hashhi, emac_hashlo;
783 struct dev_mc_list *dmi = dev->mc_list;
784 char *addrs;
785 int i;
786 u32 crc;
787
788 emac_hashhi = emac_hashlo = 0;
789
790 for (i = 0; i < dev->mc_count; i++) {
791 addrs = dmi->dmi_addr;
792 dmi = dmi->next;
793
794 /* skip non-multicast addresses */
795 if (!(*addrs & 1))
796 continue;
797
798 crc = ether_crc(ETH_ALEN, addrs);
799 crc >>= 26;
800
801 if (crc & 0x20)
802 emac_hashhi |= 1 << (crc & 0x1f);
803 else
804 emac_hashlo |= 1 << (crc & 0x1f);
805 }
806
807 bfin_write_EMAC_HASHHI(emac_hashhi);
808 bfin_write_EMAC_HASHLO(emac_hashlo);
809
810 return;
811}
812
e190d6b1
BW		 813/*
814 * This routine will, depending on the values passed to it,
815 * either make it accept multicast packets, go into
816 * promiscuous mode (for TCPDUMP and cousins) or accept
817 * a select set of multicast packets
818 */
819static void bf537mac_set_multicast_list(struct net_device *dev)
820{
821 u32 sysctl;
822
823 if (dev->flags & IFF_PROMISC) {
824 printk(KERN_INFO "%s: set to promisc mode\n", dev->name);
825 sysctl = bfin_read_EMAC_OPMODE();
826 sysctl |= RAF;
827 bfin_write_EMAC_OPMODE(sysctl);
775919bc 828 } else if (dev->flags & IFF_ALLMULTI) {
e190d6b1
BW		 829 /* accept all multicast */
830 sysctl = bfin_read_EMAC_OPMODE();
831 sysctl |= PAM;
832 bfin_write_EMAC_OPMODE(sysctl);
775919bc
AW		 833 } else if (dev->mc_count) {
834 /* set up multicast hash table */
835 sysctl = bfin_read_EMAC_OPMODE();
836 sysctl |= HM;
837 bfin_write_EMAC_OPMODE(sysctl);
838 bf537mac_multicast_hash(dev);
e190d6b1
BW		 839 } else {
840 /* clear promisc or multicast mode */
841 sysctl = bfin_read_EMAC_OPMODE();
842 sysctl &= ~(RAF | PAM);
843 bfin_write_EMAC_OPMODE(sysctl);
844 }
845}
846
847/*
848 * this puts the device in an inactive state
849 */
850static void bf537mac_shutdown(struct net_device *dev)
851{
852 /* Turn off the EMAC */
853 bfin_write_EMAC_OPMODE(0x00000000);
854 /* Turn off the EMAC RX DMA */
855 bfin_write_DMA1_CONFIG(0x0000);
856 bfin_write_DMA2_CONFIG(0x0000);
857}
858
859/*
860 * Open and Initialize the interface
861 *
862 * Set up everything, reset the card, etc..
863 */
864static int bf537mac_open(struct net_device *dev)
865{
4ae5a3ad 866 struct bf537mac_local *lp = netdev_priv(dev);
4af4b840 867 int retval;
e190d6b1
BW		 868 pr_debug("%s: %s\n", dev->name, __FUNCTION__);
869
870 /*
871 * Check that the address is valid. If its not, refuse
872 * to bring the device up. The user must specify an
873 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
874 */
875 if (!is_valid_ether_addr(dev->dev_addr)) {
876 printk(KERN_WARNING DRV_NAME ": no valid ethernet hw addr\n");
877 return -EINVAL;
878 }
879
880 /* initial rx and tx list */
4af4b840
MH		 881 retval = desc_list_init();
882
883 if (retval)
884 return retval;
e190d6b1 885
4ae5a3ad 886 phy_start(lp->phydev);
136492b2 887 phy_write(lp->phydev, MII_BMCR, BMCR_RESET);
e190d6b1 888 setup_system_regs(dev);
496a34c2 889 bf537mac_disable();
4ae5a3ad 890 bf537mac_enable();
e190d6b1
BW		 891 pr_debug("hardware init finished\n");
892 netif_start_queue(dev);
893 netif_carrier_on(dev);
894
895 return 0;
896}
897
898/*
899 *
900 * this makes the board clean up everything that it can
901 * and not talk to the outside world. Caused by
902 * an 'ifconfig ethX down'
903 */
904static int bf537mac_close(struct net_device *dev)
905{
4ae5a3ad 906 struct bf537mac_local *lp = netdev_priv(dev);
e190d6b1
BW		 907 pr_debug("%s: %s\n", dev->name, __FUNCTION__);
908
909 netif_stop_queue(dev);
910 netif_carrier_off(dev);
911
4ae5a3ad 912 phy_stop(lp->phydev);
136492b2 913 phy_write(lp->phydev, MII_BMCR, BMCR_PDOWN);
4ae5a3ad 914
e190d6b1
BW		 915 /* clear everything */
916 bf537mac_shutdown(dev);
917
918 /* free the rx/tx buffers */
919 desc_list_free();
920
921 return 0;
922}
923
924static int __init bf537mac_probe(struct net_device *dev)
925{
926 struct bf537mac_local *lp = netdev_priv(dev);
927 int retval;
4ae5a3ad 928 int i;
e190d6b1
BW		 929
930 /* Grab the MAC address in the MAC */
931 *(__le32 *) (&(dev->dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
932 *(__le16 *) (&(dev->dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI());
933
934 /* probe mac */
935 /*todo: how to proble? which is revision_register */
936 bfin_write_EMAC_ADDRLO(0x12345678);
937 if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
938 pr_debug("can't detect bf537 mac!\n");
939 retval = -ENODEV;
940 goto err_out;
941 }
942
943 /* set the GPIO pins to Ethernet mode */
944 retval = setup_pin_mux(1);
e190d6b1
BW		 945 if (retval)
946 return retval;
947
948 /*Is it valid? (Did bootloader initialize it?) */
949 if (!is_valid_ether_addr(dev->dev_addr)) {
950 /* Grab the MAC from the board somehow - this is done in the
951 arch/blackfin/mach-bf537/boards/eth_mac.c */
9862cc52 952 bfin_get_ether_addr(dev->dev_addr);
e190d6b1
BW		 953 }
954
955 /* If still not valid, get a random one */
956 if (!is_valid_ether_addr(dev->dev_addr)) {
957 random_ether_addr(dev->dev_addr);
958 }
959
960 setup_mac_addr(dev->dev_addr);
961
4ae5a3ad
BW		 962 /* MDIO bus initial */
963 lp->mii_bus.priv = dev;
964 lp->mii_bus.read = mdiobus_read;
965 lp->mii_bus.write = mdiobus_write;
966 lp->mii_bus.reset = mdiobus_reset;
967 lp->mii_bus.name = "bfin_mac_mdio";
968 lp->mii_bus.id = 0;
969 lp->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
970 for (i = 0; i < PHY_MAX_ADDR; ++i)
971 lp->mii_bus.irq[i] = PHY_POLL;
972
973 mdiobus_register(&lp->mii_bus);
974
975 retval = mii_probe(dev);
976 if (retval)
977 return retval;
978
e190d6b1
BW		 979 /* Fill in the fields of the device structure with ethernet values. */
980 ether_setup(dev);
981
982 dev->open = bf537mac_open;
983 dev->stop = bf537mac_close;
984 dev->hard_start_xmit = bf537mac_hard_start_xmit;
73f83182 985 dev->set_mac_address = bf537mac_set_mac_address;
e190d6b1 986 dev->tx_timeout = bf537mac_timeout;
e190d6b1
BW		 987 dev->set_multicast_list = bf537mac_set_multicast_list;
988#ifdef CONFIG_NET_POLL_CONTROLLER
989 dev->poll_controller = bf537mac_poll;
990#endif
991
e190d6b1
BW		 992 spin_lock_init(&lp->lock);
993
994 /* now, enable interrupts */
995 /* register irq handler */
996 if (request_irq
997 (IRQ_MAC_RX, bf537mac_interrupt, IRQF_DISABLED | IRQF_SHARED,
6893ff1c 998 "EMAC_RX", dev)) {
e190d6b1
BW		 999 printk(KERN_WARNING DRV_NAME
1000 ": Unable to attach BlackFin MAC RX interrupt\n");
1001 return -EBUSY;
1002 }
1003
e190d6b1
BW		 1004
1005 retval = register_netdev(dev);
1006 if (retval == 0) {
1007 /* now, print out the card info, in a short format.. */
1008 printk(KERN_INFO "%s: Version %s, %s\n",
1009 DRV_NAME, DRV_VERSION, DRV_DESC);
1010 }
1011
1012err_out:
1013 return retval;
1014}
1015
1016static int bfin_mac_probe(struct platform_device *pdev)
1017{
1018 struct net_device *ndev;
1019
1020 ndev = alloc_etherdev(sizeof(struct bf537mac_local));
1021 if (!ndev) {
1022 printk(KERN_WARNING DRV_NAME ": could not allocate device\n");
1023 return -ENOMEM;
1024 }
1025
e190d6b1
BW		 1026 SET_NETDEV_DEV(ndev, &pdev->dev);
1027
1028 platform_set_drvdata(pdev, ndev);
1029
1030 if (bf537mac_probe(ndev) != 0) {
1031 platform_set_drvdata(pdev, NULL);
1032 free_netdev(ndev);
1033 printk(KERN_WARNING DRV_NAME ": not found\n");
1034 return -ENODEV;
1035 }
1036
1037 return 0;
1038}
1039
1040static int bfin_mac_remove(struct platform_device *pdev)
1041{
1042 struct net_device *ndev = platform_get_drvdata(pdev);
1043
1044 platform_set_drvdata(pdev, NULL);
1045
1046 unregister_netdev(ndev);
1047
1048 free_irq(IRQ_MAC_RX, ndev);
1049
1050 free_netdev(ndev);
1051
1052 setup_pin_mux(0);
1053
1054 return 0;
1055}
1056
496a34c2
BW		 1057#ifdef CONFIG_PM
1058static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg)
e190d6b1 1059{
496a34c2
BW		 1060 struct net_device *net_dev = platform_get_drvdata(pdev);
1061
1062 if (netif_running(net_dev))
1063 bf537mac_close(net_dev);
1064
e190d6b1
BW		 1065 return 0;
1066}
1067
1068static int bfin_mac_resume(struct platform_device *pdev)
1069{
496a34c2
BW		 1070 struct net_device *net_dev = platform_get_drvdata(pdev);
1071
1072 if (netif_running(net_dev))
1073 bf537mac_open(net_dev);
1074
e190d6b1
BW		 1075 return 0;
1076}
496a34c2
BW		 1077#else
1078#define bfin_mac_suspend NULL
1079#define bfin_mac_resume NULL
1080#endif /* CONFIG_PM */
e190d6b1
BW		 1081
1082static struct platform_driver bfin_mac_driver = {
1083 .probe = bfin_mac_probe,
1084 .remove = bfin_mac_remove,
1085 .resume = bfin_mac_resume,
1086 .suspend = bfin_mac_suspend,
1087 .driver = {
1088 .name = DRV_NAME,
1089 },
1090};
1091
1092static int __init bfin_mac_init(void)
1093{
1094 return platform_driver_register(&bfin_mac_driver);
1095}
1096
1097module_init(bfin_mac_init);
1098
1099static void __exit bfin_mac_cleanup(void)
1100{
1101 platform_driver_unregister(&bfin_mac_driver);
1102}
1103
1104module_exit(bfin_mac_cleanup);
Linux kernel - Deliverables
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