EMAC driver: shorten the mdelay value to solve netperf performance issue
[deliverable/linux.git] / drivers / net / bfin_mac.c
CommitLineData
e190d6b1
BW
1/*
2 * File: drivers/net/bfin_mac.c
3 * Based on:
4 * Maintainer:
5 * Bryan Wu <bryan.wu@analog.com>
6 *
7 * Original author:
8 * Luke Yang <luke.yang@analog.com>
9 *
10 * Created:
11 * Description:
12 *
13 * Modified:
14 * Copyright 2004-2006 Analog Devices Inc.
15 *
16 * Bugs: Enter bugs at http://blackfin.uclinux.org/
17 *
18 * This program is free software ; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation ; either version 2, or (at your option)
21 * any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY ; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program ; see the file COPYING.
30 * If not, write to the Free Software Foundation,
31 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
32 */
33
34#include <linux/init.h>
35#include <linux/module.h>
36#include <linux/kernel.h>
37#include <linux/sched.h>
38#include <linux/slab.h>
39#include <linux/delay.h>
40#include <linux/timer.h>
41#include <linux/errno.h>
42#include <linux/irq.h>
43#include <linux/io.h>
44#include <linux/ioport.h>
45#include <linux/crc32.h>
46#include <linux/device.h>
47#include <linux/spinlock.h>
48#include <linux/ethtool.h>
49#include <linux/mii.h>
4ae5a3ad 50#include <linux/phy.h>
e190d6b1
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51#include <linux/netdevice.h>
52#include <linux/etherdevice.h>
53#include <linux/skbuff.h>
e190d6b1 54#include <linux/platform_device.h>
e190d6b1
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55
56#include <asm/dma.h>
57#include <linux/dma-mapping.h>
58
59#include <asm/blackfin.h>
60#include <asm/cacheflush.h>
61#include <asm/portmux.h>
62
63#include "bfin_mac.h"
64
65#define DRV_NAME "bfin_mac"
66#define DRV_VERSION "1.1"
67#define DRV_AUTHOR "Bryan Wu, Luke Yang"
68#define DRV_DESC "Blackfin BF53[67] on-chip Ethernet MAC driver"
69
70MODULE_AUTHOR(DRV_AUTHOR);
71MODULE_LICENSE("GPL");
72MODULE_DESCRIPTION(DRV_DESC);
73
74#if defined(CONFIG_BFIN_MAC_USE_L1)
75# define bfin_mac_alloc(dma_handle, size) l1_data_sram_zalloc(size)
76# define bfin_mac_free(dma_handle, ptr) l1_data_sram_free(ptr)
77#else
78# define bfin_mac_alloc(dma_handle, size) \
79 dma_alloc_coherent(NULL, size, dma_handle, GFP_KERNEL)
80# define bfin_mac_free(dma_handle, ptr) \
81 dma_free_coherent(NULL, sizeof(*ptr), ptr, dma_handle)
82#endif
83
84#define PKT_BUF_SZ 1580
85
86#define MAX_TIMEOUT_CNT 500
87
88/* pointers to maintain transmit list */
89static struct net_dma_desc_tx *tx_list_head;
90static struct net_dma_desc_tx *tx_list_tail;
91static struct net_dma_desc_rx *rx_list_head;
92static struct net_dma_desc_rx *rx_list_tail;
93static struct net_dma_desc_rx *current_rx_ptr;
94static struct net_dma_desc_tx *current_tx_ptr;
95static struct net_dma_desc_tx *tx_desc;
96static struct net_dma_desc_rx *rx_desc;
97
4ae5a3ad
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98static void bf537mac_disable(void);
99static void bf537mac_enable(void);
100
e190d6b1
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101static void desc_list_free(void)
102{
103 struct net_dma_desc_rx *r;
104 struct net_dma_desc_tx *t;
105 int i;
106#if !defined(CONFIG_BFIN_MAC_USE_L1)
107 dma_addr_t dma_handle = 0;
108#endif
109
110 if (tx_desc) {
111 t = tx_list_head;
112 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
113 if (t) {
114 if (t->skb) {
115 dev_kfree_skb(t->skb);
116 t->skb = NULL;
117 }
118 t = t->next;
119 }
120 }
121 bfin_mac_free(dma_handle, tx_desc);
122 }
123
124 if (rx_desc) {
125 r = rx_list_head;
126 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
127 if (r) {
128 if (r->skb) {
129 dev_kfree_skb(r->skb);
130 r->skb = NULL;
131 }
132 r = r->next;
133 }
134 }
135 bfin_mac_free(dma_handle, rx_desc);
136 }
137}
138
139static int desc_list_init(void)
140{
141 int i;
142 struct sk_buff *new_skb;
143#if !defined(CONFIG_BFIN_MAC_USE_L1)
144 /*
145 * This dma_handle is useless in Blackfin dma_alloc_coherent().
146 * The real dma handler is the return value of dma_alloc_coherent().
147 */
148 dma_addr_t dma_handle;
149#endif
150
151 tx_desc = bfin_mac_alloc(&dma_handle,
152 sizeof(struct net_dma_desc_tx) *
153 CONFIG_BFIN_TX_DESC_NUM);
154 if (tx_desc == NULL)
155 goto init_error;
156
157 rx_desc = bfin_mac_alloc(&dma_handle,
158 sizeof(struct net_dma_desc_rx) *
159 CONFIG_BFIN_RX_DESC_NUM);
160 if (rx_desc == NULL)
161 goto init_error;
162
163 /* init tx_list */
164 tx_list_head = tx_list_tail = tx_desc;
165
166 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
167 struct net_dma_desc_tx *t = tx_desc + i;
168 struct dma_descriptor *a = &(t->desc_a);
169 struct dma_descriptor *b = &(t->desc_b);
170
171 /*
172 * disable DMA
173 * read from memory WNR = 0
174 * wordsize is 32 bits
175 * 6 half words is desc size
176 * large desc flow
177 */
178 a->config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
179 a->start_addr = (unsigned long)t->packet;
180 a->x_count = 0;
181 a->next_dma_desc = b;
182
183 /*
184 * enabled DMA
185 * write to memory WNR = 1
186 * wordsize is 32 bits
187 * disable interrupt
188 * 6 half words is desc size
189 * large desc flow
190 */
191 b->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
192 b->start_addr = (unsigned long)(&(t->status));
193 b->x_count = 0;
194
195 t->skb = NULL;
196 tx_list_tail->desc_b.next_dma_desc = a;
197 tx_list_tail->next = t;
198 tx_list_tail = t;
199 }
200 tx_list_tail->next = tx_list_head; /* tx_list is a circle */
201 tx_list_tail->desc_b.next_dma_desc = &(tx_list_head->desc_a);
202 current_tx_ptr = tx_list_head;
203
204 /* init rx_list */
205 rx_list_head = rx_list_tail = rx_desc;
206
207 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
208 struct net_dma_desc_rx *r = rx_desc + i;
209 struct dma_descriptor *a = &(r->desc_a);
210 struct dma_descriptor *b = &(r->desc_b);
211
212 /* allocate a new skb for next time receive */
213 new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
214 if (!new_skb) {
215 printk(KERN_NOTICE DRV_NAME
216 ": init: low on mem - packet dropped\n");
217 goto init_error;
218 }
219 skb_reserve(new_skb, 2);
220 r->skb = new_skb;
221
222 /*
223 * enabled DMA
224 * write to memory WNR = 1
225 * wordsize is 32 bits
226 * disable interrupt
227 * 6 half words is desc size
228 * large desc flow
229 */
230 a->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
231 /* since RXDWA is enabled */
232 a->start_addr = (unsigned long)new_skb->data - 2;
233 a->x_count = 0;
234 a->next_dma_desc = b;
235
236 /*
237 * enabled DMA
238 * write to memory WNR = 1
239 * wordsize is 32 bits
240 * enable interrupt
241 * 6 half words is desc size
242 * large desc flow
243 */
244 b->config = DMAEN | WNR | WDSIZE_32 | DI_EN |
245 NDSIZE_6 | DMAFLOW_LARGE;
246 b->start_addr = (unsigned long)(&(r->status));
247 b->x_count = 0;
248
249 rx_list_tail->desc_b.next_dma_desc = a;
250 rx_list_tail->next = r;
251 rx_list_tail = r;
252 }
253 rx_list_tail->next = rx_list_head; /* rx_list is a circle */
254 rx_list_tail->desc_b.next_dma_desc = &(rx_list_head->desc_a);
255 current_rx_ptr = rx_list_head;
256
257 return 0;
258
259init_error:
260 desc_list_free();
261 printk(KERN_ERR DRV_NAME ": kmalloc failed\n");
262 return -ENOMEM;
263}
264
265
266/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
267
268/* Set FER regs to MUX in Ethernet pins */
269static int setup_pin_mux(int action)
270{
271#if defined(CONFIG_BFIN_MAC_RMII)
272 u16 pin_req[] = P_RMII0;
273#else
274 u16 pin_req[] = P_MII0;
275#endif
276
277 if (action) {
278 if (peripheral_request_list(pin_req, DRV_NAME)) {
279 printk(KERN_ERR DRV_NAME
280 ": Requesting Peripherals failed\n");
281 return -EFAULT;
282 }
283 } else
284 peripheral_free_list(pin_req);
285
286 return 0;
287}
288
4ae5a3ad
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289/*
290 * MII operations
291 */
e190d6b1 292/* Wait until the previous MDC/MDIO transaction has completed */
4ae5a3ad 293static void mdio_poll(void)
e190d6b1
BW
294{
295 int timeout_cnt = MAX_TIMEOUT_CNT;
296
297 /* poll the STABUSY bit */
298 while ((bfin_read_EMAC_STAADD()) & STABUSY) {
6db9e461 299 udelay(1);
e190d6b1
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300 if (timeout_cnt-- < 0) {
301 printk(KERN_ERR DRV_NAME
302 ": wait MDC/MDIO transaction to complete timeout\n");
303 break;
304 }
305 }
306}
307
308/* Read an off-chip register in a PHY through the MDC/MDIO port */
4ae5a3ad 309static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
e190d6b1 310{
4ae5a3ad
BW
311 mdio_poll();
312
e190d6b1 313 /* read mode */
4ae5a3ad
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314 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
315 SET_REGAD((u16) regnum) |
e190d6b1 316 STABUSY);
e190d6b1 317
4ae5a3ad
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318 mdio_poll();
319
320 return (int) bfin_read_EMAC_STADAT();
e190d6b1
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321}
322
323/* Write an off-chip register in a PHY through the MDC/MDIO port */
4ae5a3ad
BW
324static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
325 u16 value)
e190d6b1 326{
4ae5a3ad
BW
327 mdio_poll();
328
329 bfin_write_EMAC_STADAT((u32) value);
e190d6b1
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330
331 /* write mode */
4ae5a3ad
BW
332 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
333 SET_REGAD((u16) regnum) |
e190d6b1
BW
334 STAOP |
335 STABUSY);
336
4ae5a3ad
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337 mdio_poll();
338
339 return 0;
e190d6b1
BW
340}
341
4ae5a3ad 342static int mdiobus_reset(struct mii_bus *bus)
e190d6b1 343{
4ae5a3ad 344 return 0;
e190d6b1
BW
345}
346
4ae5a3ad 347static void bf537_adjust_link(struct net_device *dev)
e190d6b1 348{
e190d6b1 349 struct bf537mac_local *lp = netdev_priv(dev);
4ae5a3ad
BW
350 struct phy_device *phydev = lp->phydev;
351 unsigned long flags;
352 int new_state = 0;
353
354 spin_lock_irqsave(&lp->lock, flags);
355 if (phydev->link) {
356 /* Now we make sure that we can be in full duplex mode.
357 * If not, we operate in half-duplex mode. */
358 if (phydev->duplex != lp->old_duplex) {
359 u32 opmode = bfin_read_EMAC_OPMODE();
360 new_state = 1;
361
362 if (phydev->duplex)
363 opmode |= FDMODE;
364 else
365 opmode &= ~(FDMODE);
366
367 bfin_write_EMAC_OPMODE(opmode);
368 lp->old_duplex = phydev->duplex;
369 }
e190d6b1 370
4ae5a3ad
BW
371 if (phydev->speed != lp->old_speed) {
372#if defined(CONFIG_BFIN_MAC_RMII)
373 u32 opmode = bfin_read_EMAC_OPMODE();
4ae5a3ad
BW
374 switch (phydev->speed) {
375 case 10:
376 opmode |= RMII_10;
377 break;
378 case 100:
379 opmode &= ~(RMII_10);
380 break;
381 default:
382 printk(KERN_WARNING
383 "%s: Ack! Speed (%d) is not 10/100!\n",
384 DRV_NAME, phydev->speed);
385 break;
386 }
387 bfin_write_EMAC_OPMODE(opmode);
4ae5a3ad 388#endif
e190d6b1 389
4ae5a3ad
BW
390 new_state = 1;
391 lp->old_speed = phydev->speed;
392 }
e190d6b1 393
4ae5a3ad
BW
394 if (!lp->old_link) {
395 new_state = 1;
396 lp->old_link = 1;
397 netif_schedule(dev);
398 }
399 } else if (lp->old_link) {
400 new_state = 1;
401 lp->old_link = 0;
402 lp->old_speed = 0;
403 lp->old_duplex = -1;
e190d6b1
BW
404 }
405
4ae5a3ad
BW
406 if (new_state) {
407 u32 opmode = bfin_read_EMAC_OPMODE();
408 phy_print_status(phydev);
409 pr_debug("EMAC_OPMODE = 0x%08x\n", opmode);
e190d6b1 410 }
4ae5a3ad
BW
411
412 spin_unlock_irqrestore(&lp->lock, flags);
e190d6b1
BW
413}
414
4ae5a3ad 415static int mii_probe(struct net_device *dev)
e190d6b1 416{
e190d6b1 417 struct bf537mac_local *lp = netdev_priv(dev);
4ae5a3ad
BW
418 struct phy_device *phydev = NULL;
419 unsigned short sysctl;
420 int i;
e190d6b1 421
4ae5a3ad 422 /* Enable PHY output early */
e190d6b1
BW
423 if (!(bfin_read_VR_CTL() & PHYCLKOE))
424 bfin_write_VR_CTL(bfin_read_VR_CTL() | PHYCLKOE);
425
426 /* MDC = 2.5 MHz */
4ae5a3ad
BW
427 sysctl = bfin_read_EMAC_SYSCTL();
428 sysctl |= SET_MDCDIV(24);
e190d6b1 429 bfin_write_EMAC_SYSCTL(sysctl);
e190d6b1 430
4ae5a3ad
BW
431 /* search for connect PHY device */
432 for (i = 0; i < PHY_MAX_ADDR; i++) {
433 struct phy_device *const tmp_phydev = lp->mii_bus.phy_map[i];
e190d6b1 434
4ae5a3ad
BW
435 if (!tmp_phydev)
436 continue; /* no PHY here... */
e190d6b1 437
4ae5a3ad
BW
438 phydev = tmp_phydev;
439 break; /* found it */
440 }
441
442 /* now we are supposed to have a proper phydev, to attach to... */
443 if (!phydev) {
444 printk(KERN_INFO "%s: Don't found any phy device at all\n",
445 dev->name);
446 return -ENODEV;
e190d6b1
BW
447 }
448
449#if defined(CONFIG_BFIN_MAC_RMII)
4ae5a3ad
BW
450 phydev = phy_connect(dev, phydev->dev.bus_id, &bf537_adjust_link, 0,
451 PHY_INTERFACE_MODE_RMII);
452#else
453 phydev = phy_connect(dev, phydev->dev.bus_id, &bf537_adjust_link, 0,
454 PHY_INTERFACE_MODE_MII);
e190d6b1
BW
455#endif
456
4ae5a3ad
BW
457 if (IS_ERR(phydev)) {
458 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
459 return PTR_ERR(phydev);
460 }
461
462 /* mask with MAC supported features */
463 phydev->supported &= (SUPPORTED_10baseT_Half
464 | SUPPORTED_10baseT_Full
465 | SUPPORTED_100baseT_Half
466 | SUPPORTED_100baseT_Full
467 | SUPPORTED_Autoneg
468 | SUPPORTED_Pause | SUPPORTED_Asym_Pause
469 | SUPPORTED_MII
470 | SUPPORTED_TP);
471
472 phydev->advertising = phydev->supported;
473
474 lp->old_link = 0;
475 lp->old_speed = 0;
476 lp->old_duplex = -1;
477 lp->phydev = phydev;
478
479 printk(KERN_INFO "%s: attached PHY driver [%s] "
480 "(mii_bus:phy_addr=%s, irq=%d)\n",
481 DRV_NAME, phydev->drv->name, phydev->dev.bus_id, phydev->irq);
482
483 return 0;
484}
485
486/**************************************************************************/
487void setup_system_regs(struct net_device *dev)
488{
489 unsigned short sysctl;
490
491 /*
492 * Odd word alignment for Receive Frame DMA word
493 * Configure checksum support and rcve frame word alignment
494 */
495 sysctl = bfin_read_EMAC_SYSCTL();
496#if defined(BFIN_MAC_CSUM_OFFLOAD)
497 sysctl |= RXDWA | RXCKS;
498#else
499 sysctl |= RXDWA;
500#endif
501 bfin_write_EMAC_SYSCTL(sysctl);
e190d6b1
BW
502
503 bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
504
505 /* Initialize the TX DMA channel registers */
506 bfin_write_DMA2_X_COUNT(0);
507 bfin_write_DMA2_X_MODIFY(4);
508 bfin_write_DMA2_Y_COUNT(0);
509 bfin_write_DMA2_Y_MODIFY(0);
510
511 /* Initialize the RX DMA channel registers */
512 bfin_write_DMA1_X_COUNT(0);
513 bfin_write_DMA1_X_MODIFY(4);
514 bfin_write_DMA1_Y_COUNT(0);
515 bfin_write_DMA1_Y_MODIFY(0);
516}
517
73f83182 518static void setup_mac_addr(u8 *mac_addr)
e190d6b1
BW
519{
520 u32 addr_low = le32_to_cpu(*(__le32 *) & mac_addr[0]);
521 u16 addr_hi = le16_to_cpu(*(__le16 *) & mac_addr[4]);
522
523 /* this depends on a little-endian machine */
524 bfin_write_EMAC_ADDRLO(addr_low);
525 bfin_write_EMAC_ADDRHI(addr_hi);
526}
527
73f83182
AL
528static int bf537mac_set_mac_address(struct net_device *dev, void *p)
529{
530 struct sockaddr *addr = p;
531 if (netif_running(dev))
532 return -EBUSY;
533 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
534 setup_mac_addr(dev->dev_addr);
535 return 0;
536}
537
e190d6b1
BW
538static void adjust_tx_list(void)
539{
540 int timeout_cnt = MAX_TIMEOUT_CNT;
541
542 if (tx_list_head->status.status_word != 0
543 && current_tx_ptr != tx_list_head) {
544 goto adjust_head; /* released something, just return; */
545 }
546
547 /*
548 * if nothing released, check wait condition
549 * current's next can not be the head,
550 * otherwise the dma will not stop as we want
551 */
552 if (current_tx_ptr->next->next == tx_list_head) {
553 while (tx_list_head->status.status_word == 0) {
6db9e461 554 mdelay(1);
e190d6b1
BW
555 if (tx_list_head->status.status_word != 0
556 || !(bfin_read_DMA2_IRQ_STATUS() & 0x08)) {
557 goto adjust_head;
558 }
559 if (timeout_cnt-- < 0) {
560 printk(KERN_ERR DRV_NAME
561 ": wait for adjust tx list head timeout\n");
562 break;
563 }
564 }
565 if (tx_list_head->status.status_word != 0) {
566 goto adjust_head;
567 }
568 }
569
570 return;
571
572adjust_head:
573 do {
574 tx_list_head->desc_a.config &= ~DMAEN;
575 tx_list_head->status.status_word = 0;
576 if (tx_list_head->skb) {
577 dev_kfree_skb(tx_list_head->skb);
578 tx_list_head->skb = NULL;
579 } else {
580 printk(KERN_ERR DRV_NAME
581 ": no sk_buff in a transmitted frame!\n");
582 }
583 tx_list_head = tx_list_head->next;
584 } while (tx_list_head->status.status_word != 0
585 && current_tx_ptr != tx_list_head);
586 return;
587
588}
589
590static int bf537mac_hard_start_xmit(struct sk_buff *skb,
591 struct net_device *dev)
592{
593 struct bf537mac_local *lp = netdev_priv(dev);
594 unsigned int data;
595
596 current_tx_ptr->skb = skb;
597
598 /*
599 * Is skb->data always 16-bit aligned?
600 * Do we need to memcpy((char *)(tail->packet + 2), skb->data, len)?
601 */
602 if ((((unsigned int)(skb->data)) & 0x02) == 2) {
603 /* move skb->data to current_tx_ptr payload */
604 data = (unsigned int)(skb->data) - 2;
605 *((unsigned short *)data) = (unsigned short)(skb->len);
606 current_tx_ptr->desc_a.start_addr = (unsigned long)data;
607 /* this is important! */
608 blackfin_dcache_flush_range(data, (data + (skb->len)) + 2);
609
610 } else {
611 *((unsigned short *)(current_tx_ptr->packet)) =
612 (unsigned short)(skb->len);
613 memcpy((char *)(current_tx_ptr->packet + 2), skb->data,
614 (skb->len));
615 current_tx_ptr->desc_a.start_addr =
616 (unsigned long)current_tx_ptr->packet;
617 if (current_tx_ptr->status.status_word != 0)
618 current_tx_ptr->status.status_word = 0;
619 blackfin_dcache_flush_range((unsigned int)current_tx_ptr->
620 packet,
621 (unsigned int)(current_tx_ptr->
622 packet + skb->len) +
623 2);
624 }
625
626 /* enable this packet's dma */
627 current_tx_ptr->desc_a.config |= DMAEN;
628
629 /* tx dma is running, just return */
630 if (bfin_read_DMA2_IRQ_STATUS() & 0x08)
631 goto out;
632
633 /* tx dma is not running */
634 bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr->desc_a));
635 /* dma enabled, read from memory, size is 6 */
636 bfin_write_DMA2_CONFIG(current_tx_ptr->desc_a.config);
637 /* Turn on the EMAC tx */
638 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
639
640out:
641 adjust_tx_list();
642 current_tx_ptr = current_tx_ptr->next;
643 dev->trans_start = jiffies;
09f75cd7
JG
644 dev->stats.tx_packets++;
645 dev->stats.tx_bytes += (skb->len);
e190d6b1
BW
646 return 0;
647}
648
649static void bf537mac_rx(struct net_device *dev)
650{
651 struct sk_buff *skb, *new_skb;
652 struct bf537mac_local *lp = netdev_priv(dev);
653 unsigned short len;
654
655 /* allocate a new skb for next time receive */
656 skb = current_rx_ptr->skb;
657 new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
658 if (!new_skb) {
659 printk(KERN_NOTICE DRV_NAME
660 ": rx: low on mem - packet dropped\n");
09f75cd7 661 dev->stats.rx_dropped++;
e190d6b1
BW
662 goto out;
663 }
664 /* reserve 2 bytes for RXDWA padding */
665 skb_reserve(new_skb, 2);
666 current_rx_ptr->skb = new_skb;
667 current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2;
668
669 len = (unsigned short)((current_rx_ptr->status.status_word) & RX_FRLEN);
670 skb_put(skb, len);
671 blackfin_dcache_invalidate_range((unsigned long)skb->head,
672 (unsigned long)skb->tail);
673
674 dev->last_rx = jiffies;
675 skb->dev = dev;
676 skb->protocol = eth_type_trans(skb, dev);
677#if defined(BFIN_MAC_CSUM_OFFLOAD)
678 skb->csum = current_rx_ptr->status.ip_payload_csum;
00ff49a9 679 skb->ip_summed = CHECKSUM_COMPLETE;
e190d6b1
BW
680#endif
681
682 netif_rx(skb);
09f75cd7
JG
683 dev->stats.rx_packets++;
684 dev->stats.rx_bytes += len;
e190d6b1
BW
685 current_rx_ptr->status.status_word = 0x00000000;
686 current_rx_ptr = current_rx_ptr->next;
687
688out:
689 return;
690}
691
692/* interrupt routine to handle rx and error signal */
693static irqreturn_t bf537mac_interrupt(int irq, void *dev_id)
694{
695 struct net_device *dev = dev_id;
696 int number = 0;
697
698get_one_packet:
699 if (current_rx_ptr->status.status_word == 0) {
700 /* no more new packet received */
701 if (number == 0) {
702 if (current_rx_ptr->next->status.status_word != 0) {
703 current_rx_ptr = current_rx_ptr->next;
704 goto real_rx;
705 }
706 }
707 bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
708 DMA_DONE | DMA_ERR);
709 return IRQ_HANDLED;
710 }
711
712real_rx:
713 bf537mac_rx(dev);
714 number++;
715 goto get_one_packet;
716}
717
718#ifdef CONFIG_NET_POLL_CONTROLLER
719static void bf537mac_poll(struct net_device *dev)
720{
721 disable_irq(IRQ_MAC_RX);
722 bf537mac_interrupt(IRQ_MAC_RX, dev);
723 enable_irq(IRQ_MAC_RX);
724}
725#endif /* CONFIG_NET_POLL_CONTROLLER */
726
496a34c2 727static void bf537mac_disable(void)
e190d6b1
BW
728{
729 unsigned int opmode;
730
731 opmode = bfin_read_EMAC_OPMODE();
732 opmode &= (~RE);
733 opmode &= (~TE);
734 /* Turn off the EMAC */
735 bfin_write_EMAC_OPMODE(opmode);
736}
737
738/*
739 * Enable Interrupts, Receive, and Transmit
740 */
4ae5a3ad 741static void bf537mac_enable(void)
e190d6b1
BW
742{
743 u32 opmode;
744
4ae5a3ad 745 pr_debug("%s: %s\n", DRV_NAME, __FUNCTION__);
e190d6b1
BW
746
747 /* Set RX DMA */
748 bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head->desc_a));
749 bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config);
750
751 /* Wait MII done */
4ae5a3ad 752 mdio_poll();
e190d6b1
BW
753
754 /* We enable only RX here */
755 /* ASTP : Enable Automatic Pad Stripping
756 PR : Promiscuous Mode for test
757 PSF : Receive frames with total length less than 64 bytes.
758 FDMODE : Full Duplex Mode
759 LB : Internal Loopback for test
760 RE : Receiver Enable */
761 opmode = bfin_read_EMAC_OPMODE();
762 if (opmode & FDMODE)
763 opmode |= PSF;
764 else
765 opmode |= DRO | DC | PSF;
766 opmode |= RE;
767
768#if defined(CONFIG_BFIN_MAC_RMII)
769 opmode |= RMII; /* For Now only 100MBit are supported */
770#ifdef CONFIG_BF_REV_0_2
771 opmode |= TE;
772#endif
773#endif
774 /* Turn on the EMAC rx */
775 bfin_write_EMAC_OPMODE(opmode);
e190d6b1
BW
776}
777
778/* Our watchdog timed out. Called by the networking layer */
779static void bf537mac_timeout(struct net_device *dev)
780{
781 pr_debug("%s: %s\n", dev->name, __FUNCTION__);
782
496a34c2 783 bf537mac_disable();
e190d6b1
BW
784
785 /* reset tx queue */
786 tx_list_tail = tx_list_head->next;
787
4ae5a3ad 788 bf537mac_enable();
e190d6b1
BW
789
790 /* We can accept TX packets again */
791 dev->trans_start = jiffies;
792 netif_wake_queue(dev);
793}
794
e190d6b1
BW
795/*
796 * This routine will, depending on the values passed to it,
797 * either make it accept multicast packets, go into
798 * promiscuous mode (for TCPDUMP and cousins) or accept
799 * a select set of multicast packets
800 */
801static void bf537mac_set_multicast_list(struct net_device *dev)
802{
803 u32 sysctl;
804
805 if (dev->flags & IFF_PROMISC) {
806 printk(KERN_INFO "%s: set to promisc mode\n", dev->name);
807 sysctl = bfin_read_EMAC_OPMODE();
808 sysctl |= RAF;
809 bfin_write_EMAC_OPMODE(sysctl);
810 } else if (dev->flags & IFF_ALLMULTI || dev->mc_count) {
811 /* accept all multicast */
812 sysctl = bfin_read_EMAC_OPMODE();
813 sysctl |= PAM;
814 bfin_write_EMAC_OPMODE(sysctl);
815 } else {
816 /* clear promisc or multicast mode */
817 sysctl = bfin_read_EMAC_OPMODE();
818 sysctl &= ~(RAF | PAM);
819 bfin_write_EMAC_OPMODE(sysctl);
820 }
821}
822
823/*
824 * this puts the device in an inactive state
825 */
826static void bf537mac_shutdown(struct net_device *dev)
827{
828 /* Turn off the EMAC */
829 bfin_write_EMAC_OPMODE(0x00000000);
830 /* Turn off the EMAC RX DMA */
831 bfin_write_DMA1_CONFIG(0x0000);
832 bfin_write_DMA2_CONFIG(0x0000);
833}
834
835/*
836 * Open and Initialize the interface
837 *
838 * Set up everything, reset the card, etc..
839 */
840static int bf537mac_open(struct net_device *dev)
841{
4ae5a3ad 842 struct bf537mac_local *lp = netdev_priv(dev);
4af4b840 843 int retval;
e190d6b1
BW
844 pr_debug("%s: %s\n", dev->name, __FUNCTION__);
845
846 /*
847 * Check that the address is valid. If its not, refuse
848 * to bring the device up. The user must specify an
849 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
850 */
851 if (!is_valid_ether_addr(dev->dev_addr)) {
852 printk(KERN_WARNING DRV_NAME ": no valid ethernet hw addr\n");
853 return -EINVAL;
854 }
855
856 /* initial rx and tx list */
4af4b840
MH
857 retval = desc_list_init();
858
859 if (retval)
860 return retval;
e190d6b1 861
4ae5a3ad 862 phy_start(lp->phydev);
e190d6b1 863 setup_system_regs(dev);
496a34c2 864 bf537mac_disable();
4ae5a3ad 865 bf537mac_enable();
e190d6b1
BW
866
867 pr_debug("hardware init finished\n");
868 netif_start_queue(dev);
869 netif_carrier_on(dev);
870
871 return 0;
872}
873
874/*
875 *
876 * this makes the board clean up everything that it can
877 * and not talk to the outside world. Caused by
878 * an 'ifconfig ethX down'
879 */
880static int bf537mac_close(struct net_device *dev)
881{
4ae5a3ad 882 struct bf537mac_local *lp = netdev_priv(dev);
e190d6b1
BW
883 pr_debug("%s: %s\n", dev->name, __FUNCTION__);
884
885 netif_stop_queue(dev);
886 netif_carrier_off(dev);
887
4ae5a3ad
BW
888 phy_stop(lp->phydev);
889
e190d6b1
BW
890 /* clear everything */
891 bf537mac_shutdown(dev);
892
893 /* free the rx/tx buffers */
894 desc_list_free();
895
896 return 0;
897}
898
899static int __init bf537mac_probe(struct net_device *dev)
900{
901 struct bf537mac_local *lp = netdev_priv(dev);
902 int retval;
4ae5a3ad 903 int i;
e190d6b1
BW
904
905 /* Grab the MAC address in the MAC */
906 *(__le32 *) (&(dev->dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
907 *(__le16 *) (&(dev->dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI());
908
909 /* probe mac */
910 /*todo: how to proble? which is revision_register */
911 bfin_write_EMAC_ADDRLO(0x12345678);
912 if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
913 pr_debug("can't detect bf537 mac!\n");
914 retval = -ENODEV;
915 goto err_out;
916 }
917
918 /* set the GPIO pins to Ethernet mode */
919 retval = setup_pin_mux(1);
e190d6b1
BW
920 if (retval)
921 return retval;
922
923 /*Is it valid? (Did bootloader initialize it?) */
924 if (!is_valid_ether_addr(dev->dev_addr)) {
925 /* Grab the MAC from the board somehow - this is done in the
926 arch/blackfin/mach-bf537/boards/eth_mac.c */
9862cc52 927 bfin_get_ether_addr(dev->dev_addr);
e190d6b1
BW
928 }
929
930 /* If still not valid, get a random one */
931 if (!is_valid_ether_addr(dev->dev_addr)) {
932 random_ether_addr(dev->dev_addr);
933 }
934
935 setup_mac_addr(dev->dev_addr);
936
4ae5a3ad
BW
937 /* MDIO bus initial */
938 lp->mii_bus.priv = dev;
939 lp->mii_bus.read = mdiobus_read;
940 lp->mii_bus.write = mdiobus_write;
941 lp->mii_bus.reset = mdiobus_reset;
942 lp->mii_bus.name = "bfin_mac_mdio";
943 lp->mii_bus.id = 0;
944 lp->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
945 for (i = 0; i < PHY_MAX_ADDR; ++i)
946 lp->mii_bus.irq[i] = PHY_POLL;
947
948 mdiobus_register(&lp->mii_bus);
949
950 retval = mii_probe(dev);
951 if (retval)
952 return retval;
953
e190d6b1
BW
954 /* Fill in the fields of the device structure with ethernet values. */
955 ether_setup(dev);
956
957 dev->open = bf537mac_open;
958 dev->stop = bf537mac_close;
959 dev->hard_start_xmit = bf537mac_hard_start_xmit;
73f83182 960 dev->set_mac_address = bf537mac_set_mac_address;
e190d6b1 961 dev->tx_timeout = bf537mac_timeout;
e190d6b1
BW
962 dev->set_multicast_list = bf537mac_set_multicast_list;
963#ifdef CONFIG_NET_POLL_CONTROLLER
964 dev->poll_controller = bf537mac_poll;
965#endif
966
e190d6b1
BW
967 spin_lock_init(&lp->lock);
968
969 /* now, enable interrupts */
970 /* register irq handler */
971 if (request_irq
972 (IRQ_MAC_RX, bf537mac_interrupt, IRQF_DISABLED | IRQF_SHARED,
973 "BFIN537_MAC_RX", dev)) {
974 printk(KERN_WARNING DRV_NAME
975 ": Unable to attach BlackFin MAC RX interrupt\n");
976 return -EBUSY;
977 }
978
e190d6b1
BW
979
980 retval = register_netdev(dev);
981 if (retval == 0) {
982 /* now, print out the card info, in a short format.. */
983 printk(KERN_INFO "%s: Version %s, %s\n",
984 DRV_NAME, DRV_VERSION, DRV_DESC);
985 }
986
987err_out:
988 return retval;
989}
990
991static int bfin_mac_probe(struct platform_device *pdev)
992{
993 struct net_device *ndev;
994
995 ndev = alloc_etherdev(sizeof(struct bf537mac_local));
996 if (!ndev) {
997 printk(KERN_WARNING DRV_NAME ": could not allocate device\n");
998 return -ENOMEM;
999 }
1000
e190d6b1
BW
1001 SET_NETDEV_DEV(ndev, &pdev->dev);
1002
1003 platform_set_drvdata(pdev, ndev);
1004
1005 if (bf537mac_probe(ndev) != 0) {
1006 platform_set_drvdata(pdev, NULL);
1007 free_netdev(ndev);
1008 printk(KERN_WARNING DRV_NAME ": not found\n");
1009 return -ENODEV;
1010 }
1011
1012 return 0;
1013}
1014
1015static int bfin_mac_remove(struct platform_device *pdev)
1016{
1017 struct net_device *ndev = platform_get_drvdata(pdev);
1018
1019 platform_set_drvdata(pdev, NULL);
1020
1021 unregister_netdev(ndev);
1022
1023 free_irq(IRQ_MAC_RX, ndev);
1024
1025 free_netdev(ndev);
1026
1027 setup_pin_mux(0);
1028
1029 return 0;
1030}
1031
496a34c2
BW
1032#ifdef CONFIG_PM
1033static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg)
e190d6b1 1034{
496a34c2
BW
1035 struct net_device *net_dev = platform_get_drvdata(pdev);
1036
1037 if (netif_running(net_dev))
1038 bf537mac_close(net_dev);
1039
e190d6b1
BW
1040 return 0;
1041}
1042
1043static int bfin_mac_resume(struct platform_device *pdev)
1044{
496a34c2
BW
1045 struct net_device *net_dev = platform_get_drvdata(pdev);
1046
1047 if (netif_running(net_dev))
1048 bf537mac_open(net_dev);
1049
e190d6b1
BW
1050 return 0;
1051}
496a34c2
BW
1052#else
1053#define bfin_mac_suspend NULL
1054#define bfin_mac_resume NULL
1055#endif /* CONFIG_PM */
e190d6b1
BW
1056
1057static struct platform_driver bfin_mac_driver = {
1058 .probe = bfin_mac_probe,
1059 .remove = bfin_mac_remove,
1060 .resume = bfin_mac_resume,
1061 .suspend = bfin_mac_suspend,
1062 .driver = {
1063 .name = DRV_NAME,
1064 },
1065};
1066
1067static int __init bfin_mac_init(void)
1068{
1069 return platform_driver_register(&bfin_mac_driver);
1070}
1071
1072module_init(bfin_mac_init);
1073
1074static void __exit bfin_mac_cleanup(void)
1075{
1076 platform_driver_unregister(&bfin_mac_driver);
1077}
1078
1079module_exit(bfin_mac_cleanup);
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