Commit | Line | Data |
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e190d6b1 BW |
1 | /* |
2 | * File: drivers/net/bfin_mac.c | |
3 | * Based on: | |
4 | * Maintainer: | |
5 | * Bryan Wu <bryan.wu@analog.com> | |
6 | * | |
7 | * Original author: | |
8 | * Luke Yang <luke.yang@analog.com> | |
9 | * | |
10 | * Created: | |
11 | * Description: | |
12 | * | |
13 | * Modified: | |
14 | * Copyright 2004-2006 Analog Devices Inc. | |
15 | * | |
16 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
17 | * | |
18 | * This program is free software ; you can redistribute it and/or modify | |
19 | * it under the terms of the GNU General Public License as published by | |
20 | * the Free Software Foundation ; either version 2, or (at your option) | |
21 | * any later version. | |
22 | * | |
23 | * This program is distributed in the hope that it will be useful, | |
24 | * but WITHOUT ANY WARRANTY ; without even the implied warranty of | |
25 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
26 | * GNU General Public License for more details. | |
27 | * | |
28 | * You should have received a copy of the GNU General Public License | |
29 | * along with this program ; see the file COPYING. | |
30 | * If not, write to the Free Software Foundation, | |
31 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
32 | */ | |
33 | ||
34 | #include <linux/init.h> | |
35 | #include <linux/module.h> | |
36 | #include <linux/kernel.h> | |
37 | #include <linux/sched.h> | |
38 | #include <linux/slab.h> | |
39 | #include <linux/delay.h> | |
40 | #include <linux/timer.h> | |
41 | #include <linux/errno.h> | |
42 | #include <linux/irq.h> | |
43 | #include <linux/io.h> | |
44 | #include <linux/ioport.h> | |
45 | #include <linux/crc32.h> | |
46 | #include <linux/device.h> | |
47 | #include <linux/spinlock.h> | |
48 | #include <linux/ethtool.h> | |
49 | #include <linux/mii.h> | |
4ae5a3ad | 50 | #include <linux/phy.h> |
e190d6b1 BW |
51 | #include <linux/netdevice.h> |
52 | #include <linux/etherdevice.h> | |
53 | #include <linux/skbuff.h> | |
e190d6b1 | 54 | #include <linux/platform_device.h> |
e190d6b1 BW |
55 | |
56 | #include <asm/dma.h> | |
57 | #include <linux/dma-mapping.h> | |
58 | ||
59 | #include <asm/blackfin.h> | |
60 | #include <asm/cacheflush.h> | |
61 | #include <asm/portmux.h> | |
62 | ||
63 | #include "bfin_mac.h" | |
64 | ||
65 | #define DRV_NAME "bfin_mac" | |
66 | #define DRV_VERSION "1.1" | |
67 | #define DRV_AUTHOR "Bryan Wu, Luke Yang" | |
68 | #define DRV_DESC "Blackfin BF53[67] on-chip Ethernet MAC driver" | |
69 | ||
70 | MODULE_AUTHOR(DRV_AUTHOR); | |
71 | MODULE_LICENSE("GPL"); | |
72 | MODULE_DESCRIPTION(DRV_DESC); | |
73 | ||
74 | #if defined(CONFIG_BFIN_MAC_USE_L1) | |
75 | # define bfin_mac_alloc(dma_handle, size) l1_data_sram_zalloc(size) | |
76 | # define bfin_mac_free(dma_handle, ptr) l1_data_sram_free(ptr) | |
77 | #else | |
78 | # define bfin_mac_alloc(dma_handle, size) \ | |
79 | dma_alloc_coherent(NULL, size, dma_handle, GFP_KERNEL) | |
80 | # define bfin_mac_free(dma_handle, ptr) \ | |
81 | dma_free_coherent(NULL, sizeof(*ptr), ptr, dma_handle) | |
82 | #endif | |
83 | ||
84 | #define PKT_BUF_SZ 1580 | |
85 | ||
86 | #define MAX_TIMEOUT_CNT 500 | |
87 | ||
88 | /* pointers to maintain transmit list */ | |
89 | static struct net_dma_desc_tx *tx_list_head; | |
90 | static struct net_dma_desc_tx *tx_list_tail; | |
91 | static struct net_dma_desc_rx *rx_list_head; | |
92 | static struct net_dma_desc_rx *rx_list_tail; | |
93 | static struct net_dma_desc_rx *current_rx_ptr; | |
94 | static struct net_dma_desc_tx *current_tx_ptr; | |
95 | static struct net_dma_desc_tx *tx_desc; | |
96 | static struct net_dma_desc_rx *rx_desc; | |
97 | ||
4ae5a3ad BW |
98 | static void bf537mac_disable(void); |
99 | static void bf537mac_enable(void); | |
100 | ||
e190d6b1 BW |
101 | static void desc_list_free(void) |
102 | { | |
103 | struct net_dma_desc_rx *r; | |
104 | struct net_dma_desc_tx *t; | |
105 | int i; | |
106 | #if !defined(CONFIG_BFIN_MAC_USE_L1) | |
107 | dma_addr_t dma_handle = 0; | |
108 | #endif | |
109 | ||
110 | if (tx_desc) { | |
111 | t = tx_list_head; | |
112 | for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) { | |
113 | if (t) { | |
114 | if (t->skb) { | |
115 | dev_kfree_skb(t->skb); | |
116 | t->skb = NULL; | |
117 | } | |
118 | t = t->next; | |
119 | } | |
120 | } | |
121 | bfin_mac_free(dma_handle, tx_desc); | |
122 | } | |
123 | ||
124 | if (rx_desc) { | |
125 | r = rx_list_head; | |
126 | for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) { | |
127 | if (r) { | |
128 | if (r->skb) { | |
129 | dev_kfree_skb(r->skb); | |
130 | r->skb = NULL; | |
131 | } | |
132 | r = r->next; | |
133 | } | |
134 | } | |
135 | bfin_mac_free(dma_handle, rx_desc); | |
136 | } | |
137 | } | |
138 | ||
139 | static int desc_list_init(void) | |
140 | { | |
141 | int i; | |
142 | struct sk_buff *new_skb; | |
143 | #if !defined(CONFIG_BFIN_MAC_USE_L1) | |
144 | /* | |
145 | * This dma_handle is useless in Blackfin dma_alloc_coherent(). | |
146 | * The real dma handler is the return value of dma_alloc_coherent(). | |
147 | */ | |
148 | dma_addr_t dma_handle; | |
149 | #endif | |
150 | ||
151 | tx_desc = bfin_mac_alloc(&dma_handle, | |
152 | sizeof(struct net_dma_desc_tx) * | |
153 | CONFIG_BFIN_TX_DESC_NUM); | |
154 | if (tx_desc == NULL) | |
155 | goto init_error; | |
156 | ||
157 | rx_desc = bfin_mac_alloc(&dma_handle, | |
158 | sizeof(struct net_dma_desc_rx) * | |
159 | CONFIG_BFIN_RX_DESC_NUM); | |
160 | if (rx_desc == NULL) | |
161 | goto init_error; | |
162 | ||
163 | /* init tx_list */ | |
164 | tx_list_head = tx_list_tail = tx_desc; | |
165 | ||
166 | for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) { | |
167 | struct net_dma_desc_tx *t = tx_desc + i; | |
168 | struct dma_descriptor *a = &(t->desc_a); | |
169 | struct dma_descriptor *b = &(t->desc_b); | |
170 | ||
171 | /* | |
172 | * disable DMA | |
173 | * read from memory WNR = 0 | |
174 | * wordsize is 32 bits | |
175 | * 6 half words is desc size | |
176 | * large desc flow | |
177 | */ | |
178 | a->config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE; | |
179 | a->start_addr = (unsigned long)t->packet; | |
180 | a->x_count = 0; | |
181 | a->next_dma_desc = b; | |
182 | ||
183 | /* | |
184 | * enabled DMA | |
185 | * write to memory WNR = 1 | |
186 | * wordsize is 32 bits | |
187 | * disable interrupt | |
188 | * 6 half words is desc size | |
189 | * large desc flow | |
190 | */ | |
191 | b->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE; | |
192 | b->start_addr = (unsigned long)(&(t->status)); | |
193 | b->x_count = 0; | |
194 | ||
195 | t->skb = NULL; | |
196 | tx_list_tail->desc_b.next_dma_desc = a; | |
197 | tx_list_tail->next = t; | |
198 | tx_list_tail = t; | |
199 | } | |
200 | tx_list_tail->next = tx_list_head; /* tx_list is a circle */ | |
201 | tx_list_tail->desc_b.next_dma_desc = &(tx_list_head->desc_a); | |
202 | current_tx_ptr = tx_list_head; | |
203 | ||
204 | /* init rx_list */ | |
205 | rx_list_head = rx_list_tail = rx_desc; | |
206 | ||
207 | for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) { | |
208 | struct net_dma_desc_rx *r = rx_desc + i; | |
209 | struct dma_descriptor *a = &(r->desc_a); | |
210 | struct dma_descriptor *b = &(r->desc_b); | |
211 | ||
212 | /* allocate a new skb for next time receive */ | |
213 | new_skb = dev_alloc_skb(PKT_BUF_SZ + 2); | |
214 | if (!new_skb) { | |
215 | printk(KERN_NOTICE DRV_NAME | |
216 | ": init: low on mem - packet dropped\n"); | |
217 | goto init_error; | |
218 | } | |
219 | skb_reserve(new_skb, 2); | |
220 | r->skb = new_skb; | |
221 | ||
222 | /* | |
223 | * enabled DMA | |
224 | * write to memory WNR = 1 | |
225 | * wordsize is 32 bits | |
226 | * disable interrupt | |
227 | * 6 half words is desc size | |
228 | * large desc flow | |
229 | */ | |
230 | a->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE; | |
231 | /* since RXDWA is enabled */ | |
232 | a->start_addr = (unsigned long)new_skb->data - 2; | |
233 | a->x_count = 0; | |
234 | a->next_dma_desc = b; | |
235 | ||
236 | /* | |
237 | * enabled DMA | |
238 | * write to memory WNR = 1 | |
239 | * wordsize is 32 bits | |
240 | * enable interrupt | |
241 | * 6 half words is desc size | |
242 | * large desc flow | |
243 | */ | |
244 | b->config = DMAEN | WNR | WDSIZE_32 | DI_EN | | |
245 | NDSIZE_6 | DMAFLOW_LARGE; | |
246 | b->start_addr = (unsigned long)(&(r->status)); | |
247 | b->x_count = 0; | |
248 | ||
249 | rx_list_tail->desc_b.next_dma_desc = a; | |
250 | rx_list_tail->next = r; | |
251 | rx_list_tail = r; | |
252 | } | |
253 | rx_list_tail->next = rx_list_head; /* rx_list is a circle */ | |
254 | rx_list_tail->desc_b.next_dma_desc = &(rx_list_head->desc_a); | |
255 | current_rx_ptr = rx_list_head; | |
256 | ||
257 | return 0; | |
258 | ||
259 | init_error: | |
260 | desc_list_free(); | |
261 | printk(KERN_ERR DRV_NAME ": kmalloc failed\n"); | |
262 | return -ENOMEM; | |
263 | } | |
264 | ||
265 | ||
266 | /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/ | |
267 | ||
268 | /* Set FER regs to MUX in Ethernet pins */ | |
269 | static int setup_pin_mux(int action) | |
270 | { | |
271 | #if defined(CONFIG_BFIN_MAC_RMII) | |
272 | u16 pin_req[] = P_RMII0; | |
273 | #else | |
274 | u16 pin_req[] = P_MII0; | |
275 | #endif | |
276 | ||
277 | if (action) { | |
278 | if (peripheral_request_list(pin_req, DRV_NAME)) { | |
279 | printk(KERN_ERR DRV_NAME | |
280 | ": Requesting Peripherals failed\n"); | |
281 | return -EFAULT; | |
282 | } | |
283 | } else | |
284 | peripheral_free_list(pin_req); | |
285 | ||
286 | return 0; | |
287 | } | |
288 | ||
4ae5a3ad BW |
289 | /* |
290 | * MII operations | |
291 | */ | |
e190d6b1 | 292 | /* Wait until the previous MDC/MDIO transaction has completed */ |
4ae5a3ad | 293 | static void mdio_poll(void) |
e190d6b1 BW |
294 | { |
295 | int timeout_cnt = MAX_TIMEOUT_CNT; | |
296 | ||
297 | /* poll the STABUSY bit */ | |
298 | while ((bfin_read_EMAC_STAADD()) & STABUSY) { | |
6db9e461 | 299 | udelay(1); |
e190d6b1 BW |
300 | if (timeout_cnt-- < 0) { |
301 | printk(KERN_ERR DRV_NAME | |
302 | ": wait MDC/MDIO transaction to complete timeout\n"); | |
303 | break; | |
304 | } | |
305 | } | |
306 | } | |
307 | ||
308 | /* Read an off-chip register in a PHY through the MDC/MDIO port */ | |
4ae5a3ad | 309 | static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum) |
e190d6b1 | 310 | { |
4ae5a3ad BW |
311 | mdio_poll(); |
312 | ||
e190d6b1 | 313 | /* read mode */ |
4ae5a3ad BW |
314 | bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) | |
315 | SET_REGAD((u16) regnum) | | |
e190d6b1 | 316 | STABUSY); |
e190d6b1 | 317 | |
4ae5a3ad BW |
318 | mdio_poll(); |
319 | ||
320 | return (int) bfin_read_EMAC_STADAT(); | |
e190d6b1 BW |
321 | } |
322 | ||
323 | /* Write an off-chip register in a PHY through the MDC/MDIO port */ | |
4ae5a3ad BW |
324 | static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum, |
325 | u16 value) | |
e190d6b1 | 326 | { |
4ae5a3ad BW |
327 | mdio_poll(); |
328 | ||
329 | bfin_write_EMAC_STADAT((u32) value); | |
e190d6b1 BW |
330 | |
331 | /* write mode */ | |
4ae5a3ad BW |
332 | bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) | |
333 | SET_REGAD((u16) regnum) | | |
e190d6b1 BW |
334 | STAOP | |
335 | STABUSY); | |
336 | ||
4ae5a3ad BW |
337 | mdio_poll(); |
338 | ||
339 | return 0; | |
e190d6b1 BW |
340 | } |
341 | ||
4ae5a3ad | 342 | static int mdiobus_reset(struct mii_bus *bus) |
e190d6b1 | 343 | { |
4ae5a3ad | 344 | return 0; |
e190d6b1 BW |
345 | } |
346 | ||
4ae5a3ad | 347 | static void bf537_adjust_link(struct net_device *dev) |
e190d6b1 | 348 | { |
e190d6b1 | 349 | struct bf537mac_local *lp = netdev_priv(dev); |
4ae5a3ad BW |
350 | struct phy_device *phydev = lp->phydev; |
351 | unsigned long flags; | |
352 | int new_state = 0; | |
353 | ||
354 | spin_lock_irqsave(&lp->lock, flags); | |
355 | if (phydev->link) { | |
356 | /* Now we make sure that we can be in full duplex mode. | |
357 | * If not, we operate in half-duplex mode. */ | |
358 | if (phydev->duplex != lp->old_duplex) { | |
359 | u32 opmode = bfin_read_EMAC_OPMODE(); | |
360 | new_state = 1; | |
361 | ||
362 | if (phydev->duplex) | |
363 | opmode |= FDMODE; | |
364 | else | |
365 | opmode &= ~(FDMODE); | |
366 | ||
367 | bfin_write_EMAC_OPMODE(opmode); | |
368 | lp->old_duplex = phydev->duplex; | |
369 | } | |
e190d6b1 | 370 | |
4ae5a3ad BW |
371 | if (phydev->speed != lp->old_speed) { |
372 | #if defined(CONFIG_BFIN_MAC_RMII) | |
373 | u32 opmode = bfin_read_EMAC_OPMODE(); | |
4ae5a3ad BW |
374 | switch (phydev->speed) { |
375 | case 10: | |
376 | opmode |= RMII_10; | |
377 | break; | |
378 | case 100: | |
379 | opmode &= ~(RMII_10); | |
380 | break; | |
381 | default: | |
382 | printk(KERN_WARNING | |
383 | "%s: Ack! Speed (%d) is not 10/100!\n", | |
384 | DRV_NAME, phydev->speed); | |
385 | break; | |
386 | } | |
387 | bfin_write_EMAC_OPMODE(opmode); | |
4ae5a3ad | 388 | #endif |
e190d6b1 | 389 | |
4ae5a3ad BW |
390 | new_state = 1; |
391 | lp->old_speed = phydev->speed; | |
392 | } | |
e190d6b1 | 393 | |
4ae5a3ad BW |
394 | if (!lp->old_link) { |
395 | new_state = 1; | |
396 | lp->old_link = 1; | |
397 | netif_schedule(dev); | |
398 | } | |
399 | } else if (lp->old_link) { | |
400 | new_state = 1; | |
401 | lp->old_link = 0; | |
402 | lp->old_speed = 0; | |
403 | lp->old_duplex = -1; | |
e190d6b1 BW |
404 | } |
405 | ||
4ae5a3ad BW |
406 | if (new_state) { |
407 | u32 opmode = bfin_read_EMAC_OPMODE(); | |
408 | phy_print_status(phydev); | |
409 | pr_debug("EMAC_OPMODE = 0x%08x\n", opmode); | |
e190d6b1 | 410 | } |
4ae5a3ad BW |
411 | |
412 | spin_unlock_irqrestore(&lp->lock, flags); | |
e190d6b1 BW |
413 | } |
414 | ||
7cc8f381 BW |
415 | /* MDC = 2.5 MHz */ |
416 | #define MDC_CLK 2500000 | |
417 | ||
4ae5a3ad | 418 | static int mii_probe(struct net_device *dev) |
e190d6b1 | 419 | { |
e190d6b1 | 420 | struct bf537mac_local *lp = netdev_priv(dev); |
4ae5a3ad BW |
421 | struct phy_device *phydev = NULL; |
422 | unsigned short sysctl; | |
423 | int i; | |
7cc8f381 | 424 | u32 sclk, mdc_div; |
e190d6b1 | 425 | |
4ae5a3ad | 426 | /* Enable PHY output early */ |
e190d6b1 BW |
427 | if (!(bfin_read_VR_CTL() & PHYCLKOE)) |
428 | bfin_write_VR_CTL(bfin_read_VR_CTL() | PHYCLKOE); | |
429 | ||
7cc8f381 BW |
430 | sclk = get_sclk(); |
431 | mdc_div = ((sclk / MDC_CLK) / 2) - 1; | |
432 | ||
4ae5a3ad | 433 | sysctl = bfin_read_EMAC_SYSCTL(); |
7cc8f381 | 434 | sysctl |= SET_MDCDIV(mdc_div); |
e190d6b1 | 435 | bfin_write_EMAC_SYSCTL(sysctl); |
e190d6b1 | 436 | |
4ae5a3ad BW |
437 | /* search for connect PHY device */ |
438 | for (i = 0; i < PHY_MAX_ADDR; i++) { | |
439 | struct phy_device *const tmp_phydev = lp->mii_bus.phy_map[i]; | |
e190d6b1 | 440 | |
4ae5a3ad BW |
441 | if (!tmp_phydev) |
442 | continue; /* no PHY here... */ | |
e190d6b1 | 443 | |
4ae5a3ad BW |
444 | phydev = tmp_phydev; |
445 | break; /* found it */ | |
446 | } | |
447 | ||
448 | /* now we are supposed to have a proper phydev, to attach to... */ | |
449 | if (!phydev) { | |
450 | printk(KERN_INFO "%s: Don't found any phy device at all\n", | |
451 | dev->name); | |
452 | return -ENODEV; | |
e190d6b1 BW |
453 | } |
454 | ||
455 | #if defined(CONFIG_BFIN_MAC_RMII) | |
4ae5a3ad BW |
456 | phydev = phy_connect(dev, phydev->dev.bus_id, &bf537_adjust_link, 0, |
457 | PHY_INTERFACE_MODE_RMII); | |
458 | #else | |
459 | phydev = phy_connect(dev, phydev->dev.bus_id, &bf537_adjust_link, 0, | |
460 | PHY_INTERFACE_MODE_MII); | |
e190d6b1 BW |
461 | #endif |
462 | ||
4ae5a3ad BW |
463 | if (IS_ERR(phydev)) { |
464 | printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); | |
465 | return PTR_ERR(phydev); | |
466 | } | |
467 | ||
468 | /* mask with MAC supported features */ | |
469 | phydev->supported &= (SUPPORTED_10baseT_Half | |
470 | | SUPPORTED_10baseT_Full | |
471 | | SUPPORTED_100baseT_Half | |
472 | | SUPPORTED_100baseT_Full | |
473 | | SUPPORTED_Autoneg | |
474 | | SUPPORTED_Pause | SUPPORTED_Asym_Pause | |
475 | | SUPPORTED_MII | |
476 | | SUPPORTED_TP); | |
477 | ||
478 | phydev->advertising = phydev->supported; | |
479 | ||
480 | lp->old_link = 0; | |
481 | lp->old_speed = 0; | |
482 | lp->old_duplex = -1; | |
483 | lp->phydev = phydev; | |
484 | ||
485 | printk(KERN_INFO "%s: attached PHY driver [%s] " | |
7cc8f381 BW |
486 | "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)" |
487 | "@sclk=%dMHz)\n", | |
488 | DRV_NAME, phydev->drv->name, phydev->dev.bus_id, phydev->irq, | |
489 | MDC_CLK, mdc_div, sclk/1000000); | |
4ae5a3ad BW |
490 | |
491 | return 0; | |
492 | } | |
493 | ||
494 | /**************************************************************************/ | |
495 | void setup_system_regs(struct net_device *dev) | |
496 | { | |
497 | unsigned short sysctl; | |
498 | ||
499 | /* | |
500 | * Odd word alignment for Receive Frame DMA word | |
501 | * Configure checksum support and rcve frame word alignment | |
502 | */ | |
503 | sysctl = bfin_read_EMAC_SYSCTL(); | |
504 | #if defined(BFIN_MAC_CSUM_OFFLOAD) | |
505 | sysctl |= RXDWA | RXCKS; | |
506 | #else | |
507 | sysctl |= RXDWA; | |
508 | #endif | |
509 | bfin_write_EMAC_SYSCTL(sysctl); | |
e190d6b1 BW |
510 | |
511 | bfin_write_EMAC_MMC_CTL(RSTC | CROLL); | |
512 | ||
513 | /* Initialize the TX DMA channel registers */ | |
514 | bfin_write_DMA2_X_COUNT(0); | |
515 | bfin_write_DMA2_X_MODIFY(4); | |
516 | bfin_write_DMA2_Y_COUNT(0); | |
517 | bfin_write_DMA2_Y_MODIFY(0); | |
518 | ||
519 | /* Initialize the RX DMA channel registers */ | |
520 | bfin_write_DMA1_X_COUNT(0); | |
521 | bfin_write_DMA1_X_MODIFY(4); | |
522 | bfin_write_DMA1_Y_COUNT(0); | |
523 | bfin_write_DMA1_Y_MODIFY(0); | |
524 | } | |
525 | ||
73f83182 | 526 | static void setup_mac_addr(u8 *mac_addr) |
e190d6b1 BW |
527 | { |
528 | u32 addr_low = le32_to_cpu(*(__le32 *) & mac_addr[0]); | |
529 | u16 addr_hi = le16_to_cpu(*(__le16 *) & mac_addr[4]); | |
530 | ||
531 | /* this depends on a little-endian machine */ | |
532 | bfin_write_EMAC_ADDRLO(addr_low); | |
533 | bfin_write_EMAC_ADDRHI(addr_hi); | |
534 | } | |
535 | ||
73f83182 AL |
536 | static int bf537mac_set_mac_address(struct net_device *dev, void *p) |
537 | { | |
538 | struct sockaddr *addr = p; | |
539 | if (netif_running(dev)) | |
540 | return -EBUSY; | |
541 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); | |
542 | setup_mac_addr(dev->dev_addr); | |
543 | return 0; | |
544 | } | |
545 | ||
e190d6b1 BW |
546 | static void adjust_tx_list(void) |
547 | { | |
548 | int timeout_cnt = MAX_TIMEOUT_CNT; | |
549 | ||
550 | if (tx_list_head->status.status_word != 0 | |
551 | && current_tx_ptr != tx_list_head) { | |
552 | goto adjust_head; /* released something, just return; */ | |
553 | } | |
554 | ||
555 | /* | |
556 | * if nothing released, check wait condition | |
557 | * current's next can not be the head, | |
558 | * otherwise the dma will not stop as we want | |
559 | */ | |
560 | if (current_tx_ptr->next->next == tx_list_head) { | |
561 | while (tx_list_head->status.status_word == 0) { | |
6db9e461 | 562 | mdelay(1); |
e190d6b1 BW |
563 | if (tx_list_head->status.status_word != 0 |
564 | || !(bfin_read_DMA2_IRQ_STATUS() & 0x08)) { | |
565 | goto adjust_head; | |
566 | } | |
567 | if (timeout_cnt-- < 0) { | |
568 | printk(KERN_ERR DRV_NAME | |
569 | ": wait for adjust tx list head timeout\n"); | |
570 | break; | |
571 | } | |
572 | } | |
573 | if (tx_list_head->status.status_word != 0) { | |
574 | goto adjust_head; | |
575 | } | |
576 | } | |
577 | ||
578 | return; | |
579 | ||
580 | adjust_head: | |
581 | do { | |
582 | tx_list_head->desc_a.config &= ~DMAEN; | |
583 | tx_list_head->status.status_word = 0; | |
584 | if (tx_list_head->skb) { | |
585 | dev_kfree_skb(tx_list_head->skb); | |
586 | tx_list_head->skb = NULL; | |
587 | } else { | |
588 | printk(KERN_ERR DRV_NAME | |
589 | ": no sk_buff in a transmitted frame!\n"); | |
590 | } | |
591 | tx_list_head = tx_list_head->next; | |
592 | } while (tx_list_head->status.status_word != 0 | |
593 | && current_tx_ptr != tx_list_head); | |
594 | return; | |
595 | ||
596 | } | |
597 | ||
598 | static int bf537mac_hard_start_xmit(struct sk_buff *skb, | |
599 | struct net_device *dev) | |
600 | { | |
601 | struct bf537mac_local *lp = netdev_priv(dev); | |
602 | unsigned int data; | |
603 | ||
604 | current_tx_ptr->skb = skb; | |
605 | ||
606 | /* | |
607 | * Is skb->data always 16-bit aligned? | |
608 | * Do we need to memcpy((char *)(tail->packet + 2), skb->data, len)? | |
609 | */ | |
610 | if ((((unsigned int)(skb->data)) & 0x02) == 2) { | |
611 | /* move skb->data to current_tx_ptr payload */ | |
612 | data = (unsigned int)(skb->data) - 2; | |
613 | *((unsigned short *)data) = (unsigned short)(skb->len); | |
614 | current_tx_ptr->desc_a.start_addr = (unsigned long)data; | |
615 | /* this is important! */ | |
616 | blackfin_dcache_flush_range(data, (data + (skb->len)) + 2); | |
617 | ||
618 | } else { | |
619 | *((unsigned short *)(current_tx_ptr->packet)) = | |
620 | (unsigned short)(skb->len); | |
621 | memcpy((char *)(current_tx_ptr->packet + 2), skb->data, | |
622 | (skb->len)); | |
623 | current_tx_ptr->desc_a.start_addr = | |
624 | (unsigned long)current_tx_ptr->packet; | |
625 | if (current_tx_ptr->status.status_word != 0) | |
626 | current_tx_ptr->status.status_word = 0; | |
627 | blackfin_dcache_flush_range((unsigned int)current_tx_ptr-> | |
628 | packet, | |
629 | (unsigned int)(current_tx_ptr-> | |
630 | packet + skb->len) + | |
631 | 2); | |
632 | } | |
633 | ||
634 | /* enable this packet's dma */ | |
635 | current_tx_ptr->desc_a.config |= DMAEN; | |
636 | ||
637 | /* tx dma is running, just return */ | |
638 | if (bfin_read_DMA2_IRQ_STATUS() & 0x08) | |
639 | goto out; | |
640 | ||
641 | /* tx dma is not running */ | |
642 | bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr->desc_a)); | |
643 | /* dma enabled, read from memory, size is 6 */ | |
644 | bfin_write_DMA2_CONFIG(current_tx_ptr->desc_a.config); | |
645 | /* Turn on the EMAC tx */ | |
646 | bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE); | |
647 | ||
648 | out: | |
649 | adjust_tx_list(); | |
650 | current_tx_ptr = current_tx_ptr->next; | |
651 | dev->trans_start = jiffies; | |
09f75cd7 JG |
652 | dev->stats.tx_packets++; |
653 | dev->stats.tx_bytes += (skb->len); | |
e190d6b1 BW |
654 | return 0; |
655 | } | |
656 | ||
657 | static void bf537mac_rx(struct net_device *dev) | |
658 | { | |
659 | struct sk_buff *skb, *new_skb; | |
660 | struct bf537mac_local *lp = netdev_priv(dev); | |
661 | unsigned short len; | |
662 | ||
663 | /* allocate a new skb for next time receive */ | |
664 | skb = current_rx_ptr->skb; | |
665 | new_skb = dev_alloc_skb(PKT_BUF_SZ + 2); | |
666 | if (!new_skb) { | |
667 | printk(KERN_NOTICE DRV_NAME | |
668 | ": rx: low on mem - packet dropped\n"); | |
09f75cd7 | 669 | dev->stats.rx_dropped++; |
e190d6b1 BW |
670 | goto out; |
671 | } | |
672 | /* reserve 2 bytes for RXDWA padding */ | |
673 | skb_reserve(new_skb, 2); | |
674 | current_rx_ptr->skb = new_skb; | |
675 | current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2; | |
676 | ||
677 | len = (unsigned short)((current_rx_ptr->status.status_word) & RX_FRLEN); | |
678 | skb_put(skb, len); | |
679 | blackfin_dcache_invalidate_range((unsigned long)skb->head, | |
680 | (unsigned long)skb->tail); | |
681 | ||
682 | dev->last_rx = jiffies; | |
683 | skb->dev = dev; | |
684 | skb->protocol = eth_type_trans(skb, dev); | |
685 | #if defined(BFIN_MAC_CSUM_OFFLOAD) | |
686 | skb->csum = current_rx_ptr->status.ip_payload_csum; | |
00ff49a9 | 687 | skb->ip_summed = CHECKSUM_COMPLETE; |
e190d6b1 BW |
688 | #endif |
689 | ||
690 | netif_rx(skb); | |
09f75cd7 JG |
691 | dev->stats.rx_packets++; |
692 | dev->stats.rx_bytes += len; | |
e190d6b1 BW |
693 | current_rx_ptr->status.status_word = 0x00000000; |
694 | current_rx_ptr = current_rx_ptr->next; | |
695 | ||
696 | out: | |
697 | return; | |
698 | } | |
699 | ||
700 | /* interrupt routine to handle rx and error signal */ | |
701 | static irqreturn_t bf537mac_interrupt(int irq, void *dev_id) | |
702 | { | |
703 | struct net_device *dev = dev_id; | |
704 | int number = 0; | |
705 | ||
706 | get_one_packet: | |
707 | if (current_rx_ptr->status.status_word == 0) { | |
708 | /* no more new packet received */ | |
709 | if (number == 0) { | |
710 | if (current_rx_ptr->next->status.status_word != 0) { | |
711 | current_rx_ptr = current_rx_ptr->next; | |
712 | goto real_rx; | |
713 | } | |
714 | } | |
715 | bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() | | |
716 | DMA_DONE | DMA_ERR); | |
717 | return IRQ_HANDLED; | |
718 | } | |
719 | ||
720 | real_rx: | |
721 | bf537mac_rx(dev); | |
722 | number++; | |
723 | goto get_one_packet; | |
724 | } | |
725 | ||
726 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
727 | static void bf537mac_poll(struct net_device *dev) | |
728 | { | |
729 | disable_irq(IRQ_MAC_RX); | |
730 | bf537mac_interrupt(IRQ_MAC_RX, dev); | |
731 | enable_irq(IRQ_MAC_RX); | |
732 | } | |
733 | #endif /* CONFIG_NET_POLL_CONTROLLER */ | |
734 | ||
496a34c2 | 735 | static void bf537mac_disable(void) |
e190d6b1 BW |
736 | { |
737 | unsigned int opmode; | |
738 | ||
739 | opmode = bfin_read_EMAC_OPMODE(); | |
740 | opmode &= (~RE); | |
741 | opmode &= (~TE); | |
742 | /* Turn off the EMAC */ | |
743 | bfin_write_EMAC_OPMODE(opmode); | |
744 | } | |
745 | ||
746 | /* | |
747 | * Enable Interrupts, Receive, and Transmit | |
748 | */ | |
4ae5a3ad | 749 | static void bf537mac_enable(void) |
e190d6b1 BW |
750 | { |
751 | u32 opmode; | |
752 | ||
4ae5a3ad | 753 | pr_debug("%s: %s\n", DRV_NAME, __FUNCTION__); |
e190d6b1 BW |
754 | |
755 | /* Set RX DMA */ | |
756 | bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head->desc_a)); | |
757 | bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config); | |
758 | ||
759 | /* Wait MII done */ | |
4ae5a3ad | 760 | mdio_poll(); |
e190d6b1 BW |
761 | |
762 | /* We enable only RX here */ | |
763 | /* ASTP : Enable Automatic Pad Stripping | |
764 | PR : Promiscuous Mode for test | |
765 | PSF : Receive frames with total length less than 64 bytes. | |
766 | FDMODE : Full Duplex Mode | |
767 | LB : Internal Loopback for test | |
768 | RE : Receiver Enable */ | |
769 | opmode = bfin_read_EMAC_OPMODE(); | |
770 | if (opmode & FDMODE) | |
771 | opmode |= PSF; | |
772 | else | |
773 | opmode |= DRO | DC | PSF; | |
774 | opmode |= RE; | |
775 | ||
776 | #if defined(CONFIG_BFIN_MAC_RMII) | |
777 | opmode |= RMII; /* For Now only 100MBit are supported */ | |
778 | #ifdef CONFIG_BF_REV_0_2 | |
779 | opmode |= TE; | |
780 | #endif | |
781 | #endif | |
782 | /* Turn on the EMAC rx */ | |
783 | bfin_write_EMAC_OPMODE(opmode); | |
e190d6b1 BW |
784 | } |
785 | ||
786 | /* Our watchdog timed out. Called by the networking layer */ | |
787 | static void bf537mac_timeout(struct net_device *dev) | |
788 | { | |
789 | pr_debug("%s: %s\n", dev->name, __FUNCTION__); | |
790 | ||
496a34c2 | 791 | bf537mac_disable(); |
e190d6b1 BW |
792 | |
793 | /* reset tx queue */ | |
794 | tx_list_tail = tx_list_head->next; | |
795 | ||
4ae5a3ad | 796 | bf537mac_enable(); |
e190d6b1 BW |
797 | |
798 | /* We can accept TX packets again */ | |
799 | dev->trans_start = jiffies; | |
800 | netif_wake_queue(dev); | |
801 | } | |
802 | ||
e190d6b1 BW |
803 | /* |
804 | * This routine will, depending on the values passed to it, | |
805 | * either make it accept multicast packets, go into | |
806 | * promiscuous mode (for TCPDUMP and cousins) or accept | |
807 | * a select set of multicast packets | |
808 | */ | |
809 | static void bf537mac_set_multicast_list(struct net_device *dev) | |
810 | { | |
811 | u32 sysctl; | |
812 | ||
813 | if (dev->flags & IFF_PROMISC) { | |
814 | printk(KERN_INFO "%s: set to promisc mode\n", dev->name); | |
815 | sysctl = bfin_read_EMAC_OPMODE(); | |
816 | sysctl |= RAF; | |
817 | bfin_write_EMAC_OPMODE(sysctl); | |
818 | } else if (dev->flags & IFF_ALLMULTI || dev->mc_count) { | |
819 | /* accept all multicast */ | |
820 | sysctl = bfin_read_EMAC_OPMODE(); | |
821 | sysctl |= PAM; | |
822 | bfin_write_EMAC_OPMODE(sysctl); | |
823 | } else { | |
824 | /* clear promisc or multicast mode */ | |
825 | sysctl = bfin_read_EMAC_OPMODE(); | |
826 | sysctl &= ~(RAF | PAM); | |
827 | bfin_write_EMAC_OPMODE(sysctl); | |
828 | } | |
829 | } | |
830 | ||
831 | /* | |
832 | * this puts the device in an inactive state | |
833 | */ | |
834 | static void bf537mac_shutdown(struct net_device *dev) | |
835 | { | |
836 | /* Turn off the EMAC */ | |
837 | bfin_write_EMAC_OPMODE(0x00000000); | |
838 | /* Turn off the EMAC RX DMA */ | |
839 | bfin_write_DMA1_CONFIG(0x0000); | |
840 | bfin_write_DMA2_CONFIG(0x0000); | |
841 | } | |
842 | ||
843 | /* | |
844 | * Open and Initialize the interface | |
845 | * | |
846 | * Set up everything, reset the card, etc.. | |
847 | */ | |
848 | static int bf537mac_open(struct net_device *dev) | |
849 | { | |
4ae5a3ad | 850 | struct bf537mac_local *lp = netdev_priv(dev); |
4af4b840 | 851 | int retval; |
e190d6b1 BW |
852 | pr_debug("%s: %s\n", dev->name, __FUNCTION__); |
853 | ||
854 | /* | |
855 | * Check that the address is valid. If its not, refuse | |
856 | * to bring the device up. The user must specify an | |
857 | * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx | |
858 | */ | |
859 | if (!is_valid_ether_addr(dev->dev_addr)) { | |
860 | printk(KERN_WARNING DRV_NAME ": no valid ethernet hw addr\n"); | |
861 | return -EINVAL; | |
862 | } | |
863 | ||
864 | /* initial rx and tx list */ | |
4af4b840 MH |
865 | retval = desc_list_init(); |
866 | ||
867 | if (retval) | |
868 | return retval; | |
e190d6b1 | 869 | |
4ae5a3ad | 870 | phy_start(lp->phydev); |
e190d6b1 | 871 | setup_system_regs(dev); |
496a34c2 | 872 | bf537mac_disable(); |
4ae5a3ad | 873 | bf537mac_enable(); |
e190d6b1 BW |
874 | |
875 | pr_debug("hardware init finished\n"); | |
876 | netif_start_queue(dev); | |
877 | netif_carrier_on(dev); | |
878 | ||
879 | return 0; | |
880 | } | |
881 | ||
882 | /* | |
883 | * | |
884 | * this makes the board clean up everything that it can | |
885 | * and not talk to the outside world. Caused by | |
886 | * an 'ifconfig ethX down' | |
887 | */ | |
888 | static int bf537mac_close(struct net_device *dev) | |
889 | { | |
4ae5a3ad | 890 | struct bf537mac_local *lp = netdev_priv(dev); |
e190d6b1 BW |
891 | pr_debug("%s: %s\n", dev->name, __FUNCTION__); |
892 | ||
893 | netif_stop_queue(dev); | |
894 | netif_carrier_off(dev); | |
895 | ||
4ae5a3ad BW |
896 | phy_stop(lp->phydev); |
897 | ||
e190d6b1 BW |
898 | /* clear everything */ |
899 | bf537mac_shutdown(dev); | |
900 | ||
901 | /* free the rx/tx buffers */ | |
902 | desc_list_free(); | |
903 | ||
904 | return 0; | |
905 | } | |
906 | ||
907 | static int __init bf537mac_probe(struct net_device *dev) | |
908 | { | |
909 | struct bf537mac_local *lp = netdev_priv(dev); | |
910 | int retval; | |
4ae5a3ad | 911 | int i; |
e190d6b1 BW |
912 | |
913 | /* Grab the MAC address in the MAC */ | |
914 | *(__le32 *) (&(dev->dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO()); | |
915 | *(__le16 *) (&(dev->dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI()); | |
916 | ||
917 | /* probe mac */ | |
918 | /*todo: how to proble? which is revision_register */ | |
919 | bfin_write_EMAC_ADDRLO(0x12345678); | |
920 | if (bfin_read_EMAC_ADDRLO() != 0x12345678) { | |
921 | pr_debug("can't detect bf537 mac!\n"); | |
922 | retval = -ENODEV; | |
923 | goto err_out; | |
924 | } | |
925 | ||
926 | /* set the GPIO pins to Ethernet mode */ | |
927 | retval = setup_pin_mux(1); | |
e190d6b1 BW |
928 | if (retval) |
929 | return retval; | |
930 | ||
931 | /*Is it valid? (Did bootloader initialize it?) */ | |
932 | if (!is_valid_ether_addr(dev->dev_addr)) { | |
933 | /* Grab the MAC from the board somehow - this is done in the | |
934 | arch/blackfin/mach-bf537/boards/eth_mac.c */ | |
9862cc52 | 935 | bfin_get_ether_addr(dev->dev_addr); |
e190d6b1 BW |
936 | } |
937 | ||
938 | /* If still not valid, get a random one */ | |
939 | if (!is_valid_ether_addr(dev->dev_addr)) { | |
940 | random_ether_addr(dev->dev_addr); | |
941 | } | |
942 | ||
943 | setup_mac_addr(dev->dev_addr); | |
944 | ||
4ae5a3ad BW |
945 | /* MDIO bus initial */ |
946 | lp->mii_bus.priv = dev; | |
947 | lp->mii_bus.read = mdiobus_read; | |
948 | lp->mii_bus.write = mdiobus_write; | |
949 | lp->mii_bus.reset = mdiobus_reset; | |
950 | lp->mii_bus.name = "bfin_mac_mdio"; | |
951 | lp->mii_bus.id = 0; | |
952 | lp->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL); | |
953 | for (i = 0; i < PHY_MAX_ADDR; ++i) | |
954 | lp->mii_bus.irq[i] = PHY_POLL; | |
955 | ||
956 | mdiobus_register(&lp->mii_bus); | |
957 | ||
958 | retval = mii_probe(dev); | |
959 | if (retval) | |
960 | return retval; | |
961 | ||
e190d6b1 BW |
962 | /* Fill in the fields of the device structure with ethernet values. */ |
963 | ether_setup(dev); | |
964 | ||
965 | dev->open = bf537mac_open; | |
966 | dev->stop = bf537mac_close; | |
967 | dev->hard_start_xmit = bf537mac_hard_start_xmit; | |
73f83182 | 968 | dev->set_mac_address = bf537mac_set_mac_address; |
e190d6b1 | 969 | dev->tx_timeout = bf537mac_timeout; |
e190d6b1 BW |
970 | dev->set_multicast_list = bf537mac_set_multicast_list; |
971 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
972 | dev->poll_controller = bf537mac_poll; | |
973 | #endif | |
974 | ||
e190d6b1 BW |
975 | spin_lock_init(&lp->lock); |
976 | ||
977 | /* now, enable interrupts */ | |
978 | /* register irq handler */ | |
979 | if (request_irq | |
980 | (IRQ_MAC_RX, bf537mac_interrupt, IRQF_DISABLED | IRQF_SHARED, | |
981 | "BFIN537_MAC_RX", dev)) { | |
982 | printk(KERN_WARNING DRV_NAME | |
983 | ": Unable to attach BlackFin MAC RX interrupt\n"); | |
984 | return -EBUSY; | |
985 | } | |
986 | ||
e190d6b1 BW |
987 | |
988 | retval = register_netdev(dev); | |
989 | if (retval == 0) { | |
990 | /* now, print out the card info, in a short format.. */ | |
991 | printk(KERN_INFO "%s: Version %s, %s\n", | |
992 | DRV_NAME, DRV_VERSION, DRV_DESC); | |
993 | } | |
994 | ||
995 | err_out: | |
996 | return retval; | |
997 | } | |
998 | ||
999 | static int bfin_mac_probe(struct platform_device *pdev) | |
1000 | { | |
1001 | struct net_device *ndev; | |
1002 | ||
1003 | ndev = alloc_etherdev(sizeof(struct bf537mac_local)); | |
1004 | if (!ndev) { | |
1005 | printk(KERN_WARNING DRV_NAME ": could not allocate device\n"); | |
1006 | return -ENOMEM; | |
1007 | } | |
1008 | ||
e190d6b1 BW |
1009 | SET_NETDEV_DEV(ndev, &pdev->dev); |
1010 | ||
1011 | platform_set_drvdata(pdev, ndev); | |
1012 | ||
1013 | if (bf537mac_probe(ndev) != 0) { | |
1014 | platform_set_drvdata(pdev, NULL); | |
1015 | free_netdev(ndev); | |
1016 | printk(KERN_WARNING DRV_NAME ": not found\n"); | |
1017 | return -ENODEV; | |
1018 | } | |
1019 | ||
1020 | return 0; | |
1021 | } | |
1022 | ||
1023 | static int bfin_mac_remove(struct platform_device *pdev) | |
1024 | { | |
1025 | struct net_device *ndev = platform_get_drvdata(pdev); | |
1026 | ||
1027 | platform_set_drvdata(pdev, NULL); | |
1028 | ||
1029 | unregister_netdev(ndev); | |
1030 | ||
1031 | free_irq(IRQ_MAC_RX, ndev); | |
1032 | ||
1033 | free_netdev(ndev); | |
1034 | ||
1035 | setup_pin_mux(0); | |
1036 | ||
1037 | return 0; | |
1038 | } | |
1039 | ||
496a34c2 BW |
1040 | #ifdef CONFIG_PM |
1041 | static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg) | |
e190d6b1 | 1042 | { |
496a34c2 BW |
1043 | struct net_device *net_dev = platform_get_drvdata(pdev); |
1044 | ||
1045 | if (netif_running(net_dev)) | |
1046 | bf537mac_close(net_dev); | |
1047 | ||
e190d6b1 BW |
1048 | return 0; |
1049 | } | |
1050 | ||
1051 | static int bfin_mac_resume(struct platform_device *pdev) | |
1052 | { | |
496a34c2 BW |
1053 | struct net_device *net_dev = platform_get_drvdata(pdev); |
1054 | ||
1055 | if (netif_running(net_dev)) | |
1056 | bf537mac_open(net_dev); | |
1057 | ||
e190d6b1 BW |
1058 | return 0; |
1059 | } | |
496a34c2 BW |
1060 | #else |
1061 | #define bfin_mac_suspend NULL | |
1062 | #define bfin_mac_resume NULL | |
1063 | #endif /* CONFIG_PM */ | |
e190d6b1 BW |
1064 | |
1065 | static struct platform_driver bfin_mac_driver = { | |
1066 | .probe = bfin_mac_probe, | |
1067 | .remove = bfin_mac_remove, | |
1068 | .resume = bfin_mac_resume, | |
1069 | .suspend = bfin_mac_suspend, | |
1070 | .driver = { | |
1071 | .name = DRV_NAME, | |
1072 | }, | |
1073 | }; | |
1074 | ||
1075 | static int __init bfin_mac_init(void) | |
1076 | { | |
1077 | return platform_driver_register(&bfin_mac_driver); | |
1078 | } | |
1079 | ||
1080 | module_init(bfin_mac_init); | |
1081 | ||
1082 | static void __exit bfin_mac_cleanup(void) | |
1083 | { | |
1084 | platform_driver_unregister(&bfin_mac_driver); | |
1085 | } | |
1086 | ||
1087 | module_exit(bfin_mac_cleanup); |