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bna: IOC Event Notification Enhancement
[deliverable/linux.git] / drivers / net / bna / bfa_ioc.c
CommitLineData
8b230ed8
RM		 1/*
2 * Linux network driver for Brocade Converged Network Adapter.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License (GPL) Version 2 as
6 * published by the Free Software Foundation
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 */
13/*
14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
15 * All rights reserved
16 * www.brocade.com
17 */
18
19#include "bfa_ioc.h"
20#include "cna.h"
21#include "bfi.h"
22#include "bfi_ctreg.h"
23#include "bfa_defs.h"
24
25/**
26 * IOC local definitions
27 */
28
8b230ed8
RM		 29/**
30 * Asic specific macros : see bfa_hw_cb.c and bfa_hw_ct.c for details.
31 */
32
33#define bfa_ioc_firmware_lock(__ioc) \
34 ((__ioc)->ioc_hwif->ioc_firmware_lock(__ioc))
35#define bfa_ioc_firmware_unlock(__ioc) \
36 ((__ioc)->ioc_hwif->ioc_firmware_unlock(__ioc))
37#define bfa_ioc_reg_init(__ioc) ((__ioc)->ioc_hwif->ioc_reg_init(__ioc))
38#define bfa_ioc_map_port(__ioc) ((__ioc)->ioc_hwif->ioc_map_port(__ioc))
1d32f769
RM		 39#define bfa_ioc_notify_fail(__ioc) \
40 ((__ioc)->ioc_hwif->ioc_notify_fail(__ioc))
79ea6c89
RM		 41#define bfa_ioc_sync_start(__ioc) \
42 ((__ioc)->ioc_hwif->ioc_sync_start(__ioc))
1d32f769
RM		 43#define bfa_ioc_sync_join(__ioc) \
44 ((__ioc)->ioc_hwif->ioc_sync_join(__ioc))
45#define bfa_ioc_sync_leave(__ioc) \
46 ((__ioc)->ioc_hwif->ioc_sync_leave(__ioc))
47#define bfa_ioc_sync_ack(__ioc) \
48 ((__ioc)->ioc_hwif->ioc_sync_ack(__ioc))
49#define bfa_ioc_sync_complete(__ioc) \
50 ((__ioc)->ioc_hwif->ioc_sync_complete(__ioc))
8b230ed8 51
8b230ed8
RM		 52#define bfa_ioc_mbox_cmd_pending(__ioc) \
53 (!list_empty(&((__ioc)->mbox_mod.cmd_q)) || \
54 readl((__ioc)->ioc_regs.hfn_mbox_cmd))
55
b7ee31c5 56static bool bfa_nw_auto_recover = true;
8b230ed8
RM		 57
58/*
59 * forward declarations
60 */
61static void bfa_ioc_hw_sem_get(struct bfa_ioc *ioc);
62static void bfa_ioc_hw_sem_get_cancel(struct bfa_ioc *ioc);
63static void bfa_ioc_hwinit(struct bfa_ioc *ioc, bool force);
64static void bfa_ioc_send_enable(struct bfa_ioc *ioc);
65static void bfa_ioc_send_disable(struct bfa_ioc *ioc);
66static void bfa_ioc_send_getattr(struct bfa_ioc *ioc);
67static void bfa_ioc_hb_monitor(struct bfa_ioc *ioc);
68static void bfa_ioc_hb_stop(struct bfa_ioc *ioc);
69static void bfa_ioc_reset(struct bfa_ioc *ioc, bool force);
70static void bfa_ioc_mbox_poll(struct bfa_ioc *ioc);
71static void bfa_ioc_mbox_hbfail(struct bfa_ioc *ioc);
72static void bfa_ioc_recover(struct bfa_ioc *ioc);
73static void bfa_ioc_check_attr_wwns(struct bfa_ioc *ioc);
bd5a92e9 74static void bfa_ioc_event_notify(struct bfa_ioc *, enum bfa_ioc_event);
8b230ed8
RM		 75static void bfa_ioc_disable_comp(struct bfa_ioc *ioc);
76static void bfa_ioc_lpu_stop(struct bfa_ioc *ioc);
1d32f769
RM		 77static void bfa_ioc_fail_notify(struct bfa_ioc *ioc);
78static void bfa_ioc_pf_enabled(struct bfa_ioc *ioc);
79static void bfa_ioc_pf_disabled(struct bfa_ioc *ioc);
80static void bfa_ioc_pf_initfailed(struct bfa_ioc *ioc);
81static void bfa_ioc_pf_failed(struct bfa_ioc *ioc);
82static void bfa_ioc_pf_fwmismatch(struct bfa_ioc *ioc);
8a891429
RM		 83static void bfa_ioc_boot(struct bfa_ioc *ioc, u32 boot_type,
84 u32 boot_param);
85static u32 bfa_ioc_smem_pgnum(struct bfa_ioc *ioc, u32 fmaddr);
8a891429
RM		 86static void bfa_ioc_get_adapter_serial_num(struct bfa_ioc *ioc,
87 char *serial_num);
88static void bfa_ioc_get_adapter_fw_ver(struct bfa_ioc *ioc,
89 char *fw_ver);
90static void bfa_ioc_get_pci_chip_rev(struct bfa_ioc *ioc,
91 char *chip_rev);
92static void bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc *ioc,
93 char *optrom_ver);
94static void bfa_ioc_get_adapter_manufacturer(struct bfa_ioc *ioc,
95 char *manufacturer);
96static void bfa_ioc_get_adapter_model(struct bfa_ioc *ioc, char *model);
97static u64 bfa_ioc_get_pwwn(struct bfa_ioc *ioc);
8b230ed8
RM		 98
99/**
1d32f769 100 * IOC state machine definitions/declarations
8b230ed8
RM		 101 */
102enum ioc_event {
1d32f769
RM		 103 IOC_E_RESET = 1, /*!< IOC reset request */
104 IOC_E_ENABLE = 2, /*!< IOC enable request */
105 IOC_E_DISABLE = 3, /*!< IOC disable request */
106 IOC_E_DETACH = 4, /*!< driver detach cleanup */
107 IOC_E_ENABLED = 5, /*!< f/w enabled */
108 IOC_E_FWRSP_GETATTR = 6, /*!< IOC get attribute response */
109 IOC_E_DISABLED = 7, /*!< f/w disabled */
110 IOC_E_INITFAILED = 8, /*!< failure notice by iocpf sm */
111 IOC_E_PFAILED = 9, /*!< failure notice by iocpf sm */
112 IOC_E_HBFAIL = 10, /*!< heartbeat failure */
113 IOC_E_HWERROR = 11, /*!< hardware error interrupt */
114 IOC_E_TIMEOUT = 12, /*!< timeout */
8b230ed8
RM		 115};
116
1d32f769 117bfa_fsm_state_decl(bfa_ioc, uninit, struct bfa_ioc, enum ioc_event);
8b230ed8 118bfa_fsm_state_decl(bfa_ioc, reset, struct bfa_ioc, enum ioc_event);
8b230ed8
RM		 119bfa_fsm_state_decl(bfa_ioc, enabling, struct bfa_ioc, enum ioc_event);
120bfa_fsm_state_decl(bfa_ioc, getattr, struct bfa_ioc, enum ioc_event);
121bfa_fsm_state_decl(bfa_ioc, op, struct bfa_ioc, enum ioc_event);
1d32f769
RM		 122bfa_fsm_state_decl(bfa_ioc, fail_retry, struct bfa_ioc, enum ioc_event);
123bfa_fsm_state_decl(bfa_ioc, fail, struct bfa_ioc, enum ioc_event);
8b230ed8
RM		 124bfa_fsm_state_decl(bfa_ioc, disabling, struct bfa_ioc, enum ioc_event);
125bfa_fsm_state_decl(bfa_ioc, disabled, struct bfa_ioc, enum ioc_event);
126
127static struct bfa_sm_table ioc_sm_table[] = {
1d32f769 128 {BFA_SM(bfa_ioc_sm_uninit), BFA_IOC_UNINIT},
8b230ed8 129 {BFA_SM(bfa_ioc_sm_reset), BFA_IOC_RESET},
1d32f769 130 {BFA_SM(bfa_ioc_sm_enabling), BFA_IOC_ENABLING},
8b230ed8
RM		 131 {BFA_SM(bfa_ioc_sm_getattr), BFA_IOC_GETATTR},
132 {BFA_SM(bfa_ioc_sm_op), BFA_IOC_OPERATIONAL},
1d32f769
RM		 133 {BFA_SM(bfa_ioc_sm_fail_retry), BFA_IOC_INITFAIL},
134 {BFA_SM(bfa_ioc_sm_fail), BFA_IOC_FAIL},
8b230ed8
RM		 135 {BFA_SM(bfa_ioc_sm_disabling), BFA_IOC_DISABLING},
136 {BFA_SM(bfa_ioc_sm_disabled), BFA_IOC_DISABLED},
137};
138
1d32f769
RM		 139/**
140 * IOCPF state machine definitions/declarations
141 */
142
143/*
144 * Forward declareations for iocpf state machine
145 */
146static void bfa_iocpf_enable(struct bfa_ioc *ioc);
147static void bfa_iocpf_disable(struct bfa_ioc *ioc);
148static void bfa_iocpf_fail(struct bfa_ioc *ioc);
149static void bfa_iocpf_initfail(struct bfa_ioc *ioc);
150static void bfa_iocpf_getattrfail(struct bfa_ioc *ioc);
151static void bfa_iocpf_stop(struct bfa_ioc *ioc);
152
153/**
154 * IOCPF state machine events
155 */
156enum iocpf_event {
157 IOCPF_E_ENABLE = 1, /*!< IOCPF enable request */
158 IOCPF_E_DISABLE = 2, /*!< IOCPF disable request */
159 IOCPF_E_STOP = 3, /*!< stop on driver detach */
0120b99c 160 IOCPF_E_FWREADY = 4, /*!< f/w initialization done */
1d32f769
RM		 161 IOCPF_E_FWRSP_ENABLE = 5, /*!< enable f/w response */
162 IOCPF_E_FWRSP_DISABLE = 6, /*!< disable f/w response */
163 IOCPF_E_FAIL = 7, /*!< failure notice by ioc sm */
164 IOCPF_E_INITFAIL = 8, /*!< init fail notice by ioc sm */
165 IOCPF_E_GETATTRFAIL = 9, /*!< init fail notice by ioc sm */
166 IOCPF_E_SEMLOCKED = 10, /*!< h/w semaphore is locked */
167 IOCPF_E_TIMEOUT = 11, /*!< f/w response timeout */
168};
169
170/**
171 * IOCPF states
172 */
173enum bfa_iocpf_state {
174 BFA_IOCPF_RESET = 1, /*!< IOC is in reset state */
175 BFA_IOCPF_SEMWAIT = 2, /*!< Waiting for IOC h/w semaphore */
176 BFA_IOCPF_HWINIT = 3, /*!< IOC h/w is being initialized */
177 BFA_IOCPF_READY = 4, /*!< IOCPF is initialized */
178 BFA_IOCPF_INITFAIL = 5, /*!< IOCPF failed */
179 BFA_IOCPF_FAIL = 6, /*!< IOCPF failed */
180 BFA_IOCPF_DISABLING = 7, /*!< IOCPF is being disabled */
181 BFA_IOCPF_DISABLED = 8, /*!< IOCPF is disabled */
182 BFA_IOCPF_FWMISMATCH = 9, /*!< IOC f/w different from drivers */
183};
184
185bfa_fsm_state_decl(bfa_iocpf, reset, struct bfa_iocpf, enum iocpf_event);
186bfa_fsm_state_decl(bfa_iocpf, fwcheck, struct bfa_iocpf, enum iocpf_event);
187bfa_fsm_state_decl(bfa_iocpf, mismatch, struct bfa_iocpf, enum iocpf_event);
188bfa_fsm_state_decl(bfa_iocpf, semwait, struct bfa_iocpf, enum iocpf_event);
189bfa_fsm_state_decl(bfa_iocpf, hwinit, struct bfa_iocpf, enum iocpf_event);
190bfa_fsm_state_decl(bfa_iocpf, enabling, struct bfa_iocpf, enum iocpf_event);
191bfa_fsm_state_decl(bfa_iocpf, ready, struct bfa_iocpf, enum iocpf_event);
192bfa_fsm_state_decl(bfa_iocpf, initfail_sync, struct bfa_iocpf,
193 enum iocpf_event);
194bfa_fsm_state_decl(bfa_iocpf, initfail, struct bfa_iocpf, enum iocpf_event);
195bfa_fsm_state_decl(bfa_iocpf, fail_sync, struct bfa_iocpf, enum iocpf_event);
196bfa_fsm_state_decl(bfa_iocpf, fail, struct bfa_iocpf, enum iocpf_event);
197bfa_fsm_state_decl(bfa_iocpf, disabling, struct bfa_iocpf, enum iocpf_event);
198bfa_fsm_state_decl(bfa_iocpf, disabling_sync, struct bfa_iocpf,
199 enum iocpf_event);
200bfa_fsm_state_decl(bfa_iocpf, disabled, struct bfa_iocpf, enum iocpf_event);
201
202static struct bfa_sm_table iocpf_sm_table[] = {
203 {BFA_SM(bfa_iocpf_sm_reset), BFA_IOCPF_RESET},
204 {BFA_SM(bfa_iocpf_sm_fwcheck), BFA_IOCPF_FWMISMATCH},
205 {BFA_SM(bfa_iocpf_sm_mismatch), BFA_IOCPF_FWMISMATCH},
206 {BFA_SM(bfa_iocpf_sm_semwait), BFA_IOCPF_SEMWAIT},
207 {BFA_SM(bfa_iocpf_sm_hwinit), BFA_IOCPF_HWINIT},
208 {BFA_SM(bfa_iocpf_sm_enabling), BFA_IOCPF_HWINIT},
209 {BFA_SM(bfa_iocpf_sm_ready), BFA_IOCPF_READY},
210 {BFA_SM(bfa_iocpf_sm_initfail_sync), BFA_IOCPF_INITFAIL},
211 {BFA_SM(bfa_iocpf_sm_initfail), BFA_IOCPF_INITFAIL},
212 {BFA_SM(bfa_iocpf_sm_fail_sync), BFA_IOCPF_FAIL},
213 {BFA_SM(bfa_iocpf_sm_fail), BFA_IOCPF_FAIL},
214 {BFA_SM(bfa_iocpf_sm_disabling), BFA_IOCPF_DISABLING},
215 {BFA_SM(bfa_iocpf_sm_disabling_sync), BFA_IOCPF_DISABLING},
216 {BFA_SM(bfa_iocpf_sm_disabled), BFA_IOCPF_DISABLED},
217};
218
219/**
220 * IOC State Machine
221 */
222
223/**
224 * Beginning state. IOC uninit state.
225 */
226static void
227bfa_ioc_sm_uninit_entry(struct bfa_ioc *ioc)
228{
229}
230
231/**
232 * IOC is in uninit state.
233 */
234static void
235bfa_ioc_sm_uninit(struct bfa_ioc *ioc, enum ioc_event event)
236{
237 switch (event) {
238 case IOC_E_RESET:
239 bfa_fsm_set_state(ioc, bfa_ioc_sm_reset);
240 break;
241
242 default:
243 bfa_sm_fault(ioc, event);
244 }
245}
246
8b230ed8
RM		 247/**
248 * Reset entry actions -- initialize state machine
249 */
250static void
251bfa_ioc_sm_reset_entry(struct bfa_ioc *ioc)
252{
1d32f769 253 bfa_fsm_set_state(&ioc->iocpf, bfa_iocpf_sm_reset);
8b230ed8
RM		 254}
255
256/**
1d32f769 257 * IOC is in reset state.
8b230ed8
RM		 258 */
259static void
260bfa_ioc_sm_reset(struct bfa_ioc *ioc, enum ioc_event event)
261{
262 switch (event) {
263 case IOC_E_ENABLE:
1d32f769 264 bfa_fsm_set_state(ioc, bfa_ioc_sm_enabling);
8b230ed8
RM		 265 break;
266
267 case IOC_E_DISABLE:
268 bfa_ioc_disable_comp(ioc);
269 break;
270
271 case IOC_E_DETACH:
1d32f769
RM		 272 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
273 break;
274
275 default:
276 bfa_sm_fault(ioc, event);
277 }
278}
279
280static void
281bfa_ioc_sm_enabling_entry(struct bfa_ioc *ioc)
282{
283 bfa_iocpf_enable(ioc);
284}
285
286/**
287 * Host IOC function is being enabled, awaiting response from firmware.
288 * Semaphore is acquired.
289 */
290static void
291bfa_ioc_sm_enabling(struct bfa_ioc *ioc, enum ioc_event event)
292{
293 switch (event) {
294 case IOC_E_ENABLED:
295 bfa_fsm_set_state(ioc, bfa_ioc_sm_getattr);
296 break;
297
298 case IOC_E_PFAILED:
299 /* !!! fall through !!! */
300 case IOC_E_HWERROR:
301 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
302 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail_retry);
303 if (event != IOC_E_PFAILED)
304 bfa_iocpf_initfail(ioc);
305 break;
306
307 case IOC_E_DISABLE:
308 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
309 break;
310
311 case IOC_E_DETACH:
312 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
313 bfa_iocpf_stop(ioc);
314 break;
315
316 case IOC_E_ENABLE:
8b230ed8
RM		 317 break;
318
319 default:
320 bfa_sm_fault(ioc, event);
321 }
322}
323
324/**
325 * Semaphore should be acquired for version check.
326 */
327static void
1d32f769
RM		 328bfa_ioc_sm_getattr_entry(struct bfa_ioc *ioc)
329{
330 mod_timer(&ioc->ioc_timer, jiffies +
331 msecs_to_jiffies(BFA_IOC_TOV));
332 bfa_ioc_send_getattr(ioc);
333}
334
335/**
336 * IOC configuration in progress. Timer is active.
337 */
338static void
339bfa_ioc_sm_getattr(struct bfa_ioc *ioc, enum ioc_event event)
340{
341 switch (event) {
342 case IOC_E_FWRSP_GETATTR:
343 del_timer(&ioc->ioc_timer);
344 bfa_ioc_check_attr_wwns(ioc);
345 bfa_fsm_set_state(ioc, bfa_ioc_sm_op);
346 break;
347
348 case IOC_E_PFAILED:
349 case IOC_E_HWERROR:
350 del_timer(&ioc->ioc_timer);
351 /* fall through */
352 case IOC_E_TIMEOUT:
353 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
354 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail_retry);
355 if (event != IOC_E_PFAILED)
356 bfa_iocpf_getattrfail(ioc);
357 break;
358
359 case IOC_E_DISABLE:
360 del_timer(&ioc->ioc_timer);
361 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
362 break;
363
364 case IOC_E_ENABLE:
365 break;
366
367 default:
368 bfa_sm_fault(ioc, event);
369 }
370}
371
372static void
373bfa_ioc_sm_op_entry(struct bfa_ioc *ioc)
374{
375 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_OK);
376 bfa_ioc_hb_monitor(ioc);
377}
378
379static void
380bfa_ioc_sm_op(struct bfa_ioc *ioc, enum ioc_event event)
381{
382 switch (event) {
383 case IOC_E_ENABLE:
384 break;
385
386 case IOC_E_DISABLE:
387 bfa_ioc_hb_stop(ioc);
388 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
389 break;
390
391 case IOC_E_PFAILED:
392 case IOC_E_HWERROR:
393 bfa_ioc_hb_stop(ioc);
394 /* !!! fall through !!! */
395 case IOC_E_HBFAIL:
396 bfa_ioc_fail_notify(ioc);
397 if (ioc->iocpf.auto_recover)
398 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail_retry);
399 else
400 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
401
402 if (event != IOC_E_PFAILED)
403 bfa_iocpf_fail(ioc);
404 break;
405
406 default:
407 bfa_sm_fault(ioc, event);
408 }
409}
410
411static void
412bfa_ioc_sm_disabling_entry(struct bfa_ioc *ioc)
413{
414 bfa_iocpf_disable(ioc);
415}
416
417/**
418 * IOC is being desabled
419 */
420static void
421bfa_ioc_sm_disabling(struct bfa_ioc *ioc, enum ioc_event event)
422{
423 switch (event) {
424 case IOC_E_DISABLED:
425 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabled);
426 break;
427
428 case IOC_E_HWERROR:
429 /*
430 * No state change. Will move to disabled state
431 * after iocpf sm completes failure processing and
432 * moves to disabled state.
433 */
434 bfa_iocpf_fail(ioc);
435 break;
436
437 default:
438 bfa_sm_fault(ioc, event);
439 }
440}
441
442/**
443 * IOC desable completion entry.
444 */
445static void
446bfa_ioc_sm_disabled_entry(struct bfa_ioc *ioc)
447{
448 bfa_ioc_disable_comp(ioc);
449}
450
451static void
452bfa_ioc_sm_disabled(struct bfa_ioc *ioc, enum ioc_event event)
453{
454 switch (event) {
455 case IOC_E_ENABLE:
456 bfa_fsm_set_state(ioc, bfa_ioc_sm_enabling);
457 break;
458
459 case IOC_E_DISABLE:
460 ioc->cbfn->disable_cbfn(ioc->bfa);
461 break;
462
463 case IOC_E_DETACH:
464 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
465 bfa_iocpf_stop(ioc);
466 break;
467
468 default:
469 bfa_sm_fault(ioc, event);
470 }
471}
472
473static void
474bfa_ioc_sm_fail_retry_entry(struct bfa_ioc *ioc)
475{
476}
477
478/**
479 * Hardware initialization retry.
480 */
481static void
482bfa_ioc_sm_fail_retry(struct bfa_ioc *ioc, enum ioc_event event)
483{
484 switch (event) {
485 case IOC_E_ENABLED:
486 bfa_fsm_set_state(ioc, bfa_ioc_sm_getattr);
487 break;
488
489 case IOC_E_PFAILED:
490 case IOC_E_HWERROR:
491 /**
492 * Initialization retry failed.
493 */
494 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
495 if (event != IOC_E_PFAILED)
496 bfa_iocpf_initfail(ioc);
497 break;
498
499 case IOC_E_INITFAILED:
500 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
501 break;
502
503 case IOC_E_ENABLE:
504 break;
505
506 case IOC_E_DISABLE:
507 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
508 break;
509
510 case IOC_E_DETACH:
511 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
512 bfa_iocpf_stop(ioc);
513 break;
514
515 default:
516 bfa_sm_fault(ioc, event);
517 }
518}
519
520static void
521bfa_ioc_sm_fail_entry(struct bfa_ioc *ioc)
8b230ed8 522{
1d32f769
RM		 523}
524
525/**
526 * IOC failure.
527 */
528static void
529bfa_ioc_sm_fail(struct bfa_ioc *ioc, enum ioc_event event)
530{
531 switch (event) {
532 case IOC_E_ENABLE:
533 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
534 break;
535
536 case IOC_E_DISABLE:
537 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
538 break;
539
540 case IOC_E_DETACH:
541 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
542 bfa_iocpf_stop(ioc);
543 break;
544
545 case IOC_E_HWERROR:
546 /* HB failure notification, ignore. */
547 break;
548
549 default:
550 bfa_sm_fault(ioc, event);
551 }
552}
553
554/**
555 * IOCPF State Machine
556 */
557
558/**
559 * Reset entry actions -- initialize state machine
560 */
561static void
562bfa_iocpf_sm_reset_entry(struct bfa_iocpf *iocpf)
563{
564 iocpf->retry_count = 0;
565 iocpf->auto_recover = bfa_nw_auto_recover;
566}
567
568/**
569 * Beginning state. IOC is in reset state.
570 */
571static void
572bfa_iocpf_sm_reset(struct bfa_iocpf *iocpf, enum iocpf_event event)
573{
574 switch (event) {
575 case IOCPF_E_ENABLE:
576 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fwcheck);
577 break;
578
579 case IOCPF_E_STOP:
580 break;
581
582 default:
583 bfa_sm_fault(iocpf->ioc, event);
584 }
585}
586
587/**
588 * Semaphore should be acquired for version check.
589 */
590static void
591bfa_iocpf_sm_fwcheck_entry(struct bfa_iocpf *iocpf)
592{
593 bfa_ioc_hw_sem_get(iocpf->ioc);
8b230ed8
RM		 594}
595
596/**
597 * Awaiting h/w semaphore to continue with version check.
598 */
599static void
1d32f769 600bfa_iocpf_sm_fwcheck(struct bfa_iocpf *iocpf, enum iocpf_event event)
8b230ed8 601{
1d32f769
RM		 602 struct bfa_ioc *ioc = iocpf->ioc;
603
8b230ed8 604 switch (event) {
1d32f769 605 case IOCPF_E_SEMLOCKED:
8b230ed8 606 if (bfa_ioc_firmware_lock(ioc)) {
79ea6c89 607 if (bfa_ioc_sync_start(ioc)) {
1d32f769
RM		 608 iocpf->retry_count = 0;
609 bfa_ioc_sync_join(ioc);
610 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
611 } else {
612 bfa_ioc_firmware_unlock(ioc);
613 bfa_nw_ioc_hw_sem_release(ioc);
614 mod_timer(&ioc->sem_timer, jiffies +
615 msecs_to_jiffies(BFA_IOC_HWSEM_TOV));
616 }
8b230ed8 617 } else {
8a891429 618 bfa_nw_ioc_hw_sem_release(ioc);
1d32f769 619 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_mismatch);
8b230ed8
RM		 620 }
621 break;
622
1d32f769 623 case IOCPF_E_DISABLE:
8b230ed8 624 bfa_ioc_hw_sem_get_cancel(ioc);
1d32f769
RM		 625 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
626 bfa_ioc_pf_disabled(ioc);
8b230ed8
RM		 627 break;
628
1d32f769
RM		 629 case IOCPF_E_STOP:
630 bfa_ioc_hw_sem_get_cancel(ioc);
631 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
8b230ed8
RM		 632 break;
633
634 default:
635 bfa_sm_fault(ioc, event);
636 }
637}
638
639/**
1d32f769 640 * Notify enable completion callback
8b230ed8
RM		 641 */
642static void
1d32f769 643bfa_iocpf_sm_mismatch_entry(struct bfa_iocpf *iocpf)
8b230ed8 644{
1d32f769
RM		 645 /* Call only the first time sm enters fwmismatch state. */
646 if (iocpf->retry_count == 0)
647 bfa_ioc_pf_fwmismatch(iocpf->ioc);
648
649 iocpf->retry_count++;
650 mod_timer(&(iocpf->ioc)->iocpf_timer, jiffies +
651 msecs_to_jiffies(BFA_IOC_TOV));
8b230ed8
RM		 652}
653
654/**
655 * Awaiting firmware version match.
656 */
657static void
1d32f769 658bfa_iocpf_sm_mismatch(struct bfa_iocpf *iocpf, enum iocpf_event event)
8b230ed8 659{
1d32f769
RM		 660 struct bfa_ioc *ioc = iocpf->ioc;
661
8b230ed8 662 switch (event) {
1d32f769
RM		 663 case IOCPF_E_TIMEOUT:
664 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fwcheck);
8b230ed8
RM		 665 break;
666
1d32f769
RM		 667 case IOCPF_E_DISABLE:
668 del_timer(&ioc->iocpf_timer);
669 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
670 bfa_ioc_pf_disabled(ioc);
8b230ed8
RM		 671 break;
672
1d32f769
RM		 673 case IOCPF_E_STOP:
674 del_timer(&ioc->iocpf_timer);
675 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
8b230ed8
RM		 676 break;
677
678 default:
679 bfa_sm_fault(ioc, event);
680 }
681}
682
683/**
684 * Request for semaphore.
685 */
686static void
1d32f769 687bfa_iocpf_sm_semwait_entry(struct bfa_iocpf *iocpf)
8b230ed8 688{
1d32f769 689 bfa_ioc_hw_sem_get(iocpf->ioc);
8b230ed8
RM		 690}
691
692/**
693 * Awaiting semaphore for h/w initialzation.
694 */
695static void
1d32f769 696bfa_iocpf_sm_semwait(struct bfa_iocpf *iocpf, enum iocpf_event event)
8b230ed8 697{
1d32f769
RM		 698 struct bfa_ioc *ioc = iocpf->ioc;
699
8b230ed8 700 switch (event) {
1d32f769
RM		 701 case IOCPF_E_SEMLOCKED:
702 if (bfa_ioc_sync_complete(ioc)) {
703 bfa_ioc_sync_join(ioc);
704 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
705 } else {
706 bfa_nw_ioc_hw_sem_release(ioc);
707 mod_timer(&ioc->sem_timer, jiffies +
708 msecs_to_jiffies(BFA_IOC_HWSEM_TOV));
709 }
8b230ed8
RM		 710 break;
711
1d32f769 712 case IOCPF_E_DISABLE:
8b230ed8 713 bfa_ioc_hw_sem_get_cancel(ioc);
1d32f769 714 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
8b230ed8
RM		 715 break;
716
717 default:
718 bfa_sm_fault(ioc, event);
719 }
720}
721
722static void
1d32f769 723bfa_iocpf_sm_hwinit_entry(struct bfa_iocpf *iocpf)
8b230ed8 724{
1d32f769
RM		 725 mod_timer(&(iocpf->ioc)->iocpf_timer, jiffies +
726 msecs_to_jiffies(BFA_IOC_TOV));
727 bfa_ioc_reset(iocpf->ioc, 0);
8b230ed8
RM		 728}
729
730/**
8b230ed8
RM		 731 * Hardware is being initialized. Interrupts are enabled.
732 * Holding hardware semaphore lock.
733 */
734static void
1d32f769 735bfa_iocpf_sm_hwinit(struct bfa_iocpf *iocpf, enum iocpf_event event)
8b230ed8 736{
1d32f769
RM		 737 struct bfa_ioc *ioc = iocpf->ioc;
738
8b230ed8 739 switch (event) {
1d32f769
RM		 740 case IOCPF_E_FWREADY:
741 del_timer(&ioc->iocpf_timer);
742 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_enabling);
8b230ed8
RM		 743 break;
744
1d32f769
RM		 745 case IOCPF_E_INITFAIL:
746 del_timer(&ioc->iocpf_timer);
747 /*
748 * !!! fall through !!!
749 */
8b230ed8 750
1d32f769 751 case IOCPF_E_TIMEOUT:
8a891429 752 bfa_nw_ioc_hw_sem_release(ioc);
1d32f769
RM		 753 if (event == IOCPF_E_TIMEOUT)
754 bfa_ioc_pf_failed(ioc);
755 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
8b230ed8
RM		 756 break;
757
1d32f769
RM		 758 case IOCPF_E_DISABLE:
759 del_timer(&ioc->iocpf_timer);
760 bfa_ioc_sync_leave(ioc);
8a891429 761 bfa_nw_ioc_hw_sem_release(ioc);
1d32f769 762 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
8b230ed8
RM		 763 break;
764
765 default:
766 bfa_sm_fault(ioc, event);
767 }
768}
769
770static void
1d32f769 771bfa_iocpf_sm_enabling_entry(struct bfa_iocpf *iocpf)
8b230ed8 772{
1d32f769
RM		 773 mod_timer(&(iocpf->ioc)->iocpf_timer, jiffies +
774 msecs_to_jiffies(BFA_IOC_TOV));
775 bfa_ioc_send_enable(iocpf->ioc);
8b230ed8
RM		 776}
777
778/**
779 * Host IOC function is being enabled, awaiting response from firmware.
780 * Semaphore is acquired.
781 */
782static void
1d32f769 783bfa_iocpf_sm_enabling(struct bfa_iocpf *iocpf, enum iocpf_event event)
8b230ed8 784{
1d32f769
RM		 785 struct bfa_ioc *ioc = iocpf->ioc;
786
8b230ed8 787 switch (event) {
1d32f769
RM		 788 case IOCPF_E_FWRSP_ENABLE:
789 del_timer(&ioc->iocpf_timer);
8a891429 790 bfa_nw_ioc_hw_sem_release(ioc);
1d32f769 791 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_ready);
8b230ed8
RM		 792 break;
793
1d32f769
RM		 794 case IOCPF_E_INITFAIL:
795 del_timer(&ioc->iocpf_timer);
796 /*
797 * !!! fall through !!!
798 */
799 case IOCPF_E_TIMEOUT:
8a891429 800 bfa_nw_ioc_hw_sem_release(ioc);
1d32f769
RM		 801 if (event == IOCPF_E_TIMEOUT)
802 bfa_ioc_pf_failed(ioc);
803 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
8b230ed8
RM		 804 break;
805
1d32f769
RM		 806 case IOCPF_E_DISABLE:
807 del_timer(&ioc->iocpf_timer);
8a891429 808 bfa_nw_ioc_hw_sem_release(ioc);
1d32f769 809 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling);
8b230ed8
RM		 810 break;
811
1d32f769 812 case IOCPF_E_FWREADY:
8b230ed8
RM		 813 bfa_ioc_send_enable(ioc);
814 break;
815
816 default:
817 bfa_sm_fault(ioc, event);
818 }
819}
820
1d32f769
RM		 821static bool
822bfa_nw_ioc_is_operational(struct bfa_ioc *ioc)
823{
824 return bfa_fsm_cmp_state(ioc, bfa_ioc_sm_op);
825}
826
8b230ed8 827static void
1d32f769 828bfa_iocpf_sm_ready_entry(struct bfa_iocpf *iocpf)
8b230ed8 829{
1d32f769 830 bfa_ioc_pf_enabled(iocpf->ioc);
8b230ed8
RM		 831}
832
8b230ed8 833static void
1d32f769 834bfa_iocpf_sm_ready(struct bfa_iocpf *iocpf, enum iocpf_event event)
8b230ed8 835{
1d32f769
RM		 836 struct bfa_ioc *ioc = iocpf->ioc;
837
8b230ed8 838 switch (event) {
1d32f769
RM		 839 case IOCPF_E_DISABLE:
840 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling);
8b230ed8
RM		 841 break;
842
1d32f769
RM		 843 case IOCPF_E_GETATTRFAIL:
844 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
845 break;
8b230ed8 846
1d32f769
RM		 847 case IOCPF_E_FAIL:
848 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail_sync);
8b230ed8
RM		 849 break;
850
1d32f769
RM		 851 case IOCPF_E_FWREADY:
852 bfa_ioc_pf_failed(ioc);
853 if (bfa_nw_ioc_is_operational(ioc))
854 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail_sync);
855 else
856 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
8b230ed8
RM		 857 break;
858
859 default:
860 bfa_sm_fault(ioc, event);
861 }
862}
863
864static void
1d32f769 865bfa_iocpf_sm_disabling_entry(struct bfa_iocpf *iocpf)
8b230ed8 866{
1d32f769
RM		 867 mod_timer(&(iocpf->ioc)->iocpf_timer, jiffies +
868 msecs_to_jiffies(BFA_IOC_TOV));
869 bfa_ioc_send_disable(iocpf->ioc);
8b230ed8
RM		 870}
871
1d32f769
RM		 872/**
873 * IOC is being disabled
874 */
8b230ed8 875static void
1d32f769 876bfa_iocpf_sm_disabling(struct bfa_iocpf *iocpf, enum iocpf_event event)
8b230ed8 877{
1d32f769 878 struct bfa_ioc *ioc = iocpf->ioc;
8b230ed8 879
1d32f769
RM		 880 switch (event) {
881 case IOCPF_E_FWRSP_DISABLE:
882 case IOCPF_E_FWREADY:
883 del_timer(&ioc->iocpf_timer);
884 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
8b230ed8
RM		 885 break;
886
1d32f769
RM		 887 case IOCPF_E_FAIL:
888 del_timer(&ioc->iocpf_timer);
889 /*
890 * !!! fall through !!!
8b230ed8 891 */
8b230ed8 892
1d32f769
RM		 893 case IOCPF_E_TIMEOUT:
894 writel(BFI_IOC_FAIL, ioc->ioc_regs.ioc_fwstate);
895 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
896 break;
897
898 case IOCPF_E_FWRSP_ENABLE:
8b230ed8
RM		 899 break;
900
901 default:
902 bfa_sm_fault(ioc, event);
903 }
904}
905
906static void
1d32f769 907bfa_iocpf_sm_disabling_sync_entry(struct bfa_iocpf *iocpf)
8b230ed8 908{
1d32f769 909 bfa_ioc_hw_sem_get(iocpf->ioc);
8b230ed8
RM		 910}
911
912/**
1d32f769 913 * IOC hb ack request is being removed.
8b230ed8
RM		 914 */
915static void
1d32f769 916bfa_iocpf_sm_disabling_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
8b230ed8 917{
1d32f769
RM		 918 struct bfa_ioc *ioc = iocpf->ioc;
919
8b230ed8 920 switch (event) {
1d32f769
RM		 921 case IOCPF_E_SEMLOCKED:
922 bfa_ioc_sync_leave(ioc);
923 bfa_nw_ioc_hw_sem_release(ioc);
924 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
8b230ed8
RM		 925 break;
926
1d32f769 927 case IOCPF_E_FAIL:
8b230ed8
RM		 928 break;
929
930 default:
931 bfa_sm_fault(ioc, event);
932 }
933}
934
935/**
936 * IOC disable completion entry.
937 */
938static void
1d32f769 939bfa_iocpf_sm_disabled_entry(struct bfa_iocpf *iocpf)
8b230ed8 940{
1d32f769 941 bfa_ioc_pf_disabled(iocpf->ioc);
8b230ed8
RM		 942}
943
944static void
1d32f769 945bfa_iocpf_sm_disabled(struct bfa_iocpf *iocpf, enum iocpf_event event)
8b230ed8 946{
1d32f769 947 struct bfa_ioc *ioc = iocpf->ioc;
8b230ed8 948
1d32f769
RM		 949 switch (event) {
950 case IOCPF_E_ENABLE:
951 iocpf->retry_count = 0;
952 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_semwait);
8b230ed8
RM		 953 break;
954
1d32f769 955 case IOCPF_E_STOP:
8b230ed8 956 bfa_ioc_firmware_unlock(ioc);
1d32f769 957 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
8b230ed8
RM		 958 break;
959
960 default:
961 bfa_sm_fault(ioc, event);
962 }
963}
964
965static void
1d32f769 966bfa_iocpf_sm_initfail_sync_entry(struct bfa_iocpf *iocpf)
8b230ed8 967{
1d32f769 968 bfa_ioc_hw_sem_get(iocpf->ioc);
8b230ed8
RM		 969}
970
971/**
8b230ed8
RM		 972 * Hardware initialization failed.
973 */
974static void
1d32f769 975bfa_iocpf_sm_initfail_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
8b230ed8 976{
1d32f769
RM		 977 struct bfa_ioc *ioc = iocpf->ioc;
978
8b230ed8 979 switch (event) {
1d32f769
RM		 980 case IOCPF_E_SEMLOCKED:
981 bfa_ioc_notify_fail(ioc);
982 bfa_ioc_sync_ack(ioc);
983 iocpf->retry_count++;
984 if (iocpf->retry_count >= BFA_IOC_HWINIT_MAX) {
985 bfa_ioc_sync_leave(ioc);
986 bfa_nw_ioc_hw_sem_release(ioc);
987 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail);
988 } else {
989 if (bfa_ioc_sync_complete(ioc))
990 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
991 else {
992 bfa_nw_ioc_hw_sem_release(ioc);
993 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_semwait);
994 }
995 }
8b230ed8
RM		 996 break;
997
1d32f769
RM		 998 case IOCPF_E_DISABLE:
999 bfa_ioc_hw_sem_get_cancel(ioc);
1000 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
1001 break;
1002
1003 case IOCPF_E_STOP:
1004 bfa_ioc_hw_sem_get_cancel(ioc);
8b230ed8 1005 bfa_ioc_firmware_unlock(ioc);
1d32f769 1006 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
8b230ed8
RM		 1007 break;
1008
1d32f769 1009 case IOCPF_E_FAIL:
8b230ed8
RM		 1010 break;
1011
1012 default:
1013 bfa_sm_fault(ioc, event);
1014 }
1015}
1016
1017static void
1d32f769 1018bfa_iocpf_sm_initfail_entry(struct bfa_iocpf *iocpf)
8b230ed8 1019{
1d32f769
RM		 1020 bfa_ioc_pf_initfailed(iocpf->ioc);
1021}
8b230ed8 1022
1d32f769
RM		 1023/**
1024 * Hardware initialization failed.
1025 */
1026static void
1027bfa_iocpf_sm_initfail(struct bfa_iocpf *iocpf, enum iocpf_event event)
1028{
1029 struct bfa_ioc *ioc = iocpf->ioc;
8b230ed8 1030
1d32f769
RM		 1031 switch (event) {
1032 case IOCPF_E_DISABLE:
1033 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
1034 break;
8b230ed8 1035
1d32f769
RM		 1036 case IOCPF_E_STOP:
1037 bfa_ioc_firmware_unlock(ioc);
1038 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
1039 break;
1040
1041 default:
1042 bfa_sm_fault(ioc, event);
8b230ed8 1043 }
1d32f769 1044}
8b230ed8 1045
1d32f769
RM		 1046static void
1047bfa_iocpf_sm_fail_sync_entry(struct bfa_iocpf *iocpf)
1048{
8b230ed8 1049 /**
1d32f769 1050 * Mark IOC as failed in hardware and stop firmware.
8b230ed8 1051 */
1d32f769 1052 bfa_ioc_lpu_stop(iocpf->ioc);
8b230ed8
RM		 1053
1054 /**
1d32f769 1055 * Flush any queued up mailbox requests.
8b230ed8 1056 */
1d32f769
RM		 1057 bfa_ioc_mbox_hbfail(iocpf->ioc);
1058 bfa_ioc_hw_sem_get(iocpf->ioc);
8b230ed8
RM		 1059}
1060
1061/**
1d32f769 1062 * IOC is in failed state.
8b230ed8
RM		 1063 */
1064static void
1d32f769 1065bfa_iocpf_sm_fail_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
8b230ed8 1066{
1d32f769 1067 struct bfa_ioc *ioc = iocpf->ioc;
8b230ed8 1068
1d32f769
RM		 1069 switch (event) {
1070 case IOCPF_E_SEMLOCKED:
1071 iocpf->retry_count = 0;
1072 bfa_ioc_sync_ack(ioc);
1073 bfa_ioc_notify_fail(ioc);
1074 if (!iocpf->auto_recover) {
1075 bfa_ioc_sync_leave(ioc);
1076 bfa_nw_ioc_hw_sem_release(ioc);
1077 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
1078 } else {
1079 if (bfa_ioc_sync_complete(ioc))
1080 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
1081 else {
1082 bfa_nw_ioc_hw_sem_release(ioc);
1083 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_semwait);
1084 }
1085 }
8b230ed8
RM		 1086 break;
1087
1d32f769
RM		 1088 case IOCPF_E_DISABLE:
1089 bfa_ioc_hw_sem_get_cancel(ioc);
1090 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
8b230ed8
RM		 1091 break;
1092
1d32f769 1093 case IOCPF_E_FAIL:
8b230ed8
RM		 1094 break;
1095
1d32f769
RM		 1096 default:
1097 bfa_sm_fault(ioc, event);
1098 }
1099}
8b230ed8 1100
1d32f769
RM		 1101static void
1102bfa_iocpf_sm_fail_entry(struct bfa_iocpf *iocpf)
1103{
1104}
1105
1106/**
1107 * @brief
1108 * IOC is in failed state.
1109 */
1110static void
1111bfa_iocpf_sm_fail(struct bfa_iocpf *iocpf, enum iocpf_event event)
1112{
1113 switch (event) {
1114 case IOCPF_E_DISABLE:
1115 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
8b230ed8 1116 break;
1d32f769 1117
8b230ed8 1118 default:
1d32f769 1119 bfa_sm_fault(iocpf->ioc, event);
8b230ed8
RM		 1120 }
1121}
1122
1123/**
1124 * BFA IOC private functions
1125 */
1126
bd5a92e9
RM		 1127/**
1128 * Notify common modules registered for notification.
1129 */
8b230ed8 1130static void
bd5a92e9 1131bfa_ioc_event_notify(struct bfa_ioc *ioc, enum bfa_ioc_event event)
8b230ed8 1132{
bd5a92e9 1133 struct bfa_ioc_notify *notify;
8b230ed8 1134 struct list_head *qe;
8b230ed8 1135
bd5a92e9
RM		 1136 list_for_each(qe, &ioc->notify_q) {
1137 notify = (struct bfa_ioc_notify *)qe;
1138 notify->cbfn(notify->cbarg, event);
8b230ed8
RM		 1139 }
1140}
1141
bd5a92e9
RM		 1142static void
1143bfa_ioc_disable_comp(struct bfa_ioc *ioc)
1144{
1145 ioc->cbfn->disable_cbfn(ioc->bfa);
1146 bfa_ioc_event_notify(ioc, BFA_IOC_E_DISABLED);
1147}
1148
8b230ed8 1149bool
8a891429 1150bfa_nw_ioc_sem_get(void __iomem *sem_reg)
8b230ed8
RM		 1151{
1152 u32 r32;
1153 int cnt = 0;
1154#define BFA_SEM_SPINCNT 3000
1155
1156 r32 = readl(sem_reg);
1157
1158 while (r32 && (cnt < BFA_SEM_SPINCNT)) {
1159 cnt++;
1160 udelay(2);
1161 r32 = readl(sem_reg);
1162 }
1163
1164 if (r32 == 0)
1165 return true;
1166
1167 BUG_ON(!(cnt < BFA_SEM_SPINCNT));
1168 return false;
1169}
1170
1171void
8a891429 1172bfa_nw_ioc_sem_release(void __iomem *sem_reg)
8b230ed8
RM		 1173{
1174 writel(1, sem_reg);
1175}
1176
1177static void
1178bfa_ioc_hw_sem_get(struct bfa_ioc *ioc)
1179{
1180 u32 r32;
1181
1182 /**
1183 * First read to the semaphore register will return 0, subsequent reads
1184 * will return 1. Semaphore is released by writing 1 to the register
1185 */
1186 r32 = readl(ioc->ioc_regs.ioc_sem_reg);
1187 if (r32 == 0) {
1d32f769 1188 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_SEMLOCKED);
8b230ed8
RM		 1189 return;
1190 }
1191
1192 mod_timer(&ioc->sem_timer, jiffies +
1193 msecs_to_jiffies(BFA_IOC_HWSEM_TOV));
1194}
1195
1196void
8a891429 1197bfa_nw_ioc_hw_sem_release(struct bfa_ioc *ioc)
8b230ed8
RM		 1198{
1199 writel(1, ioc->ioc_regs.ioc_sem_reg);
1200}
1201
1202static void
1203bfa_ioc_hw_sem_get_cancel(struct bfa_ioc *ioc)
1204{
1205 del_timer(&ioc->sem_timer);
1206}
1207
1208/**
1209 * @brief
1210 * Initialize LPU local memory (aka secondary memory / SRAM)
1211 */
1212static void
1213bfa_ioc_lmem_init(struct bfa_ioc *ioc)
1214{
1215 u32 pss_ctl;
1216 int i;
1217#define PSS_LMEM_INIT_TIME 10000
1218
1219 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1220 pss_ctl &= ~__PSS_LMEM_RESET;
1221 pss_ctl |= __PSS_LMEM_INIT_EN;
1222
1223 /*
1224 * i2c workaround 12.5khz clock
1225 */
1226 pss_ctl |= __PSS_I2C_CLK_DIV(3UL);
1227 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1228
1229 /**
1230 * wait for memory initialization to be complete
1231 */
1232 i = 0;
1233 do {
1234 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1235 i++;
1236 } while (!(pss_ctl & __PSS_LMEM_INIT_DONE) && (i < PSS_LMEM_INIT_TIME));
1237
1238 /**
1239 * If memory initialization is not successful, IOC timeout will catch
1240 * such failures.
1241 */
1242 BUG_ON(!(pss_ctl & __PSS_LMEM_INIT_DONE));
1243
1244 pss_ctl &= ~(__PSS_LMEM_INIT_DONE | __PSS_LMEM_INIT_EN);
1245 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1246}
1247
1248static void
1249bfa_ioc_lpu_start(struct bfa_ioc *ioc)
1250{
1251 u32 pss_ctl;
1252
1253 /**
1254 * Take processor out of reset.
1255 */
1256 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1257 pss_ctl &= ~__PSS_LPU0_RESET;
1258
1259 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1260}
1261
1262static void
1263bfa_ioc_lpu_stop(struct bfa_ioc *ioc)
1264{
1265 u32 pss_ctl;
1266
1267 /**
1268 * Put processors in reset.
1269 */
1270 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1271 pss_ctl |= (__PSS_LPU0_RESET | __PSS_LPU1_RESET);
1272
1273 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1274}
1275
1276/**
1277 * Get driver and firmware versions.
1278 */
1279void
8a891429 1280bfa_nw_ioc_fwver_get(struct bfa_ioc *ioc, struct bfi_ioc_image_hdr *fwhdr)
8b230ed8 1281{
58598542 1282 u32 pgnum;
8b230ed8
RM		 1283 u32 loff = 0;
1284 int i;
1285 u32 *fwsig = (u32 *) fwhdr;
1286
1287 pgnum = bfa_ioc_smem_pgnum(ioc, loff);
8b230ed8
RM		 1288 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
1289
1290 for (i = 0; i < (sizeof(struct bfi_ioc_image_hdr) / sizeof(u32));
1291 i++) {
1292 fwsig[i] =
1293 swab32(readl((loff) + (ioc->ioc_regs.smem_page_start)));
1294 loff += sizeof(u32);
1295 }
1296}
1297
1298/**
1299 * Returns TRUE if same.
1300 */
1301bool
8a891429 1302bfa_nw_ioc_fwver_cmp(struct bfa_ioc *ioc, struct bfi_ioc_image_hdr *fwhdr)
8b230ed8
RM		 1303{
1304 struct bfi_ioc_image_hdr *drv_fwhdr;
1305 int i;
1306
1307 drv_fwhdr = (struct bfi_ioc_image_hdr *)
1308 bfa_cb_image_get_chunk(BFA_IOC_FWIMG_TYPE(ioc), 0);
1309
1310 for (i = 0; i < BFI_IOC_MD5SUM_SZ; i++) {
1311 if (fwhdr->md5sum[i] != drv_fwhdr->md5sum[i])
1312 return false;
1313 }
1314
1315 return true;
1316}
1317
1318/**
1319 * Return true if current running version is valid. Firmware signature and
1320 * execution context (driver/bios) must match.
1321 */
1322static bool
79ea6c89 1323bfa_ioc_fwver_valid(struct bfa_ioc *ioc, u32 boot_env)
8b230ed8
RM		 1324{
1325 struct bfi_ioc_image_hdr fwhdr, *drv_fwhdr;
1326
8a891429 1327 bfa_nw_ioc_fwver_get(ioc, &fwhdr);
8b230ed8
RM		 1328 drv_fwhdr = (struct bfi_ioc_image_hdr *)
1329 bfa_cb_image_get_chunk(BFA_IOC_FWIMG_TYPE(ioc), 0);
1330
1331 if (fwhdr.signature != drv_fwhdr->signature)
1332 return false;
1333
79ea6c89 1334 if (swab32(fwhdr.param) != boot_env)
8b230ed8
RM		 1335 return false;
1336
8a891429 1337 return bfa_nw_ioc_fwver_cmp(ioc, &fwhdr);
8b230ed8
RM		 1338}
1339
1340/**
1341 * Conditionally flush any pending message from firmware at start.
1342 */
1343static void
1344bfa_ioc_msgflush(struct bfa_ioc *ioc)
1345{
1346 u32 r32;
1347
1348 r32 = readl(ioc->ioc_regs.lpu_mbox_cmd);
1349 if (r32)
1350 writel(1, ioc->ioc_regs.lpu_mbox_cmd);
1351}
1352
1353/**
1354 * @img ioc_init_logic.jpg
1355 */
1356static void
1357bfa_ioc_hwinit(struct bfa_ioc *ioc, bool force)
1358{
1359 enum bfi_ioc_state ioc_fwstate;
1360 bool fwvalid;
79ea6c89 1361 u32 boot_env;
8b230ed8
RM		 1362
1363 ioc_fwstate = readl(ioc->ioc_regs.ioc_fwstate);
1364
79ea6c89
RM		 1365 boot_env = BFI_BOOT_LOADER_OS;
1366
8b230ed8
RM		 1367 if (force)
1368 ioc_fwstate = BFI_IOC_UNINIT;
1369
1370 /**
1371 * check if firmware is valid
1372 */
1373 fwvalid = (ioc_fwstate == BFI_IOC_UNINIT) ?
79ea6c89 1374 false : bfa_ioc_fwver_valid(ioc, boot_env);
8b230ed8
RM		 1375
1376 if (!fwvalid) {
79ea6c89 1377 bfa_ioc_boot(ioc, BFI_BOOT_TYPE_NORMAL, boot_env);
8b230ed8
RM		 1378 return;
1379 }
1380
1381 /**
1382 * If hardware initialization is in progress (initialized by other IOC),
1383 * just wait for an initialization completion interrupt.
1384 */
1385 if (ioc_fwstate == BFI_IOC_INITING) {
1386 ioc->cbfn->reset_cbfn(ioc->bfa);
1387 return;
1388 }
1389
1390 /**
1391 * If IOC function is disabled and firmware version is same,
1392 * just re-enable IOC.
8b230ed8 1393 */
2c7d3821 1394 if (ioc_fwstate == BFI_IOC_DISABLED || ioc_fwstate == BFI_IOC_OP) {
8b230ed8
RM		 1395 /**
1396 * When using MSI-X any pending firmware ready event should
1397 * be flushed. Otherwise MSI-X interrupts are not delivered.
1398 */
1399 bfa_ioc_msgflush(ioc);
1400 ioc->cbfn->reset_cbfn(ioc->bfa);
1d32f769 1401 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FWREADY);
8b230ed8
RM		 1402 return;
1403 }
1404
1405 /**
1406 * Initialize the h/w for any other states.
1407 */
79ea6c89 1408 bfa_ioc_boot(ioc, BFI_BOOT_TYPE_NORMAL, boot_env);
8b230ed8
RM		 1409}
1410
1411void
8a891429 1412bfa_nw_ioc_timeout(void *ioc_arg)
8b230ed8
RM		 1413{
1414 struct bfa_ioc *ioc = (struct bfa_ioc *) ioc_arg;
1415
1416 bfa_fsm_send_event(ioc, IOC_E_TIMEOUT);
1417}
1418
8a891429 1419static void
8b230ed8
RM		 1420bfa_ioc_mbox_send(struct bfa_ioc *ioc, void *ioc_msg, int len)
1421{
1422 u32 *msgp = (u32 *) ioc_msg;
1423 u32 i;
1424
1425 BUG_ON(!(len <= BFI_IOC_MSGLEN_MAX));
1426
1427 /*
1428 * first write msg to mailbox registers
1429 */
1430 for (i = 0; i < len / sizeof(u32); i++)
1431 writel(cpu_to_le32(msgp[i]),
1432 ioc->ioc_regs.hfn_mbox + i * sizeof(u32));
1433
1434 for (; i < BFI_IOC_MSGLEN_MAX / sizeof(u32); i++)
1435 writel(0, ioc->ioc_regs.hfn_mbox + i * sizeof(u32));
1436
1437 /*
1438 * write 1 to mailbox CMD to trigger LPU event
1439 */
1440 writel(1, ioc->ioc_regs.hfn_mbox_cmd);
1441 (void) readl(ioc->ioc_regs.hfn_mbox_cmd);
1442}
1443
1444static void
1445bfa_ioc_send_enable(struct bfa_ioc *ioc)
1446{
1447 struct bfi_ioc_ctrl_req enable_req;
1448 struct timeval tv;
1449
1450 bfi_h2i_set(enable_req.mh, BFI_MC_IOC, BFI_IOC_H2I_ENABLE_REQ,
1451 bfa_ioc_portid(ioc));
1452 enable_req.ioc_class = ioc->ioc_mc;
1453 do_gettimeofday(&tv);
1454 enable_req.tv_sec = ntohl(tv.tv_sec);
1455 bfa_ioc_mbox_send(ioc, &enable_req, sizeof(struct bfi_ioc_ctrl_req));
1456}
1457
1458static void
1459bfa_ioc_send_disable(struct bfa_ioc *ioc)
1460{
1461 struct bfi_ioc_ctrl_req disable_req;
1462
1463 bfi_h2i_set(disable_req.mh, BFI_MC_IOC, BFI_IOC_H2I_DISABLE_REQ,
1464 bfa_ioc_portid(ioc));
1465 bfa_ioc_mbox_send(ioc, &disable_req, sizeof(struct bfi_ioc_ctrl_req));
1466}
1467
1468static void
1469bfa_ioc_send_getattr(struct bfa_ioc *ioc)
1470{
1471 struct bfi_ioc_getattr_req attr_req;
1472
1473 bfi_h2i_set(attr_req.mh, BFI_MC_IOC, BFI_IOC_H2I_GETATTR_REQ,
1474 bfa_ioc_portid(ioc));
1475 bfa_dma_be_addr_set(attr_req.attr_addr, ioc->attr_dma.pa);
1476 bfa_ioc_mbox_send(ioc, &attr_req, sizeof(attr_req));
1477}
1478
1479void
8a891429 1480bfa_nw_ioc_hb_check(void *cbarg)
8b230ed8
RM		 1481{
1482 struct bfa_ioc *ioc = cbarg;
1483 u32 hb_count;
1484
1485 hb_count = readl(ioc->ioc_regs.heartbeat);
1486 if (ioc->hb_count == hb_count) {
8b230ed8
RM		 1487 bfa_ioc_recover(ioc);
1488 return;
1489 } else {
1490 ioc->hb_count = hb_count;
1491 }
1492
1493 bfa_ioc_mbox_poll(ioc);
1494 mod_timer(&ioc->hb_timer, jiffies +
1495 msecs_to_jiffies(BFA_IOC_HB_TOV));
1496}
1497
1498static void
1499bfa_ioc_hb_monitor(struct bfa_ioc *ioc)
1500{
1501 ioc->hb_count = readl(ioc->ioc_regs.heartbeat);
1502 mod_timer(&ioc->hb_timer, jiffies +
1503 msecs_to_jiffies(BFA_IOC_HB_TOV));
1504}
1505
1506static void
1507bfa_ioc_hb_stop(struct bfa_ioc *ioc)
1508{
1509 del_timer(&ioc->hb_timer);
1510}
1511
1512/**
1513 * @brief
1514 * Initiate a full firmware download.
1515 */
1516static void
1517bfa_ioc_download_fw(struct bfa_ioc *ioc, u32 boot_type,
79ea6c89 1518 u32 boot_env)
8b230ed8
RM		 1519{
1520 u32 *fwimg;
58598542 1521 u32 pgnum;
8b230ed8
RM		 1522 u32 loff = 0;
1523 u32 chunkno = 0;
1524 u32 i;
1525
1526 /**
1527 * Initialize LMEM first before code download
1528 */
1529 bfa_ioc_lmem_init(ioc);
1530
8b230ed8
RM		 1531 fwimg = bfa_cb_image_get_chunk(BFA_IOC_FWIMG_TYPE(ioc), chunkno);
1532
1533 pgnum = bfa_ioc_smem_pgnum(ioc, loff);
8b230ed8
RM		 1534
1535 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
1536
1537 for (i = 0; i < bfa_cb_image_get_size(BFA_IOC_FWIMG_TYPE(ioc)); i++) {
1538 if (BFA_IOC_FLASH_CHUNK_NO(i) != chunkno) {
1539 chunkno = BFA_IOC_FLASH_CHUNK_NO(i);
1540 fwimg = bfa_cb_image_get_chunk(BFA_IOC_FWIMG_TYPE(ioc),
1541 BFA_IOC_FLASH_CHUNK_ADDR(chunkno));
1542 }
1543
1544 /**
1545 * write smem
1546 */
1547 writel((swab32(fwimg[BFA_IOC_FLASH_OFFSET_IN_CHUNK(i)])),
1548 ((ioc->ioc_regs.smem_page_start) + (loff)));
1549
1550 loff += sizeof(u32);
1551
1552 /**
1553 * handle page offset wrap around
1554 */
1555 loff = PSS_SMEM_PGOFF(loff);
1556 if (loff == 0) {
1557 pgnum++;
1558 writel(pgnum,
1559 ioc->ioc_regs.host_page_num_fn);
1560 }
1561 }
1562
1563 writel(bfa_ioc_smem_pgnum(ioc, 0),
1564 ioc->ioc_regs.host_page_num_fn);
1565
1566 /*
1567 * Set boot type and boot param at the end.
1568 */
79ea6c89 1569 writel(boot_type, ((ioc->ioc_regs.smem_page_start)
8b230ed8 1570 + (BFI_BOOT_TYPE_OFF)));
79ea6c89
RM		 1571 writel(boot_env, ((ioc->ioc_regs.smem_page_start)
1572 + (BFI_BOOT_LOADER_OFF)));
8b230ed8
RM		 1573}
1574
1575static void
1576bfa_ioc_reset(struct bfa_ioc *ioc, bool force)
1577{
1578 bfa_ioc_hwinit(ioc, force);
1579}
1580
1581/**
1582 * @brief
1583 * Update BFA configuration from firmware configuration.
1584 */
1585static void
1586bfa_ioc_getattr_reply(struct bfa_ioc *ioc)
1587{
1588 struct bfi_ioc_attr *attr = ioc->attr;
1589
1590 attr->adapter_prop = ntohl(attr->adapter_prop);
1591 attr->card_type = ntohl(attr->card_type);
1592 attr->maxfrsize = ntohs(attr->maxfrsize);
1593
1594 bfa_fsm_send_event(ioc, IOC_E_FWRSP_GETATTR);
1595}
1596
1597/**
1598 * Attach time initialization of mbox logic.
1599 */
1600static void
1601bfa_ioc_mbox_attach(struct bfa_ioc *ioc)
1602{
1603 struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
1604 int mc;
1605
1606 INIT_LIST_HEAD(&mod->cmd_q);
1607 for (mc = 0; mc < BFI_MC_MAX; mc++) {
1608 mod->mbhdlr[mc].cbfn = NULL;
1609 mod->mbhdlr[mc].cbarg = ioc->bfa;
1610 }
1611}
1612
1613/**
1614 * Mbox poll timer -- restarts any pending mailbox requests.
1615 */
1616static void
1617bfa_ioc_mbox_poll(struct bfa_ioc *ioc)
1618{
1619 struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
1620 struct bfa_mbox_cmd *cmd;
1621 u32 stat;
1622
1623 /**
1624 * If no command pending, do nothing
1625 */
1626 if (list_empty(&mod->cmd_q))
1627 return;
1628
1629 /**
1630 * If previous command is not yet fetched by firmware, do nothing
1631 */
1632 stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
1633 if (stat)
1634 return;
1635
1636 /**
1637 * Enqueue command to firmware.
1638 */
1639 bfa_q_deq(&mod->cmd_q, &cmd);
1640 bfa_ioc_mbox_send(ioc, cmd->msg, sizeof(cmd->msg));
1641}
1642
1643/**
1644 * Cleanup any pending requests.
1645 */
1646static void
1647bfa_ioc_mbox_hbfail(struct bfa_ioc *ioc)
1648{
1649 struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
1650 struct bfa_mbox_cmd *cmd;
1651
1652 while (!list_empty(&mod->cmd_q))
1653 bfa_q_deq(&mod->cmd_q, &cmd);
1654}
1655
1d32f769
RM		 1656static void
1657bfa_ioc_fail_notify(struct bfa_ioc *ioc)
1658{
1d32f769
RM		 1659 /**
1660 * Notify driver and common modules registered for notification.
1661 */
1662 ioc->cbfn->hbfail_cbfn(ioc->bfa);
bd5a92e9 1663 bfa_ioc_event_notify(ioc, BFA_IOC_E_FAILED);
1d32f769
RM		 1664}
1665
1666static void
1667bfa_ioc_pf_enabled(struct bfa_ioc *ioc)
1668{
1669 bfa_fsm_send_event(ioc, IOC_E_ENABLED);
1670}
1671
1672static void
1673bfa_ioc_pf_disabled(struct bfa_ioc *ioc)
1674{
1675 bfa_fsm_send_event(ioc, IOC_E_DISABLED);
1676}
1677
1678static void
1679bfa_ioc_pf_initfailed(struct bfa_ioc *ioc)
1680{
1681 bfa_fsm_send_event(ioc, IOC_E_INITFAILED);
1682}
1683
1684static void
1685bfa_ioc_pf_failed(struct bfa_ioc *ioc)
1686{
1687 bfa_fsm_send_event(ioc, IOC_E_PFAILED);
1688}
1689
1690static void
1691bfa_ioc_pf_fwmismatch(struct bfa_ioc *ioc)
1692{
1693 /**
1694 * Provide enable completion callback and AEN notification.
1695 */
1696 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
1697}
1698
8b230ed8
RM		 1699/**
1700 * IOC public
1701 */
8a891429 1702static enum bfa_status
8b230ed8
RM		 1703bfa_ioc_pll_init(struct bfa_ioc *ioc)
1704{
1705 /*
1706 * Hold semaphore so that nobody can access the chip during init.
1707 */
8a891429 1708 bfa_nw_ioc_sem_get(ioc->ioc_regs.ioc_init_sem_reg);
8b230ed8
RM		 1709
1710 bfa_ioc_pll_init_asic(ioc);
1711
1712 ioc->pllinit = true;
1713 /*
1714 * release semaphore.
1715 */
8a891429 1716 bfa_nw_ioc_sem_release(ioc->ioc_regs.ioc_init_sem_reg);
8b230ed8
RM		 1717
1718 return BFA_STATUS_OK;
1719}
1720
1721/**
1722 * Interface used by diag module to do firmware boot with memory test
1723 * as the entry vector.
1724 */
8a891429 1725static void
79ea6c89 1726bfa_ioc_boot(struct bfa_ioc *ioc, u32 boot_type, u32 boot_env)
8b230ed8
RM		 1727{
1728 void __iomem *rb;
1729
1730 bfa_ioc_stats(ioc, ioc_boots);
1731
1732 if (bfa_ioc_pll_init(ioc) != BFA_STATUS_OK)
1733 return;
1734
1735 /**
1736 * Initialize IOC state of all functions on a chip reset.
1737 */
1738 rb = ioc->pcidev.pci_bar_kva;
79ea6c89 1739 if (boot_type == BFI_BOOT_TYPE_MEMTEST) {
8b230ed8
RM		 1740 writel(BFI_IOC_MEMTEST, (rb + BFA_IOC0_STATE_REG));
1741 writel(BFI_IOC_MEMTEST, (rb + BFA_IOC1_STATE_REG));
1742 } else {
1743 writel(BFI_IOC_INITING, (rb + BFA_IOC0_STATE_REG));
1744 writel(BFI_IOC_INITING, (rb + BFA_IOC1_STATE_REG));
1745 }
1746
1747 bfa_ioc_msgflush(ioc);
79ea6c89 1748 bfa_ioc_download_fw(ioc, boot_type, boot_env);
8b230ed8
RM		 1749
1750 /**
1751 * Enable interrupts just before starting LPU
1752 */
1753 ioc->cbfn->reset_cbfn(ioc->bfa);
1754 bfa_ioc_lpu_start(ioc);
1755}
1756
1757/**
1758 * Enable/disable IOC failure auto recovery.
1759 */
1760void
8a891429 1761bfa_nw_ioc_auto_recover(bool auto_recover)
8b230ed8 1762{
8a891429 1763 bfa_nw_auto_recover = auto_recover;
8b230ed8
RM		 1764}
1765
8a891429 1766static void
8b230ed8
RM		 1767bfa_ioc_msgget(struct bfa_ioc *ioc, void *mbmsg)
1768{
1769 u32 *msgp = mbmsg;
1770 u32 r32;
1771 int i;
1772
1773 /**
1774 * read the MBOX msg
1775 */
1776 for (i = 0; i < (sizeof(union bfi_ioc_i2h_msg_u) / sizeof(u32));
1777 i++) {
1778 r32 = readl(ioc->ioc_regs.lpu_mbox +
1779 i * sizeof(u32));
1780 msgp[i] = htonl(r32);
1781 }
1782
1783 /**
1784 * turn off mailbox interrupt by clearing mailbox status
1785 */
1786 writel(1, ioc->ioc_regs.lpu_mbox_cmd);
1787 readl(ioc->ioc_regs.lpu_mbox_cmd);
1788}
1789
8a891429 1790static void
8b230ed8
RM		 1791bfa_ioc_isr(struct bfa_ioc *ioc, struct bfi_mbmsg *m)
1792{
1793 union bfi_ioc_i2h_msg_u *msg;
1d32f769 1794 struct bfa_iocpf *iocpf = &ioc->iocpf;
8b230ed8
RM		 1795
1796 msg = (union bfi_ioc_i2h_msg_u *) m;
1797
1798 bfa_ioc_stats(ioc, ioc_isrs);
1799
1800 switch (msg->mh.msg_id) {
1801 case BFI_IOC_I2H_HBEAT:
1802 break;
1803
1804 case BFI_IOC_I2H_READY_EVENT:
1d32f769 1805 bfa_fsm_send_event(iocpf, IOCPF_E_FWREADY);
8b230ed8
RM		 1806 break;
1807
1808 case BFI_IOC_I2H_ENABLE_REPLY:
1d32f769 1809 bfa_fsm_send_event(iocpf, IOCPF_E_FWRSP_ENABLE);
8b230ed8
RM		 1810 break;
1811
1812 case BFI_IOC_I2H_DISABLE_REPLY:
1d32f769 1813 bfa_fsm_send_event(iocpf, IOCPF_E_FWRSP_DISABLE);
8b230ed8
RM		 1814 break;
1815
1816 case BFI_IOC_I2H_GETATTR_REPLY:
1817 bfa_ioc_getattr_reply(ioc);
1818 break;
1819
1820 default:
1821 BUG_ON(1);
1822 }
1823}
1824
1825/**
1826 * IOC attach time initialization and setup.
1827 *
1828 * @param[in] ioc memory for IOC
1829 * @param[in] bfa driver instance structure
1830 */
1831void
8a891429 1832bfa_nw_ioc_attach(struct bfa_ioc *ioc, void *bfa, struct bfa_ioc_cbfn *cbfn)
8b230ed8
RM		 1833{
1834 ioc->bfa = bfa;
1835 ioc->cbfn = cbfn;
1836 ioc->fcmode = false;
1837 ioc->pllinit = false;
1838 ioc->dbg_fwsave_once = true;
1d32f769 1839 ioc->iocpf.ioc = ioc;
8b230ed8
RM		 1840
1841 bfa_ioc_mbox_attach(ioc);
bd5a92e9 1842 INIT_LIST_HEAD(&ioc->notify_q);
8b230ed8 1843
1d32f769
RM		 1844 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
1845 bfa_fsm_send_event(ioc, IOC_E_RESET);
8b230ed8
RM		 1846}
1847
1848/**
1849 * Driver detach time IOC cleanup.
1850 */
1851void
8a891429 1852bfa_nw_ioc_detach(struct bfa_ioc *ioc)
8b230ed8
RM		 1853{
1854 bfa_fsm_send_event(ioc, IOC_E_DETACH);
1855}
1856
1857/**
1858 * Setup IOC PCI properties.
1859 *
1860 * @param[in] pcidev PCI device information for this IOC
1861 */
1862void
8a891429 1863bfa_nw_ioc_pci_init(struct bfa_ioc *ioc, struct bfa_pcidev *pcidev,
8b230ed8
RM		 1864 enum bfi_mclass mc)
1865{
1866 ioc->ioc_mc = mc;
1867 ioc->pcidev = *pcidev;
1868 ioc->ctdev = bfa_asic_id_ct(ioc->pcidev.device_id);
1869 ioc->cna = ioc->ctdev && !ioc->fcmode;
1870
8a891429 1871 bfa_nw_ioc_set_ct_hwif(ioc);
8b230ed8
RM		 1872
1873 bfa_ioc_map_port(ioc);
1874 bfa_ioc_reg_init(ioc);
1875}
1876
1877/**
1878 * Initialize IOC dma memory
1879 *
1880 * @param[in] dm_kva kernel virtual address of IOC dma memory
1881 * @param[in] dm_pa physical address of IOC dma memory
1882 */
1883void
8a891429 1884bfa_nw_ioc_mem_claim(struct bfa_ioc *ioc, u8 *dm_kva, u64 dm_pa)
8b230ed8
RM		 1885{
1886 /**
1887 * dma memory for firmware attribute
1888 */
1889 ioc->attr_dma.kva = dm_kva;
1890 ioc->attr_dma.pa = dm_pa;
1891 ioc->attr = (struct bfi_ioc_attr *) dm_kva;
1892}
1893
1894/**
1895 * Return size of dma memory required.
1896 */
1897u32
8a891429 1898bfa_nw_ioc_meminfo(void)
8b230ed8
RM		 1899{
1900 return roundup(sizeof(struct bfi_ioc_attr), BFA_DMA_ALIGN_SZ);
1901}
1902
1903void
8a891429 1904bfa_nw_ioc_enable(struct bfa_ioc *ioc)
8b230ed8
RM		 1905{
1906 bfa_ioc_stats(ioc, ioc_enables);
1907 ioc->dbg_fwsave_once = true;
1908
1909 bfa_fsm_send_event(ioc, IOC_E_ENABLE);
1910}
1911
1912void
8a891429 1913bfa_nw_ioc_disable(struct bfa_ioc *ioc)
8b230ed8
RM		 1914{
1915 bfa_ioc_stats(ioc, ioc_disables);
1916 bfa_fsm_send_event(ioc, IOC_E_DISABLE);
1917}
1918
8a891429 1919static u32
8b230ed8
RM		 1920bfa_ioc_smem_pgnum(struct bfa_ioc *ioc, u32 fmaddr)
1921{
1922 return PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, fmaddr);
1923}
1924
8b230ed8
RM		 1925/**
1926 * Register mailbox message handler function, to be called by common modules
1927 */
1928void
8a891429 1929bfa_nw_ioc_mbox_regisr(struct bfa_ioc *ioc, enum bfi_mclass mc,
8b230ed8
RM		 1930 bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg)
1931{
1932 struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
1933
1934 mod->mbhdlr[mc].cbfn = cbfn;
1935 mod->mbhdlr[mc].cbarg = cbarg;
1936}
1937
1938/**
1939 * Queue a mailbox command request to firmware. Waits if mailbox is busy.
1940 * Responsibility of caller to serialize
1941 *
1942 * @param[in] ioc IOC instance
1943 * @param[i] cmd Mailbox command
1944 */
1945void
8a891429 1946bfa_nw_ioc_mbox_queue(struct bfa_ioc *ioc, struct bfa_mbox_cmd *cmd)
8b230ed8
RM		 1947{
1948 struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
1949 u32 stat;
1950
1951 /**
1952 * If a previous command is pending, queue new command
1953 */
1954 if (!list_empty(&mod->cmd_q)) {
1955 list_add_tail(&cmd->qe, &mod->cmd_q);
1956 return;
1957 }
1958
1959 /**
1960 * If mailbox is busy, queue command for poll timer
1961 */
1962 stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
1963 if (stat) {
1964 list_add_tail(&cmd->qe, &mod->cmd_q);
1965 return;
1966 }
1967
1968 /**
1969 * mailbox is free -- queue command to firmware
1970 */
1971 bfa_ioc_mbox_send(ioc, cmd->msg, sizeof(cmd->msg));
bd5a92e9
RM		 1972
1973 return;
8b230ed8
RM		 1974}
1975
1976/**
1977 * Handle mailbox interrupts
1978 */
1979void
8a891429 1980bfa_nw_ioc_mbox_isr(struct bfa_ioc *ioc)
8b230ed8
RM		 1981{
1982 struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
1983 struct bfi_mbmsg m;
1984 int mc;
1985
1986 bfa_ioc_msgget(ioc, &m);
1987
1988 /**
1989 * Treat IOC message class as special.
1990 */
1991 mc = m.mh.msg_class;
1992 if (mc == BFI_MC_IOC) {
1993 bfa_ioc_isr(ioc, &m);
1994 return;
1995 }
1996
0746556b 1997 if ((mc >= BFI_MC_MAX) || (mod->mbhdlr[mc].cbfn == NULL))
8b230ed8
RM		 1998 return;
1999
2000 mod->mbhdlr[mc].cbfn(mod->mbhdlr[mc].cbarg, &m);
2001}
2002
2003void
8a891429 2004bfa_nw_ioc_error_isr(struct bfa_ioc *ioc)
8b230ed8
RM		 2005{
2006 bfa_fsm_send_event(ioc, IOC_E_HWERROR);
2007}
2008
bd5a92e9
RM		 2009/**
2010 * return true if IOC is disabled
2011 */
2012bool
2013bfa_nw_ioc_is_disabled(struct bfa_ioc *ioc)
2014{
2015 return bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabling) ||
2016 bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabled);
2017}
2018
8b230ed8
RM		 2019/**
2020 * Add to IOC heartbeat failure notification queue. To be used by common
2021 * modules such as cee, port, diag.
2022 */
2023void
bd5a92e9
RM		 2024bfa_nw_ioc_notify_register(struct bfa_ioc *ioc,
2025 struct bfa_ioc_notify *notify)
8b230ed8 2026{
bd5a92e9 2027 list_add_tail(&notify->qe, &ioc->notify_q);
8b230ed8
RM		 2028}
2029
2030#define BFA_MFG_NAME "Brocade"
8a891429 2031static void
8b230ed8
RM		 2032bfa_ioc_get_adapter_attr(struct bfa_ioc *ioc,
2033 struct bfa_adapter_attr *ad_attr)
2034{
2035 struct bfi_ioc_attr *ioc_attr;
2036
2037 ioc_attr = ioc->attr;
2038
2039 bfa_ioc_get_adapter_serial_num(ioc, ad_attr->serial_num);
2040 bfa_ioc_get_adapter_fw_ver(ioc, ad_attr->fw_ver);
2041 bfa_ioc_get_adapter_optrom_ver(ioc, ad_attr->optrom_ver);
2042 bfa_ioc_get_adapter_manufacturer(ioc, ad_attr->manufacturer);
2043 memcpy(&ad_attr->vpd, &ioc_attr->vpd,
2044 sizeof(struct bfa_mfg_vpd));
2045
2046 ad_attr->nports = bfa_ioc_get_nports(ioc);
2047 ad_attr->max_speed = bfa_ioc_speed_sup(ioc);
2048
2049 bfa_ioc_get_adapter_model(ioc, ad_attr->model);
2050 /* For now, model descr uses same model string */
2051 bfa_ioc_get_adapter_model(ioc, ad_attr->model_descr);
2052
2053 ad_attr->card_type = ioc_attr->card_type;
2054 ad_attr->is_mezz = bfa_mfg_is_mezz(ioc_attr->card_type);
2055
2056 if (BFI_ADAPTER_IS_SPECIAL(ioc_attr->adapter_prop))
2057 ad_attr->prototype = 1;
2058 else
2059 ad_attr->prototype = 0;
2060
2061 ad_attr->pwwn = bfa_ioc_get_pwwn(ioc);
8a891429 2062 ad_attr->mac = bfa_nw_ioc_get_mac(ioc);
8b230ed8
RM		 2063
2064 ad_attr->pcie_gen = ioc_attr->pcie_gen;
2065 ad_attr->pcie_lanes = ioc_attr->pcie_lanes;
2066 ad_attr->pcie_lanes_orig = ioc_attr->pcie_lanes_orig;
2067 ad_attr->asic_rev = ioc_attr->asic_rev;
2068
2069 bfa_ioc_get_pci_chip_rev(ioc, ad_attr->hw_ver);
2070
2071 ad_attr->cna_capable = ioc->cna;
2072 ad_attr->trunk_capable = (ad_attr->nports > 1) && !ioc->cna;
2073}
2074
8a891429 2075static enum bfa_ioc_type
8b230ed8
RM		 2076bfa_ioc_get_type(struct bfa_ioc *ioc)
2077{
2078 if (!ioc->ctdev || ioc->fcmode)
2079 return BFA_IOC_TYPE_FC;
2080 else if (ioc->ioc_mc == BFI_MC_IOCFC)
2081 return BFA_IOC_TYPE_FCoE;
2082 else if (ioc->ioc_mc == BFI_MC_LL)
2083 return BFA_IOC_TYPE_LL;
2084 else {
2085 BUG_ON(!(ioc->ioc_mc == BFI_MC_LL));
2086 return BFA_IOC_TYPE_LL;
2087 }
2088}
2089
8a891429 2090static void
8b230ed8
RM		 2091bfa_ioc_get_adapter_serial_num(struct bfa_ioc *ioc, char *serial_num)
2092{
2093 memset(serial_num, 0, BFA_ADAPTER_SERIAL_NUM_LEN);
2094 memcpy(serial_num,
2095 (void *)ioc->attr->brcd_serialnum,
2096 BFA_ADAPTER_SERIAL_NUM_LEN);
2097}
2098
8a891429 2099static void
8b230ed8
RM		 2100bfa_ioc_get_adapter_fw_ver(struct bfa_ioc *ioc, char *fw_ver)
2101{
2102 memset(fw_ver, 0, BFA_VERSION_LEN);
2103 memcpy(fw_ver, ioc->attr->fw_version, BFA_VERSION_LEN);
2104}
2105
8a891429 2106static void
8b230ed8
RM		 2107bfa_ioc_get_pci_chip_rev(struct bfa_ioc *ioc, char *chip_rev)
2108{
2109 BUG_ON(!(chip_rev));
2110
2111 memset(chip_rev, 0, BFA_IOC_CHIP_REV_LEN);
2112
2113 chip_rev[0] = 'R';
2114 chip_rev[1] = 'e';
2115 chip_rev[2] = 'v';
2116 chip_rev[3] = '-';
2117 chip_rev[4] = ioc->attr->asic_rev;
2118 chip_rev[5] = '\0';
2119}
2120
8a891429 2121static void
8b230ed8
RM		 2122bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc *ioc, char *optrom_ver)
2123{
2124 memset(optrom_ver, 0, BFA_VERSION_LEN);
2125 memcpy(optrom_ver, ioc->attr->optrom_version,
2126 BFA_VERSION_LEN);
2127}
2128
8a891429 2129static void
8b230ed8
RM		 2130bfa_ioc_get_adapter_manufacturer(struct bfa_ioc *ioc, char *manufacturer)
2131{
2132 memset(manufacturer, 0, BFA_ADAPTER_MFG_NAME_LEN);
2133 memcpy(manufacturer, BFA_MFG_NAME, BFA_ADAPTER_MFG_NAME_LEN);
2134}
2135
8a891429 2136static void
8b230ed8
RM		 2137bfa_ioc_get_adapter_model(struct bfa_ioc *ioc, char *model)
2138{
2139 struct bfi_ioc_attr *ioc_attr;
2140
2141 BUG_ON(!(model));
2142 memset(model, 0, BFA_ADAPTER_MODEL_NAME_LEN);
2143
2144 ioc_attr = ioc->attr;
2145
2146 /**
2147 * model name
2148 */
2149 snprintf(model, BFA_ADAPTER_MODEL_NAME_LEN, "%s-%u",
2150 BFA_MFG_NAME, ioc_attr->card_type);
2151}
2152
8a891429 2153static enum bfa_ioc_state
8b230ed8
RM		 2154bfa_ioc_get_state(struct bfa_ioc *ioc)
2155{
1d32f769
RM		 2156 enum bfa_iocpf_state iocpf_st;
2157 enum bfa_ioc_state ioc_st = bfa_sm_to_state(ioc_sm_table, ioc->fsm);
2158
2159 if (ioc_st == BFA_IOC_ENABLING ||
2160 ioc_st == BFA_IOC_FAIL || ioc_st == BFA_IOC_INITFAIL) {
2161
2162 iocpf_st = bfa_sm_to_state(iocpf_sm_table, ioc->iocpf.fsm);
2163
2164 switch (iocpf_st) {
2165 case BFA_IOCPF_SEMWAIT:
2166 ioc_st = BFA_IOC_SEMWAIT;
2167 break;
2168
2169 case BFA_IOCPF_HWINIT:
2170 ioc_st = BFA_IOC_HWINIT;
2171 break;
2172
2173 case BFA_IOCPF_FWMISMATCH:
2174 ioc_st = BFA_IOC_FWMISMATCH;
2175 break;
2176
2177 case BFA_IOCPF_FAIL:
2178 ioc_st = BFA_IOC_FAIL;
2179 break;
2180
2181 case BFA_IOCPF_INITFAIL:
2182 ioc_st = BFA_IOC_INITFAIL;
2183 break;
2184
2185 default:
2186 break;
2187 }
2188 }
2189 return ioc_st;
8b230ed8
RM		 2190}
2191
2192void
8a891429 2193bfa_nw_ioc_get_attr(struct bfa_ioc *ioc, struct bfa_ioc_attr *ioc_attr)
8b230ed8
RM		 2194{
2195 memset((void *)ioc_attr, 0, sizeof(struct bfa_ioc_attr));
2196
2197 ioc_attr->state = bfa_ioc_get_state(ioc);
2198 ioc_attr->port_id = ioc->port_id;
2199
2200 ioc_attr->ioc_type = bfa_ioc_get_type(ioc);
2201
2202 bfa_ioc_get_adapter_attr(ioc, &ioc_attr->adapter_attr);
2203
2204 ioc_attr->pci_attr.device_id = ioc->pcidev.device_id;
2205 ioc_attr->pci_attr.pcifn = ioc->pcidev.pci_func;
2206 bfa_ioc_get_pci_chip_rev(ioc, ioc_attr->pci_attr.chip_rev);
2207}
2208
2209/**
2210 * WWN public
2211 */
8a891429 2212static u64
8b230ed8
RM		 2213bfa_ioc_get_pwwn(struct bfa_ioc *ioc)
2214{
2215 return ioc->attr->pwwn;
2216}
2217
8b230ed8 2218mac_t
8a891429 2219bfa_nw_ioc_get_mac(struct bfa_ioc *ioc)
8b230ed8 2220{
2c7d3821 2221 return ioc->attr->mac;
8b230ed8
RM		 2222}
2223
8b230ed8
RM		 2224/**
2225 * Firmware failure detected. Start recovery actions.
2226 */
2227static void
2228bfa_ioc_recover(struct bfa_ioc *ioc)
2229{
1e581486
RM		 2230 pr_crit("Heart Beat of IOC has failed\n");
2231 bfa_ioc_stats(ioc, ioc_hbfails);
2232 bfa_fsm_send_event(ioc, IOC_E_HBFAIL);
8b230ed8
RM		 2233}
2234
2235static void
2236bfa_ioc_check_attr_wwns(struct bfa_ioc *ioc)
2237{
2238 if (bfa_ioc_get_type(ioc) == BFA_IOC_TYPE_LL)
2239 return;
1d32f769
RM		 2240}
2241
2242/**
2243 * @dg hal_iocpf_pvt BFA IOC PF private functions
2244 * @{
2245 */
2246
2247static void
2248bfa_iocpf_enable(struct bfa_ioc *ioc)
2249{
2250 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_ENABLE);
2251}
2252
2253static void
2254bfa_iocpf_disable(struct bfa_ioc *ioc)
2255{
2256 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_DISABLE);
2257}
2258
2259static void
2260bfa_iocpf_fail(struct bfa_ioc *ioc)
2261{
2262 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FAIL);
2263}
2264
2265static void
2266bfa_iocpf_initfail(struct bfa_ioc *ioc)
2267{
2268 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_INITFAIL);
2269}
2270
2271static void
2272bfa_iocpf_getattrfail(struct bfa_ioc *ioc)
2273{
2274 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_GETATTRFAIL);
2275}
2276
2277static void
2278bfa_iocpf_stop(struct bfa_ioc *ioc)
2279{
2280 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_STOP);
2281}
2282
2283void
2284bfa_nw_iocpf_timeout(void *ioc_arg)
2285{
2286 struct bfa_ioc *ioc = (struct bfa_ioc *) ioc_arg;
2287
2288 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_TIMEOUT);
2289}
8b230ed8 2290
1d32f769
RM		 2291void
2292bfa_nw_iocpf_sem_timeout(void *ioc_arg)
2293{
2294 struct bfa_ioc *ioc = (struct bfa_ioc *) ioc_arg;
2295
2296 bfa_ioc_hw_sem_get(ioc);
8b230ed8 2297}
Linux kernel - Deliverables
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