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8b230ed8 RM |
1 | /* |
2 | * Linux network driver for Brocade Converged Network Adapter. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms of the GNU General Public License (GPL) Version 2 as | |
6 | * published by the Free Software Foundation | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | /* | |
14 | * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. | |
15 | * All rights reserved | |
16 | * www.brocade.com | |
17 | */ | |
18 | ||
19 | #ifndef __BFA_IOC_H__ | |
20 | #define __BFA_IOC_H__ | |
21 | ||
22 | #include "bfa_sm.h" | |
23 | #include "bfi.h" | |
24 | #include "cna.h" | |
25 | ||
26 | #define BFA_IOC_TOV 3000 /* msecs */ | |
27 | #define BFA_IOC_HWSEM_TOV 500 /* msecs */ | |
28 | #define BFA_IOC_HB_TOV 500 /* msecs */ | |
1d32f769 | 29 | #define BFA_IOC_HWINIT_MAX 5 |
8b230ed8 RM |
30 | |
31 | /** | |
32 | * PCI device information required by IOC | |
33 | */ | |
34 | struct bfa_pcidev { | |
35 | int pci_slot; | |
36 | u8 pci_func; | |
37 | u16 device_id; | |
38 | void __iomem *pci_bar_kva; | |
39 | }; | |
40 | ||
41 | /** | |
42 | * Structure used to remember the DMA-able memory block's KVA and Physical | |
43 | * Address | |
44 | */ | |
45 | struct bfa_dma { | |
46 | void *kva; /* ! Kernel virtual address */ | |
47 | u64 pa; /* ! Physical address */ | |
48 | }; | |
49 | ||
50 | #define BFA_DMA_ALIGN_SZ 256 | |
51 | ||
52 | /** | |
53 | * smem size for Crossbow and Catapult | |
54 | */ | |
55 | #define BFI_SMEM_CB_SIZE 0x200000U /* ! 2MB for crossbow */ | |
56 | #define BFI_SMEM_CT_SIZE 0x280000U /* ! 2.5MB for catapult */ | |
57 | ||
8b230ed8 RM |
58 | /** |
59 | * @brief BFA dma address assignment macro. (big endian format) | |
60 | */ | |
61 | #define bfa_dma_be_addr_set(dma_addr, pa) \ | |
62 | __bfa_dma_be_addr_set(&dma_addr, (u64)pa) | |
63 | static inline void | |
64 | __bfa_dma_be_addr_set(union bfi_addr_u *dma_addr, u64 pa) | |
65 | { | |
66 | dma_addr->a32.addr_lo = (u32) htonl(pa); | |
67 | dma_addr->a32.addr_hi = (u32) htonl(upper_32_bits(pa)); | |
68 | } | |
69 | ||
70 | struct bfa_ioc_regs { | |
71 | void __iomem *hfn_mbox_cmd; | |
72 | void __iomem *hfn_mbox; | |
73 | void __iomem *lpu_mbox_cmd; | |
74 | void __iomem *lpu_mbox; | |
75 | void __iomem *pss_ctl_reg; | |
76 | void __iomem *pss_err_status_reg; | |
77 | void __iomem *app_pll_fast_ctl_reg; | |
78 | void __iomem *app_pll_slow_ctl_reg; | |
79 | void __iomem *ioc_sem_reg; | |
80 | void __iomem *ioc_usage_sem_reg; | |
81 | void __iomem *ioc_init_sem_reg; | |
82 | void __iomem *ioc_usage_reg; | |
83 | void __iomem *host_page_num_fn; | |
84 | void __iomem *heartbeat; | |
85 | void __iomem *ioc_fwstate; | |
1d32f769 | 86 | void __iomem *alt_ioc_fwstate; |
8b230ed8 | 87 | void __iomem *ll_halt; |
1d32f769 | 88 | void __iomem *alt_ll_halt; |
8b230ed8 | 89 | void __iomem *err_set; |
1d32f769 | 90 | void __iomem *ioc_fail_sync; |
8b230ed8 RM |
91 | void __iomem *shirq_isr_next; |
92 | void __iomem *shirq_msk_next; | |
93 | void __iomem *smem_page_start; | |
94 | u32 smem_pg0; | |
95 | }; | |
96 | ||
97 | /** | |
98 | * IOC Mailbox structures | |
99 | */ | |
100 | struct bfa_mbox_cmd { | |
101 | struct list_head qe; | |
102 | u32 msg[BFI_IOC_MSGSZ]; | |
103 | }; | |
104 | ||
105 | /** | |
106 | * IOC mailbox module | |
107 | */ | |
108 | typedef void (*bfa_ioc_mbox_mcfunc_t)(void *cbarg, struct bfi_mbmsg *m); | |
109 | struct bfa_ioc_mbox_mod { | |
110 | struct list_head cmd_q; /*!< pending mbox queue */ | |
111 | int nmclass; /*!< number of handlers */ | |
112 | struct { | |
113 | bfa_ioc_mbox_mcfunc_t cbfn; /*!< message handlers */ | |
114 | void *cbarg; | |
115 | } mbhdlr[BFI_MC_MAX]; | |
116 | }; | |
117 | ||
118 | /** | |
119 | * IOC callback function interfaces | |
120 | */ | |
121 | typedef void (*bfa_ioc_enable_cbfn_t)(void *bfa, enum bfa_status status); | |
122 | typedef void (*bfa_ioc_disable_cbfn_t)(void *bfa); | |
123 | typedef void (*bfa_ioc_hbfail_cbfn_t)(void *bfa); | |
124 | typedef void (*bfa_ioc_reset_cbfn_t)(void *bfa); | |
125 | struct bfa_ioc_cbfn { | |
126 | bfa_ioc_enable_cbfn_t enable_cbfn; | |
127 | bfa_ioc_disable_cbfn_t disable_cbfn; | |
128 | bfa_ioc_hbfail_cbfn_t hbfail_cbfn; | |
129 | bfa_ioc_reset_cbfn_t reset_cbfn; | |
130 | }; | |
131 | ||
132 | /** | |
133 | * Heartbeat failure notification queue element. | |
134 | */ | |
135 | struct bfa_ioc_hbfail_notify { | |
136 | struct list_head qe; | |
137 | bfa_ioc_hbfail_cbfn_t cbfn; | |
138 | void *cbarg; | |
139 | }; | |
140 | ||
141 | /** | |
142 | * Initialize a heartbeat failure notification structure | |
143 | */ | |
144 | #define bfa_ioc_hbfail_init(__notify, __cbfn, __cbarg) do { \ | |
145 | (__notify)->cbfn = (__cbfn); \ | |
146 | (__notify)->cbarg = (__cbarg); \ | |
147 | } while (0) | |
148 | ||
1d32f769 RM |
149 | struct bfa_iocpf { |
150 | bfa_fsm_t fsm; | |
151 | struct bfa_ioc *ioc; | |
152 | u32 retry_count; | |
153 | bool auto_recover; | |
154 | }; | |
155 | ||
8b230ed8 RM |
156 | struct bfa_ioc { |
157 | bfa_fsm_t fsm; | |
158 | struct bfa *bfa; | |
159 | struct bfa_pcidev pcidev; | |
8b230ed8 | 160 | struct timer_list ioc_timer; |
1d32f769 | 161 | struct timer_list iocpf_timer; |
8b230ed8 RM |
162 | struct timer_list sem_timer; |
163 | struct timer_list hb_timer; | |
164 | u32 hb_count; | |
8b230ed8 RM |
165 | struct list_head hb_notify_q; |
166 | void *dbg_fwsave; | |
167 | int dbg_fwsave_len; | |
168 | bool dbg_fwsave_once; | |
169 | enum bfi_mclass ioc_mc; | |
170 | struct bfa_ioc_regs ioc_regs; | |
171 | struct bfa_ioc_drv_stats stats; | |
8b230ed8 RM |
172 | bool fcmode; |
173 | bool ctdev; | |
174 | bool cna; | |
175 | bool pllinit; | |
176 | bool stats_busy; /*!< outstanding stats */ | |
177 | u8 port_id; | |
178 | ||
179 | struct bfa_dma attr_dma; | |
180 | struct bfi_ioc_attr *attr; | |
181 | struct bfa_ioc_cbfn *cbfn; | |
182 | struct bfa_ioc_mbox_mod mbox_mod; | |
183 | struct bfa_ioc_hwif *ioc_hwif; | |
1d32f769 | 184 | struct bfa_iocpf iocpf; |
8b230ed8 RM |
185 | }; |
186 | ||
187 | struct bfa_ioc_hwif { | |
188 | enum bfa_status (*ioc_pll_init) (void __iomem *rb, bool fcmode); | |
189 | bool (*ioc_firmware_lock) (struct bfa_ioc *ioc); | |
190 | void (*ioc_firmware_unlock) (struct bfa_ioc *ioc); | |
191 | void (*ioc_reg_init) (struct bfa_ioc *ioc); | |
192 | void (*ioc_map_port) (struct bfa_ioc *ioc); | |
193 | void (*ioc_isr_mode_set) (struct bfa_ioc *ioc, | |
194 | bool msix); | |
1d32f769 | 195 | void (*ioc_notify_fail) (struct bfa_ioc *ioc); |
8b230ed8 | 196 | void (*ioc_ownership_reset) (struct bfa_ioc *ioc); |
79ea6c89 | 197 | bool (*ioc_sync_start) (struct bfa_ioc *ioc); |
1d32f769 RM |
198 | void (*ioc_sync_join) (struct bfa_ioc *ioc); |
199 | void (*ioc_sync_leave) (struct bfa_ioc *ioc); | |
200 | void (*ioc_sync_ack) (struct bfa_ioc *ioc); | |
201 | bool (*ioc_sync_complete) (struct bfa_ioc *ioc); | |
8b230ed8 RM |
202 | }; |
203 | ||
204 | #define bfa_ioc_pcifn(__ioc) ((__ioc)->pcidev.pci_func) | |
205 | #define bfa_ioc_devid(__ioc) ((__ioc)->pcidev.device_id) | |
206 | #define bfa_ioc_bar0(__ioc) ((__ioc)->pcidev.pci_bar_kva) | |
207 | #define bfa_ioc_portid(__ioc) ((__ioc)->port_id) | |
208 | #define bfa_ioc_fetch_stats(__ioc, __stats) \ | |
209 | (((__stats)->drv_stats) = (__ioc)->stats) | |
210 | #define bfa_ioc_clr_stats(__ioc) \ | |
211 | memset(&(__ioc)->stats, 0, sizeof((__ioc)->stats)) | |
212 | #define bfa_ioc_maxfrsize(__ioc) ((__ioc)->attr->maxfrsize) | |
213 | #define bfa_ioc_rx_bbcredit(__ioc) ((__ioc)->attr->rx_bbcredit) | |
214 | #define bfa_ioc_speed_sup(__ioc) \ | |
215 | BFI_ADAPTER_GETP(SPEED, (__ioc)->attr->adapter_prop) | |
216 | #define bfa_ioc_get_nports(__ioc) \ | |
217 | BFI_ADAPTER_GETP(NPORTS, (__ioc)->attr->adapter_prop) | |
218 | ||
219 | #define bfa_ioc_stats(_ioc, _stats) ((_ioc)->stats._stats++) | |
220 | #define BFA_IOC_FWIMG_MINSZ (16 * 1024) | |
221 | #define BFA_IOC_FWIMG_TYPE(__ioc) \ | |
222 | (((__ioc)->ctdev) ? \ | |
223 | (((__ioc)->fcmode) ? BFI_IMAGE_CT_FC : BFI_IMAGE_CT_CNA) : \ | |
224 | BFI_IMAGE_CB_FC) | |
225 | #define BFA_IOC_FW_SMEM_SIZE(__ioc) \ | |
226 | (((__ioc)->ctdev) ? BFI_SMEM_CT_SIZE : BFI_SMEM_CB_SIZE) | |
227 | #define BFA_IOC_FLASH_CHUNK_NO(off) (off / BFI_FLASH_CHUNK_SZ_WORDS) | |
228 | #define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off) (off % BFI_FLASH_CHUNK_SZ_WORDS) | |
229 | #define BFA_IOC_FLASH_CHUNK_ADDR(chunkno) (chunkno * BFI_FLASH_CHUNK_SZ_WORDS) | |
230 | ||
231 | /** | |
232 | * IOC mailbox interface | |
233 | */ | |
8a891429 RM |
234 | void bfa_nw_ioc_mbox_queue(struct bfa_ioc *ioc, struct bfa_mbox_cmd *cmd); |
235 | void bfa_nw_ioc_mbox_isr(struct bfa_ioc *ioc); | |
236 | void bfa_nw_ioc_mbox_regisr(struct bfa_ioc *ioc, enum bfi_mclass mc, | |
8b230ed8 RM |
237 | bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg); |
238 | ||
239 | /** | |
240 | * IOC interfaces | |
241 | */ | |
242 | ||
243 | #define bfa_ioc_pll_init_asic(__ioc) \ | |
244 | ((__ioc)->ioc_hwif->ioc_pll_init((__ioc)->pcidev.pci_bar_kva, \ | |
245 | (__ioc)->fcmode)) | |
246 | ||
8b230ed8 RM |
247 | #define bfa_ioc_isr_mode_set(__ioc, __msix) \ |
248 | ((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix)) | |
249 | #define bfa_ioc_ownership_reset(__ioc) \ | |
250 | ((__ioc)->ioc_hwif->ioc_ownership_reset(__ioc)) | |
251 | ||
8a891429 | 252 | void bfa_nw_ioc_set_ct_hwif(struct bfa_ioc *ioc); |
8b230ed8 | 253 | |
8a891429 | 254 | void bfa_nw_ioc_attach(struct bfa_ioc *ioc, void *bfa, |
8b230ed8 | 255 | struct bfa_ioc_cbfn *cbfn); |
8a891429 RM |
256 | void bfa_nw_ioc_auto_recover(bool auto_recover); |
257 | void bfa_nw_ioc_detach(struct bfa_ioc *ioc); | |
258 | void bfa_nw_ioc_pci_init(struct bfa_ioc *ioc, struct bfa_pcidev *pcidev, | |
8b230ed8 | 259 | enum bfi_mclass mc); |
8a891429 RM |
260 | u32 bfa_nw_ioc_meminfo(void); |
261 | void bfa_nw_ioc_mem_claim(struct bfa_ioc *ioc, u8 *dm_kva, u64 dm_pa); | |
262 | void bfa_nw_ioc_enable(struct bfa_ioc *ioc); | |
263 | void bfa_nw_ioc_disable(struct bfa_ioc *ioc); | |
264 | ||
265 | void bfa_nw_ioc_error_isr(struct bfa_ioc *ioc); | |
8a891429 RM |
266 | void bfa_nw_ioc_get_attr(struct bfa_ioc *ioc, struct bfa_ioc_attr *ioc_attr); |
267 | void bfa_nw_ioc_hbfail_register(struct bfa_ioc *ioc, | |
8b230ed8 | 268 | struct bfa_ioc_hbfail_notify *notify); |
8a891429 RM |
269 | bool bfa_nw_ioc_sem_get(void __iomem *sem_reg); |
270 | void bfa_nw_ioc_sem_release(void __iomem *sem_reg); | |
271 | void bfa_nw_ioc_hw_sem_release(struct bfa_ioc *ioc); | |
272 | void bfa_nw_ioc_fwver_get(struct bfa_ioc *ioc, | |
8b230ed8 | 273 | struct bfi_ioc_image_hdr *fwhdr); |
8a891429 | 274 | bool bfa_nw_ioc_fwver_cmp(struct bfa_ioc *ioc, |
8b230ed8 | 275 | struct bfi_ioc_image_hdr *fwhdr); |
8a891429 | 276 | mac_t bfa_nw_ioc_get_mac(struct bfa_ioc *ioc); |
8b230ed8 RM |
277 | |
278 | /* | |
279 | * Timeout APIs | |
280 | */ | |
8a891429 RM |
281 | void bfa_nw_ioc_timeout(void *ioc); |
282 | void bfa_nw_ioc_hb_check(void *ioc); | |
1d32f769 RM |
283 | void bfa_nw_iocpf_timeout(void *ioc); |
284 | void bfa_nw_iocpf_sem_timeout(void *ioc); | |
8b230ed8 RM |
285 | |
286 | /* | |
287 | * F/W Image Size & Chunk | |
288 | */ | |
289 | u32 *bfa_cb_image_get_chunk(int type, u32 off); | |
290 | u32 bfa_cb_image_get_size(int type); | |
291 | ||
292 | #endif /* __BFA_IOC_H__ */ |