[deliverable/linux.git] / drivers / net / bnx2x / bnx2x_dcb.h

/* bnx2x_dcb.h: Broadcom Everest network driver.
 *
 * Copyright 2009-2011 Broadcom Corporation
 *
 * Unless you and Broadcom execute a separate written software license
 * agreement governing use of this software, this software is licensed to you
 * under the terms of the GNU General Public License version 2, available
 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
 *
 * Notwithstanding the above, under no circumstances may you combine this
 * software in any way with any other Broadcom software provided under a
 * license other than the GPL, without Broadcom's express prior written
 * consent.
 *
 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
 * Written by: Dmitry Kravkov
 *
 */
#ifndef BNX2X_DCB_H
#define BNX2X_DCB_H

#include "bnx2x_hsi.h"

#define LLFC_DRIVER_TRAFFIC_TYPE_MAX 3 /* NW, iSCSI, FCoE */
struct bnx2x_dcbx_app_params {
	u32 enabled;
	u32 traffic_type_priority[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
};

#define E2_NUM_OF_COS			2
#define BNX2X_DCBX_COS_NOT_STRICT	0
#define BNX2X_DCBX_COS_LOW_STRICT	1
#define BNX2X_DCBX_COS_HIGH_STRICT	2

struct bnx2x_dcbx_cos_params {
	u32	bw_tbl;
	u32	pri_bitmask;
	u8	strict;
	u8	pauseable;
};

struct bnx2x_dcbx_pg_params {
	u32 enabled;
	u8 num_of_cos; /* valid COS entries */
	struct bnx2x_dcbx_cos_params	cos_params[E2_NUM_OF_COS];
};

struct bnx2x_dcbx_pfc_params {
	u32 enabled;
	u32 priority_non_pauseable_mask;
};

struct bnx2x_dcbx_port_params {
	struct bnx2x_dcbx_pfc_params pfc;
	struct bnx2x_dcbx_pg_params  ets;
	struct bnx2x_dcbx_app_params app;
};

#define BNX2X_DCBX_CONFIG_INV_VALUE			(0xFFFFFFFF)
#define BNX2X_DCBX_OVERWRITE_SETTINGS_DISABLE		0
#define BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE		1
#define BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID	(BNX2X_DCBX_CONFIG_INV_VALUE)

struct bnx2x_config_lldp_params {
	u32 overwrite_settings;
	u32 msg_tx_hold;
	u32 msg_fast_tx;
	u32 tx_credit_max;
	u32 msg_tx_interval;
	u32 tx_fast;
};

struct bnx2x_admin_priority_app_table {
		u32 valid;
		u32 priority;
#define INVALID_TRAFFIC_TYPE_PRIORITY	(0xFFFFFFFF)
		u32 traffic_type;
#define TRAFFIC_TYPE_ETH		0
#define TRAFFIC_TYPE_PORT		1
		u32 app_id;
};

struct bnx2x_config_dcbx_params {
	u32 overwrite_settings;
	u32 admin_dcbx_version;
	u32 admin_ets_enable;
	u32 admin_pfc_enable;
	u32 admin_tc_supported_tx_enable;
	u32 admin_ets_configuration_tx_enable;
	u32 admin_ets_recommendation_tx_enable;
	u32 admin_pfc_tx_enable;
	u32 admin_application_priority_tx_enable;
	u32 admin_ets_willing;
	u32 admin_ets_reco_valid;
	u32 admin_pfc_willing;
	u32 admin_app_priority_willing;
	u32 admin_configuration_bw_precentage[8];
	u32 admin_configuration_ets_pg[8];
	u32 admin_recommendation_bw_precentage[8];
	u32 admin_recommendation_ets_pg[8];
	u32 admin_pfc_bitmap;
	struct bnx2x_admin_priority_app_table admin_priority_app_table[4];
	u32 admin_default_priority;
};

#define GET_FLAGS(flags, bits)		((flags) & (bits))
#define SET_FLAGS(flags, bits)		((flags) |= (bits))
#define RESET_FLAGS(flags, bits)	((flags) &= ~(bits))

enum {
	DCBX_READ_LOCAL_MIB,
	DCBX_READ_REMOTE_MIB
};

#define ETH_TYPE_FCOE		(0x8906)
#define TCP_PORT_ISCSI		(0xCBC)

#define PFC_VALUE_FRAME_SIZE				(512)
#define PFC_QUANTA_IN_NANOSEC_FROM_SPEED_MEGA(mega_speed)  \
				((1000 * PFC_VALUE_FRAME_SIZE)/(mega_speed))

#define PFC_BRB1_REG_HIGH_LLFC_LOW_THRESHOLD			130
#define PFC_BRB1_REG_HIGH_LLFC_HIGH_THRESHOLD			170


struct cos_entry_help_data {
	u32			pri_join_mask;
	u32			cos_bw;
	u8			strict;
	bool			pausable;
};

struct cos_help_data {
	struct cos_entry_help_data	data[E2_NUM_OF_COS];
	u8				num_of_cos;
};

#define DCBX_ILLEGAL_PG				(0xFF)
#define DCBX_PFC_PRI_MASK			(0xFF)
#define DCBX_STRICT_PRIORITY			(15)
#define DCBX_INVALID_COS_BW			(0xFFFFFFFF)
#define DCBX_PFC_PRI_NON_PAUSE_MASK(bp)		\
			((bp)->dcbx_port_params.pfc.priority_non_pauseable_mask)
#define DCBX_PFC_PRI_PAUSE_MASK(bp)		\
					((u8)~DCBX_PFC_PRI_NON_PAUSE_MASK(bp))
#define DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri)	\
				((pg_pri) & (DCBX_PFC_PRI_PAUSE_MASK(bp)))
#define DCBX_PFC_PRI_GET_NON_PAUSE(bp, pg_pri)	\
			(DCBX_PFC_PRI_NON_PAUSE_MASK(bp) & (pg_pri))
#define IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pg_pri)	\
			(pg_pri == DCBX_PFC_PRI_GET_PAUSE((bp), (pg_pri)))
#define IS_DCBX_PFC_PRI_ONLY_NON_PAUSE(bp, pg_pri)\
			((pg_pri) == DCBX_PFC_PRI_GET_NON_PAUSE((bp), (pg_pri)))
#define IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pg_pri)	\
			(!(IS_DCBX_PFC_PRI_ONLY_NON_PAUSE((bp), (pg_pri)) || \
			 IS_DCBX_PFC_PRI_ONLY_PAUSE((bp), (pg_pri))))


struct pg_entry_help_data {
	u8	num_of_dif_pri;
	u8	pg;
	u32	pg_priority;
};

struct pg_help_data {
	struct pg_entry_help_data	data[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
	u8				num_of_pg;
};

/* forward DCB/PFC related declarations */
struct bnx2x;
void bnx2x_dcb_init_intmem_pfc(struct bnx2x *bp);
void bnx2x_dcbx_update(struct work_struct *work);
void bnx2x_dcbx_init_params(struct bnx2x *bp);
void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled);

enum {
	BNX2X_DCBX_STATE_NEG_RECEIVED = 0x1,
#ifdef BCM_CNIC
	BNX2X_DCBX_STATE_ISCSI_STOPPED,
#endif
	BNX2X_DCBX_STATE_TX_PAUSED,
	BNX2X_DCBX_STATE_TX_RELEASED
};

void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state);

/* DCB netlink */
#ifdef BCM_DCBNL
extern const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops;
int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall);
#endif /* BCM_DCBNL */

#endif /* BNX2X_DCB_H */
Commit	Line	Data
e4901dde VZ	1	/* bnx2x_dcb.h: Broadcom Everest network driver.
e4901dde VZ	2	*
5de92408	3	* Copyright 2009-2011 Broadcom Corporation
e4901dde VZ	4	*
	5	* Unless you and Broadcom execute a separate written software license
	6	* agreement governing use of this software, this software is licensed to you
	7	* under the terms of the GNU General Public License version 2, available
	8	* at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
	9	*
	10	* Notwithstanding the above, under no circumstances may you combine this
	11	* software in any way with any other Broadcom software provided under a
	12	* license other than the GPL, without Broadcom's express prior written
	13	* consent.
	14	*
	15	* Maintained by: Eilon Greenstein <eilong@broadcom.com>
	16	* Written by: Dmitry Kravkov
	17	*
	18	*/
	19	#ifndef BNX2X_DCB_H
	20	#define BNX2X_DCB_H
	21
	22	#include "bnx2x_hsi.h"
	23
	24	#define LLFC_DRIVER_TRAFFIC_TYPE_MAX 3 /* NW, iSCSI, FCoE */
	25	struct bnx2x_dcbx_app_params {
	26	u32 enabled;
	27	u32 traffic_type_priority[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
	28	};
	29
	30	#define E2_NUM_OF_COS 2
	31	#define BNX2X_DCBX_COS_NOT_STRICT 0
	32	#define BNX2X_DCBX_COS_LOW_STRICT 1
	33	#define BNX2X_DCBX_COS_HIGH_STRICT 2
	34
	35	struct bnx2x_dcbx_cos_params {
	36	u32 bw_tbl;
	37	u32 pri_bitmask;
	38	u8 strict;
	39	u8 pauseable;
	40	};
	41
	42	struct bnx2x_dcbx_pg_params {
	43	u32 enabled;
	44	u8 num_of_cos; /* valid COS entries */
	45	struct bnx2x_dcbx_cos_params cos_params[E2_NUM_OF_COS];
	46	};
	47
	48	struct bnx2x_dcbx_pfc_params {
	49	u32 enabled;
	50	u32 priority_non_pauseable_mask;
	51	};
	52
	53	struct bnx2x_dcbx_port_params {
e4901dde VZ	54	struct bnx2x_dcbx_pfc_params pfc;
	55	struct bnx2x_dcbx_pg_params ets;
	56	struct bnx2x_dcbx_app_params app;
	57	};
	58
	59	#define BNX2X_DCBX_CONFIG_INV_VALUE (0xFFFFFFFF)
	60	#define BNX2X_DCBX_OVERWRITE_SETTINGS_DISABLE 0
	61	#define BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE 1
	62	#define BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID (BNX2X_DCBX_CONFIG_INV_VALUE)
	63
e4901dde VZ	64	struct bnx2x_config_lldp_params {
	65	u32 overwrite_settings;
	66	u32 msg_tx_hold;
	67	u32 msg_fast_tx;
	68	u32 tx_credit_max;
	69	u32 msg_tx_interval;
	70	u32 tx_fast;
	71	};
	72
	73	struct bnx2x_admin_priority_app_table {
	74	u32 valid;
	75	u32 priority;
	76	#define INVALID_TRAFFIC_TYPE_PRIORITY (0xFFFFFFFF)
	77	u32 traffic_type;
	78	#define TRAFFIC_TYPE_ETH 0
	79	#define TRAFFIC_TYPE_PORT 1
	80	u32 app_id;
	81	};
	82
e4901dde	83	struct bnx2x_config_dcbx_params {
e4901dde VZ	84	u32 overwrite_settings;
	85	u32 admin_dcbx_version;
	86	u32 admin_ets_enable;
	87	u32 admin_pfc_enable;
	88	u32 admin_tc_supported_tx_enable;
	89	u32 admin_ets_configuration_tx_enable;
	90	u32 admin_ets_recommendation_tx_enable;
	91	u32 admin_pfc_tx_enable;
	92	u32 admin_application_priority_tx_enable;
	93	u32 admin_ets_willing;
	94	u32 admin_ets_reco_valid;
	95	u32 admin_pfc_willing;
	96	u32 admin_app_priority_willing;
	97	u32 admin_configuration_bw_precentage[8];
	98	u32 admin_configuration_ets_pg[8];
	99	u32 admin_recommendation_bw_precentage[8];
	100	u32 admin_recommendation_ets_pg[8];
	101	u32 admin_pfc_bitmap;
	102	struct bnx2x_admin_priority_app_table admin_priority_app_table[4];
	103	u32 admin_default_priority;
	104	};
	105
	106	#define GET_FLAGS(flags, bits) ((flags) & (bits))
	107	#define SET_FLAGS(flags, bits) ((flags) \|= (bits))
	108	#define RESET_FLAGS(flags, bits) ((flags) &= ~(bits))
	109
	110	enum {
	111	DCBX_READ_LOCAL_MIB,
	112	DCBX_READ_REMOTE_MIB
	113	};
	114
	115	#define ETH_TYPE_FCOE (0x8906)
	116	#define TCP_PORT_ISCSI (0xCBC)
	117
	118	#define PFC_VALUE_FRAME_SIZE (512)
	119	#define PFC_QUANTA_IN_NANOSEC_FROM_SPEED_MEGA(mega_speed) \
	120	((1000 * PFC_VALUE_FRAME_SIZE)/(mega_speed))
	121
	122	#define PFC_BRB1_REG_HIGH_LLFC_LOW_THRESHOLD 130
	123	#define PFC_BRB1_REG_HIGH_LLFC_HIGH_THRESHOLD 170
	124
	125
	126
	127	struct cos_entry_help_data {
	128	u32 pri_join_mask;
	129	u32 cos_bw;
	130	u8 strict;
	131	bool pausable;
	132	};
	133
	134	struct cos_help_data {
	135	struct cos_entry_help_data data[E2_NUM_OF_COS];
	136	u8 num_of_cos;
	137	};
	138
	139	#define DCBX_ILLEGAL_PG (0xFF)
	140	#define DCBX_PFC_PRI_MASK (0xFF)
	141	#define DCBX_STRICT_PRIORITY (15)
	142	#define DCBX_INVALID_COS_BW (0xFFFFFFFF)
	143	#define DCBX_PFC_PRI_NON_PAUSE_MASK(bp) \
	144	((bp)->dcbx_port_params.pfc.priority_non_pauseable_mask)
	145	#define DCBX_PFC_PRI_PAUSE_MASK(bp) \
	146	((u8)~DCBX_PFC_PRI_NON_PAUSE_MASK(bp))
	147	#define DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri) \
148	((pg_pri) & (DCBX_PFC_PRI_PAUSE_MASK(bp)))
149	#define DCBX_PFC_PRI_GET_NON_PAUSE(bp, pg_pri) \
150	(DCBX_PFC_PRI_NON_PAUSE_MASK(bp) & (pg_pri))
151	#define IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pg_pri) \
152	(pg_pri == DCBX_PFC_PRI_GET_PAUSE((bp), (pg_pri)))
153	#define IS_DCBX_PFC_PRI_ONLY_NON_PAUSE(bp, pg_pri)\
154	((pg_pri) == DCBX_PFC_PRI_GET_NON_PAUSE((bp), (pg_pri)))
155	#define IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pg_pri) \
156	(!(IS_DCBX_PFC_PRI_ONLY_NON_PAUSE((bp), (pg_pri)) \|\| \
157	IS_DCBX_PFC_PRI_ONLY_PAUSE((bp), (pg_pri))))
158
159
160	struct pg_entry_help_data {
161	u8 num_of_dif_pri;
162	u8 pg;
163	u32 pg_priority;
164	};
165
166	struct pg_help_data {
167	struct pg_entry_help_data data[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
168	u8 num_of_pg;
169	};
170
171	/* forward DCB/PFC related declarations */
172	struct bnx2x;
173	void bnx2x_dcb_init_intmem_pfc(struct bnx2x *bp);
174	void bnx2x_dcbx_update(struct work_struct *work);
175	void bnx2x_dcbx_init_params(struct bnx2x *bp);
785b9b1a	176	void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled);
e4901dde VZ	177
	178	enum {
	179	BNX2X_DCBX_STATE_NEG_RECEIVED = 0x1,
fab0dc89 DK	180	#ifdef BCM_CNIC
	181	BNX2X_DCBX_STATE_ISCSI_STOPPED,
	182	#endif
	183	BNX2X_DCBX_STATE_TX_PAUSED,
	184	BNX2X_DCBX_STATE_TX_RELEASED
e4901dde	185	};
fab0dc89	186
e4901dde VZ	187	void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state);
e4901dde VZ	188
785b9b1a	189	/* DCB netlink */
98507672	190	#ifdef BCM_DCBNL
785b9b1a	191	extern const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops;
98507672 SR	192	int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall);
98507672 SR	193	#endif /* BCM_DCBNL */
785b9b1a	194
e4901dde	195	#endif /* BNX2X_DCB_H */