projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 881ff67a BS |
1 | /* |
| 2 | * CAN bus driver for Bosch C_CAN controller | |
| 3 | * | |
| 4 | * Copyright (C) 2010 ST Microelectronics | |
| 5 | * Bhupesh Sharma <bhupesh.sharma@st.com> | |
| 6 | * | |
| 7 | * Borrowed heavily from the C_CAN driver originally written by: | |
| 8 | * Copyright (C) 2007 | |
| 9 | * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de> | |
| 10 | * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch> | |
| 11 | * | |
| 12 | * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B. | |
| 13 | * Bosch C_CAN user manual can be obtained from: | |
| 14 | * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/ | |
| 15 | * users_manual_c_can.pdf | |
| 16 | * | |
| 17 | * This file is licensed under the terms of the GNU General Public | |
| 18 | * License version 2. This program is licensed "as is" without any | |
| 19 | * warranty of any kind, whether express or implied. | |
| 20 | */ | |
| 21 | ||
| 22 | #ifndef C_CAN_H | |
| 23 | #define C_CAN_H | |
| 24 | ||
| 33f81009 AC |
25 | enum reg { |
| 26 | C_CAN_CTRL_REG = 0, | |
| 27 | C_CAN_STS_REG, | |
| 28 | C_CAN_ERR_CNT_REG, | |
| 29 | C_CAN_BTR_REG, | |
| 30 | C_CAN_INT_REG, | |
| 31 | C_CAN_TEST_REG, | |
| 32 | C_CAN_BRPEXT_REG, | |
| 33 | C_CAN_IF1_COMREQ_REG, | |
| 34 | C_CAN_IF1_COMMSK_REG, | |
| 35 | C_CAN_IF1_MASK1_REG, | |
| 36 | C_CAN_IF1_MASK2_REG, | |
| 37 | C_CAN_IF1_ARB1_REG, | |
| 38 | C_CAN_IF1_ARB2_REG, | |
| 39 | C_CAN_IF1_MSGCTRL_REG, | |
| 40 | C_CAN_IF1_DATA1_REG, | |
| 41 | C_CAN_IF1_DATA2_REG, | |
| 42 | C_CAN_IF1_DATA3_REG, | |
| 43 | C_CAN_IF1_DATA4_REG, | |
| 44 | C_CAN_IF2_COMREQ_REG, | |
| 45 | C_CAN_IF2_COMMSK_REG, | |
| 46 | C_CAN_IF2_MASK1_REG, | |
| 47 | C_CAN_IF2_MASK2_REG, | |
| 48 | C_CAN_IF2_ARB1_REG, | |
| 49 | C_CAN_IF2_ARB2_REG, | |
| 50 | C_CAN_IF2_MSGCTRL_REG, | |
| 51 | C_CAN_IF2_DATA1_REG, | |
| 52 | C_CAN_IF2_DATA2_REG, | |
| 53 | C_CAN_IF2_DATA3_REG, | |
| 54 | C_CAN_IF2_DATA4_REG, | |
| 55 | C_CAN_TXRQST1_REG, | |
| 56 | C_CAN_TXRQST2_REG, | |
| 57 | C_CAN_NEWDAT1_REG, | |
| 58 | C_CAN_NEWDAT2_REG, | |
| 59 | C_CAN_INTPND1_REG, | |
| 60 | C_CAN_INTPND2_REG, | |
| 61 | C_CAN_MSGVAL1_REG, | |
| 62 | C_CAN_MSGVAL2_REG, | |
| 881ff67a BS |
63 | }; |
| 64 | ||
| 33f81009 AC |
65 | static const u16 reg_map_c_can[] = { |
| 66 | [C_CAN_CTRL_REG] = 0x00, | |
| 67 | [C_CAN_STS_REG] = 0x02, | |
| 68 | [C_CAN_ERR_CNT_REG] = 0x04, | |
| 69 | [C_CAN_BTR_REG] = 0x06, | |
| 70 | [C_CAN_INT_REG] = 0x08, | |
| 71 | [C_CAN_TEST_REG] = 0x0A, | |
| 72 | [C_CAN_BRPEXT_REG] = 0x0C, | |
| 73 | [C_CAN_IF1_COMREQ_REG] = 0x10, | |
| 74 | [C_CAN_IF1_COMMSK_REG] = 0x12, | |
| 75 | [C_CAN_IF1_MASK1_REG] = 0x14, | |
| 76 | [C_CAN_IF1_MASK2_REG] = 0x16, | |
| 77 | [C_CAN_IF1_ARB1_REG] = 0x18, | |
| 78 | [C_CAN_IF1_ARB2_REG] = 0x1A, | |
| 79 | [C_CAN_IF1_MSGCTRL_REG] = 0x1C, | |
| 80 | [C_CAN_IF1_DATA1_REG] = 0x1E, | |
| 81 | [C_CAN_IF1_DATA2_REG] = 0x20, | |
| 82 | [C_CAN_IF1_DATA3_REG] = 0x22, | |
| 83 | [C_CAN_IF1_DATA4_REG] = 0x24, | |
| 84 | [C_CAN_IF2_COMREQ_REG] = 0x40, | |
| 85 | [C_CAN_IF2_COMMSK_REG] = 0x42, | |
| 86 | [C_CAN_IF2_MASK1_REG] = 0x44, | |
| 87 | [C_CAN_IF2_MASK2_REG] = 0x46, | |
| 88 | [C_CAN_IF2_ARB1_REG] = 0x48, | |
| 89 | [C_CAN_IF2_ARB2_REG] = 0x4A, | |
| 90 | [C_CAN_IF2_MSGCTRL_REG] = 0x4C, | |
| 91 | [C_CAN_IF2_DATA1_REG] = 0x4E, | |
| 92 | [C_CAN_IF2_DATA2_REG] = 0x50, | |
| 93 | [C_CAN_IF2_DATA3_REG] = 0x52, | |
| 94 | [C_CAN_IF2_DATA4_REG] = 0x54, | |
| 95 | [C_CAN_TXRQST1_REG] = 0x80, | |
| 96 | [C_CAN_TXRQST2_REG] = 0x82, | |
| 97 | [C_CAN_NEWDAT1_REG] = 0x90, | |
| 98 | [C_CAN_NEWDAT2_REG] = 0x92, | |
| 99 | [C_CAN_INTPND1_REG] = 0xA0, | |
| 100 | [C_CAN_INTPND2_REG] = 0xA2, | |
| 101 | [C_CAN_MSGVAL1_REG] = 0xB0, | |
| 102 | [C_CAN_MSGVAL2_REG] = 0xB2, | |
| 881ff67a BS |
103 | }; |
| 104 | ||
| 105 | /* c_can private data structure */ | |
| 106 | struct c_can_priv { | |
| 107 | struct can_priv can; /* must be the first member */ | |
| 108 | struct napi_struct napi; | |
| 109 | struct net_device *dev; | |
| 110 | int tx_object; | |
| 111 | int current_status; | |
| 112 | int last_status; | |
| 33f81009 AC |
113 | u16 (*read_reg) (struct c_can_priv *priv, enum reg index); |
| 114 | void (*write_reg) (struct c_can_priv *priv, enum reg index, u16 val); | |
| 115 | void __iomem *base; | |
| 116 | const u16 *regs; | |
| 881ff67a BS |
117 | unsigned long irq_flags; /* for request_irq() */ |
| 118 | unsigned int tx_next; | |
| 119 | unsigned int tx_echo; | |
| 120 | void *priv; /* for board-specific data */ | |
| 148c87c8 | 121 | u16 irqstatus; |
| 881ff67a BS |
122 | }; |
| 123 | ||
| 124 | struct net_device *alloc_c_can_dev(void); | |
| 125 | void free_c_can_dev(struct net_device *dev); | |
| 126 | int register_c_can_dev(struct net_device *dev); | |
| 127 | void unregister_c_can_dev(struct net_device *dev); | |
| 128 | ||
| 129 | #endif /* C_CAN_H */ |