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8199d3a7 CL |
1 | /***************************************************************************** |
2 | * * | |
3 | * File: common.h * | |
559fb51b SB |
4 | * $Revision: 1.21 $ * |
5 | * $Date: 2005/06/22 00:43:25 $ * | |
8199d3a7 CL |
6 | * Description: * |
7 | * part of the Chelsio 10Gb Ethernet Driver. * | |
8 | * * | |
9 | * This program is free software; you can redistribute it and/or modify * | |
10 | * it under the terms of the GNU General Public License, version 2, as * | |
11 | * published by the Free Software Foundation. * | |
12 | * * | |
13 | * You should have received a copy of the GNU General Public License along * | |
14 | * with this program; if not, write to the Free Software Foundation, Inc., * | |
15 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * | |
16 | * * | |
17 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED * | |
18 | * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF * | |
19 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. * | |
20 | * * | |
21 | * http://www.chelsio.com * | |
22 | * * | |
23 | * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. * | |
24 | * All rights reserved. * | |
25 | * * | |
26 | * Maintainers: maintainers@chelsio.com * | |
27 | * * | |
28 | * Authors: Dimitrios Michailidis <dm@chelsio.com> * | |
29 | * Tina Yang <tainay@chelsio.com> * | |
30 | * Felix Marti <felix@chelsio.com> * | |
31 | * Scott Bardone <sbardone@chelsio.com> * | |
32 | * Kurt Ottaway <kottaway@chelsio.com> * | |
33 | * Frank DiMambro <frank@chelsio.com> * | |
34 | * * | |
35 | * History: * | |
36 | * * | |
37 | ****************************************************************************/ | |
38 | ||
559fb51b SB |
39 | #ifndef _CXGB_COMMON_H_ |
40 | #define _CXGB_COMMON_H_ | |
41 | ||
559fb51b SB |
42 | #include <linux/module.h> |
43 | #include <linux/netdevice.h> | |
44 | #include <linux/types.h> | |
45 | #include <linux/delay.h> | |
46 | #include <linux/pci.h> | |
47 | #include <linux/ethtool.h> | |
48 | #include <linux/mii.h> | |
49 | #include <linux/crc32.h> | |
50 | #include <linux/init.h> | |
51 | #include <asm/io.h> | |
52 | #include <linux/pci_ids.h> | |
53 | ||
54 | #define DRV_DESCRIPTION "Chelsio 10Gb Ethernet Driver" | |
55 | #define DRV_NAME "cxgb" | |
56 | #define DRV_VERSION "2.1.1" | |
57 | #define PFX DRV_NAME ": " | |
58 | ||
59 | #define CH_ERR(fmt, ...) printk(KERN_ERR PFX fmt, ## __VA_ARGS__) | |
60 | #define CH_WARN(fmt, ...) printk(KERN_WARNING PFX fmt, ## __VA_ARGS__) | |
61 | #define CH_ALERT(fmt, ...) printk(KERN_ALERT PFX fmt, ## __VA_ARGS__) | |
62 | ||
63 | #define CH_DEVICE(devid, ssid, idx) \ | |
64 | { PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, ssid, 0, 0, idx } | |
65 | ||
66 | #define SUPPORTED_PAUSE (1 << 13) | |
67 | #define SUPPORTED_LOOPBACK (1 << 15) | |
68 | ||
69 | #define ADVERTISED_PAUSE (1 << 13) | |
70 | #define ADVERTISED_ASYM_PAUSE (1 << 14) | |
71 | ||
72 | typedef struct adapter adapter_t; | |
73 | ||
74 | void t1_elmer0_ext_intr(adapter_t *adapter); | |
75 | void t1_link_changed(adapter_t *adapter, int port_id, int link_status, | |
76 | int speed, int duplex, int fc); | |
77 | ||
78 | struct t1_rx_mode { | |
79 | struct net_device *dev; | |
80 | u32 idx; | |
81 | struct dev_mc_list *list; | |
82 | }; | |
83 | ||
84 | #define t1_rx_mode_promisc(rm) (rm->dev->flags & IFF_PROMISC) | |
85 | #define t1_rx_mode_allmulti(rm) (rm->dev->flags & IFF_ALLMULTI) | |
86 | #define t1_rx_mode_mc_cnt(rm) (rm->dev->mc_count) | |
87 | ||
88 | static inline u8 *t1_get_next_mcaddr(struct t1_rx_mode *rm) | |
89 | { | |
91fb4c96 | 90 | u8 *addr = NULL; |
8199d3a7 | 91 | |
559fb51b SB |
92 | if (rm->idx++ < rm->dev->mc_count) { |
93 | addr = rm->list->dmi_addr; | |
94 | rm->list = rm->list->next; | |
95 | } | |
96 | return addr; | |
97 | } | |
98 | ||
99 | #define MAX_NPORTS 4 | |
8199d3a7 | 100 | |
559fb51b SB |
101 | #define SPEED_INVALID 0xffff |
102 | #define DUPLEX_INVALID 0xff | |
8199d3a7 CL |
103 | |
104 | enum { | |
8199d3a7 | 105 | CHBT_BOARD_N110, |
559fb51b | 106 | CHBT_BOARD_N210 |
8199d3a7 CL |
107 | }; |
108 | ||
109 | enum { | |
8199d3a7 | 110 | CHBT_TERM_T1, |
559fb51b | 111 | CHBT_TERM_T2 |
8199d3a7 CL |
112 | }; |
113 | ||
114 | enum { | |
8199d3a7 | 115 | CHBT_MAC_PM3393, |
8199d3a7 CL |
116 | }; |
117 | ||
118 | enum { | |
8199d3a7 | 119 | CHBT_PHY_88X2010, |
8199d3a7 CL |
120 | }; |
121 | ||
122 | enum { | |
559fb51b SB |
123 | PAUSE_RX = 1 << 0, |
124 | PAUSE_TX = 1 << 1, | |
125 | PAUSE_AUTONEG = 1 << 2 | |
8199d3a7 CL |
126 | }; |
127 | ||
128 | /* Revisions of T1 chip */ | |
559fb51b SB |
129 | enum { |
130 | TERM_T1A = 0, | |
131 | TERM_T1B = 1, | |
132 | TERM_T2 = 3 | |
8199d3a7 CL |
133 | }; |
134 | ||
135 | struct sge_params { | |
136 | unsigned int cmdQ_size[2]; | |
137 | unsigned int freelQ_size[2]; | |
138 | unsigned int large_buf_capacity; | |
139 | unsigned int rx_coalesce_usecs; | |
140 | unsigned int last_rx_coalesce_raw; | |
141 | unsigned int default_rx_coalesce_usecs; | |
142 | unsigned int sample_interval_usecs; | |
143 | unsigned int coalesce_enable; | |
144 | unsigned int polling; | |
145 | }; | |
146 | ||
559fb51b | 147 | struct chelsio_pci_params { |
8199d3a7 CL |
148 | unsigned short speed; |
149 | unsigned char width; | |
150 | unsigned char is_pcix; | |
151 | }; | |
152 | ||
153 | struct adapter_params { | |
154 | struct sge_params sge; | |
559fb51b | 155 | struct chelsio_pci_params pci; |
8199d3a7 CL |
156 | |
157 | const struct board_info *brd_info; | |
158 | ||
559fb51b | 159 | unsigned int nports; /* # of ethernet ports */ |
8199d3a7 CL |
160 | unsigned int stats_update_period; |
161 | unsigned short chip_revision; | |
162 | unsigned char chip_version; | |
8199d3a7 CL |
163 | }; |
164 | ||
165 | struct link_config { | |
166 | unsigned int supported; /* link capabilities */ | |
167 | unsigned int advertising; /* advertised capabilities */ | |
168 | unsigned short requested_speed; /* speed user has requested */ | |
169 | unsigned short speed; /* actual link speed */ | |
170 | unsigned char requested_duplex; /* duplex user has requested */ | |
171 | unsigned char duplex; /* actual link duplex */ | |
172 | unsigned char requested_fc; /* flow control user has requested */ | |
173 | unsigned char fc; /* actual link flow control */ | |
174 | unsigned char autoneg; /* autonegotiating? */ | |
175 | }; | |
176 | ||
559fb51b SB |
177 | struct cmac; |
178 | struct cphy; | |
179 | ||
180 | struct port_info { | |
181 | struct net_device *dev; | |
182 | struct cmac *mac; | |
183 | struct cphy *phy; | |
184 | struct link_config link_config; | |
185 | struct net_device_stats netstats; | |
186 | }; | |
187 | ||
188 | struct sge; | |
189 | struct peespi; | |
190 | ||
191 | struct adapter { | |
91fb4c96 | 192 | u8 __iomem *regs; |
559fb51b SB |
193 | struct pci_dev *pdev; |
194 | unsigned long registered_device_map; | |
195 | unsigned long open_device_map; | |
196 | unsigned long flags; | |
197 | ||
198 | const char *name; | |
199 | int msg_enable; | |
200 | u32 mmio_len; | |
201 | ||
202 | struct work_struct ext_intr_handler_task; | |
203 | struct adapter_params params; | |
204 | ||
205 | struct vlan_group *vlan_grp; | |
206 | ||
207 | /* Terminator modules. */ | |
208 | struct sge *sge; | |
209 | struct peespi *espi; | |
210 | ||
211 | struct port_info port[MAX_NPORTS]; | |
c4028958 | 212 | struct delayed_work stats_update_task; |
559fb51b SB |
213 | struct timer_list stats_update_timer; |
214 | ||
215 | struct semaphore mib_mutex; | |
216 | spinlock_t tpi_lock; | |
217 | spinlock_t work_lock; | |
218 | /* guards async operations */ | |
219 | spinlock_t async_lock ____cacheline_aligned; | |
220 | u32 slow_intr_mask; | |
221 | }; | |
222 | ||
223 | enum { /* adapter flags */ | |
224 | FULL_INIT_DONE = 1 << 0, | |
225 | TSO_CAPABLE = 1 << 2, | |
226 | TCP_CSUM_CAPABLE = 1 << 3, | |
227 | UDP_CSUM_CAPABLE = 1 << 4, | |
228 | VLAN_ACCEL_CAPABLE = 1 << 5, | |
229 | RX_CSUM_ENABLED = 1 << 6, | |
230 | }; | |
8199d3a7 CL |
231 | |
232 | struct mdio_ops; | |
233 | struct gmac; | |
234 | struct gphy; | |
235 | ||
236 | struct board_info { | |
237 | unsigned char board; | |
238 | unsigned char port_number; | |
239 | unsigned long caps; | |
240 | unsigned char chip_term; | |
241 | unsigned char chip_mac; | |
242 | unsigned char chip_phy; | |
243 | unsigned int clock_core; | |
244 | unsigned int clock_mc3; | |
245 | unsigned int clock_mc4; | |
246 | unsigned int espi_nports; | |
247 | unsigned int clock_cspi; | |
248 | unsigned int clock_elmer0; | |
249 | unsigned char mdio_mdien; | |
250 | unsigned char mdio_mdiinv; | |
251 | unsigned char mdio_mdc; | |
252 | unsigned char mdio_phybaseaddr; | |
253 | struct gmac *gmac; | |
254 | struct gphy *gphy; | |
255 | struct mdio_ops *mdio_ops; | |
256 | const char *desc; | |
257 | }; | |
258 | ||
8199d3a7 CL |
259 | extern struct pci_device_id t1_pci_tbl[]; |
260 | ||
8199d3a7 CL |
261 | static inline int adapter_matches_type(const adapter_t *adapter, |
262 | int version, int revision) | |
263 | { | |
264 | return adapter->params.chip_version == version && | |
265 | adapter->params.chip_revision == revision; | |
266 | } | |
267 | ||
268 | #define t1_is_T1B(adap) adapter_matches_type(adap, CHBT_TERM_T1, TERM_T1B) | |
269 | #define is_T2(adap) adapter_matches_type(adap, CHBT_TERM_T2, TERM_T2) | |
270 | ||
271 | /* Returns true if an adapter supports VLAN acceleration and TSO */ | |
272 | static inline int vlan_tso_capable(const adapter_t *adapter) | |
273 | { | |
274 | return !t1_is_T1B(adapter); | |
275 | } | |
276 | ||
277 | #define for_each_port(adapter, iter) \ | |
278 | for (iter = 0; iter < (adapter)->params.nports; ++iter) | |
279 | ||
280 | #define board_info(adapter) ((adapter)->params.brd_info) | |
281 | #define is_10G(adapter) (board_info(adapter)->caps & SUPPORTED_10000baseT_Full) | |
282 | ||
283 | static inline unsigned int core_ticks_per_usec(const adapter_t *adap) | |
284 | { | |
285 | return board_info(adap)->clock_core / 1000000; | |
286 | } | |
287 | ||
559fb51b SB |
288 | extern int t1_tpi_write(adapter_t *adapter, u32 addr, u32 value); |
289 | extern int t1_tpi_read(adapter_t *adapter, u32 addr, u32 *value); | |
8199d3a7 | 290 | |
559fb51b SB |
291 | extern void t1_interrupts_enable(adapter_t *adapter); |
292 | extern void t1_interrupts_disable(adapter_t *adapter); | |
293 | extern void t1_interrupts_clear(adapter_t *adapter); | |
294 | extern int elmer0_ext_intr_handler(adapter_t *adapter); | |
295 | extern int t1_slow_intr_handler(adapter_t *adapter); | |
8199d3a7 | 296 | |
559fb51b SB |
297 | extern int t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc); |
298 | extern const struct board_info *t1_get_board_info(unsigned int board_id); | |
299 | extern const struct board_info *t1_get_board_info_from_ids(unsigned int devid, | |
8199d3a7 | 300 | unsigned short ssid); |
559fb51b SB |
301 | extern int t1_seeprom_read(adapter_t *adapter, u32 addr, u32 *data); |
302 | extern int t1_get_board_rev(adapter_t *adapter, const struct board_info *bi, | |
8199d3a7 | 303 | struct adapter_params *p); |
559fb51b SB |
304 | extern int t1_init_hw_modules(adapter_t *adapter); |
305 | extern int t1_init_sw_modules(adapter_t *adapter, const struct board_info *bi); | |
306 | extern void t1_free_sw_modules(adapter_t *adapter); | |
307 | extern void t1_fatal_err(adapter_t *adapter); | |
308 | ||
309 | extern void t1_tp_set_udp_checksum_offload(adapter_t *adapter, int enable); | |
310 | extern void t1_tp_set_tcp_checksum_offload(adapter_t *adapter, int enable); | |
311 | extern void t1_tp_set_ip_checksum_offload(adapter_t *adapter, int enable); | |
8199d3a7 | 312 | |
559fb51b | 313 | #endif /* _CXGB_COMMON_H_ */ |