DM9000 use dev_xxx() instead of printk for output.
[deliverable/linux.git] / drivers / net / dm9000.c
CommitLineData
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1/*
2 * dm9000.c: Version 1.2 03/18/2003
3 *
4 * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
5 * Copyright (C) 1997 Sten Wang
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
18 *
19 * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
20 * 06/22/2001 Support DM9801 progrmming
21 * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
22 * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
23 * R17 = (R17 & 0xfff0) | NF + 3
24 * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
25 * R17 = (R17 & 0xfff0) | NF
26 *
27 * v1.00 modify by simon 2001.9.5
28 * change for kernel 2.4.x
29 *
30 * v1.1 11/09/2001 fix force mode bug
31 *
32 * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
33 * Fixed phy reset.
34 * Added tx/rx 32 bit mode.
35 * Cleaned up for kernel merge.
36 *
37 * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de>
38 * Port to 2.6 kernel
39 *
40 * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk>
41 * Cleanup of code to remove ifdefs
42 * Allowed platform device data to influence access width
43 * Reformatting areas of code
44 *
45 * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de>
46 * * removed 2.4 style module parameters
47 * * removed removed unused stat counter and fixed
48 * net_device_stats
49 * * introduced tx_timeout function
50 * * reworked locking
9ef9ac51
BD
51 *
52 * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk>
53 * * fixed spinlock call without pointer
54 * * ensure spinlock is initialised
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55 */
56
57#include <linux/module.h>
58#include <linux/ioport.h>
59#include <linux/netdevice.h>
60#include <linux/etherdevice.h>
61#include <linux/init.h>
62#include <linux/skbuff.h>
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63#include <linux/spinlock.h>
64#include <linux/crc32.h>
65#include <linux/mii.h>
66#include <linux/dm9000.h>
67#include <linux/delay.h>
d052d1be 68#include <linux/platform_device.h>
4e4fc05a 69#include <linux/irq.h>
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70
71#include <asm/delay.h>
72#include <asm/irq.h>
73#include <asm/io.h>
74
75#include "dm9000.h"
76
77/* Board/System/Debug information/definition ---------------- */
78
79#define DM9000_PHY 0x40 /* PHY address 0x01 */
80
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81#define CARDNAME "dm9000"
82#define PFX CARDNAME ": "
83
84#define DM9000_TIMER_WUT jiffies+(HZ*2) /* timer wakeup time : 2 second */
85
86#define DM9000_DEBUG 0
87
88#if DM9000_DEBUG > 2
89#define PRINTK3(args...) printk(CARDNAME ": " args)
90#else
91#define PRINTK3(args...) do { } while(0)
92#endif
93
94#if DM9000_DEBUG > 1
95#define PRINTK2(args...) printk(CARDNAME ": " args)
96#else
97#define PRINTK2(args...) do { } while(0)
98#endif
99
100#if DM9000_DEBUG > 0
101#define PRINTK1(args...) printk(CARDNAME ": " args)
102#define PRINTK(args...) printk(CARDNAME ": " args)
103#else
104#define PRINTK1(args...) do { } while(0)
105#define PRINTK(args...) printk(KERN_DEBUG args)
106#endif
107
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108#ifdef CONFIG_BLACKFIN
109#define readsb insb
110#define readsw insw
111#define readsl insl
112#define writesb outsb
113#define writesw outsw
114#define writesl outsl
115#define DM9000_IRQ_FLAGS (IRQF_SHARED | IRQF_TRIGGER_HIGH)
116#else
4e4fc05a 117#define DM9000_IRQ_FLAGS (IRQF_SHARED | IRQT_RISING)
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118#endif
119
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120/*
121 * Transmit timeout, default 5 seconds.
122 */
123static int watchdog = 5000;
124module_param(watchdog, int, 0400);
125MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
126
127/* Structure/enum declaration ------------------------------- */
128typedef struct board_info {
129
130 void __iomem *io_addr; /* Register I/O base address */
131 void __iomem *io_data; /* Data I/O address */
132 u16 irq; /* IRQ */
133
134 u16 tx_pkt_cnt;
135 u16 queue_pkt_len;
136 u16 queue_start_addr;
137 u16 dbug_cnt;
138 u8 io_mode; /* 0:word, 2:byte */
139 u8 phy_addr;
33ba5091 140 unsigned int flags;
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141
142 void (*inblk)(void __iomem *port, void *data, int length);
143 void (*outblk)(void __iomem *port, void *data, int length);
144 void (*dumpblk)(void __iomem *port, int length);
145
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146 struct device *dev; /* parent device */
147
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148 struct resource *addr_res; /* resources found */
149 struct resource *data_res;
150 struct resource *addr_req; /* resources requested */
151 struct resource *data_req;
152 struct resource *irq_res;
153
154 struct timer_list timer;
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155 unsigned char srom[128];
156 spinlock_t lock;
157
158 struct mii_if_info mii;
159 u32 msg_enable;
160} board_info_t;
161
162/* function declaration ------------------------------------- */
3ae5eaec 163static int dm9000_probe(struct platform_device *);
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164static int dm9000_open(struct net_device *);
165static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
166static int dm9000_stop(struct net_device *);
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167
168
169static void dm9000_timer(unsigned long);
170static void dm9000_init_dm9000(struct net_device *);
171
7d12e780 172static irqreturn_t dm9000_interrupt(int, void *);
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173
174static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
175static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
176 int value);
177static u16 read_srom_word(board_info_t *, int);
178static void dm9000_rx(struct net_device *);
179static void dm9000_hash_table(struct net_device *);
180
181//#define DM9000_PROGRAM_EEPROM
182#ifdef DM9000_PROGRAM_EEPROM
183static void program_eeprom(board_info_t * db);
184#endif
185/* DM9000 network board routine ---------------------------- */
186
187static void
188dm9000_reset(board_info_t * db)
189{
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190 dev_dbg(db->dev, "resetting device\n");
191
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192 /* RESET device */
193 writeb(DM9000_NCR, db->io_addr);
194 udelay(200);
195 writeb(NCR_RST, db->io_data);
196 udelay(200);
197}
198
199/*
200 * Read a byte from I/O port
201 */
202static u8
203ior(board_info_t * db, int reg)
204{
205 writeb(reg, db->io_addr);
206 return readb(db->io_data);
207}
208
209/*
210 * Write a byte to I/O port
211 */
212
213static void
214iow(board_info_t * db, int reg, int value)
215{
216 writeb(reg, db->io_addr);
217 writeb(value, db->io_data);
218}
219
220/* routines for sending block to chip */
221
222static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
223{
224 writesb(reg, data, count);
225}
226
227static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
228{
229 writesw(reg, data, (count+1) >> 1);
230}
231
232static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
233{
234 writesl(reg, data, (count+3) >> 2);
235}
236
237/* input block from chip to memory */
238
239static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
240{
5f6b5517 241 readsb(reg, data, count);
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242}
243
244
245static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
246{
247 readsw(reg, data, (count+1) >> 1);
248}
249
250static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
251{
252 readsl(reg, data, (count+3) >> 2);
253}
254
255/* dump block from chip to null */
256
257static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
258{
259 int i;
260 int tmp;
261
262 for (i = 0; i < count; i++)
263 tmp = readb(reg);
264}
265
266static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
267{
268 int i;
269 int tmp;
270
271 count = (count + 1) >> 1;
272
273 for (i = 0; i < count; i++)
274 tmp = readw(reg);
275}
276
277static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
278{
279 int i;
280 int tmp;
281
282 count = (count + 3) >> 2;
283
284 for (i = 0; i < count; i++)
285 tmp = readl(reg);
286}
287
288/* dm9000_set_io
289 *
290 * select the specified set of io routines to use with the
291 * device
292 */
293
294static void dm9000_set_io(struct board_info *db, int byte_width)
295{
296 /* use the size of the data resource to work out what IO
297 * routines we want to use
298 */
299
300 switch (byte_width) {
301 case 1:
302 db->dumpblk = dm9000_dumpblk_8bit;
303 db->outblk = dm9000_outblk_8bit;
304 db->inblk = dm9000_inblk_8bit;
305 break;
306
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307
308 case 3:
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309 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
310 case 2:
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311 db->dumpblk = dm9000_dumpblk_16bit;
312 db->outblk = dm9000_outblk_16bit;
313 db->inblk = dm9000_inblk_16bit;
314 break;
315
316 case 4:
317 default:
318 db->dumpblk = dm9000_dumpblk_32bit;
319 db->outblk = dm9000_outblk_32bit;
320 db->inblk = dm9000_inblk_32bit;
321 break;
322 }
323}
324
325
326/* Our watchdog timed out. Called by the networking layer */
327static void dm9000_timeout(struct net_device *dev)
328{
329 board_info_t *db = (board_info_t *) dev->priv;
330 u8 reg_save;
331 unsigned long flags;
332
333 /* Save previous register address */
334 reg_save = readb(db->io_addr);
9ef9ac51 335 spin_lock_irqsave(&db->lock,flags);
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336
337 netif_stop_queue(dev);
338 dm9000_reset(db);
339 dm9000_init_dm9000(dev);
340 /* We can accept TX packets again */
341 dev->trans_start = jiffies;
342 netif_wake_queue(dev);
343
344 /* Restore previous register address */
345 writeb(reg_save, db->io_addr);
9ef9ac51 346 spin_unlock_irqrestore(&db->lock,flags);
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347}
348
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349#ifdef CONFIG_NET_POLL_CONTROLLER
350/*
351 *Used by netconsole
352 */
353static void dm9000_poll_controller(struct net_device *dev)
354{
355 disable_irq(dev->irq);
28431146 356 dm9000_interrupt(dev->irq,dev);
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357 enable_irq(dev->irq);
358}
359#endif
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360
361/* dm9000_release_board
362 *
363 * release a board, and any mapped resources
364 */
365
366static void
367dm9000_release_board(struct platform_device *pdev, struct board_info *db)
368{
369 if (db->data_res == NULL) {
370 if (db->addr_res != NULL)
371 release_mem_region((unsigned long)db->io_addr, 4);
372 return;
373 }
374
375 /* unmap our resources */
376
377 iounmap(db->io_addr);
378 iounmap(db->io_data);
379
380 /* release the resources */
381
382 if (db->data_req != NULL) {
383 release_resource(db->data_req);
384 kfree(db->data_req);
385 }
386
51985487
DO
387 if (db->addr_req != NULL) {
388 release_resource(db->addr_req);
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389 kfree(db->addr_req);
390 }
391}
392
393#define res_size(_r) (((_r)->end - (_r)->start) + 1)
394
395/*
396 * Search DM9000 board, allocate space and register it
397 */
398static int
3ae5eaec 399dm9000_probe(struct platform_device *pdev)
a1365275 400{
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401 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
402 struct board_info *db; /* Point a board information structure */
403 struct net_device *ndev;
404 unsigned long base;
405 int ret = 0;
406 int iosize;
407 int i;
408 u32 id_val;
409
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410 /* Init network device */
411 ndev = alloc_etherdev(sizeof (struct board_info));
412 if (!ndev) {
a76836f9 413 dev_err(&pdev->dev, "could not allocate device.\n");
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414 return -ENOMEM;
415 }
416
3ae5eaec 417 SET_NETDEV_DEV(ndev, &pdev->dev);
a1365275 418
a76836f9 419 dev_dbg(&pdev->dev, "dm9000_probe()");
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420
421 /* setup board info structure */
422 db = (struct board_info *) ndev->priv;
423 memset(db, 0, sizeof (*db));
424
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425 db->dev = &pdev->dev;
426
9ef9ac51
BD
427 spin_lock_init(&db->lock);
428
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429 if (pdev->num_resources < 2) {
430 ret = -ENODEV;
431 goto out;
b4ed03ff 432 } else if (pdev->num_resources == 2) {
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433 base = pdev->resource[0].start;
434
435 if (!request_mem_region(base, 4, ndev->name)) {
436 ret = -EBUSY;
437 goto out;
438 }
439
440 ndev->base_addr = base;
441 ndev->irq = pdev->resource[1].start;
b4ed03ff
BD
442 db->io_addr = (void __iomem *)base;
443 db->io_data = (void __iomem *)(base + 4);
a1365275 444
f40d24d9
AL
445 /* ensure at least we have a default set of IO routines */
446 dm9000_set_io(db, 2);
447
b4ed03ff 448 } else {
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449 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
450 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
451 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
452
b4ed03ff
BD
453 if (db->addr_res == NULL || db->data_res == NULL ||
454 db->irq_res == NULL) {
a76836f9 455 dev_err(db->dev, "insufficient resources\n");
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456 ret = -ENOENT;
457 goto out;
458 }
459
460 i = res_size(db->addr_res);
461 db->addr_req = request_mem_region(db->addr_res->start, i,
462 pdev->name);
463
464 if (db->addr_req == NULL) {
a76836f9 465 dev_err(db->dev, "cannot claim address reg area\n");
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466 ret = -EIO;
467 goto out;
468 }
469
470 db->io_addr = ioremap(db->addr_res->start, i);
471
472 if (db->io_addr == NULL) {
a76836f9 473 dev_err(db->dev, "failed to ioremap address reg\n");
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474 ret = -EINVAL;
475 goto out;
476 }
477
478 iosize = res_size(db->data_res);
479 db->data_req = request_mem_region(db->data_res->start, iosize,
480 pdev->name);
481
482 if (db->data_req == NULL) {
a76836f9 483 dev_err(db->dev, "cannot claim data reg area\n");
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484 ret = -EIO;
485 goto out;
486 }
487
488 db->io_data = ioremap(db->data_res->start, iosize);
489
490 if (db->io_data == NULL) {
a76836f9 491 dev_err(db->dev,"failed to ioremap data reg\n");
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492 ret = -EINVAL;
493 goto out;
494 }
495
496 /* fill in parameters for net-dev structure */
497
498 ndev->base_addr = (unsigned long)db->io_addr;
499 ndev->irq = db->irq_res->start;
500
501 /* ensure at least we have a default set of IO routines */
502 dm9000_set_io(db, iosize);
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503 }
504
505 /* check to see if anything is being over-ridden */
506 if (pdata != NULL) {
507 /* check to see if the driver wants to over-ride the
508 * default IO width */
509
510 if (pdata->flags & DM9000_PLATF_8BITONLY)
511 dm9000_set_io(db, 1);
512
513 if (pdata->flags & DM9000_PLATF_16BITONLY)
514 dm9000_set_io(db, 2);
515
516 if (pdata->flags & DM9000_PLATF_32BITONLY)
517 dm9000_set_io(db, 4);
518
519 /* check to see if there are any IO routine
520 * over-rides */
521
522 if (pdata->inblk != NULL)
523 db->inblk = pdata->inblk;
524
525 if (pdata->outblk != NULL)
526 db->outblk = pdata->outblk;
527
528 if (pdata->dumpblk != NULL)
529 db->dumpblk = pdata->dumpblk;
33ba5091
BD
530
531 db->flags = pdata->flags;
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SH
532 }
533
534 dm9000_reset(db);
535
536 /* try two times, DM9000 sometimes gets the first read wrong */
537 for (i = 0; i < 2; i++) {
538 id_val = ior(db, DM9000_VIDL);
539 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
540 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
541 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
542
543 if (id_val == DM9000_ID)
544 break;
a76836f9 545 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
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546 }
547
548 if (id_val != DM9000_ID) {
a76836f9 549 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
418d6f87
MR
550 ret = -ENODEV;
551 goto out;
a1365275
SH
552 }
553
554 /* from this point we assume that we have found a DM9000 */
555
556 /* driver system function */
557 ether_setup(ndev);
558
559 ndev->open = &dm9000_open;
560 ndev->hard_start_xmit = &dm9000_start_xmit;
561 ndev->tx_timeout = &dm9000_timeout;
562 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
563 ndev->stop = &dm9000_stop;
a1365275 564 ndev->set_multicast_list = &dm9000_hash_table;
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KH
565#ifdef CONFIG_NET_POLL_CONTROLLER
566 ndev->poll_controller = &dm9000_poll_controller;
567#endif
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568
569#ifdef DM9000_PROGRAM_EEPROM
570 program_eeprom(db);
571#endif
572 db->msg_enable = NETIF_MSG_LINK;
573 db->mii.phy_id_mask = 0x1f;
574 db->mii.reg_num_mask = 0x1f;
575 db->mii.force_media = 0;
576 db->mii.full_duplex = 0;
577 db->mii.dev = ndev;
578 db->mii.mdio_read = dm9000_phy_read;
579 db->mii.mdio_write = dm9000_phy_write;
580
581 /* Read SROM content */
582 for (i = 0; i < 64; i++)
583 ((u16 *) db->srom)[i] = read_srom_word(db, i);
584
585 /* Set Node Address */
586 for (i = 0; i < 6; i++)
587 ndev->dev_addr[i] = db->srom[i];
588
5b55dda6
BD
589 if (!is_valid_ether_addr(ndev->dev_addr)) {
590 /* try reading from mac */
591
592 for (i = 0; i < 6; i++)
593 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
594 }
595
a1365275 596 if (!is_valid_ether_addr(ndev->dev_addr))
a76836f9
BD
597 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
598 "set using ifconfig\n", ndev->name);
a1365275 599
3ae5eaec 600 platform_set_drvdata(pdev, ndev);
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SH
601 ret = register_netdev(ndev);
602
603 if (ret == 0) {
0795af57
JP
604 DECLARE_MAC_BUF(mac);
605 printk("%s: dm9000 at %p,%p IRQ %d MAC: %s\n",
606 ndev->name, db->io_addr, db->io_data, ndev->irq,
607 print_mac(mac, ndev->dev_addr));
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SH
608 }
609 return 0;
610
418d6f87 611out:
a76836f9 612 dev_err(db->dev, "not found (%d).\n", ret);
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SH
613
614 dm9000_release_board(pdev, db);
9fd9f9b6 615 free_netdev(ndev);
a1365275
SH
616
617 return ret;
618}
619
620/*
621 * Open the interface.
622 * The interface is opened whenever "ifconfig" actives it.
623 */
624static int
625dm9000_open(struct net_device *dev)
626{
627 board_info_t *db = (board_info_t *) dev->priv;
628
a76836f9 629 dev_dbg(db->dev, "entering %s\n", __func__);
a1365275 630
f40d24d9 631 if (request_irq(dev->irq, &dm9000_interrupt, DM9000_IRQ_FLAGS, dev->name, dev))
a1365275
SH
632 return -EAGAIN;
633
634 /* Initialize DM9000 board */
635 dm9000_reset(db);
636 dm9000_init_dm9000(dev);
637
638 /* Init driver variable */
639 db->dbug_cnt = 0;
640
641 /* set and active a timer process */
642 init_timer(&db->timer);
9ef9ac51 643 db->timer.expires = DM9000_TIMER_WUT;
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SH
644 db->timer.data = (unsigned long) dev;
645 db->timer.function = &dm9000_timer;
646 add_timer(&db->timer);
647
648 mii_check_media(&db->mii, netif_msg_link(db), 1);
649 netif_start_queue(dev);
650
651 return 0;
652}
653
654/*
655 * Initilize dm9000 board
656 */
657static void
658dm9000_init_dm9000(struct net_device *dev)
659{
660 board_info_t *db = (board_info_t *) dev->priv;
661
662 PRINTK1("entering %s\n",__FUNCTION__);
663
664 /* I/O mode */
665 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
666
667 /* GPIO0 on pre-activate PHY */
668 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
669 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
670 iow(db, DM9000_GPR, 0); /* Enable PHY */
671
33ba5091
BD
672 if (db->flags & DM9000_PLATF_EXT_PHY)
673 iow(db, DM9000_NCR, NCR_EXT_PHY);
674
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675 /* Program operating register */
676 iow(db, DM9000_TCR, 0); /* TX Polling clear */
677 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
678 iow(db, DM9000_FCR, 0xff); /* Flow Control */
679 iow(db, DM9000_SMCR, 0); /* Special Mode */
680 /* clear TX status */
681 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
682 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
683
684 /* Set address filter table */
685 dm9000_hash_table(dev);
686
687 /* Activate DM9000 */
688 iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
689 /* Enable TX/RX interrupt mask */
690 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
691
692 /* Init Driver variable */
693 db->tx_pkt_cnt = 0;
694 db->queue_pkt_len = 0;
695 dev->trans_start = 0;
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696}
697
698/*
699 * Hardware start transmission.
700 * Send a packet to media from the upper layer.
701 */
702static int
703dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
704{
c46ac946 705 unsigned long flags;
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SH
706 board_info_t *db = (board_info_t *) dev->priv;
707
708 PRINTK3("dm9000_start_xmit\n");
709
710 if (db->tx_pkt_cnt > 1)
711 return 1;
712
c46ac946 713 spin_lock_irqsave(&db->lock, flags);
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714
715 /* Move data to DM9000 TX RAM */
716 writeb(DM9000_MWCMD, db->io_addr);
717
718 (db->outblk)(db->io_data, skb->data, skb->len);
09f75cd7 719 dev->stats.tx_bytes += skb->len;
a1365275 720
c46ac946 721 db->tx_pkt_cnt++;
a1365275 722 /* TX control: First packet immediately send, second packet queue */
c46ac946 723 if (db->tx_pkt_cnt == 1) {
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SH
724 /* Set TX length to DM9000 */
725 iow(db, DM9000_TXPLL, skb->len & 0xff);
726 iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
727
728 /* Issue TX polling command */
729 iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
730
731 dev->trans_start = jiffies; /* save the time stamp */
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732 } else {
733 /* Second packet */
a1365275 734 db->queue_pkt_len = skb->len;
c46ac946 735 netif_stop_queue(dev);
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736 }
737
c46ac946
FW
738 spin_unlock_irqrestore(&db->lock, flags);
739
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740 /* free this SKB */
741 dev_kfree_skb(skb);
742
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743 return 0;
744}
745
746static void
747dm9000_shutdown(struct net_device *dev)
748{
749 board_info_t *db = (board_info_t *) dev->priv;
750
751 /* RESET device */
752 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
753 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
754 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
755 iow(db, DM9000_RCR, 0x00); /* Disable RX */
756}
757
758/*
759 * Stop the interface.
760 * The interface is stopped when it is brought.
761 */
762static int
763dm9000_stop(struct net_device *ndev)
764{
765 board_info_t *db = (board_info_t *) ndev->priv;
766
767 PRINTK1("entering %s\n",__FUNCTION__);
768
769 /* deleted timer */
770 del_timer(&db->timer);
771
772 netif_stop_queue(ndev);
773 netif_carrier_off(ndev);
774
775 /* free interrupt */
776 free_irq(ndev->irq, ndev);
777
778 dm9000_shutdown(ndev);
779
780 return 0;
781}
782
783/*
784 * DM9000 interrupt handler
785 * receive the packet to upper layer, free the transmitted packet
786 */
787
5d22a312 788static void
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789dm9000_tx_done(struct net_device *dev, board_info_t * db)
790{
791 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
792
793 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
794 /* One packet sent complete */
795 db->tx_pkt_cnt--;
09f75cd7 796 dev->stats.tx_packets++;
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797
798 /* Queue packet check & send */
799 if (db->tx_pkt_cnt > 0) {
800 iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff);
801 iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff);
802 iow(db, DM9000_TCR, TCR_TXREQ);
803 dev->trans_start = jiffies;
804 }
805 netif_wake_queue(dev);
806 }
807}
808
809static irqreturn_t
7d12e780 810dm9000_interrupt(int irq, void *dev_id)
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811{
812 struct net_device *dev = dev_id;
813 board_info_t *db;
814 int int_status;
815 u8 reg_save;
816
817 PRINTK3("entering %s\n",__FUNCTION__);
818
819 if (!dev) {
820 PRINTK1("dm9000_interrupt() without DEVICE arg\n");
821 return IRQ_HANDLED;
822 }
823
824 /* A real interrupt coming */
825 db = (board_info_t *) dev->priv;
826 spin_lock(&db->lock);
827
828 /* Save previous register address */
829 reg_save = readb(db->io_addr);
830
831 /* Disable all interrupts */
832 iow(db, DM9000_IMR, IMR_PAR);
833
834 /* Got DM9000 interrupt status */
835 int_status = ior(db, DM9000_ISR); /* Got ISR */
836 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
837
838 /* Received the coming packet */
839 if (int_status & ISR_PRS)
840 dm9000_rx(dev);
841
842 /* Trnasmit Interrupt check */
843 if (int_status & ISR_PTS)
844 dm9000_tx_done(dev, db);
845
846 /* Re-enable interrupt mask */
847 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
848
849 /* Restore previous register address */
850 writeb(reg_save, db->io_addr);
851
852 spin_unlock(&db->lock);
853
854 return IRQ_HANDLED;
855}
856
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857/*
858 * A periodic timer routine
859 * Dynamic media sense, allocated Rx buffer...
860 */
861static void
862dm9000_timer(unsigned long data)
863{
864 struct net_device *dev = (struct net_device *) data;
865 board_info_t *db = (board_info_t *) dev->priv;
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SH
866
867 PRINTK3("dm9000_timer()\n");
868
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869 mii_check_media(&db->mii, netif_msg_link(db), 0);
870
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871 /* Set timer again */
872 db->timer.expires = DM9000_TIMER_WUT;
873 add_timer(&db->timer);
874}
875
876struct dm9000_rxhdr {
93116573
BD
877 u8 RxPktReady;
878 u8 RxStatus;
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879 u16 RxLen;
880} __attribute__((__packed__));
881
882/*
883 * Received a packet and pass to upper layer
884 */
885static void
886dm9000_rx(struct net_device *dev)
887{
888 board_info_t *db = (board_info_t *) dev->priv;
889 struct dm9000_rxhdr rxhdr;
890 struct sk_buff *skb;
891 u8 rxbyte, *rdptr;
6478fac6 892 bool GoodPacket;
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893 int RxLen;
894
895 /* Check packet ready or not */
896 do {
897 ior(db, DM9000_MRCMDX); /* Dummy read */
898
899 /* Get most updated data */
900 rxbyte = readb(db->io_data);
901
902 /* Status check: this byte must be 0 or 1 */
903 if (rxbyte > DM9000_PKT_RDY) {
a76836f9 904 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
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SH
905 iow(db, DM9000_RCR, 0x00); /* Stop Device */
906 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
907 return;
908 }
909
910 if (rxbyte != DM9000_PKT_RDY)
911 return;
912
913 /* A packet ready now & Get status/length */
6478fac6 914 GoodPacket = true;
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915 writeb(DM9000_MRCMD, db->io_addr);
916
917 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
918
93116573 919 RxLen = le16_to_cpu(rxhdr.RxLen);
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920
921 /* Packet Status check */
922 if (RxLen < 0x40) {
6478fac6 923 GoodPacket = false;
a76836f9 924 dev_dbg(db->dev, "Bad Packet received (runt)\n");
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SH
925 }
926
927 if (RxLen > DM9000_PKT_MAX) {
a76836f9 928 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
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SH
929 }
930
93116573 931 if (rxhdr.RxStatus & 0xbf) {
6478fac6 932 GoodPacket = false;
93116573 933 if (rxhdr.RxStatus & 0x01) {
a76836f9 934 dev_dbg(db->dev, "fifo error\n");
09f75cd7 935 dev->stats.rx_fifo_errors++;
a1365275 936 }
93116573 937 if (rxhdr.RxStatus & 0x02) {
a76836f9 938 dev_dbg(db->dev, "crc error\n");
09f75cd7 939 dev->stats.rx_crc_errors++;
a1365275 940 }
93116573 941 if (rxhdr.RxStatus & 0x80) {
a76836f9 942 dev_dbg(db->dev, "length error\n");
09f75cd7 943 dev->stats.rx_length_errors++;
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SH
944 }
945 }
946
947 /* Move data from DM9000 */
948 if (GoodPacket
949 && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
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SH
950 skb_reserve(skb, 2);
951 rdptr = (u8 *) skb_put(skb, RxLen - 4);
952
953 /* Read received packet from RX SRAM */
954
955 (db->inblk)(db->io_data, rdptr, RxLen);
09f75cd7 956 dev->stats.rx_bytes += RxLen;
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SH
957
958 /* Pass to upper layer */
959 skb->protocol = eth_type_trans(skb, dev);
960 netif_rx(skb);
09f75cd7 961 dev->stats.rx_packets++;
a1365275
SH
962
963 } else {
964 /* need to dump the packet's data */
965
966 (db->dumpblk)(db->io_data, RxLen);
967 }
968 } while (rxbyte == DM9000_PKT_RDY);
969}
970
971/*
972 * Read a word data from SROM
973 */
974static u16
975read_srom_word(board_info_t * db, int offset)
976{
977 iow(db, DM9000_EPAR, offset);
978 iow(db, DM9000_EPCR, EPCR_ERPRR);
979 mdelay(8); /* according to the datasheet 200us should be enough,
980 but it doesn't work */
981 iow(db, DM9000_EPCR, 0x0);
982 return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8));
983}
984
985#ifdef DM9000_PROGRAM_EEPROM
986/*
987 * Write a word data to SROM
988 */
989static void
990write_srom_word(board_info_t * db, int offset, u16 val)
991{
992 iow(db, DM9000_EPAR, offset);
993 iow(db, DM9000_EPDRH, ((val >> 8) & 0xff));
994 iow(db, DM9000_EPDRL, (val & 0xff));
995 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
996 mdelay(8); /* same shit */
997 iow(db, DM9000_EPCR, 0);
998}
999
1000/*
1001 * Only for development:
1002 * Here we write static data to the eeprom in case
1003 * we don't have valid content on a new board
1004 */
1005static void
1006program_eeprom(board_info_t * db)
1007{
1008 u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */
1009 0x0000, /* Autoload: accept nothing */
1010 0x0a46, 0x9000, /* Vendor / Product ID */
1011 0x0000, /* pin control */
1012 0x0000,
1013 }; /* Wake-up mode control */
1014 int i;
1015 for (i = 0; i < 8; i++)
1016 write_srom_word(db, i, eeprom[i]);
1017}
1018#endif
1019
1020
1021/*
1022 * Calculate the CRC valude of the Rx packet
1023 * flag = 1 : return the reverse CRC (for the received packet CRC)
1024 * 0 : return the normal CRC (for Hash Table index)
1025 */
1026
1027static unsigned long
1028cal_CRC(unsigned char *Data, unsigned int Len, u8 flag)
1029{
1030
1031 u32 crc = ether_crc_le(Len, Data);
1032
1033 if (flag)
1034 return ~crc;
1035
1036 return crc;
1037}
1038
1039/*
1040 * Set DM9000 multicast address
1041 */
1042static void
1043dm9000_hash_table(struct net_device *dev)
1044{
1045 board_info_t *db = (board_info_t *) dev->priv;
1046 struct dev_mc_list *mcptr = dev->mc_list;
1047 int mc_cnt = dev->mc_count;
1048 u32 hash_val;
1049 u16 i, oft, hash_table[4];
1050 unsigned long flags;
1051
1052 PRINTK2("dm9000_hash_table()\n");
1053
1054 spin_lock_irqsave(&db->lock,flags);
1055
1056 for (i = 0, oft = 0x10; i < 6; i++, oft++)
1057 iow(db, oft, dev->dev_addr[i]);
1058
1059 /* Clear Hash Table */
1060 for (i = 0; i < 4; i++)
1061 hash_table[i] = 0x0;
1062
1063 /* broadcast address */
1064 hash_table[3] = 0x8000;
1065
1066 /* the multicast address in Hash Table : 64 bits */
1067 for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
1068 hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f;
1069 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
1070 }
1071
1072 /* Write the hash table to MAC MD table */
1073 for (i = 0, oft = 0x16; i < 4; i++) {
1074 iow(db, oft++, hash_table[i] & 0xff);
1075 iow(db, oft++, (hash_table[i] >> 8) & 0xff);
1076 }
1077
1078 spin_unlock_irqrestore(&db->lock,flags);
1079}
1080
1081
1082/*
1083 * Read a word from phyxcer
1084 */
1085static int
1086dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1087{
1088 board_info_t *db = (board_info_t *) dev->priv;
1089 unsigned long flags;
9ef9ac51 1090 unsigned int reg_save;
a1365275
SH
1091 int ret;
1092
1093 spin_lock_irqsave(&db->lock,flags);
9ef9ac51
BD
1094
1095 /* Save previous register address */
1096 reg_save = readb(db->io_addr);
1097
a1365275
SH
1098 /* Fill the phyxcer register into REG_0C */
1099 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1100
1101 iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
1102 udelay(100); /* Wait read complete */
1103 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1104
1105 /* The read data keeps on REG_0D & REG_0E */
1106 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1107
9ef9ac51
BD
1108 /* restore the previous address */
1109 writeb(reg_save, db->io_addr);
1110
a1365275
SH
1111 spin_unlock_irqrestore(&db->lock,flags);
1112
1113 return ret;
1114}
1115
1116/*
1117 * Write a word to phyxcer
1118 */
1119static void
1120dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
1121{
1122 board_info_t *db = (board_info_t *) dev->priv;
1123 unsigned long flags;
9ef9ac51 1124 unsigned long reg_save;
a1365275
SH
1125
1126 spin_lock_irqsave(&db->lock,flags);
1127
9ef9ac51
BD
1128 /* Save previous register address */
1129 reg_save = readb(db->io_addr);
1130
a1365275
SH
1131 /* Fill the phyxcer register into REG_0C */
1132 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1133
1134 /* Fill the written data into REG_0D & REG_0E */
1135 iow(db, DM9000_EPDRL, (value & 0xff));
1136 iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
1137
1138 iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
1139 udelay(500); /* Wait write complete */
1140 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1141
9ef9ac51
BD
1142 /* restore the previous address */
1143 writeb(reg_save, db->io_addr);
1144
a1365275
SH
1145 spin_unlock_irqrestore(&db->lock,flags);
1146}
1147
1148static int
3ae5eaec 1149dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
a1365275 1150{
3ae5eaec 1151 struct net_device *ndev = platform_get_drvdata(dev);
a1365275 1152
9480e307 1153 if (ndev) {
a1365275
SH
1154 if (netif_running(ndev)) {
1155 netif_device_detach(ndev);
1156 dm9000_shutdown(ndev);
1157 }
1158 }
1159 return 0;
1160}
1161
1162static int
3ae5eaec 1163dm9000_drv_resume(struct platform_device *dev)
a1365275 1164{
3ae5eaec 1165 struct net_device *ndev = platform_get_drvdata(dev);
a1365275
SH
1166 board_info_t *db = (board_info_t *) ndev->priv;
1167
9480e307 1168 if (ndev) {
a1365275
SH
1169
1170 if (netif_running(ndev)) {
1171 dm9000_reset(db);
1172 dm9000_init_dm9000(ndev);
1173
1174 netif_device_attach(ndev);
1175 }
1176 }
1177 return 0;
1178}
1179
1180static int
3ae5eaec 1181dm9000_drv_remove(struct platform_device *pdev)
a1365275 1182{
3ae5eaec 1183 struct net_device *ndev = platform_get_drvdata(pdev);
a1365275 1184
3ae5eaec 1185 platform_set_drvdata(pdev, NULL);
a1365275
SH
1186
1187 unregister_netdev(ndev);
1188 dm9000_release_board(pdev, (board_info_t *) ndev->priv);
9fd9f9b6 1189 free_netdev(ndev); /* free device structure */
a1365275 1190
a76836f9 1191 dev_dbg(&pdev->dev, "released and freed device\n");
a1365275
SH
1192 return 0;
1193}
1194
3ae5eaec 1195static struct platform_driver dm9000_driver = {
5d22a312
BD
1196 .driver = {
1197 .name = "dm9000",
1198 .owner = THIS_MODULE,
1199 },
a1365275
SH
1200 .probe = dm9000_probe,
1201 .remove = dm9000_drv_remove,
1202 .suspend = dm9000_drv_suspend,
1203 .resume = dm9000_drv_resume,
1204};
1205
1206static int __init
1207dm9000_init(void)
1208{
2ae2d77c
BD
1209 printk(KERN_INFO "%s Ethernet Driver\n", CARDNAME);
1210
3ae5eaec 1211 return platform_driver_register(&dm9000_driver); /* search board and register */
a1365275
SH
1212}
1213
1214static void __exit
1215dm9000_cleanup(void)
1216{
3ae5eaec 1217 platform_driver_unregister(&dm9000_driver);
a1365275
SH
1218}
1219
1220module_init(dm9000_init);
1221module_exit(dm9000_cleanup);
1222
1223MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1224MODULE_DESCRIPTION("Davicom DM9000 network driver");
1225MODULE_LICENSE("GPL");
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