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1636d883 | 1 | /* net/dsa/mv88e6171.c - Marvell 88e6171 switch chip support |
42f27253 AL |
2 | * Copyright (c) 2008-2009 Marvell Semiconductor |
3 | * Copyright (c) 2014 Claudio Leite <leitec@staticky.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | */ | |
10 | ||
11 | #include <linux/delay.h> | |
12 | #include <linux/jiffies.h> | |
13 | #include <linux/list.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/netdevice.h> | |
16 | #include <linux/phy.h> | |
17 | #include <net/dsa.h> | |
18 | #include "mv88e6xxx.h" | |
19 | ||
b9b37713 VD |
20 | static const struct mv88e6xxx_switch_id mv88e6171_table[] = { |
21 | { PORT_SWITCH_ID_6171, "Marvell 88E6171" }, | |
22 | { PORT_SWITCH_ID_6175, "Marvell 88E6175" }, | |
23 | { PORT_SWITCH_ID_6350, "Marvell 88E6350" }, | |
24 | { PORT_SWITCH_ID_6351, "Marvell 88E6351" }, | |
25 | }; | |
26 | ||
b4d2394d | 27 | static char *mv88e6171_probe(struct device *host_dev, int sw_addr) |
42f27253 | 28 | { |
b9b37713 VD |
29 | return mv88e6xxx_lookup_name(host_dev, sw_addr, mv88e6171_table, |
30 | ARRAY_SIZE(mv88e6171_table)); | |
42f27253 AL |
31 | } |
32 | ||
42f27253 AL |
33 | static int mv88e6171_setup_global(struct dsa_switch *ds) |
34 | { | |
15966a2a | 35 | u32 upstream_port = dsa_upstream_port(ds); |
42f27253 | 36 | int ret; |
1636d883 | 37 | u32 reg; |
54d792f2 AL |
38 | |
39 | ret = mv88e6xxx_setup_global(ds); | |
40 | if (ret) | |
41 | return ret; | |
42f27253 | 42 | |
4c732668 AL |
43 | /* Discard packets with excessive collisions, mask all |
44 | * interrupt sources, enable PPU. | |
42f27253 | 45 | */ |
15966a2a AL |
46 | REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, |
47 | GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_DISCARD_EXCESS); | |
42f27253 | 48 | |
42f27253 AL |
49 | /* Configure the upstream port, and configure the upstream |
50 | * port as the port to which ingress and egress monitor frames | |
51 | * are to be sent. | |
52 | */ | |
1636d883 AL |
53 | reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT | |
54 | upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT | | |
55 | upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT | | |
56 | upstream_port << GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT; | |
57 | REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg); | |
42f27253 AL |
58 | |
59 | /* Disable remote management for now, and set the switch's | |
60 | * DSA device number. | |
61 | */ | |
15966a2a | 62 | REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2, ds->index & 0x1f); |
42f27253 | 63 | |
42f27253 AL |
64 | return 0; |
65 | } | |
66 | ||
42f27253 AL |
67 | static int mv88e6171_setup(struct dsa_switch *ds) |
68 | { | |
44e50ddb | 69 | struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); |
42f27253 AL |
70 | int ret; |
71 | ||
acdaffcc GR |
72 | ret = mv88e6xxx_setup_common(ds); |
73 | if (ret < 0) | |
74 | return ret; | |
42f27253 | 75 | |
44e50ddb AL |
76 | ps->num_ports = 7; |
77 | ||
143a8307 | 78 | ret = mv88e6xxx_switch_reset(ds, true); |
42f27253 AL |
79 | if (ret < 0) |
80 | return ret; | |
81 | ||
42f27253 AL |
82 | ret = mv88e6171_setup_global(ds); |
83 | if (ret < 0) | |
84 | return ret; | |
85 | ||
dbde9e66 | 86 | return mv88e6xxx_setup_ports(ds); |
42f27253 AL |
87 | } |
88 | ||
42f27253 | 89 | struct dsa_switch_driver mv88e6171_switch_driver = { |
c146b778 | 90 | .tag_protocol = DSA_TAG_PROTO_EDSA, |
42f27253 AL |
91 | .priv_size = sizeof(struct mv88e6xxx_priv_state), |
92 | .probe = mv88e6171_probe, | |
93 | .setup = mv88e6171_setup, | |
94 | .set_addr = mv88e6xxx_set_addr_indirect, | |
fd3a0ee4 AL |
95 | .phy_read = mv88e6xxx_phy_read_indirect, |
96 | .phy_write = mv88e6xxx_phy_write_indirect, | |
e413e7e1 AL |
97 | .get_strings = mv88e6xxx_get_strings, |
98 | .get_ethtool_stats = mv88e6xxx_get_ethtool_stats, | |
99 | .get_sset_count = mv88e6xxx_get_sset_count, | |
dea87024 | 100 | .adjust_link = mv88e6xxx_adjust_link, |
4dd38cdb AL |
101 | #ifdef CONFIG_NET_DSA_HWMON |
102 | .get_temp = mv88e6xxx_get_temp, | |
103 | #endif | |
03d6faa9 AL |
104 | .get_regs_len = mv88e6xxx_get_regs_len, |
105 | .get_regs = mv88e6xxx_get_regs, | |
71327a4e VD |
106 | .port_bridge_join = mv88e6xxx_port_bridge_join, |
107 | .port_bridge_leave = mv88e6xxx_port_bridge_leave, | |
b2a6b93a | 108 | .port_stp_update = mv88e6xxx_port_stp_update, |
214cdb99 | 109 | .port_vlan_filtering = mv88e6xxx_port_vlan_filtering, |
76e398a6 | 110 | .port_vlan_prepare = mv88e6xxx_port_vlan_prepare, |
585e7e1a VD |
111 | .port_vlan_add = mv88e6xxx_port_vlan_add, |
112 | .port_vlan_del = mv88e6xxx_port_vlan_del, | |
ceff5eff | 113 | .port_vlan_dump = mv88e6xxx_port_vlan_dump, |
146a3206 | 114 | .port_fdb_prepare = mv88e6xxx_port_fdb_prepare, |
2a778e1b VD |
115 | .port_fdb_add = mv88e6xxx_port_fdb_add, |
116 | .port_fdb_del = mv88e6xxx_port_fdb_del, | |
f33475bd | 117 | .port_fdb_dump = mv88e6xxx_port_fdb_dump, |
42f27253 AL |
118 | }; |
119 | ||
120 | MODULE_ALIAS("platform:mv88e6171"); | |
eee7483e AL |
121 | MODULE_ALIAS("platform:mv88e6175"); |
122 | MODULE_ALIAS("platform:mv88e6350"); | |
123 | MODULE_ALIAS("platform:mv88e6351"); |