net: dsa: mv88e6xxx: factorize EEPROM access
[deliverable/linux.git] / drivers / net / dsa / mv88e6171.c
CommitLineData
1636d883 1/* net/dsa/mv88e6171.c - Marvell 88e6171 switch chip support
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2 * Copyright (c) 2008-2009 Marvell Semiconductor
3 * Copyright (c) 2014 Claudio Leite <leitec@staticky.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
11#include <linux/delay.h>
12#include <linux/jiffies.h>
13#include <linux/list.h>
14#include <linux/module.h>
15#include <linux/netdevice.h>
16#include <linux/phy.h>
17#include <net/dsa.h>
18#include "mv88e6xxx.h"
19
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20static const struct mv88e6xxx_info mv88e6171_table[] = {
21 {
22 .prod_num = PORT_SWITCH_ID_PROD_NUM_6171,
22356476 23 .family = MV88E6XXX_FAMILY_6351,
f6271e67 24 .name = "Marvell 88E6171",
cd5a2c82 25 .num_databases = 4096,
009a2b98 26 .num_ports = 7,
b5058d7a 27 .flags = MV88E6XXX_FLAGS_FAMILY_6351,
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28 }, {
29 .prod_num = PORT_SWITCH_ID_PROD_NUM_6175,
22356476 30 .family = MV88E6XXX_FAMILY_6351,
f6271e67 31 .name = "Marvell 88E6175",
cd5a2c82 32 .num_databases = 4096,
009a2b98 33 .num_ports = 7,
b5058d7a 34 .flags = MV88E6XXX_FLAGS_FAMILY_6351,
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35 }, {
36 .prod_num = PORT_SWITCH_ID_PROD_NUM_6350,
22356476 37 .family = MV88E6XXX_FAMILY_6351,
f6271e67 38 .name = "Marvell 88E6350",
cd5a2c82 39 .num_databases = 4096,
009a2b98 40 .num_ports = 7,
b5058d7a 41 .flags = MV88E6XXX_FLAGS_FAMILY_6351,
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42 }, {
43 .prod_num = PORT_SWITCH_ID_PROD_NUM_6351,
22356476 44 .family = MV88E6XXX_FAMILY_6351,
f6271e67 45 .name = "Marvell 88E6351",
cd5a2c82 46 .num_databases = 4096,
009a2b98 47 .num_ports = 7,
b5058d7a 48 .flags = MV88E6XXX_FLAGS_FAMILY_6351,
f6271e67 49 }
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50};
51
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52static const char *mv88e6171_drv_probe(struct device *dsa_dev,
53 struct device *host_dev, int sw_addr,
54 void **priv)
42f27253 55{
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56 return mv88e6xxx_drv_probe(dsa_dev, host_dev, sw_addr, priv,
57 mv88e6171_table,
58 ARRAY_SIZE(mv88e6171_table));
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59}
60
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61static int mv88e6171_setup_global(struct dsa_switch *ds)
62{
158bc065 63 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
15966a2a 64 u32 upstream_port = dsa_upstream_port(ds);
42f27253 65 int ret;
1636d883 66 u32 reg;
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67
68 ret = mv88e6xxx_setup_global(ds);
69 if (ret)
70 return ret;
42f27253 71
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72 /* Discard packets with excessive collisions, mask all
73 * interrupt sources, enable PPU.
42f27253 74 */
158bc065 75 ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL,
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76 GLOBAL_CONTROL_PPU_ENABLE |
77 GLOBAL_CONTROL_DISCARD_EXCESS);
78 if (ret)
79 return ret;
42f27253 80
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81 /* Configure the upstream port, and configure the upstream
82 * port as the port to which ingress and egress monitor frames
83 * are to be sent.
84 */
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85 reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
86 upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
87 upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT |
88 upstream_port << GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT;
158bc065 89 ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
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90 if (ret)
91 return ret;
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92
93 /* Disable remote management for now, and set the switch's
94 * DSA device number.
95 */
158bc065 96 return mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL_2,
48ace4ef 97 ds->index & 0x1f);
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98}
99
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100static int mv88e6171_setup(struct dsa_switch *ds)
101{
158bc065 102 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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103 int ret;
104
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105 ps->ds = ds;
106
107 ret = mv88e6xxx_setup_common(ps);
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108 if (ret < 0)
109 return ret;
42f27253 110
158bc065 111 ret = mv88e6xxx_switch_reset(ps, true);
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112 if (ret < 0)
113 return ret;
114
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115 ret = mv88e6171_setup_global(ds);
116 if (ret < 0)
117 return ret;
118
dbde9e66 119 return mv88e6xxx_setup_ports(ds);
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120}
121
42f27253 122struct dsa_switch_driver mv88e6171_switch_driver = {
c146b778 123 .tag_protocol = DSA_TAG_PROTO_EDSA,
e49bad31 124 .probe = mv88e6171_drv_probe,
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125 .setup = mv88e6171_setup,
126 .set_addr = mv88e6xxx_set_addr_indirect,
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127 .phy_read = mv88e6xxx_phy_read,
128 .phy_write = mv88e6xxx_phy_write,
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129 .get_strings = mv88e6xxx_get_strings,
130 .get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
131 .get_sset_count = mv88e6xxx_get_sset_count,
dea87024 132 .adjust_link = mv88e6xxx_adjust_link,
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133#ifdef CONFIG_NET_DSA_HWMON
134 .get_temp = mv88e6xxx_get_temp,
135#endif
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136 .get_eeprom = mv88e6xxx_get_eeprom,
137 .set_eeprom = mv88e6xxx_set_eeprom,
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138 .get_regs_len = mv88e6xxx_get_regs_len,
139 .get_regs = mv88e6xxx_get_regs,
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140 .port_bridge_join = mv88e6xxx_port_bridge_join,
141 .port_bridge_leave = mv88e6xxx_port_bridge_leave,
43c44a9f 142 .port_stp_state_set = mv88e6xxx_port_stp_state_set,
214cdb99 143 .port_vlan_filtering = mv88e6xxx_port_vlan_filtering,
76e398a6 144 .port_vlan_prepare = mv88e6xxx_port_vlan_prepare,
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145 .port_vlan_add = mv88e6xxx_port_vlan_add,
146 .port_vlan_del = mv88e6xxx_port_vlan_del,
ceff5eff 147 .port_vlan_dump = mv88e6xxx_port_vlan_dump,
146a3206 148 .port_fdb_prepare = mv88e6xxx_port_fdb_prepare,
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149 .port_fdb_add = mv88e6xxx_port_fdb_add,
150 .port_fdb_del = mv88e6xxx_port_fdb_del,
f33475bd 151 .port_fdb_dump = mv88e6xxx_port_fdb_dump,
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152};
153
154MODULE_ALIAS("platform:mv88e6171");
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155MODULE_ALIAS("platform:mv88e6175");
156MODULE_ALIAS("platform:mv88e6350");
157MODULE_ALIAS("platform:mv88e6351");
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