[deliverable/linux.git] / drivers / net / dsa / mv88e6352.c

/*
 * net/dsa/mv88e6352.c - Marvell 88e6352 switch chip support
 *
 * Copyright (c) 2014 Guenter Roeck
 *
 * Derived from mv88e6123_61_65.c
 * Copyright (c) 2008-2009 Marvell Semiconductor
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/delay.h>
#include <linux/jiffies.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/netdevice.h>
#include <linux/platform_device.h>
#include <linux/phy.h>
#include <net/dsa.h>
#include "mv88e6xxx.h"

static char *mv88e6352_probe(struct device *host_dev, int sw_addr)
{
	struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);
	int ret;

	if (bus == NULL)
		return NULL;

	ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), PORT_SWITCH_ID);
	if (ret >= 0) {
		if ((ret & 0xfff0) == PORT_SWITCH_ID_6172)
			return "Marvell 88E6172";
		if ((ret & 0xfff0) == PORT_SWITCH_ID_6176)
			return "Marvell 88E6176";
		if (ret == PORT_SWITCH_ID_6320_A1)
			return "Marvell 88E6320 (A1)";
		if (ret == PORT_SWITCH_ID_6320_A2)
			return "Marvell 88e6320 (A2)";
		if ((ret & 0xfff0) == PORT_SWITCH_ID_6320)
			return "Marvell 88E6320";
		if (ret == PORT_SWITCH_ID_6321_A1)
			return "Marvell 88E6321 (A1)";
		if (ret == PORT_SWITCH_ID_6321_A2)
			return "Marvell 88e6321 (A2)";
		if ((ret & 0xfff0) == PORT_SWITCH_ID_6321)
			return "Marvell 88E6321";
		if (ret == PORT_SWITCH_ID_6352_A0)
			return "Marvell 88E6352 (A0)";
		if (ret == PORT_SWITCH_ID_6352_A1)
			return "Marvell 88E6352 (A1)";
		if ((ret & 0xfff0) == PORT_SWITCH_ID_6352)
			return "Marvell 88E6352";
	}

	return NULL;
}

static int mv88e6352_setup_global(struct dsa_switch *ds)
{
	u32 upstream_port = dsa_upstream_port(ds);
	int ret;
	u32 reg;

	ret = mv88e6xxx_setup_global(ds);
	if (ret)
		return ret;

	/* Discard packets with excessive collisions,
	 * mask all interrupt sources, enable PPU (bit 14, undocumented).
	 */
	REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,
		  GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_DISCARD_EXCESS);

	/* Configure the upstream port, and configure the upstream
	 * port as the port to which ingress and egress monitor frames
	 * are to be sent.
	 */
	reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
		upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
		upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
	REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);

	/* Disable remote management for now, and set the switch's
	 * DSA device number.
	 */
	REG_WRITE(REG_GLOBAL, 0x1c, ds->index & 0x1f);

	return 0;
}

static int mv88e6352_setup(struct dsa_switch *ds)
{
	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
	int ret;

	ret = mv88e6xxx_setup_common(ds);
	if (ret < 0)
		return ret;

	ps->num_ports = 7;

	mutex_init(&ps->eeprom_mutex);

	ret = mv88e6xxx_switch_reset(ds, true);
	if (ret < 0)
		return ret;

	ret = mv88e6352_setup_global(ds);
	if (ret < 0)
		return ret;

	return mv88e6xxx_setup_ports(ds);
}

static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr)
{
	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
	int ret;

	mutex_lock(&ps->eeprom_mutex);

	ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, 0x14,
				  0xc000 | (addr & 0xff));
	if (ret < 0)
		goto error;

	ret = mv88e6xxx_eeprom_busy_wait(ds);
	if (ret < 0)
		goto error;

	ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, 0x15);
error:
	mutex_unlock(&ps->eeprom_mutex);
	return ret;
}

static int mv88e6352_get_eeprom(struct dsa_switch *ds,
				struct ethtool_eeprom *eeprom, u8 *data)
{
	int offset;
	int len;
	int ret;

	offset = eeprom->offset;
	len = eeprom->len;
	eeprom->len = 0;

	eeprom->magic = 0xc3ec4951;

	ret = mv88e6xxx_eeprom_load_wait(ds);
	if (ret < 0)
		return ret;

	if (offset & 1) {
		int word;

		word = mv88e6352_read_eeprom_word(ds, offset >> 1);
		if (word < 0)
			return word;

		*data++ = (word >> 8) & 0xff;

		offset++;
		len--;
		eeprom->len++;
	}

	while (len >= 2) {
		int word;

		word = mv88e6352_read_eeprom_word(ds, offset >> 1);
		if (word < 0)
			return word;

		*data++ = word & 0xff;
		*data++ = (word >> 8) & 0xff;

		offset += 2;
		len -= 2;
		eeprom->len += 2;
	}

	if (len) {
		int word;

		word = mv88e6352_read_eeprom_word(ds, offset >> 1);
		if (word < 0)
			return word;

		*data++ = word & 0xff;

		offset++;
		len--;
		eeprom->len++;
	}

	return 0;
}

static int mv88e6352_eeprom_is_readonly(struct dsa_switch *ds)
{
	int ret;

	ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, 0x14);
	if (ret < 0)
		return ret;

	if (!(ret & 0x0400))
		return -EROFS;

	return 0;
}

static int mv88e6352_write_eeprom_word(struct dsa_switch *ds, int addr,
				       u16 data)
{
	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
	int ret;

	mutex_lock(&ps->eeprom_mutex);

	ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, 0x15, data);
	if (ret < 0)
		goto error;

	ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, 0x14,
				  0xb000 | (addr & 0xff));
	if (ret < 0)
		goto error;

	ret = mv88e6xxx_eeprom_busy_wait(ds);
error:
	mutex_unlock(&ps->eeprom_mutex);
	return ret;
}

static int mv88e6352_set_eeprom(struct dsa_switch *ds,
				struct ethtool_eeprom *eeprom, u8 *data)
{
	int offset;
	int ret;
	int len;

	if (eeprom->magic != 0xc3ec4951)
		return -EINVAL;

	ret = mv88e6352_eeprom_is_readonly(ds);
	if (ret)
		return ret;

	offset = eeprom->offset;
	len = eeprom->len;
	eeprom->len = 0;

	ret = mv88e6xxx_eeprom_load_wait(ds);
	if (ret < 0)
		return ret;

	if (offset & 1) {
		int word;

		word = mv88e6352_read_eeprom_word(ds, offset >> 1);
		if (word < 0)
			return word;

		word = (*data++ << 8) | (word & 0xff);

		ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
		if (ret < 0)
			return ret;

		offset++;
		len--;
		eeprom->len++;
	}

	while (len >= 2) {
		int word;

		word = *data++;
		word |= *data++ << 8;

		ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
		if (ret < 0)
			return ret;

		offset += 2;
		len -= 2;
		eeprom->len += 2;
	}

	if (len) {
		int word;

		word = mv88e6352_read_eeprom_word(ds, offset >> 1);
		if (word < 0)
			return word;

		word = (word & 0xff00) | *data++;

		ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
		if (ret < 0)
			return ret;

		offset++;
		len--;
		eeprom->len++;
	}

	return 0;
}

struct dsa_switch_driver mv88e6352_switch_driver = {
	.tag_protocol		= DSA_TAG_PROTO_EDSA,
	.priv_size		= sizeof(struct mv88e6xxx_priv_state),
	.probe			= mv88e6352_probe,
	.setup			= mv88e6352_setup,
	.set_addr		= mv88e6xxx_set_addr_indirect,
	.phy_read		= mv88e6xxx_phy_read_indirect,
	.phy_write		= mv88e6xxx_phy_write_indirect,
	.poll_link		= mv88e6xxx_poll_link,
	.get_strings		= mv88e6xxx_get_strings,
	.get_ethtool_stats	= mv88e6xxx_get_ethtool_stats,
	.get_sset_count		= mv88e6xxx_get_sset_count,
	.set_eee		= mv88e6xxx_set_eee,
	.get_eee		= mv88e6xxx_get_eee,
#ifdef CONFIG_NET_DSA_HWMON
	.get_temp		= mv88e6xxx_get_temp,
	.get_temp_limit		= mv88e6xxx_get_temp_limit,
	.set_temp_limit		= mv88e6xxx_set_temp_limit,
	.get_temp_alarm		= mv88e6xxx_get_temp_alarm,
#endif
	.get_eeprom		= mv88e6352_get_eeprom,
	.set_eeprom		= mv88e6352_set_eeprom,
	.get_regs_len		= mv88e6xxx_get_regs_len,
	.get_regs		= mv88e6xxx_get_regs,
	.port_join_bridge	= mv88e6xxx_join_bridge,
	.port_leave_bridge	= mv88e6xxx_leave_bridge,
	.port_stp_update	= mv88e6xxx_port_stp_update,
	.port_fdb_add		= mv88e6xxx_port_fdb_add,
	.port_fdb_del		= mv88e6xxx_port_fdb_del,
	.port_fdb_getnext	= mv88e6xxx_port_fdb_getnext,
};

MODULE_ALIAS("platform:mv88e6172");
MODULE_ALIAS("platform:mv88e6176");
MODULE_ALIAS("platform:mv88e6320");
MODULE_ALIAS("platform:mv88e6321");
MODULE_ALIAS("platform:mv88e6352");
Commit	Line	Data
3ad50cca GR	1	/*
	2	* net/dsa/mv88e6352.c - Marvell 88e6352 switch chip support
	3	*
	4	* Copyright (c) 2014 Guenter Roeck
	5	*
	6	* Derived from mv88e6123_61_65.c
	7	* Copyright (c) 2008-2009 Marvell Semiconductor
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*/
	14
	15	#include <linux/delay.h>
	16	#include <linux/jiffies.h>
	17	#include <linux/list.h>
	18	#include <linux/module.h>
	19	#include <linux/netdevice.h>
	20	#include <linux/platform_device.h>
	21	#include <linux/phy.h>
	22	#include <net/dsa.h>
	23	#include "mv88e6xxx.h"
	24
3ad50cca GR	25	static char mv88e6352_probe(struct device host_dev, int sw_addr)
	26	{
	27	struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);
	28	int ret;
	29
	30	if (bus == NULL)
	31	return NULL;
	32
cca8b133	33	ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), PORT_SWITCH_ID);
3ad50cca	34	if (ret >= 0) {
1636d883 AL	35	if ((ret & 0xfff0) == PORT_SWITCH_ID_6172)
1636d883 AL	36	return "Marvell 88E6172";
cca8b133	37	if ((ret & 0xfff0) == PORT_SWITCH_ID_6176)
2716777b	38	return "Marvell 88E6176";
7c3d0d67 AK	39	if (ret == PORT_SWITCH_ID_6320_A1)
	40	return "Marvell 88E6320 (A1)";
	41	if (ret == PORT_SWITCH_ID_6320_A2)
	42	return "Marvell 88e6320 (A2)";
	43	if ((ret & 0xfff0) == PORT_SWITCH_ID_6320)
	44	return "Marvell 88E6320";
	45	if (ret == PORT_SWITCH_ID_6321_A1)
	46	return "Marvell 88E6321 (A1)";
	47	if (ret == PORT_SWITCH_ID_6321_A2)
	48	return "Marvell 88e6321 (A2)";
	49	if ((ret & 0xfff0) == PORT_SWITCH_ID_6321)
	50	return "Marvell 88E6321";
cca8b133	51	if (ret == PORT_SWITCH_ID_6352_A0)
3ad50cca	52	return "Marvell 88E6352 (A0)";
cca8b133	53	if (ret == PORT_SWITCH_ID_6352_A1)
3ad50cca	54	return "Marvell 88E6352 (A1)";
cca8b133	55	if ((ret & 0xfff0) == PORT_SWITCH_ID_6352)
3ad50cca GR	56	return "Marvell 88E6352";
	57	}
	58
	59	return NULL;
	60	}
	61
3ad50cca GR	62	static int mv88e6352_setup_global(struct dsa_switch *ds)
3ad50cca GR	63	{
15966a2a	64	u32 upstream_port = dsa_upstream_port(ds);
3ad50cca	65	int ret;
15966a2a	66	u32 reg;
54d792f2 AL	67
	68	ret = mv88e6xxx_setup_global(ds);
	69	if (ret)
	70	return ret;
3ad50cca GR	71
	72	/* Discard packets with excessive collisions,
	73	* mask all interrupt sources, enable PPU (bit 14, undocumented).
	74	*/
15966a2a AL	75	REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,
15966a2a AL	76	GLOBAL_CONTROL_PPU_ENABLE \| GLOBAL_CONTROL_DISCARD_EXCESS);
3ad50cca	77
3ad50cca GR	78	/* Configure the upstream port, and configure the upstream
	79	* port as the port to which ingress and egress monitor frames
	80	* are to be sent.
	81	*/
15966a2a AL	82	reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT \|
	83	upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT \|
	84	upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
	85	REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
3ad50cca GR	86
	87	/* Disable remote management for now, and set the switch's
	88	* DSA device number.
	89	*/
	90	REG_WRITE(REG_GLOBAL, 0x1c, ds->index & 0x1f);
	91
3ad50cca GR	92	return 0;
	93	}
	94
3ad50cca GR	95	static int mv88e6352_setup(struct dsa_switch *ds)
	96	{
	97	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
	98	int ret;
3ad50cca	99
acdaffcc GR	100	ret = mv88e6xxx_setup_common(ds);
	101	if (ret < 0)
	102	return ret;
	103
44e50ddb AL	104	ps->num_ports = 7;
44e50ddb AL	105
33b43df4	106	mutex_init(&ps->eeprom_mutex);
3ad50cca	107
143a8307	108	ret = mv88e6xxx_switch_reset(ds, true);
3ad50cca GR	109	if (ret < 0)
	110	return ret;
	111
3ad50cca GR	112	ret = mv88e6352_setup_global(ds);
	113	if (ret < 0)
	114	return ret;
	115
dbde9e66	116	return mv88e6xxx_setup_ports(ds);
3ad50cca GR	117	}
3ad50cca GR	118
33b43df4 GR	119	static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr)
	120	{
	121	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
	122	int ret;
	123
	124	mutex_lock(&ps->eeprom_mutex);
	125
	126	ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, 0x14,
	127	0xc000 \| (addr & 0xff));
	128	if (ret < 0)
	129	goto error;
	130
f3044683	131	ret = mv88e6xxx_eeprom_busy_wait(ds);
33b43df4 GR	132	if (ret < 0)
	133	goto error;
	134
	135	ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, 0x15);
	136	error:
	137	mutex_unlock(&ps->eeprom_mutex);
	138	return ret;
	139	}
	140
	141	static int mv88e6352_get_eeprom(struct dsa_switch *ds,
	142	struct ethtool_eeprom eeprom, u8 data)
	143	{
	144	int offset;
	145	int len;
	146	int ret;
	147
	148	offset = eeprom->offset;
	149	len = eeprom->len;
	150	eeprom->len = 0;
	151
	152	eeprom->magic = 0xc3ec4951;
	153
f3044683	154	ret = mv88e6xxx_eeprom_load_wait(ds);
33b43df4 GR	155	if (ret < 0)
	156	return ret;
	157
	158	if (offset & 1) {
	159	int word;
	160
	161	word = mv88e6352_read_eeprom_word(ds, offset >> 1);
	162	if (word < 0)
	163	return word;
	164
	165	*data++ = (word >> 8) & 0xff;
	166
	167	offset++;
	168	len--;
	169	eeprom->len++;
	170	}
	171
	172	while (len >= 2) {
	173	int word;
	174
	175	word = mv88e6352_read_eeprom_word(ds, offset >> 1);
	176	if (word < 0)
	177	return word;
	178
	179	*data++ = word & 0xff;
	180	*data++ = (word >> 8) & 0xff;
	181
	182	offset += 2;
	183	len -= 2;
	184	eeprom->len += 2;
	185	}
	186
	187	if (len) {
	188	int word;
	189
	190	word = mv88e6352_read_eeprom_word(ds, offset >> 1);
	191	if (word < 0)
	192	return word;
	193
	194	*data++ = word & 0xff;
	195
	196	offset++;
	197	len--;
	198	eeprom->len++;
	199	}
	200
	201	return 0;
	202	}
	203
	204	static int mv88e6352_eeprom_is_readonly(struct dsa_switch *ds)
	205	{
	206	int ret;
	207
	208	ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, 0x14);
	209	if (ret < 0)
	210	return ret;
	211
	212	if (!(ret & 0x0400))
	213	return -EROFS;
	214
	215	return 0;
	216	}
	217
	218	static int mv88e6352_write_eeprom_word(struct dsa_switch *ds, int addr,
219	u16 data)
220	{
221	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
222	int ret;
223
224	mutex_lock(&ps->eeprom_mutex);
225
226	ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, 0x15, data);
227	if (ret < 0)
228	goto error;
229
230	ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, 0x14,
231	0xb000 \| (addr & 0xff));
232	if (ret < 0)
233	goto error;
234
f3044683	235	ret = mv88e6xxx_eeprom_busy_wait(ds);
33b43df4 GR	236	error:
	237	mutex_unlock(&ps->eeprom_mutex);
	238	return ret;
	239	}
	240
	241	static int mv88e6352_set_eeprom(struct dsa_switch *ds,
	242	struct ethtool_eeprom eeprom, u8 data)
	243	{
	244	int offset;
	245	int ret;
	246	int len;
	247
	248	if (eeprom->magic != 0xc3ec4951)
	249	return -EINVAL;
	250
	251	ret = mv88e6352_eeprom_is_readonly(ds);
	252	if (ret)
	253	return ret;
	254
	255	offset = eeprom->offset;
	256	len = eeprom->len;
	257	eeprom->len = 0;
	258
f3044683	259	ret = mv88e6xxx_eeprom_load_wait(ds);
33b43df4 GR	260	if (ret < 0)
	261	return ret;
	262
	263	if (offset & 1) {
	264	int word;
	265
	266	word = mv88e6352_read_eeprom_word(ds, offset >> 1);
	267	if (word < 0)
	268	return word;
	269
	270	word = (*data++ << 8) \| (word & 0xff);
	271
	272	ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
	273	if (ret < 0)
	274	return ret;
	275
	276	offset++;
	277	len--;
	278	eeprom->len++;
	279	}
	280
	281	while (len >= 2) {
	282	int word;
	283
	284	word = *data++;
	285	word \|= *data++ << 8;
	286
	287	ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
	288	if (ret < 0)
	289	return ret;
	290
	291	offset += 2;
	292	len -= 2;
	293	eeprom->len += 2;
	294	}
	295
	296	if (len) {
	297	int word;
	298
	299	word = mv88e6352_read_eeprom_word(ds, offset >> 1);
	300	if (word < 0)
	301	return word;
	302
	303	word = (word & 0xff00) \| *data++;
	304
	305	ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
	306	if (ret < 0)
	307	return ret;
	308
	309	offset++;
	310	len--;
	311	eeprom->len++;
	312	}
	313
	314	return 0;
	315	}
	316
3ad50cca GR	317	struct dsa_switch_driver mv88e6352_switch_driver = {
	318	.tag_protocol = DSA_TAG_PROTO_EDSA,
	319	.priv_size = sizeof(struct mv88e6xxx_priv_state),
	320	.probe = mv88e6352_probe,
	321	.setup = mv88e6352_setup,
	322	.set_addr = mv88e6xxx_set_addr_indirect,
fd3a0ee4 AL	323	.phy_read = mv88e6xxx_phy_read_indirect,
fd3a0ee4 AL	324	.phy_write = mv88e6xxx_phy_write_indirect,
3ad50cca	325	.poll_link = mv88e6xxx_poll_link,
e413e7e1 AL	326	.get_strings = mv88e6xxx_get_strings,
	327	.get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
	328	.get_sset_count = mv88e6xxx_get_sset_count,
04b0a80b GR	329	.set_eee = mv88e6xxx_set_eee,
04b0a80b GR	330	.get_eee = mv88e6xxx_get_eee,
276db3b1	331	#ifdef CONFIG_NET_DSA_HWMON
c22995c5 GR	332	.get_temp = mv88e6xxx_get_temp,
	333	.get_temp_limit = mv88e6xxx_get_temp_limit,
	334	.set_temp_limit = mv88e6xxx_set_temp_limit,
	335	.get_temp_alarm = mv88e6xxx_get_temp_alarm,
276db3b1	336	#endif
33b43df4 GR	337	.get_eeprom = mv88e6352_get_eeprom,
33b43df4 GR	338	.set_eeprom = mv88e6352_set_eeprom,
95d08b5a GR	339	.get_regs_len = mv88e6xxx_get_regs_len,
95d08b5a GR	340	.get_regs = mv88e6xxx_get_regs,
3f244abb GR	341	.port_join_bridge = mv88e6xxx_join_bridge,
	342	.port_leave_bridge = mv88e6xxx_leave_bridge,
	343	.port_stp_update = mv88e6xxx_port_stp_update,
87820510 VD	344	.port_fdb_add = mv88e6xxx_port_fdb_add,
87820510 VD	345	.port_fdb_del = mv88e6xxx_port_fdb_del,
6630e236	346	.port_fdb_getnext = mv88e6xxx_port_fdb_getnext,
3ad50cca GR	347	};
3ad50cca GR	348
1636d883	349	MODULE_ALIAS("platform:mv88e6172");
7c3d0d67 AK	350	MODULE_ALIAS("platform:mv88e6176");
	351	MODULE_ALIAS("platform:mv88e6320");
	352	MODULE_ALIAS("platform:mv88e6321");
	353	MODULE_ALIAS("platform:mv88e6352");