signals: consolidate checks for whether or not to ignore a signal
[deliverable/linux.git] / drivers / net / e1000 / e1000_ethtool.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2
0abb6eb1
AK
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
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AK
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include "e1000.h"
32
33#include <asm/uaccess.h>
34
35574764
NN
35extern int e1000_up(struct e1000_adapter *adapter);
36extern void e1000_down(struct e1000_adapter *adapter);
37extern void e1000_reinit_locked(struct e1000_adapter *adapter);
38extern void e1000_reset(struct e1000_adapter *adapter);
406874a7 39extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN
40extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
41extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
42extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
43extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
44extern void e1000_update_stats(struct e1000_adapter *adapter);
45
46
1da177e4
LT
47struct e1000_stats {
48 char stat_string[ETH_GSTRING_LEN];
49 int sizeof_stat;
50 int stat_offset;
51};
52
030ed68b 53#define E1000_STAT(m) FIELD_SIZEOF(struct e1000_adapter, m), \
1da177e4
LT
54 offsetof(struct e1000_adapter, m)
55static const struct e1000_stats e1000_gstrings_stats[] = {
49559854
MW
56 { "rx_packets", E1000_STAT(stats.gprc) },
57 { "tx_packets", E1000_STAT(stats.gptc) },
58 { "rx_bytes", E1000_STAT(stats.gorcl) },
59 { "tx_bytes", E1000_STAT(stats.gotcl) },
60 { "rx_broadcast", E1000_STAT(stats.bprc) },
61 { "tx_broadcast", E1000_STAT(stats.bptc) },
62 { "rx_multicast", E1000_STAT(stats.mprc) },
63 { "tx_multicast", E1000_STAT(stats.mptc) },
64 { "rx_errors", E1000_STAT(stats.rxerrc) },
65 { "tx_errors", E1000_STAT(stats.txerrc) },
1da177e4 66 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
49559854
MW
67 { "multicast", E1000_STAT(stats.mprc) },
68 { "collisions", E1000_STAT(stats.colc) },
69 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
1da177e4 70 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
49559854 71 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
1da177e4 72 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
2648345f 73 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
49559854
MW
74 { "rx_missed_errors", E1000_STAT(stats.mpc) },
75 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
76 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
1da177e4
LT
77 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
78 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
49559854 79 { "tx_window_errors", E1000_STAT(stats.latecol) },
1da177e4
LT
80 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
81 { "tx_deferred_ok", E1000_STAT(stats.dc) },
82 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
83 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
6b7660cd 84 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
fcfb1224 85 { "tx_restart_queue", E1000_STAT(restart_queue) },
1da177e4
LT
86 { "rx_long_length_errors", E1000_STAT(stats.roc) },
87 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
88 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
89 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
90 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
91 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
92 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
93 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
94 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
95 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
96 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
e4c811c9
MC
97 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
98 { "rx_header_split", E1000_STAT(rx_hdr_split) },
6b7660cd 99 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
15e376b4
JG
100 { "tx_smbus", E1000_STAT(stats.mgptc) },
101 { "rx_smbus", E1000_STAT(stats.mgprc) },
102 { "dropped_smbus", E1000_STAT(stats.mgpdc) },
1da177e4 103};
7bfa4816 104
7bfa4816 105#define E1000_QUEUE_STATS_LEN 0
ff8ac609 106#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
7bfa4816 107#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
1da177e4
LT
108static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
109 "Register test (offline)", "Eeprom test (offline)",
110 "Interrupt test (offline)", "Loopback test (offline)",
111 "Link test (on/offline)"
112};
4c3616cd 113#define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
1da177e4
LT
114
115static int
116e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
117{
60490fe0 118 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
119 struct e1000_hw *hw = &adapter->hw;
120
96838a40 121 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT
122
123 ecmd->supported = (SUPPORTED_10baseT_Half |
124 SUPPORTED_10baseT_Full |
125 SUPPORTED_100baseT_Half |
126 SUPPORTED_100baseT_Full |
127 SUPPORTED_1000baseT_Full|
128 SUPPORTED_Autoneg |
129 SUPPORTED_TP);
cd94dd0b
AK
130 if (hw->phy_type == e1000_phy_ife)
131 ecmd->supported &= ~SUPPORTED_1000baseT_Full;
1da177e4
LT
132 ecmd->advertising = ADVERTISED_TP;
133
96838a40 134 if (hw->autoneg == 1) {
1da177e4 135 ecmd->advertising |= ADVERTISED_Autoneg;
1da177e4 136 /* the e1000 autoneg seems to match ethtool nicely */
1da177e4
LT
137 ecmd->advertising |= hw->autoneg_advertised;
138 }
139
140 ecmd->port = PORT_TP;
141 ecmd->phy_address = hw->phy_addr;
142
96838a40 143 if (hw->mac_type == e1000_82543)
1da177e4
LT
144 ecmd->transceiver = XCVR_EXTERNAL;
145 else
146 ecmd->transceiver = XCVR_INTERNAL;
147
148 } else {
149 ecmd->supported = (SUPPORTED_1000baseT_Full |
150 SUPPORTED_FIBRE |
151 SUPPORTED_Autoneg);
152
012609a8
MC
153 ecmd->advertising = (ADVERTISED_1000baseT_Full |
154 ADVERTISED_FIBRE |
155 ADVERTISED_Autoneg);
1da177e4
LT
156
157 ecmd->port = PORT_FIBRE;
158
96838a40 159 if (hw->mac_type >= e1000_82545)
1da177e4
LT
160 ecmd->transceiver = XCVR_INTERNAL;
161 else
162 ecmd->transceiver = XCVR_EXTERNAL;
163 }
164
ca6efb7d 165 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) {
1da177e4
LT
166
167 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
168 &adapter->link_duplex);
169 ecmd->speed = adapter->link_speed;
170
171 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
172 * and HALF_DUPLEX != DUPLEX_HALF */
173
96838a40 174 if (adapter->link_duplex == FULL_DUPLEX)
1da177e4
LT
175 ecmd->duplex = DUPLEX_FULL;
176 else
177 ecmd->duplex = DUPLEX_HALF;
178 } else {
179 ecmd->speed = -1;
180 ecmd->duplex = -1;
181 }
182
183 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
184 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
185 return 0;
186}
187
188static int
189e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
190{
60490fe0 191 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
192 struct e1000_hw *hw = &adapter->hw;
193
57128197
JK
194 /* When SoL/IDER sessions are active, autoneg/speed/duplex
195 * cannot be changed */
196 if (e1000_check_phy_reset_block(hw)) {
197 DPRINTK(DRV, ERR, "Cannot change link characteristics "
198 "when SoL/IDER is active.\n");
199 return -EINVAL;
200 }
201
1a821ca5
JB
202 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
203 msleep(1);
204
57128197 205 if (ecmd->autoneg == AUTONEG_ENABLE) {
1da177e4 206 hw->autoneg = 1;
96838a40 207 if (hw->media_type == e1000_media_type_fiber)
012609a8
MC
208 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
209 ADVERTISED_FIBRE |
210 ADVERTISED_Autoneg;
96838a40 211 else
2f2ca263
JK
212 hw->autoneg_advertised = ecmd->advertising |
213 ADVERTISED_TP |
214 ADVERTISED_Autoneg;
012609a8 215 ecmd->advertising = hw->autoneg_advertised;
1da177e4 216 } else
1a821ca5
JB
217 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
218 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 219 return -EINVAL;
1a821ca5 220 }
1da177e4
LT
221
222 /* reset the link */
223
1a821ca5
JB
224 if (netif_running(adapter->netdev)) {
225 e1000_down(adapter);
226 e1000_up(adapter);
227 } else
1da177e4
LT
228 e1000_reset(adapter);
229
1a821ca5 230 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
231 return 0;
232}
233
234static void
235e1000_get_pauseparam(struct net_device *netdev,
236 struct ethtool_pauseparam *pause)
237{
60490fe0 238 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
239 struct e1000_hw *hw = &adapter->hw;
240
96838a40 241 pause->autoneg =
1da177e4 242 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
96838a40 243
11241b10 244 if (hw->fc == E1000_FC_RX_PAUSE)
1da177e4 245 pause->rx_pause = 1;
11241b10 246 else if (hw->fc == E1000_FC_TX_PAUSE)
1da177e4 247 pause->tx_pause = 1;
11241b10 248 else if (hw->fc == E1000_FC_FULL) {
1da177e4
LT
249 pause->rx_pause = 1;
250 pause->tx_pause = 1;
251 }
252}
253
254static int
255e1000_set_pauseparam(struct net_device *netdev,
256 struct ethtool_pauseparam *pause)
257{
60490fe0 258 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 259 struct e1000_hw *hw = &adapter->hw;
1a821ca5 260 int retval = 0;
96838a40 261
1da177e4
LT
262 adapter->fc_autoneg = pause->autoneg;
263
1a821ca5
JB
264 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
265 msleep(1);
266
96838a40 267 if (pause->rx_pause && pause->tx_pause)
11241b10 268 hw->fc = E1000_FC_FULL;
96838a40 269 else if (pause->rx_pause && !pause->tx_pause)
11241b10 270 hw->fc = E1000_FC_RX_PAUSE;
96838a40 271 else if (!pause->rx_pause && pause->tx_pause)
11241b10 272 hw->fc = E1000_FC_TX_PAUSE;
96838a40 273 else if (!pause->rx_pause && !pause->tx_pause)
11241b10 274 hw->fc = E1000_FC_NONE;
1da177e4
LT
275
276 hw->original_fc = hw->fc;
277
96838a40 278 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
1a821ca5
JB
279 if (netif_running(adapter->netdev)) {
280 e1000_down(adapter);
281 e1000_up(adapter);
282 } else
1da177e4 283 e1000_reset(adapter);
96838a40 284 } else
1a821ca5 285 retval = ((hw->media_type == e1000_media_type_fiber) ?
90fb5135 286 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
96838a40 287
1a821ca5
JB
288 clear_bit(__E1000_RESETTING, &adapter->flags);
289 return retval;
1da177e4
LT
290}
291
406874a7 292static u32
1da177e4
LT
293e1000_get_rx_csum(struct net_device *netdev)
294{
60490fe0 295 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
296 return adapter->rx_csum;
297}
298
299static int
406874a7 300e1000_set_rx_csum(struct net_device *netdev, u32 data)
1da177e4 301{
60490fe0 302 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
303 adapter->rx_csum = data;
304
2db10a08
AK
305 if (netif_running(netdev))
306 e1000_reinit_locked(adapter);
307 else
1da177e4
LT
308 e1000_reset(adapter);
309 return 0;
310}
96838a40 311
406874a7 312static u32
1da177e4
LT
313e1000_get_tx_csum(struct net_device *netdev)
314{
315 return (netdev->features & NETIF_F_HW_CSUM) != 0;
316}
317
318static int
406874a7 319e1000_set_tx_csum(struct net_device *netdev, u32 data)
1da177e4 320{
60490fe0 321 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 322
96838a40 323 if (adapter->hw.mac_type < e1000_82543) {
1da177e4
LT
324 if (!data)
325 return -EINVAL;
326 return 0;
327 }
328
329 if (data)
330 netdev->features |= NETIF_F_HW_CSUM;
331 else
332 netdev->features &= ~NETIF_F_HW_CSUM;
333
334 return 0;
335}
336
1da177e4 337static int
406874a7 338e1000_set_tso(struct net_device *netdev, u32 data)
1da177e4 339{
60490fe0 340 struct e1000_adapter *adapter = netdev_priv(netdev);
96838a40
JB
341 if ((adapter->hw.mac_type < e1000_82544) ||
342 (adapter->hw.mac_type == e1000_82547))
1da177e4
LT
343 return data ? -EINVAL : 0;
344
345 if (data)
346 netdev->features |= NETIF_F_TSO;
347 else
348 netdev->features &= ~NETIF_F_TSO;
7e6c9861 349
87ca4e5b
AK
350 if (data)
351 netdev->features |= NETIF_F_TSO6;
352 else
353 netdev->features &= ~NETIF_F_TSO6;
87ca4e5b 354
7e6c9861 355 DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
c3033b01 356 adapter->tso_force = true;
1da177e4 357 return 0;
96838a40 358}
1da177e4 359
406874a7 360static u32
1da177e4
LT
361e1000_get_msglevel(struct net_device *netdev)
362{
60490fe0 363 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
364 return adapter->msg_enable;
365}
366
367static void
406874a7 368e1000_set_msglevel(struct net_device *netdev, u32 data)
1da177e4 369{
60490fe0 370 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
371 adapter->msg_enable = data;
372}
373
96838a40 374static int
1da177e4
LT
375e1000_get_regs_len(struct net_device *netdev)
376{
377#define E1000_REGS_LEN 32
406874a7 378 return E1000_REGS_LEN * sizeof(u32);
1da177e4
LT
379}
380
381static void
382e1000_get_regs(struct net_device *netdev,
383 struct ethtool_regs *regs, void *p)
384{
60490fe0 385 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 386 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
387 u32 *regs_buff = p;
388 u16 phy_data;
1da177e4 389
406874a7 390 memset(p, 0, E1000_REGS_LEN * sizeof(u32));
1da177e4
LT
391
392 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
393
394 regs_buff[0] = E1000_READ_REG(hw, CTRL);
395 regs_buff[1] = E1000_READ_REG(hw, STATUS);
396
397 regs_buff[2] = E1000_READ_REG(hw, RCTL);
398 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
399 regs_buff[4] = E1000_READ_REG(hw, RDH);
400 regs_buff[5] = E1000_READ_REG(hw, RDT);
401 regs_buff[6] = E1000_READ_REG(hw, RDTR);
402
403 regs_buff[7] = E1000_READ_REG(hw, TCTL);
404 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
405 regs_buff[9] = E1000_READ_REG(hw, TDH);
406 regs_buff[10] = E1000_READ_REG(hw, TDT);
407 regs_buff[11] = E1000_READ_REG(hw, TIDV);
408
409 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
96838a40 410 if (hw->phy_type == e1000_phy_igp) {
1da177e4
LT
411 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
412 IGP01E1000_PHY_AGC_A);
413 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
414 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 415 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT
416 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
417 IGP01E1000_PHY_AGC_B);
418 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
419 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 420 regs_buff[14] = (u32)phy_data; /* cable length */
1da177e4
LT
421 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
422 IGP01E1000_PHY_AGC_C);
423 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
424 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 425 regs_buff[15] = (u32)phy_data; /* cable length */
1da177e4
LT
426 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
427 IGP01E1000_PHY_AGC_D);
428 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
429 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 430 regs_buff[16] = (u32)phy_data; /* cable length */
1da177e4
LT
431 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
432 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
433 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
434 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 435 regs_buff[18] = (u32)phy_data; /* cable polarity */
1da177e4
LT
436 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
437 IGP01E1000_PHY_PCS_INIT_REG);
438 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
439 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 440 regs_buff[19] = (u32)phy_data; /* cable polarity */
1da177e4
LT
441 regs_buff[20] = 0; /* polarity correction enabled (always) */
442 regs_buff[22] = 0; /* phy receive errors (unavailable) */
443 regs_buff[23] = regs_buff[18]; /* mdix mode */
444 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
445 } else {
8fc897b0 446 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
406874a7 447 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT
448 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
449 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
450 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
8fc897b0 451 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
406874a7 452 regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
1da177e4
LT
453 regs_buff[18] = regs_buff[13]; /* cable polarity */
454 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
455 regs_buff[20] = regs_buff[17]; /* polarity correction */
456 /* phy receive errors */
457 regs_buff[22] = adapter->phy_stats.receive_errors;
458 regs_buff[23] = regs_buff[13]; /* mdix mode */
459 }
460 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
461 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
406874a7 462 regs_buff[24] = (u32)phy_data; /* phy local receiver status */
1da177e4 463 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
96838a40 464 if (hw->mac_type >= e1000_82540 &&
4ccc12ae
JB
465 hw->mac_type < e1000_82571 &&
466 hw->media_type == e1000_media_type_copper) {
1da177e4
LT
467 regs_buff[26] = E1000_READ_REG(hw, MANC);
468 }
469}
470
471static int
472e1000_get_eeprom_len(struct net_device *netdev)
473{
60490fe0 474 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
475 return adapter->hw.eeprom.word_size * 2;
476}
477
478static int
479e1000_get_eeprom(struct net_device *netdev,
406874a7 480 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 481{
60490fe0 482 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 483 struct e1000_hw *hw = &adapter->hw;
406874a7 484 u16 *eeprom_buff;
1da177e4
LT
485 int first_word, last_word;
486 int ret_val = 0;
406874a7 487 u16 i;
1da177e4 488
96838a40 489 if (eeprom->len == 0)
1da177e4
LT
490 return -EINVAL;
491
492 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
493
494 first_word = eeprom->offset >> 1;
495 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
496
406874a7 497 eeprom_buff = kmalloc(sizeof(u16) *
1da177e4 498 (last_word - first_word + 1), GFP_KERNEL);
96838a40 499 if (!eeprom_buff)
1da177e4
LT
500 return -ENOMEM;
501
96838a40 502 if (hw->eeprom.type == e1000_eeprom_spi)
1da177e4
LT
503 ret_val = e1000_read_eeprom(hw, first_word,
504 last_word - first_word + 1,
505 eeprom_buff);
506 else {
507 for (i = 0; i < last_word - first_word + 1; i++)
96838a40 508 if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
1da177e4
LT
509 &eeprom_buff[i])))
510 break;
511 }
512
513 /* Device's eeprom is always little-endian, word addressable */
514 for (i = 0; i < last_word - first_word + 1; i++)
515 le16_to_cpus(&eeprom_buff[i]);
516
406874a7 517 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
1da177e4
LT
518 eeprom->len);
519 kfree(eeprom_buff);
520
521 return ret_val;
522}
523
524static int
525e1000_set_eeprom(struct net_device *netdev,
406874a7 526 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 527{
60490fe0 528 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 529 struct e1000_hw *hw = &adapter->hw;
406874a7 530 u16 *eeprom_buff;
1da177e4
LT
531 void *ptr;
532 int max_len, first_word, last_word, ret_val = 0;
406874a7 533 u16 i;
1da177e4 534
96838a40 535 if (eeprom->len == 0)
1da177e4
LT
536 return -EOPNOTSUPP;
537
96838a40 538 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1da177e4
LT
539 return -EFAULT;
540
541 max_len = hw->eeprom.word_size * 2;
542
543 first_word = eeprom->offset >> 1;
544 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
545 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
96838a40 546 if (!eeprom_buff)
1da177e4
LT
547 return -ENOMEM;
548
549 ptr = (void *)eeprom_buff;
550
96838a40 551 if (eeprom->offset & 1) {
1da177e4
LT
552 /* need read/modify/write of first changed EEPROM word */
553 /* only the second byte of the word is being modified */
554 ret_val = e1000_read_eeprom(hw, first_word, 1,
555 &eeprom_buff[0]);
556 ptr++;
557 }
96838a40 558 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
1da177e4
LT
559 /* need read/modify/write of last changed EEPROM word */
560 /* only the first byte of the word is being modified */
561 ret_val = e1000_read_eeprom(hw, last_word, 1,
562 &eeprom_buff[last_word - first_word]);
563 }
564
565 /* Device's eeprom is always little-endian, word addressable */
566 for (i = 0; i < last_word - first_word + 1; i++)
567 le16_to_cpus(&eeprom_buff[i]);
568
569 memcpy(ptr, bytes, eeprom->len);
570
571 for (i = 0; i < last_word - first_word + 1; i++)
572 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
573
574 ret_val = e1000_write_eeprom(hw, first_word,
575 last_word - first_word + 1, eeprom_buff);
576
96838a40 577 /* Update the checksum over the first part of the EEPROM if needed
a7990ba6 578 * and flush shadow RAM for 82573 conrollers */
96838a40 579 if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
a7990ba6 580 (hw->mac_type == e1000_82573)))
1da177e4
LT
581 e1000_update_eeprom_checksum(hw);
582
583 kfree(eeprom_buff);
584 return ret_val;
585}
586
587static void
588e1000_get_drvinfo(struct net_device *netdev,
589 struct ethtool_drvinfo *drvinfo)
590{
60490fe0 591 struct e1000_adapter *adapter = netdev_priv(netdev);
a2917e22 592 char firmware_version[32];
406874a7 593 u16 eeprom_data;
1da177e4
LT
594
595 strncpy(drvinfo->driver, e1000_driver_name, 32);
596 strncpy(drvinfo->version, e1000_driver_version, 32);
a2917e22
JK
597
598 /* EEPROM image version # is reported as firmware version # for
599 * 8257{1|2|3} controllers */
600 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
601 switch (adapter->hw.mac_type) {
602 case e1000_82571:
603 case e1000_82572:
604 case e1000_82573:
6418ecc6 605 case e1000_80003es2lan:
cd94dd0b 606 case e1000_ich8lan:
a2917e22
JK
607 sprintf(firmware_version, "%d.%d-%d",
608 (eeprom_data & 0xF000) >> 12,
609 (eeprom_data & 0x0FF0) >> 4,
610 eeprom_data & 0x000F);
611 break;
612 default:
613 sprintf(firmware_version, "N/A");
614 }
615
616 strncpy(drvinfo->fw_version, firmware_version, 32);
1da177e4 617 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
1da177e4
LT
618 drvinfo->regdump_len = e1000_get_regs_len(netdev);
619 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
620}
621
622static void
623e1000_get_ringparam(struct net_device *netdev,
624 struct ethtool_ringparam *ring)
625{
60490fe0 626 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 627 e1000_mac_type mac_type = adapter->hw.mac_type;
581d708e
MC
628 struct e1000_tx_ring *txdr = adapter->tx_ring;
629 struct e1000_rx_ring *rxdr = adapter->rx_ring;
1da177e4
LT
630
631 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
632 E1000_MAX_82544_RXD;
633 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
634 E1000_MAX_82544_TXD;
635 ring->rx_mini_max_pending = 0;
636 ring->rx_jumbo_max_pending = 0;
637 ring->rx_pending = rxdr->count;
638 ring->tx_pending = txdr->count;
639 ring->rx_mini_pending = 0;
640 ring->rx_jumbo_pending = 0;
641}
642
96838a40 643static int
1da177e4
LT
644e1000_set_ringparam(struct net_device *netdev,
645 struct ethtool_ringparam *ring)
646{
60490fe0 647 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 648 e1000_mac_type mac_type = adapter->hw.mac_type;
793fab72
VA
649 struct e1000_tx_ring *txdr, *tx_old;
650 struct e1000_rx_ring *rxdr, *rx_old;
1c7e5b12 651 int i, err;
581d708e 652
0989aa43
JK
653 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
654 return -EINVAL;
655
2db10a08
AK
656 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
657 msleep(1);
658
581d708e
MC
659 if (netif_running(adapter->netdev))
660 e1000_down(adapter);
1da177e4
LT
661
662 tx_old = adapter->tx_ring;
663 rx_old = adapter->rx_ring;
664
793fab72 665 err = -ENOMEM;
1c7e5b12 666 txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring), GFP_KERNEL);
793fab72
VA
667 if (!txdr)
668 goto err_alloc_tx;
581d708e 669
1c7e5b12 670 rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring), GFP_KERNEL);
793fab72
VA
671 if (!rxdr)
672 goto err_alloc_rx;
581d708e 673
793fab72
VA
674 adapter->tx_ring = txdr;
675 adapter->rx_ring = rxdr;
581d708e 676
406874a7
JP
677 rxdr->count = max(ring->rx_pending,(u32)E1000_MIN_RXD);
678 rxdr->count = min(rxdr->count,(u32)(mac_type < e1000_82544 ?
1da177e4 679 E1000_MAX_RXD : E1000_MAX_82544_RXD));
9099cfb9 680 rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
1da177e4 681
406874a7
JP
682 txdr->count = max(ring->tx_pending,(u32)E1000_MIN_TXD);
683 txdr->count = min(txdr->count,(u32)(mac_type < e1000_82544 ?
1da177e4 684 E1000_MAX_TXD : E1000_MAX_82544_TXD));
9099cfb9 685 txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
1da177e4 686
f56799ea 687 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 688 txdr[i].count = txdr->count;
f56799ea 689 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 690 rxdr[i].count = rxdr->count;
581d708e 691
96838a40 692 if (netif_running(adapter->netdev)) {
1da177e4 693 /* Try to get new resources before deleting old */
581d708e 694 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4 695 goto err_setup_rx;
581d708e 696 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT
697 goto err_setup_tx;
698
699 /* save the new, restore the old in order to free it,
700 * then restore the new back again */
701
1da177e4
LT
702 adapter->rx_ring = rx_old;
703 adapter->tx_ring = tx_old;
581d708e
MC
704 e1000_free_all_rx_resources(adapter);
705 e1000_free_all_tx_resources(adapter);
706 kfree(tx_old);
707 kfree(rx_old);
793fab72
VA
708 adapter->rx_ring = rxdr;
709 adapter->tx_ring = txdr;
96838a40 710 if ((err = e1000_up(adapter)))
2db10a08 711 goto err_setup;
1da177e4
LT
712 }
713
2db10a08 714 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
715 return 0;
716err_setup_tx:
581d708e 717 e1000_free_all_rx_resources(adapter);
1da177e4
LT
718err_setup_rx:
719 adapter->rx_ring = rx_old;
720 adapter->tx_ring = tx_old;
793fab72
VA
721 kfree(rxdr);
722err_alloc_rx:
723 kfree(txdr);
724err_alloc_tx:
1da177e4 725 e1000_up(adapter);
2db10a08
AK
726err_setup:
727 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
728 return err;
729}
730
406874a7
JP
731static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,
732 int reg, u32 mask, u32 write)
7e64300a 733{
406874a7 734 static const u32 test[] =
7e64300a 735 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
406874a7
JP
736 u8 __iomem *address = adapter->hw.hw_addr + reg;
737 u32 read;
7e64300a
JP
738 int i;
739
740 for (i = 0; i < ARRAY_SIZE(test); i++) {
741 writel(write & test[i], address);
742 read = readl(address);
743 if (read != (write & test[i] & mask)) {
744 DPRINTK(DRV, ERR, "pattern test reg %04X failed: "
745 "got 0x%08X expected 0x%08X\n",
cba0516d 746 reg, read, (write & test[i] & mask));
7e64300a
JP
747 *data = reg;
748 return true;
749 }
750 }
751 return false;
1da177e4
LT
752}
753
406874a7
JP
754static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,
755 int reg, u32 mask, u32 write)
7e64300a 756{
406874a7
JP
757 u8 __iomem *address = adapter->hw.hw_addr + reg;
758 u32 read;
7e64300a
JP
759
760 writel(write & mask, address);
761 read = readl(address);
762 if ((read & mask) != (write & mask)) {
763 DPRINTK(DRV, ERR, "set/check reg %04X test failed: "
764 "got 0x%08X expected 0x%08X\n",
765 reg, (read & mask), (write & mask));
766 *data = reg;
767 return true;
768 }
769 return false;
1da177e4
LT
770}
771
7e64300a
JP
772#define REG_PATTERN_TEST(reg, mask, write) \
773 do { \
774 if (reg_pattern_test(adapter, data, \
775 (adapter->hw.mac_type >= e1000_82543) \
776 ? E1000_##reg : E1000_82542_##reg, \
777 mask, write)) \
778 return 1; \
779 } while (0)
780
781#define REG_SET_AND_CHECK(reg, mask, write) \
782 do { \
783 if (reg_set_and_check(adapter, data, \
784 (adapter->hw.mac_type >= e1000_82543) \
785 ? E1000_##reg : E1000_82542_##reg, \
786 mask, write)) \
787 return 1; \
788 } while (0)
789
1da177e4 790static int
406874a7 791e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 792{
406874a7
JP
793 u32 value, before, after;
794 u32 i, toggle;
1da177e4
LT
795
796 /* The status register is Read Only, so a write should fail.
797 * Some bits that get toggled are ignored.
798 */
90fb5135 799 switch (adapter->hw.mac_type) {
868d5309
MC
800 /* there are several bits on newer hardware that are r/w */
801 case e1000_82571:
802 case e1000_82572:
6418ecc6 803 case e1000_80003es2lan:
868d5309
MC
804 toggle = 0x7FFFF3FF;
805 break;
b01f6691 806 case e1000_82573:
cd94dd0b 807 case e1000_ich8lan:
b01f6691
MC
808 toggle = 0x7FFFF033;
809 break;
810 default:
811 toggle = 0xFFFFF833;
812 break;
813 }
814
815 before = E1000_READ_REG(&adapter->hw, STATUS);
816 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
817 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
818 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
96838a40 819 if (value != after) {
b01f6691
MC
820 DPRINTK(DRV, ERR, "failed STATUS register test got: "
821 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT
822 *data = 1;
823 return 1;
824 }
b01f6691
MC
825 /* restore previous status */
826 E1000_WRITE_REG(&adapter->hw, STATUS, before);
90fb5135 827
cd94dd0b
AK
828 if (adapter->hw.mac_type != e1000_ich8lan) {
829 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
830 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
831 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
832 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
833 }
90fb5135 834
1da177e4
LT
835 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
836 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
837 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
838 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
839 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
840 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
841 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
842 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
843 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
844 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
845
846 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
90fb5135 847
cd94dd0b 848 before = (adapter->hw.mac_type == e1000_ich8lan ?
90fb5135 849 0x06C3B33E : 0x06DFB3FE);
cd94dd0b 850 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
1da177e4
LT
851 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
852
96838a40 853 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4 854
cd94dd0b 855 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
1da177e4 856 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
cd94dd0b
AK
857 if (adapter->hw.mac_type != e1000_ich8lan)
858 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
1da177e4
LT
859 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
860 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
cd94dd0b 861 value = (adapter->hw.mac_type == e1000_ich8lan ?
90fb5135 862 E1000_RAR_ENTRIES_ICH8LAN : E1000_RAR_ENTRIES);
cd94dd0b 863 for (i = 0; i < value; i++) {
1da177e4 864 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
90fb5135 865 0xFFFFFFFF);
1da177e4
LT
866 }
867
868 } else {
869
870 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
871 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
872 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
873 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
874
875 }
876
cd94dd0b
AK
877 value = (adapter->hw.mac_type == e1000_ich8lan ?
878 E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE);
879 for (i = 0; i < value; i++)
1da177e4
LT
880 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
881
882 *data = 0;
883 return 0;
884}
885
886static int
406874a7 887e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 888{
406874a7
JP
889 u16 temp;
890 u16 checksum = 0;
891 u16 i;
1da177e4
LT
892
893 *data = 0;
894 /* Read and add up the contents of the EEPROM */
96838a40
JB
895 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
896 if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
1da177e4
LT
897 *data = 1;
898 break;
899 }
900 checksum += temp;
901 }
902
903 /* If Checksum is not Correct return error else test passed */
406874a7 904 if ((checksum != (u16) EEPROM_SUM) && !(*data))
1da177e4
LT
905 *data = 2;
906
907 return *data;
908}
909
910static irqreturn_t
90fb5135 911e1000_test_intr(int irq, void *data)
1da177e4
LT
912{
913 struct net_device *netdev = (struct net_device *) data;
60490fe0 914 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
915
916 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
917
918 return IRQ_HANDLED;
919}
920
921static int
406874a7 922e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
1da177e4
LT
923{
924 struct net_device *netdev = adapter->netdev;
406874a7 925 u32 mask, i = 0;
c3033b01 926 bool shared_int = true;
406874a7 927 u32 irq = adapter->pdev->irq;
1da177e4
LT
928
929 *data = 0;
930
8fc897b0 931 /* NOTE: we don't test MSI interrupts here, yet */
1da177e4 932 /* Hook up test interrupt handler just for this test */
90fb5135
AK
933 if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
934 netdev))
c3033b01 935 shared_int = false;
8fc897b0 936 else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
90fb5135 937 netdev->name, netdev)) {
1da177e4
LT
938 *data = 1;
939 return -1;
940 }
8fc897b0 941 DPRINTK(HW, INFO, "testing %s interrupt\n",
b9b6e78b 942 (shared_int ? "shared" : "unshared"));
1da177e4
LT
943
944 /* Disable all the interrupts */
945 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
f8ec4733 946 msleep(10);
1da177e4
LT
947
948 /* Test each interrupt */
96838a40 949 for (; i < 10; i++) {
1da177e4 950
cd94dd0b
AK
951 if (adapter->hw.mac_type == e1000_ich8lan && i == 8)
952 continue;
90fb5135 953
1da177e4
LT
954 /* Interrupt to test */
955 mask = 1 << i;
956
76c224bc
AK
957 if (!shared_int) {
958 /* Disable the interrupt to be reported in
959 * the cause register and then force the same
960 * interrupt and see if one gets posted. If
961 * an interrupt was posted to the bus, the
962 * test failed.
963 */
964 adapter->test_icr = 0;
965 E1000_WRITE_REG(&adapter->hw, IMC, mask);
966 E1000_WRITE_REG(&adapter->hw, ICS, mask);
f8ec4733 967 msleep(10);
76c224bc
AK
968
969 if (adapter->test_icr & mask) {
970 *data = 3;
971 break;
972 }
1da177e4
LT
973 }
974
975 /* Enable the interrupt to be reported in
976 * the cause register and then force the same
977 * interrupt and see if one gets posted. If
978 * an interrupt was not posted to the bus, the
979 * test failed.
980 */
981 adapter->test_icr = 0;
982 E1000_WRITE_REG(&adapter->hw, IMS, mask);
983 E1000_WRITE_REG(&adapter->hw, ICS, mask);
f8ec4733 984 msleep(10);
1da177e4 985
96838a40 986 if (!(adapter->test_icr & mask)) {
1da177e4
LT
987 *data = 4;
988 break;
989 }
990
76c224bc 991 if (!shared_int) {
1da177e4
LT
992 /* Disable the other interrupts to be reported in
993 * the cause register and then force the other
994 * interrupts and see if any get posted. If
995 * an interrupt was posted to the bus, the
996 * test failed.
997 */
998 adapter->test_icr = 0;
2648345f
MC
999 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
1000 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
f8ec4733 1001 msleep(10);
1da177e4 1002
96838a40 1003 if (adapter->test_icr) {
1da177e4
LT
1004 *data = 5;
1005 break;
1006 }
1007 }
1008 }
1009
1010 /* Disable all the interrupts */
1011 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
f8ec4733 1012 msleep(10);
1da177e4
LT
1013
1014 /* Unhook test interrupt handler */
1015 free_irq(irq, netdev);
1016
1017 return *data;
1018}
1019
1020static void
1021e1000_free_desc_rings(struct e1000_adapter *adapter)
1022{
581d708e
MC
1023 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1024 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT
1025 struct pci_dev *pdev = adapter->pdev;
1026 int i;
1027
96838a40
JB
1028 if (txdr->desc && txdr->buffer_info) {
1029 for (i = 0; i < txdr->count; i++) {
1030 if (txdr->buffer_info[i].dma)
1da177e4
LT
1031 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
1032 txdr->buffer_info[i].length,
1033 PCI_DMA_TODEVICE);
96838a40 1034 if (txdr->buffer_info[i].skb)
1da177e4
LT
1035 dev_kfree_skb(txdr->buffer_info[i].skb);
1036 }
1037 }
1038
96838a40
JB
1039 if (rxdr->desc && rxdr->buffer_info) {
1040 for (i = 0; i < rxdr->count; i++) {
1041 if (rxdr->buffer_info[i].dma)
1da177e4
LT
1042 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
1043 rxdr->buffer_info[i].length,
1044 PCI_DMA_FROMDEVICE);
96838a40 1045 if (rxdr->buffer_info[i].skb)
1da177e4
LT
1046 dev_kfree_skb(rxdr->buffer_info[i].skb);
1047 }
1048 }
1049
f5645110 1050 if (txdr->desc) {
1da177e4 1051 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
6b27adb6
JL
1052 txdr->desc = NULL;
1053 }
f5645110 1054 if (rxdr->desc) {
1da177e4 1055 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
6b27adb6
JL
1056 rxdr->desc = NULL;
1057 }
1da177e4 1058
b4558ea9 1059 kfree(txdr->buffer_info);
6b27adb6 1060 txdr->buffer_info = NULL;
b4558ea9 1061 kfree(rxdr->buffer_info);
6b27adb6 1062 rxdr->buffer_info = NULL;
f5645110 1063
1da177e4
LT
1064 return;
1065}
1066
1067static int
1068e1000_setup_desc_rings(struct e1000_adapter *adapter)
1069{
581d708e
MC
1070 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1071 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1072 struct pci_dev *pdev = adapter->pdev;
406874a7 1073 u32 rctl;
1c7e5b12 1074 int i, ret_val;
1da177e4
LT
1075
1076 /* Setup Tx descriptor ring and Tx buffers */
1077
96838a40
JB
1078 if (!txdr->count)
1079 txdr->count = E1000_DEFAULT_TXD;
1da177e4 1080
1c7e5b12
YB
1081 if (!(txdr->buffer_info = kcalloc(txdr->count,
1082 sizeof(struct e1000_buffer),
1083 GFP_KERNEL))) {
1da177e4
LT
1084 ret_val = 1;
1085 goto err_nomem;
1086 }
1da177e4
LT
1087
1088 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1089 txdr->size = ALIGN(txdr->size, 4096);
1c7e5b12
YB
1090 if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size,
1091 &txdr->dma))) {
1da177e4
LT
1092 ret_val = 2;
1093 goto err_nomem;
1094 }
1095 memset(txdr->desc, 0, txdr->size);
1096 txdr->next_to_use = txdr->next_to_clean = 0;
1097
1098 E1000_WRITE_REG(&adapter->hw, TDBAL,
406874a7
JP
1099 ((u64) txdr->dma & 0x00000000FFFFFFFF));
1100 E1000_WRITE_REG(&adapter->hw, TDBAH, ((u64) txdr->dma >> 32));
1da177e4
LT
1101 E1000_WRITE_REG(&adapter->hw, TDLEN,
1102 txdr->count * sizeof(struct e1000_tx_desc));
1103 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1104 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1105 E1000_WRITE_REG(&adapter->hw, TCTL,
1106 E1000_TCTL_PSP | E1000_TCTL_EN |
1107 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1108 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1109
96838a40 1110 for (i = 0; i < txdr->count; i++) {
1da177e4
LT
1111 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1112 struct sk_buff *skb;
1113 unsigned int size = 1024;
1114
96838a40 1115 if (!(skb = alloc_skb(size, GFP_KERNEL))) {
1da177e4
LT
1116 ret_val = 3;
1117 goto err_nomem;
1118 }
1119 skb_put(skb, size);
1120 txdr->buffer_info[i].skb = skb;
1121 txdr->buffer_info[i].length = skb->len;
1122 txdr->buffer_info[i].dma =
1123 pci_map_single(pdev, skb->data, skb->len,
1124 PCI_DMA_TODEVICE);
1125 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1126 tx_desc->lower.data = cpu_to_le32(skb->len);
1127 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1128 E1000_TXD_CMD_IFCS |
1129 E1000_TXD_CMD_RPS);
1130 tx_desc->upper.data = 0;
1131 }
1132
1133 /* Setup Rx descriptor ring and Rx buffers */
1134
96838a40
JB
1135 if (!rxdr->count)
1136 rxdr->count = E1000_DEFAULT_RXD;
1da177e4 1137
1c7e5b12
YB
1138 if (!(rxdr->buffer_info = kcalloc(rxdr->count,
1139 sizeof(struct e1000_buffer),
1140 GFP_KERNEL))) {
1da177e4
LT
1141 ret_val = 4;
1142 goto err_nomem;
1143 }
1da177e4
LT
1144
1145 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
96838a40 1146 if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1da177e4
LT
1147 ret_val = 5;
1148 goto err_nomem;
1149 }
1150 memset(rxdr->desc, 0, rxdr->size);
1151 rxdr->next_to_use = rxdr->next_to_clean = 0;
1152
1153 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1154 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1155 E1000_WRITE_REG(&adapter->hw, RDBAL,
406874a7
JP
1156 ((u64) rxdr->dma & 0xFFFFFFFF));
1157 E1000_WRITE_REG(&adapter->hw, RDBAH, ((u64) rxdr->dma >> 32));
1da177e4
LT
1158 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1159 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1160 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1161 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1162 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1163 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1164 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1165
96838a40 1166 for (i = 0; i < rxdr->count; i++) {
1da177e4
LT
1167 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1168 struct sk_buff *skb;
1169
96838a40 1170 if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1da177e4
LT
1171 GFP_KERNEL))) {
1172 ret_val = 6;
1173 goto err_nomem;
1174 }
1175 skb_reserve(skb, NET_IP_ALIGN);
1176 rxdr->buffer_info[i].skb = skb;
1177 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1178 rxdr->buffer_info[i].dma =
1179 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1180 PCI_DMA_FROMDEVICE);
1181 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1182 memset(skb->data, 0x00, skb->len);
1183 }
1184
1185 return 0;
1186
1187err_nomem:
1188 e1000_free_desc_rings(adapter);
1189 return ret_val;
1190}
1191
1192static void
1193e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1194{
1195 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1196 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1197 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1198 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1199 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1200}
1201
1202static void
1203e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1204{
406874a7 1205 u16 phy_reg;
1da177e4
LT
1206
1207 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1208 * Extended PHY Specific Control Register to 25MHz clock. This
1209 * value defaults back to a 2.5MHz clock when the PHY is reset.
1210 */
1211 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1212 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1213 e1000_write_phy_reg(&adapter->hw,
1214 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1215
1216 /* In addition, because of the s/w reset above, we need to enable
1217 * CRS on TX. This must be set for both full and half duplex
1218 * operation.
1219 */
1220 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1221 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1222 e1000_write_phy_reg(&adapter->hw,
1223 M88E1000_PHY_SPEC_CTRL, phy_reg);
1224}
1225
1226static int
1227e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1228{
406874a7
JP
1229 u32 ctrl_reg;
1230 u16 phy_reg;
1da177e4
LT
1231
1232 /* Setup the Device Control Register for PHY loopback test. */
1233
1234 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1235 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1236 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1237 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1238 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1239 E1000_CTRL_FD); /* Force Duplex to FULL */
1240
1241 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1242
1243 /* Read the PHY Specific Control Register (0x10) */
1244 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1245
1246 /* Clear Auto-Crossover bits in PHY Specific Control Register
1247 * (bits 6:5).
1248 */
1249 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1250 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1251
1252 /* Perform software reset on the PHY */
1253 e1000_phy_reset(&adapter->hw);
1254
1255 /* Have to setup TX_CLK and TX_CRS after software reset */
1256 e1000_phy_reset_clk_and_crs(adapter);
1257
1258 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1259
1260 /* Wait for reset to complete. */
1261 udelay(500);
1262
1263 /* Have to setup TX_CLK and TX_CRS after software reset */
1264 e1000_phy_reset_clk_and_crs(adapter);
1265
1266 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1267 e1000_phy_disable_receiver(adapter);
1268
1269 /* Set the loopback bit in the PHY control register. */
1270 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1271 phy_reg |= MII_CR_LOOPBACK;
1272 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1273
1274 /* Setup TX_CLK and TX_CRS one more time. */
1275 e1000_phy_reset_clk_and_crs(adapter);
1276
1277 /* Check Phy Configuration */
1278 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
96838a40 1279 if (phy_reg != 0x4100)
1da177e4
LT
1280 return 9;
1281
1282 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
96838a40 1283 if (phy_reg != 0x0070)
1da177e4
LT
1284 return 10;
1285
1286 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
96838a40 1287 if (phy_reg != 0x001A)
1da177e4
LT
1288 return 11;
1289
1290 return 0;
1291}
1292
1293static int
1294e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1295{
406874a7
JP
1296 u32 ctrl_reg = 0;
1297 u32 stat_reg = 0;
1da177e4 1298
c3033b01 1299 adapter->hw.autoneg = false;
1da177e4 1300
96838a40 1301 if (adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT
1302 /* Auto-MDI/MDIX Off */
1303 e1000_write_phy_reg(&adapter->hw,
1304 M88E1000_PHY_SPEC_CTRL, 0x0808);
1305 /* reset to update Auto-MDI/MDIX */
1306 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1307 /* autoneg off */
1308 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
8fc897b0 1309 } else if (adapter->hw.phy_type == e1000_phy_gg82563)
87041639
JK
1310 e1000_write_phy_reg(&adapter->hw,
1311 GG82563_PHY_KMRN_MODE_CTRL,
acfbc9fd 1312 0x1CC);
1da177e4 1313
1da177e4 1314 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
cd94dd0b
AK
1315
1316 if (adapter->hw.phy_type == e1000_phy_ife) {
1317 /* force 100, set loopback */
1318 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x6100);
1319
1320 /* Now set up the MAC to the same speed/duplex as the PHY. */
1321 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1322 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1323 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1324 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1325 E1000_CTRL_FD); /* Force Duplex to FULL */
1326 } else {
1327 /* force 1000, set loopback */
1328 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1329
1330 /* Now set up the MAC to the same speed/duplex as the PHY. */
1331 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1332 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1333 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1334 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1335 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1336 E1000_CTRL_FD); /* Force Duplex to FULL */
1337 }
1da177e4 1338
96838a40 1339 if (adapter->hw.media_type == e1000_media_type_copper &&
8fc897b0 1340 adapter->hw.phy_type == e1000_phy_m88)
1da177e4 1341 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
8fc897b0 1342 else {
1da177e4
LT
1343 /* Set the ILOS bit on the fiber Nic is half
1344 * duplex link is detected. */
1345 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 1346 if ((stat_reg & E1000_STATUS_FD) == 0)
1da177e4
LT
1347 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1348 }
1349
1350 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1351
1352 /* Disable the receiver on the PHY so when a cable is plugged in, the
1353 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1354 */
96838a40 1355 if (adapter->hw.phy_type == e1000_phy_m88)
1da177e4
LT
1356 e1000_phy_disable_receiver(adapter);
1357
1358 udelay(500);
1359
1360 return 0;
1361}
1362
1363static int
1364e1000_set_phy_loopback(struct e1000_adapter *adapter)
1365{
406874a7
JP
1366 u16 phy_reg = 0;
1367 u16 count = 0;
1da177e4
LT
1368
1369 switch (adapter->hw.mac_type) {
1370 case e1000_82543:
96838a40 1371 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT
1372 /* Attempt to setup Loopback mode on Non-integrated PHY.
1373 * Some PHY registers get corrupted at random, so
1374 * attempt this 10 times.
1375 */
96838a40 1376 while (e1000_nonintegrated_phy_loopback(adapter) &&
1da177e4 1377 count++ < 10);
96838a40 1378 if (count < 11)
1da177e4
LT
1379 return 0;
1380 }
1381 break;
1382
1383 case e1000_82544:
1384 case e1000_82540:
1385 case e1000_82545:
1386 case e1000_82545_rev_3:
1387 case e1000_82546:
1388 case e1000_82546_rev_3:
1389 case e1000_82541:
1390 case e1000_82541_rev_2:
1391 case e1000_82547:
1392 case e1000_82547_rev_2:
868d5309
MC
1393 case e1000_82571:
1394 case e1000_82572:
4564327b 1395 case e1000_82573:
6418ecc6 1396 case e1000_80003es2lan:
cd94dd0b 1397 case e1000_ich8lan:
1da177e4
LT
1398 return e1000_integrated_phy_loopback(adapter);
1399 break;
1400
1401 default:
1402 /* Default PHY loopback work is to read the MII
1403 * control register and assert bit 14 (loopback mode).
1404 */
1405 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1406 phy_reg |= MII_CR_LOOPBACK;
1407 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1408 return 0;
1409 break;
1410 }
1411
1412 return 8;
1413}
1414
1415static int
1416e1000_setup_loopback_test(struct e1000_adapter *adapter)
1417{
49273163 1418 struct e1000_hw *hw = &adapter->hw;
406874a7 1419 u32 rctl;
1da177e4 1420
49273163
JK
1421 if (hw->media_type == e1000_media_type_fiber ||
1422 hw->media_type == e1000_media_type_internal_serdes) {
1423 switch (hw->mac_type) {
1424 case e1000_82545:
1425 case e1000_82546:
1426 case e1000_82545_rev_3:
1427 case e1000_82546_rev_3:
1da177e4 1428 return e1000_set_phy_loopback(adapter);
49273163
JK
1429 break;
1430 case e1000_82571:
1431 case e1000_82572:
1432#define E1000_SERDES_LB_ON 0x410
1433 e1000_set_phy_loopback(adapter);
1434 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
f8ec4733 1435 msleep(10);
49273163
JK
1436 return 0;
1437 break;
1438 default:
1439 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1440 rctl |= E1000_RCTL_LBM_TCVR;
49273163 1441 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT
1442 return 0;
1443 }
49273163 1444 } else if (hw->media_type == e1000_media_type_copper)
1da177e4
LT
1445 return e1000_set_phy_loopback(adapter);
1446
1447 return 7;
1448}
1449
1450static void
1451e1000_loopback_cleanup(struct e1000_adapter *adapter)
1452{
49273163 1453 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
1454 u32 rctl;
1455 u16 phy_reg;
1da177e4 1456
49273163 1457 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1458 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
49273163 1459 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4 1460
49273163
JK
1461 switch (hw->mac_type) {
1462 case e1000_82571:
1463 case e1000_82572:
1464 if (hw->media_type == e1000_media_type_fiber ||
1465 hw->media_type == e1000_media_type_internal_serdes) {
1466#define E1000_SERDES_LB_OFF 0x400
1467 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
f8ec4733 1468 msleep(10);
49273163
JK
1469 break;
1470 }
1471 /* Fall Through */
1472 case e1000_82545:
1473 case e1000_82546:
1474 case e1000_82545_rev_3:
1475 case e1000_82546_rev_3:
1476 default:
c3033b01 1477 hw->autoneg = true;
8fc897b0 1478 if (hw->phy_type == e1000_phy_gg82563)
87041639
JK
1479 e1000_write_phy_reg(hw,
1480 GG82563_PHY_KMRN_MODE_CTRL,
1481 0x180);
49273163
JK
1482 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1483 if (phy_reg & MII_CR_LOOPBACK) {
1da177e4 1484 phy_reg &= ~MII_CR_LOOPBACK;
49273163
JK
1485 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1486 e1000_phy_reset(hw);
1da177e4 1487 }
49273163 1488 break;
1da177e4
LT
1489 }
1490}
1491
1492static void
1493e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1494{
1495 memset(skb->data, 0xFF, frame_size);
ce7393b9 1496 frame_size &= ~1;
1da177e4
LT
1497 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1498 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1499 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1500}
1501
1502static int
1503e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1504{
ce7393b9 1505 frame_size &= ~1;
96838a40
JB
1506 if (*(skb->data + 3) == 0xFF) {
1507 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1da177e4
LT
1508 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1509 return 0;
1510 }
1511 }
1512 return 13;
1513}
1514
1515static int
1516e1000_run_loopback_test(struct e1000_adapter *adapter)
1517{
581d708e
MC
1518 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1519 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1520 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC
1521 int i, j, k, l, lc, good_cnt, ret_val=0;
1522 unsigned long time;
1da177e4
LT
1523
1524 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1525
96838a40 1526 /* Calculate the loop count based on the largest descriptor ring
e4eff729
MC
1527 * The idea is to wrap the largest ring a number of times using 64
1528 * send/receive pairs during each loop
1529 */
1da177e4 1530
96838a40 1531 if (rxdr->count <= txdr->count)
e4eff729
MC
1532 lc = ((txdr->count / 64) * 2) + 1;
1533 else
1534 lc = ((rxdr->count / 64) * 2) + 1;
1535
1536 k = l = 0;
96838a40
JB
1537 for (j = 0; j <= lc; j++) { /* loop count loop */
1538 for (i = 0; i < 64; i++) { /* send the packets */
1539 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
e4eff729 1540 1024);
96838a40 1541 pci_dma_sync_single_for_device(pdev,
e4eff729
MC
1542 txdr->buffer_info[k].dma,
1543 txdr->buffer_info[k].length,
1544 PCI_DMA_TODEVICE);
96838a40 1545 if (unlikely(++k == txdr->count)) k = 0;
e4eff729
MC
1546 }
1547 E1000_WRITE_REG(&adapter->hw, TDT, k);
f8ec4733 1548 msleep(200);
e4eff729
MC
1549 time = jiffies; /* set the start time for the receive */
1550 good_cnt = 0;
1551 do { /* receive the sent packets */
96838a40 1552 pci_dma_sync_single_for_cpu(pdev,
e4eff729
MC
1553 rxdr->buffer_info[l].dma,
1554 rxdr->buffer_info[l].length,
1555 PCI_DMA_FROMDEVICE);
96838a40 1556
e4eff729
MC
1557 ret_val = e1000_check_lbtest_frame(
1558 rxdr->buffer_info[l].skb,
1559 1024);
96838a40 1560 if (!ret_val)
e4eff729 1561 good_cnt++;
96838a40
JB
1562 if (unlikely(++l == rxdr->count)) l = 0;
1563 /* time + 20 msecs (200 msecs on 2.4) is more than
1564 * enough time to complete the receives, if it's
e4eff729
MC
1565 * exceeded, break and error off
1566 */
1567 } while (good_cnt < 64 && jiffies < (time + 20));
96838a40 1568 if (good_cnt != 64) {
e4eff729 1569 ret_val = 13; /* ret_val is the same as mis-compare */
96838a40 1570 break;
e4eff729 1571 }
96838a40 1572 if (jiffies >= (time + 2)) {
e4eff729
MC
1573 ret_val = 14; /* error code for time out error */
1574 break;
1575 }
1576 } /* end loop count loop */
1da177e4
LT
1577 return ret_val;
1578}
1579
1580static int
406874a7 1581e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 1582{
57128197
JK
1583 /* PHY loopback cannot be performed if SoL/IDER
1584 * sessions are active */
1585 if (e1000_check_phy_reset_block(&adapter->hw)) {
1586 DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
1587 "when SoL/IDER is active.\n");
1588 *data = 0;
1589 goto out;
1590 }
1591
1592 if ((*data = e1000_setup_desc_rings(adapter)))
1593 goto out;
1594 if ((*data = e1000_setup_loopback_test(adapter)))
1595 goto err_loopback;
1da177e4
LT
1596 *data = e1000_run_loopback_test(adapter);
1597 e1000_loopback_cleanup(adapter);
57128197 1598
1da177e4 1599err_loopback:
57128197
JK
1600 e1000_free_desc_rings(adapter);
1601out:
1da177e4
LT
1602 return *data;
1603}
1604
1605static int
406874a7 1606e1000_link_test(struct e1000_adapter *adapter, u64 *data)
1da177e4
LT
1607{
1608 *data = 0;
1da177e4
LT
1609 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1610 int i = 0;
c3033b01 1611 adapter->hw.serdes_link_down = true;
1da177e4 1612
2648345f
MC
1613 /* On some blade server designs, link establishment
1614 * could take as long as 2-3 minutes */
1da177e4
LT
1615 do {
1616 e1000_check_for_link(&adapter->hw);
c3033b01 1617 if (!adapter->hw.serdes_link_down)
1da177e4 1618 return *data;
f8ec4733 1619 msleep(20);
1da177e4
LT
1620 } while (i++ < 3750);
1621
2648345f 1622 *data = 1;
1da177e4
LT
1623 } else {
1624 e1000_check_for_link(&adapter->hw);
96838a40 1625 if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
f8ec4733 1626 msleep(4000);
1da177e4 1627
96838a40 1628 if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1da177e4
LT
1629 *data = 1;
1630 }
1631 }
1632 return *data;
1633}
1634
96838a40 1635static int
b9f2c044 1636e1000_get_sset_count(struct net_device *netdev, int sset)
1da177e4 1637{
b9f2c044
JG
1638 switch (sset) {
1639 case ETH_SS_TEST:
1640 return E1000_TEST_LEN;
1641 case ETH_SS_STATS:
1642 return E1000_STATS_LEN;
1643 default:
1644 return -EOPNOTSUPP;
1645 }
1da177e4
LT
1646}
1647
1648static void
1649e1000_diag_test(struct net_device *netdev,
406874a7 1650 struct ethtool_test *eth_test, u64 *data)
1da177e4 1651{
60490fe0 1652 struct e1000_adapter *adapter = netdev_priv(netdev);
c3033b01 1653 bool if_running = netif_running(netdev);
1da177e4 1654
1314bbf3 1655 set_bit(__E1000_TESTING, &adapter->flags);
96838a40 1656 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1da177e4
LT
1657 /* Offline tests */
1658
1659 /* save speed, duplex, autoneg settings */
406874a7
JP
1660 u16 autoneg_advertised = adapter->hw.autoneg_advertised;
1661 u8 forced_speed_duplex = adapter->hw.forced_speed_duplex;
1662 u8 autoneg = adapter->hw.autoneg;
1da177e4 1663
d658266e
JB
1664 DPRINTK(HW, INFO, "offline testing starting\n");
1665
1da177e4
LT
1666 /* Link test performed before hardware reset so autoneg doesn't
1667 * interfere with test result */
96838a40 1668 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1669 eth_test->flags |= ETH_TEST_FL_FAILED;
1670
96838a40 1671 if (if_running)
2db10a08
AK
1672 /* indicate we're in test mode */
1673 dev_close(netdev);
1da177e4
LT
1674 else
1675 e1000_reset(adapter);
1676
96838a40 1677 if (e1000_reg_test(adapter, &data[0]))
1da177e4
LT
1678 eth_test->flags |= ETH_TEST_FL_FAILED;
1679
1680 e1000_reset(adapter);
96838a40 1681 if (e1000_eeprom_test(adapter, &data[1]))
1da177e4
LT
1682 eth_test->flags |= ETH_TEST_FL_FAILED;
1683
1684 e1000_reset(adapter);
96838a40 1685 if (e1000_intr_test(adapter, &data[2]))
1da177e4
LT
1686 eth_test->flags |= ETH_TEST_FL_FAILED;
1687
1688 e1000_reset(adapter);
d658266e
JB
1689 /* make sure the phy is powered up */
1690 e1000_power_up_phy(adapter);
96838a40 1691 if (e1000_loopback_test(adapter, &data[3]))
1da177e4
LT
1692 eth_test->flags |= ETH_TEST_FL_FAILED;
1693
1694 /* restore speed, duplex, autoneg settings */
1695 adapter->hw.autoneg_advertised = autoneg_advertised;
1696 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1697 adapter->hw.autoneg = autoneg;
1698
1699 e1000_reset(adapter);
1314bbf3 1700 clear_bit(__E1000_TESTING, &adapter->flags);
96838a40 1701 if (if_running)
2db10a08 1702 dev_open(netdev);
1da177e4 1703 } else {
d658266e 1704 DPRINTK(HW, INFO, "online testing starting\n");
1da177e4 1705 /* Online tests */
96838a40 1706 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1707 eth_test->flags |= ETH_TEST_FL_FAILED;
1708
90fb5135 1709 /* Online tests aren't run; pass by default */
1da177e4
LT
1710 data[0] = 0;
1711 data[1] = 0;
1712 data[2] = 0;
1713 data[3] = 0;
2db10a08 1714
1314bbf3 1715 clear_bit(__E1000_TESTING, &adapter->flags);
1da177e4 1716 }
352c9f85 1717 msleep_interruptible(4 * 1000);
1da177e4
LT
1718}
1719
120cd576 1720static int e1000_wol_exclusion(struct e1000_adapter *adapter, struct ethtool_wolinfo *wol)
1da177e4 1721{
1da177e4 1722 struct e1000_hw *hw = &adapter->hw;
120cd576 1723 int retval = 1; /* fail by default */
1da177e4 1724
120cd576 1725 switch (hw->device_id) {
dc1f71f6 1726 case E1000_DEV_ID_82542:
1da177e4
LT
1727 case E1000_DEV_ID_82543GC_FIBER:
1728 case E1000_DEV_ID_82543GC_COPPER:
1729 case E1000_DEV_ID_82544EI_FIBER:
1730 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1731 case E1000_DEV_ID_82545EM_FIBER:
1732 case E1000_DEV_ID_82545EM_COPPER:
84916829 1733 case E1000_DEV_ID_82546GB_QUAD_COPPER:
120cd576 1734 case E1000_DEV_ID_82546GB_PCIE:
ce57a02c 1735 case E1000_DEV_ID_82571EB_SERDES_QUAD:
120cd576 1736 /* these don't support WoL at all */
1da177e4 1737 wol->supported = 0;
120cd576 1738 break;
1da177e4
LT
1739 case E1000_DEV_ID_82546EB_FIBER:
1740 case E1000_DEV_ID_82546GB_FIBER:
b7ee49db 1741 case E1000_DEV_ID_82571EB_FIBER:
120cd576
JB
1742 case E1000_DEV_ID_82571EB_SERDES:
1743 case E1000_DEV_ID_82571EB_COPPER:
1744 /* Wake events not supported on port B */
96838a40 1745 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1da177e4 1746 wol->supported = 0;
120cd576 1747 break;
1da177e4 1748 }
120cd576
JB
1749 /* return success for non excluded adapter ports */
1750 retval = 0;
1751 break;
5881cde8 1752 case E1000_DEV_ID_82571EB_QUAD_COPPER:
ce57a02c 1753 case E1000_DEV_ID_82571EB_QUAD_FIBER:
fc2307d0 1754 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
f4ec7f98 1755 case E1000_DEV_ID_82571PT_QUAD_COPPER:
120cd576
JB
1756 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1757 /* quad port adapters only support WoL on port A */
1758 if (!adapter->quad_port_a) {
1759 wol->supported = 0;
1760 break;
1761 }
1762 /* return success for non excluded adapter ports */
1763 retval = 0;
1764 break;
1da177e4 1765 default:
120cd576
JB
1766 /* dual port cards only support WoL on port A from now on
1767 * unless it was enabled in the eeprom for port B
1768 * so exclude FUNC_1 ports from having WoL enabled */
1769 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1 &&
1770 !adapter->eeprom_wol) {
1771 wol->supported = 0;
1772 break;
1773 }
84916829 1774
120cd576
JB
1775 retval = 0;
1776 }
1777
1778 return retval;
1779}
1780
1781static void
1782e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1783{
1784 struct e1000_adapter *adapter = netdev_priv(netdev);
1785
1786 wol->supported = WAKE_UCAST | WAKE_MCAST |
1787 WAKE_BCAST | WAKE_MAGIC;
1788 wol->wolopts = 0;
1789
1790 /* this function will set ->supported = 0 and return 1 if wol is not
1791 * supported by this hardware */
1792 if (e1000_wol_exclusion(adapter, wol))
1da177e4 1793 return;
120cd576
JB
1794
1795 /* apply any specific unsupported masks here */
1796 switch (adapter->hw.device_id) {
1797 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1798 /* KSP3 does not suppport UCAST wake-ups */
1799 wol->supported &= ~WAKE_UCAST;
1800
1801 if (adapter->wol & E1000_WUFC_EX)
1802 DPRINTK(DRV, ERR, "Interface does not support "
1803 "directed (unicast) frame wake-up packets\n");
1804 break;
1805 default:
1806 break;
1da177e4 1807 }
120cd576
JB
1808
1809 if (adapter->wol & E1000_WUFC_EX)
1810 wol->wolopts |= WAKE_UCAST;
1811 if (adapter->wol & E1000_WUFC_MC)
1812 wol->wolopts |= WAKE_MCAST;
1813 if (adapter->wol & E1000_WUFC_BC)
1814 wol->wolopts |= WAKE_BCAST;
1815 if (adapter->wol & E1000_WUFC_MAG)
1816 wol->wolopts |= WAKE_MAGIC;
1817
1818 return;
1da177e4
LT
1819}
1820
1821static int
1822e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1823{
60490fe0 1824 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1825 struct e1000_hw *hw = &adapter->hw;
1826
120cd576
JB
1827 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1828 return -EOPNOTSUPP;
1829
1830 if (e1000_wol_exclusion(adapter, wol))
1da177e4
LT
1831 return wol->wolopts ? -EOPNOTSUPP : 0;
1832
120cd576 1833 switch (hw->device_id) {
84916829 1834 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
84916829
JK
1835 if (wol->wolopts & WAKE_UCAST) {
1836 DPRINTK(DRV, ERR, "Interface does not support "
1837 "directed (unicast) frame wake-up packets\n");
1838 return -EOPNOTSUPP;
1839 }
120cd576 1840 break;
1da177e4 1841 default:
120cd576 1842 break;
1da177e4
LT
1843 }
1844
120cd576
JB
1845 /* these settings will always override what we currently have */
1846 adapter->wol = 0;
1847
1848 if (wol->wolopts & WAKE_UCAST)
1849 adapter->wol |= E1000_WUFC_EX;
1850 if (wol->wolopts & WAKE_MCAST)
1851 adapter->wol |= E1000_WUFC_MC;
1852 if (wol->wolopts & WAKE_BCAST)
1853 adapter->wol |= E1000_WUFC_BC;
1854 if (wol->wolopts & WAKE_MAGIC)
1855 adapter->wol |= E1000_WUFC_MAG;
1856
1da177e4
LT
1857 return 0;
1858}
1859
1860/* toggle LED 4 times per second = 2 "blinks" per second */
1861#define E1000_ID_INTERVAL (HZ/4)
1862
1863/* bit defines for adapter->led_status */
1864#define E1000_LED_ON 0
1865
1866static void
1867e1000_led_blink_callback(unsigned long data)
1868{
1869 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1870
96838a40 1871 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1da177e4
LT
1872 e1000_led_off(&adapter->hw);
1873 else
1874 e1000_led_on(&adapter->hw);
1875
1876 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1877}
1878
1879static int
406874a7 1880e1000_phys_id(struct net_device *netdev, u32 data)
1da177e4 1881{
60490fe0 1882 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1883
abec42a4
SH
1884 if (!data)
1885 data = INT_MAX;
1da177e4 1886
96838a40
JB
1887 if (adapter->hw.mac_type < e1000_82571) {
1888 if (!adapter->blink_timer.function) {
d439d4b7
MC
1889 init_timer(&adapter->blink_timer);
1890 adapter->blink_timer.function = e1000_led_blink_callback;
1891 adapter->blink_timer.data = (unsigned long) adapter;
1892 }
1893 e1000_setup_led(&adapter->hw);
1894 mod_timer(&adapter->blink_timer, jiffies);
1895 msleep_interruptible(data * 1000);
1896 del_timer_sync(&adapter->blink_timer);
cd94dd0b
AK
1897 } else if (adapter->hw.phy_type == e1000_phy_ife) {
1898 if (!adapter->blink_timer.function) {
1899 init_timer(&adapter->blink_timer);
1900 adapter->blink_timer.function = e1000_led_blink_callback;
1901 adapter->blink_timer.data = (unsigned long) adapter;
1902 }
1903 mod_timer(&adapter->blink_timer, jiffies);
d8c2bd3d 1904 msleep_interruptible(data * 1000);
cd94dd0b
AK
1905 del_timer_sync(&adapter->blink_timer);
1906 e1000_write_phy_reg(&(adapter->hw), IFE_PHY_SPECIAL_CONTROL_LED, 0);
d8c2bd3d 1907 } else {
f1b3a853 1908 e1000_blink_led_start(&adapter->hw);
d439d4b7 1909 msleep_interruptible(data * 1000);
1da177e4
LT
1910 }
1911
1da177e4
LT
1912 e1000_led_off(&adapter->hw);
1913 clear_bit(E1000_LED_ON, &adapter->led_status);
1914 e1000_cleanup_led(&adapter->hw);
1915
1916 return 0;
1917}
1918
1919static int
1920e1000_nway_reset(struct net_device *netdev)
1921{
60490fe0 1922 struct e1000_adapter *adapter = netdev_priv(netdev);
2db10a08
AK
1923 if (netif_running(netdev))
1924 e1000_reinit_locked(adapter);
1da177e4
LT
1925 return 0;
1926}
1927
96838a40
JB
1928static void
1929e1000_get_ethtool_stats(struct net_device *netdev,
406874a7 1930 struct ethtool_stats *stats, u64 *data)
1da177e4 1931{
60490fe0 1932 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1933 int i;
1934
1935 e1000_update_stats(adapter);
7bfa4816
JK
1936 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1937 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1938 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
406874a7 1939 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1da177e4 1940 }
7bfa4816 1941/* BUG_ON(i != E1000_STATS_LEN); */
1da177e4
LT
1942}
1943
96838a40 1944static void
406874a7 1945e1000_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
1da177e4 1946{
406874a7 1947 u8 *p = data;
1da177e4
LT
1948 int i;
1949
96838a40 1950 switch (stringset) {
1da177e4 1951 case ETH_SS_TEST:
96838a40 1952 memcpy(data, *e1000_gstrings_test,
c32bc6e9 1953 sizeof(e1000_gstrings_test));
1da177e4
LT
1954 break;
1955 case ETH_SS_STATS:
7bfa4816
JK
1956 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1957 memcpy(p, e1000_gstrings_stats[i].stat_string,
1958 ETH_GSTRING_LEN);
1959 p += ETH_GSTRING_LEN;
1960 }
7bfa4816 1961/* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1da177e4
LT
1962 break;
1963 }
1964}
1965
7282d491 1966static const struct ethtool_ops e1000_ethtool_ops = {
1da177e4
LT
1967 .get_settings = e1000_get_settings,
1968 .set_settings = e1000_set_settings,
1969 .get_drvinfo = e1000_get_drvinfo,
1970 .get_regs_len = e1000_get_regs_len,
1971 .get_regs = e1000_get_regs,
1972 .get_wol = e1000_get_wol,
1973 .set_wol = e1000_set_wol,
8fc897b0
AK
1974 .get_msglevel = e1000_get_msglevel,
1975 .set_msglevel = e1000_set_msglevel,
1da177e4
LT
1976 .nway_reset = e1000_nway_reset,
1977 .get_link = ethtool_op_get_link,
1978 .get_eeprom_len = e1000_get_eeprom_len,
1979 .get_eeprom = e1000_get_eeprom,
1980 .set_eeprom = e1000_set_eeprom,
1981 .get_ringparam = e1000_get_ringparam,
1982 .set_ringparam = e1000_set_ringparam,
8fc897b0
AK
1983 .get_pauseparam = e1000_get_pauseparam,
1984 .set_pauseparam = e1000_set_pauseparam,
1985 .get_rx_csum = e1000_get_rx_csum,
1986 .set_rx_csum = e1000_set_rx_csum,
1987 .get_tx_csum = e1000_get_tx_csum,
1988 .set_tx_csum = e1000_set_tx_csum,
8fc897b0 1989 .set_sg = ethtool_op_set_sg,
8fc897b0 1990 .set_tso = e1000_set_tso,
1da177e4
LT
1991 .self_test = e1000_diag_test,
1992 .get_strings = e1000_get_strings,
1993 .phys_id = e1000_phys_id,
1da177e4 1994 .get_ethtool_stats = e1000_get_ethtool_stats,
b9f2c044 1995 .get_sset_count = e1000_get_sset_count,
1da177e4
LT
1996};
1997
1998void e1000_set_ethtool_ops(struct net_device *netdev)
1999{
2000 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
2001}
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