net/igb/e1000/e1000e: more robust ethtool duplex/speed configuration
[deliverable/linux.git] / drivers / net / e1000 / e1000_ethtool.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2
0abb6eb1
AK
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include "e1000.h"
1da177e4
LT
32#include <asm/uaccess.h>
33
8328c38f
AK
34enum {NETDEV_STATS, E1000_STATS};
35
1da177e4
LT
36struct e1000_stats {
37 char stat_string[ETH_GSTRING_LEN];
8328c38f 38 int type;
1da177e4
LT
39 int sizeof_stat;
40 int stat_offset;
41};
42
8328c38f
AK
43#define E1000_STAT(m) E1000_STATS, \
44 sizeof(((struct e1000_adapter *)0)->m), \
45 offsetof(struct e1000_adapter, m)
46#define E1000_NETDEV_STAT(m) NETDEV_STATS, \
47 sizeof(((struct net_device *)0)->m), \
48 offsetof(struct net_device, m)
49
1da177e4 50static const struct e1000_stats e1000_gstrings_stats[] = {
49559854
MW
51 { "rx_packets", E1000_STAT(stats.gprc) },
52 { "tx_packets", E1000_STAT(stats.gptc) },
53 { "rx_bytes", E1000_STAT(stats.gorcl) },
54 { "tx_bytes", E1000_STAT(stats.gotcl) },
55 { "rx_broadcast", E1000_STAT(stats.bprc) },
56 { "tx_broadcast", E1000_STAT(stats.bptc) },
57 { "rx_multicast", E1000_STAT(stats.mprc) },
58 { "tx_multicast", E1000_STAT(stats.mptc) },
59 { "rx_errors", E1000_STAT(stats.rxerrc) },
60 { "tx_errors", E1000_STAT(stats.txerrc) },
5fe31def 61 { "tx_dropped", E1000_NETDEV_STAT(stats.tx_dropped) },
49559854
MW
62 { "multicast", E1000_STAT(stats.mprc) },
63 { "collisions", E1000_STAT(stats.colc) },
64 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
5fe31def 65 { "rx_over_errors", E1000_NETDEV_STAT(stats.rx_over_errors) },
49559854 66 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
5fe31def 67 { "rx_frame_errors", E1000_NETDEV_STAT(stats.rx_frame_errors) },
2648345f 68 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
49559854
MW
69 { "rx_missed_errors", E1000_STAT(stats.mpc) },
70 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
71 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
5fe31def
AK
72 { "tx_fifo_errors", E1000_NETDEV_STAT(stats.tx_fifo_errors) },
73 { "tx_heartbeat_errors", E1000_NETDEV_STAT(stats.tx_heartbeat_errors) },
49559854 74 { "tx_window_errors", E1000_STAT(stats.latecol) },
1da177e4
LT
75 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
76 { "tx_deferred_ok", E1000_STAT(stats.dc) },
77 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
78 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
6b7660cd 79 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
fcfb1224 80 { "tx_restart_queue", E1000_STAT(restart_queue) },
1da177e4
LT
81 { "rx_long_length_errors", E1000_STAT(stats.roc) },
82 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
83 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
84 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
85 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
86 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
87 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
88 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
89 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
90 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
91 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
e4c811c9 92 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
6b7660cd 93 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
15e376b4
JG
94 { "tx_smbus", E1000_STAT(stats.mgptc) },
95 { "rx_smbus", E1000_STAT(stats.mgprc) },
96 { "dropped_smbus", E1000_STAT(stats.mgpdc) },
1da177e4 97};
7bfa4816 98
7bfa4816 99#define E1000_QUEUE_STATS_LEN 0
ff8ac609 100#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
7bfa4816 101#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
1da177e4
LT
102static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
103 "Register test (offline)", "Eeprom test (offline)",
104 "Interrupt test (offline)", "Loopback test (offline)",
105 "Link test (on/offline)"
106};
4c3616cd 107#define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
1da177e4 108
64798845
JP
109static int e1000_get_settings(struct net_device *netdev,
110 struct ethtool_cmd *ecmd)
1da177e4 111{
60490fe0 112 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
113 struct e1000_hw *hw = &adapter->hw;
114
96838a40 115 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT
116
117 ecmd->supported = (SUPPORTED_10baseT_Half |
118 SUPPORTED_10baseT_Full |
119 SUPPORTED_100baseT_Half |
120 SUPPORTED_100baseT_Full |
121 SUPPORTED_1000baseT_Full|
122 SUPPORTED_Autoneg |
123 SUPPORTED_TP);
1da177e4
LT
124 ecmd->advertising = ADVERTISED_TP;
125
96838a40 126 if (hw->autoneg == 1) {
1da177e4 127 ecmd->advertising |= ADVERTISED_Autoneg;
1da177e4 128 /* the e1000 autoneg seems to match ethtool nicely */
1da177e4
LT
129 ecmd->advertising |= hw->autoneg_advertised;
130 }
131
132 ecmd->port = PORT_TP;
133 ecmd->phy_address = hw->phy_addr;
134
96838a40 135 if (hw->mac_type == e1000_82543)
1da177e4
LT
136 ecmd->transceiver = XCVR_EXTERNAL;
137 else
138 ecmd->transceiver = XCVR_INTERNAL;
139
140 } else {
141 ecmd->supported = (SUPPORTED_1000baseT_Full |
142 SUPPORTED_FIBRE |
143 SUPPORTED_Autoneg);
144
012609a8
MC
145 ecmd->advertising = (ADVERTISED_1000baseT_Full |
146 ADVERTISED_FIBRE |
147 ADVERTISED_Autoneg);
1da177e4
LT
148
149 ecmd->port = PORT_FIBRE;
150
96838a40 151 if (hw->mac_type >= e1000_82545)
1da177e4
LT
152 ecmd->transceiver = XCVR_INTERNAL;
153 else
154 ecmd->transceiver = XCVR_EXTERNAL;
155 }
156
1dc32918 157 if (er32(STATUS) & E1000_STATUS_LU) {
1da177e4
LT
158
159 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
160 &adapter->link_duplex);
70739497 161 ethtool_cmd_speed_set(ecmd, adapter->link_speed);
1da177e4 162
25985edc 163 /* unfortunately FULL_DUPLEX != DUPLEX_FULL
1da177e4
LT
164 * and HALF_DUPLEX != DUPLEX_HALF */
165
96838a40 166 if (adapter->link_duplex == FULL_DUPLEX)
1da177e4
LT
167 ecmd->duplex = DUPLEX_FULL;
168 else
169 ecmd->duplex = DUPLEX_HALF;
170 } else {
70739497 171 ethtool_cmd_speed_set(ecmd, -1);
1da177e4
LT
172 ecmd->duplex = -1;
173 }
174
175 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
176 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
177 return 0;
178}
179
64798845
JP
180static int e1000_set_settings(struct net_device *netdev,
181 struct ethtool_cmd *ecmd)
1da177e4 182{
60490fe0 183 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
184 struct e1000_hw *hw = &adapter->hw;
185
1a821ca5
JB
186 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
187 msleep(1);
188
57128197 189 if (ecmd->autoneg == AUTONEG_ENABLE) {
1da177e4 190 hw->autoneg = 1;
96838a40 191 if (hw->media_type == e1000_media_type_fiber)
012609a8
MC
192 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
193 ADVERTISED_FIBRE |
194 ADVERTISED_Autoneg;
96838a40 195 else
2f2ca263
JK
196 hw->autoneg_advertised = ecmd->advertising |
197 ADVERTISED_TP |
198 ADVERTISED_Autoneg;
012609a8 199 ecmd->advertising = hw->autoneg_advertised;
25db0338
DD
200 } else {
201 u32 speed = ethtool_cmd_speed(ecmd);
14ad2513 202 if (e1000_set_spd_dplx(adapter, speed, ecmd->duplex)) {
1a821ca5 203 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 204 return -EINVAL;
1a821ca5 205 }
25db0338 206 }
1da177e4
LT
207
208 /* reset the link */
209
1a821ca5
JB
210 if (netif_running(adapter->netdev)) {
211 e1000_down(adapter);
212 e1000_up(adapter);
213 } else
1da177e4
LT
214 e1000_reset(adapter);
215
1a821ca5 216 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
217 return 0;
218}
219
b548192a
NN
220static u32 e1000_get_link(struct net_device *netdev)
221{
222 struct e1000_adapter *adapter = netdev_priv(netdev);
223
224 /*
225 * If the link is not reported up to netdev, interrupts are disabled,
226 * and so the physical link state may have changed since we last
227 * looked. Set get_link_status to make sure that the true link
228 * state is interrogated, rather than pulling a cached and possibly
229 * stale link state from the driver.
230 */
231 if (!netif_carrier_ok(netdev))
232 adapter->hw.get_link_status = 1;
233
234 return e1000_has_link(adapter);
235}
236
64798845
JP
237static void e1000_get_pauseparam(struct net_device *netdev,
238 struct ethtool_pauseparam *pause)
1da177e4 239{
60490fe0 240 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
241 struct e1000_hw *hw = &adapter->hw;
242
96838a40 243 pause->autoneg =
1da177e4 244 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
96838a40 245
11241b10 246 if (hw->fc == E1000_FC_RX_PAUSE)
1da177e4 247 pause->rx_pause = 1;
11241b10 248 else if (hw->fc == E1000_FC_TX_PAUSE)
1da177e4 249 pause->tx_pause = 1;
11241b10 250 else if (hw->fc == E1000_FC_FULL) {
1da177e4
LT
251 pause->rx_pause = 1;
252 pause->tx_pause = 1;
253 }
254}
255
64798845
JP
256static int e1000_set_pauseparam(struct net_device *netdev,
257 struct ethtool_pauseparam *pause)
1da177e4 258{
60490fe0 259 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 260 struct e1000_hw *hw = &adapter->hw;
1a821ca5 261 int retval = 0;
96838a40 262
1da177e4
LT
263 adapter->fc_autoneg = pause->autoneg;
264
1a821ca5
JB
265 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
266 msleep(1);
267
96838a40 268 if (pause->rx_pause && pause->tx_pause)
11241b10 269 hw->fc = E1000_FC_FULL;
96838a40 270 else if (pause->rx_pause && !pause->tx_pause)
11241b10 271 hw->fc = E1000_FC_RX_PAUSE;
96838a40 272 else if (!pause->rx_pause && pause->tx_pause)
11241b10 273 hw->fc = E1000_FC_TX_PAUSE;
96838a40 274 else if (!pause->rx_pause && !pause->tx_pause)
11241b10 275 hw->fc = E1000_FC_NONE;
1da177e4
LT
276
277 hw->original_fc = hw->fc;
278
96838a40 279 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
1a821ca5
JB
280 if (netif_running(adapter->netdev)) {
281 e1000_down(adapter);
282 e1000_up(adapter);
283 } else
1da177e4 284 e1000_reset(adapter);
96838a40 285 } else
1a821ca5 286 retval = ((hw->media_type == e1000_media_type_fiber) ?
90fb5135 287 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
96838a40 288
1a821ca5
JB
289 clear_bit(__E1000_RESETTING, &adapter->flags);
290 return retval;
1da177e4
LT
291}
292
64798845 293static u32 e1000_get_rx_csum(struct net_device *netdev)
1da177e4 294{
60490fe0 295 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
296 return adapter->rx_csum;
297}
298
64798845 299static int e1000_set_rx_csum(struct net_device *netdev, u32 data)
1da177e4 300{
60490fe0 301 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
302 adapter->rx_csum = data;
303
2db10a08
AK
304 if (netif_running(netdev))
305 e1000_reinit_locked(adapter);
306 else
1da177e4
LT
307 e1000_reset(adapter);
308 return 0;
309}
96838a40 310
64798845 311static u32 e1000_get_tx_csum(struct net_device *netdev)
1da177e4
LT
312{
313 return (netdev->features & NETIF_F_HW_CSUM) != 0;
314}
315
64798845 316static int e1000_set_tx_csum(struct net_device *netdev, u32 data)
1da177e4 317{
60490fe0 318 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 319 struct e1000_hw *hw = &adapter->hw;
1da177e4 320
1dc32918 321 if (hw->mac_type < e1000_82543) {
1da177e4
LT
322 if (!data)
323 return -EINVAL;
324 return 0;
325 }
326
327 if (data)
328 netdev->features |= NETIF_F_HW_CSUM;
329 else
330 netdev->features &= ~NETIF_F_HW_CSUM;
331
332 return 0;
333}
334
64798845 335static int e1000_set_tso(struct net_device *netdev, u32 data)
1da177e4 336{
60490fe0 337 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP
338 struct e1000_hw *hw = &adapter->hw;
339
340 if ((hw->mac_type < e1000_82544) ||
341 (hw->mac_type == e1000_82547))
1da177e4
LT
342 return data ? -EINVAL : 0;
343
344 if (data)
345 netdev->features |= NETIF_F_TSO;
346 else
347 netdev->features &= ~NETIF_F_TSO;
7e6c9861 348
1532ecea 349 netdev->features &= ~NETIF_F_TSO6;
87ca4e5b 350
feb8f478 351 e_info(probe, "TSO is %s\n", data ? "Enabled" : "Disabled");
c3033b01 352 adapter->tso_force = true;
1da177e4 353 return 0;
96838a40 354}
1da177e4 355
64798845 356static u32 e1000_get_msglevel(struct net_device *netdev)
1da177e4 357{
60490fe0 358 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
359 return adapter->msg_enable;
360}
361
64798845 362static void e1000_set_msglevel(struct net_device *netdev, u32 data)
1da177e4 363{
60490fe0 364 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
365 adapter->msg_enable = data;
366}
367
64798845 368static int e1000_get_regs_len(struct net_device *netdev)
1da177e4
LT
369{
370#define E1000_REGS_LEN 32
406874a7 371 return E1000_REGS_LEN * sizeof(u32);
1da177e4
LT
372}
373
64798845
JP
374static void e1000_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
375 void *p)
1da177e4 376{
60490fe0 377 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 378 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
379 u32 *regs_buff = p;
380 u16 phy_data;
1da177e4 381
406874a7 382 memset(p, 0, E1000_REGS_LEN * sizeof(u32));
1da177e4
LT
383
384 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
385
1dc32918
JP
386 regs_buff[0] = er32(CTRL);
387 regs_buff[1] = er32(STATUS);
1da177e4 388
1dc32918
JP
389 regs_buff[2] = er32(RCTL);
390 regs_buff[3] = er32(RDLEN);
391 regs_buff[4] = er32(RDH);
392 regs_buff[5] = er32(RDT);
393 regs_buff[6] = er32(RDTR);
1da177e4 394
1dc32918
JP
395 regs_buff[7] = er32(TCTL);
396 regs_buff[8] = er32(TDLEN);
397 regs_buff[9] = er32(TDH);
398 regs_buff[10] = er32(TDT);
399 regs_buff[11] = er32(TIDV);
1da177e4 400
1dc32918 401 regs_buff[12] = hw->phy_type; /* PHY type (IGP=1, M88=0) */
96838a40 402 if (hw->phy_type == e1000_phy_igp) {
1da177e4
LT
403 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
404 IGP01E1000_PHY_AGC_A);
405 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
406 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 407 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT
408 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
409 IGP01E1000_PHY_AGC_B);
410 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
411 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 412 regs_buff[14] = (u32)phy_data; /* cable length */
1da177e4
LT
413 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
414 IGP01E1000_PHY_AGC_C);
415 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
416 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 417 regs_buff[15] = (u32)phy_data; /* cable length */
1da177e4
LT
418 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
419 IGP01E1000_PHY_AGC_D);
420 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
421 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 422 regs_buff[16] = (u32)phy_data; /* cable length */
1da177e4
LT
423 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
424 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
425 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
426 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 427 regs_buff[18] = (u32)phy_data; /* cable polarity */
1da177e4
LT
428 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
429 IGP01E1000_PHY_PCS_INIT_REG);
430 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
431 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 432 regs_buff[19] = (u32)phy_data; /* cable polarity */
1da177e4
LT
433 regs_buff[20] = 0; /* polarity correction enabled (always) */
434 regs_buff[22] = 0; /* phy receive errors (unavailable) */
435 regs_buff[23] = regs_buff[18]; /* mdix mode */
436 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
437 } else {
8fc897b0 438 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
406874a7 439 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT
440 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
441 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
442 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
8fc897b0 443 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
406874a7 444 regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
1da177e4
LT
445 regs_buff[18] = regs_buff[13]; /* cable polarity */
446 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
447 regs_buff[20] = regs_buff[17]; /* polarity correction */
448 /* phy receive errors */
449 regs_buff[22] = adapter->phy_stats.receive_errors;
450 regs_buff[23] = regs_buff[13]; /* mdix mode */
451 }
452 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
453 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
406874a7 454 regs_buff[24] = (u32)phy_data; /* phy local receiver status */
1da177e4 455 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
96838a40 456 if (hw->mac_type >= e1000_82540 &&
4ccc12ae 457 hw->media_type == e1000_media_type_copper) {
1dc32918 458 regs_buff[26] = er32(MANC);
1da177e4
LT
459 }
460}
461
64798845 462static int e1000_get_eeprom_len(struct net_device *netdev)
1da177e4 463{
60490fe0 464 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP
465 struct e1000_hw *hw = &adapter->hw;
466
467 return hw->eeprom.word_size * 2;
1da177e4
LT
468}
469
64798845
JP
470static int e1000_get_eeprom(struct net_device *netdev,
471 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 472{
60490fe0 473 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 474 struct e1000_hw *hw = &adapter->hw;
406874a7 475 u16 *eeprom_buff;
1da177e4
LT
476 int first_word, last_word;
477 int ret_val = 0;
406874a7 478 u16 i;
1da177e4 479
96838a40 480 if (eeprom->len == 0)
1da177e4
LT
481 return -EINVAL;
482
483 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
484
485 first_word = eeprom->offset >> 1;
486 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
487
406874a7 488 eeprom_buff = kmalloc(sizeof(u16) *
1da177e4 489 (last_word - first_word + 1), GFP_KERNEL);
96838a40 490 if (!eeprom_buff)
1da177e4
LT
491 return -ENOMEM;
492
96838a40 493 if (hw->eeprom.type == e1000_eeprom_spi)
1da177e4
LT
494 ret_val = e1000_read_eeprom(hw, first_word,
495 last_word - first_word + 1,
496 eeprom_buff);
497 else {
c7be73bc
JP
498 for (i = 0; i < last_word - first_word + 1; i++) {
499 ret_val = e1000_read_eeprom(hw, first_word + i, 1,
500 &eeprom_buff[i]);
501 if (ret_val)
1da177e4 502 break;
c7be73bc 503 }
1da177e4
LT
504 }
505
506 /* Device's eeprom is always little-endian, word addressable */
507 for (i = 0; i < last_word - first_word + 1; i++)
508 le16_to_cpus(&eeprom_buff[i]);
509
406874a7 510 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
1da177e4
LT
511 eeprom->len);
512 kfree(eeprom_buff);
513
514 return ret_val;
515}
516
64798845
JP
517static int e1000_set_eeprom(struct net_device *netdev,
518 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 519{
60490fe0 520 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 521 struct e1000_hw *hw = &adapter->hw;
406874a7 522 u16 *eeprom_buff;
1da177e4
LT
523 void *ptr;
524 int max_len, first_word, last_word, ret_val = 0;
406874a7 525 u16 i;
1da177e4 526
96838a40 527 if (eeprom->len == 0)
1da177e4
LT
528 return -EOPNOTSUPP;
529
96838a40 530 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1da177e4
LT
531 return -EFAULT;
532
533 max_len = hw->eeprom.word_size * 2;
534
535 first_word = eeprom->offset >> 1;
536 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
537 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
96838a40 538 if (!eeprom_buff)
1da177e4
LT
539 return -ENOMEM;
540
541 ptr = (void *)eeprom_buff;
542
96838a40 543 if (eeprom->offset & 1) {
1da177e4
LT
544 /* need read/modify/write of first changed EEPROM word */
545 /* only the second byte of the word is being modified */
546 ret_val = e1000_read_eeprom(hw, first_word, 1,
547 &eeprom_buff[0]);
548 ptr++;
549 }
96838a40 550 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
1da177e4
LT
551 /* need read/modify/write of last changed EEPROM word */
552 /* only the first byte of the word is being modified */
553 ret_val = e1000_read_eeprom(hw, last_word, 1,
554 &eeprom_buff[last_word - first_word]);
555 }
556
557 /* Device's eeprom is always little-endian, word addressable */
558 for (i = 0; i < last_word - first_word + 1; i++)
559 le16_to_cpus(&eeprom_buff[i]);
560
561 memcpy(ptr, bytes, eeprom->len);
562
563 for (i = 0; i < last_word - first_word + 1; i++)
564 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
565
566 ret_val = e1000_write_eeprom(hw, first_word,
567 last_word - first_word + 1, eeprom_buff);
568
1532ecea
JB
569 /* Update the checksum over the first part of the EEPROM if needed */
570 if ((ret_val == 0) && (first_word <= EEPROM_CHECKSUM_REG))
1da177e4
LT
571 e1000_update_eeprom_checksum(hw);
572
573 kfree(eeprom_buff);
574 return ret_val;
575}
576
64798845
JP
577static void e1000_get_drvinfo(struct net_device *netdev,
578 struct ethtool_drvinfo *drvinfo)
1da177e4 579{
60490fe0 580 struct e1000_adapter *adapter = netdev_priv(netdev);
a2917e22 581 char firmware_version[32];
1da177e4
LT
582
583 strncpy(drvinfo->driver, e1000_driver_name, 32);
584 strncpy(drvinfo->version, e1000_driver_version, 32);
a2917e22 585
1532ecea 586 sprintf(firmware_version, "N/A");
a2917e22 587 strncpy(drvinfo->fw_version, firmware_version, 32);
1da177e4 588 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
1da177e4
LT
589 drvinfo->regdump_len = e1000_get_regs_len(netdev);
590 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
591}
592
64798845
JP
593static void e1000_get_ringparam(struct net_device *netdev,
594 struct ethtool_ringparam *ring)
1da177e4 595{
60490fe0 596 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP
597 struct e1000_hw *hw = &adapter->hw;
598 e1000_mac_type mac_type = hw->mac_type;
581d708e
MC
599 struct e1000_tx_ring *txdr = adapter->tx_ring;
600 struct e1000_rx_ring *rxdr = adapter->rx_ring;
1da177e4
LT
601
602 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
603 E1000_MAX_82544_RXD;
604 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
605 E1000_MAX_82544_TXD;
606 ring->rx_mini_max_pending = 0;
607 ring->rx_jumbo_max_pending = 0;
608 ring->rx_pending = rxdr->count;
609 ring->tx_pending = txdr->count;
610 ring->rx_mini_pending = 0;
611 ring->rx_jumbo_pending = 0;
612}
613
64798845
JP
614static int e1000_set_ringparam(struct net_device *netdev,
615 struct ethtool_ringparam *ring)
1da177e4 616{
60490fe0 617 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP
618 struct e1000_hw *hw = &adapter->hw;
619 e1000_mac_type mac_type = hw->mac_type;
793fab72
VA
620 struct e1000_tx_ring *txdr, *tx_old;
621 struct e1000_rx_ring *rxdr, *rx_old;
1c7e5b12 622 int i, err;
581d708e 623
0989aa43
JK
624 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
625 return -EINVAL;
626
2db10a08
AK
627 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
628 msleep(1);
629
581d708e
MC
630 if (netif_running(adapter->netdev))
631 e1000_down(adapter);
1da177e4
LT
632
633 tx_old = adapter->tx_ring;
634 rx_old = adapter->rx_ring;
635
793fab72 636 err = -ENOMEM;
1c7e5b12 637 txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring), GFP_KERNEL);
793fab72
VA
638 if (!txdr)
639 goto err_alloc_tx;
581d708e 640
1c7e5b12 641 rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring), GFP_KERNEL);
793fab72
VA
642 if (!rxdr)
643 goto err_alloc_rx;
581d708e 644
793fab72
VA
645 adapter->tx_ring = txdr;
646 adapter->rx_ring = rxdr;
581d708e 647
406874a7
JP
648 rxdr->count = max(ring->rx_pending,(u32)E1000_MIN_RXD);
649 rxdr->count = min(rxdr->count,(u32)(mac_type < e1000_82544 ?
1da177e4 650 E1000_MAX_RXD : E1000_MAX_82544_RXD));
9099cfb9 651 rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
1da177e4 652
406874a7
JP
653 txdr->count = max(ring->tx_pending,(u32)E1000_MIN_TXD);
654 txdr->count = min(txdr->count,(u32)(mac_type < e1000_82544 ?
1da177e4 655 E1000_MAX_TXD : E1000_MAX_82544_TXD));
9099cfb9 656 txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
1da177e4 657
f56799ea 658 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 659 txdr[i].count = txdr->count;
f56799ea 660 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 661 rxdr[i].count = rxdr->count;
581d708e 662
96838a40 663 if (netif_running(adapter->netdev)) {
1da177e4 664 /* Try to get new resources before deleting old */
c7be73bc
JP
665 err = e1000_setup_all_rx_resources(adapter);
666 if (err)
1da177e4 667 goto err_setup_rx;
c7be73bc
JP
668 err = e1000_setup_all_tx_resources(adapter);
669 if (err)
1da177e4
LT
670 goto err_setup_tx;
671
672 /* save the new, restore the old in order to free it,
673 * then restore the new back again */
674
1da177e4
LT
675 adapter->rx_ring = rx_old;
676 adapter->tx_ring = tx_old;
581d708e
MC
677 e1000_free_all_rx_resources(adapter);
678 e1000_free_all_tx_resources(adapter);
679 kfree(tx_old);
680 kfree(rx_old);
793fab72
VA
681 adapter->rx_ring = rxdr;
682 adapter->tx_ring = txdr;
c7be73bc
JP
683 err = e1000_up(adapter);
684 if (err)
2db10a08 685 goto err_setup;
1da177e4
LT
686 }
687
2db10a08 688 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
689 return 0;
690err_setup_tx:
581d708e 691 e1000_free_all_rx_resources(adapter);
1da177e4
LT
692err_setup_rx:
693 adapter->rx_ring = rx_old;
694 adapter->tx_ring = tx_old;
793fab72
VA
695 kfree(rxdr);
696err_alloc_rx:
697 kfree(txdr);
698err_alloc_tx:
1da177e4 699 e1000_up(adapter);
2db10a08
AK
700err_setup:
701 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
702 return err;
703}
704
64798845
JP
705static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data, int reg,
706 u32 mask, u32 write)
7e64300a 707{
1dc32918 708 struct e1000_hw *hw = &adapter->hw;
406874a7 709 static const u32 test[] =
7e64300a 710 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1dc32918 711 u8 __iomem *address = hw->hw_addr + reg;
406874a7 712 u32 read;
7e64300a
JP
713 int i;
714
715 for (i = 0; i < ARRAY_SIZE(test); i++) {
716 writel(write & test[i], address);
717 read = readl(address);
718 if (read != (write & test[i] & mask)) {
feb8f478
ET
719 e_err(drv, "pattern test reg %04X failed: "
720 "got 0x%08X expected 0x%08X\n",
721 reg, read, (write & test[i] & mask));
7e64300a
JP
722 *data = reg;
723 return true;
724 }
725 }
726 return false;
1da177e4
LT
727}
728
64798845
JP
729static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, int reg,
730 u32 mask, u32 write)
7e64300a 731{
1dc32918
JP
732 struct e1000_hw *hw = &adapter->hw;
733 u8 __iomem *address = hw->hw_addr + reg;
406874a7 734 u32 read;
7e64300a
JP
735
736 writel(write & mask, address);
737 read = readl(address);
738 if ((read & mask) != (write & mask)) {
feb8f478 739 e_err(drv, "set/check reg %04X test failed: "
675ad473
ET
740 "got 0x%08X expected 0x%08X\n",
741 reg, (read & mask), (write & mask));
7e64300a
JP
742 *data = reg;
743 return true;
744 }
745 return false;
1da177e4
LT
746}
747
7e64300a
JP
748#define REG_PATTERN_TEST(reg, mask, write) \
749 do { \
750 if (reg_pattern_test(adapter, data, \
1dc32918 751 (hw->mac_type >= e1000_82543) \
7e64300a
JP
752 ? E1000_##reg : E1000_82542_##reg, \
753 mask, write)) \
754 return 1; \
755 } while (0)
756
757#define REG_SET_AND_CHECK(reg, mask, write) \
758 do { \
759 if (reg_set_and_check(adapter, data, \
1dc32918 760 (hw->mac_type >= e1000_82543) \
7e64300a
JP
761 ? E1000_##reg : E1000_82542_##reg, \
762 mask, write)) \
763 return 1; \
764 } while (0)
765
64798845 766static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 767{
406874a7
JP
768 u32 value, before, after;
769 u32 i, toggle;
1dc32918 770 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
771
772 /* The status register is Read Only, so a write should fail.
773 * Some bits that get toggled are ignored.
774 */
1532ecea 775
868d5309 776 /* there are several bits on newer hardware that are r/w */
1532ecea 777 toggle = 0xFFFFF833;
b01f6691 778
1dc32918
JP
779 before = er32(STATUS);
780 value = (er32(STATUS) & toggle);
781 ew32(STATUS, toggle);
782 after = er32(STATUS) & toggle;
96838a40 783 if (value != after) {
feb8f478 784 e_err(drv, "failed STATUS register test got: "
675ad473 785 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT
786 *data = 1;
787 return 1;
788 }
b01f6691 789 /* restore previous status */
1dc32918 790 ew32(STATUS, before);
90fb5135 791
1532ecea
JB
792 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
793 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
794 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
795 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
90fb5135 796
1da177e4
LT
797 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
798 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
799 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
800 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
801 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
802 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
803 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
804 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
805 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
806 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
807
808 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
90fb5135 809
1532ecea 810 before = 0x06DFB3FE;
cd94dd0b 811 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
1da177e4
LT
812 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
813
1dc32918 814 if (hw->mac_type >= e1000_82543) {
1da177e4 815
cd94dd0b 816 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
1da177e4 817 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
1532ecea 818 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
1da177e4
LT
819 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
820 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
1532ecea 821 value = E1000_RAR_ENTRIES;
cd94dd0b 822 for (i = 0; i < value; i++) {
1da177e4 823 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
90fb5135 824 0xFFFFFFFF);
1da177e4
LT
825 }
826
827 } else {
828
829 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
830 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
831 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
832 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
833
834 }
835
1532ecea 836 value = E1000_MC_TBL_SIZE;
cd94dd0b 837 for (i = 0; i < value; i++)
1da177e4
LT
838 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
839
840 *data = 0;
841 return 0;
842}
843
64798845 844static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 845{
1dc32918 846 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
847 u16 temp;
848 u16 checksum = 0;
849 u16 i;
1da177e4
LT
850
851 *data = 0;
852 /* Read and add up the contents of the EEPROM */
96838a40 853 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
1dc32918 854 if ((e1000_read_eeprom(hw, i, 1, &temp)) < 0) {
1da177e4
LT
855 *data = 1;
856 break;
857 }
858 checksum += temp;
859 }
860
861 /* If Checksum is not Correct return error else test passed */
e982f17c 862 if ((checksum != (u16)EEPROM_SUM) && !(*data))
1da177e4
LT
863 *data = 2;
864
865 return *data;
866}
867
64798845 868static irqreturn_t e1000_test_intr(int irq, void *data)
1da177e4 869{
e982f17c 870 struct net_device *netdev = (struct net_device *)data;
60490fe0 871 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 872 struct e1000_hw *hw = &adapter->hw;
1da177e4 873
1dc32918 874 adapter->test_icr |= er32(ICR);
1da177e4
LT
875
876 return IRQ_HANDLED;
877}
878
64798845 879static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
1da177e4
LT
880{
881 struct net_device *netdev = adapter->netdev;
406874a7 882 u32 mask, i = 0;
c3033b01 883 bool shared_int = true;
406874a7 884 u32 irq = adapter->pdev->irq;
1dc32918 885 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
886
887 *data = 0;
888
8fc897b0 889 /* NOTE: we don't test MSI interrupts here, yet */
1da177e4 890 /* Hook up test interrupt handler just for this test */
a0607fd3 891 if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
90fb5135 892 netdev))
c3033b01 893 shared_int = false;
a0607fd3 894 else if (request_irq(irq, e1000_test_intr, IRQF_SHARED,
90fb5135 895 netdev->name, netdev)) {
1da177e4
LT
896 *data = 1;
897 return -1;
898 }
feb8f478
ET
899 e_info(hw, "testing %s interrupt\n", (shared_int ?
900 "shared" : "unshared"));
1da177e4
LT
901
902 /* Disable all the interrupts */
1dc32918 903 ew32(IMC, 0xFFFFFFFF);
f8ec4733 904 msleep(10);
1da177e4
LT
905
906 /* Test each interrupt */
96838a40 907 for (; i < 10; i++) {
1da177e4
LT
908
909 /* Interrupt to test */
910 mask = 1 << i;
911
76c224bc
AK
912 if (!shared_int) {
913 /* Disable the interrupt to be reported in
914 * the cause register and then force the same
915 * interrupt and see if one gets posted. If
916 * an interrupt was posted to the bus, the
917 * test failed.
918 */
919 adapter->test_icr = 0;
1dc32918
JP
920 ew32(IMC, mask);
921 ew32(ICS, mask);
f8ec4733 922 msleep(10);
76c224bc
AK
923
924 if (adapter->test_icr & mask) {
925 *data = 3;
926 break;
927 }
1da177e4
LT
928 }
929
930 /* Enable the interrupt to be reported in
931 * the cause register and then force the same
932 * interrupt and see if one gets posted. If
933 * an interrupt was not posted to the bus, the
934 * test failed.
935 */
936 adapter->test_icr = 0;
1dc32918
JP
937 ew32(IMS, mask);
938 ew32(ICS, mask);
f8ec4733 939 msleep(10);
1da177e4 940
96838a40 941 if (!(adapter->test_icr & mask)) {
1da177e4
LT
942 *data = 4;
943 break;
944 }
945
76c224bc 946 if (!shared_int) {
1da177e4
LT
947 /* Disable the other interrupts to be reported in
948 * the cause register and then force the other
949 * interrupts and see if any get posted. If
950 * an interrupt was posted to the bus, the
951 * test failed.
952 */
953 adapter->test_icr = 0;
1dc32918
JP
954 ew32(IMC, ~mask & 0x00007FFF);
955 ew32(ICS, ~mask & 0x00007FFF);
f8ec4733 956 msleep(10);
1da177e4 957
96838a40 958 if (adapter->test_icr) {
1da177e4
LT
959 *data = 5;
960 break;
961 }
962 }
963 }
964
965 /* Disable all the interrupts */
1dc32918 966 ew32(IMC, 0xFFFFFFFF);
f8ec4733 967 msleep(10);
1da177e4
LT
968
969 /* Unhook test interrupt handler */
970 free_irq(irq, netdev);
971
972 return *data;
973}
974
64798845 975static void e1000_free_desc_rings(struct e1000_adapter *adapter)
1da177e4 976{
581d708e
MC
977 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
978 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT
979 struct pci_dev *pdev = adapter->pdev;
980 int i;
981
96838a40
JB
982 if (txdr->desc && txdr->buffer_info) {
983 for (i = 0; i < txdr->count; i++) {
984 if (txdr->buffer_info[i].dma)
b16f53be
NN
985 dma_unmap_single(&pdev->dev,
986 txdr->buffer_info[i].dma,
1da177e4 987 txdr->buffer_info[i].length,
b16f53be 988 DMA_TO_DEVICE);
96838a40 989 if (txdr->buffer_info[i].skb)
1da177e4
LT
990 dev_kfree_skb(txdr->buffer_info[i].skb);
991 }
992 }
993
96838a40
JB
994 if (rxdr->desc && rxdr->buffer_info) {
995 for (i = 0; i < rxdr->count; i++) {
996 if (rxdr->buffer_info[i].dma)
b16f53be
NN
997 dma_unmap_single(&pdev->dev,
998 rxdr->buffer_info[i].dma,
1da177e4 999 rxdr->buffer_info[i].length,
b16f53be 1000 DMA_FROM_DEVICE);
96838a40 1001 if (rxdr->buffer_info[i].skb)
1da177e4
LT
1002 dev_kfree_skb(rxdr->buffer_info[i].skb);
1003 }
1004 }
1005
f5645110 1006 if (txdr->desc) {
b16f53be
NN
1007 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
1008 txdr->dma);
6b27adb6
JL
1009 txdr->desc = NULL;
1010 }
f5645110 1011 if (rxdr->desc) {
b16f53be
NN
1012 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
1013 rxdr->dma);
6b27adb6
JL
1014 rxdr->desc = NULL;
1015 }
1da177e4 1016
b4558ea9 1017 kfree(txdr->buffer_info);
6b27adb6 1018 txdr->buffer_info = NULL;
b4558ea9 1019 kfree(rxdr->buffer_info);
6b27adb6 1020 rxdr->buffer_info = NULL;
1da177e4
LT
1021}
1022
64798845 1023static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
1da177e4 1024{
1dc32918 1025 struct e1000_hw *hw = &adapter->hw;
581d708e
MC
1026 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1027 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1028 struct pci_dev *pdev = adapter->pdev;
406874a7 1029 u32 rctl;
1c7e5b12 1030 int i, ret_val;
1da177e4
LT
1031
1032 /* Setup Tx descriptor ring and Tx buffers */
1033
96838a40
JB
1034 if (!txdr->count)
1035 txdr->count = E1000_DEFAULT_TXD;
1da177e4 1036
c7be73bc
JP
1037 txdr->buffer_info = kcalloc(txdr->count, sizeof(struct e1000_buffer),
1038 GFP_KERNEL);
1039 if (!txdr->buffer_info) {
1da177e4
LT
1040 ret_val = 1;
1041 goto err_nomem;
1042 }
1da177e4
LT
1043
1044 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1045 txdr->size = ALIGN(txdr->size, 4096);
b16f53be
NN
1046 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1047 GFP_KERNEL);
c7be73bc 1048 if (!txdr->desc) {
1da177e4
LT
1049 ret_val = 2;
1050 goto err_nomem;
1051 }
1052 memset(txdr->desc, 0, txdr->size);
1053 txdr->next_to_use = txdr->next_to_clean = 0;
1054
e982f17c
JP
1055 ew32(TDBAL, ((u64)txdr->dma & 0x00000000FFFFFFFF));
1056 ew32(TDBAH, ((u64)txdr->dma >> 32));
1dc32918
JP
1057 ew32(TDLEN, txdr->count * sizeof(struct e1000_tx_desc));
1058 ew32(TDH, 0);
1059 ew32(TDT, 0);
1060 ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN |
1061 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1062 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1da177e4 1063
96838a40 1064 for (i = 0; i < txdr->count; i++) {
1da177e4
LT
1065 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1066 struct sk_buff *skb;
1067 unsigned int size = 1024;
1068
c7be73bc
JP
1069 skb = alloc_skb(size, GFP_KERNEL);
1070 if (!skb) {
1da177e4
LT
1071 ret_val = 3;
1072 goto err_nomem;
1073 }
1074 skb_put(skb, size);
1075 txdr->buffer_info[i].skb = skb;
1076 txdr->buffer_info[i].length = skb->len;
1077 txdr->buffer_info[i].dma =
b16f53be
NN
1078 dma_map_single(&pdev->dev, skb->data, skb->len,
1079 DMA_TO_DEVICE);
1da177e4
LT
1080 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1081 tx_desc->lower.data = cpu_to_le32(skb->len);
1082 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1083 E1000_TXD_CMD_IFCS |
1084 E1000_TXD_CMD_RPS);
1085 tx_desc->upper.data = 0;
1086 }
1087
1088 /* Setup Rx descriptor ring and Rx buffers */
1089
96838a40
JB
1090 if (!rxdr->count)
1091 rxdr->count = E1000_DEFAULT_RXD;
1da177e4 1092
c7be73bc
JP
1093 rxdr->buffer_info = kcalloc(rxdr->count, sizeof(struct e1000_buffer),
1094 GFP_KERNEL);
1095 if (!rxdr->buffer_info) {
1da177e4
LT
1096 ret_val = 4;
1097 goto err_nomem;
1098 }
1da177e4
LT
1099
1100 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
b16f53be
NN
1101 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1102 GFP_KERNEL);
c7be73bc 1103 if (!rxdr->desc) {
1da177e4
LT
1104 ret_val = 5;
1105 goto err_nomem;
1106 }
1107 memset(rxdr->desc, 0, rxdr->size);
1108 rxdr->next_to_use = rxdr->next_to_clean = 0;
1109
1dc32918
JP
1110 rctl = er32(RCTL);
1111 ew32(RCTL, rctl & ~E1000_RCTL_EN);
e982f17c
JP
1112 ew32(RDBAL, ((u64)rxdr->dma & 0xFFFFFFFF));
1113 ew32(RDBAH, ((u64)rxdr->dma >> 32));
1dc32918
JP
1114 ew32(RDLEN, rxdr->size);
1115 ew32(RDH, 0);
1116 ew32(RDT, 0);
1da177e4
LT
1117 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1118 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918
JP
1119 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1120 ew32(RCTL, rctl);
1da177e4 1121
96838a40 1122 for (i = 0; i < rxdr->count; i++) {
1da177e4
LT
1123 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1124 struct sk_buff *skb;
1125
c7be73bc
JP
1126 skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN, GFP_KERNEL);
1127 if (!skb) {
1da177e4
LT
1128 ret_val = 6;
1129 goto err_nomem;
1130 }
1131 skb_reserve(skb, NET_IP_ALIGN);
1132 rxdr->buffer_info[i].skb = skb;
1133 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1134 rxdr->buffer_info[i].dma =
b16f53be
NN
1135 dma_map_single(&pdev->dev, skb->data,
1136 E1000_RXBUFFER_2048, DMA_FROM_DEVICE);
1da177e4
LT
1137 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1138 memset(skb->data, 0x00, skb->len);
1139 }
1140
1141 return 0;
1142
1143err_nomem:
1144 e1000_free_desc_rings(adapter);
1145 return ret_val;
1146}
1147
64798845 1148static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1da177e4 1149{
1dc32918
JP
1150 struct e1000_hw *hw = &adapter->hw;
1151
1da177e4 1152 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1dc32918
JP
1153 e1000_write_phy_reg(hw, 29, 0x001F);
1154 e1000_write_phy_reg(hw, 30, 0x8FFC);
1155 e1000_write_phy_reg(hw, 29, 0x001A);
1156 e1000_write_phy_reg(hw, 30, 0x8FF0);
1da177e4
LT
1157}
1158
64798845 1159static void e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1da177e4 1160{
1dc32918 1161 struct e1000_hw *hw = &adapter->hw;
406874a7 1162 u16 phy_reg;
1da177e4
LT
1163
1164 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1165 * Extended PHY Specific Control Register to 25MHz clock. This
1166 * value defaults back to a 2.5MHz clock when the PHY is reset.
1167 */
1dc32918 1168 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1da177e4 1169 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1dc32918 1170 e1000_write_phy_reg(hw,
1da177e4
LT
1171 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1172
1173 /* In addition, because of the s/w reset above, we need to enable
1174 * CRS on TX. This must be set for both full and half duplex
1175 * operation.
1176 */
1dc32918 1177 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1da177e4 1178 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1dc32918 1179 e1000_write_phy_reg(hw,
1da177e4
LT
1180 M88E1000_PHY_SPEC_CTRL, phy_reg);
1181}
1182
64798845 1183static int e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1184{
1dc32918 1185 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
1186 u32 ctrl_reg;
1187 u16 phy_reg;
1da177e4
LT
1188
1189 /* Setup the Device Control Register for PHY loopback test. */
1190
1dc32918 1191 ctrl_reg = er32(CTRL);
1da177e4
LT
1192 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1193 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1194 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1195 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1196 E1000_CTRL_FD); /* Force Duplex to FULL */
1197
1dc32918 1198 ew32(CTRL, ctrl_reg);
1da177e4
LT
1199
1200 /* Read the PHY Specific Control Register (0x10) */
1dc32918 1201 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1da177e4
LT
1202
1203 /* Clear Auto-Crossover bits in PHY Specific Control Register
1204 * (bits 6:5).
1205 */
1206 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1dc32918 1207 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1da177e4
LT
1208
1209 /* Perform software reset on the PHY */
1dc32918 1210 e1000_phy_reset(hw);
1da177e4
LT
1211
1212 /* Have to setup TX_CLK and TX_CRS after software reset */
1213 e1000_phy_reset_clk_and_crs(adapter);
1214
1dc32918 1215 e1000_write_phy_reg(hw, PHY_CTRL, 0x8100);
1da177e4
LT
1216
1217 /* Wait for reset to complete. */
1218 udelay(500);
1219
1220 /* Have to setup TX_CLK and TX_CRS after software reset */
1221 e1000_phy_reset_clk_and_crs(adapter);
1222
1223 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1224 e1000_phy_disable_receiver(adapter);
1225
1226 /* Set the loopback bit in the PHY control register. */
1dc32918 1227 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1da177e4 1228 phy_reg |= MII_CR_LOOPBACK;
1dc32918 1229 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1da177e4
LT
1230
1231 /* Setup TX_CLK and TX_CRS one more time. */
1232 e1000_phy_reset_clk_and_crs(adapter);
1233
1234 /* Check Phy Configuration */
1dc32918 1235 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
96838a40 1236 if (phy_reg != 0x4100)
1da177e4
LT
1237 return 9;
1238
1dc32918 1239 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
96838a40 1240 if (phy_reg != 0x0070)
1da177e4
LT
1241 return 10;
1242
1dc32918 1243 e1000_read_phy_reg(hw, 29, &phy_reg);
96838a40 1244 if (phy_reg != 0x001A)
1da177e4
LT
1245 return 11;
1246
1247 return 0;
1248}
1249
64798845 1250static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1251{
1dc32918 1252 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
1253 u32 ctrl_reg = 0;
1254 u32 stat_reg = 0;
1da177e4 1255
1dc32918 1256 hw->autoneg = false;
1da177e4 1257
1dc32918 1258 if (hw->phy_type == e1000_phy_m88) {
1da177e4 1259 /* Auto-MDI/MDIX Off */
1dc32918 1260 e1000_write_phy_reg(hw,
1da177e4
LT
1261 M88E1000_PHY_SPEC_CTRL, 0x0808);
1262 /* reset to update Auto-MDI/MDIX */
1dc32918 1263 e1000_write_phy_reg(hw, PHY_CTRL, 0x9140);
1da177e4 1264 /* autoneg off */
1dc32918 1265 e1000_write_phy_reg(hw, PHY_CTRL, 0x8140);
1532ecea 1266 }
1da177e4 1267
1dc32918 1268 ctrl_reg = er32(CTRL);
cd94dd0b 1269
1532ecea
JB
1270 /* force 1000, set loopback */
1271 e1000_write_phy_reg(hw, PHY_CTRL, 0x4140);
cd94dd0b 1272
1532ecea
JB
1273 /* Now set up the MAC to the same speed/duplex as the PHY. */
1274 ctrl_reg = er32(CTRL);
1275 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1276 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1277 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1278 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1279 E1000_CTRL_FD); /* Force Duplex to FULL */
1da177e4 1280
1dc32918
JP
1281 if (hw->media_type == e1000_media_type_copper &&
1282 hw->phy_type == e1000_phy_m88)
1da177e4 1283 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
8fc897b0 1284 else {
1da177e4
LT
1285 /* Set the ILOS bit on the fiber Nic is half
1286 * duplex link is detected. */
1dc32918 1287 stat_reg = er32(STATUS);
96838a40 1288 if ((stat_reg & E1000_STATUS_FD) == 0)
1da177e4
LT
1289 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1290 }
1291
1dc32918 1292 ew32(CTRL, ctrl_reg);
1da177e4
LT
1293
1294 /* Disable the receiver on the PHY so when a cable is plugged in, the
1295 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1296 */
1dc32918 1297 if (hw->phy_type == e1000_phy_m88)
1da177e4
LT
1298 e1000_phy_disable_receiver(adapter);
1299
1300 udelay(500);
1301
1302 return 0;
1303}
1304
64798845 1305static int e1000_set_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1306{
1dc32918 1307 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
1308 u16 phy_reg = 0;
1309 u16 count = 0;
1da177e4 1310
1dc32918 1311 switch (hw->mac_type) {
1da177e4 1312 case e1000_82543:
1dc32918 1313 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT
1314 /* Attempt to setup Loopback mode on Non-integrated PHY.
1315 * Some PHY registers get corrupted at random, so
1316 * attempt this 10 times.
1317 */
96838a40 1318 while (e1000_nonintegrated_phy_loopback(adapter) &&
1da177e4 1319 count++ < 10);
96838a40 1320 if (count < 11)
1da177e4
LT
1321 return 0;
1322 }
1323 break;
1324
1325 case e1000_82544:
1326 case e1000_82540:
1327 case e1000_82545:
1328 case e1000_82545_rev_3:
1329 case e1000_82546:
1330 case e1000_82546_rev_3:
1331 case e1000_82541:
1332 case e1000_82541_rev_2:
1333 case e1000_82547:
1334 case e1000_82547_rev_2:
1335 return e1000_integrated_phy_loopback(adapter);
1336 break;
1da177e4
LT
1337 default:
1338 /* Default PHY loopback work is to read the MII
1339 * control register and assert bit 14 (loopback mode).
1340 */
1dc32918 1341 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1da177e4 1342 phy_reg |= MII_CR_LOOPBACK;
1dc32918 1343 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1da177e4
LT
1344 return 0;
1345 break;
1346 }
1347
1348 return 8;
1349}
1350
64798845 1351static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
1da177e4 1352{
49273163 1353 struct e1000_hw *hw = &adapter->hw;
406874a7 1354 u32 rctl;
1da177e4 1355
49273163
JK
1356 if (hw->media_type == e1000_media_type_fiber ||
1357 hw->media_type == e1000_media_type_internal_serdes) {
1358 switch (hw->mac_type) {
1359 case e1000_82545:
1360 case e1000_82546:
1361 case e1000_82545_rev_3:
1362 case e1000_82546_rev_3:
1da177e4 1363 return e1000_set_phy_loopback(adapter);
49273163 1364 break;
49273163 1365 default:
1dc32918 1366 rctl = er32(RCTL);
1da177e4 1367 rctl |= E1000_RCTL_LBM_TCVR;
1dc32918 1368 ew32(RCTL, rctl);
1da177e4
LT
1369 return 0;
1370 }
49273163 1371 } else if (hw->media_type == e1000_media_type_copper)
1da177e4
LT
1372 return e1000_set_phy_loopback(adapter);
1373
1374 return 7;
1375}
1376
64798845 1377static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
1da177e4 1378{
49273163 1379 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
1380 u32 rctl;
1381 u16 phy_reg;
1da177e4 1382
1dc32918 1383 rctl = er32(RCTL);
1da177e4 1384 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1dc32918 1385 ew32(RCTL, rctl);
1da177e4 1386
49273163 1387 switch (hw->mac_type) {
49273163
JK
1388 case e1000_82545:
1389 case e1000_82546:
1390 case e1000_82545_rev_3:
1391 case e1000_82546_rev_3:
1392 default:
c3033b01 1393 hw->autoneg = true;
49273163
JK
1394 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1395 if (phy_reg & MII_CR_LOOPBACK) {
1da177e4 1396 phy_reg &= ~MII_CR_LOOPBACK;
49273163
JK
1397 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1398 e1000_phy_reset(hw);
1da177e4 1399 }
49273163 1400 break;
1da177e4
LT
1401 }
1402}
1403
64798845
JP
1404static void e1000_create_lbtest_frame(struct sk_buff *skb,
1405 unsigned int frame_size)
1da177e4
LT
1406{
1407 memset(skb->data, 0xFF, frame_size);
ce7393b9 1408 frame_size &= ~1;
1da177e4
LT
1409 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1410 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1411 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1412}
1413
64798845
JP
1414static int e1000_check_lbtest_frame(struct sk_buff *skb,
1415 unsigned int frame_size)
1da177e4 1416{
ce7393b9 1417 frame_size &= ~1;
96838a40
JB
1418 if (*(skb->data + 3) == 0xFF) {
1419 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1da177e4
LT
1420 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1421 return 0;
1422 }
1423 }
1424 return 13;
1425}
1426
64798845 1427static int e1000_run_loopback_test(struct e1000_adapter *adapter)
1da177e4 1428{
1dc32918 1429 struct e1000_hw *hw = &adapter->hw;
581d708e
MC
1430 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1431 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1432 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC
1433 int i, j, k, l, lc, good_cnt, ret_val=0;
1434 unsigned long time;
1da177e4 1435
1dc32918 1436 ew32(RDT, rxdr->count - 1);
1da177e4 1437
96838a40 1438 /* Calculate the loop count based on the largest descriptor ring
e4eff729
MC
1439 * The idea is to wrap the largest ring a number of times using 64
1440 * send/receive pairs during each loop
1441 */
1da177e4 1442
96838a40 1443 if (rxdr->count <= txdr->count)
e4eff729
MC
1444 lc = ((txdr->count / 64) * 2) + 1;
1445 else
1446 lc = ((rxdr->count / 64) * 2) + 1;
1447
1448 k = l = 0;
96838a40
JB
1449 for (j = 0; j <= lc; j++) { /* loop count loop */
1450 for (i = 0; i < 64; i++) { /* send the packets */
1451 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
e4eff729 1452 1024);
b16f53be
NN
1453 dma_sync_single_for_device(&pdev->dev,
1454 txdr->buffer_info[k].dma,
1455 txdr->buffer_info[k].length,
1456 DMA_TO_DEVICE);
96838a40 1457 if (unlikely(++k == txdr->count)) k = 0;
e4eff729 1458 }
1dc32918 1459 ew32(TDT, k);
f8ec4733 1460 msleep(200);
e4eff729
MC
1461 time = jiffies; /* set the start time for the receive */
1462 good_cnt = 0;
1463 do { /* receive the sent packets */
b16f53be
NN
1464 dma_sync_single_for_cpu(&pdev->dev,
1465 rxdr->buffer_info[l].dma,
1466 rxdr->buffer_info[l].length,
1467 DMA_FROM_DEVICE);
96838a40 1468
e4eff729
MC
1469 ret_val = e1000_check_lbtest_frame(
1470 rxdr->buffer_info[l].skb,
1471 1024);
96838a40 1472 if (!ret_val)
e4eff729 1473 good_cnt++;
96838a40
JB
1474 if (unlikely(++l == rxdr->count)) l = 0;
1475 /* time + 20 msecs (200 msecs on 2.4) is more than
1476 * enough time to complete the receives, if it's
e4eff729
MC
1477 * exceeded, break and error off
1478 */
1479 } while (good_cnt < 64 && jiffies < (time + 20));
96838a40 1480 if (good_cnt != 64) {
e4eff729 1481 ret_val = 13; /* ret_val is the same as mis-compare */
96838a40 1482 break;
e4eff729 1483 }
96838a40 1484 if (jiffies >= (time + 2)) {
e4eff729
MC
1485 ret_val = 14; /* error code for time out error */
1486 break;
1487 }
1488 } /* end loop count loop */
1da177e4
LT
1489 return ret_val;
1490}
1491
64798845 1492static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 1493{
c7be73bc
JP
1494 *data = e1000_setup_desc_rings(adapter);
1495 if (*data)
57128197 1496 goto out;
c7be73bc
JP
1497 *data = e1000_setup_loopback_test(adapter);
1498 if (*data)
57128197 1499 goto err_loopback;
1da177e4
LT
1500 *data = e1000_run_loopback_test(adapter);
1501 e1000_loopback_cleanup(adapter);
57128197 1502
1da177e4 1503err_loopback:
57128197
JK
1504 e1000_free_desc_rings(adapter);
1505out:
1da177e4
LT
1506 return *data;
1507}
1508
64798845 1509static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 1510{
1dc32918 1511 struct e1000_hw *hw = &adapter->hw;
1da177e4 1512 *data = 0;
1dc32918 1513 if (hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 1514 int i = 0;
be0f0719 1515 hw->serdes_has_link = false;
1da177e4 1516
2648345f
MC
1517 /* On some blade server designs, link establishment
1518 * could take as long as 2-3 minutes */
1da177e4 1519 do {
1dc32918 1520 e1000_check_for_link(hw);
be0f0719 1521 if (hw->serdes_has_link)
1da177e4 1522 return *data;
f8ec4733 1523 msleep(20);
1da177e4
LT
1524 } while (i++ < 3750);
1525
2648345f 1526 *data = 1;
1da177e4 1527 } else {
1dc32918
JP
1528 e1000_check_for_link(hw);
1529 if (hw->autoneg) /* if auto_neg is set wait for it */
f8ec4733 1530 msleep(4000);
1da177e4 1531
1dc32918 1532 if (!(er32(STATUS) & E1000_STATUS_LU)) {
1da177e4
LT
1533 *data = 1;
1534 }
1535 }
1536 return *data;
1537}
1538
64798845 1539static int e1000_get_sset_count(struct net_device *netdev, int sset)
1da177e4 1540{
b9f2c044
JG
1541 switch (sset) {
1542 case ETH_SS_TEST:
1543 return E1000_TEST_LEN;
1544 case ETH_SS_STATS:
1545 return E1000_STATS_LEN;
1546 default:
1547 return -EOPNOTSUPP;
1548 }
1da177e4
LT
1549}
1550
64798845
JP
1551static void e1000_diag_test(struct net_device *netdev,
1552 struct ethtool_test *eth_test, u64 *data)
1da177e4 1553{
60490fe0 1554 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1555 struct e1000_hw *hw = &adapter->hw;
c3033b01 1556 bool if_running = netif_running(netdev);
1da177e4 1557
1314bbf3 1558 set_bit(__E1000_TESTING, &adapter->flags);
96838a40 1559 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1da177e4
LT
1560 /* Offline tests */
1561
1562 /* save speed, duplex, autoneg settings */
1dc32918
JP
1563 u16 autoneg_advertised = hw->autoneg_advertised;
1564 u8 forced_speed_duplex = hw->forced_speed_duplex;
1565 u8 autoneg = hw->autoneg;
1da177e4 1566
feb8f478 1567 e_info(hw, "offline testing starting\n");
d658266e 1568
1da177e4
LT
1569 /* Link test performed before hardware reset so autoneg doesn't
1570 * interfere with test result */
96838a40 1571 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1572 eth_test->flags |= ETH_TEST_FL_FAILED;
1573
96838a40 1574 if (if_running)
2db10a08
AK
1575 /* indicate we're in test mode */
1576 dev_close(netdev);
1da177e4
LT
1577 else
1578 e1000_reset(adapter);
1579
96838a40 1580 if (e1000_reg_test(adapter, &data[0]))
1da177e4
LT
1581 eth_test->flags |= ETH_TEST_FL_FAILED;
1582
1583 e1000_reset(adapter);
96838a40 1584 if (e1000_eeprom_test(adapter, &data[1]))
1da177e4
LT
1585 eth_test->flags |= ETH_TEST_FL_FAILED;
1586
1587 e1000_reset(adapter);
96838a40 1588 if (e1000_intr_test(adapter, &data[2]))
1da177e4
LT
1589 eth_test->flags |= ETH_TEST_FL_FAILED;
1590
1591 e1000_reset(adapter);
d658266e
JB
1592 /* make sure the phy is powered up */
1593 e1000_power_up_phy(adapter);
96838a40 1594 if (e1000_loopback_test(adapter, &data[3]))
1da177e4
LT
1595 eth_test->flags |= ETH_TEST_FL_FAILED;
1596
1597 /* restore speed, duplex, autoneg settings */
1dc32918
JP
1598 hw->autoneg_advertised = autoneg_advertised;
1599 hw->forced_speed_duplex = forced_speed_duplex;
1600 hw->autoneg = autoneg;
1da177e4
LT
1601
1602 e1000_reset(adapter);
1314bbf3 1603 clear_bit(__E1000_TESTING, &adapter->flags);
96838a40 1604 if (if_running)
2db10a08 1605 dev_open(netdev);
1da177e4 1606 } else {
feb8f478 1607 e_info(hw, "online testing starting\n");
1da177e4 1608 /* Online tests */
96838a40 1609 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1610 eth_test->flags |= ETH_TEST_FL_FAILED;
1611
90fb5135 1612 /* Online tests aren't run; pass by default */
1da177e4
LT
1613 data[0] = 0;
1614 data[1] = 0;
1615 data[2] = 0;
1616 data[3] = 0;
2db10a08 1617
1314bbf3 1618 clear_bit(__E1000_TESTING, &adapter->flags);
1da177e4 1619 }
352c9f85 1620 msleep_interruptible(4 * 1000);
1da177e4
LT
1621}
1622
64798845
JP
1623static int e1000_wol_exclusion(struct e1000_adapter *adapter,
1624 struct ethtool_wolinfo *wol)
1da177e4 1625{
1da177e4 1626 struct e1000_hw *hw = &adapter->hw;
120cd576 1627 int retval = 1; /* fail by default */
1da177e4 1628
120cd576 1629 switch (hw->device_id) {
dc1f71f6 1630 case E1000_DEV_ID_82542:
1da177e4
LT
1631 case E1000_DEV_ID_82543GC_FIBER:
1632 case E1000_DEV_ID_82543GC_COPPER:
1633 case E1000_DEV_ID_82544EI_FIBER:
1634 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1635 case E1000_DEV_ID_82545EM_FIBER:
1636 case E1000_DEV_ID_82545EM_COPPER:
84916829 1637 case E1000_DEV_ID_82546GB_QUAD_COPPER:
120cd576
JB
1638 case E1000_DEV_ID_82546GB_PCIE:
1639 /* these don't support WoL at all */
1da177e4 1640 wol->supported = 0;
120cd576 1641 break;
1da177e4
LT
1642 case E1000_DEV_ID_82546EB_FIBER:
1643 case E1000_DEV_ID_82546GB_FIBER:
120cd576 1644 /* Wake events not supported on port B */
1dc32918 1645 if (er32(STATUS) & E1000_STATUS_FUNC_1) {
1da177e4 1646 wol->supported = 0;
120cd576 1647 break;
1da177e4 1648 }
120cd576
JB
1649 /* return success for non excluded adapter ports */
1650 retval = 0;
1651 break;
1652 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1653 /* quad port adapters only support WoL on port A */
1654 if (!adapter->quad_port_a) {
1655 wol->supported = 0;
1656 break;
1657 }
1658 /* return success for non excluded adapter ports */
1659 retval = 0;
1660 break;
1da177e4 1661 default:
120cd576
JB
1662 /* dual port cards only support WoL on port A from now on
1663 * unless it was enabled in the eeprom for port B
1664 * so exclude FUNC_1 ports from having WoL enabled */
1dc32918 1665 if (er32(STATUS) & E1000_STATUS_FUNC_1 &&
120cd576
JB
1666 !adapter->eeprom_wol) {
1667 wol->supported = 0;
1668 break;
1669 }
84916829 1670
120cd576
JB
1671 retval = 0;
1672 }
1673
1674 return retval;
1675}
1676
64798845
JP
1677static void e1000_get_wol(struct net_device *netdev,
1678 struct ethtool_wolinfo *wol)
120cd576
JB
1679{
1680 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1681 struct e1000_hw *hw = &adapter->hw;
120cd576
JB
1682
1683 wol->supported = WAKE_UCAST | WAKE_MCAST |
1684 WAKE_BCAST | WAKE_MAGIC;
1685 wol->wolopts = 0;
1686
1687 /* this function will set ->supported = 0 and return 1 if wol is not
1688 * supported by this hardware */
de126489
RW
1689 if (e1000_wol_exclusion(adapter, wol) ||
1690 !device_can_wakeup(&adapter->pdev->dev))
1da177e4 1691 return;
120cd576
JB
1692
1693 /* apply any specific unsupported masks here */
1dc32918 1694 switch (hw->device_id) {
120cd576
JB
1695 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1696 /* KSP3 does not suppport UCAST wake-ups */
1697 wol->supported &= ~WAKE_UCAST;
1698
1699 if (adapter->wol & E1000_WUFC_EX)
feb8f478
ET
1700 e_err(drv, "Interface does not support directed "
1701 "(unicast) frame wake-up packets\n");
120cd576
JB
1702 break;
1703 default:
1704 break;
1da177e4 1705 }
120cd576
JB
1706
1707 if (adapter->wol & E1000_WUFC_EX)
1708 wol->wolopts |= WAKE_UCAST;
1709 if (adapter->wol & E1000_WUFC_MC)
1710 wol->wolopts |= WAKE_MCAST;
1711 if (adapter->wol & E1000_WUFC_BC)
1712 wol->wolopts |= WAKE_BCAST;
1713 if (adapter->wol & E1000_WUFC_MAG)
1714 wol->wolopts |= WAKE_MAGIC;
1da177e4
LT
1715}
1716
64798845 1717static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1da177e4 1718{
60490fe0 1719 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1720 struct e1000_hw *hw = &adapter->hw;
1721
120cd576
JB
1722 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1723 return -EOPNOTSUPP;
1724
de126489
RW
1725 if (e1000_wol_exclusion(adapter, wol) ||
1726 !device_can_wakeup(&adapter->pdev->dev))
1da177e4
LT
1727 return wol->wolopts ? -EOPNOTSUPP : 0;
1728
120cd576 1729 switch (hw->device_id) {
84916829 1730 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
84916829 1731 if (wol->wolopts & WAKE_UCAST) {
feb8f478
ET
1732 e_err(drv, "Interface does not support directed "
1733 "(unicast) frame wake-up packets\n");
84916829
JK
1734 return -EOPNOTSUPP;
1735 }
120cd576 1736 break;
1da177e4 1737 default:
120cd576 1738 break;
1da177e4
LT
1739 }
1740
120cd576
JB
1741 /* these settings will always override what we currently have */
1742 adapter->wol = 0;
1743
1744 if (wol->wolopts & WAKE_UCAST)
1745 adapter->wol |= E1000_WUFC_EX;
1746 if (wol->wolopts & WAKE_MCAST)
1747 adapter->wol |= E1000_WUFC_MC;
1748 if (wol->wolopts & WAKE_BCAST)
1749 adapter->wol |= E1000_WUFC_BC;
1750 if (wol->wolopts & WAKE_MAGIC)
1751 adapter->wol |= E1000_WUFC_MAG;
1752
de126489
RW
1753 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1754
1da177e4
LT
1755 return 0;
1756}
1757
1758/* toggle LED 4 times per second = 2 "blinks" per second */
1759#define E1000_ID_INTERVAL (HZ/4)
1760
1761/* bit defines for adapter->led_status */
1762#define E1000_LED_ON 0
1763
64798845 1764static void e1000_led_blink_callback(unsigned long data)
1da177e4
LT
1765{
1766 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1dc32918 1767 struct e1000_hw *hw = &adapter->hw;
1da177e4 1768
96838a40 1769 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1dc32918 1770 e1000_led_off(hw);
1da177e4 1771 else
1dc32918 1772 e1000_led_on(hw);
1da177e4
LT
1773
1774 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1775}
1776
64798845 1777static int e1000_phys_id(struct net_device *netdev, u32 data)
1da177e4 1778{
60490fe0 1779 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1780 struct e1000_hw *hw = &adapter->hw;
1da177e4 1781
abec42a4
SH
1782 if (!data)
1783 data = INT_MAX;
1da177e4 1784
1532ecea
JB
1785 if (!adapter->blink_timer.function) {
1786 init_timer(&adapter->blink_timer);
1787 adapter->blink_timer.function = e1000_led_blink_callback;
1788 adapter->blink_timer.data = (unsigned long)adapter;
1da177e4 1789 }
1532ecea
JB
1790 e1000_setup_led(hw);
1791 mod_timer(&adapter->blink_timer, jiffies);
1792 msleep_interruptible(data * 1000);
1793 del_timer_sync(&adapter->blink_timer);
1da177e4 1794
1dc32918 1795 e1000_led_off(hw);
1da177e4 1796 clear_bit(E1000_LED_ON, &adapter->led_status);
1dc32918 1797 e1000_cleanup_led(hw);
1da177e4
LT
1798
1799 return 0;
1800}
1801
94c9e5a8
JB
1802static int e1000_get_coalesce(struct net_device *netdev,
1803 struct ethtool_coalesce *ec)
1804{
1805 struct e1000_adapter *adapter = netdev_priv(netdev);
1806
1807 if (adapter->hw.mac_type < e1000_82545)
1808 return -EOPNOTSUPP;
1809
eab2abf5 1810 if (adapter->itr_setting <= 4)
94c9e5a8
JB
1811 ec->rx_coalesce_usecs = adapter->itr_setting;
1812 else
1813 ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
1814
1815 return 0;
1816}
1817
1818static int e1000_set_coalesce(struct net_device *netdev,
1819 struct ethtool_coalesce *ec)
1820{
1821 struct e1000_adapter *adapter = netdev_priv(netdev);
1822 struct e1000_hw *hw = &adapter->hw;
1823
1824 if (hw->mac_type < e1000_82545)
1825 return -EOPNOTSUPP;
1826
1827 if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
eab2abf5 1828 ((ec->rx_coalesce_usecs > 4) &&
94c9e5a8
JB
1829 (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
1830 (ec->rx_coalesce_usecs == 2))
1831 return -EINVAL;
1832
eab2abf5
JB
1833 if (ec->rx_coalesce_usecs == 4) {
1834 adapter->itr = adapter->itr_setting = 4;
1835 } else if (ec->rx_coalesce_usecs <= 3) {
94c9e5a8
JB
1836 adapter->itr = 20000;
1837 adapter->itr_setting = ec->rx_coalesce_usecs;
1838 } else {
1839 adapter->itr = (1000000 / ec->rx_coalesce_usecs);
1840 adapter->itr_setting = adapter->itr & ~3;
1841 }
1842
1843 if (adapter->itr_setting != 0)
1844 ew32(ITR, 1000000000 / (adapter->itr * 256));
1845 else
1846 ew32(ITR, 0);
1847
1848 return 0;
1849}
1850
64798845 1851static int e1000_nway_reset(struct net_device *netdev)
1da177e4 1852{
60490fe0 1853 struct e1000_adapter *adapter = netdev_priv(netdev);
2db10a08
AK
1854 if (netif_running(netdev))
1855 e1000_reinit_locked(adapter);
1da177e4
LT
1856 return 0;
1857}
1858
64798845
JP
1859static void e1000_get_ethtool_stats(struct net_device *netdev,
1860 struct ethtool_stats *stats, u64 *data)
1da177e4 1861{
60490fe0 1862 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1863 int i;
8328c38f 1864 char *p = NULL;
1da177e4
LT
1865
1866 e1000_update_stats(adapter);
7bfa4816 1867 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
8328c38f
AK
1868 switch (e1000_gstrings_stats[i].type) {
1869 case NETDEV_STATS:
1870 p = (char *) netdev +
1871 e1000_gstrings_stats[i].stat_offset;
1872 break;
1873 case E1000_STATS:
1874 p = (char *) adapter +
1875 e1000_gstrings_stats[i].stat_offset;
1876 break;
1877 }
1878
7bfa4816 1879 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
406874a7 1880 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1da177e4 1881 }
7bfa4816 1882/* BUG_ON(i != E1000_STATS_LEN); */
1da177e4
LT
1883}
1884
64798845
JP
1885static void e1000_get_strings(struct net_device *netdev, u32 stringset,
1886 u8 *data)
1da177e4 1887{
406874a7 1888 u8 *p = data;
1da177e4
LT
1889 int i;
1890
96838a40 1891 switch (stringset) {
1da177e4 1892 case ETH_SS_TEST:
96838a40 1893 memcpy(data, *e1000_gstrings_test,
c32bc6e9 1894 sizeof(e1000_gstrings_test));
1da177e4
LT
1895 break;
1896 case ETH_SS_STATS:
7bfa4816
JK
1897 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1898 memcpy(p, e1000_gstrings_stats[i].stat_string,
1899 ETH_GSTRING_LEN);
1900 p += ETH_GSTRING_LEN;
1901 }
7bfa4816 1902/* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1da177e4
LT
1903 break;
1904 }
1905}
1906
7282d491 1907static const struct ethtool_ops e1000_ethtool_ops = {
1da177e4
LT
1908 .get_settings = e1000_get_settings,
1909 .set_settings = e1000_set_settings,
1910 .get_drvinfo = e1000_get_drvinfo,
1911 .get_regs_len = e1000_get_regs_len,
1912 .get_regs = e1000_get_regs,
1913 .get_wol = e1000_get_wol,
1914 .set_wol = e1000_set_wol,
8fc897b0
AK
1915 .get_msglevel = e1000_get_msglevel,
1916 .set_msglevel = e1000_set_msglevel,
1da177e4 1917 .nway_reset = e1000_nway_reset,
b548192a 1918 .get_link = e1000_get_link,
1da177e4
LT
1919 .get_eeprom_len = e1000_get_eeprom_len,
1920 .get_eeprom = e1000_get_eeprom,
1921 .set_eeprom = e1000_set_eeprom,
1922 .get_ringparam = e1000_get_ringparam,
1923 .set_ringparam = e1000_set_ringparam,
8fc897b0
AK
1924 .get_pauseparam = e1000_get_pauseparam,
1925 .set_pauseparam = e1000_set_pauseparam,
1926 .get_rx_csum = e1000_get_rx_csum,
1927 .set_rx_csum = e1000_set_rx_csum,
1928 .get_tx_csum = e1000_get_tx_csum,
1929 .set_tx_csum = e1000_set_tx_csum,
8fc897b0 1930 .set_sg = ethtool_op_set_sg,
8fc897b0 1931 .set_tso = e1000_set_tso,
1da177e4
LT
1932 .self_test = e1000_diag_test,
1933 .get_strings = e1000_get_strings,
1934 .phys_id = e1000_phys_id,
1da177e4 1935 .get_ethtool_stats = e1000_get_ethtool_stats,
94c9e5a8
JB
1936 .get_sset_count = e1000_get_sset_count,
1937 .get_coalesce = e1000_get_coalesce,
1938 .set_coalesce = e1000_set_coalesce,
1da177e4
LT
1939};
1940
1941void e1000_set_ethtool_ops(struct net_device *netdev)
1942{
1943 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1944}
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