projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
remove NETIF_F_TSO ifdefery
[deliverable/linux.git] / drivers / net / e1000 / e1000_ethtool.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include "e1000.h"
32
33#include <asm/uaccess.h>
34
35574764
NN		 35extern char e1000_driver_name[];
36extern char e1000_driver_version[];
37
38extern int e1000_up(struct e1000_adapter *adapter);
39extern void e1000_down(struct e1000_adapter *adapter);
40extern void e1000_reinit_locked(struct e1000_adapter *adapter);
41extern void e1000_reset(struct e1000_adapter *adapter);
42extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
43extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
44extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
45extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
46extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
47extern void e1000_update_stats(struct e1000_adapter *adapter);
48
49
1da177e4
LT		 50struct e1000_stats {
51 char stat_string[ETH_GSTRING_LEN];
52 int sizeof_stat;
53 int stat_offset;
54};
55
56#define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
57 offsetof(struct e1000_adapter, m)
58static const struct e1000_stats e1000_gstrings_stats[] = {
49559854
MW		 59 { "rx_packets", E1000_STAT(stats.gprc) },
60 { "tx_packets", E1000_STAT(stats.gptc) },
61 { "rx_bytes", E1000_STAT(stats.gorcl) },
62 { "tx_bytes", E1000_STAT(stats.gotcl) },
63 { "rx_broadcast", E1000_STAT(stats.bprc) },
64 { "tx_broadcast", E1000_STAT(stats.bptc) },
65 { "rx_multicast", E1000_STAT(stats.mprc) },
66 { "tx_multicast", E1000_STAT(stats.mptc) },
67 { "rx_errors", E1000_STAT(stats.rxerrc) },
68 { "tx_errors", E1000_STAT(stats.txerrc) },
1da177e4 69 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
49559854
MW		 70 { "multicast", E1000_STAT(stats.mprc) },
71 { "collisions", E1000_STAT(stats.colc) },
72 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
1da177e4 73 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
49559854 74 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
1da177e4 75 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
2648345f 76 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
49559854
MW		 77 { "rx_missed_errors", E1000_STAT(stats.mpc) },
78 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
79 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
1da177e4
LT		 80 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
81 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
49559854 82 { "tx_window_errors", E1000_STAT(stats.latecol) },
1da177e4
LT		 83 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
84 { "tx_deferred_ok", E1000_STAT(stats.dc) },
85 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
86 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
6b7660cd 87 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
fcfb1224 88 { "tx_restart_queue", E1000_STAT(restart_queue) },
1da177e4
LT		 89 { "rx_long_length_errors", E1000_STAT(stats.roc) },
90 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
91 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
92 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
93 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
94 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
95 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
96 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
97 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
98 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
99 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
e4c811c9
MC		 100 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
101 { "rx_header_split", E1000_STAT(rx_hdr_split) },
6b7660cd 102 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
15e376b4
JG		 103 { "tx_smbus", E1000_STAT(stats.mgptc) },
104 { "rx_smbus", E1000_STAT(stats.mgprc) },
105 { "dropped_smbus", E1000_STAT(stats.mgpdc) },
1da177e4 106};
7bfa4816 107
7bfa4816 108#define E1000_QUEUE_STATS_LEN 0
7bfa4816 109#define E1000_GLOBAL_STATS_LEN \
1da177e4 110 sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
7bfa4816 111#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
1da177e4
LT		 112static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
113 "Register test (offline)", "Eeprom test (offline)",
114 "Interrupt test (offline)", "Loopback test (offline)",
115 "Link test (on/offline)"
116};
117#define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
118
119static int
120e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
121{
60490fe0 122 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 123 struct e1000_hw *hw = &adapter->hw;
124
96838a40 125 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 126
127 ecmd->supported = (SUPPORTED_10baseT_Half |
128 SUPPORTED_10baseT_Full |
129 SUPPORTED_100baseT_Half |
130 SUPPORTED_100baseT_Full |
131 SUPPORTED_1000baseT_Full|
132 SUPPORTED_Autoneg |
133 SUPPORTED_TP);
cd94dd0b
AK		 134 if (hw->phy_type == e1000_phy_ife)
135 ecmd->supported &= ~SUPPORTED_1000baseT_Full;
1da177e4
LT		 136 ecmd->advertising = ADVERTISED_TP;
137
96838a40 138 if (hw->autoneg == 1) {
1da177e4 139 ecmd->advertising |= ADVERTISED_Autoneg;
1da177e4 140 /* the e1000 autoneg seems to match ethtool nicely */
1da177e4
LT		 141 ecmd->advertising |= hw->autoneg_advertised;
142 }
143
144 ecmd->port = PORT_TP;
145 ecmd->phy_address = hw->phy_addr;
146
96838a40 147 if (hw->mac_type == e1000_82543)
1da177e4
LT		 148 ecmd->transceiver = XCVR_EXTERNAL;
149 else
150 ecmd->transceiver = XCVR_INTERNAL;
151
152 } else {
153 ecmd->supported = (SUPPORTED_1000baseT_Full |
154 SUPPORTED_FIBRE |
155 SUPPORTED_Autoneg);
156
012609a8
MC		 157 ecmd->advertising = (ADVERTISED_1000baseT_Full |
158 ADVERTISED_FIBRE |
159 ADVERTISED_Autoneg);
1da177e4
LT		 160
161 ecmd->port = PORT_FIBRE;
162
96838a40 163 if (hw->mac_type >= e1000_82545)
1da177e4
LT		 164 ecmd->transceiver = XCVR_INTERNAL;
165 else
166 ecmd->transceiver = XCVR_EXTERNAL;
167 }
168
96838a40 169 if (netif_carrier_ok(adapter->netdev)) {
1da177e4
LT		 170
171 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
172 &adapter->link_duplex);
173 ecmd->speed = adapter->link_speed;
174
175 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
176 * and HALF_DUPLEX != DUPLEX_HALF */
177
96838a40 178 if (adapter->link_duplex == FULL_DUPLEX)
1da177e4
LT		 179 ecmd->duplex = DUPLEX_FULL;
180 else
181 ecmd->duplex = DUPLEX_HALF;
182 } else {
183 ecmd->speed = -1;
184 ecmd->duplex = -1;
185 }
186
187 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
188 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
189 return 0;
190}
191
192static int
193e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
194{
60490fe0 195 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 196 struct e1000_hw *hw = &adapter->hw;
197
57128197
JK		 198 /* When SoL/IDER sessions are active, autoneg/speed/duplex
199 * cannot be changed */
200 if (e1000_check_phy_reset_block(hw)) {
201 DPRINTK(DRV, ERR, "Cannot change link characteristics "
202 "when SoL/IDER is active.\n");
203 return -EINVAL;
204 }
205
1a821ca5
JB		 206 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
207 msleep(1);
208
57128197 209 if (ecmd->autoneg == AUTONEG_ENABLE) {
1da177e4 210 hw->autoneg = 1;
96838a40 211 if (hw->media_type == e1000_media_type_fiber)
012609a8
MC		 212 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
213 ADVERTISED_FIBRE |
214 ADVERTISED_Autoneg;
96838a40 215 else
2f2ca263
JK		 216 hw->autoneg_advertised = ecmd->advertising |
217 ADVERTISED_TP |
218 ADVERTISED_Autoneg;
012609a8 219 ecmd->advertising = hw->autoneg_advertised;
1da177e4 220 } else
1a821ca5
JB		 221 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
222 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 223 return -EINVAL;
1a821ca5 224 }
1da177e4
LT		 225
226 /* reset the link */
227
1a821ca5
JB		 228 if (netif_running(adapter->netdev)) {
229 e1000_down(adapter);
230 e1000_up(adapter);
231 } else
1da177e4
LT		 232 e1000_reset(adapter);
233
1a821ca5 234 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 235 return 0;
236}
237
238static void
239e1000_get_pauseparam(struct net_device *netdev,
240 struct ethtool_pauseparam *pause)
241{
60490fe0 242 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 243 struct e1000_hw *hw = &adapter->hw;
244
96838a40 245 pause->autoneg =
1da177e4 246 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
96838a40 247
11241b10 248 if (hw->fc == E1000_FC_RX_PAUSE)
1da177e4 249 pause->rx_pause = 1;
11241b10 250 else if (hw->fc == E1000_FC_TX_PAUSE)
1da177e4 251 pause->tx_pause = 1;
11241b10 252 else if (hw->fc == E1000_FC_FULL) {
1da177e4
LT		 253 pause->rx_pause = 1;
254 pause->tx_pause = 1;
255 }
256}
257
258static int
259e1000_set_pauseparam(struct net_device *netdev,
260 struct ethtool_pauseparam *pause)
261{
60490fe0 262 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 263 struct e1000_hw *hw = &adapter->hw;
1a821ca5 264 int retval = 0;
96838a40 265
1da177e4
LT		 266 adapter->fc_autoneg = pause->autoneg;
267
1a821ca5
JB		 268 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
269 msleep(1);
270
96838a40 271 if (pause->rx_pause && pause->tx_pause)
11241b10 272 hw->fc = E1000_FC_FULL;
96838a40 273 else if (pause->rx_pause && !pause->tx_pause)
11241b10 274 hw->fc = E1000_FC_RX_PAUSE;
96838a40 275 else if (!pause->rx_pause && pause->tx_pause)
11241b10 276 hw->fc = E1000_FC_TX_PAUSE;
96838a40 277 else if (!pause->rx_pause && !pause->tx_pause)
11241b10 278 hw->fc = E1000_FC_NONE;
1da177e4
LT		 279
280 hw->original_fc = hw->fc;
281
96838a40 282 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
1a821ca5
JB		 283 if (netif_running(adapter->netdev)) {
284 e1000_down(adapter);
285 e1000_up(adapter);
286 } else
1da177e4 287 e1000_reset(adapter);
96838a40 288 } else
1a821ca5 289 retval = ((hw->media_type == e1000_media_type_fiber) ?
90fb5135 290 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
96838a40 291
1a821ca5
JB		 292 clear_bit(__E1000_RESETTING, &adapter->flags);
293 return retval;
1da177e4
LT		 294}
295
296static uint32_t
297e1000_get_rx_csum(struct net_device *netdev)
298{
60490fe0 299 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 300 return adapter->rx_csum;
301}
302
303static int
304e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
305{
60490fe0 306 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 307 adapter->rx_csum = data;
308
2db10a08
AK		 309 if (netif_running(netdev))
310 e1000_reinit_locked(adapter);
311 else
1da177e4
LT		 312 e1000_reset(adapter);
313 return 0;
314}
96838a40 315
1da177e4
LT		 316static uint32_t
317e1000_get_tx_csum(struct net_device *netdev)
318{
319 return (netdev->features & NETIF_F_HW_CSUM) != 0;
320}
321
322static int
323e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
324{
60490fe0 325 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 326
96838a40 327 if (adapter->hw.mac_type < e1000_82543) {
1da177e4
LT		 328 if (!data)
329 return -EINVAL;
330 return 0;
331 }
332
333 if (data)
334 netdev->features |= NETIF_F_HW_CSUM;
335 else
336 netdev->features &= ~NETIF_F_HW_CSUM;
337
338 return 0;
339}
340
1da177e4
LT		 341static int
342e1000_set_tso(struct net_device *netdev, uint32_t data)
343{
60490fe0 344 struct e1000_adapter *adapter = netdev_priv(netdev);
96838a40
JB		 345 if ((adapter->hw.mac_type < e1000_82544) ||
346 (adapter->hw.mac_type == e1000_82547))
1da177e4
LT		 347 return data ? -EINVAL : 0;
348
349 if (data)
350 netdev->features |= NETIF_F_TSO;
351 else
352 netdev->features &= ~NETIF_F_TSO;
7e6c9861 353
87ca4e5b
AK		 354 if (data)
355 netdev->features |= NETIF_F_TSO6;
356 else
357 netdev->features &= ~NETIF_F_TSO6;
87ca4e5b 358
7e6c9861
JK		 359 DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
360 adapter->tso_force = TRUE;
1da177e4 361 return 0;
96838a40 362}
1da177e4
LT		 363
364static uint32_t
365e1000_get_msglevel(struct net_device *netdev)
366{
60490fe0 367 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 368 return adapter->msg_enable;
369}
370
371static void
372e1000_set_msglevel(struct net_device *netdev, uint32_t data)
373{
60490fe0 374 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 375 adapter->msg_enable = data;
376}
377
96838a40 378static int
1da177e4
LT		 379e1000_get_regs_len(struct net_device *netdev)
380{
381#define E1000_REGS_LEN 32
382 return E1000_REGS_LEN * sizeof(uint32_t);
383}
384
385static void
386e1000_get_regs(struct net_device *netdev,
387 struct ethtool_regs *regs, void *p)
388{
60490fe0 389 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 390 struct e1000_hw *hw = &adapter->hw;
391 uint32_t *regs_buff = p;
392 uint16_t phy_data;
393
394 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
395
396 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
397
398 regs_buff[0] = E1000_READ_REG(hw, CTRL);
399 regs_buff[1] = E1000_READ_REG(hw, STATUS);
400
401 regs_buff[2] = E1000_READ_REG(hw, RCTL);
402 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
403 regs_buff[4] = E1000_READ_REG(hw, RDH);
404 regs_buff[5] = E1000_READ_REG(hw, RDT);
405 regs_buff[6] = E1000_READ_REG(hw, RDTR);
406
407 regs_buff[7] = E1000_READ_REG(hw, TCTL);
408 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
409 regs_buff[9] = E1000_READ_REG(hw, TDH);
410 regs_buff[10] = E1000_READ_REG(hw, TDT);
411 regs_buff[11] = E1000_READ_REG(hw, TIDV);
412
413 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
96838a40 414 if (hw->phy_type == e1000_phy_igp) {
1da177e4
LT		 415 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
416 IGP01E1000_PHY_AGC_A);
417 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
418 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
419 regs_buff[13] = (uint32_t)phy_data; /* cable length */
420 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
421 IGP01E1000_PHY_AGC_B);
422 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
423 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
424 regs_buff[14] = (uint32_t)phy_data; /* cable length */
425 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
426 IGP01E1000_PHY_AGC_C);
427 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
428 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
429 regs_buff[15] = (uint32_t)phy_data; /* cable length */
430 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
431 IGP01E1000_PHY_AGC_D);
432 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
433 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
434 regs_buff[16] = (uint32_t)phy_data; /* cable length */
435 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
436 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
437 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
438 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
439 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
440 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
441 IGP01E1000_PHY_PCS_INIT_REG);
442 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
443 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
444 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
445 regs_buff[20] = 0; /* polarity correction enabled (always) */
446 regs_buff[22] = 0; /* phy receive errors (unavailable) */
447 regs_buff[23] = regs_buff[18]; /* mdix mode */
448 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
449 } else {
8fc897b0 450 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
1da177e4
LT		 451 regs_buff[13] = (uint32_t)phy_data; /* cable length */
452 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
453 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
454 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
8fc897b0 455 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1da177e4
LT		 456 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
457 regs_buff[18] = regs_buff[13]; /* cable polarity */
458 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
459 regs_buff[20] = regs_buff[17]; /* polarity correction */
460 /* phy receive errors */
461 regs_buff[22] = adapter->phy_stats.receive_errors;
462 regs_buff[23] = regs_buff[13]; /* mdix mode */
463 }
464 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
465 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
466 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
467 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
96838a40 468 if (hw->mac_type >= e1000_82540 &&
4ccc12ae
JB		 469 hw->mac_type < e1000_82571 &&
470 hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 471 regs_buff[26] = E1000_READ_REG(hw, MANC);
472 }
473}
474
475static int
476e1000_get_eeprom_len(struct net_device *netdev)
477{
60490fe0 478 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 479 return adapter->hw.eeprom.word_size * 2;
480}
481
482static int
483e1000_get_eeprom(struct net_device *netdev,
484 struct ethtool_eeprom *eeprom, uint8_t *bytes)
485{
60490fe0 486 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 487 struct e1000_hw *hw = &adapter->hw;
488 uint16_t *eeprom_buff;
489 int first_word, last_word;
490 int ret_val = 0;
491 uint16_t i;
492
96838a40 493 if (eeprom->len == 0)
1da177e4
LT		 494 return -EINVAL;
495
496 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
497
498 first_word = eeprom->offset >> 1;
499 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
500
501 eeprom_buff = kmalloc(sizeof(uint16_t) *
502 (last_word - first_word + 1), GFP_KERNEL);
96838a40 503 if (!eeprom_buff)
1da177e4
LT		 504 return -ENOMEM;
505
96838a40 506 if (hw->eeprom.type == e1000_eeprom_spi)
1da177e4
LT		 507 ret_val = e1000_read_eeprom(hw, first_word,
508 last_word - first_word + 1,
509 eeprom_buff);
510 else {
511 for (i = 0; i < last_word - first_word + 1; i++)
96838a40 512 if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
1da177e4
LT		 513 &eeprom_buff[i])))
514 break;
515 }
516
517 /* Device's eeprom is always little-endian, word addressable */
518 for (i = 0; i < last_word - first_word + 1; i++)
519 le16_to_cpus(&eeprom_buff[i]);
520
521 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
522 eeprom->len);
523 kfree(eeprom_buff);
524
525 return ret_val;
526}
527
528static int
529e1000_set_eeprom(struct net_device *netdev,
530 struct ethtool_eeprom *eeprom, uint8_t *bytes)
531{
60490fe0 532 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 533 struct e1000_hw *hw = &adapter->hw;
534 uint16_t *eeprom_buff;
535 void *ptr;
536 int max_len, first_word, last_word, ret_val = 0;
537 uint16_t i;
538
96838a40 539 if (eeprom->len == 0)
1da177e4
LT		 540 return -EOPNOTSUPP;
541
96838a40 542 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1da177e4
LT		 543 return -EFAULT;
544
545 max_len = hw->eeprom.word_size * 2;
546
547 first_word = eeprom->offset >> 1;
548 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
549 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
96838a40 550 if (!eeprom_buff)
1da177e4
LT		 551 return -ENOMEM;
552
553 ptr = (void *)eeprom_buff;
554
96838a40 555 if (eeprom->offset & 1) {
1da177e4
LT		 556 /* need read/modify/write of first changed EEPROM word */
557 /* only the second byte of the word is being modified */
558 ret_val = e1000_read_eeprom(hw, first_word, 1,
559 &eeprom_buff[0]);
560 ptr++;
561 }
96838a40 562 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
1da177e4
LT		 563 /* need read/modify/write of last changed EEPROM word */
564 /* only the first byte of the word is being modified */
565 ret_val = e1000_read_eeprom(hw, last_word, 1,
566 &eeprom_buff[last_word - first_word]);
567 }
568
569 /* Device's eeprom is always little-endian, word addressable */
570 for (i = 0; i < last_word - first_word + 1; i++)
571 le16_to_cpus(&eeprom_buff[i]);
572
573 memcpy(ptr, bytes, eeprom->len);
574
575 for (i = 0; i < last_word - first_word + 1; i++)
576 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
577
578 ret_val = e1000_write_eeprom(hw, first_word,
579 last_word - first_word + 1, eeprom_buff);
580
96838a40 581 /* Update the checksum over the first part of the EEPROM if needed
a7990ba6 582 * and flush shadow RAM for 82573 conrollers */
96838a40 583 if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
a7990ba6 584 (hw->mac_type == e1000_82573)))
1da177e4
LT		 585 e1000_update_eeprom_checksum(hw);
586
587 kfree(eeprom_buff);
588 return ret_val;
589}
590
591static void
592e1000_get_drvinfo(struct net_device *netdev,
593 struct ethtool_drvinfo *drvinfo)
594{
60490fe0 595 struct e1000_adapter *adapter = netdev_priv(netdev);
a2917e22
JK		 596 char firmware_version[32];
597 uint16_t eeprom_data;
1da177e4
LT		 598
599 strncpy(drvinfo->driver, e1000_driver_name, 32);
600 strncpy(drvinfo->version, e1000_driver_version, 32);
a2917e22
JK		 601
602 /* EEPROM image version # is reported as firmware version # for
603 * 8257{1|2|3} controllers */
604 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
605 switch (adapter->hw.mac_type) {
606 case e1000_82571:
607 case e1000_82572:
608 case e1000_82573:
6418ecc6 609 case e1000_80003es2lan:
cd94dd0b 610 case e1000_ich8lan:
a2917e22
JK		 611 sprintf(firmware_version, "%d.%d-%d",
612 (eeprom_data & 0xF000) >> 12,
613 (eeprom_data & 0x0FF0) >> 4,
614 eeprom_data & 0x000F);
615 break;
616 default:
617 sprintf(firmware_version, "N/A");
618 }
619
620 strncpy(drvinfo->fw_version, firmware_version, 32);
1da177e4
LT		 621 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
622 drvinfo->n_stats = E1000_STATS_LEN;
623 drvinfo->testinfo_len = E1000_TEST_LEN;
624 drvinfo->regdump_len = e1000_get_regs_len(netdev);
625 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
626}
627
628static void
629e1000_get_ringparam(struct net_device *netdev,
630 struct ethtool_ringparam *ring)
631{
60490fe0 632 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 633 e1000_mac_type mac_type = adapter->hw.mac_type;
581d708e
MC		 634 struct e1000_tx_ring *txdr = adapter->tx_ring;
635 struct e1000_rx_ring *rxdr = adapter->rx_ring;
1da177e4
LT		 636
637 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
638 E1000_MAX_82544_RXD;
639 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
640 E1000_MAX_82544_TXD;
641 ring->rx_mini_max_pending = 0;
642 ring->rx_jumbo_max_pending = 0;
643 ring->rx_pending = rxdr->count;
644 ring->tx_pending = txdr->count;
645 ring->rx_mini_pending = 0;
646 ring->rx_jumbo_pending = 0;
647}
648
96838a40 649static int
1da177e4
LT		 650e1000_set_ringparam(struct net_device *netdev,
651 struct ethtool_ringparam *ring)
652{
60490fe0 653 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 654 e1000_mac_type mac_type = adapter->hw.mac_type;
793fab72
VA		 655 struct e1000_tx_ring *txdr, *tx_old;
656 struct e1000_rx_ring *rxdr, *rx_old;
581d708e
MC		 657 int i, err, tx_ring_size, rx_ring_size;
658
0989aa43
JK		 659 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
660 return -EINVAL;
661
f56799ea
JK		 662 tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
663 rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e 664
2db10a08
AK		 665 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
666 msleep(1);
667
581d708e
MC		 668 if (netif_running(adapter->netdev))
669 e1000_down(adapter);
1da177e4
LT		 670
671 tx_old = adapter->tx_ring;
672 rx_old = adapter->rx_ring;
673
793fab72
VA		 674 err = -ENOMEM;
675 txdr = kzalloc(tx_ring_size, GFP_KERNEL);
676 if (!txdr)
677 goto err_alloc_tx;
581d708e 678
793fab72
VA		 679 rxdr = kzalloc(rx_ring_size, GFP_KERNEL);
680 if (!rxdr)
681 goto err_alloc_rx;
581d708e 682
793fab72
VA		 683 adapter->tx_ring = txdr;
684 adapter->rx_ring = rxdr;
581d708e 685
1da177e4
LT		 686 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
687 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
688 E1000_MAX_RXD : E1000_MAX_82544_RXD));
96838a40 689 E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
1da177e4
LT		 690
691 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
692 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
693 E1000_MAX_TXD : E1000_MAX_82544_TXD));
96838a40 694 E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
1da177e4 695
f56799ea 696 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 697 txdr[i].count = txdr->count;
f56799ea 698 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 699 rxdr[i].count = rxdr->count;
581d708e 700
96838a40 701 if (netif_running(adapter->netdev)) {
1da177e4 702 /* Try to get new resources before deleting old */
581d708e 703 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4 704 goto err_setup_rx;
581d708e 705 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 706 goto err_setup_tx;
707
708 /* save the new, restore the old in order to free it,
709 * then restore the new back again */
710
1da177e4
LT		 711 adapter->rx_ring = rx_old;
712 adapter->tx_ring = tx_old;
581d708e
MC		 713 e1000_free_all_rx_resources(adapter);
714 e1000_free_all_tx_resources(adapter);
715 kfree(tx_old);
716 kfree(rx_old);
793fab72
VA		 717 adapter->rx_ring = rxdr;
718 adapter->tx_ring = txdr;
96838a40 719 if ((err = e1000_up(adapter)))
2db10a08 720 goto err_setup;
1da177e4
LT		 721 }
722
2db10a08 723 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 724 return 0;
725err_setup_tx:
581d708e 726 e1000_free_all_rx_resources(adapter);
1da177e4
LT		 727err_setup_rx:
728 adapter->rx_ring = rx_old;
729 adapter->tx_ring = tx_old;
793fab72
VA		 730 kfree(rxdr);
731err_alloc_rx:
732 kfree(txdr);
733err_alloc_tx:
1da177e4 734 e1000_up(adapter);
2db10a08
AK		 735err_setup:
736 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 737 return err;
738}
739
740#define REG_PATTERN_TEST(R, M, W) \
741{ \
742 uint32_t pat, value; \
743 uint32_t test[] = \
744 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
96838a40 745 for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
1da177e4
LT		 746 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
747 value = E1000_READ_REG(&adapter->hw, R); \
96838a40 748 if (value != (test[pat] & W & M)) { \
b01f6691
MC		 749 DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
750 "0x%08X expected 0x%08X\n", \
751 E1000_##R, value, (test[pat] & W & M)); \
1da177e4
LT		 752 *data = (adapter->hw.mac_type < e1000_82543) ? \
753 E1000_82542_##R : E1000_##R; \
754 return 1; \
755 } \
756 } \
757}
758
759#define REG_SET_AND_CHECK(R, M, W) \
760{ \
761 uint32_t value; \
762 E1000_WRITE_REG(&adapter->hw, R, W & M); \
763 value = E1000_READ_REG(&adapter->hw, R); \
96838a40 764 if ((W & M) != (value & M)) { \
b01f6691
MC		 765 DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
766 "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
1da177e4
LT		 767 *data = (adapter->hw.mac_type < e1000_82543) ? \
768 E1000_82542_##R : E1000_##R; \
769 return 1; \
770 } \
771}
772
773static int
774e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
775{
b01f6691
MC		 776 uint32_t value, before, after;
777 uint32_t i, toggle;
1da177e4
LT		 778
779 /* The status register is Read Only, so a write should fail.
780 * Some bits that get toggled are ignored.
781 */
90fb5135 782 switch (adapter->hw.mac_type) {
868d5309
MC		 783 /* there are several bits on newer hardware that are r/w */
784 case e1000_82571:
785 case e1000_82572:
6418ecc6 786 case e1000_80003es2lan:
868d5309
MC		 787 toggle = 0x7FFFF3FF;
788 break;
b01f6691 789 case e1000_82573:
cd94dd0b 790 case e1000_ich8lan:
b01f6691
MC		 791 toggle = 0x7FFFF033;
792 break;
793 default:
794 toggle = 0xFFFFF833;
795 break;
796 }
797
798 before = E1000_READ_REG(&adapter->hw, STATUS);
799 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
800 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
801 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
96838a40 802 if (value != after) {
b01f6691
MC		 803 DPRINTK(DRV, ERR, "failed STATUS register test got: "
804 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT		 805 *data = 1;
806 return 1;
807 }
b01f6691
MC		 808 /* restore previous status */
809 E1000_WRITE_REG(&adapter->hw, STATUS, before);
90fb5135 810
cd94dd0b
AK		 811 if (adapter->hw.mac_type != e1000_ich8lan) {
812 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
813 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
814 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
815 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
816 }
90fb5135 817
1da177e4
LT		 818 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
819 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
820 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
821 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
822 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
823 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
824 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
825 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
826 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
827 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
828
829 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
90fb5135 830
cd94dd0b 831 before = (adapter->hw.mac_type == e1000_ich8lan ?
90fb5135 832 0x06C3B33E : 0x06DFB3FE);
cd94dd0b 833 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
1da177e4
LT		 834 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
835
96838a40 836 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4 837
cd94dd0b 838 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
1da177e4 839 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
cd94dd0b
AK		 840 if (adapter->hw.mac_type != e1000_ich8lan)
841 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
1da177e4
LT		 842 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
843 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
cd94dd0b 844 value = (adapter->hw.mac_type == e1000_ich8lan ?
90fb5135 845 E1000_RAR_ENTRIES_ICH8LAN : E1000_RAR_ENTRIES);
cd94dd0b 846 for (i = 0; i < value; i++) {
1da177e4 847 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
90fb5135 848 0xFFFFFFFF);
1da177e4
LT		 849 }
850
851 } else {
852
853 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
854 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
855 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
856 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
857
858 }
859
cd94dd0b
AK		 860 value = (adapter->hw.mac_type == e1000_ich8lan ?
861 E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE);
862 for (i = 0; i < value; i++)
1da177e4
LT		 863 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
864
865 *data = 0;
866 return 0;
867}
868
869static int
870e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
871{
872 uint16_t temp;
873 uint16_t checksum = 0;
874 uint16_t i;
875
876 *data = 0;
877 /* Read and add up the contents of the EEPROM */
96838a40
JB		 878 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
879 if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
1da177e4
LT		 880 *data = 1;
881 break;
882 }
883 checksum += temp;
884 }
885
886 /* If Checksum is not Correct return error else test passed */
96838a40 887 if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
1da177e4
LT		 888 *data = 2;
889
890 return *data;
891}
892
893static irqreturn_t
90fb5135 894e1000_test_intr(int irq, void *data)
1da177e4
LT		 895{
896 struct net_device *netdev = (struct net_device *) data;
60490fe0 897 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 898
899 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
900
901 return IRQ_HANDLED;
902}
903
904static int
905e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
906{
907 struct net_device *netdev = adapter->netdev;
76c224bc
AK		 908 uint32_t mask, i=0, shared_int = TRUE;
909 uint32_t irq = adapter->pdev->irq;
1da177e4
LT		 910
911 *data = 0;
912
8fc897b0 913 /* NOTE: we don't test MSI interrupts here, yet */
1da177e4 914 /* Hook up test interrupt handler just for this test */
90fb5135
AK		 915 if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
916 netdev))
8fc897b0
AK		 917 shared_int = FALSE;
918 else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
90fb5135 919 netdev->name, netdev)) {
1da177e4
LT		 920 *data = 1;
921 return -1;
922 }
8fc897b0 923 DPRINTK(HW, INFO, "testing %s interrupt\n",
b9b6e78b 924 (shared_int ? "shared" : "unshared"));
1da177e4
LT		 925
926 /* Disable all the interrupts */
927 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
f8ec4733 928 msleep(10);
1da177e4
LT		 929
930 /* Test each interrupt */
96838a40 931 for (; i < 10; i++) {
1da177e4 932
cd94dd0b
AK		 933 if (adapter->hw.mac_type == e1000_ich8lan && i == 8)
934 continue;
90fb5135 935
1da177e4
LT		 936 /* Interrupt to test */
937 mask = 1 << i;
938
76c224bc
AK		 939 if (!shared_int) {
940 /* Disable the interrupt to be reported in
941 * the cause register and then force the same
942 * interrupt and see if one gets posted. If
943 * an interrupt was posted to the bus, the
944 * test failed.
945 */
946 adapter->test_icr = 0;
947 E1000_WRITE_REG(&adapter->hw, IMC, mask);
948 E1000_WRITE_REG(&adapter->hw, ICS, mask);
f8ec4733 949 msleep(10);
76c224bc
AK		 950
951 if (adapter->test_icr & mask) {
952 *data = 3;
953 break;
954 }
1da177e4
LT		 955 }
956
957 /* Enable the interrupt to be reported in
958 * the cause register and then force the same
959 * interrupt and see if one gets posted. If
960 * an interrupt was not posted to the bus, the
961 * test failed.
962 */
963 adapter->test_icr = 0;
964 E1000_WRITE_REG(&adapter->hw, IMS, mask);
965 E1000_WRITE_REG(&adapter->hw, ICS, mask);
f8ec4733 966 msleep(10);
1da177e4 967
96838a40 968 if (!(adapter->test_icr & mask)) {
1da177e4
LT		 969 *data = 4;
970 break;
971 }
972
76c224bc 973 if (!shared_int) {
1da177e4
LT		 974 /* Disable the other interrupts to be reported in
975 * the cause register and then force the other
976 * interrupts and see if any get posted. If
977 * an interrupt was posted to the bus, the
978 * test failed.
979 */
980 adapter->test_icr = 0;
2648345f
MC		 981 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
982 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
f8ec4733 983 msleep(10);
1da177e4 984
96838a40 985 if (adapter->test_icr) {
1da177e4
LT		 986 *data = 5;
987 break;
988 }
989 }
990 }
991
992 /* Disable all the interrupts */
993 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
f8ec4733 994 msleep(10);
1da177e4
LT		 995
996 /* Unhook test interrupt handler */
997 free_irq(irq, netdev);
998
999 return *data;
1000}
1001
1002static void
1003e1000_free_desc_rings(struct e1000_adapter *adapter)
1004{
581d708e
MC		 1005 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1006 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT		 1007 struct pci_dev *pdev = adapter->pdev;
1008 int i;
1009
96838a40
JB		 1010 if (txdr->desc && txdr->buffer_info) {
1011 for (i = 0; i < txdr->count; i++) {
1012 if (txdr->buffer_info[i].dma)
1da177e4
LT		 1013 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
1014 txdr->buffer_info[i].length,
1015 PCI_DMA_TODEVICE);
96838a40 1016 if (txdr->buffer_info[i].skb)
1da177e4
LT		 1017 dev_kfree_skb(txdr->buffer_info[i].skb);
1018 }
1019 }
1020
96838a40
JB		 1021 if (rxdr->desc && rxdr->buffer_info) {
1022 for (i = 0; i < rxdr->count; i++) {
1023 if (rxdr->buffer_info[i].dma)
1da177e4
LT		 1024 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
1025 rxdr->buffer_info[i].length,
1026 PCI_DMA_FROMDEVICE);
96838a40 1027 if (rxdr->buffer_info[i].skb)
1da177e4
LT		 1028 dev_kfree_skb(rxdr->buffer_info[i].skb);
1029 }
1030 }
1031
f5645110 1032 if (txdr->desc) {
1da177e4 1033 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
6b27adb6
JL		 1034 txdr->desc = NULL;
1035 }
f5645110 1036 if (rxdr->desc) {
1da177e4 1037 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
6b27adb6
JL		 1038 rxdr->desc = NULL;
1039 }
1da177e4 1040
b4558ea9 1041 kfree(txdr->buffer_info);
6b27adb6 1042 txdr->buffer_info = NULL;
b4558ea9 1043 kfree(rxdr->buffer_info);
6b27adb6 1044 rxdr->buffer_info = NULL;
f5645110 1045
1da177e4
LT		 1046 return;
1047}
1048
1049static int
1050e1000_setup_desc_rings(struct e1000_adapter *adapter)
1051{
581d708e
MC		 1052 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1053 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT		 1054 struct pci_dev *pdev = adapter->pdev;
1055 uint32_t rctl;
1056 int size, i, ret_val;
1057
1058 /* Setup Tx descriptor ring and Tx buffers */
1059
96838a40
JB		 1060 if (!txdr->count)
1061 txdr->count = E1000_DEFAULT_TXD;
1da177e4
LT		 1062
1063 size = txdr->count * sizeof(struct e1000_buffer);
96838a40 1064 if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1da177e4
LT		 1065 ret_val = 1;
1066 goto err_nomem;
1067 }
1068 memset(txdr->buffer_info, 0, size);
1069
1070 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1071 E1000_ROUNDUP(txdr->size, 4096);
96838a40 1072 if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
1da177e4
LT		 1073 ret_val = 2;
1074 goto err_nomem;
1075 }
1076 memset(txdr->desc, 0, txdr->size);
1077 txdr->next_to_use = txdr->next_to_clean = 0;
1078
1079 E1000_WRITE_REG(&adapter->hw, TDBAL,
1080 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
1081 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1082 E1000_WRITE_REG(&adapter->hw, TDLEN,
1083 txdr->count * sizeof(struct e1000_tx_desc));
1084 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1085 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1086 E1000_WRITE_REG(&adapter->hw, TCTL,
1087 E1000_TCTL_PSP | E1000_TCTL_EN |
1088 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1089 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1090
96838a40 1091 for (i = 0; i < txdr->count; i++) {
1da177e4
LT		 1092 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1093 struct sk_buff *skb;
1094 unsigned int size = 1024;
1095
96838a40 1096 if (!(skb = alloc_skb(size, GFP_KERNEL))) {
1da177e4
LT		 1097 ret_val = 3;
1098 goto err_nomem;
1099 }
1100 skb_put(skb, size);
1101 txdr->buffer_info[i].skb = skb;
1102 txdr->buffer_info[i].length = skb->len;
1103 txdr->buffer_info[i].dma =
1104 pci_map_single(pdev, skb->data, skb->len,
1105 PCI_DMA_TODEVICE);
1106 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1107 tx_desc->lower.data = cpu_to_le32(skb->len);
1108 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1109 E1000_TXD_CMD_IFCS |
1110 E1000_TXD_CMD_RPS);
1111 tx_desc->upper.data = 0;
1112 }
1113
1114 /* Setup Rx descriptor ring and Rx buffers */
1115
96838a40
JB		 1116 if (!rxdr->count)
1117 rxdr->count = E1000_DEFAULT_RXD;
1da177e4
LT		 1118
1119 size = rxdr->count * sizeof(struct e1000_buffer);
96838a40 1120 if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1da177e4
LT		 1121 ret_val = 4;
1122 goto err_nomem;
1123 }
1124 memset(rxdr->buffer_info, 0, size);
1125
1126 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
96838a40 1127 if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1da177e4
LT		 1128 ret_val = 5;
1129 goto err_nomem;
1130 }
1131 memset(rxdr->desc, 0, rxdr->size);
1132 rxdr->next_to_use = rxdr->next_to_clean = 0;
1133
1134 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1135 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1136 E1000_WRITE_REG(&adapter->hw, RDBAL,
1137 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1138 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1139 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1140 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1141 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1142 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1143 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1144 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1145 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1146
96838a40 1147 for (i = 0; i < rxdr->count; i++) {
1da177e4
LT		 1148 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1149 struct sk_buff *skb;
1150
96838a40 1151 if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1da177e4
LT		 1152 GFP_KERNEL))) {
1153 ret_val = 6;
1154 goto err_nomem;
1155 }
1156 skb_reserve(skb, NET_IP_ALIGN);
1157 rxdr->buffer_info[i].skb = skb;
1158 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1159 rxdr->buffer_info[i].dma =
1160 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1161 PCI_DMA_FROMDEVICE);
1162 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1163 memset(skb->data, 0x00, skb->len);
1164 }
1165
1166 return 0;
1167
1168err_nomem:
1169 e1000_free_desc_rings(adapter);
1170 return ret_val;
1171}
1172
1173static void
1174e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1175{
1176 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1177 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1178 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1179 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1180 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1181}
1182
1183static void
1184e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1185{
1186 uint16_t phy_reg;
1187
1188 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1189 * Extended PHY Specific Control Register to 25MHz clock. This
1190 * value defaults back to a 2.5MHz clock when the PHY is reset.
1191 */
1192 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1193 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1194 e1000_write_phy_reg(&adapter->hw,
1195 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1196
1197 /* In addition, because of the s/w reset above, we need to enable
1198 * CRS on TX. This must be set for both full and half duplex
1199 * operation.
1200 */
1201 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1202 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1203 e1000_write_phy_reg(&adapter->hw,
1204 M88E1000_PHY_SPEC_CTRL, phy_reg);
1205}
1206
1207static int
1208e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1209{
1210 uint32_t ctrl_reg;
1211 uint16_t phy_reg;
1212
1213 /* Setup the Device Control Register for PHY loopback test. */
1214
1215 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1216 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1217 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1218 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1219 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1220 E1000_CTRL_FD); /* Force Duplex to FULL */
1221
1222 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1223
1224 /* Read the PHY Specific Control Register (0x10) */
1225 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1226
1227 /* Clear Auto-Crossover bits in PHY Specific Control Register
1228 * (bits 6:5).
1229 */
1230 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1231 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1232
1233 /* Perform software reset on the PHY */
1234 e1000_phy_reset(&adapter->hw);
1235
1236 /* Have to setup TX_CLK and TX_CRS after software reset */
1237 e1000_phy_reset_clk_and_crs(adapter);
1238
1239 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1240
1241 /* Wait for reset to complete. */
1242 udelay(500);
1243
1244 /* Have to setup TX_CLK and TX_CRS after software reset */
1245 e1000_phy_reset_clk_and_crs(adapter);
1246
1247 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1248 e1000_phy_disable_receiver(adapter);
1249
1250 /* Set the loopback bit in the PHY control register. */
1251 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1252 phy_reg |= MII_CR_LOOPBACK;
1253 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1254
1255 /* Setup TX_CLK and TX_CRS one more time. */
1256 e1000_phy_reset_clk_and_crs(adapter);
1257
1258 /* Check Phy Configuration */
1259 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
96838a40 1260 if (phy_reg != 0x4100)
1da177e4
LT		 1261 return 9;
1262
1263 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
96838a40 1264 if (phy_reg != 0x0070)
1da177e4
LT		 1265 return 10;
1266
1267 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
96838a40 1268 if (phy_reg != 0x001A)
1da177e4
LT		 1269 return 11;
1270
1271 return 0;
1272}
1273
1274static int
1275e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1276{
1277 uint32_t ctrl_reg = 0;
1278 uint32_t stat_reg = 0;
1279
1280 adapter->hw.autoneg = FALSE;
1281
96838a40 1282 if (adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT		 1283 /* Auto-MDI/MDIX Off */
1284 e1000_write_phy_reg(&adapter->hw,
1285 M88E1000_PHY_SPEC_CTRL, 0x0808);
1286 /* reset to update Auto-MDI/MDIX */
1287 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1288 /* autoneg off */
1289 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
8fc897b0 1290 } else if (adapter->hw.phy_type == e1000_phy_gg82563)
87041639
JK		 1291 e1000_write_phy_reg(&adapter->hw,
1292 GG82563_PHY_KMRN_MODE_CTRL,
acfbc9fd 1293 0x1CC);
1da177e4 1294
1da177e4 1295 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
cd94dd0b
AK		 1296
1297 if (adapter->hw.phy_type == e1000_phy_ife) {
1298 /* force 100, set loopback */
1299 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x6100);
1300
1301 /* Now set up the MAC to the same speed/duplex as the PHY. */
1302 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1303 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1304 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1305 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1306 E1000_CTRL_FD); /* Force Duplex to FULL */
1307 } else {
1308 /* force 1000, set loopback */
1309 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1310
1311 /* Now set up the MAC to the same speed/duplex as the PHY. */
1312 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1313 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1314 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1315 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1316 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1317 E1000_CTRL_FD); /* Force Duplex to FULL */
1318 }
1da177e4 1319
96838a40 1320 if (adapter->hw.media_type == e1000_media_type_copper &&
8fc897b0 1321 adapter->hw.phy_type == e1000_phy_m88)
1da177e4 1322 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
8fc897b0 1323 else {
1da177e4
LT		 1324 /* Set the ILOS bit on the fiber Nic is half
1325 * duplex link is detected. */
1326 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 1327 if ((stat_reg & E1000_STATUS_FD) == 0)
1da177e4
LT		 1328 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1329 }
1330
1331 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1332
1333 /* Disable the receiver on the PHY so when a cable is plugged in, the
1334 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1335 */
96838a40 1336 if (adapter->hw.phy_type == e1000_phy_m88)
1da177e4
LT		 1337 e1000_phy_disable_receiver(adapter);
1338
1339 udelay(500);
1340
1341 return 0;
1342}
1343
1344static int
1345e1000_set_phy_loopback(struct e1000_adapter *adapter)
1346{
1347 uint16_t phy_reg = 0;
1348 uint16_t count = 0;
1349
1350 switch (adapter->hw.mac_type) {
1351 case e1000_82543:
96838a40 1352 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 1353 /* Attempt to setup Loopback mode on Non-integrated PHY.
1354 * Some PHY registers get corrupted at random, so
1355 * attempt this 10 times.
1356 */
96838a40 1357 while (e1000_nonintegrated_phy_loopback(adapter) &&
1da177e4 1358 count++ < 10);
96838a40 1359 if (count < 11)
1da177e4
LT		 1360 return 0;
1361 }
1362 break;
1363
1364 case e1000_82544:
1365 case e1000_82540:
1366 case e1000_82545:
1367 case e1000_82545_rev_3:
1368 case e1000_82546:
1369 case e1000_82546_rev_3:
1370 case e1000_82541:
1371 case e1000_82541_rev_2:
1372 case e1000_82547:
1373 case e1000_82547_rev_2:
868d5309
MC		 1374 case e1000_82571:
1375 case e1000_82572:
4564327b 1376 case e1000_82573:
6418ecc6 1377 case e1000_80003es2lan:
cd94dd0b 1378 case e1000_ich8lan:
1da177e4
LT		 1379 return e1000_integrated_phy_loopback(adapter);
1380 break;
1381
1382 default:
1383 /* Default PHY loopback work is to read the MII
1384 * control register and assert bit 14 (loopback mode).
1385 */
1386 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1387 phy_reg |= MII_CR_LOOPBACK;
1388 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1389 return 0;
1390 break;
1391 }
1392
1393 return 8;
1394}
1395
1396static int
1397e1000_setup_loopback_test(struct e1000_adapter *adapter)
1398{
49273163 1399 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1400 uint32_t rctl;
1401
49273163
JK		 1402 if (hw->media_type == e1000_media_type_fiber ||
1403 hw->media_type == e1000_media_type_internal_serdes) {
1404 switch (hw->mac_type) {
1405 case e1000_82545:
1406 case e1000_82546:
1407 case e1000_82545_rev_3:
1408 case e1000_82546_rev_3:
1da177e4 1409 return e1000_set_phy_loopback(adapter);
49273163
JK		 1410 break;
1411 case e1000_82571:
1412 case e1000_82572:
1413#define E1000_SERDES_LB_ON 0x410
1414 e1000_set_phy_loopback(adapter);
1415 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
f8ec4733 1416 msleep(10);
49273163
JK		 1417 return 0;
1418 break;
1419 default:
1420 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1421 rctl |= E1000_RCTL_LBM_TCVR;
49273163 1422 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1423 return 0;
1424 }
49273163 1425 } else if (hw->media_type == e1000_media_type_copper)
1da177e4
LT		 1426 return e1000_set_phy_loopback(adapter);
1427
1428 return 7;
1429}
1430
1431static void
1432e1000_loopback_cleanup(struct e1000_adapter *adapter)
1433{
49273163 1434 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1435 uint32_t rctl;
1436 uint16_t phy_reg;
1437
49273163 1438 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1439 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
49273163 1440 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4 1441
49273163
JK		 1442 switch (hw->mac_type) {
1443 case e1000_82571:
1444 case e1000_82572:
1445 if (hw->media_type == e1000_media_type_fiber ||
1446 hw->media_type == e1000_media_type_internal_serdes) {
1447#define E1000_SERDES_LB_OFF 0x400
1448 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
f8ec4733 1449 msleep(10);
49273163
JK		 1450 break;
1451 }
1452 /* Fall Through */
1453 case e1000_82545:
1454 case e1000_82546:
1455 case e1000_82545_rev_3:
1456 case e1000_82546_rev_3:
1457 default:
1458 hw->autoneg = TRUE;
8fc897b0 1459 if (hw->phy_type == e1000_phy_gg82563)
87041639
JK		 1460 e1000_write_phy_reg(hw,
1461 GG82563_PHY_KMRN_MODE_CTRL,
1462 0x180);
49273163
JK		 1463 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1464 if (phy_reg & MII_CR_LOOPBACK) {
1da177e4 1465 phy_reg &= ~MII_CR_LOOPBACK;
49273163
JK		 1466 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1467 e1000_phy_reset(hw);
1da177e4 1468 }
49273163 1469 break;
1da177e4
LT		 1470 }
1471}
1472
1473static void
1474e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1475{
1476 memset(skb->data, 0xFF, frame_size);
ce7393b9 1477 frame_size &= ~1;
1da177e4
LT		 1478 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1479 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1480 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1481}
1482
1483static int
1484e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1485{
ce7393b9 1486 frame_size &= ~1;
96838a40
JB		 1487 if (*(skb->data + 3) == 0xFF) {
1488 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1da177e4
LT		 1489 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1490 return 0;
1491 }
1492 }
1493 return 13;
1494}
1495
1496static int
1497e1000_run_loopback_test(struct e1000_adapter *adapter)
1498{
581d708e
MC		 1499 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1500 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1501 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC		 1502 int i, j, k, l, lc, good_cnt, ret_val=0;
1503 unsigned long time;
1da177e4
LT		 1504
1505 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1506
96838a40 1507 /* Calculate the loop count based on the largest descriptor ring
e4eff729
MC		 1508 * The idea is to wrap the largest ring a number of times using 64
1509 * send/receive pairs during each loop
1510 */
1da177e4 1511
96838a40 1512 if (rxdr->count <= txdr->count)
e4eff729
MC		 1513 lc = ((txdr->count / 64) * 2) + 1;
1514 else
1515 lc = ((rxdr->count / 64) * 2) + 1;
1516
1517 k = l = 0;
96838a40
JB		 1518 for (j = 0; j <= lc; j++) { /* loop count loop */
1519 for (i = 0; i < 64; i++) { /* send the packets */
1520 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
e4eff729 1521 1024);
96838a40 1522 pci_dma_sync_single_for_device(pdev,
e4eff729
MC		 1523 txdr->buffer_info[k].dma,
1524 txdr->buffer_info[k].length,
1525 PCI_DMA_TODEVICE);
96838a40 1526 if (unlikely(++k == txdr->count)) k = 0;
e4eff729
MC		 1527 }
1528 E1000_WRITE_REG(&adapter->hw, TDT, k);
f8ec4733 1529 msleep(200);
e4eff729
MC		 1530 time = jiffies; /* set the start time for the receive */
1531 good_cnt = 0;
1532 do { /* receive the sent packets */
96838a40 1533 pci_dma_sync_single_for_cpu(pdev,
e4eff729
MC		 1534 rxdr->buffer_info[l].dma,
1535 rxdr->buffer_info[l].length,
1536 PCI_DMA_FROMDEVICE);
96838a40 1537
e4eff729
MC		 1538 ret_val = e1000_check_lbtest_frame(
1539 rxdr->buffer_info[l].skb,
1540 1024);
96838a40 1541 if (!ret_val)
e4eff729 1542 good_cnt++;
96838a40
JB		 1543 if (unlikely(++l == rxdr->count)) l = 0;
1544 /* time + 20 msecs (200 msecs on 2.4) is more than
1545 * enough time to complete the receives, if it's
e4eff729
MC		 1546 * exceeded, break and error off
1547 */
1548 } while (good_cnt < 64 && jiffies < (time + 20));
96838a40 1549 if (good_cnt != 64) {
e4eff729 1550 ret_val = 13; /* ret_val is the same as mis-compare */
96838a40 1551 break;
e4eff729 1552 }
96838a40 1553 if (jiffies >= (time + 2)) {
e4eff729
MC		 1554 ret_val = 14; /* error code for time out error */
1555 break;
1556 }
1557 } /* end loop count loop */
1da177e4
LT		 1558 return ret_val;
1559}
1560
1561static int
1562e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1563{
57128197
JK		 1564 /* PHY loopback cannot be performed if SoL/IDER
1565 * sessions are active */
1566 if (e1000_check_phy_reset_block(&adapter->hw)) {
1567 DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
1568 "when SoL/IDER is active.\n");
1569 *data = 0;
1570 goto out;
1571 }
1572
1573 if ((*data = e1000_setup_desc_rings(adapter)))
1574 goto out;
1575 if ((*data = e1000_setup_loopback_test(adapter)))
1576 goto err_loopback;
1da177e4
LT		 1577 *data = e1000_run_loopback_test(adapter);
1578 e1000_loopback_cleanup(adapter);
57128197 1579
1da177e4 1580err_loopback:
57128197
JK		 1581 e1000_free_desc_rings(adapter);
1582out:
1da177e4
LT		 1583 return *data;
1584}
1585
1586static int
1587e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1588{
1589 *data = 0;
1da177e4
LT		 1590 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1591 int i = 0;
1592 adapter->hw.serdes_link_down = TRUE;
1593
2648345f
MC		 1594 /* On some blade server designs, link establishment
1595 * could take as long as 2-3 minutes */
1da177e4
LT		 1596 do {
1597 e1000_check_for_link(&adapter->hw);
1598 if (adapter->hw.serdes_link_down == FALSE)
1599 return *data;
f8ec4733 1600 msleep(20);
1da177e4
LT		 1601 } while (i++ < 3750);
1602
2648345f 1603 *data = 1;
1da177e4
LT		 1604 } else {
1605 e1000_check_for_link(&adapter->hw);
96838a40 1606 if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
f8ec4733 1607 msleep(4000);
1da177e4 1608
96838a40 1609 if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1da177e4
LT		 1610 *data = 1;
1611 }
1612 }
1613 return *data;
1614}
1615
96838a40 1616static int
1da177e4
LT		 1617e1000_diag_test_count(struct net_device *netdev)
1618{
1619 return E1000_TEST_LEN;
1620}
1621
d658266e
JB		 1622extern void e1000_power_up_phy(struct e1000_adapter *);
1623
1da177e4
LT		 1624static void
1625e1000_diag_test(struct net_device *netdev,
1626 struct ethtool_test *eth_test, uint64_t *data)
1627{
60490fe0 1628 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1629 boolean_t if_running = netif_running(netdev);
1630
1314bbf3 1631 set_bit(__E1000_TESTING, &adapter->flags);
96838a40 1632 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1da177e4
LT		 1633 /* Offline tests */
1634
1635 /* save speed, duplex, autoneg settings */
1636 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1637 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1638 uint8_t autoneg = adapter->hw.autoneg;
1639
d658266e
JB		 1640 DPRINTK(HW, INFO, "offline testing starting\n");
1641
1da177e4
LT		 1642 /* Link test performed before hardware reset so autoneg doesn't
1643 * interfere with test result */
96838a40 1644 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT		 1645 eth_test->flags |= ETH_TEST_FL_FAILED;
1646
96838a40 1647 if (if_running)
2db10a08
AK		 1648 /* indicate we're in test mode */
1649 dev_close(netdev);
1da177e4
LT		 1650 else
1651 e1000_reset(adapter);
1652
96838a40 1653 if (e1000_reg_test(adapter, &data[0]))
1da177e4
LT		 1654 eth_test->flags |= ETH_TEST_FL_FAILED;
1655
1656 e1000_reset(adapter);
96838a40 1657 if (e1000_eeprom_test(adapter, &data[1]))
1da177e4
LT		 1658 eth_test->flags |= ETH_TEST_FL_FAILED;
1659
1660 e1000_reset(adapter);
96838a40 1661 if (e1000_intr_test(adapter, &data[2]))
1da177e4
LT		 1662 eth_test->flags |= ETH_TEST_FL_FAILED;
1663
1664 e1000_reset(adapter);
d658266e
JB		 1665 /* make sure the phy is powered up */
1666 e1000_power_up_phy(adapter);
96838a40 1667 if (e1000_loopback_test(adapter, &data[3]))
1da177e4
LT		 1668 eth_test->flags |= ETH_TEST_FL_FAILED;
1669
1670 /* restore speed, duplex, autoneg settings */
1671 adapter->hw.autoneg_advertised = autoneg_advertised;
1672 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1673 adapter->hw.autoneg = autoneg;
1674
1675 e1000_reset(adapter);
1314bbf3 1676 clear_bit(__E1000_TESTING, &adapter->flags);
96838a40 1677 if (if_running)
2db10a08 1678 dev_open(netdev);
1da177e4 1679 } else {
d658266e 1680 DPRINTK(HW, INFO, "online testing starting\n");
1da177e4 1681 /* Online tests */
96838a40 1682 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT		 1683 eth_test->flags |= ETH_TEST_FL_FAILED;
1684
90fb5135 1685 /* Online tests aren't run; pass by default */
1da177e4
LT		 1686 data[0] = 0;
1687 data[1] = 0;
1688 data[2] = 0;
1689 data[3] = 0;
2db10a08 1690
1314bbf3 1691 clear_bit(__E1000_TESTING, &adapter->flags);
1da177e4 1692 }
352c9f85 1693 msleep_interruptible(4 * 1000);
1da177e4
LT		 1694}
1695
120cd576 1696static int e1000_wol_exclusion(struct e1000_adapter *adapter, struct ethtool_wolinfo *wol)
1da177e4 1697{
1da177e4 1698 struct e1000_hw *hw = &adapter->hw;
120cd576 1699 int retval = 1; /* fail by default */
1da177e4 1700
120cd576 1701 switch (hw->device_id) {
dc1f71f6 1702 case E1000_DEV_ID_82542:
1da177e4
LT		 1703 case E1000_DEV_ID_82543GC_FIBER:
1704 case E1000_DEV_ID_82543GC_COPPER:
1705 case E1000_DEV_ID_82544EI_FIBER:
1706 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1707 case E1000_DEV_ID_82545EM_FIBER:
1708 case E1000_DEV_ID_82545EM_COPPER:
84916829 1709 case E1000_DEV_ID_82546GB_QUAD_COPPER:
120cd576
JB		 1710 case E1000_DEV_ID_82546GB_PCIE:
1711 /* these don't support WoL at all */
1da177e4 1712 wol->supported = 0;
120cd576 1713 break;
1da177e4
LT		 1714 case E1000_DEV_ID_82546EB_FIBER:
1715 case E1000_DEV_ID_82546GB_FIBER:
b7ee49db 1716 case E1000_DEV_ID_82571EB_FIBER:
120cd576
JB		 1717 case E1000_DEV_ID_82571EB_SERDES:
1718 case E1000_DEV_ID_82571EB_COPPER:
1719 /* Wake events not supported on port B */
96838a40 1720 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1da177e4 1721 wol->supported = 0;
120cd576 1722 break;
1da177e4 1723 }
120cd576
JB		 1724 /* return success for non excluded adapter ports */
1725 retval = 0;
1726 break;
5881cde8 1727 case E1000_DEV_ID_82571EB_QUAD_COPPER:
fc2307d0 1728 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
120cd576
JB		 1729 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1730 /* quad port adapters only support WoL on port A */
1731 if (!adapter->quad_port_a) {
1732 wol->supported = 0;
1733 break;
1734 }
1735 /* return success for non excluded adapter ports */
1736 retval = 0;
1737 break;
1da177e4 1738 default:
120cd576
JB		 1739 /* dual port cards only support WoL on port A from now on
1740 * unless it was enabled in the eeprom for port B
1741 * so exclude FUNC_1 ports from having WoL enabled */
1742 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1 &&
1743 !adapter->eeprom_wol) {
1744 wol->supported = 0;
1745 break;
1746 }
84916829 1747
120cd576
JB		 1748 retval = 0;
1749 }
1750
1751 return retval;
1752}
1753
1754static void
1755e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1756{
1757 struct e1000_adapter *adapter = netdev_priv(netdev);
1758
1759 wol->supported = WAKE_UCAST | WAKE_MCAST |
1760 WAKE_BCAST | WAKE_MAGIC;
1761 wol->wolopts = 0;
1762
1763 /* this function will set ->supported = 0 and return 1 if wol is not
1764 * supported by this hardware */
1765 if (e1000_wol_exclusion(adapter, wol))
1da177e4 1766 return;
120cd576
JB		 1767
1768 /* apply any specific unsupported masks here */
1769 switch (adapter->hw.device_id) {
1770 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1771 /* KSP3 does not suppport UCAST wake-ups */
1772 wol->supported &= ~WAKE_UCAST;
1773
1774 if (adapter->wol & E1000_WUFC_EX)
1775 DPRINTK(DRV, ERR, "Interface does not support "
1776 "directed (unicast) frame wake-up packets\n");
1777 break;
1778 default:
1779 break;
1da177e4 1780 }
120cd576
JB		 1781
1782 if (adapter->wol & E1000_WUFC_EX)
1783 wol->wolopts |= WAKE_UCAST;
1784 if (adapter->wol & E1000_WUFC_MC)
1785 wol->wolopts |= WAKE_MCAST;
1786 if (adapter->wol & E1000_WUFC_BC)
1787 wol->wolopts |= WAKE_BCAST;
1788 if (adapter->wol & E1000_WUFC_MAG)
1789 wol->wolopts |= WAKE_MAGIC;
1790
1791 return;
1da177e4
LT		 1792}
1793
1794static int
1795e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1796{
60490fe0 1797 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1798 struct e1000_hw *hw = &adapter->hw;
1799
120cd576
JB		 1800 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1801 return -EOPNOTSUPP;
1802
1803 if (e1000_wol_exclusion(adapter, wol))
1da177e4
LT		 1804 return wol->wolopts ? -EOPNOTSUPP : 0;
1805
120cd576 1806 switch (hw->device_id) {
84916829 1807 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
84916829
JK		 1808 if (wol->wolopts & WAKE_UCAST) {
1809 DPRINTK(DRV, ERR, "Interface does not support "
1810 "directed (unicast) frame wake-up packets\n");
1811 return -EOPNOTSUPP;
1812 }
120cd576 1813 break;
1da177e4 1814 default:
120cd576 1815 break;
1da177e4
LT		 1816 }
1817
120cd576
JB		 1818 /* these settings will always override what we currently have */
1819 adapter->wol = 0;
1820
1821 if (wol->wolopts & WAKE_UCAST)
1822 adapter->wol |= E1000_WUFC_EX;
1823 if (wol->wolopts & WAKE_MCAST)
1824 adapter->wol |= E1000_WUFC_MC;
1825 if (wol->wolopts & WAKE_BCAST)
1826 adapter->wol |= E1000_WUFC_BC;
1827 if (wol->wolopts & WAKE_MAGIC)
1828 adapter->wol |= E1000_WUFC_MAG;
1829
1da177e4
LT		 1830 return 0;
1831}
1832
1833/* toggle LED 4 times per second = 2 "blinks" per second */
1834#define E1000_ID_INTERVAL (HZ/4)
1835
1836/* bit defines for adapter->led_status */
1837#define E1000_LED_ON 0
1838
1839static void
1840e1000_led_blink_callback(unsigned long data)
1841{
1842 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1843
96838a40 1844 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1da177e4
LT		 1845 e1000_led_off(&adapter->hw);
1846 else
1847 e1000_led_on(&adapter->hw);
1848
1849 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1850}
1851
1852static int
1853e1000_phys_id(struct net_device *netdev, uint32_t data)
1854{
60490fe0 1855 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1856
96838a40 1857 if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
1da177e4
LT		 1858 data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
1859
96838a40
JB		 1860 if (adapter->hw.mac_type < e1000_82571) {
1861 if (!adapter->blink_timer.function) {
d439d4b7
MC		 1862 init_timer(&adapter->blink_timer);
1863 adapter->blink_timer.function = e1000_led_blink_callback;
1864 adapter->blink_timer.data = (unsigned long) adapter;
1865 }
1866 e1000_setup_led(&adapter->hw);
1867 mod_timer(&adapter->blink_timer, jiffies);
1868 msleep_interruptible(data * 1000);
1869 del_timer_sync(&adapter->blink_timer);
cd94dd0b
AK		 1870 } else if (adapter->hw.phy_type == e1000_phy_ife) {
1871 if (!adapter->blink_timer.function) {
1872 init_timer(&adapter->blink_timer);
1873 adapter->blink_timer.function = e1000_led_blink_callback;
1874 adapter->blink_timer.data = (unsigned long) adapter;
1875 }
1876 mod_timer(&adapter->blink_timer, jiffies);
d8c2bd3d 1877 msleep_interruptible(data * 1000);
cd94dd0b
AK		 1878 del_timer_sync(&adapter->blink_timer);
1879 e1000_write_phy_reg(&(adapter->hw), IFE_PHY_SPECIAL_CONTROL_LED, 0);
d8c2bd3d 1880 } else {
f1b3a853 1881 e1000_blink_led_start(&adapter->hw);
d439d4b7 1882 msleep_interruptible(data * 1000);
1da177e4
LT		 1883 }
1884
1da177e4
LT		 1885 e1000_led_off(&adapter->hw);
1886 clear_bit(E1000_LED_ON, &adapter->led_status);
1887 e1000_cleanup_led(&adapter->hw);
1888
1889 return 0;
1890}
1891
1892static int
1893e1000_nway_reset(struct net_device *netdev)
1894{
60490fe0 1895 struct e1000_adapter *adapter = netdev_priv(netdev);
2db10a08
AK		 1896 if (netif_running(netdev))
1897 e1000_reinit_locked(adapter);
1da177e4
LT		 1898 return 0;
1899}
1900
96838a40 1901static int
1da177e4
LT		 1902e1000_get_stats_count(struct net_device *netdev)
1903{
1904 return E1000_STATS_LEN;
1905}
1906
96838a40
JB		 1907static void
1908e1000_get_ethtool_stats(struct net_device *netdev,
1da177e4
LT		 1909 struct ethtool_stats *stats, uint64_t *data)
1910{
60490fe0 1911 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1912 int i;
1913
1914 e1000_update_stats(adapter);
7bfa4816
JK		 1915 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1916 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1917 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1da177e4
LT		 1918 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1919 }
7bfa4816 1920/* BUG_ON(i != E1000_STATS_LEN); */
1da177e4
LT		 1921}
1922
96838a40 1923static void
1da177e4
LT		 1924e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1925{
7bfa4816 1926 uint8_t *p = data;
1da177e4
LT		 1927 int i;
1928
96838a40 1929 switch (stringset) {
1da177e4 1930 case ETH_SS_TEST:
96838a40 1931 memcpy(data, *e1000_gstrings_test,
1da177e4
LT		 1932 E1000_TEST_LEN*ETH_GSTRING_LEN);
1933 break;
1934 case ETH_SS_STATS:
7bfa4816
JK		 1935 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1936 memcpy(p, e1000_gstrings_stats[i].stat_string,
1937 ETH_GSTRING_LEN);
1938 p += ETH_GSTRING_LEN;
1939 }
7bfa4816 1940/* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1da177e4
LT		 1941 break;
1942 }
1943}
1944
7282d491 1945static const struct ethtool_ops e1000_ethtool_ops = {
1da177e4
LT		 1946 .get_settings = e1000_get_settings,
1947 .set_settings = e1000_set_settings,
1948 .get_drvinfo = e1000_get_drvinfo,
1949 .get_regs_len = e1000_get_regs_len,
1950 .get_regs = e1000_get_regs,
1951 .get_wol = e1000_get_wol,
1952 .set_wol = e1000_set_wol,
8fc897b0
AK		 1953 .get_msglevel = e1000_get_msglevel,
1954 .set_msglevel = e1000_set_msglevel,
1da177e4
LT		 1955 .nway_reset = e1000_nway_reset,
1956 .get_link = ethtool_op_get_link,
1957 .get_eeprom_len = e1000_get_eeprom_len,
1958 .get_eeprom = e1000_get_eeprom,
1959 .set_eeprom = e1000_set_eeprom,
1960 .get_ringparam = e1000_get_ringparam,
1961 .set_ringparam = e1000_set_ringparam,
8fc897b0
AK		 1962 .get_pauseparam = e1000_get_pauseparam,
1963 .set_pauseparam = e1000_set_pauseparam,
1964 .get_rx_csum = e1000_get_rx_csum,
1965 .set_rx_csum = e1000_set_rx_csum,
1966 .get_tx_csum = e1000_get_tx_csum,
1967 .set_tx_csum = e1000_set_tx_csum,
1968 .get_sg = ethtool_op_get_sg,
1969 .set_sg = ethtool_op_set_sg,
8fc897b0
AK		 1970 .get_tso = ethtool_op_get_tso,
1971 .set_tso = e1000_set_tso,
1da177e4
LT		 1972 .self_test_count = e1000_diag_test_count,
1973 .self_test = e1000_diag_test,
1974 .get_strings = e1000_get_strings,
1975 .phys_id = e1000_phys_id,
1976 .get_stats_count = e1000_get_stats_count,
1977 .get_ethtool_stats = e1000_get_ethtool_stats,
8fc897b0 1978 .get_perm_addr = ethtool_op_get_perm_addr,
1da177e4
LT		 1979};
1980
1981void e1000_set_ethtool_ops(struct net_device *netdev)
1982{
1983 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1984}
Linux kernel - Deliverables
This page took 0.309754 seconds and 5 git commands to generate.