drivers/net: const-ify ethtool_ops declarations
[deliverable/linux.git] / drivers / net / e1000 / e1000_ethtool.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2
3
3d41e30a 4 Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
1da177e4
LT
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
3d41e30a 25 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT
26 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27
28*******************************************************************************/
29
30/* ethtool support for e1000 */
31
32#include "e1000.h"
33
34#include <asm/uaccess.h>
35
1da177e4
LT
36struct e1000_stats {
37 char stat_string[ETH_GSTRING_LEN];
38 int sizeof_stat;
39 int stat_offset;
40};
41
42#define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
43 offsetof(struct e1000_adapter, m)
44static const struct e1000_stats e1000_gstrings_stats[] = {
45 { "rx_packets", E1000_STAT(net_stats.rx_packets) },
46 { "tx_packets", E1000_STAT(net_stats.tx_packets) },
47 { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
48 { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
49 { "rx_errors", E1000_STAT(net_stats.rx_errors) },
50 { "tx_errors", E1000_STAT(net_stats.tx_errors) },
1da177e4
LT
51 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
52 { "multicast", E1000_STAT(net_stats.multicast) },
53 { "collisions", E1000_STAT(net_stats.collisions) },
54 { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
55 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
56 { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
57 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
2648345f 58 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
1da177e4
LT
59 { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
60 { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
61 { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
62 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
63 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
64 { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
65 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
66 { "tx_deferred_ok", E1000_STAT(stats.dc) },
67 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
68 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
6b7660cd 69 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
1da177e4
LT
70 { "rx_long_length_errors", E1000_STAT(stats.roc) },
71 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
72 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
73 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
74 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
75 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
76 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
77 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
78 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
79 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
80 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
e4c811c9
MC
81 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
82 { "rx_header_split", E1000_STAT(rx_hdr_split) },
6b7660cd 83 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
1da177e4 84};
7bfa4816 85
7bfa4816 86#define E1000_QUEUE_STATS_LEN 0
7bfa4816 87#define E1000_GLOBAL_STATS_LEN \
1da177e4 88 sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
7bfa4816 89#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
1da177e4
LT
90static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
91 "Register test (offline)", "Eeprom test (offline)",
92 "Interrupt test (offline)", "Loopback test (offline)",
93 "Link test (on/offline)"
94};
95#define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
96
97static int
98e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
99{
60490fe0 100 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
101 struct e1000_hw *hw = &adapter->hw;
102
96838a40 103 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT
104
105 ecmd->supported = (SUPPORTED_10baseT_Half |
106 SUPPORTED_10baseT_Full |
107 SUPPORTED_100baseT_Half |
108 SUPPORTED_100baseT_Full |
109 SUPPORTED_1000baseT_Full|
110 SUPPORTED_Autoneg |
111 SUPPORTED_TP);
cd94dd0b
AK
112 if (hw->phy_type == e1000_phy_ife)
113 ecmd->supported &= ~SUPPORTED_1000baseT_Full;
1da177e4
LT
114 ecmd->advertising = ADVERTISED_TP;
115
96838a40 116 if (hw->autoneg == 1) {
1da177e4
LT
117 ecmd->advertising |= ADVERTISED_Autoneg;
118
119 /* the e1000 autoneg seems to match ethtool nicely */
120
121 ecmd->advertising |= hw->autoneg_advertised;
122 }
123
124 ecmd->port = PORT_TP;
125 ecmd->phy_address = hw->phy_addr;
126
96838a40 127 if (hw->mac_type == e1000_82543)
1da177e4
LT
128 ecmd->transceiver = XCVR_EXTERNAL;
129 else
130 ecmd->transceiver = XCVR_INTERNAL;
131
132 } else {
133 ecmd->supported = (SUPPORTED_1000baseT_Full |
134 SUPPORTED_FIBRE |
135 SUPPORTED_Autoneg);
136
012609a8
MC
137 ecmd->advertising = (ADVERTISED_1000baseT_Full |
138 ADVERTISED_FIBRE |
139 ADVERTISED_Autoneg);
1da177e4
LT
140
141 ecmd->port = PORT_FIBRE;
142
96838a40 143 if (hw->mac_type >= e1000_82545)
1da177e4
LT
144 ecmd->transceiver = XCVR_INTERNAL;
145 else
146 ecmd->transceiver = XCVR_EXTERNAL;
147 }
148
96838a40 149 if (netif_carrier_ok(adapter->netdev)) {
1da177e4
LT
150
151 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
152 &adapter->link_duplex);
153 ecmd->speed = adapter->link_speed;
154
155 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
156 * and HALF_DUPLEX != DUPLEX_HALF */
157
96838a40 158 if (adapter->link_duplex == FULL_DUPLEX)
1da177e4
LT
159 ecmd->duplex = DUPLEX_FULL;
160 else
161 ecmd->duplex = DUPLEX_HALF;
162 } else {
163 ecmd->speed = -1;
164 ecmd->duplex = -1;
165 }
166
167 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
168 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
169 return 0;
170}
171
172static int
173e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
174{
60490fe0 175 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
176 struct e1000_hw *hw = &adapter->hw;
177
57128197
JK
178 /* When SoL/IDER sessions are active, autoneg/speed/duplex
179 * cannot be changed */
180 if (e1000_check_phy_reset_block(hw)) {
181 DPRINTK(DRV, ERR, "Cannot change link characteristics "
182 "when SoL/IDER is active.\n");
183 return -EINVAL;
184 }
185
1a821ca5
JB
186 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
187 msleep(1);
188
57128197 189 if (ecmd->autoneg == AUTONEG_ENABLE) {
1da177e4 190 hw->autoneg = 1;
96838a40 191 if (hw->media_type == e1000_media_type_fiber)
012609a8
MC
192 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
193 ADVERTISED_FIBRE |
194 ADVERTISED_Autoneg;
96838a40 195 else
012609a8
MC
196 hw->autoneg_advertised = ADVERTISED_10baseT_Half |
197 ADVERTISED_10baseT_Full |
198 ADVERTISED_100baseT_Half |
199 ADVERTISED_100baseT_Full |
200 ADVERTISED_1000baseT_Full|
201 ADVERTISED_Autoneg |
202 ADVERTISED_TP;
203 ecmd->advertising = hw->autoneg_advertised;
1da177e4 204 } else
1a821ca5
JB
205 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
206 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 207 return -EINVAL;
1a821ca5 208 }
1da177e4
LT
209
210 /* reset the link */
211
1a821ca5
JB
212 if (netif_running(adapter->netdev)) {
213 e1000_down(adapter);
214 e1000_up(adapter);
215 } else
1da177e4
LT
216 e1000_reset(adapter);
217
1a821ca5 218 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
219 return 0;
220}
221
222static void
223e1000_get_pauseparam(struct net_device *netdev,
224 struct ethtool_pauseparam *pause)
225{
60490fe0 226 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
227 struct e1000_hw *hw = &adapter->hw;
228
96838a40 229 pause->autoneg =
1da177e4 230 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
96838a40
JB
231
232 if (hw->fc == e1000_fc_rx_pause)
1da177e4 233 pause->rx_pause = 1;
96838a40 234 else if (hw->fc == e1000_fc_tx_pause)
1da177e4 235 pause->tx_pause = 1;
96838a40 236 else if (hw->fc == e1000_fc_full) {
1da177e4
LT
237 pause->rx_pause = 1;
238 pause->tx_pause = 1;
239 }
240}
241
242static int
243e1000_set_pauseparam(struct net_device *netdev,
244 struct ethtool_pauseparam *pause)
245{
60490fe0 246 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 247 struct e1000_hw *hw = &adapter->hw;
1a821ca5 248 int retval = 0;
96838a40 249
1da177e4
LT
250 adapter->fc_autoneg = pause->autoneg;
251
1a821ca5
JB
252 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
253 msleep(1);
254
96838a40 255 if (pause->rx_pause && pause->tx_pause)
1da177e4 256 hw->fc = e1000_fc_full;
96838a40 257 else if (pause->rx_pause && !pause->tx_pause)
1da177e4 258 hw->fc = e1000_fc_rx_pause;
96838a40 259 else if (!pause->rx_pause && pause->tx_pause)
1da177e4 260 hw->fc = e1000_fc_tx_pause;
96838a40 261 else if (!pause->rx_pause && !pause->tx_pause)
1da177e4
LT
262 hw->fc = e1000_fc_none;
263
264 hw->original_fc = hw->fc;
265
96838a40 266 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
1a821ca5
JB
267 if (netif_running(adapter->netdev)) {
268 e1000_down(adapter);
269 e1000_up(adapter);
270 } else
1da177e4 271 e1000_reset(adapter);
96838a40 272 } else
1a821ca5
JB
273 retval = ((hw->media_type == e1000_media_type_fiber) ?
274 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
96838a40 275
1a821ca5
JB
276 clear_bit(__E1000_RESETTING, &adapter->flags);
277 return retval;
1da177e4
LT
278}
279
280static uint32_t
281e1000_get_rx_csum(struct net_device *netdev)
282{
60490fe0 283 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
284 return adapter->rx_csum;
285}
286
287static int
288e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
289{
60490fe0 290 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
291 adapter->rx_csum = data;
292
2db10a08
AK
293 if (netif_running(netdev))
294 e1000_reinit_locked(adapter);
295 else
1da177e4
LT
296 e1000_reset(adapter);
297 return 0;
298}
96838a40 299
1da177e4
LT
300static uint32_t
301e1000_get_tx_csum(struct net_device *netdev)
302{
303 return (netdev->features & NETIF_F_HW_CSUM) != 0;
304}
305
306static int
307e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
308{
60490fe0 309 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 310
96838a40 311 if (adapter->hw.mac_type < e1000_82543) {
1da177e4
LT
312 if (!data)
313 return -EINVAL;
314 return 0;
315 }
316
317 if (data)
318 netdev->features |= NETIF_F_HW_CSUM;
319 else
320 netdev->features &= ~NETIF_F_HW_CSUM;
321
322 return 0;
323}
324
325#ifdef NETIF_F_TSO
326static int
327e1000_set_tso(struct net_device *netdev, uint32_t data)
328{
60490fe0 329 struct e1000_adapter *adapter = netdev_priv(netdev);
96838a40
JB
330 if ((adapter->hw.mac_type < e1000_82544) ||
331 (adapter->hw.mac_type == e1000_82547))
1da177e4
LT
332 return data ? -EINVAL : 0;
333
334 if (data)
335 netdev->features |= NETIF_F_TSO;
336 else
337 netdev->features &= ~NETIF_F_TSO;
7e6c9861
JK
338
339 DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
340 adapter->tso_force = TRUE;
1da177e4 341 return 0;
96838a40 342}
1da177e4
LT
343#endif /* NETIF_F_TSO */
344
345static uint32_t
346e1000_get_msglevel(struct net_device *netdev)
347{
60490fe0 348 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
349 return adapter->msg_enable;
350}
351
352static void
353e1000_set_msglevel(struct net_device *netdev, uint32_t data)
354{
60490fe0 355 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
356 adapter->msg_enable = data;
357}
358
96838a40 359static int
1da177e4
LT
360e1000_get_regs_len(struct net_device *netdev)
361{
362#define E1000_REGS_LEN 32
363 return E1000_REGS_LEN * sizeof(uint32_t);
364}
365
366static void
367e1000_get_regs(struct net_device *netdev,
368 struct ethtool_regs *regs, void *p)
369{
60490fe0 370 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
371 struct e1000_hw *hw = &adapter->hw;
372 uint32_t *regs_buff = p;
373 uint16_t phy_data;
374
375 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
376
377 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
378
379 regs_buff[0] = E1000_READ_REG(hw, CTRL);
380 regs_buff[1] = E1000_READ_REG(hw, STATUS);
381
382 regs_buff[2] = E1000_READ_REG(hw, RCTL);
383 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
384 regs_buff[4] = E1000_READ_REG(hw, RDH);
385 regs_buff[5] = E1000_READ_REG(hw, RDT);
386 regs_buff[6] = E1000_READ_REG(hw, RDTR);
387
388 regs_buff[7] = E1000_READ_REG(hw, TCTL);
389 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
390 regs_buff[9] = E1000_READ_REG(hw, TDH);
391 regs_buff[10] = E1000_READ_REG(hw, TDT);
392 regs_buff[11] = E1000_READ_REG(hw, TIDV);
393
394 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
96838a40 395 if (hw->phy_type == e1000_phy_igp) {
1da177e4
LT
396 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
397 IGP01E1000_PHY_AGC_A);
398 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
399 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
400 regs_buff[13] = (uint32_t)phy_data; /* cable length */
401 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
402 IGP01E1000_PHY_AGC_B);
403 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
404 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
405 regs_buff[14] = (uint32_t)phy_data; /* cable length */
406 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
407 IGP01E1000_PHY_AGC_C);
408 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
409 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
410 regs_buff[15] = (uint32_t)phy_data; /* cable length */
411 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
412 IGP01E1000_PHY_AGC_D);
413 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
414 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
415 regs_buff[16] = (uint32_t)phy_data; /* cable length */
416 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
417 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
418 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
419 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
420 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
421 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
422 IGP01E1000_PHY_PCS_INIT_REG);
423 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
424 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
425 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
426 regs_buff[20] = 0; /* polarity correction enabled (always) */
427 regs_buff[22] = 0; /* phy receive errors (unavailable) */
428 regs_buff[23] = regs_buff[18]; /* mdix mode */
429 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
430 } else {
8fc897b0 431 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
1da177e4
LT
432 regs_buff[13] = (uint32_t)phy_data; /* cable length */
433 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
434 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
435 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
8fc897b0 436 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1da177e4
LT
437 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
438 regs_buff[18] = regs_buff[13]; /* cable polarity */
439 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
440 regs_buff[20] = regs_buff[17]; /* polarity correction */
441 /* phy receive errors */
442 regs_buff[22] = adapter->phy_stats.receive_errors;
443 regs_buff[23] = regs_buff[13]; /* mdix mode */
444 }
445 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
446 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
447 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
448 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
96838a40 449 if (hw->mac_type >= e1000_82540 &&
1da177e4
LT
450 hw->media_type == e1000_media_type_copper) {
451 regs_buff[26] = E1000_READ_REG(hw, MANC);
452 }
453}
454
455static int
456e1000_get_eeprom_len(struct net_device *netdev)
457{
60490fe0 458 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
459 return adapter->hw.eeprom.word_size * 2;
460}
461
462static int
463e1000_get_eeprom(struct net_device *netdev,
464 struct ethtool_eeprom *eeprom, uint8_t *bytes)
465{
60490fe0 466 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
467 struct e1000_hw *hw = &adapter->hw;
468 uint16_t *eeprom_buff;
469 int first_word, last_word;
470 int ret_val = 0;
471 uint16_t i;
472
96838a40 473 if (eeprom->len == 0)
1da177e4
LT
474 return -EINVAL;
475
476 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
477
478 first_word = eeprom->offset >> 1;
479 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
480
481 eeprom_buff = kmalloc(sizeof(uint16_t) *
482 (last_word - first_word + 1), GFP_KERNEL);
96838a40 483 if (!eeprom_buff)
1da177e4
LT
484 return -ENOMEM;
485
96838a40 486 if (hw->eeprom.type == e1000_eeprom_spi)
1da177e4
LT
487 ret_val = e1000_read_eeprom(hw, first_word,
488 last_word - first_word + 1,
489 eeprom_buff);
490 else {
491 for (i = 0; i < last_word - first_word + 1; i++)
96838a40 492 if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
1da177e4
LT
493 &eeprom_buff[i])))
494 break;
495 }
496
497 /* Device's eeprom is always little-endian, word addressable */
498 for (i = 0; i < last_word - first_word + 1; i++)
499 le16_to_cpus(&eeprom_buff[i]);
500
501 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
502 eeprom->len);
503 kfree(eeprom_buff);
504
505 return ret_val;
506}
507
508static int
509e1000_set_eeprom(struct net_device *netdev,
510 struct ethtool_eeprom *eeprom, uint8_t *bytes)
511{
60490fe0 512 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
513 struct e1000_hw *hw = &adapter->hw;
514 uint16_t *eeprom_buff;
515 void *ptr;
516 int max_len, first_word, last_word, ret_val = 0;
517 uint16_t i;
518
96838a40 519 if (eeprom->len == 0)
1da177e4
LT
520 return -EOPNOTSUPP;
521
96838a40 522 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1da177e4
LT
523 return -EFAULT;
524
525 max_len = hw->eeprom.word_size * 2;
526
527 first_word = eeprom->offset >> 1;
528 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
529 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
96838a40 530 if (!eeprom_buff)
1da177e4
LT
531 return -ENOMEM;
532
533 ptr = (void *)eeprom_buff;
534
96838a40 535 if (eeprom->offset & 1) {
1da177e4
LT
536 /* need read/modify/write of first changed EEPROM word */
537 /* only the second byte of the word is being modified */
538 ret_val = e1000_read_eeprom(hw, first_word, 1,
539 &eeprom_buff[0]);
540 ptr++;
541 }
96838a40 542 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
1da177e4
LT
543 /* need read/modify/write of last changed EEPROM word */
544 /* only the first byte of the word is being modified */
545 ret_val = e1000_read_eeprom(hw, last_word, 1,
546 &eeprom_buff[last_word - first_word]);
547 }
548
549 /* Device's eeprom is always little-endian, word addressable */
550 for (i = 0; i < last_word - first_word + 1; i++)
551 le16_to_cpus(&eeprom_buff[i]);
552
553 memcpy(ptr, bytes, eeprom->len);
554
555 for (i = 0; i < last_word - first_word + 1; i++)
556 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
557
558 ret_val = e1000_write_eeprom(hw, first_word,
559 last_word - first_word + 1, eeprom_buff);
560
96838a40 561 /* Update the checksum over the first part of the EEPROM if needed
a7990ba6 562 * and flush shadow RAM for 82573 conrollers */
96838a40 563 if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
a7990ba6 564 (hw->mac_type == e1000_82573)))
1da177e4
LT
565 e1000_update_eeprom_checksum(hw);
566
567 kfree(eeprom_buff);
568 return ret_val;
569}
570
571static void
572e1000_get_drvinfo(struct net_device *netdev,
573 struct ethtool_drvinfo *drvinfo)
574{
60490fe0 575 struct e1000_adapter *adapter = netdev_priv(netdev);
a2917e22
JK
576 char firmware_version[32];
577 uint16_t eeprom_data;
1da177e4
LT
578
579 strncpy(drvinfo->driver, e1000_driver_name, 32);
580 strncpy(drvinfo->version, e1000_driver_version, 32);
a2917e22
JK
581
582 /* EEPROM image version # is reported as firmware version # for
583 * 8257{1|2|3} controllers */
584 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
585 switch (adapter->hw.mac_type) {
586 case e1000_82571:
587 case e1000_82572:
588 case e1000_82573:
6418ecc6 589 case e1000_80003es2lan:
cd94dd0b 590 case e1000_ich8lan:
a2917e22
JK
591 sprintf(firmware_version, "%d.%d-%d",
592 (eeprom_data & 0xF000) >> 12,
593 (eeprom_data & 0x0FF0) >> 4,
594 eeprom_data & 0x000F);
595 break;
596 default:
597 sprintf(firmware_version, "N/A");
598 }
599
600 strncpy(drvinfo->fw_version, firmware_version, 32);
1da177e4
LT
601 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
602 drvinfo->n_stats = E1000_STATS_LEN;
603 drvinfo->testinfo_len = E1000_TEST_LEN;
604 drvinfo->regdump_len = e1000_get_regs_len(netdev);
605 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
606}
607
608static void
609e1000_get_ringparam(struct net_device *netdev,
610 struct ethtool_ringparam *ring)
611{
60490fe0 612 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 613 e1000_mac_type mac_type = adapter->hw.mac_type;
581d708e
MC
614 struct e1000_tx_ring *txdr = adapter->tx_ring;
615 struct e1000_rx_ring *rxdr = adapter->rx_ring;
1da177e4
LT
616
617 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
618 E1000_MAX_82544_RXD;
619 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
620 E1000_MAX_82544_TXD;
621 ring->rx_mini_max_pending = 0;
622 ring->rx_jumbo_max_pending = 0;
623 ring->rx_pending = rxdr->count;
624 ring->tx_pending = txdr->count;
625 ring->rx_mini_pending = 0;
626 ring->rx_jumbo_pending = 0;
627}
628
96838a40 629static int
1da177e4
LT
630e1000_set_ringparam(struct net_device *netdev,
631 struct ethtool_ringparam *ring)
632{
60490fe0 633 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 634 e1000_mac_type mac_type = adapter->hw.mac_type;
581d708e
MC
635 struct e1000_tx_ring *txdr, *tx_old, *tx_new;
636 struct e1000_rx_ring *rxdr, *rx_old, *rx_new;
637 int i, err, tx_ring_size, rx_ring_size;
638
0989aa43
JK
639 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
640 return -EINVAL;
641
f56799ea
JK
642 tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
643 rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e 644
2db10a08
AK
645 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
646 msleep(1);
647
581d708e
MC
648 if (netif_running(adapter->netdev))
649 e1000_down(adapter);
1da177e4
LT
650
651 tx_old = adapter->tx_ring;
652 rx_old = adapter->rx_ring;
653
581d708e
MC
654 adapter->tx_ring = kmalloc(tx_ring_size, GFP_KERNEL);
655 if (!adapter->tx_ring) {
656 err = -ENOMEM;
657 goto err_setup_rx;
658 }
659 memset(adapter->tx_ring, 0, tx_ring_size);
660
661 adapter->rx_ring = kmalloc(rx_ring_size, GFP_KERNEL);
662 if (!adapter->rx_ring) {
663 kfree(adapter->tx_ring);
664 err = -ENOMEM;
665 goto err_setup_rx;
666 }
667 memset(adapter->rx_ring, 0, rx_ring_size);
668
669 txdr = adapter->tx_ring;
670 rxdr = adapter->rx_ring;
671
1da177e4
LT
672 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
673 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
674 E1000_MAX_RXD : E1000_MAX_82544_RXD));
96838a40 675 E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
1da177e4
LT
676
677 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
678 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
679 E1000_MAX_TXD : E1000_MAX_82544_TXD));
96838a40 680 E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
1da177e4 681
f56799ea 682 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 683 txdr[i].count = txdr->count;
f56799ea 684 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 685 rxdr[i].count = rxdr->count;
581d708e 686
96838a40 687 if (netif_running(adapter->netdev)) {
1da177e4 688 /* Try to get new resources before deleting old */
581d708e 689 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4 690 goto err_setup_rx;
581d708e 691 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT
692 goto err_setup_tx;
693
694 /* save the new, restore the old in order to free it,
695 * then restore the new back again */
696
697 rx_new = adapter->rx_ring;
698 tx_new = adapter->tx_ring;
699 adapter->rx_ring = rx_old;
700 adapter->tx_ring = tx_old;
581d708e
MC
701 e1000_free_all_rx_resources(adapter);
702 e1000_free_all_tx_resources(adapter);
703 kfree(tx_old);
704 kfree(rx_old);
1da177e4
LT
705 adapter->rx_ring = rx_new;
706 adapter->tx_ring = tx_new;
96838a40 707 if ((err = e1000_up(adapter)))
2db10a08 708 goto err_setup;
1da177e4
LT
709 }
710
2db10a08 711 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
712 return 0;
713err_setup_tx:
581d708e 714 e1000_free_all_rx_resources(adapter);
1da177e4
LT
715err_setup_rx:
716 adapter->rx_ring = rx_old;
717 adapter->tx_ring = tx_old;
718 e1000_up(adapter);
2db10a08
AK
719err_setup:
720 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
721 return err;
722}
723
724#define REG_PATTERN_TEST(R, M, W) \
725{ \
726 uint32_t pat, value; \
727 uint32_t test[] = \
728 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
96838a40 729 for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
1da177e4
LT
730 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
731 value = E1000_READ_REG(&adapter->hw, R); \
96838a40 732 if (value != (test[pat] & W & M)) { \
b01f6691
MC
733 DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
734 "0x%08X expected 0x%08X\n", \
735 E1000_##R, value, (test[pat] & W & M)); \
1da177e4
LT
736 *data = (adapter->hw.mac_type < e1000_82543) ? \
737 E1000_82542_##R : E1000_##R; \
738 return 1; \
739 } \
740 } \
741}
742
743#define REG_SET_AND_CHECK(R, M, W) \
744{ \
745 uint32_t value; \
746 E1000_WRITE_REG(&adapter->hw, R, W & M); \
747 value = E1000_READ_REG(&adapter->hw, R); \
96838a40 748 if ((W & M) != (value & M)) { \
b01f6691
MC
749 DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
750 "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
1da177e4
LT
751 *data = (adapter->hw.mac_type < e1000_82543) ? \
752 E1000_82542_##R : E1000_##R; \
753 return 1; \
754 } \
755}
756
757static int
758e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
759{
b01f6691
MC
760 uint32_t value, before, after;
761 uint32_t i, toggle;
1da177e4
LT
762
763 /* The status register is Read Only, so a write should fail.
764 * Some bits that get toggled are ignored.
765 */
b01f6691 766 switch (adapter->hw.mac_type) {
868d5309
MC
767 /* there are several bits on newer hardware that are r/w */
768 case e1000_82571:
769 case e1000_82572:
6418ecc6 770 case e1000_80003es2lan:
868d5309
MC
771 toggle = 0x7FFFF3FF;
772 break;
b01f6691 773 case e1000_82573:
cd94dd0b 774 case e1000_ich8lan:
b01f6691
MC
775 toggle = 0x7FFFF033;
776 break;
777 default:
778 toggle = 0xFFFFF833;
779 break;
780 }
781
782 before = E1000_READ_REG(&adapter->hw, STATUS);
783 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
784 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
785 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
96838a40 786 if (value != after) {
b01f6691
MC
787 DPRINTK(DRV, ERR, "failed STATUS register test got: "
788 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT
789 *data = 1;
790 return 1;
791 }
b01f6691
MC
792 /* restore previous status */
793 E1000_WRITE_REG(&adapter->hw, STATUS, before);
cd94dd0b
AK
794 if (adapter->hw.mac_type != e1000_ich8lan) {
795 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
796 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
797 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
798 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
799 }
1da177e4
LT
800 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
801 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
802 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
803 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
804 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
805 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
806 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
807 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
808 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
809 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
810
811 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
cd94dd0b
AK
812 before = (adapter->hw.mac_type == e1000_ich8lan ?
813 0x06C3B33E : 0x06DFB3FE);
814 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
1da177e4
LT
815 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
816
96838a40 817 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4 818
cd94dd0b 819 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
1da177e4 820 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
cd94dd0b
AK
821 if (adapter->hw.mac_type != e1000_ich8lan)
822 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
1da177e4
LT
823 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
824 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
cd94dd0b
AK
825 value = (adapter->hw.mac_type == e1000_ich8lan ?
826 E1000_RAR_ENTRIES_ICH8LAN : E1000_RAR_ENTRIES);
827 for (i = 0; i < value; i++) {
1da177e4
LT
828 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
829 0xFFFFFFFF);
830 }
831
832 } else {
833
834 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
835 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
836 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
837 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
838
839 }
840
cd94dd0b
AK
841 value = (adapter->hw.mac_type == e1000_ich8lan ?
842 E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE);
843 for (i = 0; i < value; i++)
1da177e4
LT
844 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
845
846 *data = 0;
847 return 0;
848}
849
850static int
851e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
852{
853 uint16_t temp;
854 uint16_t checksum = 0;
855 uint16_t i;
856
857 *data = 0;
858 /* Read and add up the contents of the EEPROM */
96838a40
JB
859 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
860 if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
1da177e4
LT
861 *data = 1;
862 break;
863 }
864 checksum += temp;
865 }
866
867 /* If Checksum is not Correct return error else test passed */
96838a40 868 if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
1da177e4
LT
869 *data = 2;
870
871 return *data;
872}
873
874static irqreturn_t
875e1000_test_intr(int irq,
876 void *data,
877 struct pt_regs *regs)
878{
879 struct net_device *netdev = (struct net_device *) data;
60490fe0 880 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
881
882 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
883
884 return IRQ_HANDLED;
885}
886
887static int
888e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
889{
890 struct net_device *netdev = adapter->netdev;
76c224bc
AK
891 uint32_t mask, i=0, shared_int = TRUE;
892 uint32_t irq = adapter->pdev->irq;
1da177e4
LT
893
894 *data = 0;
895
8fc897b0 896 /* NOTE: we don't test MSI interrupts here, yet */
1da177e4 897 /* Hook up test interrupt handler just for this test */
1fb9df5d 898 if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED,
8fc897b0
AK
899 netdev->name, netdev))
900 shared_int = FALSE;
901 else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
902 netdev->name, netdev)) {
1da177e4
LT
903 *data = 1;
904 return -1;
905 }
8fc897b0 906 DPRINTK(HW, INFO, "testing %s interrupt\n",
b9b6e78b 907 (shared_int ? "shared" : "unshared"));
1da177e4
LT
908
909 /* Disable all the interrupts */
910 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
911 msec_delay(10);
912
913 /* Test each interrupt */
96838a40 914 for (; i < 10; i++) {
1da177e4 915
cd94dd0b
AK
916 if (adapter->hw.mac_type == e1000_ich8lan && i == 8)
917 continue;
1da177e4
LT
918 /* Interrupt to test */
919 mask = 1 << i;
920
76c224bc
AK
921 if (!shared_int) {
922 /* Disable the interrupt to be reported in
923 * the cause register and then force the same
924 * interrupt and see if one gets posted. If
925 * an interrupt was posted to the bus, the
926 * test failed.
927 */
928 adapter->test_icr = 0;
929 E1000_WRITE_REG(&adapter->hw, IMC, mask);
930 E1000_WRITE_REG(&adapter->hw, ICS, mask);
931 msec_delay(10);
932
933 if (adapter->test_icr & mask) {
934 *data = 3;
935 break;
936 }
1da177e4
LT
937 }
938
939 /* Enable the interrupt to be reported in
940 * the cause register and then force the same
941 * interrupt and see if one gets posted. If
942 * an interrupt was not posted to the bus, the
943 * test failed.
944 */
945 adapter->test_icr = 0;
946 E1000_WRITE_REG(&adapter->hw, IMS, mask);
947 E1000_WRITE_REG(&adapter->hw, ICS, mask);
948 msec_delay(10);
949
96838a40 950 if (!(adapter->test_icr & mask)) {
1da177e4
LT
951 *data = 4;
952 break;
953 }
954
76c224bc 955 if (!shared_int) {
1da177e4
LT
956 /* Disable the other interrupts to be reported in
957 * the cause register and then force the other
958 * interrupts and see if any get posted. If
959 * an interrupt was posted to the bus, the
960 * test failed.
961 */
962 adapter->test_icr = 0;
2648345f
MC
963 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
964 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
1da177e4
LT
965 msec_delay(10);
966
96838a40 967 if (adapter->test_icr) {
1da177e4
LT
968 *data = 5;
969 break;
970 }
971 }
972 }
973
974 /* Disable all the interrupts */
975 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
976 msec_delay(10);
977
978 /* Unhook test interrupt handler */
979 free_irq(irq, netdev);
980
981 return *data;
982}
983
984static void
985e1000_free_desc_rings(struct e1000_adapter *adapter)
986{
581d708e
MC
987 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
988 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT
989 struct pci_dev *pdev = adapter->pdev;
990 int i;
991
96838a40
JB
992 if (txdr->desc && txdr->buffer_info) {
993 for (i = 0; i < txdr->count; i++) {
994 if (txdr->buffer_info[i].dma)
1da177e4
LT
995 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
996 txdr->buffer_info[i].length,
997 PCI_DMA_TODEVICE);
96838a40 998 if (txdr->buffer_info[i].skb)
1da177e4
LT
999 dev_kfree_skb(txdr->buffer_info[i].skb);
1000 }
1001 }
1002
96838a40
JB
1003 if (rxdr->desc && rxdr->buffer_info) {
1004 for (i = 0; i < rxdr->count; i++) {
1005 if (rxdr->buffer_info[i].dma)
1da177e4
LT
1006 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
1007 rxdr->buffer_info[i].length,
1008 PCI_DMA_FROMDEVICE);
96838a40 1009 if (rxdr->buffer_info[i].skb)
1da177e4
LT
1010 dev_kfree_skb(rxdr->buffer_info[i].skb);
1011 }
1012 }
1013
f5645110 1014 if (txdr->desc) {
1da177e4 1015 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
6b27adb6
JL
1016 txdr->desc = NULL;
1017 }
f5645110 1018 if (rxdr->desc) {
1da177e4 1019 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
6b27adb6
JL
1020 rxdr->desc = NULL;
1021 }
1da177e4 1022
b4558ea9 1023 kfree(txdr->buffer_info);
6b27adb6 1024 txdr->buffer_info = NULL;
b4558ea9 1025 kfree(rxdr->buffer_info);
6b27adb6 1026 rxdr->buffer_info = NULL;
f5645110 1027
1da177e4
LT
1028 return;
1029}
1030
1031static int
1032e1000_setup_desc_rings(struct e1000_adapter *adapter)
1033{
581d708e
MC
1034 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1035 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT
1036 struct pci_dev *pdev = adapter->pdev;
1037 uint32_t rctl;
1038 int size, i, ret_val;
1039
1040 /* Setup Tx descriptor ring and Tx buffers */
1041
96838a40
JB
1042 if (!txdr->count)
1043 txdr->count = E1000_DEFAULT_TXD;
1da177e4
LT
1044
1045 size = txdr->count * sizeof(struct e1000_buffer);
96838a40 1046 if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1da177e4
LT
1047 ret_val = 1;
1048 goto err_nomem;
1049 }
1050 memset(txdr->buffer_info, 0, size);
1051
1052 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1053 E1000_ROUNDUP(txdr->size, 4096);
96838a40 1054 if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
1da177e4
LT
1055 ret_val = 2;
1056 goto err_nomem;
1057 }
1058 memset(txdr->desc, 0, txdr->size);
1059 txdr->next_to_use = txdr->next_to_clean = 0;
1060
1061 E1000_WRITE_REG(&adapter->hw, TDBAL,
1062 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
1063 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1064 E1000_WRITE_REG(&adapter->hw, TDLEN,
1065 txdr->count * sizeof(struct e1000_tx_desc));
1066 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1067 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1068 E1000_WRITE_REG(&adapter->hw, TCTL,
1069 E1000_TCTL_PSP | E1000_TCTL_EN |
1070 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1071 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1072
96838a40 1073 for (i = 0; i < txdr->count; i++) {
1da177e4
LT
1074 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1075 struct sk_buff *skb;
1076 unsigned int size = 1024;
1077
96838a40 1078 if (!(skb = alloc_skb(size, GFP_KERNEL))) {
1da177e4
LT
1079 ret_val = 3;
1080 goto err_nomem;
1081 }
1082 skb_put(skb, size);
1083 txdr->buffer_info[i].skb = skb;
1084 txdr->buffer_info[i].length = skb->len;
1085 txdr->buffer_info[i].dma =
1086 pci_map_single(pdev, skb->data, skb->len,
1087 PCI_DMA_TODEVICE);
1088 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1089 tx_desc->lower.data = cpu_to_le32(skb->len);
1090 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1091 E1000_TXD_CMD_IFCS |
1092 E1000_TXD_CMD_RPS);
1093 tx_desc->upper.data = 0;
1094 }
1095
1096 /* Setup Rx descriptor ring and Rx buffers */
1097
96838a40
JB
1098 if (!rxdr->count)
1099 rxdr->count = E1000_DEFAULT_RXD;
1da177e4
LT
1100
1101 size = rxdr->count * sizeof(struct e1000_buffer);
96838a40 1102 if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1da177e4
LT
1103 ret_val = 4;
1104 goto err_nomem;
1105 }
1106 memset(rxdr->buffer_info, 0, size);
1107
1108 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
96838a40 1109 if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1da177e4
LT
1110 ret_val = 5;
1111 goto err_nomem;
1112 }
1113 memset(rxdr->desc, 0, rxdr->size);
1114 rxdr->next_to_use = rxdr->next_to_clean = 0;
1115
1116 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1117 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1118 E1000_WRITE_REG(&adapter->hw, RDBAL,
1119 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1120 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1121 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1122 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1123 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1124 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1125 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1126 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1127 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1128
96838a40 1129 for (i = 0; i < rxdr->count; i++) {
1da177e4
LT
1130 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1131 struct sk_buff *skb;
1132
96838a40 1133 if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1da177e4
LT
1134 GFP_KERNEL))) {
1135 ret_val = 6;
1136 goto err_nomem;
1137 }
1138 skb_reserve(skb, NET_IP_ALIGN);
1139 rxdr->buffer_info[i].skb = skb;
1140 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1141 rxdr->buffer_info[i].dma =
1142 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1143 PCI_DMA_FROMDEVICE);
1144 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1145 memset(skb->data, 0x00, skb->len);
1146 }
1147
1148 return 0;
1149
1150err_nomem:
1151 e1000_free_desc_rings(adapter);
1152 return ret_val;
1153}
1154
1155static void
1156e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1157{
1158 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1159 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1160 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1161 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1162 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1163}
1164
1165static void
1166e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1167{
1168 uint16_t phy_reg;
1169
1170 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1171 * Extended PHY Specific Control Register to 25MHz clock. This
1172 * value defaults back to a 2.5MHz clock when the PHY is reset.
1173 */
1174 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1175 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1176 e1000_write_phy_reg(&adapter->hw,
1177 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1178
1179 /* In addition, because of the s/w reset above, we need to enable
1180 * CRS on TX. This must be set for both full and half duplex
1181 * operation.
1182 */
1183 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1184 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1185 e1000_write_phy_reg(&adapter->hw,
1186 M88E1000_PHY_SPEC_CTRL, phy_reg);
1187}
1188
1189static int
1190e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1191{
1192 uint32_t ctrl_reg;
1193 uint16_t phy_reg;
1194
1195 /* Setup the Device Control Register for PHY loopback test. */
1196
1197 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1198 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1199 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1200 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1201 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1202 E1000_CTRL_FD); /* Force Duplex to FULL */
1203
1204 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1205
1206 /* Read the PHY Specific Control Register (0x10) */
1207 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1208
1209 /* Clear Auto-Crossover bits in PHY Specific Control Register
1210 * (bits 6:5).
1211 */
1212 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1213 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1214
1215 /* Perform software reset on the PHY */
1216 e1000_phy_reset(&adapter->hw);
1217
1218 /* Have to setup TX_CLK and TX_CRS after software reset */
1219 e1000_phy_reset_clk_and_crs(adapter);
1220
1221 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1222
1223 /* Wait for reset to complete. */
1224 udelay(500);
1225
1226 /* Have to setup TX_CLK and TX_CRS after software reset */
1227 e1000_phy_reset_clk_and_crs(adapter);
1228
1229 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1230 e1000_phy_disable_receiver(adapter);
1231
1232 /* Set the loopback bit in the PHY control register. */
1233 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1234 phy_reg |= MII_CR_LOOPBACK;
1235 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1236
1237 /* Setup TX_CLK and TX_CRS one more time. */
1238 e1000_phy_reset_clk_and_crs(adapter);
1239
1240 /* Check Phy Configuration */
1241 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
96838a40 1242 if (phy_reg != 0x4100)
1da177e4
LT
1243 return 9;
1244
1245 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
96838a40 1246 if (phy_reg != 0x0070)
1da177e4
LT
1247 return 10;
1248
1249 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
96838a40 1250 if (phy_reg != 0x001A)
1da177e4
LT
1251 return 11;
1252
1253 return 0;
1254}
1255
1256static int
1257e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1258{
1259 uint32_t ctrl_reg = 0;
1260 uint32_t stat_reg = 0;
1261
1262 adapter->hw.autoneg = FALSE;
1263
96838a40 1264 if (adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT
1265 /* Auto-MDI/MDIX Off */
1266 e1000_write_phy_reg(&adapter->hw,
1267 M88E1000_PHY_SPEC_CTRL, 0x0808);
1268 /* reset to update Auto-MDI/MDIX */
1269 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1270 /* autoneg off */
1271 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
8fc897b0 1272 } else if (adapter->hw.phy_type == e1000_phy_gg82563)
87041639
JK
1273 e1000_write_phy_reg(&adapter->hw,
1274 GG82563_PHY_KMRN_MODE_CTRL,
acfbc9fd 1275 0x1CC);
1da177e4 1276
1da177e4 1277 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
cd94dd0b
AK
1278
1279 if (adapter->hw.phy_type == e1000_phy_ife) {
1280 /* force 100, set loopback */
1281 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x6100);
1282
1283 /* Now set up the MAC to the same speed/duplex as the PHY. */
1284 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1285 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1286 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1287 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1288 E1000_CTRL_FD); /* Force Duplex to FULL */
1289 } else {
1290 /* force 1000, set loopback */
1291 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1292
1293 /* Now set up the MAC to the same speed/duplex as the PHY. */
1294 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1295 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1296 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1297 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1298 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1299 E1000_CTRL_FD); /* Force Duplex to FULL */
1300 }
1da177e4 1301
96838a40 1302 if (adapter->hw.media_type == e1000_media_type_copper &&
8fc897b0 1303 adapter->hw.phy_type == e1000_phy_m88)
1da177e4 1304 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
8fc897b0 1305 else {
1da177e4
LT
1306 /* Set the ILOS bit on the fiber Nic is half
1307 * duplex link is detected. */
1308 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 1309 if ((stat_reg & E1000_STATUS_FD) == 0)
1da177e4
LT
1310 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1311 }
1312
1313 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1314
1315 /* Disable the receiver on the PHY so when a cable is plugged in, the
1316 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1317 */
96838a40 1318 if (adapter->hw.phy_type == e1000_phy_m88)
1da177e4
LT
1319 e1000_phy_disable_receiver(adapter);
1320
1321 udelay(500);
1322
1323 return 0;
1324}
1325
1326static int
1327e1000_set_phy_loopback(struct e1000_adapter *adapter)
1328{
1329 uint16_t phy_reg = 0;
1330 uint16_t count = 0;
1331
1332 switch (adapter->hw.mac_type) {
1333 case e1000_82543:
96838a40 1334 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT
1335 /* Attempt to setup Loopback mode on Non-integrated PHY.
1336 * Some PHY registers get corrupted at random, so
1337 * attempt this 10 times.
1338 */
96838a40 1339 while (e1000_nonintegrated_phy_loopback(adapter) &&
1da177e4 1340 count++ < 10);
96838a40 1341 if (count < 11)
1da177e4
LT
1342 return 0;
1343 }
1344 break;
1345
1346 case e1000_82544:
1347 case e1000_82540:
1348 case e1000_82545:
1349 case e1000_82545_rev_3:
1350 case e1000_82546:
1351 case e1000_82546_rev_3:
1352 case e1000_82541:
1353 case e1000_82541_rev_2:
1354 case e1000_82547:
1355 case e1000_82547_rev_2:
868d5309
MC
1356 case e1000_82571:
1357 case e1000_82572:
4564327b 1358 case e1000_82573:
6418ecc6 1359 case e1000_80003es2lan:
cd94dd0b 1360 case e1000_ich8lan:
1da177e4
LT
1361 return e1000_integrated_phy_loopback(adapter);
1362 break;
1363
1364 default:
1365 /* Default PHY loopback work is to read the MII
1366 * control register and assert bit 14 (loopback mode).
1367 */
1368 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1369 phy_reg |= MII_CR_LOOPBACK;
1370 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1371 return 0;
1372 break;
1373 }
1374
1375 return 8;
1376}
1377
1378static int
1379e1000_setup_loopback_test(struct e1000_adapter *adapter)
1380{
49273163 1381 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
1382 uint32_t rctl;
1383
49273163
JK
1384 if (hw->media_type == e1000_media_type_fiber ||
1385 hw->media_type == e1000_media_type_internal_serdes) {
1386 switch (hw->mac_type) {
1387 case e1000_82545:
1388 case e1000_82546:
1389 case e1000_82545_rev_3:
1390 case e1000_82546_rev_3:
1da177e4 1391 return e1000_set_phy_loopback(adapter);
49273163
JK
1392 break;
1393 case e1000_82571:
1394 case e1000_82572:
1395#define E1000_SERDES_LB_ON 0x410
1396 e1000_set_phy_loopback(adapter);
1397 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
1398 msec_delay(10);
1399 return 0;
1400 break;
1401 default:
1402 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1403 rctl |= E1000_RCTL_LBM_TCVR;
49273163 1404 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT
1405 return 0;
1406 }
49273163 1407 } else if (hw->media_type == e1000_media_type_copper)
1da177e4
LT
1408 return e1000_set_phy_loopback(adapter);
1409
1410 return 7;
1411}
1412
1413static void
1414e1000_loopback_cleanup(struct e1000_adapter *adapter)
1415{
49273163 1416 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
1417 uint32_t rctl;
1418 uint16_t phy_reg;
1419
49273163 1420 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1421 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
49273163 1422 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4 1423
49273163
JK
1424 switch (hw->mac_type) {
1425 case e1000_82571:
1426 case e1000_82572:
1427 if (hw->media_type == e1000_media_type_fiber ||
1428 hw->media_type == e1000_media_type_internal_serdes) {
1429#define E1000_SERDES_LB_OFF 0x400
1430 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
1431 msec_delay(10);
1432 break;
1433 }
1434 /* Fall Through */
1435 case e1000_82545:
1436 case e1000_82546:
1437 case e1000_82545_rev_3:
1438 case e1000_82546_rev_3:
1439 default:
1440 hw->autoneg = TRUE;
8fc897b0 1441 if (hw->phy_type == e1000_phy_gg82563)
87041639
JK
1442 e1000_write_phy_reg(hw,
1443 GG82563_PHY_KMRN_MODE_CTRL,
1444 0x180);
49273163
JK
1445 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1446 if (phy_reg & MII_CR_LOOPBACK) {
1da177e4 1447 phy_reg &= ~MII_CR_LOOPBACK;
49273163
JK
1448 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1449 e1000_phy_reset(hw);
1da177e4 1450 }
49273163 1451 break;
1da177e4
LT
1452 }
1453}
1454
1455static void
1456e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1457{
1458 memset(skb->data, 0xFF, frame_size);
ce7393b9 1459 frame_size &= ~1;
1da177e4
LT
1460 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1461 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1462 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1463}
1464
1465static int
1466e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1467{
ce7393b9 1468 frame_size &= ~1;
96838a40
JB
1469 if (*(skb->data + 3) == 0xFF) {
1470 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1da177e4
LT
1471 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1472 return 0;
1473 }
1474 }
1475 return 13;
1476}
1477
1478static int
1479e1000_run_loopback_test(struct e1000_adapter *adapter)
1480{
581d708e
MC
1481 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1482 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1483 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC
1484 int i, j, k, l, lc, good_cnt, ret_val=0;
1485 unsigned long time;
1da177e4
LT
1486
1487 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1488
96838a40 1489 /* Calculate the loop count based on the largest descriptor ring
e4eff729
MC
1490 * The idea is to wrap the largest ring a number of times using 64
1491 * send/receive pairs during each loop
1492 */
1da177e4 1493
96838a40 1494 if (rxdr->count <= txdr->count)
e4eff729
MC
1495 lc = ((txdr->count / 64) * 2) + 1;
1496 else
1497 lc = ((rxdr->count / 64) * 2) + 1;
1498
1499 k = l = 0;
96838a40
JB
1500 for (j = 0; j <= lc; j++) { /* loop count loop */
1501 for (i = 0; i < 64; i++) { /* send the packets */
1502 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
e4eff729 1503 1024);
96838a40 1504 pci_dma_sync_single_for_device(pdev,
e4eff729
MC
1505 txdr->buffer_info[k].dma,
1506 txdr->buffer_info[k].length,
1507 PCI_DMA_TODEVICE);
96838a40 1508 if (unlikely(++k == txdr->count)) k = 0;
e4eff729
MC
1509 }
1510 E1000_WRITE_REG(&adapter->hw, TDT, k);
1511 msec_delay(200);
1512 time = jiffies; /* set the start time for the receive */
1513 good_cnt = 0;
1514 do { /* receive the sent packets */
96838a40 1515 pci_dma_sync_single_for_cpu(pdev,
e4eff729
MC
1516 rxdr->buffer_info[l].dma,
1517 rxdr->buffer_info[l].length,
1518 PCI_DMA_FROMDEVICE);
96838a40 1519
e4eff729
MC
1520 ret_val = e1000_check_lbtest_frame(
1521 rxdr->buffer_info[l].skb,
1522 1024);
96838a40 1523 if (!ret_val)
e4eff729 1524 good_cnt++;
96838a40
JB
1525 if (unlikely(++l == rxdr->count)) l = 0;
1526 /* time + 20 msecs (200 msecs on 2.4) is more than
1527 * enough time to complete the receives, if it's
e4eff729
MC
1528 * exceeded, break and error off
1529 */
1530 } while (good_cnt < 64 && jiffies < (time + 20));
96838a40 1531 if (good_cnt != 64) {
e4eff729 1532 ret_val = 13; /* ret_val is the same as mis-compare */
96838a40 1533 break;
e4eff729 1534 }
96838a40 1535 if (jiffies >= (time + 2)) {
e4eff729
MC
1536 ret_val = 14; /* error code for time out error */
1537 break;
1538 }
1539 } /* end loop count loop */
1da177e4
LT
1540 return ret_val;
1541}
1542
1543static int
1544e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1545{
57128197
JK
1546 /* PHY loopback cannot be performed if SoL/IDER
1547 * sessions are active */
1548 if (e1000_check_phy_reset_block(&adapter->hw)) {
1549 DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
1550 "when SoL/IDER is active.\n");
1551 *data = 0;
1552 goto out;
1553 }
1554
1555 if ((*data = e1000_setup_desc_rings(adapter)))
1556 goto out;
1557 if ((*data = e1000_setup_loopback_test(adapter)))
1558 goto err_loopback;
1da177e4
LT
1559 *data = e1000_run_loopback_test(adapter);
1560 e1000_loopback_cleanup(adapter);
57128197 1561
1da177e4 1562err_loopback:
57128197
JK
1563 e1000_free_desc_rings(adapter);
1564out:
1da177e4
LT
1565 return *data;
1566}
1567
1568static int
1569e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1570{
1571 *data = 0;
1da177e4
LT
1572 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1573 int i = 0;
1574 adapter->hw.serdes_link_down = TRUE;
1575
2648345f
MC
1576 /* On some blade server designs, link establishment
1577 * could take as long as 2-3 minutes */
1da177e4
LT
1578 do {
1579 e1000_check_for_link(&adapter->hw);
1580 if (adapter->hw.serdes_link_down == FALSE)
1581 return *data;
1582 msec_delay(20);
1583 } while (i++ < 3750);
1584
2648345f 1585 *data = 1;
1da177e4
LT
1586 } else {
1587 e1000_check_for_link(&adapter->hw);
96838a40 1588 if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
e4eff729 1589 msec_delay(4000);
1da177e4 1590
96838a40 1591 if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1da177e4
LT
1592 *data = 1;
1593 }
1594 }
1595 return *data;
1596}
1597
96838a40 1598static int
1da177e4
LT
1599e1000_diag_test_count(struct net_device *netdev)
1600{
1601 return E1000_TEST_LEN;
1602}
1603
d658266e
JB
1604extern void e1000_power_up_phy(struct e1000_adapter *);
1605
1da177e4
LT
1606static void
1607e1000_diag_test(struct net_device *netdev,
1608 struct ethtool_test *eth_test, uint64_t *data)
1609{
60490fe0 1610 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1611 boolean_t if_running = netif_running(netdev);
1612
2db10a08 1613 set_bit(__E1000_DRIVER_TESTING, &adapter->flags);
96838a40 1614 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1da177e4
LT
1615 /* Offline tests */
1616
1617 /* save speed, duplex, autoneg settings */
1618 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1619 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1620 uint8_t autoneg = adapter->hw.autoneg;
1621
d658266e
JB
1622 DPRINTK(HW, INFO, "offline testing starting\n");
1623
1da177e4
LT
1624 /* Link test performed before hardware reset so autoneg doesn't
1625 * interfere with test result */
96838a40 1626 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1627 eth_test->flags |= ETH_TEST_FL_FAILED;
1628
96838a40 1629 if (if_running)
2db10a08
AK
1630 /* indicate we're in test mode */
1631 dev_close(netdev);
1da177e4
LT
1632 else
1633 e1000_reset(adapter);
1634
96838a40 1635 if (e1000_reg_test(adapter, &data[0]))
1da177e4
LT
1636 eth_test->flags |= ETH_TEST_FL_FAILED;
1637
1638 e1000_reset(adapter);
96838a40 1639 if (e1000_eeprom_test(adapter, &data[1]))
1da177e4
LT
1640 eth_test->flags |= ETH_TEST_FL_FAILED;
1641
1642 e1000_reset(adapter);
96838a40 1643 if (e1000_intr_test(adapter, &data[2]))
1da177e4
LT
1644 eth_test->flags |= ETH_TEST_FL_FAILED;
1645
1646 e1000_reset(adapter);
d658266e
JB
1647 /* make sure the phy is powered up */
1648 e1000_power_up_phy(adapter);
96838a40 1649 if (e1000_loopback_test(adapter, &data[3]))
1da177e4
LT
1650 eth_test->flags |= ETH_TEST_FL_FAILED;
1651
1652 /* restore speed, duplex, autoneg settings */
1653 adapter->hw.autoneg_advertised = autoneg_advertised;
1654 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1655 adapter->hw.autoneg = autoneg;
1656
1657 e1000_reset(adapter);
2db10a08 1658 clear_bit(__E1000_DRIVER_TESTING, &adapter->flags);
96838a40 1659 if (if_running)
2db10a08 1660 dev_open(netdev);
1da177e4 1661 } else {
d658266e 1662 DPRINTK(HW, INFO, "online testing starting\n");
1da177e4 1663 /* Online tests */
96838a40 1664 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1665 eth_test->flags |= ETH_TEST_FL_FAILED;
1666
1667 /* Offline tests aren't run; pass by default */
1668 data[0] = 0;
1669 data[1] = 0;
1670 data[2] = 0;
1671 data[3] = 0;
2db10a08
AK
1672
1673 clear_bit(__E1000_DRIVER_TESTING, &adapter->flags);
1da177e4 1674 }
352c9f85 1675 msleep_interruptible(4 * 1000);
1da177e4
LT
1676}
1677
120cd576 1678static int e1000_wol_exclusion(struct e1000_adapter *adapter, struct ethtool_wolinfo *wol)
1da177e4 1679{
1da177e4 1680 struct e1000_hw *hw = &adapter->hw;
120cd576 1681 int retval = 1; /* fail by default */
1da177e4 1682
120cd576 1683 switch (hw->device_id) {
1da177e4
LT
1684 case E1000_DEV_ID_82543GC_FIBER:
1685 case E1000_DEV_ID_82543GC_COPPER:
1686 case E1000_DEV_ID_82544EI_FIBER:
1687 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1688 case E1000_DEV_ID_82545EM_FIBER:
1689 case E1000_DEV_ID_82545EM_COPPER:
84916829 1690 case E1000_DEV_ID_82546GB_QUAD_COPPER:
120cd576
JB
1691 case E1000_DEV_ID_82546GB_PCIE:
1692 /* these don't support WoL at all */
1da177e4 1693 wol->supported = 0;
120cd576 1694 break;
1da177e4
LT
1695 case E1000_DEV_ID_82546EB_FIBER:
1696 case E1000_DEV_ID_82546GB_FIBER:
b7ee49db 1697 case E1000_DEV_ID_82571EB_FIBER:
120cd576
JB
1698 case E1000_DEV_ID_82571EB_SERDES:
1699 case E1000_DEV_ID_82571EB_COPPER:
1700 /* Wake events not supported on port B */
96838a40 1701 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1da177e4 1702 wol->supported = 0;
120cd576 1703 break;
1da177e4 1704 }
120cd576
JB
1705 /* return success for non excluded adapter ports */
1706 retval = 0;
1707 break;
5881cde8 1708 case E1000_DEV_ID_82571EB_QUAD_COPPER:
120cd576
JB
1709 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1710 /* quad port adapters only support WoL on port A */
1711 if (!adapter->quad_port_a) {
1712 wol->supported = 0;
1713 break;
1714 }
1715 /* return success for non excluded adapter ports */
1716 retval = 0;
1717 break;
1da177e4 1718 default:
120cd576
JB
1719 /* dual port cards only support WoL on port A from now on
1720 * unless it was enabled in the eeprom for port B
1721 * so exclude FUNC_1 ports from having WoL enabled */
1722 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1 &&
1723 !adapter->eeprom_wol) {
1724 wol->supported = 0;
1725 break;
1726 }
84916829 1727
120cd576
JB
1728 retval = 0;
1729 }
1730
1731 return retval;
1732}
1733
1734static void
1735e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1736{
1737 struct e1000_adapter *adapter = netdev_priv(netdev);
1738
1739 wol->supported = WAKE_UCAST | WAKE_MCAST |
1740 WAKE_BCAST | WAKE_MAGIC;
1741 wol->wolopts = 0;
1742
1743 /* this function will set ->supported = 0 and return 1 if wol is not
1744 * supported by this hardware */
1745 if (e1000_wol_exclusion(adapter, wol))
1da177e4 1746 return;
120cd576
JB
1747
1748 /* apply any specific unsupported masks here */
1749 switch (adapter->hw.device_id) {
1750 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1751 /* KSP3 does not suppport UCAST wake-ups */
1752 wol->supported &= ~WAKE_UCAST;
1753
1754 if (adapter->wol & E1000_WUFC_EX)
1755 DPRINTK(DRV, ERR, "Interface does not support "
1756 "directed (unicast) frame wake-up packets\n");
1757 break;
1758 default:
1759 break;
1da177e4 1760 }
120cd576
JB
1761
1762 if (adapter->wol & E1000_WUFC_EX)
1763 wol->wolopts |= WAKE_UCAST;
1764 if (adapter->wol & E1000_WUFC_MC)
1765 wol->wolopts |= WAKE_MCAST;
1766 if (adapter->wol & E1000_WUFC_BC)
1767 wol->wolopts |= WAKE_BCAST;
1768 if (adapter->wol & E1000_WUFC_MAG)
1769 wol->wolopts |= WAKE_MAGIC;
1770
1771 return;
1da177e4
LT
1772}
1773
1774static int
1775e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1776{
60490fe0 1777 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1778 struct e1000_hw *hw = &adapter->hw;
1779
120cd576
JB
1780 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1781 return -EOPNOTSUPP;
1782
1783 if (e1000_wol_exclusion(adapter, wol))
1da177e4
LT
1784 return wol->wolopts ? -EOPNOTSUPP : 0;
1785
120cd576 1786 switch (hw->device_id) {
84916829 1787 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
84916829
JK
1788 if (wol->wolopts & WAKE_UCAST) {
1789 DPRINTK(DRV, ERR, "Interface does not support "
1790 "directed (unicast) frame wake-up packets\n");
1791 return -EOPNOTSUPP;
1792 }
120cd576 1793 break;
1da177e4 1794 default:
120cd576 1795 break;
1da177e4
LT
1796 }
1797
120cd576
JB
1798 /* these settings will always override what we currently have */
1799 adapter->wol = 0;
1800
1801 if (wol->wolopts & WAKE_UCAST)
1802 adapter->wol |= E1000_WUFC_EX;
1803 if (wol->wolopts & WAKE_MCAST)
1804 adapter->wol |= E1000_WUFC_MC;
1805 if (wol->wolopts & WAKE_BCAST)
1806 adapter->wol |= E1000_WUFC_BC;
1807 if (wol->wolopts & WAKE_MAGIC)
1808 adapter->wol |= E1000_WUFC_MAG;
1809
1da177e4
LT
1810 return 0;
1811}
1812
1813/* toggle LED 4 times per second = 2 "blinks" per second */
1814#define E1000_ID_INTERVAL (HZ/4)
1815
1816/* bit defines for adapter->led_status */
1817#define E1000_LED_ON 0
1818
1819static void
1820e1000_led_blink_callback(unsigned long data)
1821{
1822 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1823
96838a40 1824 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1da177e4
LT
1825 e1000_led_off(&adapter->hw);
1826 else
1827 e1000_led_on(&adapter->hw);
1828
1829 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1830}
1831
1832static int
1833e1000_phys_id(struct net_device *netdev, uint32_t data)
1834{
60490fe0 1835 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1836
96838a40 1837 if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
1da177e4
LT
1838 data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
1839
96838a40
JB
1840 if (adapter->hw.mac_type < e1000_82571) {
1841 if (!adapter->blink_timer.function) {
d439d4b7
MC
1842 init_timer(&adapter->blink_timer);
1843 adapter->blink_timer.function = e1000_led_blink_callback;
1844 adapter->blink_timer.data = (unsigned long) adapter;
1845 }
1846 e1000_setup_led(&adapter->hw);
1847 mod_timer(&adapter->blink_timer, jiffies);
1848 msleep_interruptible(data * 1000);
1849 del_timer_sync(&adapter->blink_timer);
cd94dd0b
AK
1850 } else if (adapter->hw.phy_type == e1000_phy_ife) {
1851 if (!adapter->blink_timer.function) {
1852 init_timer(&adapter->blink_timer);
1853 adapter->blink_timer.function = e1000_led_blink_callback;
1854 adapter->blink_timer.data = (unsigned long) adapter;
1855 }
1856 mod_timer(&adapter->blink_timer, jiffies);
d8c2bd3d 1857 msleep_interruptible(data * 1000);
cd94dd0b
AK
1858 del_timer_sync(&adapter->blink_timer);
1859 e1000_write_phy_reg(&(adapter->hw), IFE_PHY_SPECIAL_CONTROL_LED, 0);
d8c2bd3d 1860 } else {
f1b3a853 1861 e1000_blink_led_start(&adapter->hw);
d439d4b7 1862 msleep_interruptible(data * 1000);
1da177e4
LT
1863 }
1864
1da177e4
LT
1865 e1000_led_off(&adapter->hw);
1866 clear_bit(E1000_LED_ON, &adapter->led_status);
1867 e1000_cleanup_led(&adapter->hw);
1868
1869 return 0;
1870}
1871
1872static int
1873e1000_nway_reset(struct net_device *netdev)
1874{
60490fe0 1875 struct e1000_adapter *adapter = netdev_priv(netdev);
2db10a08
AK
1876 if (netif_running(netdev))
1877 e1000_reinit_locked(adapter);
1da177e4
LT
1878 return 0;
1879}
1880
96838a40 1881static int
1da177e4
LT
1882e1000_get_stats_count(struct net_device *netdev)
1883{
1884 return E1000_STATS_LEN;
1885}
1886
96838a40
JB
1887static void
1888e1000_get_ethtool_stats(struct net_device *netdev,
1da177e4
LT
1889 struct ethtool_stats *stats, uint64_t *data)
1890{
60490fe0 1891 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1892 int i;
1893
1894 e1000_update_stats(adapter);
7bfa4816
JK
1895 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1896 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1897 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1da177e4
LT
1898 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1899 }
7bfa4816 1900/* BUG_ON(i != E1000_STATS_LEN); */
1da177e4
LT
1901}
1902
96838a40 1903static void
1da177e4
LT
1904e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1905{
7bfa4816 1906 uint8_t *p = data;
1da177e4
LT
1907 int i;
1908
96838a40 1909 switch (stringset) {
1da177e4 1910 case ETH_SS_TEST:
96838a40 1911 memcpy(data, *e1000_gstrings_test,
1da177e4
LT
1912 E1000_TEST_LEN*ETH_GSTRING_LEN);
1913 break;
1914 case ETH_SS_STATS:
7bfa4816
JK
1915 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1916 memcpy(p, e1000_gstrings_stats[i].stat_string,
1917 ETH_GSTRING_LEN);
1918 p += ETH_GSTRING_LEN;
1919 }
7bfa4816 1920/* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1da177e4
LT
1921 break;
1922 }
1923}
1924
7282d491 1925static const struct ethtool_ops e1000_ethtool_ops = {
1da177e4
LT
1926 .get_settings = e1000_get_settings,
1927 .set_settings = e1000_set_settings,
1928 .get_drvinfo = e1000_get_drvinfo,
1929 .get_regs_len = e1000_get_regs_len,
1930 .get_regs = e1000_get_regs,
1931 .get_wol = e1000_get_wol,
1932 .set_wol = e1000_set_wol,
8fc897b0
AK
1933 .get_msglevel = e1000_get_msglevel,
1934 .set_msglevel = e1000_set_msglevel,
1da177e4
LT
1935 .nway_reset = e1000_nway_reset,
1936 .get_link = ethtool_op_get_link,
1937 .get_eeprom_len = e1000_get_eeprom_len,
1938 .get_eeprom = e1000_get_eeprom,
1939 .set_eeprom = e1000_set_eeprom,
1940 .get_ringparam = e1000_get_ringparam,
1941 .set_ringparam = e1000_set_ringparam,
8fc897b0
AK
1942 .get_pauseparam = e1000_get_pauseparam,
1943 .set_pauseparam = e1000_set_pauseparam,
1944 .get_rx_csum = e1000_get_rx_csum,
1945 .set_rx_csum = e1000_set_rx_csum,
1946 .get_tx_csum = e1000_get_tx_csum,
1947 .set_tx_csum = e1000_set_tx_csum,
1948 .get_sg = ethtool_op_get_sg,
1949 .set_sg = ethtool_op_set_sg,
1da177e4 1950#ifdef NETIF_F_TSO
8fc897b0
AK
1951 .get_tso = ethtool_op_get_tso,
1952 .set_tso = e1000_set_tso,
1da177e4
LT
1953#endif
1954 .self_test_count = e1000_diag_test_count,
1955 .self_test = e1000_diag_test,
1956 .get_strings = e1000_get_strings,
1957 .phys_id = e1000_phys_id,
1958 .get_stats_count = e1000_get_stats_count,
1959 .get_ethtool_stats = e1000_get_ethtool_stats,
8fc897b0 1960 .get_perm_addr = ethtool_op_get_perm_addr,
1da177e4
LT
1961};
1962
1963void e1000_set_ethtool_ops(struct net_device *netdev)
1964{
1965 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1966}
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