Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
0abb6eb1 AK |
3 | Intel PRO/1000 Linux driver |
4 | Copyright(c) 1999 - 2006 Intel Corporation. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
1da177e4 | 13 | more details. |
0abb6eb1 | 14 | |
1da177e4 | 15 | You should have received a copy of the GNU General Public License along with |
0abb6eb1 AK |
16 | this program; if not, write to the Free Software Foundation, Inc., |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
1da177e4 LT |
22 | Contact Information: |
23 | Linux NICS <linux.nics@intel.com> | |
3d41e30a | 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
1da177e4 LT |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | #include "e1000.h" | |
d0bb53e1 | 30 | #include <net/ip6_checksum.h> |
1da177e4 | 31 | |
1da177e4 | 32 | char e1000_driver_name[] = "e1000"; |
3ad2cc67 | 33 | static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; |
1da177e4 LT |
34 | #ifndef CONFIG_E1000_NAPI |
35 | #define DRIVERNAPI | |
36 | #else | |
37 | #define DRIVERNAPI "-NAPI" | |
38 | #endif | |
25006ac6 | 39 | #define DRV_VERSION "7.3.15-k2"DRIVERNAPI |
1da177e4 | 40 | char e1000_driver_version[] = DRV_VERSION; |
3d41e30a | 41 | static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; |
1da177e4 LT |
42 | |
43 | /* e1000_pci_tbl - PCI Device ID Table | |
44 | * | |
45 | * Last entry must be all 0s | |
46 | * | |
47 | * Macro expands to... | |
48 | * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)} | |
49 | */ | |
50 | static struct pci_device_id e1000_pci_tbl[] = { | |
51 | INTEL_E1000_ETHERNET_DEVICE(0x1000), | |
52 | INTEL_E1000_ETHERNET_DEVICE(0x1001), | |
53 | INTEL_E1000_ETHERNET_DEVICE(0x1004), | |
54 | INTEL_E1000_ETHERNET_DEVICE(0x1008), | |
55 | INTEL_E1000_ETHERNET_DEVICE(0x1009), | |
56 | INTEL_E1000_ETHERNET_DEVICE(0x100C), | |
57 | INTEL_E1000_ETHERNET_DEVICE(0x100D), | |
58 | INTEL_E1000_ETHERNET_DEVICE(0x100E), | |
59 | INTEL_E1000_ETHERNET_DEVICE(0x100F), | |
60 | INTEL_E1000_ETHERNET_DEVICE(0x1010), | |
61 | INTEL_E1000_ETHERNET_DEVICE(0x1011), | |
62 | INTEL_E1000_ETHERNET_DEVICE(0x1012), | |
63 | INTEL_E1000_ETHERNET_DEVICE(0x1013), | |
64 | INTEL_E1000_ETHERNET_DEVICE(0x1014), | |
65 | INTEL_E1000_ETHERNET_DEVICE(0x1015), | |
66 | INTEL_E1000_ETHERNET_DEVICE(0x1016), | |
67 | INTEL_E1000_ETHERNET_DEVICE(0x1017), | |
68 | INTEL_E1000_ETHERNET_DEVICE(0x1018), | |
69 | INTEL_E1000_ETHERNET_DEVICE(0x1019), | |
2648345f | 70 | INTEL_E1000_ETHERNET_DEVICE(0x101A), |
1da177e4 LT |
71 | INTEL_E1000_ETHERNET_DEVICE(0x101D), |
72 | INTEL_E1000_ETHERNET_DEVICE(0x101E), | |
73 | INTEL_E1000_ETHERNET_DEVICE(0x1026), | |
74 | INTEL_E1000_ETHERNET_DEVICE(0x1027), | |
75 | INTEL_E1000_ETHERNET_DEVICE(0x1028), | |
ae2c3860 AK |
76 | INTEL_E1000_ETHERNET_DEVICE(0x1049), |
77 | INTEL_E1000_ETHERNET_DEVICE(0x104A), | |
78 | INTEL_E1000_ETHERNET_DEVICE(0x104B), | |
79 | INTEL_E1000_ETHERNET_DEVICE(0x104C), | |
80 | INTEL_E1000_ETHERNET_DEVICE(0x104D), | |
07b8fede MC |
81 | INTEL_E1000_ETHERNET_DEVICE(0x105E), |
82 | INTEL_E1000_ETHERNET_DEVICE(0x105F), | |
83 | INTEL_E1000_ETHERNET_DEVICE(0x1060), | |
1da177e4 LT |
84 | INTEL_E1000_ETHERNET_DEVICE(0x1075), |
85 | INTEL_E1000_ETHERNET_DEVICE(0x1076), | |
86 | INTEL_E1000_ETHERNET_DEVICE(0x1077), | |
87 | INTEL_E1000_ETHERNET_DEVICE(0x1078), | |
88 | INTEL_E1000_ETHERNET_DEVICE(0x1079), | |
89 | INTEL_E1000_ETHERNET_DEVICE(0x107A), | |
90 | INTEL_E1000_ETHERNET_DEVICE(0x107B), | |
91 | INTEL_E1000_ETHERNET_DEVICE(0x107C), | |
07b8fede MC |
92 | INTEL_E1000_ETHERNET_DEVICE(0x107D), |
93 | INTEL_E1000_ETHERNET_DEVICE(0x107E), | |
94 | INTEL_E1000_ETHERNET_DEVICE(0x107F), | |
1da177e4 | 95 | INTEL_E1000_ETHERNET_DEVICE(0x108A), |
2648345f MC |
96 | INTEL_E1000_ETHERNET_DEVICE(0x108B), |
97 | INTEL_E1000_ETHERNET_DEVICE(0x108C), | |
6418ecc6 JK |
98 | INTEL_E1000_ETHERNET_DEVICE(0x1096), |
99 | INTEL_E1000_ETHERNET_DEVICE(0x1098), | |
b7ee49db | 100 | INTEL_E1000_ETHERNET_DEVICE(0x1099), |
07b8fede | 101 | INTEL_E1000_ETHERNET_DEVICE(0x109A), |
5881cde8 | 102 | INTEL_E1000_ETHERNET_DEVICE(0x10A4), |
b7ee49db | 103 | INTEL_E1000_ETHERNET_DEVICE(0x10B5), |
6418ecc6 | 104 | INTEL_E1000_ETHERNET_DEVICE(0x10B9), |
ae2c3860 AK |
105 | INTEL_E1000_ETHERNET_DEVICE(0x10BA), |
106 | INTEL_E1000_ETHERNET_DEVICE(0x10BB), | |
fc2307d0 AK |
107 | INTEL_E1000_ETHERNET_DEVICE(0x10BC), |
108 | INTEL_E1000_ETHERNET_DEVICE(0x10C4), | |
109 | INTEL_E1000_ETHERNET_DEVICE(0x10C5), | |
1da177e4 LT |
110 | /* required last entry */ |
111 | {0,} | |
112 | }; | |
113 | ||
114 | MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); | |
115 | ||
35574764 NN |
116 | int e1000_up(struct e1000_adapter *adapter); |
117 | void e1000_down(struct e1000_adapter *adapter); | |
118 | void e1000_reinit_locked(struct e1000_adapter *adapter); | |
119 | void e1000_reset(struct e1000_adapter *adapter); | |
120 | int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx); | |
121 | int e1000_setup_all_tx_resources(struct e1000_adapter *adapter); | |
122 | int e1000_setup_all_rx_resources(struct e1000_adapter *adapter); | |
123 | void e1000_free_all_tx_resources(struct e1000_adapter *adapter); | |
124 | void e1000_free_all_rx_resources(struct e1000_adapter *adapter); | |
3ad2cc67 | 125 | static int e1000_setup_tx_resources(struct e1000_adapter *adapter, |
35574764 | 126 | struct e1000_tx_ring *txdr); |
3ad2cc67 | 127 | static int e1000_setup_rx_resources(struct e1000_adapter *adapter, |
35574764 | 128 | struct e1000_rx_ring *rxdr); |
3ad2cc67 | 129 | static void e1000_free_tx_resources(struct e1000_adapter *adapter, |
35574764 | 130 | struct e1000_tx_ring *tx_ring); |
3ad2cc67 | 131 | static void e1000_free_rx_resources(struct e1000_adapter *adapter, |
35574764 NN |
132 | struct e1000_rx_ring *rx_ring); |
133 | void e1000_update_stats(struct e1000_adapter *adapter); | |
1da177e4 LT |
134 | |
135 | static int e1000_init_module(void); | |
136 | static void e1000_exit_module(void); | |
137 | static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent); | |
138 | static void __devexit e1000_remove(struct pci_dev *pdev); | |
581d708e | 139 | static int e1000_alloc_queues(struct e1000_adapter *adapter); |
1da177e4 LT |
140 | static int e1000_sw_init(struct e1000_adapter *adapter); |
141 | static int e1000_open(struct net_device *netdev); | |
142 | static int e1000_close(struct net_device *netdev); | |
143 | static void e1000_configure_tx(struct e1000_adapter *adapter); | |
144 | static void e1000_configure_rx(struct e1000_adapter *adapter); | |
145 | static void e1000_setup_rctl(struct e1000_adapter *adapter); | |
581d708e MC |
146 | static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter); |
147 | static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter); | |
148 | static void e1000_clean_tx_ring(struct e1000_adapter *adapter, | |
149 | struct e1000_tx_ring *tx_ring); | |
150 | static void e1000_clean_rx_ring(struct e1000_adapter *adapter, | |
151 | struct e1000_rx_ring *rx_ring); | |
1da177e4 LT |
152 | static void e1000_set_multi(struct net_device *netdev); |
153 | static void e1000_update_phy_info(unsigned long data); | |
154 | static void e1000_watchdog(unsigned long data); | |
1da177e4 LT |
155 | static void e1000_82547_tx_fifo_stall(unsigned long data); |
156 | static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev); | |
157 | static struct net_device_stats * e1000_get_stats(struct net_device *netdev); | |
158 | static int e1000_change_mtu(struct net_device *netdev, int new_mtu); | |
159 | static int e1000_set_mac(struct net_device *netdev, void *p); | |
7d12e780 | 160 | static irqreturn_t e1000_intr(int irq, void *data); |
9ac98284 JB |
161 | #ifdef CONFIG_PCI_MSI |
162 | static irqreturn_t e1000_intr_msi(int irq, void *data); | |
163 | #endif | |
581d708e MC |
164 | static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter, |
165 | struct e1000_tx_ring *tx_ring); | |
1da177e4 | 166 | #ifdef CONFIG_E1000_NAPI |
581d708e | 167 | static int e1000_clean(struct net_device *poll_dev, int *budget); |
1da177e4 | 168 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
581d708e | 169 | struct e1000_rx_ring *rx_ring, |
1da177e4 | 170 | int *work_done, int work_to_do); |
2d7edb92 | 171 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
581d708e | 172 | struct e1000_rx_ring *rx_ring, |
2d7edb92 | 173 | int *work_done, int work_to_do); |
1da177e4 | 174 | #else |
581d708e MC |
175 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
176 | struct e1000_rx_ring *rx_ring); | |
177 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | |
178 | struct e1000_rx_ring *rx_ring); | |
1da177e4 | 179 | #endif |
581d708e | 180 | static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
72d64a43 JK |
181 | struct e1000_rx_ring *rx_ring, |
182 | int cleaned_count); | |
581d708e | 183 | static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, |
72d64a43 JK |
184 | struct e1000_rx_ring *rx_ring, |
185 | int cleaned_count); | |
1da177e4 LT |
186 | static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); |
187 | static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, | |
188 | int cmd); | |
35574764 | 189 | void e1000_set_ethtool_ops(struct net_device *netdev); |
1da177e4 LT |
190 | static void e1000_enter_82542_rst(struct e1000_adapter *adapter); |
191 | static void e1000_leave_82542_rst(struct e1000_adapter *adapter); | |
192 | static void e1000_tx_timeout(struct net_device *dev); | |
65f27f38 | 193 | static void e1000_reset_task(struct work_struct *work); |
1da177e4 | 194 | static void e1000_smartspeed(struct e1000_adapter *adapter); |
e619d523 AK |
195 | static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, |
196 | struct sk_buff *skb); | |
1da177e4 LT |
197 | |
198 | static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp); | |
199 | static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid); | |
200 | static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); | |
201 | static void e1000_restore_vlan(struct e1000_adapter *adapter); | |
202 | ||
977e74b5 | 203 | static int e1000_suspend(struct pci_dev *pdev, pm_message_t state); |
6fdfef16 | 204 | #ifdef CONFIG_PM |
1da177e4 LT |
205 | static int e1000_resume(struct pci_dev *pdev); |
206 | #endif | |
c653e635 | 207 | static void e1000_shutdown(struct pci_dev *pdev); |
1da177e4 LT |
208 | |
209 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
210 | /* for netdump / net console */ | |
211 | static void e1000_netpoll (struct net_device *netdev); | |
212 | #endif | |
213 | ||
35574764 NN |
214 | extern void e1000_check_options(struct e1000_adapter *adapter); |
215 | ||
9026729b AK |
216 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, |
217 | pci_channel_state_t state); | |
218 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev); | |
219 | static void e1000_io_resume(struct pci_dev *pdev); | |
220 | ||
221 | static struct pci_error_handlers e1000_err_handler = { | |
222 | .error_detected = e1000_io_error_detected, | |
223 | .slot_reset = e1000_io_slot_reset, | |
224 | .resume = e1000_io_resume, | |
225 | }; | |
24025e4e | 226 | |
1da177e4 LT |
227 | static struct pci_driver e1000_driver = { |
228 | .name = e1000_driver_name, | |
229 | .id_table = e1000_pci_tbl, | |
230 | .probe = e1000_probe, | |
231 | .remove = __devexit_p(e1000_remove), | |
c4e24f01 | 232 | #ifdef CONFIG_PM |
1da177e4 | 233 | /* Power Managment Hooks */ |
1da177e4 | 234 | .suspend = e1000_suspend, |
c653e635 | 235 | .resume = e1000_resume, |
1da177e4 | 236 | #endif |
9026729b AK |
237 | .shutdown = e1000_shutdown, |
238 | .err_handler = &e1000_err_handler | |
1da177e4 LT |
239 | }; |
240 | ||
241 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); | |
242 | MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); | |
243 | MODULE_LICENSE("GPL"); | |
244 | MODULE_VERSION(DRV_VERSION); | |
245 | ||
246 | static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE; | |
247 | module_param(debug, int, 0); | |
248 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | |
249 | ||
250 | /** | |
251 | * e1000_init_module - Driver Registration Routine | |
252 | * | |
253 | * e1000_init_module is the first routine called when the driver is | |
254 | * loaded. All it does is register with the PCI subsystem. | |
255 | **/ | |
256 | ||
257 | static int __init | |
258 | e1000_init_module(void) | |
259 | { | |
260 | int ret; | |
261 | printk(KERN_INFO "%s - version %s\n", | |
262 | e1000_driver_string, e1000_driver_version); | |
263 | ||
264 | printk(KERN_INFO "%s\n", e1000_copyright); | |
265 | ||
29917620 | 266 | ret = pci_register_driver(&e1000_driver); |
8b378def | 267 | |
1da177e4 LT |
268 | return ret; |
269 | } | |
270 | ||
271 | module_init(e1000_init_module); | |
272 | ||
273 | /** | |
274 | * e1000_exit_module - Driver Exit Cleanup Routine | |
275 | * | |
276 | * e1000_exit_module is called just before the driver is removed | |
277 | * from memory. | |
278 | **/ | |
279 | ||
280 | static void __exit | |
281 | e1000_exit_module(void) | |
282 | { | |
1da177e4 LT |
283 | pci_unregister_driver(&e1000_driver); |
284 | } | |
285 | ||
286 | module_exit(e1000_exit_module); | |
287 | ||
2db10a08 AK |
288 | static int e1000_request_irq(struct e1000_adapter *adapter) |
289 | { | |
290 | struct net_device *netdev = adapter->netdev; | |
291 | int flags, err = 0; | |
292 | ||
c0bc8721 | 293 | flags = IRQF_SHARED; |
2db10a08 | 294 | #ifdef CONFIG_PCI_MSI |
9ac98284 | 295 | if (adapter->hw.mac_type >= e1000_82571) { |
2db10a08 AK |
296 | adapter->have_msi = TRUE; |
297 | if ((err = pci_enable_msi(adapter->pdev))) { | |
298 | DPRINTK(PROBE, ERR, | |
299 | "Unable to allocate MSI interrupt Error: %d\n", err); | |
300 | adapter->have_msi = FALSE; | |
301 | } | |
302 | } | |
9ac98284 | 303 | if (adapter->have_msi) { |
61ef5c00 | 304 | flags &= ~IRQF_SHARED; |
9ac98284 JB |
305 | err = request_irq(adapter->pdev->irq, &e1000_intr_msi, flags, |
306 | netdev->name, netdev); | |
307 | if (err) | |
308 | DPRINTK(PROBE, ERR, | |
309 | "Unable to allocate interrupt Error: %d\n", err); | |
310 | } else | |
2db10a08 AK |
311 | #endif |
312 | if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags, | |
313 | netdev->name, netdev))) | |
314 | DPRINTK(PROBE, ERR, | |
315 | "Unable to allocate interrupt Error: %d\n", err); | |
316 | ||
317 | return err; | |
318 | } | |
319 | ||
320 | static void e1000_free_irq(struct e1000_adapter *adapter) | |
321 | { | |
322 | struct net_device *netdev = adapter->netdev; | |
323 | ||
324 | free_irq(adapter->pdev->irq, netdev); | |
325 | ||
326 | #ifdef CONFIG_PCI_MSI | |
327 | if (adapter->have_msi) | |
328 | pci_disable_msi(adapter->pdev); | |
329 | #endif | |
330 | } | |
331 | ||
1da177e4 LT |
332 | /** |
333 | * e1000_irq_disable - Mask off interrupt generation on the NIC | |
334 | * @adapter: board private structure | |
335 | **/ | |
336 | ||
e619d523 | 337 | static void |
1da177e4 LT |
338 | e1000_irq_disable(struct e1000_adapter *adapter) |
339 | { | |
340 | atomic_inc(&adapter->irq_sem); | |
341 | E1000_WRITE_REG(&adapter->hw, IMC, ~0); | |
342 | E1000_WRITE_FLUSH(&adapter->hw); | |
343 | synchronize_irq(adapter->pdev->irq); | |
344 | } | |
345 | ||
346 | /** | |
347 | * e1000_irq_enable - Enable default interrupt generation settings | |
348 | * @adapter: board private structure | |
349 | **/ | |
350 | ||
e619d523 | 351 | static void |
1da177e4 LT |
352 | e1000_irq_enable(struct e1000_adapter *adapter) |
353 | { | |
96838a40 | 354 | if (likely(atomic_dec_and_test(&adapter->irq_sem))) { |
1da177e4 LT |
355 | E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK); |
356 | E1000_WRITE_FLUSH(&adapter->hw); | |
357 | } | |
358 | } | |
3ad2cc67 AB |
359 | |
360 | static void | |
2d7edb92 MC |
361 | e1000_update_mng_vlan(struct e1000_adapter *adapter) |
362 | { | |
363 | struct net_device *netdev = adapter->netdev; | |
364 | uint16_t vid = adapter->hw.mng_cookie.vlan_id; | |
365 | uint16_t old_vid = adapter->mng_vlan_id; | |
96838a40 JB |
366 | if (adapter->vlgrp) { |
367 | if (!adapter->vlgrp->vlan_devices[vid]) { | |
368 | if (adapter->hw.mng_cookie.status & | |
2d7edb92 MC |
369 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) { |
370 | e1000_vlan_rx_add_vid(netdev, vid); | |
371 | adapter->mng_vlan_id = vid; | |
372 | } else | |
373 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
96838a40 JB |
374 | |
375 | if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) && | |
376 | (vid != old_vid) && | |
2d7edb92 MC |
377 | !adapter->vlgrp->vlan_devices[old_vid]) |
378 | e1000_vlan_rx_kill_vid(netdev, old_vid); | |
c5f226fe JK |
379 | } else |
380 | adapter->mng_vlan_id = vid; | |
2d7edb92 MC |
381 | } |
382 | } | |
b55ccb35 JK |
383 | |
384 | /** | |
385 | * e1000_release_hw_control - release control of the h/w to f/w | |
386 | * @adapter: address of board private structure | |
387 | * | |
388 | * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit. | |
389 | * For ASF and Pass Through versions of f/w this means that the | |
390 | * driver is no longer loaded. For AMT version (only with 82573) i | |
90fb5135 | 391 | * of the f/w this means that the network i/f is closed. |
76c224bc | 392 | * |
b55ccb35 JK |
393 | **/ |
394 | ||
e619d523 | 395 | static void |
b55ccb35 JK |
396 | e1000_release_hw_control(struct e1000_adapter *adapter) |
397 | { | |
398 | uint32_t ctrl_ext; | |
399 | uint32_t swsm; | |
cd94dd0b | 400 | uint32_t extcnf; |
b55ccb35 JK |
401 | |
402 | /* Let firmware taken over control of h/w */ | |
403 | switch (adapter->hw.mac_type) { | |
404 | case e1000_82571: | |
405 | case e1000_82572: | |
4cc15f54 | 406 | case e1000_80003es2lan: |
b55ccb35 JK |
407 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
408 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
409 | ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); | |
410 | break; | |
411 | case e1000_82573: | |
412 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
413 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
414 | swsm & ~E1000_SWSM_DRV_LOAD); | |
cd94dd0b AK |
415 | case e1000_ich8lan: |
416 | extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
417 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
418 | extcnf & ~E1000_CTRL_EXT_DRV_LOAD); | |
419 | break; | |
b55ccb35 JK |
420 | default: |
421 | break; | |
422 | } | |
423 | } | |
424 | ||
425 | /** | |
426 | * e1000_get_hw_control - get control of the h/w from f/w | |
427 | * @adapter: address of board private structure | |
428 | * | |
429 | * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit. | |
76c224bc AK |
430 | * For ASF and Pass Through versions of f/w this means that |
431 | * the driver is loaded. For AMT version (only with 82573) | |
90fb5135 | 432 | * of the f/w this means that the network i/f is open. |
76c224bc | 433 | * |
b55ccb35 JK |
434 | **/ |
435 | ||
e619d523 | 436 | static void |
b55ccb35 JK |
437 | e1000_get_hw_control(struct e1000_adapter *adapter) |
438 | { | |
439 | uint32_t ctrl_ext; | |
440 | uint32_t swsm; | |
cd94dd0b | 441 | uint32_t extcnf; |
90fb5135 | 442 | |
b55ccb35 JK |
443 | /* Let firmware know the driver has taken over */ |
444 | switch (adapter->hw.mac_type) { | |
445 | case e1000_82571: | |
446 | case e1000_82572: | |
4cc15f54 | 447 | case e1000_80003es2lan: |
b55ccb35 JK |
448 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
449 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
450 | ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); | |
451 | break; | |
452 | case e1000_82573: | |
453 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
454 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
455 | swsm | E1000_SWSM_DRV_LOAD); | |
456 | break; | |
cd94dd0b AK |
457 | case e1000_ich8lan: |
458 | extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL); | |
459 | E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL, | |
460 | extcnf | E1000_EXTCNF_CTRL_SWFLAG); | |
461 | break; | |
b55ccb35 JK |
462 | default: |
463 | break; | |
464 | } | |
465 | } | |
466 | ||
0fccd0e9 JG |
467 | static void |
468 | e1000_init_manageability(struct e1000_adapter *adapter) | |
469 | { | |
470 | if (adapter->en_mng_pt) { | |
471 | uint32_t manc = E1000_READ_REG(&adapter->hw, MANC); | |
472 | ||
473 | /* disable hardware interception of ARP */ | |
474 | manc &= ~(E1000_MANC_ARP_EN); | |
475 | ||
476 | /* enable receiving management packets to the host */ | |
477 | /* this will probably generate destination unreachable messages | |
478 | * from the host OS, but the packets will be handled on SMBUS */ | |
479 | if (adapter->hw.has_manc2h) { | |
480 | uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H); | |
481 | ||
482 | manc |= E1000_MANC_EN_MNG2HOST; | |
483 | #define E1000_MNG2HOST_PORT_623 (1 << 5) | |
484 | #define E1000_MNG2HOST_PORT_664 (1 << 6) | |
485 | manc2h |= E1000_MNG2HOST_PORT_623; | |
486 | manc2h |= E1000_MNG2HOST_PORT_664; | |
487 | E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h); | |
488 | } | |
489 | ||
490 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
491 | } | |
492 | } | |
493 | ||
494 | static void | |
495 | e1000_release_manageability(struct e1000_adapter *adapter) | |
496 | { | |
497 | if (adapter->en_mng_pt) { | |
498 | uint32_t manc = E1000_READ_REG(&adapter->hw, MANC); | |
499 | ||
500 | /* re-enable hardware interception of ARP */ | |
501 | manc |= E1000_MANC_ARP_EN; | |
502 | ||
503 | if (adapter->hw.has_manc2h) | |
504 | manc &= ~E1000_MANC_EN_MNG2HOST; | |
505 | ||
506 | /* don't explicitly have to mess with MANC2H since | |
507 | * MANC has an enable disable that gates MANC2H */ | |
508 | ||
509 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
510 | } | |
511 | } | |
512 | ||
1da177e4 LT |
513 | int |
514 | e1000_up(struct e1000_adapter *adapter) | |
515 | { | |
516 | struct net_device *netdev = adapter->netdev; | |
2db10a08 | 517 | int i; |
1da177e4 LT |
518 | |
519 | /* hardware has been reset, we need to reload some things */ | |
520 | ||
1da177e4 LT |
521 | e1000_set_multi(netdev); |
522 | ||
523 | e1000_restore_vlan(adapter); | |
0fccd0e9 | 524 | e1000_init_manageability(adapter); |
1da177e4 LT |
525 | |
526 | e1000_configure_tx(adapter); | |
527 | e1000_setup_rctl(adapter); | |
528 | e1000_configure_rx(adapter); | |
72d64a43 JK |
529 | /* call E1000_DESC_UNUSED which always leaves |
530 | * at least 1 descriptor unused to make sure | |
531 | * next_to_use != next_to_clean */ | |
f56799ea | 532 | for (i = 0; i < adapter->num_rx_queues; i++) { |
72d64a43 | 533 | struct e1000_rx_ring *ring = &adapter->rx_ring[i]; |
a292ca6e JK |
534 | adapter->alloc_rx_buf(adapter, ring, |
535 | E1000_DESC_UNUSED(ring)); | |
f56799ea | 536 | } |
1da177e4 | 537 | |
7bfa4816 JK |
538 | adapter->tx_queue_len = netdev->tx_queue_len; |
539 | ||
1da177e4 LT |
540 | #ifdef CONFIG_E1000_NAPI |
541 | netif_poll_enable(netdev); | |
542 | #endif | |
5de55624 MC |
543 | e1000_irq_enable(adapter); |
544 | ||
1314bbf3 AK |
545 | clear_bit(__E1000_DOWN, &adapter->flags); |
546 | ||
547 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | |
1da177e4 LT |
548 | return 0; |
549 | } | |
550 | ||
79f05bf0 AK |
551 | /** |
552 | * e1000_power_up_phy - restore link in case the phy was powered down | |
553 | * @adapter: address of board private structure | |
554 | * | |
555 | * The phy may be powered down to save power and turn off link when the | |
556 | * driver is unloaded and wake on lan is not enabled (among others) | |
557 | * *** this routine MUST be followed by a call to e1000_reset *** | |
558 | * | |
559 | **/ | |
560 | ||
d658266e | 561 | void e1000_power_up_phy(struct e1000_adapter *adapter) |
79f05bf0 AK |
562 | { |
563 | uint16_t mii_reg = 0; | |
564 | ||
565 | /* Just clear the power down bit to wake the phy back up */ | |
566 | if (adapter->hw.media_type == e1000_media_type_copper) { | |
567 | /* according to the manual, the phy will retain its | |
568 | * settings across a power-down/up cycle */ | |
569 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | |
570 | mii_reg &= ~MII_CR_POWER_DOWN; | |
571 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); | |
572 | } | |
573 | } | |
574 | ||
575 | static void e1000_power_down_phy(struct e1000_adapter *adapter) | |
576 | { | |
61c2505f BA |
577 | /* Power down the PHY so no link is implied when interface is down * |
578 | * The PHY cannot be powered down if any of the following is TRUE * | |
79f05bf0 AK |
579 | * (a) WoL is enabled |
580 | * (b) AMT is active | |
581 | * (c) SoL/IDER session is active */ | |
582 | if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 && | |
61c2505f | 583 | adapter->hw.media_type == e1000_media_type_copper) { |
79f05bf0 | 584 | uint16_t mii_reg = 0; |
61c2505f BA |
585 | |
586 | switch (adapter->hw.mac_type) { | |
587 | case e1000_82540: | |
588 | case e1000_82545: | |
589 | case e1000_82545_rev_3: | |
590 | case e1000_82546: | |
591 | case e1000_82546_rev_3: | |
592 | case e1000_82541: | |
593 | case e1000_82541_rev_2: | |
594 | case e1000_82547: | |
595 | case e1000_82547_rev_2: | |
596 | if (E1000_READ_REG(&adapter->hw, MANC) & | |
597 | E1000_MANC_SMBUS_EN) | |
598 | goto out; | |
599 | break; | |
600 | case e1000_82571: | |
601 | case e1000_82572: | |
602 | case e1000_82573: | |
603 | case e1000_80003es2lan: | |
604 | case e1000_ich8lan: | |
605 | if (e1000_check_mng_mode(&adapter->hw) || | |
606 | e1000_check_phy_reset_block(&adapter->hw)) | |
607 | goto out; | |
608 | break; | |
609 | default: | |
610 | goto out; | |
611 | } | |
79f05bf0 AK |
612 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); |
613 | mii_reg |= MII_CR_POWER_DOWN; | |
614 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); | |
615 | mdelay(1); | |
616 | } | |
61c2505f BA |
617 | out: |
618 | return; | |
79f05bf0 AK |
619 | } |
620 | ||
1da177e4 LT |
621 | void |
622 | e1000_down(struct e1000_adapter *adapter) | |
623 | { | |
624 | struct net_device *netdev = adapter->netdev; | |
625 | ||
1314bbf3 AK |
626 | /* signal that we're down so the interrupt handler does not |
627 | * reschedule our watchdog timer */ | |
628 | set_bit(__E1000_DOWN, &adapter->flags); | |
629 | ||
1da177e4 | 630 | e1000_irq_disable(adapter); |
c1605eb3 | 631 | |
1da177e4 LT |
632 | del_timer_sync(&adapter->tx_fifo_stall_timer); |
633 | del_timer_sync(&adapter->watchdog_timer); | |
634 | del_timer_sync(&adapter->phy_info_timer); | |
635 | ||
636 | #ifdef CONFIG_E1000_NAPI | |
637 | netif_poll_disable(netdev); | |
638 | #endif | |
7bfa4816 | 639 | netdev->tx_queue_len = adapter->tx_queue_len; |
1da177e4 LT |
640 | adapter->link_speed = 0; |
641 | adapter->link_duplex = 0; | |
642 | netif_carrier_off(netdev); | |
643 | netif_stop_queue(netdev); | |
644 | ||
645 | e1000_reset(adapter); | |
581d708e MC |
646 | e1000_clean_all_tx_rings(adapter); |
647 | e1000_clean_all_rx_rings(adapter); | |
1da177e4 | 648 | } |
1da177e4 | 649 | |
2db10a08 AK |
650 | void |
651 | e1000_reinit_locked(struct e1000_adapter *adapter) | |
652 | { | |
653 | WARN_ON(in_interrupt()); | |
654 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) | |
655 | msleep(1); | |
656 | e1000_down(adapter); | |
657 | e1000_up(adapter); | |
658 | clear_bit(__E1000_RESETTING, &adapter->flags); | |
1da177e4 LT |
659 | } |
660 | ||
661 | void | |
662 | e1000_reset(struct e1000_adapter *adapter) | |
663 | { | |
018ea44e | 664 | uint32_t pba = 0, tx_space, min_tx_space, min_rx_space; |
1125ecbc | 665 | uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF; |
018ea44e | 666 | boolean_t legacy_pba_adjust = FALSE; |
1da177e4 LT |
667 | |
668 | /* Repartition Pba for greater than 9k mtu | |
669 | * To take effect CTRL.RST is required. | |
670 | */ | |
671 | ||
2d7edb92 | 672 | switch (adapter->hw.mac_type) { |
018ea44e BA |
673 | case e1000_82542_rev2_0: |
674 | case e1000_82542_rev2_1: | |
675 | case e1000_82543: | |
676 | case e1000_82544: | |
677 | case e1000_82540: | |
678 | case e1000_82541: | |
679 | case e1000_82541_rev_2: | |
680 | legacy_pba_adjust = TRUE; | |
681 | pba = E1000_PBA_48K; | |
682 | break; | |
683 | case e1000_82545: | |
684 | case e1000_82545_rev_3: | |
685 | case e1000_82546: | |
686 | case e1000_82546_rev_3: | |
687 | pba = E1000_PBA_48K; | |
688 | break; | |
2d7edb92 | 689 | case e1000_82547: |
0e6ef3e0 | 690 | case e1000_82547_rev_2: |
018ea44e | 691 | legacy_pba_adjust = TRUE; |
2d7edb92 MC |
692 | pba = E1000_PBA_30K; |
693 | break; | |
868d5309 MC |
694 | case e1000_82571: |
695 | case e1000_82572: | |
6418ecc6 | 696 | case e1000_80003es2lan: |
868d5309 MC |
697 | pba = E1000_PBA_38K; |
698 | break; | |
2d7edb92 | 699 | case e1000_82573: |
018ea44e | 700 | pba = E1000_PBA_20K; |
2d7edb92 | 701 | break; |
cd94dd0b AK |
702 | case e1000_ich8lan: |
703 | pba = E1000_PBA_8K; | |
018ea44e BA |
704 | case e1000_undefined: |
705 | case e1000_num_macs: | |
2d7edb92 MC |
706 | break; |
707 | } | |
708 | ||
018ea44e BA |
709 | if (legacy_pba_adjust == TRUE) { |
710 | if (adapter->netdev->mtu > E1000_RXBUFFER_8192) | |
711 | pba -= 8; /* allocate more FIFO for Tx */ | |
2d7edb92 | 712 | |
018ea44e BA |
713 | if (adapter->hw.mac_type == e1000_82547) { |
714 | adapter->tx_fifo_head = 0; | |
715 | adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT; | |
716 | adapter->tx_fifo_size = | |
717 | (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT; | |
718 | atomic_set(&adapter->tx_fifo_stall, 0); | |
719 | } | |
720 | } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) { | |
721 | /* adjust PBA for jumbo frames */ | |
722 | E1000_WRITE_REG(&adapter->hw, PBA, pba); | |
723 | ||
724 | /* To maintain wire speed transmits, the Tx FIFO should be | |
725 | * large enough to accomodate two full transmit packets, | |
726 | * rounded up to the next 1KB and expressed in KB. Likewise, | |
727 | * the Rx FIFO should be large enough to accomodate at least | |
728 | * one full receive packet and is similarly rounded up and | |
729 | * expressed in KB. */ | |
730 | pba = E1000_READ_REG(&adapter->hw, PBA); | |
731 | /* upper 16 bits has Tx packet buffer allocation size in KB */ | |
732 | tx_space = pba >> 16; | |
733 | /* lower 16 bits has Rx packet buffer allocation size in KB */ | |
734 | pba &= 0xffff; | |
735 | /* don't include ethernet FCS because hardware appends/strips */ | |
736 | min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE + | |
737 | VLAN_TAG_SIZE; | |
738 | min_tx_space = min_rx_space; | |
739 | min_tx_space *= 2; | |
740 | E1000_ROUNDUP(min_tx_space, 1024); | |
741 | min_tx_space >>= 10; | |
742 | E1000_ROUNDUP(min_rx_space, 1024); | |
743 | min_rx_space >>= 10; | |
744 | ||
745 | /* If current Tx allocation is less than the min Tx FIFO size, | |
746 | * and the min Tx FIFO size is less than the current Rx FIFO | |
747 | * allocation, take space away from current Rx allocation */ | |
748 | if (tx_space < min_tx_space && | |
749 | ((min_tx_space - tx_space) < pba)) { | |
750 | pba = pba - (min_tx_space - tx_space); | |
751 | ||
752 | /* PCI/PCIx hardware has PBA alignment constraints */ | |
753 | switch (adapter->hw.mac_type) { | |
754 | case e1000_82545 ... e1000_82546_rev_3: | |
755 | pba &= ~(E1000_PBA_8K - 1); | |
756 | break; | |
757 | default: | |
758 | break; | |
759 | } | |
760 | ||
761 | /* if short on rx space, rx wins and must trump tx | |
762 | * adjustment or use Early Receive if available */ | |
763 | if (pba < min_rx_space) { | |
764 | switch (adapter->hw.mac_type) { | |
765 | case e1000_82573: | |
766 | /* ERT enabled in e1000_configure_rx */ | |
767 | break; | |
768 | default: | |
769 | pba = min_rx_space; | |
770 | break; | |
771 | } | |
772 | } | |
773 | } | |
1da177e4 | 774 | } |
2d7edb92 | 775 | |
1da177e4 LT |
776 | E1000_WRITE_REG(&adapter->hw, PBA, pba); |
777 | ||
778 | /* flow control settings */ | |
f11b7f85 JK |
779 | /* Set the FC high water mark to 90% of the FIFO size. |
780 | * Required to clear last 3 LSB */ | |
781 | fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8; | |
cd94dd0b AK |
782 | /* We can't use 90% on small FIFOs because the remainder |
783 | * would be less than 1 full frame. In this case, we size | |
784 | * it to allow at least a full frame above the high water | |
785 | * mark. */ | |
786 | if (pba < E1000_PBA_16K) | |
787 | fc_high_water_mark = (pba * 1024) - 1600; | |
f11b7f85 JK |
788 | |
789 | adapter->hw.fc_high_water = fc_high_water_mark; | |
790 | adapter->hw.fc_low_water = fc_high_water_mark - 8; | |
87041639 JK |
791 | if (adapter->hw.mac_type == e1000_80003es2lan) |
792 | adapter->hw.fc_pause_time = 0xFFFF; | |
793 | else | |
794 | adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME; | |
1da177e4 LT |
795 | adapter->hw.fc_send_xon = 1; |
796 | adapter->hw.fc = adapter->hw.original_fc; | |
797 | ||
2d7edb92 | 798 | /* Allow time for pending master requests to run */ |
1da177e4 | 799 | e1000_reset_hw(&adapter->hw); |
96838a40 | 800 | if (adapter->hw.mac_type >= e1000_82544) |
1da177e4 | 801 | E1000_WRITE_REG(&adapter->hw, WUC, 0); |
09ae3e88 | 802 | |
96838a40 | 803 | if (e1000_init_hw(&adapter->hw)) |
1da177e4 | 804 | DPRINTK(PROBE, ERR, "Hardware Error\n"); |
2d7edb92 | 805 | e1000_update_mng_vlan(adapter); |
3d5460a0 JB |
806 | |
807 | /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */ | |
808 | if (adapter->hw.mac_type >= e1000_82544 && | |
809 | adapter->hw.mac_type <= e1000_82547_rev_2 && | |
810 | adapter->hw.autoneg == 1 && | |
811 | adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) { | |
812 | uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
813 | /* clear phy power management bit if we are in gig only mode, | |
814 | * which if enabled will attempt negotiation to 100Mb, which | |
815 | * can cause a loss of link at power off or driver unload */ | |
816 | ctrl &= ~E1000_CTRL_SWDPIN3; | |
817 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
818 | } | |
819 | ||
1da177e4 LT |
820 | /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ |
821 | E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE); | |
822 | ||
823 | e1000_reset_adaptive(&adapter->hw); | |
824 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
9a53a202 AK |
825 | |
826 | if (!adapter->smart_power_down && | |
827 | (adapter->hw.mac_type == e1000_82571 || | |
828 | adapter->hw.mac_type == e1000_82572)) { | |
829 | uint16_t phy_data = 0; | |
830 | /* speed up time to link by disabling smart power down, ignore | |
831 | * the return value of this function because there is nothing | |
832 | * different we would do if it failed */ | |
833 | e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT, | |
834 | &phy_data); | |
835 | phy_data &= ~IGP02E1000_PM_SPD; | |
836 | e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT, | |
837 | phy_data); | |
838 | } | |
839 | ||
0fccd0e9 | 840 | e1000_release_manageability(adapter); |
1da177e4 LT |
841 | } |
842 | ||
843 | /** | |
844 | * e1000_probe - Device Initialization Routine | |
845 | * @pdev: PCI device information struct | |
846 | * @ent: entry in e1000_pci_tbl | |
847 | * | |
848 | * Returns 0 on success, negative on failure | |
849 | * | |
850 | * e1000_probe initializes an adapter identified by a pci_dev structure. | |
851 | * The OS initialization, configuring of the adapter private structure, | |
852 | * and a hardware reset occur. | |
853 | **/ | |
854 | ||
855 | static int __devinit | |
856 | e1000_probe(struct pci_dev *pdev, | |
857 | const struct pci_device_id *ent) | |
858 | { | |
859 | struct net_device *netdev; | |
860 | struct e1000_adapter *adapter; | |
2d7edb92 | 861 | unsigned long mmio_start, mmio_len; |
cd94dd0b | 862 | unsigned long flash_start, flash_len; |
2d7edb92 | 863 | |
1da177e4 | 864 | static int cards_found = 0; |
120cd576 | 865 | static int global_quad_port_a = 0; /* global ksp3 port a indication */ |
2d7edb92 | 866 | int i, err, pci_using_dac; |
120cd576 | 867 | uint16_t eeprom_data = 0; |
1da177e4 | 868 | uint16_t eeprom_apme_mask = E1000_EEPROM_APME; |
96838a40 | 869 | if ((err = pci_enable_device(pdev))) |
1da177e4 LT |
870 | return err; |
871 | ||
cd94dd0b AK |
872 | if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) && |
873 | !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) { | |
1da177e4 LT |
874 | pci_using_dac = 1; |
875 | } else { | |
cd94dd0b AK |
876 | if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) && |
877 | (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) { | |
1da177e4 | 878 | E1000_ERR("No usable DMA configuration, aborting\n"); |
6dd62ab0 | 879 | goto err_dma; |
1da177e4 LT |
880 | } |
881 | pci_using_dac = 0; | |
882 | } | |
883 | ||
96838a40 | 884 | if ((err = pci_request_regions(pdev, e1000_driver_name))) |
6dd62ab0 | 885 | goto err_pci_reg; |
1da177e4 LT |
886 | |
887 | pci_set_master(pdev); | |
888 | ||
6dd62ab0 | 889 | err = -ENOMEM; |
1da177e4 | 890 | netdev = alloc_etherdev(sizeof(struct e1000_adapter)); |
6dd62ab0 | 891 | if (!netdev) |
1da177e4 | 892 | goto err_alloc_etherdev; |
1da177e4 LT |
893 | |
894 | SET_MODULE_OWNER(netdev); | |
895 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
896 | ||
897 | pci_set_drvdata(pdev, netdev); | |
60490fe0 | 898 | adapter = netdev_priv(netdev); |
1da177e4 LT |
899 | adapter->netdev = netdev; |
900 | adapter->pdev = pdev; | |
901 | adapter->hw.back = adapter; | |
902 | adapter->msg_enable = (1 << debug) - 1; | |
903 | ||
904 | mmio_start = pci_resource_start(pdev, BAR_0); | |
905 | mmio_len = pci_resource_len(pdev, BAR_0); | |
906 | ||
6dd62ab0 | 907 | err = -EIO; |
1da177e4 | 908 | adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); |
6dd62ab0 | 909 | if (!adapter->hw.hw_addr) |
1da177e4 | 910 | goto err_ioremap; |
1da177e4 | 911 | |
96838a40 JB |
912 | for (i = BAR_1; i <= BAR_5; i++) { |
913 | if (pci_resource_len(pdev, i) == 0) | |
1da177e4 | 914 | continue; |
96838a40 | 915 | if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { |
1da177e4 LT |
916 | adapter->hw.io_base = pci_resource_start(pdev, i); |
917 | break; | |
918 | } | |
919 | } | |
920 | ||
921 | netdev->open = &e1000_open; | |
922 | netdev->stop = &e1000_close; | |
923 | netdev->hard_start_xmit = &e1000_xmit_frame; | |
924 | netdev->get_stats = &e1000_get_stats; | |
925 | netdev->set_multicast_list = &e1000_set_multi; | |
926 | netdev->set_mac_address = &e1000_set_mac; | |
927 | netdev->change_mtu = &e1000_change_mtu; | |
928 | netdev->do_ioctl = &e1000_ioctl; | |
929 | e1000_set_ethtool_ops(netdev); | |
930 | netdev->tx_timeout = &e1000_tx_timeout; | |
931 | netdev->watchdog_timeo = 5 * HZ; | |
932 | #ifdef CONFIG_E1000_NAPI | |
933 | netdev->poll = &e1000_clean; | |
934 | netdev->weight = 64; | |
935 | #endif | |
936 | netdev->vlan_rx_register = e1000_vlan_rx_register; | |
937 | netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid; | |
938 | netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid; | |
939 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
940 | netdev->poll_controller = e1000_netpoll; | |
941 | #endif | |
0eb5a34c | 942 | strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); |
1da177e4 LT |
943 | |
944 | netdev->mem_start = mmio_start; | |
945 | netdev->mem_end = mmio_start + mmio_len; | |
946 | netdev->base_addr = adapter->hw.io_base; | |
947 | ||
948 | adapter->bd_number = cards_found; | |
949 | ||
950 | /* setup the private structure */ | |
951 | ||
96838a40 | 952 | if ((err = e1000_sw_init(adapter))) |
1da177e4 LT |
953 | goto err_sw_init; |
954 | ||
6dd62ab0 | 955 | err = -EIO; |
cd94dd0b AK |
956 | /* Flash BAR mapping must happen after e1000_sw_init |
957 | * because it depends on mac_type */ | |
958 | if ((adapter->hw.mac_type == e1000_ich8lan) && | |
959 | (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { | |
960 | flash_start = pci_resource_start(pdev, 1); | |
961 | flash_len = pci_resource_len(pdev, 1); | |
962 | adapter->hw.flash_address = ioremap(flash_start, flash_len); | |
6dd62ab0 | 963 | if (!adapter->hw.flash_address) |
cd94dd0b | 964 | goto err_flashmap; |
cd94dd0b AK |
965 | } |
966 | ||
6dd62ab0 | 967 | if (e1000_check_phy_reset_block(&adapter->hw)) |
2d7edb92 MC |
968 | DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n"); |
969 | ||
96838a40 | 970 | if (adapter->hw.mac_type >= e1000_82543) { |
1da177e4 LT |
971 | netdev->features = NETIF_F_SG | |
972 | NETIF_F_HW_CSUM | | |
973 | NETIF_F_HW_VLAN_TX | | |
974 | NETIF_F_HW_VLAN_RX | | |
975 | NETIF_F_HW_VLAN_FILTER; | |
cd94dd0b AK |
976 | if (adapter->hw.mac_type == e1000_ich8lan) |
977 | netdev->features &= ~NETIF_F_HW_VLAN_FILTER; | |
1da177e4 LT |
978 | } |
979 | ||
980 | #ifdef NETIF_F_TSO | |
96838a40 | 981 | if ((adapter->hw.mac_type >= e1000_82544) && |
1da177e4 LT |
982 | (adapter->hw.mac_type != e1000_82547)) |
983 | netdev->features |= NETIF_F_TSO; | |
2d7edb92 | 984 | |
72f3ab74 JB |
985 | #ifdef CONFIG_DEBUG_SLAB |
986 | /* 82544's work arounds do not play nicely with DEBUG SLAB */ | |
987 | if (adapter->hw.mac_type == e1000_82544) | |
988 | netdev->features &= ~NETIF_F_TSO; | |
989 | #endif | |
990 | ||
87ca4e5b | 991 | #ifdef NETIF_F_TSO6 |
96838a40 | 992 | if (adapter->hw.mac_type > e1000_82547_rev_2) |
87ca4e5b | 993 | netdev->features |= NETIF_F_TSO6; |
2d7edb92 | 994 | #endif |
1da177e4 | 995 | #endif |
96838a40 | 996 | if (pci_using_dac) |
1da177e4 LT |
997 | netdev->features |= NETIF_F_HIGHDMA; |
998 | ||
76c224bc AK |
999 | netdev->features |= NETIF_F_LLTX; |
1000 | ||
2d7edb92 MC |
1001 | adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw); |
1002 | ||
cd94dd0b AK |
1003 | /* initialize eeprom parameters */ |
1004 | ||
1005 | if (e1000_init_eeprom_params(&adapter->hw)) { | |
1006 | E1000_ERR("EEPROM initialization failed\n"); | |
6dd62ab0 | 1007 | goto err_eeprom; |
cd94dd0b AK |
1008 | } |
1009 | ||
96838a40 | 1010 | /* before reading the EEPROM, reset the controller to |
1da177e4 | 1011 | * put the device in a known good starting state */ |
96838a40 | 1012 | |
1da177e4 LT |
1013 | e1000_reset_hw(&adapter->hw); |
1014 | ||
1015 | /* make sure the EEPROM is good */ | |
1016 | ||
96838a40 | 1017 | if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) { |
1da177e4 | 1018 | DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n"); |
1da177e4 LT |
1019 | goto err_eeprom; |
1020 | } | |
1021 | ||
1022 | /* copy the MAC address out of the EEPROM */ | |
1023 | ||
96838a40 | 1024 | if (e1000_read_mac_addr(&adapter->hw)) |
1da177e4 LT |
1025 | DPRINTK(PROBE, ERR, "EEPROM Read Error\n"); |
1026 | memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); | |
9beb0ac1 | 1027 | memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); |
1da177e4 | 1028 | |
96838a40 | 1029 | if (!is_valid_ether_addr(netdev->perm_addr)) { |
1da177e4 | 1030 | DPRINTK(PROBE, ERR, "Invalid MAC Address\n"); |
1da177e4 LT |
1031 | goto err_eeprom; |
1032 | } | |
1033 | ||
1da177e4 LT |
1034 | e1000_get_bus_info(&adapter->hw); |
1035 | ||
1036 | init_timer(&adapter->tx_fifo_stall_timer); | |
1037 | adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall; | |
1038 | adapter->tx_fifo_stall_timer.data = (unsigned long) adapter; | |
1039 | ||
1040 | init_timer(&adapter->watchdog_timer); | |
1041 | adapter->watchdog_timer.function = &e1000_watchdog; | |
1042 | adapter->watchdog_timer.data = (unsigned long) adapter; | |
1043 | ||
1da177e4 LT |
1044 | init_timer(&adapter->phy_info_timer); |
1045 | adapter->phy_info_timer.function = &e1000_update_phy_info; | |
1046 | adapter->phy_info_timer.data = (unsigned long) adapter; | |
1047 | ||
65f27f38 | 1048 | INIT_WORK(&adapter->reset_task, e1000_reset_task); |
1da177e4 | 1049 | |
1da177e4 LT |
1050 | e1000_check_options(adapter); |
1051 | ||
1052 | /* Initial Wake on LAN setting | |
1053 | * If APM wake is enabled in the EEPROM, | |
1054 | * enable the ACPI Magic Packet filter | |
1055 | */ | |
1056 | ||
96838a40 | 1057 | switch (adapter->hw.mac_type) { |
1da177e4 LT |
1058 | case e1000_82542_rev2_0: |
1059 | case e1000_82542_rev2_1: | |
1060 | case e1000_82543: | |
1061 | break; | |
1062 | case e1000_82544: | |
1063 | e1000_read_eeprom(&adapter->hw, | |
1064 | EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data); | |
1065 | eeprom_apme_mask = E1000_EEPROM_82544_APM; | |
1066 | break; | |
cd94dd0b AK |
1067 | case e1000_ich8lan: |
1068 | e1000_read_eeprom(&adapter->hw, | |
1069 | EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data); | |
1070 | eeprom_apme_mask = E1000_EEPROM_ICH8_APME; | |
1071 | break; | |
1da177e4 LT |
1072 | case e1000_82546: |
1073 | case e1000_82546_rev_3: | |
fd803241 | 1074 | case e1000_82571: |
6418ecc6 | 1075 | case e1000_80003es2lan: |
96838a40 | 1076 | if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){ |
1da177e4 LT |
1077 | e1000_read_eeprom(&adapter->hw, |
1078 | EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); | |
1079 | break; | |
1080 | } | |
1081 | /* Fall Through */ | |
1082 | default: | |
1083 | e1000_read_eeprom(&adapter->hw, | |
1084 | EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); | |
1085 | break; | |
1086 | } | |
96838a40 | 1087 | if (eeprom_data & eeprom_apme_mask) |
120cd576 JB |
1088 | adapter->eeprom_wol |= E1000_WUFC_MAG; |
1089 | ||
1090 | /* now that we have the eeprom settings, apply the special cases | |
1091 | * where the eeprom may be wrong or the board simply won't support | |
1092 | * wake on lan on a particular port */ | |
1093 | switch (pdev->device) { | |
1094 | case E1000_DEV_ID_82546GB_PCIE: | |
1095 | adapter->eeprom_wol = 0; | |
1096 | break; | |
1097 | case E1000_DEV_ID_82546EB_FIBER: | |
1098 | case E1000_DEV_ID_82546GB_FIBER: | |
1099 | case E1000_DEV_ID_82571EB_FIBER: | |
1100 | /* Wake events only supported on port A for dual fiber | |
1101 | * regardless of eeprom setting */ | |
1102 | if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1) | |
1103 | adapter->eeprom_wol = 0; | |
1104 | break; | |
1105 | case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: | |
5881cde8 | 1106 | case E1000_DEV_ID_82571EB_QUAD_COPPER: |
fc2307d0 | 1107 | case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE: |
120cd576 JB |
1108 | /* if quad port adapter, disable WoL on all but port A */ |
1109 | if (global_quad_port_a != 0) | |
1110 | adapter->eeprom_wol = 0; | |
1111 | else | |
1112 | adapter->quad_port_a = 1; | |
1113 | /* Reset for multiple quad port adapters */ | |
1114 | if (++global_quad_port_a == 4) | |
1115 | global_quad_port_a = 0; | |
1116 | break; | |
1117 | } | |
1118 | ||
1119 | /* initialize the wol settings based on the eeprom settings */ | |
1120 | adapter->wol = adapter->eeprom_wol; | |
1da177e4 | 1121 | |
fb3d47d4 JK |
1122 | /* print bus type/speed/width info */ |
1123 | { | |
1124 | struct e1000_hw *hw = &adapter->hw; | |
1125 | DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ", | |
1126 | ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : | |
1127 | (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")), | |
1128 | ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" : | |
1129 | (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" : | |
1130 | (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" : | |
1131 | (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" : | |
1132 | (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"), | |
1133 | ((hw->bus_width == e1000_bus_width_64) ? "64-bit" : | |
1134 | (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" : | |
1135 | (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" : | |
1136 | "32-bit")); | |
1137 | } | |
1138 | ||
1139 | for (i = 0; i < 6; i++) | |
1140 | printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':'); | |
1141 | ||
1da177e4 LT |
1142 | /* reset the hardware with the new settings */ |
1143 | e1000_reset(adapter); | |
1144 | ||
b55ccb35 JK |
1145 | /* If the controller is 82573 and f/w is AMT, do not set |
1146 | * DRV_LOAD until the interface is up. For all other cases, | |
1147 | * let the f/w know that the h/w is now under the control | |
1148 | * of the driver. */ | |
1149 | if (adapter->hw.mac_type != e1000_82573 || | |
1150 | !e1000_check_mng_mode(&adapter->hw)) | |
1151 | e1000_get_hw_control(adapter); | |
2d7edb92 | 1152 | |
1da177e4 | 1153 | strcpy(netdev->name, "eth%d"); |
96838a40 | 1154 | if ((err = register_netdev(netdev))) |
1da177e4 LT |
1155 | goto err_register; |
1156 | ||
1314bbf3 AK |
1157 | /* tell the stack to leave us alone until e1000_open() is called */ |
1158 | netif_carrier_off(netdev); | |
1159 | netif_stop_queue(netdev); | |
1160 | ||
1da177e4 LT |
1161 | DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n"); |
1162 | ||
1163 | cards_found++; | |
1164 | return 0; | |
1165 | ||
1166 | err_register: | |
6dd62ab0 VA |
1167 | e1000_release_hw_control(adapter); |
1168 | err_eeprom: | |
1169 | if (!e1000_check_phy_reset_block(&adapter->hw)) | |
1170 | e1000_phy_hw_reset(&adapter->hw); | |
1171 | ||
cd94dd0b AK |
1172 | if (adapter->hw.flash_address) |
1173 | iounmap(adapter->hw.flash_address); | |
1174 | err_flashmap: | |
6dd62ab0 VA |
1175 | #ifdef CONFIG_E1000_NAPI |
1176 | for (i = 0; i < adapter->num_rx_queues; i++) | |
1177 | dev_put(&adapter->polling_netdev[i]); | |
1178 | #endif | |
1179 | ||
1180 | kfree(adapter->tx_ring); | |
1181 | kfree(adapter->rx_ring); | |
1182 | #ifdef CONFIG_E1000_NAPI | |
1183 | kfree(adapter->polling_netdev); | |
1184 | #endif | |
1da177e4 | 1185 | err_sw_init: |
1da177e4 LT |
1186 | iounmap(adapter->hw.hw_addr); |
1187 | err_ioremap: | |
1188 | free_netdev(netdev); | |
1189 | err_alloc_etherdev: | |
1190 | pci_release_regions(pdev); | |
6dd62ab0 VA |
1191 | err_pci_reg: |
1192 | err_dma: | |
1193 | pci_disable_device(pdev); | |
1da177e4 LT |
1194 | return err; |
1195 | } | |
1196 | ||
1197 | /** | |
1198 | * e1000_remove - Device Removal Routine | |
1199 | * @pdev: PCI device information struct | |
1200 | * | |
1201 | * e1000_remove is called by the PCI subsystem to alert the driver | |
1202 | * that it should release a PCI device. The could be caused by a | |
1203 | * Hot-Plug event, or because the driver is going to be removed from | |
1204 | * memory. | |
1205 | **/ | |
1206 | ||
1207 | static void __devexit | |
1208 | e1000_remove(struct pci_dev *pdev) | |
1209 | { | |
1210 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 1211 | struct e1000_adapter *adapter = netdev_priv(netdev); |
581d708e MC |
1212 | #ifdef CONFIG_E1000_NAPI |
1213 | int i; | |
1214 | #endif | |
1da177e4 | 1215 | |
be2b28ed JG |
1216 | flush_scheduled_work(); |
1217 | ||
0fccd0e9 | 1218 | e1000_release_manageability(adapter); |
1da177e4 | 1219 | |
b55ccb35 JK |
1220 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
1221 | * would have already happened in close and is redundant. */ | |
1222 | e1000_release_hw_control(adapter); | |
2d7edb92 | 1223 | |
1da177e4 | 1224 | unregister_netdev(netdev); |
581d708e | 1225 | #ifdef CONFIG_E1000_NAPI |
f56799ea | 1226 | for (i = 0; i < adapter->num_rx_queues; i++) |
15333061 | 1227 | dev_put(&adapter->polling_netdev[i]); |
581d708e | 1228 | #endif |
1da177e4 | 1229 | |
96838a40 | 1230 | if (!e1000_check_phy_reset_block(&adapter->hw)) |
2d7edb92 | 1231 | e1000_phy_hw_reset(&adapter->hw); |
1da177e4 | 1232 | |
24025e4e MC |
1233 | kfree(adapter->tx_ring); |
1234 | kfree(adapter->rx_ring); | |
1235 | #ifdef CONFIG_E1000_NAPI | |
1236 | kfree(adapter->polling_netdev); | |
1237 | #endif | |
1238 | ||
1da177e4 | 1239 | iounmap(adapter->hw.hw_addr); |
cd94dd0b AK |
1240 | if (adapter->hw.flash_address) |
1241 | iounmap(adapter->hw.flash_address); | |
1da177e4 LT |
1242 | pci_release_regions(pdev); |
1243 | ||
1244 | free_netdev(netdev); | |
1245 | ||
1246 | pci_disable_device(pdev); | |
1247 | } | |
1248 | ||
1249 | /** | |
1250 | * e1000_sw_init - Initialize general software structures (struct e1000_adapter) | |
1251 | * @adapter: board private structure to initialize | |
1252 | * | |
1253 | * e1000_sw_init initializes the Adapter private data structure. | |
1254 | * Fields are initialized based on PCI device information and | |
1255 | * OS network device settings (MTU size). | |
1256 | **/ | |
1257 | ||
1258 | static int __devinit | |
1259 | e1000_sw_init(struct e1000_adapter *adapter) | |
1260 | { | |
1261 | struct e1000_hw *hw = &adapter->hw; | |
1262 | struct net_device *netdev = adapter->netdev; | |
1263 | struct pci_dev *pdev = adapter->pdev; | |
581d708e MC |
1264 | #ifdef CONFIG_E1000_NAPI |
1265 | int i; | |
1266 | #endif | |
1da177e4 LT |
1267 | |
1268 | /* PCI config space info */ | |
1269 | ||
1270 | hw->vendor_id = pdev->vendor; | |
1271 | hw->device_id = pdev->device; | |
1272 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
1273 | hw->subsystem_id = pdev->subsystem_device; | |
1274 | ||
1275 | pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); | |
1276 | ||
1277 | pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); | |
1278 | ||
eb0f8054 | 1279 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; |
9e2feace | 1280 | adapter->rx_ps_bsize0 = E1000_RXBUFFER_128; |
1da177e4 LT |
1281 | hw->max_frame_size = netdev->mtu + |
1282 | ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; | |
1283 | hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE; | |
1284 | ||
1285 | /* identify the MAC */ | |
1286 | ||
96838a40 | 1287 | if (e1000_set_mac_type(hw)) { |
1da177e4 LT |
1288 | DPRINTK(PROBE, ERR, "Unknown MAC Type\n"); |
1289 | return -EIO; | |
1290 | } | |
1291 | ||
96838a40 | 1292 | switch (hw->mac_type) { |
1da177e4 LT |
1293 | default: |
1294 | break; | |
1295 | case e1000_82541: | |
1296 | case e1000_82547: | |
1297 | case e1000_82541_rev_2: | |
1298 | case e1000_82547_rev_2: | |
1299 | hw->phy_init_script = 1; | |
1300 | break; | |
1301 | } | |
1302 | ||
1303 | e1000_set_media_type(hw); | |
1304 | ||
1305 | hw->wait_autoneg_complete = FALSE; | |
1306 | hw->tbi_compatibility_en = TRUE; | |
1307 | hw->adaptive_ifs = TRUE; | |
1308 | ||
1309 | /* Copper options */ | |
1310 | ||
96838a40 | 1311 | if (hw->media_type == e1000_media_type_copper) { |
1da177e4 LT |
1312 | hw->mdix = AUTO_ALL_MODES; |
1313 | hw->disable_polarity_correction = FALSE; | |
1314 | hw->master_slave = E1000_MASTER_SLAVE; | |
1315 | } | |
1316 | ||
f56799ea JK |
1317 | adapter->num_tx_queues = 1; |
1318 | adapter->num_rx_queues = 1; | |
581d708e MC |
1319 | |
1320 | if (e1000_alloc_queues(adapter)) { | |
1321 | DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n"); | |
1322 | return -ENOMEM; | |
1323 | } | |
1324 | ||
1325 | #ifdef CONFIG_E1000_NAPI | |
f56799ea | 1326 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
1327 | adapter->polling_netdev[i].priv = adapter; |
1328 | adapter->polling_netdev[i].poll = &e1000_clean; | |
1329 | adapter->polling_netdev[i].weight = 64; | |
1330 | dev_hold(&adapter->polling_netdev[i]); | |
1331 | set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state); | |
1332 | } | |
7bfa4816 | 1333 | spin_lock_init(&adapter->tx_queue_lock); |
24025e4e MC |
1334 | #endif |
1335 | ||
1da177e4 LT |
1336 | atomic_set(&adapter->irq_sem, 1); |
1337 | spin_lock_init(&adapter->stats_lock); | |
1da177e4 | 1338 | |
1314bbf3 AK |
1339 | set_bit(__E1000_DOWN, &adapter->flags); |
1340 | ||
1da177e4 LT |
1341 | return 0; |
1342 | } | |
1343 | ||
581d708e MC |
1344 | /** |
1345 | * e1000_alloc_queues - Allocate memory for all rings | |
1346 | * @adapter: board private structure to initialize | |
1347 | * | |
1348 | * We allocate one ring per queue at run-time since we don't know the | |
1349 | * number of queues at compile-time. The polling_netdev array is | |
1350 | * intended for Multiqueue, but should work fine with a single queue. | |
1351 | **/ | |
1352 | ||
1353 | static int __devinit | |
1354 | e1000_alloc_queues(struct e1000_adapter *adapter) | |
1355 | { | |
1356 | int size; | |
1357 | ||
f56799ea | 1358 | size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues; |
581d708e MC |
1359 | adapter->tx_ring = kmalloc(size, GFP_KERNEL); |
1360 | if (!adapter->tx_ring) | |
1361 | return -ENOMEM; | |
1362 | memset(adapter->tx_ring, 0, size); | |
1363 | ||
f56799ea | 1364 | size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues; |
581d708e MC |
1365 | adapter->rx_ring = kmalloc(size, GFP_KERNEL); |
1366 | if (!adapter->rx_ring) { | |
1367 | kfree(adapter->tx_ring); | |
1368 | return -ENOMEM; | |
1369 | } | |
1370 | memset(adapter->rx_ring, 0, size); | |
1371 | ||
1372 | #ifdef CONFIG_E1000_NAPI | |
f56799ea | 1373 | size = sizeof(struct net_device) * adapter->num_rx_queues; |
581d708e MC |
1374 | adapter->polling_netdev = kmalloc(size, GFP_KERNEL); |
1375 | if (!adapter->polling_netdev) { | |
1376 | kfree(adapter->tx_ring); | |
1377 | kfree(adapter->rx_ring); | |
1378 | return -ENOMEM; | |
1379 | } | |
1380 | memset(adapter->polling_netdev, 0, size); | |
1381 | #endif | |
1382 | ||
1383 | return E1000_SUCCESS; | |
1384 | } | |
1385 | ||
1da177e4 LT |
1386 | /** |
1387 | * e1000_open - Called when a network interface is made active | |
1388 | * @netdev: network interface device structure | |
1389 | * | |
1390 | * Returns 0 on success, negative value on failure | |
1391 | * | |
1392 | * The open entry point is called when a network interface is made | |
1393 | * active by the system (IFF_UP). At this point all resources needed | |
1394 | * for transmit and receive operations are allocated, the interrupt | |
1395 | * handler is registered with the OS, the watchdog timer is started, | |
1396 | * and the stack is notified that the interface is ready. | |
1397 | **/ | |
1398 | ||
1399 | static int | |
1400 | e1000_open(struct net_device *netdev) | |
1401 | { | |
60490fe0 | 1402 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1403 | int err; |
1404 | ||
2db10a08 | 1405 | /* disallow open during test */ |
1314bbf3 | 1406 | if (test_bit(__E1000_TESTING, &adapter->flags)) |
2db10a08 AK |
1407 | return -EBUSY; |
1408 | ||
1da177e4 | 1409 | /* allocate transmit descriptors */ |
581d708e | 1410 | if ((err = e1000_setup_all_tx_resources(adapter))) |
1da177e4 LT |
1411 | goto err_setup_tx; |
1412 | ||
1413 | /* allocate receive descriptors */ | |
581d708e | 1414 | if ((err = e1000_setup_all_rx_resources(adapter))) |
1da177e4 LT |
1415 | goto err_setup_rx; |
1416 | ||
2db10a08 AK |
1417 | err = e1000_request_irq(adapter); |
1418 | if (err) | |
401a552b | 1419 | goto err_req_irq; |
2db10a08 | 1420 | |
79f05bf0 AK |
1421 | e1000_power_up_phy(adapter); |
1422 | ||
96838a40 | 1423 | if ((err = e1000_up(adapter))) |
1da177e4 | 1424 | goto err_up; |
2d7edb92 | 1425 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; |
96838a40 | 1426 | if ((adapter->hw.mng_cookie.status & |
2d7edb92 MC |
1427 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { |
1428 | e1000_update_mng_vlan(adapter); | |
1429 | } | |
1da177e4 | 1430 | |
b55ccb35 JK |
1431 | /* If AMT is enabled, let the firmware know that the network |
1432 | * interface is now open */ | |
1433 | if (adapter->hw.mac_type == e1000_82573 && | |
1434 | e1000_check_mng_mode(&adapter->hw)) | |
1435 | e1000_get_hw_control(adapter); | |
1436 | ||
1da177e4 LT |
1437 | return E1000_SUCCESS; |
1438 | ||
1439 | err_up: | |
401a552b VA |
1440 | e1000_power_down_phy(adapter); |
1441 | e1000_free_irq(adapter); | |
1442 | err_req_irq: | |
581d708e | 1443 | e1000_free_all_rx_resources(adapter); |
1da177e4 | 1444 | err_setup_rx: |
581d708e | 1445 | e1000_free_all_tx_resources(adapter); |
1da177e4 LT |
1446 | err_setup_tx: |
1447 | e1000_reset(adapter); | |
1448 | ||
1449 | return err; | |
1450 | } | |
1451 | ||
1452 | /** | |
1453 | * e1000_close - Disables a network interface | |
1454 | * @netdev: network interface device structure | |
1455 | * | |
1456 | * Returns 0, this is not allowed to fail | |
1457 | * | |
1458 | * The close entry point is called when an interface is de-activated | |
1459 | * by the OS. The hardware is still under the drivers control, but | |
1460 | * needs to be disabled. A global MAC reset is issued to stop the | |
1461 | * hardware, and all transmit and receive resources are freed. | |
1462 | **/ | |
1463 | ||
1464 | static int | |
1465 | e1000_close(struct net_device *netdev) | |
1466 | { | |
60490fe0 | 1467 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 1468 | |
2db10a08 | 1469 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); |
1da177e4 | 1470 | e1000_down(adapter); |
79f05bf0 | 1471 | e1000_power_down_phy(adapter); |
2db10a08 | 1472 | e1000_free_irq(adapter); |
1da177e4 | 1473 | |
581d708e MC |
1474 | e1000_free_all_tx_resources(adapter); |
1475 | e1000_free_all_rx_resources(adapter); | |
1da177e4 | 1476 | |
4666560a BA |
1477 | /* kill manageability vlan ID if supported, but not if a vlan with |
1478 | * the same ID is registered on the host OS (let 8021q kill it) */ | |
96838a40 | 1479 | if ((adapter->hw.mng_cookie.status & |
4666560a BA |
1480 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && |
1481 | !(adapter->vlgrp && | |
1482 | adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) { | |
2d7edb92 MC |
1483 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); |
1484 | } | |
b55ccb35 JK |
1485 | |
1486 | /* If AMT is enabled, let the firmware know that the network | |
1487 | * interface is now closed */ | |
1488 | if (adapter->hw.mac_type == e1000_82573 && | |
1489 | e1000_check_mng_mode(&adapter->hw)) | |
1490 | e1000_release_hw_control(adapter); | |
1491 | ||
1da177e4 LT |
1492 | return 0; |
1493 | } | |
1494 | ||
1495 | /** | |
1496 | * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary | |
1497 | * @adapter: address of board private structure | |
2d7edb92 MC |
1498 | * @start: address of beginning of memory |
1499 | * @len: length of memory | |
1da177e4 | 1500 | **/ |
e619d523 | 1501 | static boolean_t |
1da177e4 LT |
1502 | e1000_check_64k_bound(struct e1000_adapter *adapter, |
1503 | void *start, unsigned long len) | |
1504 | { | |
1505 | unsigned long begin = (unsigned long) start; | |
1506 | unsigned long end = begin + len; | |
1507 | ||
2648345f MC |
1508 | /* First rev 82545 and 82546 need to not allow any memory |
1509 | * write location to cross 64k boundary due to errata 23 */ | |
1da177e4 | 1510 | if (adapter->hw.mac_type == e1000_82545 || |
2648345f | 1511 | adapter->hw.mac_type == e1000_82546) { |
1da177e4 LT |
1512 | return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE; |
1513 | } | |
1514 | ||
1515 | return TRUE; | |
1516 | } | |
1517 | ||
1518 | /** | |
1519 | * e1000_setup_tx_resources - allocate Tx resources (Descriptors) | |
1520 | * @adapter: board private structure | |
581d708e | 1521 | * @txdr: tx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1522 | * |
1523 | * Return 0 on success, negative on failure | |
1524 | **/ | |
1525 | ||
3ad2cc67 | 1526 | static int |
581d708e MC |
1527 | e1000_setup_tx_resources(struct e1000_adapter *adapter, |
1528 | struct e1000_tx_ring *txdr) | |
1da177e4 | 1529 | { |
1da177e4 LT |
1530 | struct pci_dev *pdev = adapter->pdev; |
1531 | int size; | |
1532 | ||
1533 | size = sizeof(struct e1000_buffer) * txdr->count; | |
cd94dd0b | 1534 | txdr->buffer_info = vmalloc(size); |
96838a40 | 1535 | if (!txdr->buffer_info) { |
2648345f MC |
1536 | DPRINTK(PROBE, ERR, |
1537 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1538 | return -ENOMEM; |
1539 | } | |
1540 | memset(txdr->buffer_info, 0, size); | |
1541 | ||
1542 | /* round up to nearest 4K */ | |
1543 | ||
1544 | txdr->size = txdr->count * sizeof(struct e1000_tx_desc); | |
1545 | E1000_ROUNDUP(txdr->size, 4096); | |
1546 | ||
1547 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); | |
96838a40 | 1548 | if (!txdr->desc) { |
1da177e4 | 1549 | setup_tx_desc_die: |
1da177e4 | 1550 | vfree(txdr->buffer_info); |
2648345f MC |
1551 | DPRINTK(PROBE, ERR, |
1552 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1553 | return -ENOMEM; |
1554 | } | |
1555 | ||
2648345f | 1556 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1557 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { |
1558 | void *olddesc = txdr->desc; | |
1559 | dma_addr_t olddma = txdr->dma; | |
2648345f MC |
1560 | DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes " |
1561 | "at %p\n", txdr->size, txdr->desc); | |
1562 | /* Try again, without freeing the previous */ | |
1da177e4 | 1563 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); |
2648345f | 1564 | /* Failed allocation, critical failure */ |
96838a40 | 1565 | if (!txdr->desc) { |
1da177e4 LT |
1566 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1567 | goto setup_tx_desc_die; | |
1568 | } | |
1569 | ||
1570 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { | |
1571 | /* give up */ | |
2648345f MC |
1572 | pci_free_consistent(pdev, txdr->size, txdr->desc, |
1573 | txdr->dma); | |
1da177e4 LT |
1574 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1575 | DPRINTK(PROBE, ERR, | |
2648345f MC |
1576 | "Unable to allocate aligned memory " |
1577 | "for the transmit descriptor ring\n"); | |
1da177e4 LT |
1578 | vfree(txdr->buffer_info); |
1579 | return -ENOMEM; | |
1580 | } else { | |
2648345f | 1581 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1582 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1583 | } | |
1584 | } | |
1585 | memset(txdr->desc, 0, txdr->size); | |
1586 | ||
1587 | txdr->next_to_use = 0; | |
1588 | txdr->next_to_clean = 0; | |
2ae76d98 | 1589 | spin_lock_init(&txdr->tx_lock); |
1da177e4 LT |
1590 | |
1591 | return 0; | |
1592 | } | |
1593 | ||
581d708e MC |
1594 | /** |
1595 | * e1000_setup_all_tx_resources - wrapper to allocate Tx resources | |
1596 | * (Descriptors) for all queues | |
1597 | * @adapter: board private structure | |
1598 | * | |
581d708e MC |
1599 | * Return 0 on success, negative on failure |
1600 | **/ | |
1601 | ||
1602 | int | |
1603 | e1000_setup_all_tx_resources(struct e1000_adapter *adapter) | |
1604 | { | |
1605 | int i, err = 0; | |
1606 | ||
f56799ea | 1607 | for (i = 0; i < adapter->num_tx_queues; i++) { |
581d708e MC |
1608 | err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]); |
1609 | if (err) { | |
1610 | DPRINTK(PROBE, ERR, | |
1611 | "Allocation for Tx Queue %u failed\n", i); | |
3fbbc72e VA |
1612 | for (i-- ; i >= 0; i--) |
1613 | e1000_free_tx_resources(adapter, | |
1614 | &adapter->tx_ring[i]); | |
581d708e MC |
1615 | break; |
1616 | } | |
1617 | } | |
1618 | ||
1619 | return err; | |
1620 | } | |
1621 | ||
1da177e4 LT |
1622 | /** |
1623 | * e1000_configure_tx - Configure 8254x Transmit Unit after Reset | |
1624 | * @adapter: board private structure | |
1625 | * | |
1626 | * Configure the Tx unit of the MAC after a reset. | |
1627 | **/ | |
1628 | ||
1629 | static void | |
1630 | e1000_configure_tx(struct e1000_adapter *adapter) | |
1631 | { | |
581d708e MC |
1632 | uint64_t tdba; |
1633 | struct e1000_hw *hw = &adapter->hw; | |
1634 | uint32_t tdlen, tctl, tipg, tarc; | |
0fadb059 | 1635 | uint32_t ipgr1, ipgr2; |
1da177e4 LT |
1636 | |
1637 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
1638 | ||
f56799ea | 1639 | switch (adapter->num_tx_queues) { |
24025e4e MC |
1640 | case 1: |
1641 | default: | |
581d708e MC |
1642 | tdba = adapter->tx_ring[0].dma; |
1643 | tdlen = adapter->tx_ring[0].count * | |
1644 | sizeof(struct e1000_tx_desc); | |
581d708e | 1645 | E1000_WRITE_REG(hw, TDLEN, tdlen); |
4ca213a6 AK |
1646 | E1000_WRITE_REG(hw, TDBAH, (tdba >> 32)); |
1647 | E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL)); | |
581d708e | 1648 | E1000_WRITE_REG(hw, TDT, 0); |
4ca213a6 | 1649 | E1000_WRITE_REG(hw, TDH, 0); |
6a951698 AK |
1650 | adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH); |
1651 | adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT); | |
24025e4e MC |
1652 | break; |
1653 | } | |
1da177e4 LT |
1654 | |
1655 | /* Set the default values for the Tx Inter Packet Gap timer */ | |
d89b6c67 JB |
1656 | if (adapter->hw.mac_type <= e1000_82547_rev_2 && |
1657 | (hw->media_type == e1000_media_type_fiber || | |
1658 | hw->media_type == e1000_media_type_internal_serdes)) | |
0fadb059 JK |
1659 | tipg = DEFAULT_82543_TIPG_IPGT_FIBER; |
1660 | else | |
1661 | tipg = DEFAULT_82543_TIPG_IPGT_COPPER; | |
1662 | ||
581d708e | 1663 | switch (hw->mac_type) { |
1da177e4 LT |
1664 | case e1000_82542_rev2_0: |
1665 | case e1000_82542_rev2_1: | |
1666 | tipg = DEFAULT_82542_TIPG_IPGT; | |
0fadb059 JK |
1667 | ipgr1 = DEFAULT_82542_TIPG_IPGR1; |
1668 | ipgr2 = DEFAULT_82542_TIPG_IPGR2; | |
1da177e4 | 1669 | break; |
87041639 JK |
1670 | case e1000_80003es2lan: |
1671 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; | |
1672 | ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; | |
1673 | break; | |
1da177e4 | 1674 | default: |
0fadb059 JK |
1675 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; |
1676 | ipgr2 = DEFAULT_82543_TIPG_IPGR2; | |
1677 | break; | |
1da177e4 | 1678 | } |
0fadb059 JK |
1679 | tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT; |
1680 | tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT; | |
581d708e | 1681 | E1000_WRITE_REG(hw, TIPG, tipg); |
1da177e4 LT |
1682 | |
1683 | /* Set the Tx Interrupt Delay register */ | |
1684 | ||
581d708e MC |
1685 | E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay); |
1686 | if (hw->mac_type >= e1000_82540) | |
1687 | E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay); | |
1da177e4 LT |
1688 | |
1689 | /* Program the Transmit Control Register */ | |
1690 | ||
581d708e | 1691 | tctl = E1000_READ_REG(hw, TCTL); |
1da177e4 | 1692 | tctl &= ~E1000_TCTL_CT; |
7e6c9861 | 1693 | tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | |
1da177e4 LT |
1694 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); |
1695 | ||
2ae76d98 MC |
1696 | if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) { |
1697 | tarc = E1000_READ_REG(hw, TARC0); | |
90fb5135 AK |
1698 | /* set the speed mode bit, we'll clear it if we're not at |
1699 | * gigabit link later */ | |
09ae3e88 | 1700 | tarc |= (1 << 21); |
2ae76d98 | 1701 | E1000_WRITE_REG(hw, TARC0, tarc); |
87041639 JK |
1702 | } else if (hw->mac_type == e1000_80003es2lan) { |
1703 | tarc = E1000_READ_REG(hw, TARC0); | |
1704 | tarc |= 1; | |
87041639 JK |
1705 | E1000_WRITE_REG(hw, TARC0, tarc); |
1706 | tarc = E1000_READ_REG(hw, TARC1); | |
1707 | tarc |= 1; | |
1708 | E1000_WRITE_REG(hw, TARC1, tarc); | |
2ae76d98 MC |
1709 | } |
1710 | ||
581d708e | 1711 | e1000_config_collision_dist(hw); |
1da177e4 LT |
1712 | |
1713 | /* Setup Transmit Descriptor Settings for eop descriptor */ | |
6a042dab JB |
1714 | adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; |
1715 | ||
1716 | /* only set IDE if we are delaying interrupts using the timers */ | |
1717 | if (adapter->tx_int_delay) | |
1718 | adapter->txd_cmd |= E1000_TXD_CMD_IDE; | |
1da177e4 | 1719 | |
581d708e | 1720 | if (hw->mac_type < e1000_82543) |
1da177e4 LT |
1721 | adapter->txd_cmd |= E1000_TXD_CMD_RPS; |
1722 | else | |
1723 | adapter->txd_cmd |= E1000_TXD_CMD_RS; | |
1724 | ||
1725 | /* Cache if we're 82544 running in PCI-X because we'll | |
1726 | * need this to apply a workaround later in the send path. */ | |
581d708e MC |
1727 | if (hw->mac_type == e1000_82544 && |
1728 | hw->bus_type == e1000_bus_type_pcix) | |
1da177e4 | 1729 | adapter->pcix_82544 = 1; |
7e6c9861 JK |
1730 | |
1731 | E1000_WRITE_REG(hw, TCTL, tctl); | |
1732 | ||
1da177e4 LT |
1733 | } |
1734 | ||
1735 | /** | |
1736 | * e1000_setup_rx_resources - allocate Rx resources (Descriptors) | |
1737 | * @adapter: board private structure | |
581d708e | 1738 | * @rxdr: rx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1739 | * |
1740 | * Returns 0 on success, negative on failure | |
1741 | **/ | |
1742 | ||
3ad2cc67 | 1743 | static int |
581d708e MC |
1744 | e1000_setup_rx_resources(struct e1000_adapter *adapter, |
1745 | struct e1000_rx_ring *rxdr) | |
1da177e4 | 1746 | { |
1da177e4 | 1747 | struct pci_dev *pdev = adapter->pdev; |
2d7edb92 | 1748 | int size, desc_len; |
1da177e4 LT |
1749 | |
1750 | size = sizeof(struct e1000_buffer) * rxdr->count; | |
cd94dd0b | 1751 | rxdr->buffer_info = vmalloc(size); |
581d708e | 1752 | if (!rxdr->buffer_info) { |
2648345f MC |
1753 | DPRINTK(PROBE, ERR, |
1754 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 LT |
1755 | return -ENOMEM; |
1756 | } | |
1757 | memset(rxdr->buffer_info, 0, size); | |
1758 | ||
2d7edb92 MC |
1759 | size = sizeof(struct e1000_ps_page) * rxdr->count; |
1760 | rxdr->ps_page = kmalloc(size, GFP_KERNEL); | |
96838a40 | 1761 | if (!rxdr->ps_page) { |
2d7edb92 MC |
1762 | vfree(rxdr->buffer_info); |
1763 | DPRINTK(PROBE, ERR, | |
1764 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1765 | return -ENOMEM; | |
1766 | } | |
1767 | memset(rxdr->ps_page, 0, size); | |
1768 | ||
1769 | size = sizeof(struct e1000_ps_page_dma) * rxdr->count; | |
1770 | rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL); | |
96838a40 | 1771 | if (!rxdr->ps_page_dma) { |
2d7edb92 MC |
1772 | vfree(rxdr->buffer_info); |
1773 | kfree(rxdr->ps_page); | |
1774 | DPRINTK(PROBE, ERR, | |
1775 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1776 | return -ENOMEM; | |
1777 | } | |
1778 | memset(rxdr->ps_page_dma, 0, size); | |
1779 | ||
96838a40 | 1780 | if (adapter->hw.mac_type <= e1000_82547_rev_2) |
2d7edb92 MC |
1781 | desc_len = sizeof(struct e1000_rx_desc); |
1782 | else | |
1783 | desc_len = sizeof(union e1000_rx_desc_packet_split); | |
1784 | ||
1da177e4 LT |
1785 | /* Round up to nearest 4K */ |
1786 | ||
2d7edb92 | 1787 | rxdr->size = rxdr->count * desc_len; |
1da177e4 LT |
1788 | E1000_ROUNDUP(rxdr->size, 4096); |
1789 | ||
1790 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); | |
1791 | ||
581d708e MC |
1792 | if (!rxdr->desc) { |
1793 | DPRINTK(PROBE, ERR, | |
1794 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 | 1795 | setup_rx_desc_die: |
1da177e4 | 1796 | vfree(rxdr->buffer_info); |
2d7edb92 MC |
1797 | kfree(rxdr->ps_page); |
1798 | kfree(rxdr->ps_page_dma); | |
1da177e4 LT |
1799 | return -ENOMEM; |
1800 | } | |
1801 | ||
2648345f | 1802 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1803 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { |
1804 | void *olddesc = rxdr->desc; | |
1805 | dma_addr_t olddma = rxdr->dma; | |
2648345f MC |
1806 | DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes " |
1807 | "at %p\n", rxdr->size, rxdr->desc); | |
1808 | /* Try again, without freeing the previous */ | |
1da177e4 | 1809 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); |
2648345f | 1810 | /* Failed allocation, critical failure */ |
581d708e | 1811 | if (!rxdr->desc) { |
1da177e4 | 1812 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
581d708e MC |
1813 | DPRINTK(PROBE, ERR, |
1814 | "Unable to allocate memory " | |
1815 | "for the receive descriptor ring\n"); | |
1da177e4 LT |
1816 | goto setup_rx_desc_die; |
1817 | } | |
1818 | ||
1819 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { | |
1820 | /* give up */ | |
2648345f MC |
1821 | pci_free_consistent(pdev, rxdr->size, rxdr->desc, |
1822 | rxdr->dma); | |
1da177e4 | 1823 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
2648345f MC |
1824 | DPRINTK(PROBE, ERR, |
1825 | "Unable to allocate aligned memory " | |
1826 | "for the receive descriptor ring\n"); | |
581d708e | 1827 | goto setup_rx_desc_die; |
1da177e4 | 1828 | } else { |
2648345f | 1829 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1830 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
1831 | } | |
1832 | } | |
1833 | memset(rxdr->desc, 0, rxdr->size); | |
1834 | ||
1835 | rxdr->next_to_clean = 0; | |
1836 | rxdr->next_to_use = 0; | |
1837 | ||
1838 | return 0; | |
1839 | } | |
1840 | ||
581d708e MC |
1841 | /** |
1842 | * e1000_setup_all_rx_resources - wrapper to allocate Rx resources | |
1843 | * (Descriptors) for all queues | |
1844 | * @adapter: board private structure | |
1845 | * | |
581d708e MC |
1846 | * Return 0 on success, negative on failure |
1847 | **/ | |
1848 | ||
1849 | int | |
1850 | e1000_setup_all_rx_resources(struct e1000_adapter *adapter) | |
1851 | { | |
1852 | int i, err = 0; | |
1853 | ||
f56799ea | 1854 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
1855 | err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]); |
1856 | if (err) { | |
1857 | DPRINTK(PROBE, ERR, | |
1858 | "Allocation for Rx Queue %u failed\n", i); | |
3fbbc72e VA |
1859 | for (i-- ; i >= 0; i--) |
1860 | e1000_free_rx_resources(adapter, | |
1861 | &adapter->rx_ring[i]); | |
581d708e MC |
1862 | break; |
1863 | } | |
1864 | } | |
1865 | ||
1866 | return err; | |
1867 | } | |
1868 | ||
1da177e4 | 1869 | /** |
2648345f | 1870 | * e1000_setup_rctl - configure the receive control registers |
1da177e4 LT |
1871 | * @adapter: Board private structure |
1872 | **/ | |
e4c811c9 MC |
1873 | #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ |
1874 | (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) | |
1da177e4 LT |
1875 | static void |
1876 | e1000_setup_rctl(struct e1000_adapter *adapter) | |
1877 | { | |
2d7edb92 MC |
1878 | uint32_t rctl, rfctl; |
1879 | uint32_t psrctl = 0; | |
35ec56bb | 1880 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT |
e4c811c9 MC |
1881 | uint32_t pages = 0; |
1882 | #endif | |
1da177e4 LT |
1883 | |
1884 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
1885 | ||
1886 | rctl &= ~(3 << E1000_RCTL_MO_SHIFT); | |
1887 | ||
1888 | rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | | |
1889 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | |
1890 | (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); | |
1891 | ||
0fadb059 | 1892 | if (adapter->hw.tbi_compatibility_on == 1) |
1da177e4 LT |
1893 | rctl |= E1000_RCTL_SBP; |
1894 | else | |
1895 | rctl &= ~E1000_RCTL_SBP; | |
1896 | ||
2d7edb92 MC |
1897 | if (adapter->netdev->mtu <= ETH_DATA_LEN) |
1898 | rctl &= ~E1000_RCTL_LPE; | |
1899 | else | |
1900 | rctl |= E1000_RCTL_LPE; | |
1901 | ||
1da177e4 | 1902 | /* Setup buffer sizes */ |
9e2feace AK |
1903 | rctl &= ~E1000_RCTL_SZ_4096; |
1904 | rctl |= E1000_RCTL_BSEX; | |
1905 | switch (adapter->rx_buffer_len) { | |
1906 | case E1000_RXBUFFER_256: | |
1907 | rctl |= E1000_RCTL_SZ_256; | |
1908 | rctl &= ~E1000_RCTL_BSEX; | |
1909 | break; | |
1910 | case E1000_RXBUFFER_512: | |
1911 | rctl |= E1000_RCTL_SZ_512; | |
1912 | rctl &= ~E1000_RCTL_BSEX; | |
1913 | break; | |
1914 | case E1000_RXBUFFER_1024: | |
1915 | rctl |= E1000_RCTL_SZ_1024; | |
1916 | rctl &= ~E1000_RCTL_BSEX; | |
1917 | break; | |
a1415ee6 JK |
1918 | case E1000_RXBUFFER_2048: |
1919 | default: | |
1920 | rctl |= E1000_RCTL_SZ_2048; | |
1921 | rctl &= ~E1000_RCTL_BSEX; | |
1922 | break; | |
1923 | case E1000_RXBUFFER_4096: | |
1924 | rctl |= E1000_RCTL_SZ_4096; | |
1925 | break; | |
1926 | case E1000_RXBUFFER_8192: | |
1927 | rctl |= E1000_RCTL_SZ_8192; | |
1928 | break; | |
1929 | case E1000_RXBUFFER_16384: | |
1930 | rctl |= E1000_RCTL_SZ_16384; | |
1931 | break; | |
2d7edb92 MC |
1932 | } |
1933 | ||
35ec56bb | 1934 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT |
2d7edb92 MC |
1935 | /* 82571 and greater support packet-split where the protocol |
1936 | * header is placed in skb->data and the packet data is | |
1937 | * placed in pages hanging off of skb_shinfo(skb)->nr_frags. | |
1938 | * In the case of a non-split, skb->data is linearly filled, | |
1939 | * followed by the page buffers. Therefore, skb->data is | |
1940 | * sized to hold the largest protocol header. | |
1941 | */ | |
e64d7d02 JB |
1942 | /* allocations using alloc_page take too long for regular MTU |
1943 | * so only enable packet split for jumbo frames */ | |
e4c811c9 | 1944 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); |
e64d7d02 JB |
1945 | if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) && |
1946 | PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE)) | |
e4c811c9 MC |
1947 | adapter->rx_ps_pages = pages; |
1948 | else | |
1949 | adapter->rx_ps_pages = 0; | |
2d7edb92 | 1950 | #endif |
e4c811c9 | 1951 | if (adapter->rx_ps_pages) { |
2d7edb92 MC |
1952 | /* Configure extra packet-split registers */ |
1953 | rfctl = E1000_READ_REG(&adapter->hw, RFCTL); | |
1954 | rfctl |= E1000_RFCTL_EXTEN; | |
87ca4e5b AK |
1955 | /* disable packet split support for IPv6 extension headers, |
1956 | * because some malformed IPv6 headers can hang the RX */ | |
1957 | rfctl |= (E1000_RFCTL_IPV6_EX_DIS | | |
1958 | E1000_RFCTL_NEW_IPV6_EXT_DIS); | |
1959 | ||
2d7edb92 MC |
1960 | E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl); |
1961 | ||
7dfee0cb | 1962 | rctl |= E1000_RCTL_DTYP_PS; |
96838a40 | 1963 | |
2d7edb92 MC |
1964 | psrctl |= adapter->rx_ps_bsize0 >> |
1965 | E1000_PSRCTL_BSIZE0_SHIFT; | |
e4c811c9 MC |
1966 | |
1967 | switch (adapter->rx_ps_pages) { | |
1968 | case 3: | |
1969 | psrctl |= PAGE_SIZE << | |
1970 | E1000_PSRCTL_BSIZE3_SHIFT; | |
1971 | case 2: | |
1972 | psrctl |= PAGE_SIZE << | |
1973 | E1000_PSRCTL_BSIZE2_SHIFT; | |
1974 | case 1: | |
1975 | psrctl |= PAGE_SIZE >> | |
1976 | E1000_PSRCTL_BSIZE1_SHIFT; | |
1977 | break; | |
1978 | } | |
2d7edb92 MC |
1979 | |
1980 | E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl); | |
1da177e4 LT |
1981 | } |
1982 | ||
1983 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
1984 | } | |
1985 | ||
1986 | /** | |
1987 | * e1000_configure_rx - Configure 8254x Receive Unit after Reset | |
1988 | * @adapter: board private structure | |
1989 | * | |
1990 | * Configure the Rx unit of the MAC after a reset. | |
1991 | **/ | |
1992 | ||
1993 | static void | |
1994 | e1000_configure_rx(struct e1000_adapter *adapter) | |
1995 | { | |
581d708e MC |
1996 | uint64_t rdba; |
1997 | struct e1000_hw *hw = &adapter->hw; | |
1998 | uint32_t rdlen, rctl, rxcsum, ctrl_ext; | |
2d7edb92 | 1999 | |
e4c811c9 | 2000 | if (adapter->rx_ps_pages) { |
0f15a8fa | 2001 | /* this is a 32 byte descriptor */ |
581d708e | 2002 | rdlen = adapter->rx_ring[0].count * |
2d7edb92 MC |
2003 | sizeof(union e1000_rx_desc_packet_split); |
2004 | adapter->clean_rx = e1000_clean_rx_irq_ps; | |
2005 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; | |
2006 | } else { | |
581d708e MC |
2007 | rdlen = adapter->rx_ring[0].count * |
2008 | sizeof(struct e1000_rx_desc); | |
2d7edb92 MC |
2009 | adapter->clean_rx = e1000_clean_rx_irq; |
2010 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers; | |
2011 | } | |
1da177e4 LT |
2012 | |
2013 | /* disable receives while setting up the descriptors */ | |
581d708e MC |
2014 | rctl = E1000_READ_REG(hw, RCTL); |
2015 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
1da177e4 LT |
2016 | |
2017 | /* set the Receive Delay Timer Register */ | |
581d708e | 2018 | E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay); |
1da177e4 | 2019 | |
581d708e MC |
2020 | if (hw->mac_type >= e1000_82540) { |
2021 | E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay); | |
835bb129 | 2022 | if (adapter->itr_setting != 0) |
581d708e | 2023 | E1000_WRITE_REG(hw, ITR, |
1da177e4 LT |
2024 | 1000000000 / (adapter->itr * 256)); |
2025 | } | |
2026 | ||
2ae76d98 | 2027 | if (hw->mac_type >= e1000_82571) { |
2ae76d98 | 2028 | ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); |
1e613fd9 | 2029 | /* Reset delay timers after every interrupt */ |
6fc7a7ec | 2030 | ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR; |
1e613fd9 | 2031 | #ifdef CONFIG_E1000_NAPI |
835bb129 | 2032 | /* Auto-Mask interrupts upon ICR access */ |
1e613fd9 | 2033 | ctrl_ext |= E1000_CTRL_EXT_IAME; |
835bb129 | 2034 | E1000_WRITE_REG(hw, IAM, 0xffffffff); |
1e613fd9 | 2035 | #endif |
2ae76d98 MC |
2036 | E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext); |
2037 | E1000_WRITE_FLUSH(hw); | |
2038 | } | |
2039 | ||
581d708e MC |
2040 | /* Setup the HW Rx Head and Tail Descriptor Pointers and |
2041 | * the Base and Length of the Rx Descriptor Ring */ | |
f56799ea | 2042 | switch (adapter->num_rx_queues) { |
24025e4e MC |
2043 | case 1: |
2044 | default: | |
581d708e | 2045 | rdba = adapter->rx_ring[0].dma; |
581d708e | 2046 | E1000_WRITE_REG(hw, RDLEN, rdlen); |
4ca213a6 AK |
2047 | E1000_WRITE_REG(hw, RDBAH, (rdba >> 32)); |
2048 | E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL)); | |
581d708e | 2049 | E1000_WRITE_REG(hw, RDT, 0); |
4ca213a6 | 2050 | E1000_WRITE_REG(hw, RDH, 0); |
6a951698 AK |
2051 | adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH); |
2052 | adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT); | |
581d708e | 2053 | break; |
24025e4e MC |
2054 | } |
2055 | ||
1da177e4 | 2056 | /* Enable 82543 Receive Checksum Offload for TCP and UDP */ |
581d708e MC |
2057 | if (hw->mac_type >= e1000_82543) { |
2058 | rxcsum = E1000_READ_REG(hw, RXCSUM); | |
96838a40 | 2059 | if (adapter->rx_csum == TRUE) { |
2d7edb92 MC |
2060 | rxcsum |= E1000_RXCSUM_TUOFL; |
2061 | ||
868d5309 | 2062 | /* Enable 82571 IPv4 payload checksum for UDP fragments |
2d7edb92 | 2063 | * Must be used in conjunction with packet-split. */ |
96838a40 JB |
2064 | if ((hw->mac_type >= e1000_82571) && |
2065 | (adapter->rx_ps_pages)) { | |
2d7edb92 MC |
2066 | rxcsum |= E1000_RXCSUM_IPPCSE; |
2067 | } | |
2068 | } else { | |
2069 | rxcsum &= ~E1000_RXCSUM_TUOFL; | |
2070 | /* don't need to clear IPPCSE as it defaults to 0 */ | |
2071 | } | |
581d708e | 2072 | E1000_WRITE_REG(hw, RXCSUM, rxcsum); |
1da177e4 LT |
2073 | } |
2074 | ||
21c4d5e0 AK |
2075 | /* enable early receives on 82573, only takes effect if using > 2048 |
2076 | * byte total frame size. for example only for jumbo frames */ | |
2077 | #define E1000_ERT_2048 0x100 | |
2078 | if (hw->mac_type == e1000_82573) | |
2079 | E1000_WRITE_REG(hw, ERT, E1000_ERT_2048); | |
2080 | ||
1da177e4 | 2081 | /* Enable Receives */ |
581d708e | 2082 | E1000_WRITE_REG(hw, RCTL, rctl); |
1da177e4 LT |
2083 | } |
2084 | ||
2085 | /** | |
581d708e | 2086 | * e1000_free_tx_resources - Free Tx Resources per Queue |
1da177e4 | 2087 | * @adapter: board private structure |
581d708e | 2088 | * @tx_ring: Tx descriptor ring for a specific queue |
1da177e4 LT |
2089 | * |
2090 | * Free all transmit software resources | |
2091 | **/ | |
2092 | ||
3ad2cc67 | 2093 | static void |
581d708e MC |
2094 | e1000_free_tx_resources(struct e1000_adapter *adapter, |
2095 | struct e1000_tx_ring *tx_ring) | |
1da177e4 LT |
2096 | { |
2097 | struct pci_dev *pdev = adapter->pdev; | |
2098 | ||
581d708e | 2099 | e1000_clean_tx_ring(adapter, tx_ring); |
1da177e4 | 2100 | |
581d708e MC |
2101 | vfree(tx_ring->buffer_info); |
2102 | tx_ring->buffer_info = NULL; | |
1da177e4 | 2103 | |
581d708e | 2104 | pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma); |
1da177e4 | 2105 | |
581d708e MC |
2106 | tx_ring->desc = NULL; |
2107 | } | |
2108 | ||
2109 | /** | |
2110 | * e1000_free_all_tx_resources - Free Tx Resources for All Queues | |
2111 | * @adapter: board private structure | |
2112 | * | |
2113 | * Free all transmit software resources | |
2114 | **/ | |
2115 | ||
2116 | void | |
2117 | e1000_free_all_tx_resources(struct e1000_adapter *adapter) | |
2118 | { | |
2119 | int i; | |
2120 | ||
f56799ea | 2121 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 2122 | e1000_free_tx_resources(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
2123 | } |
2124 | ||
e619d523 | 2125 | static void |
1da177e4 LT |
2126 | e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter, |
2127 | struct e1000_buffer *buffer_info) | |
2128 | { | |
96838a40 | 2129 | if (buffer_info->dma) { |
2648345f MC |
2130 | pci_unmap_page(adapter->pdev, |
2131 | buffer_info->dma, | |
2132 | buffer_info->length, | |
2133 | PCI_DMA_TODEVICE); | |
a9ebadd6 | 2134 | buffer_info->dma = 0; |
1da177e4 | 2135 | } |
a9ebadd6 | 2136 | if (buffer_info->skb) { |
1da177e4 | 2137 | dev_kfree_skb_any(buffer_info->skb); |
a9ebadd6 JB |
2138 | buffer_info->skb = NULL; |
2139 | } | |
2140 | /* buffer_info must be completely set up in the transmit path */ | |
1da177e4 LT |
2141 | } |
2142 | ||
2143 | /** | |
2144 | * e1000_clean_tx_ring - Free Tx Buffers | |
2145 | * @adapter: board private structure | |
581d708e | 2146 | * @tx_ring: ring to be cleaned |
1da177e4 LT |
2147 | **/ |
2148 | ||
2149 | static void | |
581d708e MC |
2150 | e1000_clean_tx_ring(struct e1000_adapter *adapter, |
2151 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 2152 | { |
1da177e4 LT |
2153 | struct e1000_buffer *buffer_info; |
2154 | unsigned long size; | |
2155 | unsigned int i; | |
2156 | ||
2157 | /* Free all the Tx ring sk_buffs */ | |
2158 | ||
96838a40 | 2159 | for (i = 0; i < tx_ring->count; i++) { |
1da177e4 LT |
2160 | buffer_info = &tx_ring->buffer_info[i]; |
2161 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); | |
2162 | } | |
2163 | ||
2164 | size = sizeof(struct e1000_buffer) * tx_ring->count; | |
2165 | memset(tx_ring->buffer_info, 0, size); | |
2166 | ||
2167 | /* Zero out the descriptor ring */ | |
2168 | ||
2169 | memset(tx_ring->desc, 0, tx_ring->size); | |
2170 | ||
2171 | tx_ring->next_to_use = 0; | |
2172 | tx_ring->next_to_clean = 0; | |
fd803241 | 2173 | tx_ring->last_tx_tso = 0; |
1da177e4 | 2174 | |
581d708e MC |
2175 | writel(0, adapter->hw.hw_addr + tx_ring->tdh); |
2176 | writel(0, adapter->hw.hw_addr + tx_ring->tdt); | |
2177 | } | |
2178 | ||
2179 | /** | |
2180 | * e1000_clean_all_tx_rings - Free Tx Buffers for all queues | |
2181 | * @adapter: board private structure | |
2182 | **/ | |
2183 | ||
2184 | static void | |
2185 | e1000_clean_all_tx_rings(struct e1000_adapter *adapter) | |
2186 | { | |
2187 | int i; | |
2188 | ||
f56799ea | 2189 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 2190 | e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
2191 | } |
2192 | ||
2193 | /** | |
2194 | * e1000_free_rx_resources - Free Rx Resources | |
2195 | * @adapter: board private structure | |
581d708e | 2196 | * @rx_ring: ring to clean the resources from |
1da177e4 LT |
2197 | * |
2198 | * Free all receive software resources | |
2199 | **/ | |
2200 | ||
3ad2cc67 | 2201 | static void |
581d708e MC |
2202 | e1000_free_rx_resources(struct e1000_adapter *adapter, |
2203 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 2204 | { |
1da177e4 LT |
2205 | struct pci_dev *pdev = adapter->pdev; |
2206 | ||
581d708e | 2207 | e1000_clean_rx_ring(adapter, rx_ring); |
1da177e4 LT |
2208 | |
2209 | vfree(rx_ring->buffer_info); | |
2210 | rx_ring->buffer_info = NULL; | |
2d7edb92 MC |
2211 | kfree(rx_ring->ps_page); |
2212 | rx_ring->ps_page = NULL; | |
2213 | kfree(rx_ring->ps_page_dma); | |
2214 | rx_ring->ps_page_dma = NULL; | |
1da177e4 LT |
2215 | |
2216 | pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma); | |
2217 | ||
2218 | rx_ring->desc = NULL; | |
2219 | } | |
2220 | ||
2221 | /** | |
581d708e | 2222 | * e1000_free_all_rx_resources - Free Rx Resources for All Queues |
1da177e4 | 2223 | * @adapter: board private structure |
581d708e MC |
2224 | * |
2225 | * Free all receive software resources | |
2226 | **/ | |
2227 | ||
2228 | void | |
2229 | e1000_free_all_rx_resources(struct e1000_adapter *adapter) | |
2230 | { | |
2231 | int i; | |
2232 | ||
f56799ea | 2233 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e MC |
2234 | e1000_free_rx_resources(adapter, &adapter->rx_ring[i]); |
2235 | } | |
2236 | ||
2237 | /** | |
2238 | * e1000_clean_rx_ring - Free Rx Buffers per Queue | |
2239 | * @adapter: board private structure | |
2240 | * @rx_ring: ring to free buffers from | |
1da177e4 LT |
2241 | **/ |
2242 | ||
2243 | static void | |
581d708e MC |
2244 | e1000_clean_rx_ring(struct e1000_adapter *adapter, |
2245 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 2246 | { |
1da177e4 | 2247 | struct e1000_buffer *buffer_info; |
2d7edb92 MC |
2248 | struct e1000_ps_page *ps_page; |
2249 | struct e1000_ps_page_dma *ps_page_dma; | |
1da177e4 LT |
2250 | struct pci_dev *pdev = adapter->pdev; |
2251 | unsigned long size; | |
2d7edb92 | 2252 | unsigned int i, j; |
1da177e4 LT |
2253 | |
2254 | /* Free all the Rx ring sk_buffs */ | |
96838a40 | 2255 | for (i = 0; i < rx_ring->count; i++) { |
1da177e4 | 2256 | buffer_info = &rx_ring->buffer_info[i]; |
96838a40 | 2257 | if (buffer_info->skb) { |
1da177e4 LT |
2258 | pci_unmap_single(pdev, |
2259 | buffer_info->dma, | |
2260 | buffer_info->length, | |
2261 | PCI_DMA_FROMDEVICE); | |
2262 | ||
2263 | dev_kfree_skb(buffer_info->skb); | |
2264 | buffer_info->skb = NULL; | |
997f5cbd JK |
2265 | } |
2266 | ps_page = &rx_ring->ps_page[i]; | |
2267 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
2268 | for (j = 0; j < adapter->rx_ps_pages; j++) { | |
2269 | if (!ps_page->ps_page[j]) break; | |
2270 | pci_unmap_page(pdev, | |
2271 | ps_page_dma->ps_page_dma[j], | |
2272 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
2273 | ps_page_dma->ps_page_dma[j] = 0; | |
2274 | put_page(ps_page->ps_page[j]); | |
2275 | ps_page->ps_page[j] = NULL; | |
1da177e4 LT |
2276 | } |
2277 | } | |
2278 | ||
2279 | size = sizeof(struct e1000_buffer) * rx_ring->count; | |
2280 | memset(rx_ring->buffer_info, 0, size); | |
2d7edb92 MC |
2281 | size = sizeof(struct e1000_ps_page) * rx_ring->count; |
2282 | memset(rx_ring->ps_page, 0, size); | |
2283 | size = sizeof(struct e1000_ps_page_dma) * rx_ring->count; | |
2284 | memset(rx_ring->ps_page_dma, 0, size); | |
1da177e4 LT |
2285 | |
2286 | /* Zero out the descriptor ring */ | |
2287 | ||
2288 | memset(rx_ring->desc, 0, rx_ring->size); | |
2289 | ||
2290 | rx_ring->next_to_clean = 0; | |
2291 | rx_ring->next_to_use = 0; | |
2292 | ||
581d708e MC |
2293 | writel(0, adapter->hw.hw_addr + rx_ring->rdh); |
2294 | writel(0, adapter->hw.hw_addr + rx_ring->rdt); | |
2295 | } | |
2296 | ||
2297 | /** | |
2298 | * e1000_clean_all_rx_rings - Free Rx Buffers for all queues | |
2299 | * @adapter: board private structure | |
2300 | **/ | |
2301 | ||
2302 | static void | |
2303 | e1000_clean_all_rx_rings(struct e1000_adapter *adapter) | |
2304 | { | |
2305 | int i; | |
2306 | ||
f56799ea | 2307 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e | 2308 | e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]); |
1da177e4 LT |
2309 | } |
2310 | ||
2311 | /* The 82542 2.0 (revision 2) needs to have the receive unit in reset | |
2312 | * and memory write and invalidate disabled for certain operations | |
2313 | */ | |
2314 | static void | |
2315 | e1000_enter_82542_rst(struct e1000_adapter *adapter) | |
2316 | { | |
2317 | struct net_device *netdev = adapter->netdev; | |
2318 | uint32_t rctl; | |
2319 | ||
2320 | e1000_pci_clear_mwi(&adapter->hw); | |
2321 | ||
2322 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
2323 | rctl |= E1000_RCTL_RST; | |
2324 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2325 | E1000_WRITE_FLUSH(&adapter->hw); | |
2326 | mdelay(5); | |
2327 | ||
96838a40 | 2328 | if (netif_running(netdev)) |
581d708e | 2329 | e1000_clean_all_rx_rings(adapter); |
1da177e4 LT |
2330 | } |
2331 | ||
2332 | static void | |
2333 | e1000_leave_82542_rst(struct e1000_adapter *adapter) | |
2334 | { | |
2335 | struct net_device *netdev = adapter->netdev; | |
2336 | uint32_t rctl; | |
2337 | ||
2338 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
2339 | rctl &= ~E1000_RCTL_RST; | |
2340 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2341 | E1000_WRITE_FLUSH(&adapter->hw); | |
2342 | mdelay(5); | |
2343 | ||
96838a40 | 2344 | if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE) |
1da177e4 LT |
2345 | e1000_pci_set_mwi(&adapter->hw); |
2346 | ||
96838a40 | 2347 | if (netif_running(netdev)) { |
72d64a43 JK |
2348 | /* No need to loop, because 82542 supports only 1 queue */ |
2349 | struct e1000_rx_ring *ring = &adapter->rx_ring[0]; | |
7c4d3367 | 2350 | e1000_configure_rx(adapter); |
72d64a43 | 2351 | adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring)); |
1da177e4 LT |
2352 | } |
2353 | } | |
2354 | ||
2355 | /** | |
2356 | * e1000_set_mac - Change the Ethernet Address of the NIC | |
2357 | * @netdev: network interface device structure | |
2358 | * @p: pointer to an address structure | |
2359 | * | |
2360 | * Returns 0 on success, negative on failure | |
2361 | **/ | |
2362 | ||
2363 | static int | |
2364 | e1000_set_mac(struct net_device *netdev, void *p) | |
2365 | { | |
60490fe0 | 2366 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2367 | struct sockaddr *addr = p; |
2368 | ||
96838a40 | 2369 | if (!is_valid_ether_addr(addr->sa_data)) |
1da177e4 LT |
2370 | return -EADDRNOTAVAIL; |
2371 | ||
2372 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2373 | ||
96838a40 | 2374 | if (adapter->hw.mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2375 | e1000_enter_82542_rst(adapter); |
2376 | ||
2377 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
2378 | memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); | |
2379 | ||
2380 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2381 | ||
868d5309 MC |
2382 | /* With 82571 controllers, LAA may be overwritten (with the default) |
2383 | * due to controller reset from the other port. */ | |
2384 | if (adapter->hw.mac_type == e1000_82571) { | |
2385 | /* activate the work around */ | |
2386 | adapter->hw.laa_is_present = 1; | |
2387 | ||
96838a40 JB |
2388 | /* Hold a copy of the LAA in RAR[14] This is done so that |
2389 | * between the time RAR[0] gets clobbered and the time it | |
2390 | * gets fixed (in e1000_watchdog), the actual LAA is in one | |
868d5309 | 2391 | * of the RARs and no incoming packets directed to this port |
96838a40 | 2392 | * are dropped. Eventaully the LAA will be in RAR[0] and |
868d5309 | 2393 | * RAR[14] */ |
96838a40 | 2394 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, |
868d5309 MC |
2395 | E1000_RAR_ENTRIES - 1); |
2396 | } | |
2397 | ||
96838a40 | 2398 | if (adapter->hw.mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2399 | e1000_leave_82542_rst(adapter); |
2400 | ||
2401 | return 0; | |
2402 | } | |
2403 | ||
2404 | /** | |
2405 | * e1000_set_multi - Multicast and Promiscuous mode set | |
2406 | * @netdev: network interface device structure | |
2407 | * | |
2408 | * The set_multi entry point is called whenever the multicast address | |
2409 | * list or the network interface flags are updated. This routine is | |
2410 | * responsible for configuring the hardware for proper multicast, | |
2411 | * promiscuous mode, and all-multi behavior. | |
2412 | **/ | |
2413 | ||
2414 | static void | |
2415 | e1000_set_multi(struct net_device *netdev) | |
2416 | { | |
60490fe0 | 2417 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2418 | struct e1000_hw *hw = &adapter->hw; |
2419 | struct dev_mc_list *mc_ptr; | |
2420 | uint32_t rctl; | |
2421 | uint32_t hash_value; | |
868d5309 | 2422 | int i, rar_entries = E1000_RAR_ENTRIES; |
cd94dd0b AK |
2423 | int mta_reg_count = (hw->mac_type == e1000_ich8lan) ? |
2424 | E1000_NUM_MTA_REGISTERS_ICH8LAN : | |
2425 | E1000_NUM_MTA_REGISTERS; | |
2426 | ||
2427 | if (adapter->hw.mac_type == e1000_ich8lan) | |
2428 | rar_entries = E1000_RAR_ENTRIES_ICH8LAN; | |
1da177e4 | 2429 | |
868d5309 MC |
2430 | /* reserve RAR[14] for LAA over-write work-around */ |
2431 | if (adapter->hw.mac_type == e1000_82571) | |
2432 | rar_entries--; | |
1da177e4 | 2433 | |
2648345f MC |
2434 | /* Check for Promiscuous and All Multicast modes */ |
2435 | ||
1da177e4 LT |
2436 | rctl = E1000_READ_REG(hw, RCTL); |
2437 | ||
96838a40 | 2438 | if (netdev->flags & IFF_PROMISC) { |
1da177e4 | 2439 | rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); |
96838a40 | 2440 | } else if (netdev->flags & IFF_ALLMULTI) { |
1da177e4 LT |
2441 | rctl |= E1000_RCTL_MPE; |
2442 | rctl &= ~E1000_RCTL_UPE; | |
2443 | } else { | |
2444 | rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); | |
2445 | } | |
2446 | ||
2447 | E1000_WRITE_REG(hw, RCTL, rctl); | |
2448 | ||
2449 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2450 | ||
96838a40 | 2451 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2452 | e1000_enter_82542_rst(adapter); |
2453 | ||
2454 | /* load the first 14 multicast address into the exact filters 1-14 | |
2455 | * RAR 0 is used for the station MAC adddress | |
2456 | * if there are not 14 addresses, go ahead and clear the filters | |
868d5309 | 2457 | * -- with 82571 controllers only 0-13 entries are filled here |
1da177e4 LT |
2458 | */ |
2459 | mc_ptr = netdev->mc_list; | |
2460 | ||
96838a40 | 2461 | for (i = 1; i < rar_entries; i++) { |
868d5309 | 2462 | if (mc_ptr) { |
1da177e4 LT |
2463 | e1000_rar_set(hw, mc_ptr->dmi_addr, i); |
2464 | mc_ptr = mc_ptr->next; | |
2465 | } else { | |
2466 | E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0); | |
4ca213a6 | 2467 | E1000_WRITE_FLUSH(hw); |
1da177e4 | 2468 | E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0); |
4ca213a6 | 2469 | E1000_WRITE_FLUSH(hw); |
1da177e4 LT |
2470 | } |
2471 | } | |
2472 | ||
2473 | /* clear the old settings from the multicast hash table */ | |
2474 | ||
cd94dd0b | 2475 | for (i = 0; i < mta_reg_count; i++) { |
1da177e4 | 2476 | E1000_WRITE_REG_ARRAY(hw, MTA, i, 0); |
4ca213a6 AK |
2477 | E1000_WRITE_FLUSH(hw); |
2478 | } | |
1da177e4 LT |
2479 | |
2480 | /* load any remaining addresses into the hash table */ | |
2481 | ||
96838a40 | 2482 | for (; mc_ptr; mc_ptr = mc_ptr->next) { |
1da177e4 LT |
2483 | hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr); |
2484 | e1000_mta_set(hw, hash_value); | |
2485 | } | |
2486 | ||
96838a40 | 2487 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 | 2488 | e1000_leave_82542_rst(adapter); |
1da177e4 LT |
2489 | } |
2490 | ||
2491 | /* Need to wait a few seconds after link up to get diagnostic information from | |
2492 | * the phy */ | |
2493 | ||
2494 | static void | |
2495 | e1000_update_phy_info(unsigned long data) | |
2496 | { | |
2497 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2498 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
2499 | } | |
2500 | ||
2501 | /** | |
2502 | * e1000_82547_tx_fifo_stall - Timer Call-back | |
2503 | * @data: pointer to adapter cast into an unsigned long | |
2504 | **/ | |
2505 | ||
2506 | static void | |
2507 | e1000_82547_tx_fifo_stall(unsigned long data) | |
2508 | { | |
2509 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2510 | struct net_device *netdev = adapter->netdev; | |
2511 | uint32_t tctl; | |
2512 | ||
96838a40 JB |
2513 | if (atomic_read(&adapter->tx_fifo_stall)) { |
2514 | if ((E1000_READ_REG(&adapter->hw, TDT) == | |
1da177e4 LT |
2515 | E1000_READ_REG(&adapter->hw, TDH)) && |
2516 | (E1000_READ_REG(&adapter->hw, TDFT) == | |
2517 | E1000_READ_REG(&adapter->hw, TDFH)) && | |
2518 | (E1000_READ_REG(&adapter->hw, TDFTS) == | |
2519 | E1000_READ_REG(&adapter->hw, TDFHS))) { | |
2520 | tctl = E1000_READ_REG(&adapter->hw, TCTL); | |
2521 | E1000_WRITE_REG(&adapter->hw, TCTL, | |
2522 | tctl & ~E1000_TCTL_EN); | |
2523 | E1000_WRITE_REG(&adapter->hw, TDFT, | |
2524 | adapter->tx_head_addr); | |
2525 | E1000_WRITE_REG(&adapter->hw, TDFH, | |
2526 | adapter->tx_head_addr); | |
2527 | E1000_WRITE_REG(&adapter->hw, TDFTS, | |
2528 | adapter->tx_head_addr); | |
2529 | E1000_WRITE_REG(&adapter->hw, TDFHS, | |
2530 | adapter->tx_head_addr); | |
2531 | E1000_WRITE_REG(&adapter->hw, TCTL, tctl); | |
2532 | E1000_WRITE_FLUSH(&adapter->hw); | |
2533 | ||
2534 | adapter->tx_fifo_head = 0; | |
2535 | atomic_set(&adapter->tx_fifo_stall, 0); | |
2536 | netif_wake_queue(netdev); | |
2537 | } else { | |
2538 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); | |
2539 | } | |
2540 | } | |
2541 | } | |
2542 | ||
2543 | /** | |
2544 | * e1000_watchdog - Timer Call-back | |
2545 | * @data: pointer to adapter cast into an unsigned long | |
2546 | **/ | |
2547 | static void | |
2548 | e1000_watchdog(unsigned long data) | |
2549 | { | |
2550 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
1da177e4 | 2551 | struct net_device *netdev = adapter->netdev; |
545c67c0 | 2552 | struct e1000_tx_ring *txdr = adapter->tx_ring; |
7e6c9861 | 2553 | uint32_t link, tctl; |
cd94dd0b AK |
2554 | int32_t ret_val; |
2555 | ||
2556 | ret_val = e1000_check_for_link(&adapter->hw); | |
2557 | if ((ret_val == E1000_ERR_PHY) && | |
2558 | (adapter->hw.phy_type == e1000_phy_igp_3) && | |
2559 | (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { | |
2560 | /* See e1000_kumeran_lock_loss_workaround() */ | |
2561 | DPRINTK(LINK, INFO, | |
2562 | "Gigabit has been disabled, downgrading speed\n"); | |
2563 | } | |
90fb5135 | 2564 | |
2d7edb92 MC |
2565 | if (adapter->hw.mac_type == e1000_82573) { |
2566 | e1000_enable_tx_pkt_filtering(&adapter->hw); | |
96838a40 | 2567 | if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id) |
2d7edb92 | 2568 | e1000_update_mng_vlan(adapter); |
96838a40 | 2569 | } |
1da177e4 | 2570 | |
96838a40 | 2571 | if ((adapter->hw.media_type == e1000_media_type_internal_serdes) && |
1da177e4 LT |
2572 | !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE)) |
2573 | link = !adapter->hw.serdes_link_down; | |
2574 | else | |
2575 | link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU; | |
2576 | ||
96838a40 JB |
2577 | if (link) { |
2578 | if (!netif_carrier_ok(netdev)) { | |
fe7fe28e | 2579 | boolean_t txb2b = 1; |
1da177e4 LT |
2580 | e1000_get_speed_and_duplex(&adapter->hw, |
2581 | &adapter->link_speed, | |
2582 | &adapter->link_duplex); | |
2583 | ||
2584 | DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n", | |
2585 | adapter->link_speed, | |
2586 | adapter->link_duplex == FULL_DUPLEX ? | |
2587 | "Full Duplex" : "Half Duplex"); | |
2588 | ||
7e6c9861 JK |
2589 | /* tweak tx_queue_len according to speed/duplex |
2590 | * and adjust the timeout factor */ | |
66a2b0a3 JK |
2591 | netdev->tx_queue_len = adapter->tx_queue_len; |
2592 | adapter->tx_timeout_factor = 1; | |
7e6c9861 JK |
2593 | switch (adapter->link_speed) { |
2594 | case SPEED_10: | |
fe7fe28e | 2595 | txb2b = 0; |
7e6c9861 JK |
2596 | netdev->tx_queue_len = 10; |
2597 | adapter->tx_timeout_factor = 8; | |
2598 | break; | |
2599 | case SPEED_100: | |
fe7fe28e | 2600 | txb2b = 0; |
7e6c9861 JK |
2601 | netdev->tx_queue_len = 100; |
2602 | /* maybe add some timeout factor ? */ | |
2603 | break; | |
2604 | } | |
2605 | ||
fe7fe28e | 2606 | if ((adapter->hw.mac_type == e1000_82571 || |
7e6c9861 | 2607 | adapter->hw.mac_type == e1000_82572) && |
fe7fe28e | 2608 | txb2b == 0) { |
7e6c9861 JK |
2609 | uint32_t tarc0; |
2610 | tarc0 = E1000_READ_REG(&adapter->hw, TARC0); | |
90fb5135 | 2611 | tarc0 &= ~(1 << 21); |
7e6c9861 JK |
2612 | E1000_WRITE_REG(&adapter->hw, TARC0, tarc0); |
2613 | } | |
90fb5135 | 2614 | |
7e6c9861 JK |
2615 | #ifdef NETIF_F_TSO |
2616 | /* disable TSO for pcie and 10/100 speeds, to avoid | |
2617 | * some hardware issues */ | |
2618 | if (!adapter->tso_force && | |
2619 | adapter->hw.bus_type == e1000_bus_type_pci_express){ | |
66a2b0a3 JK |
2620 | switch (adapter->link_speed) { |
2621 | case SPEED_10: | |
66a2b0a3 | 2622 | case SPEED_100: |
7e6c9861 JK |
2623 | DPRINTK(PROBE,INFO, |
2624 | "10/100 speed: disabling TSO\n"); | |
2625 | netdev->features &= ~NETIF_F_TSO; | |
87ca4e5b AK |
2626 | #ifdef NETIF_F_TSO6 |
2627 | netdev->features &= ~NETIF_F_TSO6; | |
2628 | #endif | |
7e6c9861 JK |
2629 | break; |
2630 | case SPEED_1000: | |
2631 | netdev->features |= NETIF_F_TSO; | |
87ca4e5b AK |
2632 | #ifdef NETIF_F_TSO6 |
2633 | netdev->features |= NETIF_F_TSO6; | |
2634 | #endif | |
7e6c9861 JK |
2635 | break; |
2636 | default: | |
2637 | /* oops */ | |
66a2b0a3 JK |
2638 | break; |
2639 | } | |
2640 | } | |
7e6c9861 JK |
2641 | #endif |
2642 | ||
2643 | /* enable transmits in the hardware, need to do this | |
2644 | * after setting TARC0 */ | |
2645 | tctl = E1000_READ_REG(&adapter->hw, TCTL); | |
2646 | tctl |= E1000_TCTL_EN; | |
2647 | E1000_WRITE_REG(&adapter->hw, TCTL, tctl); | |
66a2b0a3 | 2648 | |
1da177e4 LT |
2649 | netif_carrier_on(netdev); |
2650 | netif_wake_queue(netdev); | |
2651 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
2652 | adapter->smartspeed = 0; | |
bb8e3311 JG |
2653 | } else { |
2654 | /* make sure the receive unit is started */ | |
2655 | if (adapter->hw.rx_needs_kicking) { | |
2656 | struct e1000_hw *hw = &adapter->hw; | |
2657 | uint32_t rctl = E1000_READ_REG(hw, RCTL); | |
2658 | E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN); | |
2659 | } | |
1da177e4 LT |
2660 | } |
2661 | } else { | |
96838a40 | 2662 | if (netif_carrier_ok(netdev)) { |
1da177e4 LT |
2663 | adapter->link_speed = 0; |
2664 | adapter->link_duplex = 0; | |
2665 | DPRINTK(LINK, INFO, "NIC Link is Down\n"); | |
2666 | netif_carrier_off(netdev); | |
2667 | netif_stop_queue(netdev); | |
2668 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
87041639 JK |
2669 | |
2670 | /* 80003ES2LAN workaround-- | |
2671 | * For packet buffer work-around on link down event; | |
2672 | * disable receives in the ISR and | |
2673 | * reset device here in the watchdog | |
2674 | */ | |
8fc897b0 | 2675 | if (adapter->hw.mac_type == e1000_80003es2lan) |
87041639 JK |
2676 | /* reset device */ |
2677 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
2678 | } |
2679 | ||
2680 | e1000_smartspeed(adapter); | |
2681 | } | |
2682 | ||
2683 | e1000_update_stats(adapter); | |
2684 | ||
2685 | adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; | |
2686 | adapter->tpt_old = adapter->stats.tpt; | |
2687 | adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old; | |
2688 | adapter->colc_old = adapter->stats.colc; | |
2689 | ||
2690 | adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old; | |
2691 | adapter->gorcl_old = adapter->stats.gorcl; | |
2692 | adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old; | |
2693 | adapter->gotcl_old = adapter->stats.gotcl; | |
2694 | ||
2695 | e1000_update_adaptive(&adapter->hw); | |
2696 | ||
f56799ea | 2697 | if (!netif_carrier_ok(netdev)) { |
581d708e | 2698 | if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) { |
1da177e4 LT |
2699 | /* We've lost link, so the controller stops DMA, |
2700 | * but we've got queued Tx work that's never going | |
2701 | * to get done, so reset controller to flush Tx. | |
2702 | * (Do the reset outside of interrupt context). */ | |
87041639 JK |
2703 | adapter->tx_timeout_count++; |
2704 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
2705 | } |
2706 | } | |
2707 | ||
1da177e4 LT |
2708 | /* Cause software interrupt to ensure rx ring is cleaned */ |
2709 | E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0); | |
2710 | ||
2648345f | 2711 | /* Force detection of hung controller every watchdog period */ |
1da177e4 LT |
2712 | adapter->detect_tx_hung = TRUE; |
2713 | ||
96838a40 | 2714 | /* With 82571 controllers, LAA may be overwritten due to controller |
868d5309 MC |
2715 | * reset from the other port. Set the appropriate LAA in RAR[0] */ |
2716 | if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present) | |
2717 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2718 | ||
1da177e4 LT |
2719 | /* Reset the timer */ |
2720 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | |
2721 | } | |
2722 | ||
835bb129 JB |
2723 | enum latency_range { |
2724 | lowest_latency = 0, | |
2725 | low_latency = 1, | |
2726 | bulk_latency = 2, | |
2727 | latency_invalid = 255 | |
2728 | }; | |
2729 | ||
2730 | /** | |
2731 | * e1000_update_itr - update the dynamic ITR value based on statistics | |
2732 | * Stores a new ITR value based on packets and byte | |
2733 | * counts during the last interrupt. The advantage of per interrupt | |
2734 | * computation is faster updates and more accurate ITR for the current | |
2735 | * traffic pattern. Constants in this function were computed | |
2736 | * based on theoretical maximum wire speed and thresholds were set based | |
2737 | * on testing data as well as attempting to minimize response time | |
2738 | * while increasing bulk throughput. | |
2739 | * this functionality is controlled by the InterruptThrottleRate module | |
2740 | * parameter (see e1000_param.c) | |
2741 | * @adapter: pointer to adapter | |
2742 | * @itr_setting: current adapter->itr | |
2743 | * @packets: the number of packets during this measurement interval | |
2744 | * @bytes: the number of bytes during this measurement interval | |
2745 | **/ | |
2746 | static unsigned int e1000_update_itr(struct e1000_adapter *adapter, | |
2747 | uint16_t itr_setting, | |
2748 | int packets, | |
2749 | int bytes) | |
2750 | { | |
2751 | unsigned int retval = itr_setting; | |
2752 | struct e1000_hw *hw = &adapter->hw; | |
2753 | ||
2754 | if (unlikely(hw->mac_type < e1000_82540)) | |
2755 | goto update_itr_done; | |
2756 | ||
2757 | if (packets == 0) | |
2758 | goto update_itr_done; | |
2759 | ||
835bb129 JB |
2760 | switch (itr_setting) { |
2761 | case lowest_latency: | |
2b65326e JB |
2762 | /* jumbo frames get bulk treatment*/ |
2763 | if (bytes/packets > 8000) | |
2764 | retval = bulk_latency; | |
2765 | else if ((packets < 5) && (bytes > 512)) | |
835bb129 JB |
2766 | retval = low_latency; |
2767 | break; | |
2768 | case low_latency: /* 50 usec aka 20000 ints/s */ | |
2769 | if (bytes > 10000) { | |
2b65326e JB |
2770 | /* jumbo frames need bulk latency setting */ |
2771 | if (bytes/packets > 8000) | |
2772 | retval = bulk_latency; | |
2773 | else if ((packets < 10) || ((bytes/packets) > 1200)) | |
835bb129 JB |
2774 | retval = bulk_latency; |
2775 | else if ((packets > 35)) | |
2776 | retval = lowest_latency; | |
2b65326e JB |
2777 | } else if (bytes/packets > 2000) |
2778 | retval = bulk_latency; | |
2779 | else if (packets <= 2 && bytes < 512) | |
835bb129 JB |
2780 | retval = lowest_latency; |
2781 | break; | |
2782 | case bulk_latency: /* 250 usec aka 4000 ints/s */ | |
2783 | if (bytes > 25000) { | |
2784 | if (packets > 35) | |
2785 | retval = low_latency; | |
2b65326e JB |
2786 | } else if (bytes < 6000) { |
2787 | retval = low_latency; | |
835bb129 JB |
2788 | } |
2789 | break; | |
2790 | } | |
2791 | ||
2792 | update_itr_done: | |
2793 | return retval; | |
2794 | } | |
2795 | ||
2796 | static void e1000_set_itr(struct e1000_adapter *adapter) | |
2797 | { | |
2798 | struct e1000_hw *hw = &adapter->hw; | |
2799 | uint16_t current_itr; | |
2800 | uint32_t new_itr = adapter->itr; | |
2801 | ||
2802 | if (unlikely(hw->mac_type < e1000_82540)) | |
2803 | return; | |
2804 | ||
2805 | /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ | |
2806 | if (unlikely(adapter->link_speed != SPEED_1000)) { | |
2807 | current_itr = 0; | |
2808 | new_itr = 4000; | |
2809 | goto set_itr_now; | |
2810 | } | |
2811 | ||
2812 | adapter->tx_itr = e1000_update_itr(adapter, | |
2813 | adapter->tx_itr, | |
2814 | adapter->total_tx_packets, | |
2815 | adapter->total_tx_bytes); | |
2b65326e JB |
2816 | /* conservative mode (itr 3) eliminates the lowest_latency setting */ |
2817 | if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) | |
2818 | adapter->tx_itr = low_latency; | |
2819 | ||
835bb129 JB |
2820 | adapter->rx_itr = e1000_update_itr(adapter, |
2821 | adapter->rx_itr, | |
2822 | adapter->total_rx_packets, | |
2823 | adapter->total_rx_bytes); | |
2b65326e JB |
2824 | /* conservative mode (itr 3) eliminates the lowest_latency setting */ |
2825 | if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) | |
2826 | adapter->rx_itr = low_latency; | |
835bb129 JB |
2827 | |
2828 | current_itr = max(adapter->rx_itr, adapter->tx_itr); | |
2829 | ||
835bb129 JB |
2830 | switch (current_itr) { |
2831 | /* counts and packets in update_itr are dependent on these numbers */ | |
2832 | case lowest_latency: | |
2833 | new_itr = 70000; | |
2834 | break; | |
2835 | case low_latency: | |
2836 | new_itr = 20000; /* aka hwitr = ~200 */ | |
2837 | break; | |
2838 | case bulk_latency: | |
2839 | new_itr = 4000; | |
2840 | break; | |
2841 | default: | |
2842 | break; | |
2843 | } | |
2844 | ||
2845 | set_itr_now: | |
2846 | if (new_itr != adapter->itr) { | |
2847 | /* this attempts to bias the interrupt rate towards Bulk | |
2848 | * by adding intermediate steps when interrupt rate is | |
2849 | * increasing */ | |
2850 | new_itr = new_itr > adapter->itr ? | |
2851 | min(adapter->itr + (new_itr >> 2), new_itr) : | |
2852 | new_itr; | |
2853 | adapter->itr = new_itr; | |
2854 | E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256)); | |
2855 | } | |
2856 | ||
2857 | return; | |
2858 | } | |
2859 | ||
1da177e4 LT |
2860 | #define E1000_TX_FLAGS_CSUM 0x00000001 |
2861 | #define E1000_TX_FLAGS_VLAN 0x00000002 | |
2862 | #define E1000_TX_FLAGS_TSO 0x00000004 | |
2d7edb92 | 2863 | #define E1000_TX_FLAGS_IPV4 0x00000008 |
1da177e4 LT |
2864 | #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 |
2865 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 | |
2866 | ||
e619d523 | 2867 | static int |
581d708e MC |
2868 | e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2869 | struct sk_buff *skb) | |
1da177e4 LT |
2870 | { |
2871 | #ifdef NETIF_F_TSO | |
2872 | struct e1000_context_desc *context_desc; | |
545c67c0 | 2873 | struct e1000_buffer *buffer_info; |
1da177e4 LT |
2874 | unsigned int i; |
2875 | uint32_t cmd_length = 0; | |
2d7edb92 | 2876 | uint16_t ipcse = 0, tucse, mss; |
1da177e4 LT |
2877 | uint8_t ipcss, ipcso, tucss, tucso, hdr_len; |
2878 | int err; | |
2879 | ||
89114afd | 2880 | if (skb_is_gso(skb)) { |
1da177e4 LT |
2881 | if (skb_header_cloned(skb)) { |
2882 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); | |
2883 | if (err) | |
2884 | return err; | |
2885 | } | |
2886 | ||
2887 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | |
7967168c | 2888 | mss = skb_shinfo(skb)->gso_size; |
60828236 | 2889 | if (skb->protocol == htons(ETH_P_IP)) { |
2d7edb92 MC |
2890 | skb->nh.iph->tot_len = 0; |
2891 | skb->nh.iph->check = 0; | |
2892 | skb->h.th->check = | |
2893 | ~csum_tcpudp_magic(skb->nh.iph->saddr, | |
2894 | skb->nh.iph->daddr, | |
2895 | 0, | |
2896 | IPPROTO_TCP, | |
2897 | 0); | |
2898 | cmd_length = E1000_TXD_CMD_IP; | |
2899 | ipcse = skb->h.raw - skb->data - 1; | |
87ca4e5b | 2900 | #ifdef NETIF_F_TSO6 |
e15fdd03 | 2901 | } else if (skb->protocol == htons(ETH_P_IPV6)) { |
2d7edb92 MC |
2902 | skb->nh.ipv6h->payload_len = 0; |
2903 | skb->h.th->check = | |
2904 | ~csum_ipv6_magic(&skb->nh.ipv6h->saddr, | |
2905 | &skb->nh.ipv6h->daddr, | |
2906 | 0, | |
2907 | IPPROTO_TCP, | |
2908 | 0); | |
2909 | ipcse = 0; | |
2910 | #endif | |
2911 | } | |
1da177e4 LT |
2912 | ipcss = skb->nh.raw - skb->data; |
2913 | ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data; | |
1da177e4 LT |
2914 | tucss = skb->h.raw - skb->data; |
2915 | tucso = (void *)&(skb->h.th->check) - (void *)skb->data; | |
2916 | tucse = 0; | |
2917 | ||
2918 | cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | | |
2d7edb92 | 2919 | E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); |
1da177e4 | 2920 | |
581d708e MC |
2921 | i = tx_ring->next_to_use; |
2922 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); | |
545c67c0 | 2923 | buffer_info = &tx_ring->buffer_info[i]; |
1da177e4 LT |
2924 | |
2925 | context_desc->lower_setup.ip_fields.ipcss = ipcss; | |
2926 | context_desc->lower_setup.ip_fields.ipcso = ipcso; | |
2927 | context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); | |
2928 | context_desc->upper_setup.tcp_fields.tucss = tucss; | |
2929 | context_desc->upper_setup.tcp_fields.tucso = tucso; | |
2930 | context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); | |
2931 | context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); | |
2932 | context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; | |
2933 | context_desc->cmd_and_length = cpu_to_le32(cmd_length); | |
2934 | ||
545c67c0 | 2935 | buffer_info->time_stamp = jiffies; |
a9ebadd6 | 2936 | buffer_info->next_to_watch = i; |
545c67c0 | 2937 | |
581d708e MC |
2938 | if (++i == tx_ring->count) i = 0; |
2939 | tx_ring->next_to_use = i; | |
1da177e4 | 2940 | |
8241e35e | 2941 | return TRUE; |
1da177e4 LT |
2942 | } |
2943 | #endif | |
2944 | ||
8241e35e | 2945 | return FALSE; |
1da177e4 LT |
2946 | } |
2947 | ||
e619d523 | 2948 | static boolean_t |
581d708e MC |
2949 | e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2950 | struct sk_buff *skb) | |
1da177e4 LT |
2951 | { |
2952 | struct e1000_context_desc *context_desc; | |
545c67c0 | 2953 | struct e1000_buffer *buffer_info; |
1da177e4 LT |
2954 | unsigned int i; |
2955 | uint8_t css; | |
2956 | ||
84fa7933 | 2957 | if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { |
1da177e4 LT |
2958 | css = skb->h.raw - skb->data; |
2959 | ||
581d708e | 2960 | i = tx_ring->next_to_use; |
545c67c0 | 2961 | buffer_info = &tx_ring->buffer_info[i]; |
581d708e | 2962 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); |
1da177e4 LT |
2963 | |
2964 | context_desc->upper_setup.tcp_fields.tucss = css; | |
ff1dcadb | 2965 | context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset; |
1da177e4 LT |
2966 | context_desc->upper_setup.tcp_fields.tucse = 0; |
2967 | context_desc->tcp_seg_setup.data = 0; | |
2968 | context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT); | |
2969 | ||
545c67c0 | 2970 | buffer_info->time_stamp = jiffies; |
a9ebadd6 | 2971 | buffer_info->next_to_watch = i; |
545c67c0 | 2972 | |
581d708e MC |
2973 | if (unlikely(++i == tx_ring->count)) i = 0; |
2974 | tx_ring->next_to_use = i; | |
1da177e4 LT |
2975 | |
2976 | return TRUE; | |
2977 | } | |
2978 | ||
2979 | return FALSE; | |
2980 | } | |
2981 | ||
2982 | #define E1000_MAX_TXD_PWR 12 | |
2983 | #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR) | |
2984 | ||
e619d523 | 2985 | static int |
581d708e MC |
2986 | e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2987 | struct sk_buff *skb, unsigned int first, unsigned int max_per_txd, | |
2988 | unsigned int nr_frags, unsigned int mss) | |
1da177e4 | 2989 | { |
1da177e4 LT |
2990 | struct e1000_buffer *buffer_info; |
2991 | unsigned int len = skb->len; | |
2992 | unsigned int offset = 0, size, count = 0, i; | |
2993 | unsigned int f; | |
2994 | len -= skb->data_len; | |
2995 | ||
2996 | i = tx_ring->next_to_use; | |
2997 | ||
96838a40 | 2998 | while (len) { |
1da177e4 LT |
2999 | buffer_info = &tx_ring->buffer_info[i]; |
3000 | size = min(len, max_per_txd); | |
3001 | #ifdef NETIF_F_TSO | |
fd803241 JK |
3002 | /* Workaround for Controller erratum -- |
3003 | * descriptor for non-tso packet in a linear SKB that follows a | |
3004 | * tso gets written back prematurely before the data is fully | |
0f15a8fa | 3005 | * DMA'd to the controller */ |
fd803241 | 3006 | if (!skb->data_len && tx_ring->last_tx_tso && |
89114afd | 3007 | !skb_is_gso(skb)) { |
fd803241 JK |
3008 | tx_ring->last_tx_tso = 0; |
3009 | size -= 4; | |
3010 | } | |
3011 | ||
1da177e4 LT |
3012 | /* Workaround for premature desc write-backs |
3013 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 3014 | if (unlikely(mss && !nr_frags && size == len && size > 8)) |
1da177e4 LT |
3015 | size -= 4; |
3016 | #endif | |
97338bde MC |
3017 | /* work-around for errata 10 and it applies |
3018 | * to all controllers in PCI-X mode | |
3019 | * The fix is to make sure that the first descriptor of a | |
3020 | * packet is smaller than 2048 - 16 - 16 (or 2016) bytes | |
3021 | */ | |
96838a40 | 3022 | if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && |
97338bde MC |
3023 | (size > 2015) && count == 0)) |
3024 | size = 2015; | |
96838a40 | 3025 | |
1da177e4 LT |
3026 | /* Workaround for potential 82544 hang in PCI-X. Avoid |
3027 | * terminating buffers within evenly-aligned dwords. */ | |
96838a40 | 3028 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
3029 | !((unsigned long)(skb->data + offset + size - 1) & 4) && |
3030 | size > 4)) | |
3031 | size -= 4; | |
3032 | ||
3033 | buffer_info->length = size; | |
3034 | buffer_info->dma = | |
3035 | pci_map_single(adapter->pdev, | |
3036 | skb->data + offset, | |
3037 | size, | |
3038 | PCI_DMA_TODEVICE); | |
3039 | buffer_info->time_stamp = jiffies; | |
a9ebadd6 | 3040 | buffer_info->next_to_watch = i; |
1da177e4 LT |
3041 | |
3042 | len -= size; | |
3043 | offset += size; | |
3044 | count++; | |
96838a40 | 3045 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
3046 | } |
3047 | ||
96838a40 | 3048 | for (f = 0; f < nr_frags; f++) { |
1da177e4 LT |
3049 | struct skb_frag_struct *frag; |
3050 | ||
3051 | frag = &skb_shinfo(skb)->frags[f]; | |
3052 | len = frag->size; | |
3053 | offset = frag->page_offset; | |
3054 | ||
96838a40 | 3055 | while (len) { |
1da177e4 LT |
3056 | buffer_info = &tx_ring->buffer_info[i]; |
3057 | size = min(len, max_per_txd); | |
3058 | #ifdef NETIF_F_TSO | |
3059 | /* Workaround for premature desc write-backs | |
3060 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 3061 | if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8)) |
1da177e4 LT |
3062 | size -= 4; |
3063 | #endif | |
3064 | /* Workaround for potential 82544 hang in PCI-X. | |
3065 | * Avoid terminating buffers within evenly-aligned | |
3066 | * dwords. */ | |
96838a40 | 3067 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
3068 | !((unsigned long)(frag->page+offset+size-1) & 4) && |
3069 | size > 4)) | |
3070 | size -= 4; | |
3071 | ||
3072 | buffer_info->length = size; | |
3073 | buffer_info->dma = | |
3074 | pci_map_page(adapter->pdev, | |
3075 | frag->page, | |
3076 | offset, | |
3077 | size, | |
3078 | PCI_DMA_TODEVICE); | |
3079 | buffer_info->time_stamp = jiffies; | |
a9ebadd6 | 3080 | buffer_info->next_to_watch = i; |
1da177e4 LT |
3081 | |
3082 | len -= size; | |
3083 | offset += size; | |
3084 | count++; | |
96838a40 | 3085 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
3086 | } |
3087 | } | |
3088 | ||
3089 | i = (i == 0) ? tx_ring->count - 1 : i - 1; | |
3090 | tx_ring->buffer_info[i].skb = skb; | |
3091 | tx_ring->buffer_info[first].next_to_watch = i; | |
3092 | ||
3093 | return count; | |
3094 | } | |
3095 | ||
e619d523 | 3096 | static void |
581d708e MC |
3097 | e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
3098 | int tx_flags, int count) | |
1da177e4 | 3099 | { |
1da177e4 LT |
3100 | struct e1000_tx_desc *tx_desc = NULL; |
3101 | struct e1000_buffer *buffer_info; | |
3102 | uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; | |
3103 | unsigned int i; | |
3104 | ||
96838a40 | 3105 | if (likely(tx_flags & E1000_TX_FLAGS_TSO)) { |
1da177e4 LT |
3106 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | |
3107 | E1000_TXD_CMD_TSE; | |
2d7edb92 MC |
3108 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; |
3109 | ||
96838a40 | 3110 | if (likely(tx_flags & E1000_TX_FLAGS_IPV4)) |
2d7edb92 | 3111 | txd_upper |= E1000_TXD_POPTS_IXSM << 8; |
1da177e4 LT |
3112 | } |
3113 | ||
96838a40 | 3114 | if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) { |
1da177e4 LT |
3115 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; |
3116 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; | |
3117 | } | |
3118 | ||
96838a40 | 3119 | if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) { |
1da177e4 LT |
3120 | txd_lower |= E1000_TXD_CMD_VLE; |
3121 | txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); | |
3122 | } | |
3123 | ||
3124 | i = tx_ring->next_to_use; | |
3125 | ||
96838a40 | 3126 | while (count--) { |
1da177e4 LT |
3127 | buffer_info = &tx_ring->buffer_info[i]; |
3128 | tx_desc = E1000_TX_DESC(*tx_ring, i); | |
3129 | tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
3130 | tx_desc->lower.data = | |
3131 | cpu_to_le32(txd_lower | buffer_info->length); | |
3132 | tx_desc->upper.data = cpu_to_le32(txd_upper); | |
96838a40 | 3133 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
3134 | } |
3135 | ||
3136 | tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); | |
3137 | ||
3138 | /* Force memory writes to complete before letting h/w | |
3139 | * know there are new descriptors to fetch. (Only | |
3140 | * applicable for weak-ordered memory model archs, | |
3141 | * such as IA-64). */ | |
3142 | wmb(); | |
3143 | ||
3144 | tx_ring->next_to_use = i; | |
581d708e | 3145 | writel(i, adapter->hw.hw_addr + tx_ring->tdt); |
2ce9047f JB |
3146 | /* we need this if more than one processor can write to our tail |
3147 | * at a time, it syncronizes IO on IA64/Altix systems */ | |
3148 | mmiowb(); | |
1da177e4 LT |
3149 | } |
3150 | ||
3151 | /** | |
3152 | * 82547 workaround to avoid controller hang in half-duplex environment. | |
3153 | * The workaround is to avoid queuing a large packet that would span | |
3154 | * the internal Tx FIFO ring boundary by notifying the stack to resend | |
3155 | * the packet at a later time. This gives the Tx FIFO an opportunity to | |
3156 | * flush all packets. When that occurs, we reset the Tx FIFO pointers | |
3157 | * to the beginning of the Tx FIFO. | |
3158 | **/ | |
3159 | ||
3160 | #define E1000_FIFO_HDR 0x10 | |
3161 | #define E1000_82547_PAD_LEN 0x3E0 | |
3162 | ||
e619d523 | 3163 | static int |
1da177e4 LT |
3164 | e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb) |
3165 | { | |
3166 | uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; | |
3167 | uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR; | |
3168 | ||
3169 | E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR); | |
3170 | ||
96838a40 | 3171 | if (adapter->link_duplex != HALF_DUPLEX) |
1da177e4 LT |
3172 | goto no_fifo_stall_required; |
3173 | ||
96838a40 | 3174 | if (atomic_read(&adapter->tx_fifo_stall)) |
1da177e4 LT |
3175 | return 1; |
3176 | ||
96838a40 | 3177 | if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) { |
1da177e4 LT |
3178 | atomic_set(&adapter->tx_fifo_stall, 1); |
3179 | return 1; | |
3180 | } | |
3181 | ||
3182 | no_fifo_stall_required: | |
3183 | adapter->tx_fifo_head += skb_fifo_len; | |
96838a40 | 3184 | if (adapter->tx_fifo_head >= adapter->tx_fifo_size) |
1da177e4 LT |
3185 | adapter->tx_fifo_head -= adapter->tx_fifo_size; |
3186 | return 0; | |
3187 | } | |
3188 | ||
2d7edb92 | 3189 | #define MINIMUM_DHCP_PACKET_SIZE 282 |
e619d523 | 3190 | static int |
2d7edb92 MC |
3191 | e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb) |
3192 | { | |
3193 | struct e1000_hw *hw = &adapter->hw; | |
3194 | uint16_t length, offset; | |
96838a40 JB |
3195 | if (vlan_tx_tag_present(skb)) { |
3196 | if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && | |
2d7edb92 MC |
3197 | ( adapter->hw.mng_cookie.status & |
3198 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) ) | |
3199 | return 0; | |
3200 | } | |
20a44028 | 3201 | if (skb->len > MINIMUM_DHCP_PACKET_SIZE) { |
2d7edb92 | 3202 | struct ethhdr *eth = (struct ethhdr *) skb->data; |
96838a40 JB |
3203 | if ((htons(ETH_P_IP) == eth->h_proto)) { |
3204 | const struct iphdr *ip = | |
2d7edb92 | 3205 | (struct iphdr *)((uint8_t *)skb->data+14); |
96838a40 JB |
3206 | if (IPPROTO_UDP == ip->protocol) { |
3207 | struct udphdr *udp = | |
3208 | (struct udphdr *)((uint8_t *)ip + | |
2d7edb92 | 3209 | (ip->ihl << 2)); |
96838a40 | 3210 | if (ntohs(udp->dest) == 67) { |
2d7edb92 MC |
3211 | offset = (uint8_t *)udp + 8 - skb->data; |
3212 | length = skb->len - offset; | |
3213 | ||
3214 | return e1000_mng_write_dhcp_info(hw, | |
96838a40 | 3215 | (uint8_t *)udp + 8, |
2d7edb92 MC |
3216 | length); |
3217 | } | |
3218 | } | |
3219 | } | |
3220 | } | |
3221 | return 0; | |
3222 | } | |
3223 | ||
65c7973f JB |
3224 | static int __e1000_maybe_stop_tx(struct net_device *netdev, int size) |
3225 | { | |
3226 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
3227 | struct e1000_tx_ring *tx_ring = adapter->tx_ring; | |
3228 | ||
3229 | netif_stop_queue(netdev); | |
3230 | /* Herbert's original patch had: | |
3231 | * smp_mb__after_netif_stop_queue(); | |
3232 | * but since that doesn't exist yet, just open code it. */ | |
3233 | smp_mb(); | |
3234 | ||
3235 | /* We need to check again in a case another CPU has just | |
3236 | * made room available. */ | |
3237 | if (likely(E1000_DESC_UNUSED(tx_ring) < size)) | |
3238 | return -EBUSY; | |
3239 | ||
3240 | /* A reprieve! */ | |
3241 | netif_start_queue(netdev); | |
fcfb1224 | 3242 | ++adapter->restart_queue; |
65c7973f JB |
3243 | return 0; |
3244 | } | |
3245 | ||
3246 | static int e1000_maybe_stop_tx(struct net_device *netdev, | |
3247 | struct e1000_tx_ring *tx_ring, int size) | |
3248 | { | |
3249 | if (likely(E1000_DESC_UNUSED(tx_ring) >= size)) | |
3250 | return 0; | |
3251 | return __e1000_maybe_stop_tx(netdev, size); | |
3252 | } | |
3253 | ||
1da177e4 LT |
3254 | #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) |
3255 | static int | |
3256 | e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |
3257 | { | |
60490fe0 | 3258 | struct e1000_adapter *adapter = netdev_priv(netdev); |
581d708e | 3259 | struct e1000_tx_ring *tx_ring; |
1da177e4 LT |
3260 | unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD; |
3261 | unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; | |
3262 | unsigned int tx_flags = 0; | |
3263 | unsigned int len = skb->len; | |
3264 | unsigned long flags; | |
3265 | unsigned int nr_frags = 0; | |
3266 | unsigned int mss = 0; | |
3267 | int count = 0; | |
76c224bc | 3268 | int tso; |
1da177e4 LT |
3269 | unsigned int f; |
3270 | len -= skb->data_len; | |
3271 | ||
65c7973f JB |
3272 | /* This goes back to the question of how to logically map a tx queue |
3273 | * to a flow. Right now, performance is impacted slightly negatively | |
3274 | * if using multiple tx queues. If the stack breaks away from a | |
3275 | * single qdisc implementation, we can look at this again. */ | |
581d708e | 3276 | tx_ring = adapter->tx_ring; |
24025e4e | 3277 | |
581d708e | 3278 | if (unlikely(skb->len <= 0)) { |
1da177e4 LT |
3279 | dev_kfree_skb_any(skb); |
3280 | return NETDEV_TX_OK; | |
3281 | } | |
3282 | ||
032fe6e9 JB |
3283 | /* 82571 and newer doesn't need the workaround that limited descriptor |
3284 | * length to 4kB */ | |
3285 | if (adapter->hw.mac_type >= e1000_82571) | |
3286 | max_per_txd = 8192; | |
3287 | ||
1da177e4 | 3288 | #ifdef NETIF_F_TSO |
7967168c | 3289 | mss = skb_shinfo(skb)->gso_size; |
76c224bc | 3290 | /* The controller does a simple calculation to |
1da177e4 LT |
3291 | * make sure there is enough room in the FIFO before |
3292 | * initiating the DMA for each buffer. The calc is: | |
3293 | * 4 = ceil(buffer len/mss). To make sure we don't | |
3294 | * overrun the FIFO, adjust the max buffer len if mss | |
3295 | * drops. */ | |
96838a40 | 3296 | if (mss) { |
9a3056da | 3297 | uint8_t hdr_len; |
1da177e4 LT |
3298 | max_per_txd = min(mss << 2, max_per_txd); |
3299 | max_txd_pwr = fls(max_per_txd) - 1; | |
9a3056da | 3300 | |
90fb5135 AK |
3301 | /* TSO Workaround for 82571/2/3 Controllers -- if skb->data |
3302 | * points to just header, pull a few bytes of payload from | |
3303 | * frags into skb->data */ | |
9a3056da | 3304 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); |
9f687888 JK |
3305 | if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) { |
3306 | switch (adapter->hw.mac_type) { | |
3307 | unsigned int pull_size; | |
3308 | case e1000_82571: | |
3309 | case e1000_82572: | |
3310 | case e1000_82573: | |
cd94dd0b | 3311 | case e1000_ich8lan: |
9f687888 JK |
3312 | pull_size = min((unsigned int)4, skb->data_len); |
3313 | if (!__pskb_pull_tail(skb, pull_size)) { | |
a5eafce2 | 3314 | DPRINTK(DRV, ERR, |
9f687888 JK |
3315 | "__pskb_pull_tail failed.\n"); |
3316 | dev_kfree_skb_any(skb); | |
749dfc70 | 3317 | return NETDEV_TX_OK; |
9f687888 JK |
3318 | } |
3319 | len = skb->len - skb->data_len; | |
3320 | break; | |
3321 | default: | |
3322 | /* do nothing */ | |
3323 | break; | |
d74bbd3b | 3324 | } |
9a3056da | 3325 | } |
1da177e4 LT |
3326 | } |
3327 | ||
9a3056da | 3328 | /* reserve a descriptor for the offload context */ |
84fa7933 | 3329 | if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) |
1da177e4 | 3330 | count++; |
2648345f | 3331 | count++; |
1da177e4 | 3332 | #else |
84fa7933 | 3333 | if (skb->ip_summed == CHECKSUM_PARTIAL) |
1da177e4 LT |
3334 | count++; |
3335 | #endif | |
fd803241 JK |
3336 | |
3337 | #ifdef NETIF_F_TSO | |
3338 | /* Controller Erratum workaround */ | |
89114afd | 3339 | if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb)) |
fd803241 JK |
3340 | count++; |
3341 | #endif | |
3342 | ||
1da177e4 LT |
3343 | count += TXD_USE_COUNT(len, max_txd_pwr); |
3344 | ||
96838a40 | 3345 | if (adapter->pcix_82544) |
1da177e4 LT |
3346 | count++; |
3347 | ||
96838a40 | 3348 | /* work-around for errata 10 and it applies to all controllers |
97338bde MC |
3349 | * in PCI-X mode, so add one more descriptor to the count |
3350 | */ | |
96838a40 | 3351 | if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && |
97338bde MC |
3352 | (len > 2015))) |
3353 | count++; | |
3354 | ||
1da177e4 | 3355 | nr_frags = skb_shinfo(skb)->nr_frags; |
96838a40 | 3356 | for (f = 0; f < nr_frags; f++) |
1da177e4 LT |
3357 | count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size, |
3358 | max_txd_pwr); | |
96838a40 | 3359 | if (adapter->pcix_82544) |
1da177e4 LT |
3360 | count += nr_frags; |
3361 | ||
0f15a8fa JK |
3362 | |
3363 | if (adapter->hw.tx_pkt_filtering && | |
3364 | (adapter->hw.mac_type == e1000_82573)) | |
2d7edb92 MC |
3365 | e1000_transfer_dhcp_info(adapter, skb); |
3366 | ||
581d708e MC |
3367 | local_irq_save(flags); |
3368 | if (!spin_trylock(&tx_ring->tx_lock)) { | |
3369 | /* Collision - tell upper layer to requeue */ | |
3370 | local_irq_restore(flags); | |
3371 | return NETDEV_TX_LOCKED; | |
3372 | } | |
1da177e4 LT |
3373 | |
3374 | /* need: count + 2 desc gap to keep tail from touching | |
3375 | * head, otherwise try next time */ | |
65c7973f | 3376 | if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) { |
581d708e | 3377 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3378 | return NETDEV_TX_BUSY; |
3379 | } | |
3380 | ||
96838a40 JB |
3381 | if (unlikely(adapter->hw.mac_type == e1000_82547)) { |
3382 | if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) { | |
1da177e4 | 3383 | netif_stop_queue(netdev); |
1314bbf3 | 3384 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); |
581d708e | 3385 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3386 | return NETDEV_TX_BUSY; |
3387 | } | |
3388 | } | |
3389 | ||
96838a40 | 3390 | if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) { |
1da177e4 LT |
3391 | tx_flags |= E1000_TX_FLAGS_VLAN; |
3392 | tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); | |
3393 | } | |
3394 | ||
581d708e | 3395 | first = tx_ring->next_to_use; |
96838a40 | 3396 | |
581d708e | 3397 | tso = e1000_tso(adapter, tx_ring, skb); |
1da177e4 LT |
3398 | if (tso < 0) { |
3399 | dev_kfree_skb_any(skb); | |
581d708e | 3400 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3401 | return NETDEV_TX_OK; |
3402 | } | |
3403 | ||
fd803241 JK |
3404 | if (likely(tso)) { |
3405 | tx_ring->last_tx_tso = 1; | |
1da177e4 | 3406 | tx_flags |= E1000_TX_FLAGS_TSO; |
fd803241 | 3407 | } else if (likely(e1000_tx_csum(adapter, tx_ring, skb))) |
1da177e4 LT |
3408 | tx_flags |= E1000_TX_FLAGS_CSUM; |
3409 | ||
2d7edb92 | 3410 | /* Old method was to assume IPv4 packet by default if TSO was enabled. |
868d5309 | 3411 | * 82571 hardware supports TSO capabilities for IPv6 as well... |
2d7edb92 | 3412 | * no longer assume, we must. */ |
60828236 | 3413 | if (likely(skb->protocol == htons(ETH_P_IP))) |
2d7edb92 MC |
3414 | tx_flags |= E1000_TX_FLAGS_IPV4; |
3415 | ||
581d708e MC |
3416 | e1000_tx_queue(adapter, tx_ring, tx_flags, |
3417 | e1000_tx_map(adapter, tx_ring, skb, first, | |
3418 | max_per_txd, nr_frags, mss)); | |
1da177e4 LT |
3419 | |
3420 | netdev->trans_start = jiffies; | |
3421 | ||
3422 | /* Make sure there is space in the ring for the next send. */ | |
65c7973f | 3423 | e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2); |
1da177e4 | 3424 | |
581d708e | 3425 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3426 | return NETDEV_TX_OK; |
3427 | } | |
3428 | ||
3429 | /** | |
3430 | * e1000_tx_timeout - Respond to a Tx Hang | |
3431 | * @netdev: network interface device structure | |
3432 | **/ | |
3433 | ||
3434 | static void | |
3435 | e1000_tx_timeout(struct net_device *netdev) | |
3436 | { | |
60490fe0 | 3437 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
3438 | |
3439 | /* Do the reset outside of interrupt context */ | |
87041639 JK |
3440 | adapter->tx_timeout_count++; |
3441 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
3442 | } |
3443 | ||
3444 | static void | |
65f27f38 | 3445 | e1000_reset_task(struct work_struct *work) |
1da177e4 | 3446 | { |
65f27f38 DH |
3447 | struct e1000_adapter *adapter = |
3448 | container_of(work, struct e1000_adapter, reset_task); | |
1da177e4 | 3449 | |
2db10a08 | 3450 | e1000_reinit_locked(adapter); |
1da177e4 LT |
3451 | } |
3452 | ||
3453 | /** | |
3454 | * e1000_get_stats - Get System Network Statistics | |
3455 | * @netdev: network interface device structure | |
3456 | * | |
3457 | * Returns the address of the device statistics structure. | |
3458 | * The statistics are actually updated from the timer callback. | |
3459 | **/ | |
3460 | ||
3461 | static struct net_device_stats * | |
3462 | e1000_get_stats(struct net_device *netdev) | |
3463 | { | |
60490fe0 | 3464 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3465 | |
6b7660cd | 3466 | /* only return the current stats */ |
1da177e4 LT |
3467 | return &adapter->net_stats; |
3468 | } | |
3469 | ||
3470 | /** | |
3471 | * e1000_change_mtu - Change the Maximum Transfer Unit | |
3472 | * @netdev: network interface device structure | |
3473 | * @new_mtu: new value for maximum frame size | |
3474 | * | |
3475 | * Returns 0 on success, negative on failure | |
3476 | **/ | |
3477 | ||
3478 | static int | |
3479 | e1000_change_mtu(struct net_device *netdev, int new_mtu) | |
3480 | { | |
60490fe0 | 3481 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3482 | int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; |
85b22eb6 | 3483 | uint16_t eeprom_data = 0; |
1da177e4 | 3484 | |
96838a40 JB |
3485 | if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) || |
3486 | (max_frame > MAX_JUMBO_FRAME_SIZE)) { | |
3487 | DPRINTK(PROBE, ERR, "Invalid MTU setting\n"); | |
1da177e4 | 3488 | return -EINVAL; |
2d7edb92 | 3489 | } |
1da177e4 | 3490 | |
997f5cbd JK |
3491 | /* Adapter-specific max frame size limits. */ |
3492 | switch (adapter->hw.mac_type) { | |
9e2feace | 3493 | case e1000_undefined ... e1000_82542_rev2_1: |
cd94dd0b | 3494 | case e1000_ich8lan: |
997f5cbd JK |
3495 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { |
3496 | DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n"); | |
2d7edb92 | 3497 | return -EINVAL; |
2d7edb92 | 3498 | } |
997f5cbd | 3499 | break; |
85b22eb6 | 3500 | case e1000_82573: |
249d71d6 BA |
3501 | /* Jumbo Frames not supported if: |
3502 | * - this is not an 82573L device | |
3503 | * - ASPM is enabled in any way (0x1A bits 3:2) */ | |
85b22eb6 JK |
3504 | e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1, |
3505 | &eeprom_data); | |
249d71d6 BA |
3506 | if ((adapter->hw.device_id != E1000_DEV_ID_82573L) || |
3507 | (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) { | |
85b22eb6 JK |
3508 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { |
3509 | DPRINTK(PROBE, ERR, | |
3510 | "Jumbo Frames not supported.\n"); | |
3511 | return -EINVAL; | |
3512 | } | |
3513 | break; | |
3514 | } | |
249d71d6 BA |
3515 | /* ERT will be enabled later to enable wire speed receives */ |
3516 | ||
85b22eb6 | 3517 | /* fall through to get support */ |
997f5cbd JK |
3518 | case e1000_82571: |
3519 | case e1000_82572: | |
87041639 | 3520 | case e1000_80003es2lan: |
997f5cbd JK |
3521 | #define MAX_STD_JUMBO_FRAME_SIZE 9234 |
3522 | if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) { | |
3523 | DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n"); | |
3524 | return -EINVAL; | |
3525 | } | |
3526 | break; | |
3527 | default: | |
3528 | /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */ | |
3529 | break; | |
1da177e4 LT |
3530 | } |
3531 | ||
87f5032e | 3532 | /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN |
9e2feace AK |
3533 | * means we reserve 2 more, this pushes us to allocate from the next |
3534 | * larger slab size | |
3535 | * i.e. RXBUFFER_2048 --> size-4096 slab */ | |
3536 | ||
3537 | if (max_frame <= E1000_RXBUFFER_256) | |
3538 | adapter->rx_buffer_len = E1000_RXBUFFER_256; | |
3539 | else if (max_frame <= E1000_RXBUFFER_512) | |
3540 | adapter->rx_buffer_len = E1000_RXBUFFER_512; | |
3541 | else if (max_frame <= E1000_RXBUFFER_1024) | |
3542 | adapter->rx_buffer_len = E1000_RXBUFFER_1024; | |
3543 | else if (max_frame <= E1000_RXBUFFER_2048) | |
3544 | adapter->rx_buffer_len = E1000_RXBUFFER_2048; | |
3545 | else if (max_frame <= E1000_RXBUFFER_4096) | |
3546 | adapter->rx_buffer_len = E1000_RXBUFFER_4096; | |
3547 | else if (max_frame <= E1000_RXBUFFER_8192) | |
3548 | adapter->rx_buffer_len = E1000_RXBUFFER_8192; | |
3549 | else if (max_frame <= E1000_RXBUFFER_16384) | |
3550 | adapter->rx_buffer_len = E1000_RXBUFFER_16384; | |
3551 | ||
3552 | /* adjust allocation if LPE protects us, and we aren't using SBP */ | |
9e2feace AK |
3553 | if (!adapter->hw.tbi_compatibility_on && |
3554 | ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) || | |
3555 | (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))) | |
3556 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; | |
997f5cbd | 3557 | |
2d7edb92 | 3558 | netdev->mtu = new_mtu; |
83cd8279 | 3559 | adapter->hw.max_frame_size = max_frame; |
2d7edb92 | 3560 | |
2db10a08 AK |
3561 | if (netif_running(netdev)) |
3562 | e1000_reinit_locked(adapter); | |
1da177e4 | 3563 | |
1da177e4 LT |
3564 | return 0; |
3565 | } | |
3566 | ||
3567 | /** | |
3568 | * e1000_update_stats - Update the board statistics counters | |
3569 | * @adapter: board private structure | |
3570 | **/ | |
3571 | ||
3572 | void | |
3573 | e1000_update_stats(struct e1000_adapter *adapter) | |
3574 | { | |
3575 | struct e1000_hw *hw = &adapter->hw; | |
282f33c9 | 3576 | struct pci_dev *pdev = adapter->pdev; |
1da177e4 LT |
3577 | unsigned long flags; |
3578 | uint16_t phy_tmp; | |
3579 | ||
3580 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF | |
3581 | ||
282f33c9 LV |
3582 | /* |
3583 | * Prevent stats update while adapter is being reset, or if the pci | |
3584 | * connection is down. | |
3585 | */ | |
9026729b | 3586 | if (adapter->link_speed == 0) |
282f33c9 LV |
3587 | return; |
3588 | if (pdev->error_state && pdev->error_state != pci_channel_io_normal) | |
9026729b AK |
3589 | return; |
3590 | ||
1da177e4 LT |
3591 | spin_lock_irqsave(&adapter->stats_lock, flags); |
3592 | ||
3593 | /* these counters are modified from e1000_adjust_tbi_stats, | |
3594 | * called from the interrupt context, so they must only | |
3595 | * be written while holding adapter->stats_lock | |
3596 | */ | |
3597 | ||
3598 | adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS); | |
3599 | adapter->stats.gprc += E1000_READ_REG(hw, GPRC); | |
3600 | adapter->stats.gorcl += E1000_READ_REG(hw, GORCL); | |
3601 | adapter->stats.gorch += E1000_READ_REG(hw, GORCH); | |
3602 | adapter->stats.bprc += E1000_READ_REG(hw, BPRC); | |
3603 | adapter->stats.mprc += E1000_READ_REG(hw, MPRC); | |
3604 | adapter->stats.roc += E1000_READ_REG(hw, ROC); | |
cd94dd0b AK |
3605 | |
3606 | if (adapter->hw.mac_type != e1000_ich8lan) { | |
90fb5135 AK |
3607 | adapter->stats.prc64 += E1000_READ_REG(hw, PRC64); |
3608 | adapter->stats.prc127 += E1000_READ_REG(hw, PRC127); | |
3609 | adapter->stats.prc255 += E1000_READ_REG(hw, PRC255); | |
3610 | adapter->stats.prc511 += E1000_READ_REG(hw, PRC511); | |
3611 | adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023); | |
3612 | adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522); | |
cd94dd0b | 3613 | } |
1da177e4 LT |
3614 | |
3615 | adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS); | |
3616 | adapter->stats.mpc += E1000_READ_REG(hw, MPC); | |
3617 | adapter->stats.scc += E1000_READ_REG(hw, SCC); | |
3618 | adapter->stats.ecol += E1000_READ_REG(hw, ECOL); | |
3619 | adapter->stats.mcc += E1000_READ_REG(hw, MCC); | |
3620 | adapter->stats.latecol += E1000_READ_REG(hw, LATECOL); | |
3621 | adapter->stats.dc += E1000_READ_REG(hw, DC); | |
3622 | adapter->stats.sec += E1000_READ_REG(hw, SEC); | |
3623 | adapter->stats.rlec += E1000_READ_REG(hw, RLEC); | |
3624 | adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC); | |
3625 | adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC); | |
3626 | adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC); | |
3627 | adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC); | |
3628 | adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC); | |
3629 | adapter->stats.gptc += E1000_READ_REG(hw, GPTC); | |
3630 | adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL); | |
3631 | adapter->stats.gotch += E1000_READ_REG(hw, GOTCH); | |
3632 | adapter->stats.rnbc += E1000_READ_REG(hw, RNBC); | |
3633 | adapter->stats.ruc += E1000_READ_REG(hw, RUC); | |
3634 | adapter->stats.rfc += E1000_READ_REG(hw, RFC); | |
3635 | adapter->stats.rjc += E1000_READ_REG(hw, RJC); | |
3636 | adapter->stats.torl += E1000_READ_REG(hw, TORL); | |
3637 | adapter->stats.torh += E1000_READ_REG(hw, TORH); | |
3638 | adapter->stats.totl += E1000_READ_REG(hw, TOTL); | |
3639 | adapter->stats.toth += E1000_READ_REG(hw, TOTH); | |
3640 | adapter->stats.tpr += E1000_READ_REG(hw, TPR); | |
cd94dd0b AK |
3641 | |
3642 | if (adapter->hw.mac_type != e1000_ich8lan) { | |
90fb5135 AK |
3643 | adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64); |
3644 | adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127); | |
3645 | adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255); | |
3646 | adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511); | |
3647 | adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023); | |
3648 | adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522); | |
cd94dd0b AK |
3649 | } |
3650 | ||
1da177e4 LT |
3651 | adapter->stats.mptc += E1000_READ_REG(hw, MPTC); |
3652 | adapter->stats.bptc += E1000_READ_REG(hw, BPTC); | |
3653 | ||
3654 | /* used for adaptive IFS */ | |
3655 | ||
3656 | hw->tx_packet_delta = E1000_READ_REG(hw, TPT); | |
3657 | adapter->stats.tpt += hw->tx_packet_delta; | |
3658 | hw->collision_delta = E1000_READ_REG(hw, COLC); | |
3659 | adapter->stats.colc += hw->collision_delta; | |
3660 | ||
96838a40 | 3661 | if (hw->mac_type >= e1000_82543) { |
1da177e4 LT |
3662 | adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC); |
3663 | adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC); | |
3664 | adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS); | |
3665 | adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR); | |
3666 | adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC); | |
3667 | adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC); | |
3668 | } | |
96838a40 | 3669 | if (hw->mac_type > e1000_82547_rev_2) { |
2d7edb92 MC |
3670 | adapter->stats.iac += E1000_READ_REG(hw, IAC); |
3671 | adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC); | |
cd94dd0b AK |
3672 | |
3673 | if (adapter->hw.mac_type != e1000_ich8lan) { | |
90fb5135 AK |
3674 | adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC); |
3675 | adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC); | |
3676 | adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC); | |
3677 | adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC); | |
3678 | adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC); | |
3679 | adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC); | |
3680 | adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC); | |
cd94dd0b | 3681 | } |
2d7edb92 | 3682 | } |
1da177e4 LT |
3683 | |
3684 | /* Fill out the OS statistics structure */ | |
1da177e4 LT |
3685 | adapter->net_stats.rx_packets = adapter->stats.gprc; |
3686 | adapter->net_stats.tx_packets = adapter->stats.gptc; | |
3687 | adapter->net_stats.rx_bytes = adapter->stats.gorcl; | |
3688 | adapter->net_stats.tx_bytes = adapter->stats.gotcl; | |
3689 | adapter->net_stats.multicast = adapter->stats.mprc; | |
3690 | adapter->net_stats.collisions = adapter->stats.colc; | |
3691 | ||
3692 | /* Rx Errors */ | |
3693 | ||
87041639 JK |
3694 | /* RLEC on some newer hardware can be incorrect so build |
3695 | * our own version based on RUC and ROC */ | |
1da177e4 LT |
3696 | adapter->net_stats.rx_errors = adapter->stats.rxerrc + |
3697 | adapter->stats.crcerrs + adapter->stats.algnerrc + | |
87041639 JK |
3698 | adapter->stats.ruc + adapter->stats.roc + |
3699 | adapter->stats.cexterr; | |
49559854 MW |
3700 | adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc; |
3701 | adapter->net_stats.rx_length_errors = adapter->stats.rlerrc; | |
1da177e4 LT |
3702 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; |
3703 | adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc; | |
1da177e4 LT |
3704 | adapter->net_stats.rx_missed_errors = adapter->stats.mpc; |
3705 | ||
3706 | /* Tx Errors */ | |
49559854 MW |
3707 | adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol; |
3708 | adapter->net_stats.tx_errors = adapter->stats.txerrc; | |
1da177e4 LT |
3709 | adapter->net_stats.tx_aborted_errors = adapter->stats.ecol; |
3710 | adapter->net_stats.tx_window_errors = adapter->stats.latecol; | |
3711 | adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs; | |
167fb284 JG |
3712 | if (adapter->hw.bad_tx_carr_stats_fd && |
3713 | adapter->link_duplex == FULL_DUPLEX) { | |
3714 | adapter->net_stats.tx_carrier_errors = 0; | |
3715 | adapter->stats.tncrs = 0; | |
3716 | } | |
1da177e4 LT |
3717 | |
3718 | /* Tx Dropped needs to be maintained elsewhere */ | |
3719 | ||
3720 | /* Phy Stats */ | |
96838a40 JB |
3721 | if (hw->media_type == e1000_media_type_copper) { |
3722 | if ((adapter->link_speed == SPEED_1000) && | |
1da177e4 LT |
3723 | (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) { |
3724 | phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK; | |
3725 | adapter->phy_stats.idle_errors += phy_tmp; | |
3726 | } | |
3727 | ||
96838a40 | 3728 | if ((hw->mac_type <= e1000_82546) && |
1da177e4 LT |
3729 | (hw->phy_type == e1000_phy_m88) && |
3730 | !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp)) | |
3731 | adapter->phy_stats.receive_errors += phy_tmp; | |
3732 | } | |
3733 | ||
3734 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
3735 | } | |
9ac98284 JB |
3736 | #ifdef CONFIG_PCI_MSI |
3737 | ||
3738 | /** | |
3739 | * e1000_intr_msi - Interrupt Handler | |
3740 | * @irq: interrupt number | |
3741 | * @data: pointer to a network interface device structure | |
3742 | **/ | |
3743 | ||
3744 | static | |
3745 | irqreturn_t e1000_intr_msi(int irq, void *data) | |
3746 | { | |
3747 | struct net_device *netdev = data; | |
3748 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
3749 | struct e1000_hw *hw = &adapter->hw; | |
3750 | #ifndef CONFIG_E1000_NAPI | |
3751 | int i; | |
3752 | #endif | |
3753 | ||
3754 | /* this code avoids the read of ICR but has to get 1000 interrupts | |
3755 | * at every link change event before it will notice the change */ | |
3756 | if (++adapter->detect_link >= 1000) { | |
3757 | uint32_t icr = E1000_READ_REG(hw, ICR); | |
3758 | #ifdef CONFIG_E1000_NAPI | |
3759 | /* read ICR disables interrupts using IAM, so keep up with our | |
3760 | * enable/disable accounting */ | |
3761 | atomic_inc(&adapter->irq_sem); | |
3762 | #endif | |
3763 | adapter->detect_link = 0; | |
3764 | if ((icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) && | |
3765 | (icr & E1000_ICR_INT_ASSERTED)) { | |
3766 | hw->get_link_status = 1; | |
3767 | /* 80003ES2LAN workaround-- | |
3768 | * For packet buffer work-around on link down event; | |
3769 | * disable receives here in the ISR and | |
3770 | * reset adapter in watchdog | |
3771 | */ | |
3772 | if (netif_carrier_ok(netdev) && | |
3773 | (adapter->hw.mac_type == e1000_80003es2lan)) { | |
3774 | /* disable receives */ | |
3775 | uint32_t rctl = E1000_READ_REG(hw, RCTL); | |
3776 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
3777 | } | |
3778 | /* guard against interrupt when we're going down */ | |
3779 | if (!test_bit(__E1000_DOWN, &adapter->flags)) | |
3780 | mod_timer(&adapter->watchdog_timer, | |
3781 | jiffies + 1); | |
3782 | } | |
3783 | } else { | |
3784 | E1000_WRITE_REG(hw, ICR, (0xffffffff & ~(E1000_ICR_RXSEQ | | |
3785 | E1000_ICR_LSC))); | |
3786 | /* bummer we have to flush here, but things break otherwise as | |
3787 | * some event appears to be lost or delayed and throughput | |
3788 | * drops. In almost all tests this flush is un-necessary */ | |
3789 | E1000_WRITE_FLUSH(hw); | |
3790 | #ifdef CONFIG_E1000_NAPI | |
3791 | /* Interrupt Auto-Mask (IAM)...upon writing ICR, interrupts are | |
3792 | * masked. No need for the IMC write, but it does mean we | |
3793 | * should account for it ASAP. */ | |
3794 | atomic_inc(&adapter->irq_sem); | |
3795 | #endif | |
3796 | } | |
3797 | ||
3798 | #ifdef CONFIG_E1000_NAPI | |
835bb129 JB |
3799 | if (likely(netif_rx_schedule_prep(netdev))) { |
3800 | adapter->total_tx_bytes = 0; | |
3801 | adapter->total_tx_packets = 0; | |
3802 | adapter->total_rx_bytes = 0; | |
3803 | adapter->total_rx_packets = 0; | |
9ac98284 | 3804 | __netif_rx_schedule(netdev); |
835bb129 | 3805 | } else |
9ac98284 JB |
3806 | e1000_irq_enable(adapter); |
3807 | #else | |
835bb129 JB |
3808 | adapter->total_tx_bytes = 0; |
3809 | adapter->total_rx_bytes = 0; | |
3810 | adapter->total_tx_packets = 0; | |
3811 | adapter->total_rx_packets = 0; | |
3812 | ||
9ac98284 JB |
3813 | for (i = 0; i < E1000_MAX_INTR; i++) |
3814 | if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & | |
3815 | !e1000_clean_tx_irq(adapter, adapter->tx_ring))) | |
3816 | break; | |
835bb129 JB |
3817 | |
3818 | if (likely(adapter->itr_setting & 3)) | |
3819 | e1000_set_itr(adapter); | |
9ac98284 JB |
3820 | #endif |
3821 | ||
3822 | return IRQ_HANDLED; | |
3823 | } | |
3824 | #endif | |
1da177e4 LT |
3825 | |
3826 | /** | |
3827 | * e1000_intr - Interrupt Handler | |
3828 | * @irq: interrupt number | |
3829 | * @data: pointer to a network interface device structure | |
1da177e4 LT |
3830 | **/ |
3831 | ||
3832 | static irqreturn_t | |
7d12e780 | 3833 | e1000_intr(int irq, void *data) |
1da177e4 LT |
3834 | { |
3835 | struct net_device *netdev = data; | |
60490fe0 | 3836 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3837 | struct e1000_hw *hw = &adapter->hw; |
87041639 | 3838 | uint32_t rctl, icr = E1000_READ_REG(hw, ICR); |
1e613fd9 | 3839 | #ifndef CONFIG_E1000_NAPI |
581d708e | 3840 | int i; |
835bb129 JB |
3841 | #endif |
3842 | if (unlikely(!icr)) | |
3843 | return IRQ_NONE; /* Not our interrupt */ | |
3844 | ||
3845 | #ifdef CONFIG_E1000_NAPI | |
3846 | /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is | |
3847 | * not set, then the adapter didn't send an interrupt */ | |
3848 | if (unlikely(hw->mac_type >= e1000_82571 && | |
3849 | !(icr & E1000_ICR_INT_ASSERTED))) | |
3850 | return IRQ_NONE; | |
3851 | ||
1e613fd9 JK |
3852 | /* Interrupt Auto-Mask...upon reading ICR, |
3853 | * interrupts are masked. No need for the | |
3854 | * IMC write, but it does mean we should | |
3855 | * account for it ASAP. */ | |
3856 | if (likely(hw->mac_type >= e1000_82571)) | |
3857 | atomic_inc(&adapter->irq_sem); | |
be2b28ed | 3858 | #endif |
1da177e4 | 3859 | |
96838a40 | 3860 | if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { |
1da177e4 | 3861 | hw->get_link_status = 1; |
87041639 JK |
3862 | /* 80003ES2LAN workaround-- |
3863 | * For packet buffer work-around on link down event; | |
3864 | * disable receives here in the ISR and | |
3865 | * reset adapter in watchdog | |
3866 | */ | |
3867 | if (netif_carrier_ok(netdev) && | |
3868 | (adapter->hw.mac_type == e1000_80003es2lan)) { | |
3869 | /* disable receives */ | |
3870 | rctl = E1000_READ_REG(hw, RCTL); | |
3871 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
3872 | } | |
1314bbf3 AK |
3873 | /* guard against interrupt when we're going down */ |
3874 | if (!test_bit(__E1000_DOWN, &adapter->flags)) | |
3875 | mod_timer(&adapter->watchdog_timer, jiffies + 1); | |
1da177e4 LT |
3876 | } |
3877 | ||
3878 | #ifdef CONFIG_E1000_NAPI | |
1e613fd9 | 3879 | if (unlikely(hw->mac_type < e1000_82571)) { |
835bb129 | 3880 | /* disable interrupts, without the synchronize_irq bit */ |
1e613fd9 JK |
3881 | atomic_inc(&adapter->irq_sem); |
3882 | E1000_WRITE_REG(hw, IMC, ~0); | |
3883 | E1000_WRITE_FLUSH(hw); | |
3884 | } | |
835bb129 JB |
3885 | if (likely(netif_rx_schedule_prep(netdev))) { |
3886 | adapter->total_tx_bytes = 0; | |
3887 | adapter->total_tx_packets = 0; | |
3888 | adapter->total_rx_bytes = 0; | |
3889 | adapter->total_rx_packets = 0; | |
d3d9e484 | 3890 | __netif_rx_schedule(netdev); |
835bb129 | 3891 | } else |
90fb5135 AK |
3892 | /* this really should not happen! if it does it is basically a |
3893 | * bug, but not a hard error, so enable ints and continue */ | |
581d708e | 3894 | e1000_irq_enable(adapter); |
c1605eb3 | 3895 | #else |
1da177e4 | 3896 | /* Writing IMC and IMS is needed for 82547. |
96838a40 JB |
3897 | * Due to Hub Link bus being occupied, an interrupt |
3898 | * de-assertion message is not able to be sent. | |
3899 | * When an interrupt assertion message is generated later, | |
3900 | * two messages are re-ordered and sent out. | |
3901 | * That causes APIC to think 82547 is in de-assertion | |
3902 | * state, while 82547 is in assertion state, resulting | |
3903 | * in dead lock. Writing IMC forces 82547 into | |
3904 | * de-assertion state. | |
3905 | */ | |
3906 | if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) { | |
1da177e4 | 3907 | atomic_inc(&adapter->irq_sem); |
2648345f | 3908 | E1000_WRITE_REG(hw, IMC, ~0); |
1da177e4 LT |
3909 | } |
3910 | ||
835bb129 JB |
3911 | adapter->total_tx_bytes = 0; |
3912 | adapter->total_rx_bytes = 0; | |
3913 | adapter->total_tx_packets = 0; | |
3914 | adapter->total_rx_packets = 0; | |
3915 | ||
96838a40 JB |
3916 | for (i = 0; i < E1000_MAX_INTR; i++) |
3917 | if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & | |
581d708e | 3918 | !e1000_clean_tx_irq(adapter, adapter->tx_ring))) |
1da177e4 LT |
3919 | break; |
3920 | ||
835bb129 JB |
3921 | if (likely(adapter->itr_setting & 3)) |
3922 | e1000_set_itr(adapter); | |
3923 | ||
96838a40 | 3924 | if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) |
1da177e4 | 3925 | e1000_irq_enable(adapter); |
581d708e | 3926 | |
c1605eb3 | 3927 | #endif |
1da177e4 LT |
3928 | return IRQ_HANDLED; |
3929 | } | |
3930 | ||
3931 | #ifdef CONFIG_E1000_NAPI | |
3932 | /** | |
3933 | * e1000_clean - NAPI Rx polling callback | |
3934 | * @adapter: board private structure | |
3935 | **/ | |
3936 | ||
3937 | static int | |
581d708e | 3938 | e1000_clean(struct net_device *poll_dev, int *budget) |
1da177e4 | 3939 | { |
581d708e MC |
3940 | struct e1000_adapter *adapter; |
3941 | int work_to_do = min(*budget, poll_dev->quota); | |
d3d9e484 | 3942 | int tx_cleaned = 0, work_done = 0; |
581d708e MC |
3943 | |
3944 | /* Must NOT use netdev_priv macro here. */ | |
3945 | adapter = poll_dev->priv; | |
3946 | ||
3947 | /* Keep link state information with original netdev */ | |
d3d9e484 | 3948 | if (!netif_carrier_ok(poll_dev)) |
581d708e | 3949 | goto quit_polling; |
2648345f | 3950 | |
d3d9e484 AK |
3951 | /* e1000_clean is called per-cpu. This lock protects |
3952 | * tx_ring[0] from being cleaned by multiple cpus | |
3953 | * simultaneously. A failure obtaining the lock means | |
3954 | * tx_ring[0] is currently being cleaned anyway. */ | |
3955 | if (spin_trylock(&adapter->tx_queue_lock)) { | |
3956 | tx_cleaned = e1000_clean_tx_irq(adapter, | |
3957 | &adapter->tx_ring[0]); | |
3958 | spin_unlock(&adapter->tx_queue_lock); | |
581d708e MC |
3959 | } |
3960 | ||
d3d9e484 | 3961 | adapter->clean_rx(adapter, &adapter->rx_ring[0], |
581d708e | 3962 | &work_done, work_to_do); |
1da177e4 LT |
3963 | |
3964 | *budget -= work_done; | |
581d708e | 3965 | poll_dev->quota -= work_done; |
96838a40 | 3966 | |
2b02893e | 3967 | /* If no Tx and not enough Rx work done, exit the polling mode */ |
96838a40 | 3968 | if ((!tx_cleaned && (work_done == 0)) || |
d3d9e484 | 3969 | !netif_running(poll_dev)) { |
581d708e | 3970 | quit_polling: |
835bb129 JB |
3971 | if (likely(adapter->itr_setting & 3)) |
3972 | e1000_set_itr(adapter); | |
581d708e | 3973 | netif_rx_complete(poll_dev); |
1da177e4 LT |
3974 | e1000_irq_enable(adapter); |
3975 | return 0; | |
3976 | } | |
3977 | ||
3978 | return 1; | |
3979 | } | |
3980 | ||
3981 | #endif | |
3982 | /** | |
3983 | * e1000_clean_tx_irq - Reclaim resources after transmit completes | |
3984 | * @adapter: board private structure | |
3985 | **/ | |
3986 | ||
3987 | static boolean_t | |
581d708e MC |
3988 | e1000_clean_tx_irq(struct e1000_adapter *adapter, |
3989 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 3990 | { |
1da177e4 LT |
3991 | struct net_device *netdev = adapter->netdev; |
3992 | struct e1000_tx_desc *tx_desc, *eop_desc; | |
3993 | struct e1000_buffer *buffer_info; | |
3994 | unsigned int i, eop; | |
2a1af5d7 JK |
3995 | #ifdef CONFIG_E1000_NAPI |
3996 | unsigned int count = 0; | |
3997 | #endif | |
1da177e4 | 3998 | boolean_t cleaned = FALSE; |
835bb129 | 3999 | unsigned int total_tx_bytes=0, total_tx_packets=0; |
1da177e4 LT |
4000 | |
4001 | i = tx_ring->next_to_clean; | |
4002 | eop = tx_ring->buffer_info[i].next_to_watch; | |
4003 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
4004 | ||
581d708e | 4005 | while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) { |
96838a40 | 4006 | for (cleaned = FALSE; !cleaned; ) { |
1da177e4 LT |
4007 | tx_desc = E1000_TX_DESC(*tx_ring, i); |
4008 | buffer_info = &tx_ring->buffer_info[i]; | |
4009 | cleaned = (i == eop); | |
4010 | ||
835bb129 | 4011 | if (cleaned) { |
2b65326e JB |
4012 | struct sk_buff *skb = buffer_info->skb; |
4013 | unsigned int segs = skb_shinfo(skb)->gso_segs; | |
4014 | total_tx_packets += segs; | |
835bb129 | 4015 | total_tx_packets++; |
2b65326e | 4016 | total_tx_bytes += skb->len; |
835bb129 | 4017 | } |
fd803241 | 4018 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); |
a9ebadd6 | 4019 | tx_desc->upper.data = 0; |
1da177e4 | 4020 | |
96838a40 | 4021 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 | 4022 | } |
581d708e | 4023 | |
1da177e4 LT |
4024 | eop = tx_ring->buffer_info[i].next_to_watch; |
4025 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
2a1af5d7 JK |
4026 | #ifdef CONFIG_E1000_NAPI |
4027 | #define E1000_TX_WEIGHT 64 | |
4028 | /* weight of a sort for tx, to avoid endless transmit cleanup */ | |
4029 | if (count++ == E1000_TX_WEIGHT) break; | |
4030 | #endif | |
1da177e4 LT |
4031 | } |
4032 | ||
4033 | tx_ring->next_to_clean = i; | |
4034 | ||
77b2aad5 | 4035 | #define TX_WAKE_THRESHOLD 32 |
65c7973f JB |
4036 | if (unlikely(cleaned && netif_carrier_ok(netdev) && |
4037 | E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) { | |
4038 | /* Make sure that anybody stopping the queue after this | |
4039 | * sees the new next_to_clean. | |
4040 | */ | |
4041 | smp_mb(); | |
fcfb1224 | 4042 | if (netif_queue_stopped(netdev)) { |
77b2aad5 | 4043 | netif_wake_queue(netdev); |
fcfb1224 JB |
4044 | ++adapter->restart_queue; |
4045 | } | |
77b2aad5 | 4046 | } |
2648345f | 4047 | |
581d708e | 4048 | if (adapter->detect_tx_hung) { |
2648345f | 4049 | /* Detect a transmit hang in hardware, this serializes the |
1da177e4 LT |
4050 | * check with the clearing of time_stamp and movement of i */ |
4051 | adapter->detect_tx_hung = FALSE; | |
392137fa JK |
4052 | if (tx_ring->buffer_info[eop].dma && |
4053 | time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + | |
7e6c9861 | 4054 | (adapter->tx_timeout_factor * HZ)) |
70b8f1e1 | 4055 | && !(E1000_READ_REG(&adapter->hw, STATUS) & |
392137fa | 4056 | E1000_STATUS_TXOFF)) { |
70b8f1e1 MC |
4057 | |
4058 | /* detected Tx unit hang */ | |
c6963ef5 | 4059 | DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n" |
7bfa4816 | 4060 | " Tx Queue <%lu>\n" |
70b8f1e1 MC |
4061 | " TDH <%x>\n" |
4062 | " TDT <%x>\n" | |
4063 | " next_to_use <%x>\n" | |
4064 | " next_to_clean <%x>\n" | |
4065 | "buffer_info[next_to_clean]\n" | |
70b8f1e1 MC |
4066 | " time_stamp <%lx>\n" |
4067 | " next_to_watch <%x>\n" | |
4068 | " jiffies <%lx>\n" | |
4069 | " next_to_watch.status <%x>\n", | |
7bfa4816 JK |
4070 | (unsigned long)((tx_ring - adapter->tx_ring) / |
4071 | sizeof(struct e1000_tx_ring)), | |
581d708e MC |
4072 | readl(adapter->hw.hw_addr + tx_ring->tdh), |
4073 | readl(adapter->hw.hw_addr + tx_ring->tdt), | |
70b8f1e1 | 4074 | tx_ring->next_to_use, |
392137fa JK |
4075 | tx_ring->next_to_clean, |
4076 | tx_ring->buffer_info[eop].time_stamp, | |
70b8f1e1 MC |
4077 | eop, |
4078 | jiffies, | |
4079 | eop_desc->upper.fields.status); | |
1da177e4 | 4080 | netif_stop_queue(netdev); |
70b8f1e1 | 4081 | } |
1da177e4 | 4082 | } |
835bb129 JB |
4083 | adapter->total_tx_bytes += total_tx_bytes; |
4084 | adapter->total_tx_packets += total_tx_packets; | |
1da177e4 LT |
4085 | return cleaned; |
4086 | } | |
4087 | ||
4088 | /** | |
4089 | * e1000_rx_checksum - Receive Checksum Offload for 82543 | |
2d7edb92 MC |
4090 | * @adapter: board private structure |
4091 | * @status_err: receive descriptor status and error fields | |
4092 | * @csum: receive descriptor csum field | |
4093 | * @sk_buff: socket buffer with received data | |
1da177e4 LT |
4094 | **/ |
4095 | ||
e619d523 | 4096 | static void |
1da177e4 | 4097 | e1000_rx_checksum(struct e1000_adapter *adapter, |
2d7edb92 MC |
4098 | uint32_t status_err, uint32_t csum, |
4099 | struct sk_buff *skb) | |
1da177e4 | 4100 | { |
2d7edb92 MC |
4101 | uint16_t status = (uint16_t)status_err; |
4102 | uint8_t errors = (uint8_t)(status_err >> 24); | |
4103 | skb->ip_summed = CHECKSUM_NONE; | |
4104 | ||
1da177e4 | 4105 | /* 82543 or newer only */ |
96838a40 | 4106 | if (unlikely(adapter->hw.mac_type < e1000_82543)) return; |
1da177e4 | 4107 | /* Ignore Checksum bit is set */ |
96838a40 | 4108 | if (unlikely(status & E1000_RXD_STAT_IXSM)) return; |
2d7edb92 | 4109 | /* TCP/UDP checksum error bit is set */ |
96838a40 | 4110 | if (unlikely(errors & E1000_RXD_ERR_TCPE)) { |
1da177e4 | 4111 | /* let the stack verify checksum errors */ |
1da177e4 | 4112 | adapter->hw_csum_err++; |
2d7edb92 MC |
4113 | return; |
4114 | } | |
4115 | /* TCP/UDP Checksum has not been calculated */ | |
96838a40 JB |
4116 | if (adapter->hw.mac_type <= e1000_82547_rev_2) { |
4117 | if (!(status & E1000_RXD_STAT_TCPCS)) | |
2d7edb92 | 4118 | return; |
1da177e4 | 4119 | } else { |
96838a40 | 4120 | if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) |
2d7edb92 MC |
4121 | return; |
4122 | } | |
4123 | /* It must be a TCP or UDP packet with a valid checksum */ | |
4124 | if (likely(status & E1000_RXD_STAT_TCPCS)) { | |
1da177e4 LT |
4125 | /* TCP checksum is good */ |
4126 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
2d7edb92 MC |
4127 | } else if (adapter->hw.mac_type > e1000_82547_rev_2) { |
4128 | /* IP fragment with UDP payload */ | |
4129 | /* Hardware complements the payload checksum, so we undo it | |
4130 | * and then put the value in host order for further stack use. | |
4131 | */ | |
4132 | csum = ntohl(csum ^ 0xFFFF); | |
4133 | skb->csum = csum; | |
84fa7933 | 4134 | skb->ip_summed = CHECKSUM_COMPLETE; |
1da177e4 | 4135 | } |
2d7edb92 | 4136 | adapter->hw_csum_good++; |
1da177e4 LT |
4137 | } |
4138 | ||
4139 | /** | |
2d7edb92 | 4140 | * e1000_clean_rx_irq - Send received data up the network stack; legacy |
1da177e4 LT |
4141 | * @adapter: board private structure |
4142 | **/ | |
4143 | ||
4144 | static boolean_t | |
4145 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
4146 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
4147 | struct e1000_rx_ring *rx_ring, | |
4148 | int *work_done, int work_to_do) | |
1da177e4 | 4149 | #else |
581d708e MC |
4150 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
4151 | struct e1000_rx_ring *rx_ring) | |
1da177e4 LT |
4152 | #endif |
4153 | { | |
1da177e4 LT |
4154 | struct net_device *netdev = adapter->netdev; |
4155 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f JB |
4156 | struct e1000_rx_desc *rx_desc, *next_rxd; |
4157 | struct e1000_buffer *buffer_info, *next_buffer; | |
1da177e4 LT |
4158 | unsigned long flags; |
4159 | uint32_t length; | |
4160 | uint8_t last_byte; | |
4161 | unsigned int i; | |
72d64a43 | 4162 | int cleaned_count = 0; |
a1415ee6 | 4163 | boolean_t cleaned = FALSE; |
835bb129 | 4164 | unsigned int total_rx_bytes=0, total_rx_packets=0; |
1da177e4 LT |
4165 | |
4166 | i = rx_ring->next_to_clean; | |
4167 | rx_desc = E1000_RX_DESC(*rx_ring, i); | |
b92ff8ee | 4168 | buffer_info = &rx_ring->buffer_info[i]; |
1da177e4 | 4169 | |
b92ff8ee | 4170 | while (rx_desc->status & E1000_RXD_STAT_DD) { |
24f476ee | 4171 | struct sk_buff *skb; |
a292ca6e | 4172 | u8 status; |
90fb5135 | 4173 | |
1da177e4 | 4174 | #ifdef CONFIG_E1000_NAPI |
96838a40 | 4175 | if (*work_done >= work_to_do) |
1da177e4 LT |
4176 | break; |
4177 | (*work_done)++; | |
4178 | #endif | |
a292ca6e | 4179 | status = rx_desc->status; |
b92ff8ee | 4180 | skb = buffer_info->skb; |
86c3d59f JB |
4181 | buffer_info->skb = NULL; |
4182 | ||
30320be8 JK |
4183 | prefetch(skb->data - NET_IP_ALIGN); |
4184 | ||
86c3d59f JB |
4185 | if (++i == rx_ring->count) i = 0; |
4186 | next_rxd = E1000_RX_DESC(*rx_ring, i); | |
30320be8 JK |
4187 | prefetch(next_rxd); |
4188 | ||
86c3d59f | 4189 | next_buffer = &rx_ring->buffer_info[i]; |
86c3d59f | 4190 | |
72d64a43 JK |
4191 | cleaned = TRUE; |
4192 | cleaned_count++; | |
a292ca6e JK |
4193 | pci_unmap_single(pdev, |
4194 | buffer_info->dma, | |
4195 | buffer_info->length, | |
1da177e4 LT |
4196 | PCI_DMA_FROMDEVICE); |
4197 | ||
1da177e4 LT |
4198 | length = le16_to_cpu(rx_desc->length); |
4199 | ||
a1415ee6 JK |
4200 | if (unlikely(!(status & E1000_RXD_STAT_EOP))) { |
4201 | /* All receives must fit into a single buffer */ | |
4202 | E1000_DBG("%s: Receive packet consumed multiple" | |
4203 | " buffers\n", netdev->name); | |
864c4e45 | 4204 | /* recycle */ |
8fc897b0 | 4205 | buffer_info->skb = skb; |
1da177e4 LT |
4206 | goto next_desc; |
4207 | } | |
4208 | ||
96838a40 | 4209 | if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) { |
1da177e4 | 4210 | last_byte = *(skb->data + length - 1); |
b92ff8ee | 4211 | if (TBI_ACCEPT(&adapter->hw, status, |
1da177e4 LT |
4212 | rx_desc->errors, length, last_byte)) { |
4213 | spin_lock_irqsave(&adapter->stats_lock, flags); | |
a292ca6e JK |
4214 | e1000_tbi_adjust_stats(&adapter->hw, |
4215 | &adapter->stats, | |
1da177e4 LT |
4216 | length, skb->data); |
4217 | spin_unlock_irqrestore(&adapter->stats_lock, | |
4218 | flags); | |
4219 | length--; | |
4220 | } else { | |
9e2feace AK |
4221 | /* recycle */ |
4222 | buffer_info->skb = skb; | |
1da177e4 LT |
4223 | goto next_desc; |
4224 | } | |
1cb5821f | 4225 | } |
1da177e4 | 4226 | |
d2a1e213 JB |
4227 | /* adjust length to remove Ethernet CRC, this must be |
4228 | * done after the TBI_ACCEPT workaround above */ | |
4229 | length -= 4; | |
4230 | ||
835bb129 JB |
4231 | /* probably a little skewed due to removing CRC */ |
4232 | total_rx_bytes += length; | |
4233 | total_rx_packets++; | |
4234 | ||
a292ca6e JK |
4235 | /* code added for copybreak, this should improve |
4236 | * performance for small packets with large amounts | |
4237 | * of reassembly being done in the stack */ | |
4238 | #define E1000_CB_LENGTH 256 | |
a1415ee6 | 4239 | if (length < E1000_CB_LENGTH) { |
a292ca6e | 4240 | struct sk_buff *new_skb = |
87f5032e | 4241 | netdev_alloc_skb(netdev, length + NET_IP_ALIGN); |
a292ca6e JK |
4242 | if (new_skb) { |
4243 | skb_reserve(new_skb, NET_IP_ALIGN); | |
a292ca6e JK |
4244 | memcpy(new_skb->data - NET_IP_ALIGN, |
4245 | skb->data - NET_IP_ALIGN, | |
4246 | length + NET_IP_ALIGN); | |
4247 | /* save the skb in buffer_info as good */ | |
4248 | buffer_info->skb = skb; | |
4249 | skb = new_skb; | |
a292ca6e | 4250 | } |
996695de AK |
4251 | /* else just continue with the old one */ |
4252 | } | |
a292ca6e | 4253 | /* end copybreak code */ |
996695de | 4254 | skb_put(skb, length); |
1da177e4 LT |
4255 | |
4256 | /* Receive Checksum Offload */ | |
a292ca6e JK |
4257 | e1000_rx_checksum(adapter, |
4258 | (uint32_t)(status) | | |
2d7edb92 | 4259 | ((uint32_t)(rx_desc->errors) << 24), |
c3d7a3a4 | 4260 | le16_to_cpu(rx_desc->csum), skb); |
96838a40 | 4261 | |
1da177e4 LT |
4262 | skb->protocol = eth_type_trans(skb, netdev); |
4263 | #ifdef CONFIG_E1000_NAPI | |
96838a40 | 4264 | if (unlikely(adapter->vlgrp && |
a292ca6e | 4265 | (status & E1000_RXD_STAT_VP))) { |
1da177e4 | 4266 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
2d7edb92 MC |
4267 | le16_to_cpu(rx_desc->special) & |
4268 | E1000_RXD_SPC_VLAN_MASK); | |
1da177e4 LT |
4269 | } else { |
4270 | netif_receive_skb(skb); | |
4271 | } | |
4272 | #else /* CONFIG_E1000_NAPI */ | |
96838a40 | 4273 | if (unlikely(adapter->vlgrp && |
b92ff8ee | 4274 | (status & E1000_RXD_STAT_VP))) { |
1da177e4 LT |
4275 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
4276 | le16_to_cpu(rx_desc->special) & | |
4277 | E1000_RXD_SPC_VLAN_MASK); | |
4278 | } else { | |
4279 | netif_rx(skb); | |
4280 | } | |
4281 | #endif /* CONFIG_E1000_NAPI */ | |
4282 | netdev->last_rx = jiffies; | |
4283 | ||
4284 | next_desc: | |
4285 | rx_desc->status = 0; | |
1da177e4 | 4286 | |
72d64a43 JK |
4287 | /* return some buffers to hardware, one at a time is too slow */ |
4288 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
4289 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
4290 | cleaned_count = 0; | |
4291 | } | |
4292 | ||
30320be8 | 4293 | /* use prefetched values */ |
86c3d59f JB |
4294 | rx_desc = next_rxd; |
4295 | buffer_info = next_buffer; | |
1da177e4 | 4296 | } |
1da177e4 | 4297 | rx_ring->next_to_clean = i; |
72d64a43 JK |
4298 | |
4299 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
4300 | if (cleaned_count) | |
4301 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
2d7edb92 | 4302 | |
835bb129 JB |
4303 | adapter->total_rx_packets += total_rx_packets; |
4304 | adapter->total_rx_bytes += total_rx_bytes; | |
2d7edb92 MC |
4305 | return cleaned; |
4306 | } | |
4307 | ||
4308 | /** | |
4309 | * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split | |
4310 | * @adapter: board private structure | |
4311 | **/ | |
4312 | ||
4313 | static boolean_t | |
4314 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
4315 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
4316 | struct e1000_rx_ring *rx_ring, | |
4317 | int *work_done, int work_to_do) | |
2d7edb92 | 4318 | #else |
581d708e MC |
4319 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
4320 | struct e1000_rx_ring *rx_ring) | |
2d7edb92 MC |
4321 | #endif |
4322 | { | |
86c3d59f | 4323 | union e1000_rx_desc_packet_split *rx_desc, *next_rxd; |
2d7edb92 MC |
4324 | struct net_device *netdev = adapter->netdev; |
4325 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f | 4326 | struct e1000_buffer *buffer_info, *next_buffer; |
2d7edb92 MC |
4327 | struct e1000_ps_page *ps_page; |
4328 | struct e1000_ps_page_dma *ps_page_dma; | |
24f476ee | 4329 | struct sk_buff *skb; |
2d7edb92 MC |
4330 | unsigned int i, j; |
4331 | uint32_t length, staterr; | |
72d64a43 | 4332 | int cleaned_count = 0; |
2d7edb92 | 4333 | boolean_t cleaned = FALSE; |
835bb129 | 4334 | unsigned int total_rx_bytes=0, total_rx_packets=0; |
2d7edb92 MC |
4335 | |
4336 | i = rx_ring->next_to_clean; | |
4337 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); | |
683a38f3 | 4338 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
9e2feace | 4339 | buffer_info = &rx_ring->buffer_info[i]; |
2d7edb92 | 4340 | |
96838a40 | 4341 | while (staterr & E1000_RXD_STAT_DD) { |
2d7edb92 MC |
4342 | ps_page = &rx_ring->ps_page[i]; |
4343 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
4344 | #ifdef CONFIG_E1000_NAPI | |
96838a40 | 4345 | if (unlikely(*work_done >= work_to_do)) |
2d7edb92 MC |
4346 | break; |
4347 | (*work_done)++; | |
4348 | #endif | |
86c3d59f JB |
4349 | skb = buffer_info->skb; |
4350 | ||
30320be8 JK |
4351 | /* in the packet split case this is header only */ |
4352 | prefetch(skb->data - NET_IP_ALIGN); | |
4353 | ||
86c3d59f JB |
4354 | if (++i == rx_ring->count) i = 0; |
4355 | next_rxd = E1000_RX_DESC_PS(*rx_ring, i); | |
30320be8 JK |
4356 | prefetch(next_rxd); |
4357 | ||
86c3d59f | 4358 | next_buffer = &rx_ring->buffer_info[i]; |
86c3d59f | 4359 | |
2d7edb92 | 4360 | cleaned = TRUE; |
72d64a43 | 4361 | cleaned_count++; |
2d7edb92 MC |
4362 | pci_unmap_single(pdev, buffer_info->dma, |
4363 | buffer_info->length, | |
4364 | PCI_DMA_FROMDEVICE); | |
4365 | ||
96838a40 | 4366 | if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) { |
2d7edb92 MC |
4367 | E1000_DBG("%s: Packet Split buffers didn't pick up" |
4368 | " the full packet\n", netdev->name); | |
4369 | dev_kfree_skb_irq(skb); | |
4370 | goto next_desc; | |
4371 | } | |
1da177e4 | 4372 | |
96838a40 | 4373 | if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) { |
2d7edb92 MC |
4374 | dev_kfree_skb_irq(skb); |
4375 | goto next_desc; | |
4376 | } | |
4377 | ||
4378 | length = le16_to_cpu(rx_desc->wb.middle.length0); | |
4379 | ||
96838a40 | 4380 | if (unlikely(!length)) { |
2d7edb92 MC |
4381 | E1000_DBG("%s: Last part of the packet spanning" |
4382 | " multiple descriptors\n", netdev->name); | |
4383 | dev_kfree_skb_irq(skb); | |
4384 | goto next_desc; | |
4385 | } | |
4386 | ||
4387 | /* Good Receive */ | |
4388 | skb_put(skb, length); | |
4389 | ||
dc7c6add JK |
4390 | { |
4391 | /* this looks ugly, but it seems compiler issues make it | |
4392 | more efficient than reusing j */ | |
4393 | int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); | |
4394 | ||
4395 | /* page alloc/put takes too long and effects small packet | |
4396 | * throughput, so unsplit small packets and save the alloc/put*/ | |
9e2feace | 4397 | if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) { |
dc7c6add | 4398 | u8 *vaddr; |
76c224bc | 4399 | /* there is no documentation about how to call |
dc7c6add JK |
4400 | * kmap_atomic, so we can't hold the mapping |
4401 | * very long */ | |
4402 | pci_dma_sync_single_for_cpu(pdev, | |
4403 | ps_page_dma->ps_page_dma[0], | |
4404 | PAGE_SIZE, | |
4405 | PCI_DMA_FROMDEVICE); | |
4406 | vaddr = kmap_atomic(ps_page->ps_page[0], | |
4407 | KM_SKB_DATA_SOFTIRQ); | |
4408 | memcpy(skb->tail, vaddr, l1); | |
4409 | kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); | |
4410 | pci_dma_sync_single_for_device(pdev, | |
4411 | ps_page_dma->ps_page_dma[0], | |
4412 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
f235a2ab AK |
4413 | /* remove the CRC */ |
4414 | l1 -= 4; | |
dc7c6add | 4415 | skb_put(skb, l1); |
dc7c6add JK |
4416 | goto copydone; |
4417 | } /* if */ | |
4418 | } | |
90fb5135 | 4419 | |
96838a40 | 4420 | for (j = 0; j < adapter->rx_ps_pages; j++) { |
30320be8 | 4421 | if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j]))) |
2d7edb92 | 4422 | break; |
2d7edb92 MC |
4423 | pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j], |
4424 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
4425 | ps_page_dma->ps_page_dma[j] = 0; | |
329bfd0b JK |
4426 | skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0, |
4427 | length); | |
2d7edb92 | 4428 | ps_page->ps_page[j] = NULL; |
2d7edb92 MC |
4429 | skb->len += length; |
4430 | skb->data_len += length; | |
5d51b80f | 4431 | skb->truesize += length; |
2d7edb92 MC |
4432 | } |
4433 | ||
f235a2ab AK |
4434 | /* strip the ethernet crc, problem is we're using pages now so |
4435 | * this whole operation can get a little cpu intensive */ | |
4436 | pskb_trim(skb, skb->len - 4); | |
4437 | ||
dc7c6add | 4438 | copydone: |
835bb129 JB |
4439 | total_rx_bytes += skb->len; |
4440 | total_rx_packets++; | |
4441 | ||
2d7edb92 | 4442 | e1000_rx_checksum(adapter, staterr, |
c3d7a3a4 | 4443 | le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb); |
2d7edb92 MC |
4444 | skb->protocol = eth_type_trans(skb, netdev); |
4445 | ||
96838a40 | 4446 | if (likely(rx_desc->wb.upper.header_status & |
c3d7a3a4 | 4447 | cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))) |
e4c811c9 | 4448 | adapter->rx_hdr_split++; |
2d7edb92 | 4449 | #ifdef CONFIG_E1000_NAPI |
96838a40 | 4450 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
2d7edb92 | 4451 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
683a38f3 MC |
4452 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
4453 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
4454 | } else { |
4455 | netif_receive_skb(skb); | |
4456 | } | |
4457 | #else /* CONFIG_E1000_NAPI */ | |
96838a40 | 4458 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
2d7edb92 | 4459 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
683a38f3 MC |
4460 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
4461 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
4462 | } else { |
4463 | netif_rx(skb); | |
4464 | } | |
4465 | #endif /* CONFIG_E1000_NAPI */ | |
4466 | netdev->last_rx = jiffies; | |
4467 | ||
4468 | next_desc: | |
c3d7a3a4 | 4469 | rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); |
2d7edb92 | 4470 | buffer_info->skb = NULL; |
2d7edb92 | 4471 | |
72d64a43 JK |
4472 | /* return some buffers to hardware, one at a time is too slow */ |
4473 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
4474 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
4475 | cleaned_count = 0; | |
4476 | } | |
4477 | ||
30320be8 | 4478 | /* use prefetched values */ |
86c3d59f JB |
4479 | rx_desc = next_rxd; |
4480 | buffer_info = next_buffer; | |
4481 | ||
683a38f3 | 4482 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
2d7edb92 MC |
4483 | } |
4484 | rx_ring->next_to_clean = i; | |
72d64a43 JK |
4485 | |
4486 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
4487 | if (cleaned_count) | |
4488 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
1da177e4 | 4489 | |
835bb129 JB |
4490 | adapter->total_rx_packets += total_rx_packets; |
4491 | adapter->total_rx_bytes += total_rx_bytes; | |
1da177e4 LT |
4492 | return cleaned; |
4493 | } | |
4494 | ||
4495 | /** | |
2d7edb92 | 4496 | * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended |
1da177e4 LT |
4497 | * @adapter: address of board private structure |
4498 | **/ | |
4499 | ||
4500 | static void | |
581d708e | 4501 | e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
72d64a43 | 4502 | struct e1000_rx_ring *rx_ring, |
a292ca6e | 4503 | int cleaned_count) |
1da177e4 | 4504 | { |
1da177e4 LT |
4505 | struct net_device *netdev = adapter->netdev; |
4506 | struct pci_dev *pdev = adapter->pdev; | |
4507 | struct e1000_rx_desc *rx_desc; | |
4508 | struct e1000_buffer *buffer_info; | |
4509 | struct sk_buff *skb; | |
2648345f MC |
4510 | unsigned int i; |
4511 | unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN; | |
1da177e4 LT |
4512 | |
4513 | i = rx_ring->next_to_use; | |
4514 | buffer_info = &rx_ring->buffer_info[i]; | |
4515 | ||
a292ca6e | 4516 | while (cleaned_count--) { |
ca6f7224 CH |
4517 | skb = buffer_info->skb; |
4518 | if (skb) { | |
a292ca6e JK |
4519 | skb_trim(skb, 0); |
4520 | goto map_skb; | |
4521 | } | |
4522 | ||
ca6f7224 | 4523 | skb = netdev_alloc_skb(netdev, bufsz); |
96838a40 | 4524 | if (unlikely(!skb)) { |
1da177e4 | 4525 | /* Better luck next round */ |
72d64a43 | 4526 | adapter->alloc_rx_buff_failed++; |
1da177e4 LT |
4527 | break; |
4528 | } | |
4529 | ||
2648345f | 4530 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
4531 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
4532 | struct sk_buff *oldskb = skb; | |
2648345f MC |
4533 | DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes " |
4534 | "at %p\n", bufsz, skb->data); | |
4535 | /* Try again, without freeing the previous */ | |
87f5032e | 4536 | skb = netdev_alloc_skb(netdev, bufsz); |
2648345f | 4537 | /* Failed allocation, critical failure */ |
1da177e4 LT |
4538 | if (!skb) { |
4539 | dev_kfree_skb(oldskb); | |
4540 | break; | |
4541 | } | |
2648345f | 4542 | |
1da177e4 LT |
4543 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
4544 | /* give up */ | |
4545 | dev_kfree_skb(skb); | |
4546 | dev_kfree_skb(oldskb); | |
4547 | break; /* while !buffer_info->skb */ | |
1da177e4 | 4548 | } |
ca6f7224 CH |
4549 | |
4550 | /* Use new allocation */ | |
4551 | dev_kfree_skb(oldskb); | |
1da177e4 | 4552 | } |
1da177e4 LT |
4553 | /* Make buffer alignment 2 beyond a 16 byte boundary |
4554 | * this will result in a 16 byte aligned IP header after | |
4555 | * the 14 byte MAC header is removed | |
4556 | */ | |
4557 | skb_reserve(skb, NET_IP_ALIGN); | |
4558 | ||
1da177e4 LT |
4559 | buffer_info->skb = skb; |
4560 | buffer_info->length = adapter->rx_buffer_len; | |
a292ca6e | 4561 | map_skb: |
1da177e4 LT |
4562 | buffer_info->dma = pci_map_single(pdev, |
4563 | skb->data, | |
4564 | adapter->rx_buffer_len, | |
4565 | PCI_DMA_FROMDEVICE); | |
4566 | ||
2648345f MC |
4567 | /* Fix for errata 23, can't cross 64kB boundary */ |
4568 | if (!e1000_check_64k_bound(adapter, | |
4569 | (void *)(unsigned long)buffer_info->dma, | |
4570 | adapter->rx_buffer_len)) { | |
4571 | DPRINTK(RX_ERR, ERR, | |
4572 | "dma align check failed: %u bytes at %p\n", | |
4573 | adapter->rx_buffer_len, | |
4574 | (void *)(unsigned long)buffer_info->dma); | |
1da177e4 LT |
4575 | dev_kfree_skb(skb); |
4576 | buffer_info->skb = NULL; | |
4577 | ||
2648345f | 4578 | pci_unmap_single(pdev, buffer_info->dma, |
1da177e4 LT |
4579 | adapter->rx_buffer_len, |
4580 | PCI_DMA_FROMDEVICE); | |
4581 | ||
4582 | break; /* while !buffer_info->skb */ | |
4583 | } | |
1da177e4 LT |
4584 | rx_desc = E1000_RX_DESC(*rx_ring, i); |
4585 | rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
4586 | ||
96838a40 JB |
4587 | if (unlikely(++i == rx_ring->count)) |
4588 | i = 0; | |
1da177e4 LT |
4589 | buffer_info = &rx_ring->buffer_info[i]; |
4590 | } | |
4591 | ||
b92ff8ee JB |
4592 | if (likely(rx_ring->next_to_use != i)) { |
4593 | rx_ring->next_to_use = i; | |
4594 | if (unlikely(i-- == 0)) | |
4595 | i = (rx_ring->count - 1); | |
4596 | ||
4597 | /* Force memory writes to complete before letting h/w | |
4598 | * know there are new descriptors to fetch. (Only | |
4599 | * applicable for weak-ordered memory model archs, | |
4600 | * such as IA-64). */ | |
4601 | wmb(); | |
4602 | writel(i, adapter->hw.hw_addr + rx_ring->rdt); | |
4603 | } | |
1da177e4 LT |
4604 | } |
4605 | ||
2d7edb92 MC |
4606 | /** |
4607 | * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split | |
4608 | * @adapter: address of board private structure | |
4609 | **/ | |
4610 | ||
4611 | static void | |
581d708e | 4612 | e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, |
72d64a43 JK |
4613 | struct e1000_rx_ring *rx_ring, |
4614 | int cleaned_count) | |
2d7edb92 | 4615 | { |
2d7edb92 MC |
4616 | struct net_device *netdev = adapter->netdev; |
4617 | struct pci_dev *pdev = adapter->pdev; | |
4618 | union e1000_rx_desc_packet_split *rx_desc; | |
4619 | struct e1000_buffer *buffer_info; | |
4620 | struct e1000_ps_page *ps_page; | |
4621 | struct e1000_ps_page_dma *ps_page_dma; | |
4622 | struct sk_buff *skb; | |
4623 | unsigned int i, j; | |
4624 | ||
4625 | i = rx_ring->next_to_use; | |
4626 | buffer_info = &rx_ring->buffer_info[i]; | |
4627 | ps_page = &rx_ring->ps_page[i]; | |
4628 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
4629 | ||
72d64a43 | 4630 | while (cleaned_count--) { |
2d7edb92 MC |
4631 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); |
4632 | ||
96838a40 | 4633 | for (j = 0; j < PS_PAGE_BUFFERS; j++) { |
e4c811c9 MC |
4634 | if (j < adapter->rx_ps_pages) { |
4635 | if (likely(!ps_page->ps_page[j])) { | |
4636 | ps_page->ps_page[j] = | |
4637 | alloc_page(GFP_ATOMIC); | |
b92ff8ee JB |
4638 | if (unlikely(!ps_page->ps_page[j])) { |
4639 | adapter->alloc_rx_buff_failed++; | |
e4c811c9 | 4640 | goto no_buffers; |
b92ff8ee | 4641 | } |
e4c811c9 MC |
4642 | ps_page_dma->ps_page_dma[j] = |
4643 | pci_map_page(pdev, | |
4644 | ps_page->ps_page[j], | |
4645 | 0, PAGE_SIZE, | |
4646 | PCI_DMA_FROMDEVICE); | |
4647 | } | |
4648 | /* Refresh the desc even if buffer_addrs didn't | |
96838a40 | 4649 | * change because each write-back erases |
e4c811c9 MC |
4650 | * this info. |
4651 | */ | |
4652 | rx_desc->read.buffer_addr[j+1] = | |
4653 | cpu_to_le64(ps_page_dma->ps_page_dma[j]); | |
4654 | } else | |
4655 | rx_desc->read.buffer_addr[j+1] = ~0; | |
2d7edb92 MC |
4656 | } |
4657 | ||
87f5032e | 4658 | skb = netdev_alloc_skb(netdev, |
90fb5135 | 4659 | adapter->rx_ps_bsize0 + NET_IP_ALIGN); |
2d7edb92 | 4660 | |
b92ff8ee JB |
4661 | if (unlikely(!skb)) { |
4662 | adapter->alloc_rx_buff_failed++; | |
2d7edb92 | 4663 | break; |
b92ff8ee | 4664 | } |
2d7edb92 MC |
4665 | |
4666 | /* Make buffer alignment 2 beyond a 16 byte boundary | |
4667 | * this will result in a 16 byte aligned IP header after | |
4668 | * the 14 byte MAC header is removed | |
4669 | */ | |
4670 | skb_reserve(skb, NET_IP_ALIGN); | |
4671 | ||
2d7edb92 MC |
4672 | buffer_info->skb = skb; |
4673 | buffer_info->length = adapter->rx_ps_bsize0; | |
4674 | buffer_info->dma = pci_map_single(pdev, skb->data, | |
4675 | adapter->rx_ps_bsize0, | |
4676 | PCI_DMA_FROMDEVICE); | |
4677 | ||
4678 | rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); | |
4679 | ||
96838a40 | 4680 | if (unlikely(++i == rx_ring->count)) i = 0; |
2d7edb92 MC |
4681 | buffer_info = &rx_ring->buffer_info[i]; |
4682 | ps_page = &rx_ring->ps_page[i]; | |
4683 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
4684 | } | |
4685 | ||
4686 | no_buffers: | |
b92ff8ee JB |
4687 | if (likely(rx_ring->next_to_use != i)) { |
4688 | rx_ring->next_to_use = i; | |
4689 | if (unlikely(i-- == 0)) i = (rx_ring->count - 1); | |
4690 | ||
4691 | /* Force memory writes to complete before letting h/w | |
4692 | * know there are new descriptors to fetch. (Only | |
4693 | * applicable for weak-ordered memory model archs, | |
4694 | * such as IA-64). */ | |
4695 | wmb(); | |
4696 | /* Hardware increments by 16 bytes, but packet split | |
4697 | * descriptors are 32 bytes...so we increment tail | |
4698 | * twice as much. | |
4699 | */ | |
4700 | writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt); | |
4701 | } | |
2d7edb92 MC |
4702 | } |
4703 | ||
1da177e4 LT |
4704 | /** |
4705 | * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers. | |
4706 | * @adapter: | |
4707 | **/ | |
4708 | ||
4709 | static void | |
4710 | e1000_smartspeed(struct e1000_adapter *adapter) | |
4711 | { | |
4712 | uint16_t phy_status; | |
4713 | uint16_t phy_ctrl; | |
4714 | ||
96838a40 | 4715 | if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg || |
1da177e4 LT |
4716 | !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL)) |
4717 | return; | |
4718 | ||
96838a40 | 4719 | if (adapter->smartspeed == 0) { |
1da177e4 LT |
4720 | /* If Master/Slave config fault is asserted twice, |
4721 | * we assume back-to-back */ | |
4722 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); | |
96838a40 | 4723 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1da177e4 | 4724 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); |
96838a40 | 4725 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1da177e4 | 4726 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); |
96838a40 | 4727 | if (phy_ctrl & CR_1000T_MS_ENABLE) { |
1da177e4 LT |
4728 | phy_ctrl &= ~CR_1000T_MS_ENABLE; |
4729 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, | |
4730 | phy_ctrl); | |
4731 | adapter->smartspeed++; | |
96838a40 | 4732 | if (!e1000_phy_setup_autoneg(&adapter->hw) && |
1da177e4 LT |
4733 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, |
4734 | &phy_ctrl)) { | |
4735 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
4736 | MII_CR_RESTART_AUTO_NEG); | |
4737 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, | |
4738 | phy_ctrl); | |
4739 | } | |
4740 | } | |
4741 | return; | |
96838a40 | 4742 | } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) { |
1da177e4 LT |
4743 | /* If still no link, perhaps using 2/3 pair cable */ |
4744 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); | |
4745 | phy_ctrl |= CR_1000T_MS_ENABLE; | |
4746 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl); | |
96838a40 | 4747 | if (!e1000_phy_setup_autoneg(&adapter->hw) && |
1da177e4 LT |
4748 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) { |
4749 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
4750 | MII_CR_RESTART_AUTO_NEG); | |
4751 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl); | |
4752 | } | |
4753 | } | |
4754 | /* Restart process after E1000_SMARTSPEED_MAX iterations */ | |
96838a40 | 4755 | if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX) |
1da177e4 LT |
4756 | adapter->smartspeed = 0; |
4757 | } | |
4758 | ||
4759 | /** | |
4760 | * e1000_ioctl - | |
4761 | * @netdev: | |
4762 | * @ifreq: | |
4763 | * @cmd: | |
4764 | **/ | |
4765 | ||
4766 | static int | |
4767 | e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
4768 | { | |
4769 | switch (cmd) { | |
4770 | case SIOCGMIIPHY: | |
4771 | case SIOCGMIIREG: | |
4772 | case SIOCSMIIREG: | |
4773 | return e1000_mii_ioctl(netdev, ifr, cmd); | |
4774 | default: | |
4775 | return -EOPNOTSUPP; | |
4776 | } | |
4777 | } | |
4778 | ||
4779 | /** | |
4780 | * e1000_mii_ioctl - | |
4781 | * @netdev: | |
4782 | * @ifreq: | |
4783 | * @cmd: | |
4784 | **/ | |
4785 | ||
4786 | static int | |
4787 | e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
4788 | { | |
60490fe0 | 4789 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4790 | struct mii_ioctl_data *data = if_mii(ifr); |
4791 | int retval; | |
4792 | uint16_t mii_reg; | |
4793 | uint16_t spddplx; | |
97876fc6 | 4794 | unsigned long flags; |
1da177e4 | 4795 | |
96838a40 | 4796 | if (adapter->hw.media_type != e1000_media_type_copper) |
1da177e4 LT |
4797 | return -EOPNOTSUPP; |
4798 | ||
4799 | switch (cmd) { | |
4800 | case SIOCGMIIPHY: | |
4801 | data->phy_id = adapter->hw.phy_addr; | |
4802 | break; | |
4803 | case SIOCGMIIREG: | |
96838a40 | 4804 | if (!capable(CAP_NET_ADMIN)) |
1da177e4 | 4805 | return -EPERM; |
97876fc6 | 4806 | spin_lock_irqsave(&adapter->stats_lock, flags); |
96838a40 | 4807 | if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, |
97876fc6 MC |
4808 | &data->val_out)) { |
4809 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4810 | return -EIO; |
97876fc6 MC |
4811 | } |
4812 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 LT |
4813 | break; |
4814 | case SIOCSMIIREG: | |
96838a40 | 4815 | if (!capable(CAP_NET_ADMIN)) |
1da177e4 | 4816 | return -EPERM; |
96838a40 | 4817 | if (data->reg_num & ~(0x1F)) |
1da177e4 LT |
4818 | return -EFAULT; |
4819 | mii_reg = data->val_in; | |
97876fc6 | 4820 | spin_lock_irqsave(&adapter->stats_lock, flags); |
96838a40 | 4821 | if (e1000_write_phy_reg(&adapter->hw, data->reg_num, |
97876fc6 MC |
4822 | mii_reg)) { |
4823 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4824 | return -EIO; |
97876fc6 | 4825 | } |
dc86d32a | 4826 | if (adapter->hw.media_type == e1000_media_type_copper) { |
1da177e4 LT |
4827 | switch (data->reg_num) { |
4828 | case PHY_CTRL: | |
96838a40 | 4829 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4830 | break; |
96838a40 | 4831 | if (mii_reg & MII_CR_AUTO_NEG_EN) { |
1da177e4 LT |
4832 | adapter->hw.autoneg = 1; |
4833 | adapter->hw.autoneg_advertised = 0x2F; | |
4834 | } else { | |
4835 | if (mii_reg & 0x40) | |
4836 | spddplx = SPEED_1000; | |
4837 | else if (mii_reg & 0x2000) | |
4838 | spddplx = SPEED_100; | |
4839 | else | |
4840 | spddplx = SPEED_10; | |
4841 | spddplx += (mii_reg & 0x100) | |
cb764326 JK |
4842 | ? DUPLEX_FULL : |
4843 | DUPLEX_HALF; | |
1da177e4 LT |
4844 | retval = e1000_set_spd_dplx(adapter, |
4845 | spddplx); | |
96838a40 | 4846 | if (retval) { |
97876fc6 | 4847 | spin_unlock_irqrestore( |
96838a40 | 4848 | &adapter->stats_lock, |
97876fc6 | 4849 | flags); |
1da177e4 | 4850 | return retval; |
97876fc6 | 4851 | } |
1da177e4 | 4852 | } |
2db10a08 AK |
4853 | if (netif_running(adapter->netdev)) |
4854 | e1000_reinit_locked(adapter); | |
4855 | else | |
1da177e4 LT |
4856 | e1000_reset(adapter); |
4857 | break; | |
4858 | case M88E1000_PHY_SPEC_CTRL: | |
4859 | case M88E1000_EXT_PHY_SPEC_CTRL: | |
96838a40 | 4860 | if (e1000_phy_reset(&adapter->hw)) { |
97876fc6 MC |
4861 | spin_unlock_irqrestore( |
4862 | &adapter->stats_lock, flags); | |
1da177e4 | 4863 | return -EIO; |
97876fc6 | 4864 | } |
1da177e4 LT |
4865 | break; |
4866 | } | |
4867 | } else { | |
4868 | switch (data->reg_num) { | |
4869 | case PHY_CTRL: | |
96838a40 | 4870 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4871 | break; |
2db10a08 AK |
4872 | if (netif_running(adapter->netdev)) |
4873 | e1000_reinit_locked(adapter); | |
4874 | else | |
1da177e4 LT |
4875 | e1000_reset(adapter); |
4876 | break; | |
4877 | } | |
4878 | } | |
97876fc6 | 4879 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
1da177e4 LT |
4880 | break; |
4881 | default: | |
4882 | return -EOPNOTSUPP; | |
4883 | } | |
4884 | return E1000_SUCCESS; | |
4885 | } | |
4886 | ||
4887 | void | |
4888 | e1000_pci_set_mwi(struct e1000_hw *hw) | |
4889 | { | |
4890 | struct e1000_adapter *adapter = hw->back; | |
2648345f | 4891 | int ret_val = pci_set_mwi(adapter->pdev); |
1da177e4 | 4892 | |
96838a40 | 4893 | if (ret_val) |
2648345f | 4894 | DPRINTK(PROBE, ERR, "Error in setting MWI\n"); |
1da177e4 LT |
4895 | } |
4896 | ||
4897 | void | |
4898 | e1000_pci_clear_mwi(struct e1000_hw *hw) | |
4899 | { | |
4900 | struct e1000_adapter *adapter = hw->back; | |
4901 | ||
4902 | pci_clear_mwi(adapter->pdev); | |
4903 | } | |
4904 | ||
4905 | void | |
4906 | e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4907 | { | |
4908 | struct e1000_adapter *adapter = hw->back; | |
4909 | ||
4910 | pci_read_config_word(adapter->pdev, reg, value); | |
4911 | } | |
4912 | ||
4913 | void | |
4914 | e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4915 | { | |
4916 | struct e1000_adapter *adapter = hw->back; | |
4917 | ||
4918 | pci_write_config_word(adapter->pdev, reg, *value); | |
4919 | } | |
4920 | ||
caeccb68 JK |
4921 | int32_t |
4922 | e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4923 | { | |
4924 | struct e1000_adapter *adapter = hw->back; | |
4925 | uint16_t cap_offset; | |
4926 | ||
4927 | cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP); | |
4928 | if (!cap_offset) | |
4929 | return -E1000_ERR_CONFIG; | |
4930 | ||
4931 | pci_read_config_word(adapter->pdev, cap_offset + reg, value); | |
4932 | ||
4933 | return E1000_SUCCESS; | |
4934 | } | |
4935 | ||
1da177e4 LT |
4936 | void |
4937 | e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value) | |
4938 | { | |
4939 | outl(value, port); | |
4940 | } | |
4941 | ||
4942 | static void | |
4943 | e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
4944 | { | |
60490fe0 | 4945 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4946 | uint32_t ctrl, rctl; |
4947 | ||
4948 | e1000_irq_disable(adapter); | |
4949 | adapter->vlgrp = grp; | |
4950 | ||
96838a40 | 4951 | if (grp) { |
1da177e4 LT |
4952 | /* enable VLAN tag insert/strip */ |
4953 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4954 | ctrl |= E1000_CTRL_VME; | |
4955 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4956 | ||
cd94dd0b | 4957 | if (adapter->hw.mac_type != e1000_ich8lan) { |
90fb5135 AK |
4958 | /* enable VLAN receive filtering */ |
4959 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4960 | rctl |= E1000_RCTL_VFE; | |
4961 | rctl &= ~E1000_RCTL_CFIEN; | |
4962 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
4963 | e1000_update_mng_vlan(adapter); | |
cd94dd0b | 4964 | } |
1da177e4 LT |
4965 | } else { |
4966 | /* disable VLAN tag insert/strip */ | |
4967 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4968 | ctrl &= ~E1000_CTRL_VME; | |
4969 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4970 | ||
cd94dd0b | 4971 | if (adapter->hw.mac_type != e1000_ich8lan) { |
90fb5135 AK |
4972 | /* disable VLAN filtering */ |
4973 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4974 | rctl &= ~E1000_RCTL_VFE; | |
4975 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
4976 | if (adapter->mng_vlan_id != | |
4977 | (uint16_t)E1000_MNG_VLAN_NONE) { | |
4978 | e1000_vlan_rx_kill_vid(netdev, | |
4979 | adapter->mng_vlan_id); | |
4980 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
4981 | } | |
cd94dd0b | 4982 | } |
1da177e4 LT |
4983 | } |
4984 | ||
4985 | e1000_irq_enable(adapter); | |
4986 | } | |
4987 | ||
4988 | static void | |
4989 | e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid) | |
4990 | { | |
60490fe0 | 4991 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 4992 | uint32_t vfta, index; |
96838a40 JB |
4993 | |
4994 | if ((adapter->hw.mng_cookie.status & | |
4995 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
4996 | (vid == adapter->mng_vlan_id)) | |
2d7edb92 | 4997 | return; |
1da177e4 LT |
4998 | /* add VID to filter table */ |
4999 | index = (vid >> 5) & 0x7F; | |
5000 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
5001 | vfta |= (1 << (vid & 0x1F)); | |
5002 | e1000_write_vfta(&adapter->hw, index, vfta); | |
5003 | } | |
5004 | ||
5005 | static void | |
5006 | e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid) | |
5007 | { | |
60490fe0 | 5008 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
5009 | uint32_t vfta, index; |
5010 | ||
5011 | e1000_irq_disable(adapter); | |
5012 | ||
96838a40 | 5013 | if (adapter->vlgrp) |
1da177e4 LT |
5014 | adapter->vlgrp->vlan_devices[vid] = NULL; |
5015 | ||
5016 | e1000_irq_enable(adapter); | |
5017 | ||
96838a40 JB |
5018 | if ((adapter->hw.mng_cookie.status & |
5019 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
ff147013 JK |
5020 | (vid == adapter->mng_vlan_id)) { |
5021 | /* release control to f/w */ | |
5022 | e1000_release_hw_control(adapter); | |
2d7edb92 | 5023 | return; |
ff147013 JK |
5024 | } |
5025 | ||
1da177e4 LT |
5026 | /* remove VID from filter table */ |
5027 | index = (vid >> 5) & 0x7F; | |
5028 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
5029 | vfta &= ~(1 << (vid & 0x1F)); | |
5030 | e1000_write_vfta(&adapter->hw, index, vfta); | |
5031 | } | |
5032 | ||
5033 | static void | |
5034 | e1000_restore_vlan(struct e1000_adapter *adapter) | |
5035 | { | |
5036 | e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp); | |
5037 | ||
96838a40 | 5038 | if (adapter->vlgrp) { |
1da177e4 | 5039 | uint16_t vid; |
96838a40 JB |
5040 | for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { |
5041 | if (!adapter->vlgrp->vlan_devices[vid]) | |
1da177e4 LT |
5042 | continue; |
5043 | e1000_vlan_rx_add_vid(adapter->netdev, vid); | |
5044 | } | |
5045 | } | |
5046 | } | |
5047 | ||
5048 | int | |
5049 | e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx) | |
5050 | { | |
5051 | adapter->hw.autoneg = 0; | |
5052 | ||
6921368f | 5053 | /* Fiber NICs only allow 1000 gbps Full duplex */ |
96838a40 | 5054 | if ((adapter->hw.media_type == e1000_media_type_fiber) && |
6921368f MC |
5055 | spddplx != (SPEED_1000 + DUPLEX_FULL)) { |
5056 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); | |
5057 | return -EINVAL; | |
5058 | } | |
5059 | ||
96838a40 | 5060 | switch (spddplx) { |
1da177e4 LT |
5061 | case SPEED_10 + DUPLEX_HALF: |
5062 | adapter->hw.forced_speed_duplex = e1000_10_half; | |
5063 | break; | |
5064 | case SPEED_10 + DUPLEX_FULL: | |
5065 | adapter->hw.forced_speed_duplex = e1000_10_full; | |
5066 | break; | |
5067 | case SPEED_100 + DUPLEX_HALF: | |
5068 | adapter->hw.forced_speed_duplex = e1000_100_half; | |
5069 | break; | |
5070 | case SPEED_100 + DUPLEX_FULL: | |
5071 | adapter->hw.forced_speed_duplex = e1000_100_full; | |
5072 | break; | |
5073 | case SPEED_1000 + DUPLEX_FULL: | |
5074 | adapter->hw.autoneg = 1; | |
5075 | adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL; | |
5076 | break; | |
5077 | case SPEED_1000 + DUPLEX_HALF: /* not supported */ | |
5078 | default: | |
2648345f | 5079 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); |
1da177e4 LT |
5080 | return -EINVAL; |
5081 | } | |
5082 | return 0; | |
5083 | } | |
5084 | ||
b6a1d5f8 | 5085 | #ifdef CONFIG_PM |
0f15a8fa JK |
5086 | /* Save/restore 16 or 64 dwords of PCI config space depending on which |
5087 | * bus we're on (PCI(X) vs. PCI-E) | |
2f82665f JB |
5088 | */ |
5089 | #define PCIE_CONFIG_SPACE_LEN 256 | |
5090 | #define PCI_CONFIG_SPACE_LEN 64 | |
5091 | static int | |
5092 | e1000_pci_save_state(struct e1000_adapter *adapter) | |
5093 | { | |
5094 | struct pci_dev *dev = adapter->pdev; | |
5095 | int size; | |
5096 | int i; | |
0f15a8fa | 5097 | |
2f82665f JB |
5098 | if (adapter->hw.mac_type >= e1000_82571) |
5099 | size = PCIE_CONFIG_SPACE_LEN; | |
5100 | else | |
5101 | size = PCI_CONFIG_SPACE_LEN; | |
5102 | ||
5103 | WARN_ON(adapter->config_space != NULL); | |
5104 | ||
5105 | adapter->config_space = kmalloc(size, GFP_KERNEL); | |
5106 | if (!adapter->config_space) { | |
5107 | DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size); | |
5108 | return -ENOMEM; | |
5109 | } | |
5110 | for (i = 0; i < (size / 4); i++) | |
5111 | pci_read_config_dword(dev, i * 4, &adapter->config_space[i]); | |
5112 | return 0; | |
5113 | } | |
5114 | ||
5115 | static void | |
5116 | e1000_pci_restore_state(struct e1000_adapter *adapter) | |
5117 | { | |
5118 | struct pci_dev *dev = adapter->pdev; | |
5119 | int size; | |
5120 | int i; | |
0f15a8fa | 5121 | |
2f82665f JB |
5122 | if (adapter->config_space == NULL) |
5123 | return; | |
0f15a8fa | 5124 | |
2f82665f JB |
5125 | if (adapter->hw.mac_type >= e1000_82571) |
5126 | size = PCIE_CONFIG_SPACE_LEN; | |
5127 | else | |
5128 | size = PCI_CONFIG_SPACE_LEN; | |
5129 | for (i = 0; i < (size / 4); i++) | |
5130 | pci_write_config_dword(dev, i * 4, adapter->config_space[i]); | |
5131 | kfree(adapter->config_space); | |
5132 | adapter->config_space = NULL; | |
5133 | return; | |
5134 | } | |
5135 | #endif /* CONFIG_PM */ | |
5136 | ||
1da177e4 | 5137 | static int |
829ca9a3 | 5138 | e1000_suspend(struct pci_dev *pdev, pm_message_t state) |
1da177e4 LT |
5139 | { |
5140 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 5141 | struct e1000_adapter *adapter = netdev_priv(netdev); |
0fccd0e9 | 5142 | uint32_t ctrl, ctrl_ext, rctl, status; |
1da177e4 | 5143 | uint32_t wufc = adapter->wol; |
6fdfef16 | 5144 | #ifdef CONFIG_PM |
240b1710 | 5145 | int retval = 0; |
6fdfef16 | 5146 | #endif |
1da177e4 LT |
5147 | |
5148 | netif_device_detach(netdev); | |
5149 | ||
2db10a08 AK |
5150 | if (netif_running(netdev)) { |
5151 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); | |
1da177e4 | 5152 | e1000_down(adapter); |
2db10a08 | 5153 | } |
1da177e4 | 5154 | |
2f82665f | 5155 | #ifdef CONFIG_PM |
0f15a8fa JK |
5156 | /* Implement our own version of pci_save_state(pdev) because pci- |
5157 | * express adapters have 256-byte config spaces. */ | |
2f82665f JB |
5158 | retval = e1000_pci_save_state(adapter); |
5159 | if (retval) | |
5160 | return retval; | |
5161 | #endif | |
5162 | ||
1da177e4 | 5163 | status = E1000_READ_REG(&adapter->hw, STATUS); |
96838a40 | 5164 | if (status & E1000_STATUS_LU) |
1da177e4 LT |
5165 | wufc &= ~E1000_WUFC_LNKC; |
5166 | ||
96838a40 | 5167 | if (wufc) { |
1da177e4 LT |
5168 | e1000_setup_rctl(adapter); |
5169 | e1000_set_multi(netdev); | |
5170 | ||
5171 | /* turn on all-multi mode if wake on multicast is enabled */ | |
120cd576 | 5172 | if (wufc & E1000_WUFC_MC) { |
1da177e4 LT |
5173 | rctl = E1000_READ_REG(&adapter->hw, RCTL); |
5174 | rctl |= E1000_RCTL_MPE; | |
5175 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
5176 | } | |
5177 | ||
96838a40 | 5178 | if (adapter->hw.mac_type >= e1000_82540) { |
1da177e4 LT |
5179 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); |
5180 | /* advertise wake from D3Cold */ | |
5181 | #define E1000_CTRL_ADVD3WUC 0x00100000 | |
5182 | /* phy power management enable */ | |
5183 | #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 | |
5184 | ctrl |= E1000_CTRL_ADVD3WUC | | |
5185 | E1000_CTRL_EN_PHY_PWR_MGMT; | |
5186 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
5187 | } | |
5188 | ||
96838a40 | 5189 | if (adapter->hw.media_type == e1000_media_type_fiber || |
1da177e4 LT |
5190 | adapter->hw.media_type == e1000_media_type_internal_serdes) { |
5191 | /* keep the laser running in D3 */ | |
5192 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
5193 | ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA; | |
5194 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext); | |
5195 | } | |
5196 | ||
2d7edb92 MC |
5197 | /* Allow time for pending master requests to run */ |
5198 | e1000_disable_pciex_master(&adapter->hw); | |
5199 | ||
1da177e4 LT |
5200 | E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN); |
5201 | E1000_WRITE_REG(&adapter->hw, WUFC, wufc); | |
d0e027db AK |
5202 | pci_enable_wake(pdev, PCI_D3hot, 1); |
5203 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1da177e4 LT |
5204 | } else { |
5205 | E1000_WRITE_REG(&adapter->hw, WUC, 0); | |
5206 | E1000_WRITE_REG(&adapter->hw, WUFC, 0); | |
d0e027db AK |
5207 | pci_enable_wake(pdev, PCI_D3hot, 0); |
5208 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 LT |
5209 | } |
5210 | ||
0fccd0e9 JG |
5211 | e1000_release_manageability(adapter); |
5212 | ||
5213 | /* make sure adapter isn't asleep if manageability is enabled */ | |
5214 | if (adapter->en_mng_pt) { | |
5215 | pci_enable_wake(pdev, PCI_D3hot, 1); | |
5216 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1da177e4 LT |
5217 | } |
5218 | ||
cd94dd0b AK |
5219 | if (adapter->hw.phy_type == e1000_phy_igp_3) |
5220 | e1000_phy_powerdown_workaround(&adapter->hw); | |
5221 | ||
edd106fc AK |
5222 | if (netif_running(netdev)) |
5223 | e1000_free_irq(adapter); | |
5224 | ||
b55ccb35 JK |
5225 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
5226 | * would have already happened in close and is redundant. */ | |
5227 | e1000_release_hw_control(adapter); | |
2d7edb92 | 5228 | |
1da177e4 | 5229 | pci_disable_device(pdev); |
240b1710 | 5230 | |
d0e027db | 5231 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
1da177e4 LT |
5232 | |
5233 | return 0; | |
5234 | } | |
5235 | ||
2f82665f | 5236 | #ifdef CONFIG_PM |
1da177e4 LT |
5237 | static int |
5238 | e1000_resume(struct pci_dev *pdev) | |
5239 | { | |
5240 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 5241 | struct e1000_adapter *adapter = netdev_priv(netdev); |
0fccd0e9 | 5242 | uint32_t err; |
1da177e4 | 5243 | |
d0e027db | 5244 | pci_set_power_state(pdev, PCI_D0); |
2f82665f | 5245 | e1000_pci_restore_state(adapter); |
3d1dd8cb AK |
5246 | if ((err = pci_enable_device(pdev))) { |
5247 | printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n"); | |
5248 | return err; | |
5249 | } | |
a4cb847d | 5250 | pci_set_master(pdev); |
1da177e4 | 5251 | |
d0e027db AK |
5252 | pci_enable_wake(pdev, PCI_D3hot, 0); |
5253 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 | 5254 | |
edd106fc AK |
5255 | if (netif_running(netdev) && (err = e1000_request_irq(adapter))) |
5256 | return err; | |
5257 | ||
5258 | e1000_power_up_phy(adapter); | |
1da177e4 LT |
5259 | e1000_reset(adapter); |
5260 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | |
5261 | ||
0fccd0e9 JG |
5262 | e1000_init_manageability(adapter); |
5263 | ||
96838a40 | 5264 | if (netif_running(netdev)) |
1da177e4 LT |
5265 | e1000_up(adapter); |
5266 | ||
5267 | netif_device_attach(netdev); | |
5268 | ||
b55ccb35 JK |
5269 | /* If the controller is 82573 and f/w is AMT, do not set |
5270 | * DRV_LOAD until the interface is up. For all other cases, | |
5271 | * let the f/w know that the h/w is now under the control | |
5272 | * of the driver. */ | |
5273 | if (adapter->hw.mac_type != e1000_82573 || | |
5274 | !e1000_check_mng_mode(&adapter->hw)) | |
5275 | e1000_get_hw_control(adapter); | |
2d7edb92 | 5276 | |
1da177e4 LT |
5277 | return 0; |
5278 | } | |
5279 | #endif | |
c653e635 AK |
5280 | |
5281 | static void e1000_shutdown(struct pci_dev *pdev) | |
5282 | { | |
5283 | e1000_suspend(pdev, PMSG_SUSPEND); | |
5284 | } | |
5285 | ||
1da177e4 LT |
5286 | #ifdef CONFIG_NET_POLL_CONTROLLER |
5287 | /* | |
5288 | * Polling 'interrupt' - used by things like netconsole to send skbs | |
5289 | * without having to re-enable interrupts. It's not called while | |
5290 | * the interrupt routine is executing. | |
5291 | */ | |
5292 | static void | |
2648345f | 5293 | e1000_netpoll(struct net_device *netdev) |
1da177e4 | 5294 | { |
60490fe0 | 5295 | struct e1000_adapter *adapter = netdev_priv(netdev); |
d3d9e484 | 5296 | |
1da177e4 | 5297 | disable_irq(adapter->pdev->irq); |
7d12e780 | 5298 | e1000_intr(adapter->pdev->irq, netdev); |
c4cfe567 | 5299 | e1000_clean_tx_irq(adapter, adapter->tx_ring); |
e8da8be1 JK |
5300 | #ifndef CONFIG_E1000_NAPI |
5301 | adapter->clean_rx(adapter, adapter->rx_ring); | |
5302 | #endif | |
1da177e4 LT |
5303 | enable_irq(adapter->pdev->irq); |
5304 | } | |
5305 | #endif | |
5306 | ||
9026729b AK |
5307 | /** |
5308 | * e1000_io_error_detected - called when PCI error is detected | |
5309 | * @pdev: Pointer to PCI device | |
5310 | * @state: The current pci conneection state | |
5311 | * | |
5312 | * This function is called after a PCI bus error affecting | |
5313 | * this device has been detected. | |
5314 | */ | |
5315 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) | |
5316 | { | |
5317 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5318 | struct e1000_adapter *adapter = netdev->priv; | |
5319 | ||
5320 | netif_device_detach(netdev); | |
5321 | ||
5322 | if (netif_running(netdev)) | |
5323 | e1000_down(adapter); | |
72e8d6bb | 5324 | pci_disable_device(pdev); |
9026729b AK |
5325 | |
5326 | /* Request a slot slot reset. */ | |
5327 | return PCI_ERS_RESULT_NEED_RESET; | |
5328 | } | |
5329 | ||
5330 | /** | |
5331 | * e1000_io_slot_reset - called after the pci bus has been reset. | |
5332 | * @pdev: Pointer to PCI device | |
5333 | * | |
5334 | * Restart the card from scratch, as if from a cold-boot. Implementation | |
5335 | * resembles the first-half of the e1000_resume routine. | |
5336 | */ | |
5337 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) | |
5338 | { | |
5339 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5340 | struct e1000_adapter *adapter = netdev->priv; | |
5341 | ||
5342 | if (pci_enable_device(pdev)) { | |
5343 | printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n"); | |
5344 | return PCI_ERS_RESULT_DISCONNECT; | |
5345 | } | |
5346 | pci_set_master(pdev); | |
5347 | ||
dbf38c94 LV |
5348 | pci_enable_wake(pdev, PCI_D3hot, 0); |
5349 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
9026729b | 5350 | |
9026729b AK |
5351 | e1000_reset(adapter); |
5352 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | |
5353 | ||
5354 | return PCI_ERS_RESULT_RECOVERED; | |
5355 | } | |
5356 | ||
5357 | /** | |
5358 | * e1000_io_resume - called when traffic can start flowing again. | |
5359 | * @pdev: Pointer to PCI device | |
5360 | * | |
5361 | * This callback is called when the error recovery driver tells us that | |
5362 | * its OK to resume normal operation. Implementation resembles the | |
5363 | * second-half of the e1000_resume routine. | |
5364 | */ | |
5365 | static void e1000_io_resume(struct pci_dev *pdev) | |
5366 | { | |
5367 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5368 | struct e1000_adapter *adapter = netdev->priv; | |
0fccd0e9 JG |
5369 | |
5370 | e1000_init_manageability(adapter); | |
9026729b AK |
5371 | |
5372 | if (netif_running(netdev)) { | |
5373 | if (e1000_up(adapter)) { | |
5374 | printk("e1000: can't bring device back up after reset\n"); | |
5375 | return; | |
5376 | } | |
5377 | } | |
5378 | ||
5379 | netif_device_attach(netdev); | |
5380 | ||
0fccd0e9 JG |
5381 | /* If the controller is 82573 and f/w is AMT, do not set |
5382 | * DRV_LOAD until the interface is up. For all other cases, | |
5383 | * let the f/w know that the h/w is now under the control | |
5384 | * of the driver. */ | |
5385 | if (adapter->hw.mac_type != e1000_82573 || | |
5386 | !e1000_check_mng_mode(&adapter->hw)) | |
5387 | e1000_get_hw_control(adapter); | |
9026729b | 5388 | |
9026729b AK |
5389 | } |
5390 | ||
1da177e4 | 5391 | /* e1000_main.c */ |