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e1000: rework module param code with uninitialized values
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
3d41e30a 4 Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
3d41e30a 25 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 26 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27
28*******************************************************************************/
29
30#include "e1000.h"
31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 34#ifndef CONFIG_E1000_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
440c052d 39#define DRV_VERSION "7.0.38-k4"DRIVERNAPI
1da177e4 40char e1000_driver_version[] = DRV_VERSION;
3d41e30a 41static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 42
43/* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
07b8fede
MC		 76 INTEL_E1000_ETHERNET_DEVICE(0x105E),
77 INTEL_E1000_ETHERNET_DEVICE(0x105F),
78 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 79 INTEL_E1000_ETHERNET_DEVICE(0x1075),
80 INTEL_E1000_ETHERNET_DEVICE(0x1076),
81 INTEL_E1000_ETHERNET_DEVICE(0x1077),
82 INTEL_E1000_ETHERNET_DEVICE(0x1078),
83 INTEL_E1000_ETHERNET_DEVICE(0x1079),
84 INTEL_E1000_ETHERNET_DEVICE(0x107A),
85 INTEL_E1000_ETHERNET_DEVICE(0x107B),
86 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 87 INTEL_E1000_ETHERNET_DEVICE(0x107D),
88 INTEL_E1000_ETHERNET_DEVICE(0x107E),
89 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 90 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 91 INTEL_E1000_ETHERNET_DEVICE(0x108B),
92 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 93 INTEL_E1000_ETHERNET_DEVICE(0x1096),
94 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 95 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 96 INTEL_E1000_ETHERNET_DEVICE(0x109A),
b7ee49db 97 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 98 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
1da177e4
LT		 99 /* required last entry */
100 {0,}
101};
102
103MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
104
3ad2cc67 105static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 106 struct e1000_tx_ring *txdr);
3ad2cc67 107static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 108 struct e1000_rx_ring *rxdr);
3ad2cc67 109static void e1000_free_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 110 struct e1000_tx_ring *tx_ring);
3ad2cc67 111static void e1000_free_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 112 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 113
114/* Local Function Prototypes */
115
116static int e1000_init_module(void);
117static void e1000_exit_module(void);
118static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
119static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 120static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 121static int e1000_sw_init(struct e1000_adapter *adapter);
122static int e1000_open(struct net_device *netdev);
123static int e1000_close(struct net_device *netdev);
124static void e1000_configure_tx(struct e1000_adapter *adapter);
125static void e1000_configure_rx(struct e1000_adapter *adapter);
126static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 127static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
128static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
129static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 133static void e1000_set_multi(struct net_device *netdev);
134static void e1000_update_phy_info(unsigned long data);
135static void e1000_watchdog(unsigned long data);
1da177e4
LT		 136static void e1000_82547_tx_fifo_stall(unsigned long data);
137static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
138static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
139static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
140static int e1000_set_mac(struct net_device *netdev, void *p);
141static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 142static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
143 struct e1000_tx_ring *tx_ring);
1da177e4 144#ifdef CONFIG_E1000_NAPI
581d708e 145static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 146static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 147 struct e1000_rx_ring *rx_ring,
1da177e4 148 int *work_done, int work_to_do);
2d7edb92 149static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 150 struct e1000_rx_ring *rx_ring,
2d7edb92 151 int *work_done, int work_to_do);
1da177e4 152#else
581d708e
MC		 153static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
154 struct e1000_rx_ring *rx_ring);
155static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
156 struct e1000_rx_ring *rx_ring);
1da177e4 157#endif
581d708e 158static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 159 struct e1000_rx_ring *rx_ring,
160 int cleaned_count);
581d708e 161static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 162 struct e1000_rx_ring *rx_ring,
163 int cleaned_count);
1da177e4
LT		 164static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
165static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
166 int cmd);
1da177e4
LT		 167static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
168static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
169static void e1000_tx_timeout(struct net_device *dev);
87041639 170static void e1000_reset_task(struct net_device *dev);
1da177e4 171static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 172static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
173 struct sk_buff *skb);
1da177e4
LT		 174
175static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
176static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
177static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
178static void e1000_restore_vlan(struct e1000_adapter *adapter);
179
977e74b5 180static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 181#ifdef CONFIG_PM
1da177e4
LT		 182static int e1000_resume(struct pci_dev *pdev);
183#endif
c653e635 184static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 185
186#ifdef CONFIG_NET_POLL_CONTROLLER
187/* for netdump / net console */
188static void e1000_netpoll (struct net_device *netdev);
189#endif
190
9026729b
AK		 191static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
192 pci_channel_state_t state);
193static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
194static void e1000_io_resume(struct pci_dev *pdev);
195
196static struct pci_error_handlers e1000_err_handler = {
197 .error_detected = e1000_io_error_detected,
198 .slot_reset = e1000_io_slot_reset,
199 .resume = e1000_io_resume,
200};
24025e4e 201
1da177e4
LT		 202static struct pci_driver e1000_driver = {
203 .name = e1000_driver_name,
204 .id_table = e1000_pci_tbl,
205 .probe = e1000_probe,
206 .remove = __devexit_p(e1000_remove),
207 /* Power Managment Hooks */
1da177e4 208 .suspend = e1000_suspend,
6fdfef16 209#ifdef CONFIG_PM
c653e635 210 .resume = e1000_resume,
1da177e4 211#endif
9026729b
AK		 212 .shutdown = e1000_shutdown,
213 .err_handler = &e1000_err_handler
1da177e4
LT		 214};
215
216MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
217MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
218MODULE_LICENSE("GPL");
219MODULE_VERSION(DRV_VERSION);
220
221static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
222module_param(debug, int, 0);
223MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
224
225/**
226 * e1000_init_module - Driver Registration Routine
227 *
228 * e1000_init_module is the first routine called when the driver is
229 * loaded. All it does is register with the PCI subsystem.
230 **/
231
232static int __init
233e1000_init_module(void)
234{
235 int ret;
236 printk(KERN_INFO "%s - version %s\n",
237 e1000_driver_string, e1000_driver_version);
238
239 printk(KERN_INFO "%s\n", e1000_copyright);
240
241 ret = pci_module_init(&e1000_driver);
8b378def 242
1da177e4
LT		 243 return ret;
244}
245
246module_init(e1000_init_module);
247
248/**
249 * e1000_exit_module - Driver Exit Cleanup Routine
250 *
251 * e1000_exit_module is called just before the driver is removed
252 * from memory.
253 **/
254
255static void __exit
256e1000_exit_module(void)
257{
1da177e4
LT		 258 pci_unregister_driver(&e1000_driver);
259}
260
261module_exit(e1000_exit_module);
262
2db10a08
AK		 263static int e1000_request_irq(struct e1000_adapter *adapter)
264{
265 struct net_device *netdev = adapter->netdev;
266 int flags, err = 0;
267
268 flags = SA_SHIRQ | SA_SAMPLE_RANDOM;
269#ifdef CONFIG_PCI_MSI
270 if (adapter->hw.mac_type > e1000_82547_rev_2) {
271 adapter->have_msi = TRUE;
272 if ((err = pci_enable_msi(adapter->pdev))) {
273 DPRINTK(PROBE, ERR,
274 "Unable to allocate MSI interrupt Error: %d\n", err);
275 adapter->have_msi = FALSE;
276 }
277 }
278 if (adapter->have_msi)
279 flags &= ~SA_SHIRQ;
280#endif
281 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
282 netdev->name, netdev)))
283 DPRINTK(PROBE, ERR,
284 "Unable to allocate interrupt Error: %d\n", err);
285
286 return err;
287}
288
289static void e1000_free_irq(struct e1000_adapter *adapter)
290{
291 struct net_device *netdev = adapter->netdev;
292
293 free_irq(adapter->pdev->irq, netdev);
294
295#ifdef CONFIG_PCI_MSI
296 if (adapter->have_msi)
297 pci_disable_msi(adapter->pdev);
298#endif
299}
300
1da177e4
LT		 301/**
302 * e1000_irq_disable - Mask off interrupt generation on the NIC
303 * @adapter: board private structure
304 **/
305
e619d523 306static void
1da177e4
LT		 307e1000_irq_disable(struct e1000_adapter *adapter)
308{
309 atomic_inc(&adapter->irq_sem);
310 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
311 E1000_WRITE_FLUSH(&adapter->hw);
312 synchronize_irq(adapter->pdev->irq);
313}
314
315/**
316 * e1000_irq_enable - Enable default interrupt generation settings
317 * @adapter: board private structure
318 **/
319
e619d523 320static void
1da177e4
LT		 321e1000_irq_enable(struct e1000_adapter *adapter)
322{
96838a40 323 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 324 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
325 E1000_WRITE_FLUSH(&adapter->hw);
326 }
327}
3ad2cc67
AB		 328
329static void
2d7edb92
MC		 330e1000_update_mng_vlan(struct e1000_adapter *adapter)
331{
332 struct net_device *netdev = adapter->netdev;
333 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
334 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 335 if (adapter->vlgrp) {
336 if (!adapter->vlgrp->vlan_devices[vid]) {
337 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 338 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
339 e1000_vlan_rx_add_vid(netdev, vid);
340 adapter->mng_vlan_id = vid;
341 } else
342 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 343
344 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
345 (vid != old_vid) &&
2d7edb92
MC		 346 !adapter->vlgrp->vlan_devices[old_vid])
347 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 348 } else
349 adapter->mng_vlan_id = vid;
2d7edb92
MC		 350 }
351}
b55ccb35
JK		 352
353/**
354 * e1000_release_hw_control - release control of the h/w to f/w
355 * @adapter: address of board private structure
356 *
357 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
358 * For ASF and Pass Through versions of f/w this means that the
359 * driver is no longer loaded. For AMT version (only with 82573) i
360 * of the f/w this means that the netowrk i/f is closed.
76c224bc 361 *
b55ccb35
JK		 362 **/
363
e619d523 364static void
b55ccb35
JK		 365e1000_release_hw_control(struct e1000_adapter *adapter)
366{
367 uint32_t ctrl_ext;
368 uint32_t swsm;
369
370 /* Let firmware taken over control of h/w */
371 switch (adapter->hw.mac_type) {
372 case e1000_82571:
373 case e1000_82572:
4cc15f54 374 case e1000_80003es2lan:
b55ccb35
JK		 375 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
376 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
377 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
378 break;
379 case e1000_82573:
380 swsm = E1000_READ_REG(&adapter->hw, SWSM);
381 E1000_WRITE_REG(&adapter->hw, SWSM,
382 swsm & ~E1000_SWSM_DRV_LOAD);
383 default:
384 break;
385 }
386}
387
388/**
389 * e1000_get_hw_control - get control of the h/w from f/w
390 * @adapter: address of board private structure
391 *
392 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 393 * For ASF and Pass Through versions of f/w this means that
394 * the driver is loaded. For AMT version (only with 82573)
b55ccb35 395 * of the f/w this means that the netowrk i/f is open.
76c224bc 396 *
b55ccb35
JK		 397 **/
398
e619d523 399static void
b55ccb35
JK		 400e1000_get_hw_control(struct e1000_adapter *adapter)
401{
402 uint32_t ctrl_ext;
403 uint32_t swsm;
404 /* Let firmware know the driver has taken over */
405 switch (adapter->hw.mac_type) {
406 case e1000_82571:
407 case e1000_82572:
4cc15f54 408 case e1000_80003es2lan:
b55ccb35
JK		 409 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
410 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
411 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
412 break;
413 case e1000_82573:
414 swsm = E1000_READ_REG(&adapter->hw, SWSM);
415 E1000_WRITE_REG(&adapter->hw, SWSM,
416 swsm | E1000_SWSM_DRV_LOAD);
417 break;
418 default:
419 break;
420 }
421}
422
1da177e4
LT		 423int
424e1000_up(struct e1000_adapter *adapter)
425{
426 struct net_device *netdev = adapter->netdev;
2db10a08 427 int i;
1da177e4
LT		 428
429 /* hardware has been reset, we need to reload some things */
430
1da177e4
LT		 431 e1000_set_multi(netdev);
432
433 e1000_restore_vlan(adapter);
434
435 e1000_configure_tx(adapter);
436 e1000_setup_rctl(adapter);
437 e1000_configure_rx(adapter);
72d64a43
JK		 438 /* call E1000_DESC_UNUSED which always leaves
439 * at least 1 descriptor unused to make sure
440 * next_to_use != next_to_clean */
f56799ea 441 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 442 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 443 adapter->alloc_rx_buf(adapter, ring,
444 E1000_DESC_UNUSED(ring));
f56799ea 445 }
1da177e4 446
7bfa4816
JK		 447 adapter->tx_queue_len = netdev->tx_queue_len;
448
1da177e4 449 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 450
451#ifdef CONFIG_E1000_NAPI
452 netif_poll_enable(netdev);
453#endif
5de55624
MC		 454 e1000_irq_enable(adapter);
455
1da177e4
LT		 456 return 0;
457}
458
79f05bf0
AK		 459/**
460 * e1000_power_up_phy - restore link in case the phy was powered down
461 * @adapter: address of board private structure
462 *
463 * The phy may be powered down to save power and turn off link when the
464 * driver is unloaded and wake on lan is not enabled (among others)
465 * *** this routine MUST be followed by a call to e1000_reset ***
466 *
467 **/
468
469static void e1000_power_up_phy(struct e1000_adapter *adapter)
470{
471 uint16_t mii_reg = 0;
472
473 /* Just clear the power down bit to wake the phy back up */
474 if (adapter->hw.media_type == e1000_media_type_copper) {
475 /* according to the manual, the phy will retain its
476 * settings across a power-down/up cycle */
477 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
478 mii_reg &= ~MII_CR_POWER_DOWN;
479 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
480 }
481}
482
483static void e1000_power_down_phy(struct e1000_adapter *adapter)
484{
485 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
486 e1000_check_mng_mode(&adapter->hw);
487 /* Power down the PHY so no link is implied when interface is down
488 * The PHY cannot be powered down if any of the following is TRUE
489 * (a) WoL is enabled
490 * (b) AMT is active
491 * (c) SoL/IDER session is active */
492 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
493 adapter->hw.media_type == e1000_media_type_copper &&
494 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
495 !mng_mode_enabled &&
496 !e1000_check_phy_reset_block(&adapter->hw)) {
497 uint16_t mii_reg = 0;
498 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
499 mii_reg |= MII_CR_POWER_DOWN;
500 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
501 mdelay(1);
502 }
503}
504
1da177e4
LT		 505void
506e1000_down(struct e1000_adapter *adapter)
507{
508 struct net_device *netdev = adapter->netdev;
509
510 e1000_irq_disable(adapter);
c1605eb3 511
1da177e4
LT		 512 del_timer_sync(&adapter->tx_fifo_stall_timer);
513 del_timer_sync(&adapter->watchdog_timer);
514 del_timer_sync(&adapter->phy_info_timer);
515
516#ifdef CONFIG_E1000_NAPI
517 netif_poll_disable(netdev);
518#endif
7bfa4816 519 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 520 adapter->link_speed = 0;
521 adapter->link_duplex = 0;
522 netif_carrier_off(netdev);
523 netif_stop_queue(netdev);
524
525 e1000_reset(adapter);
581d708e
MC		 526 e1000_clean_all_tx_rings(adapter);
527 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 528}
529
2db10a08
AK		 530void
531e1000_reinit_locked(struct e1000_adapter *adapter)
532{
533 WARN_ON(in_interrupt());
534 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
535 msleep(1);
536 e1000_down(adapter);
537 e1000_up(adapter);
538 clear_bit(__E1000_RESETTING, &adapter->flags);
539}
540
1da177e4
LT		 541void
542e1000_reset(struct e1000_adapter *adapter)
543{
2d7edb92 544 uint32_t pba, manc;
1125ecbc 545 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 546
547 /* Repartition Pba for greater than 9k mtu
548 * To take effect CTRL.RST is required.
549 */
550
2d7edb92
MC		 551 switch (adapter->hw.mac_type) {
552 case e1000_82547:
0e6ef3e0 553 case e1000_82547_rev_2:
2d7edb92
MC		 554 pba = E1000_PBA_30K;
555 break;
868d5309
MC		 556 case e1000_82571:
557 case e1000_82572:
6418ecc6 558 case e1000_80003es2lan:
868d5309
MC		 559 pba = E1000_PBA_38K;
560 break;
2d7edb92
MC		 561 case e1000_82573:
562 pba = E1000_PBA_12K;
563 break;
564 default:
565 pba = E1000_PBA_48K;
566 break;
567 }
568
96838a40 569 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 570 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 571 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 572
573
96838a40 574 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 575 adapter->tx_fifo_head = 0;
576 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
577 adapter->tx_fifo_size =
578 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
579 atomic_set(&adapter->tx_fifo_stall, 0);
580 }
2d7edb92 581
1da177e4
LT		 582 E1000_WRITE_REG(&adapter->hw, PBA, pba);
583
584 /* flow control settings */
f11b7f85
JK		 585 /* Set the FC high water mark to 90% of the FIFO size.
586 * Required to clear last 3 LSB */
587 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
588
589 adapter->hw.fc_high_water = fc_high_water_mark;
590 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 591 if (adapter->hw.mac_type == e1000_80003es2lan)
592 adapter->hw.fc_pause_time = 0xFFFF;
593 else
594 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 595 adapter->hw.fc_send_xon = 1;
596 adapter->hw.fc = adapter->hw.original_fc;
597
2d7edb92 598 /* Allow time for pending master requests to run */
1da177e4 599 e1000_reset_hw(&adapter->hw);
96838a40 600 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 601 E1000_WRITE_REG(&adapter->hw, WUC, 0);
96838a40 602 if (e1000_init_hw(&adapter->hw))
1da177e4 603 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 604 e1000_update_mng_vlan(adapter);
1da177e4
LT		 605 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
606 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
607
608 e1000_reset_adaptive(&adapter->hw);
609 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 610
611 if (!adapter->smart_power_down &&
612 (adapter->hw.mac_type == e1000_82571 ||
613 adapter->hw.mac_type == e1000_82572)) {
614 uint16_t phy_data = 0;
615 /* speed up time to link by disabling smart power down, ignore
616 * the return value of this function because there is nothing
617 * different we would do if it failed */
618 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
619 &phy_data);
620 phy_data &= ~IGP02E1000_PM_SPD;
621 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
622 phy_data);
623 }
624
2d7edb92
MC		 625 if (adapter->en_mng_pt) {
626 manc = E1000_READ_REG(&adapter->hw, MANC);
627 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
628 E1000_WRITE_REG(&adapter->hw, MANC, manc);
629 }
1da177e4
LT		 630}
631
632/**
633 * e1000_probe - Device Initialization Routine
634 * @pdev: PCI device information struct
635 * @ent: entry in e1000_pci_tbl
636 *
637 * Returns 0 on success, negative on failure
638 *
639 * e1000_probe initializes an adapter identified by a pci_dev structure.
640 * The OS initialization, configuring of the adapter private structure,
641 * and a hardware reset occur.
642 **/
643
644static int __devinit
645e1000_probe(struct pci_dev *pdev,
646 const struct pci_device_id *ent)
647{
648 struct net_device *netdev;
649 struct e1000_adapter *adapter;
2d7edb92 650 unsigned long mmio_start, mmio_len;
2d7edb92 651
1da177e4 652 static int cards_found = 0;
84916829 653 static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
2d7edb92 654 int i, err, pci_using_dac;
1da177e4
LT		 655 uint16_t eeprom_data;
656 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 657 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 658 return err;
659
96838a40 660 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 661 pci_using_dac = 1;
662 } else {
96838a40 663 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4
LT		 664 E1000_ERR("No usable DMA configuration, aborting\n");
665 return err;
666 }
667 pci_using_dac = 0;
668 }
669
96838a40 670 if ((err = pci_request_regions(pdev, e1000_driver_name)))
1da177e4
LT		 671 return err;
672
673 pci_set_master(pdev);
674
675 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
96838a40 676 if (!netdev) {
1da177e4
LT		 677 err = -ENOMEM;
678 goto err_alloc_etherdev;
679 }
680
681 SET_MODULE_OWNER(netdev);
682 SET_NETDEV_DEV(netdev, &pdev->dev);
683
684 pci_set_drvdata(pdev, netdev);
60490fe0 685 adapter = netdev_priv(netdev);
1da177e4
LT		 686 adapter->netdev = netdev;
687 adapter->pdev = pdev;
688 adapter->hw.back = adapter;
689 adapter->msg_enable = (1 << debug) - 1;
690
691 mmio_start = pci_resource_start(pdev, BAR_0);
692 mmio_len = pci_resource_len(pdev, BAR_0);
693
694 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
96838a40 695 if (!adapter->hw.hw_addr) {
1da177e4
LT		 696 err = -EIO;
697 goto err_ioremap;
698 }
699
96838a40
JB		 700 for (i = BAR_1; i <= BAR_5; i++) {
701 if (pci_resource_len(pdev, i) == 0)
1da177e4 702 continue;
96838a40 703 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 704 adapter->hw.io_base = pci_resource_start(pdev, i);
705 break;
706 }
707 }
708
709 netdev->open = &e1000_open;
710 netdev->stop = &e1000_close;
711 netdev->hard_start_xmit = &e1000_xmit_frame;
712 netdev->get_stats = &e1000_get_stats;
713 netdev->set_multicast_list = &e1000_set_multi;
714 netdev->set_mac_address = &e1000_set_mac;
715 netdev->change_mtu = &e1000_change_mtu;
716 netdev->do_ioctl = &e1000_ioctl;
717 e1000_set_ethtool_ops(netdev);
718 netdev->tx_timeout = &e1000_tx_timeout;
719 netdev->watchdog_timeo = 5 * HZ;
720#ifdef CONFIG_E1000_NAPI
721 netdev->poll = &e1000_clean;
722 netdev->weight = 64;
723#endif
724 netdev->vlan_rx_register = e1000_vlan_rx_register;
725 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
726 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
727#ifdef CONFIG_NET_POLL_CONTROLLER
728 netdev->poll_controller = e1000_netpoll;
729#endif
730 strcpy(netdev->name, pci_name(pdev));
731
732 netdev->mem_start = mmio_start;
733 netdev->mem_end = mmio_start + mmio_len;
734 netdev->base_addr = adapter->hw.io_base;
735
736 adapter->bd_number = cards_found;
737
738 /* setup the private structure */
739
96838a40 740 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 741 goto err_sw_init;
742
96838a40 743 if ((err = e1000_check_phy_reset_block(&adapter->hw)))
2d7edb92
MC		 744 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
745
84916829 746 /* if ksp3, indicate if it's port a being setup */
76c224bc
AK		 747 if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
748 e1000_ksp3_port_a == 0)
84916829
JK		 749 adapter->ksp3_port_a = 1;
750 e1000_ksp3_port_a++;
751 /* Reset for multiple KP3 adapters */
752 if (e1000_ksp3_port_a == 4)
753 e1000_ksp3_port_a = 0;
754
96838a40 755 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 756 netdev->features = NETIF_F_SG |
757 NETIF_F_HW_CSUM |
758 NETIF_F_HW_VLAN_TX |
759 NETIF_F_HW_VLAN_RX |
760 NETIF_F_HW_VLAN_FILTER;
761 }
762
763#ifdef NETIF_F_TSO
96838a40 764 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 765 (adapter->hw.mac_type != e1000_82547))
766 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 767
768#ifdef NETIF_F_TSO_IPV6
96838a40 769 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 770 netdev->features |= NETIF_F_TSO_IPV6;
771#endif
1da177e4 772#endif
96838a40 773 if (pci_using_dac)
1da177e4
LT		 774 netdev->features |= NETIF_F_HIGHDMA;
775
76c224bc
AK		 776 /* hard_start_xmit is safe against parallel locking */
777 netdev->features |= NETIF_F_LLTX;
778
2d7edb92
MC		 779 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
780
96838a40 781 /* before reading the EEPROM, reset the controller to
1da177e4 782 * put the device in a known good starting state */
96838a40 783
1da177e4
LT		 784 e1000_reset_hw(&adapter->hw);
785
786 /* make sure the EEPROM is good */
787
96838a40 788 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4
LT		 789 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
790 err = -EIO;
791 goto err_eeprom;
792 }
793
794 /* copy the MAC address out of the EEPROM */
795
96838a40 796 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 797 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
798 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 799 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 800
96838a40 801 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 802 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
803 err = -EIO;
804 goto err_eeprom;
805 }
806
807 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
808
809 e1000_get_bus_info(&adapter->hw);
810
811 init_timer(&adapter->tx_fifo_stall_timer);
812 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
813 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
814
815 init_timer(&adapter->watchdog_timer);
816 adapter->watchdog_timer.function = &e1000_watchdog;
817 adapter->watchdog_timer.data = (unsigned long) adapter;
818
1da177e4
LT		 819 init_timer(&adapter->phy_info_timer);
820 adapter->phy_info_timer.function = &e1000_update_phy_info;
821 adapter->phy_info_timer.data = (unsigned long) adapter;
822
87041639
JK		 823 INIT_WORK(&adapter->reset_task,
824 (void (*)(void *))e1000_reset_task, netdev);
1da177e4
LT		 825
826 /* we're going to reset, so assume we have no link for now */
827
828 netif_carrier_off(netdev);
829 netif_stop_queue(netdev);
830
831 e1000_check_options(adapter);
832
833 /* Initial Wake on LAN setting
834 * If APM wake is enabled in the EEPROM,
835 * enable the ACPI Magic Packet filter
836 */
837
96838a40 838 switch (adapter->hw.mac_type) {
1da177e4
LT		 839 case e1000_82542_rev2_0:
840 case e1000_82542_rev2_1:
841 case e1000_82543:
842 break;
843 case e1000_82544:
844 e1000_read_eeprom(&adapter->hw,
845 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
846 eeprom_apme_mask = E1000_EEPROM_82544_APM;
847 break;
848 case e1000_82546:
849 case e1000_82546_rev_3:
fd803241 850 case e1000_82571:
6418ecc6 851 case e1000_80003es2lan:
96838a40 852 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 853 e1000_read_eeprom(&adapter->hw,
854 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
855 break;
856 }
857 /* Fall Through */
858 default:
859 e1000_read_eeprom(&adapter->hw,
860 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
861 break;
862 }
96838a40 863 if (eeprom_data & eeprom_apme_mask)
1da177e4
LT		 864 adapter->wol |= E1000_WUFC_MAG;
865
fb3d47d4
JK		 866 /* print bus type/speed/width info */
867 {
868 struct e1000_hw *hw = &adapter->hw;
869 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
870 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
871 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
872 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
873 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
874 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
875 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
876 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
877 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
878 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
879 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
880 "32-bit"));
881 }
882
883 for (i = 0; i < 6; i++)
884 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
885
1da177e4
LT		 886 /* reset the hardware with the new settings */
887 e1000_reset(adapter);
888
b55ccb35
JK		 889 /* If the controller is 82573 and f/w is AMT, do not set
890 * DRV_LOAD until the interface is up. For all other cases,
891 * let the f/w know that the h/w is now under the control
892 * of the driver. */
893 if (adapter->hw.mac_type != e1000_82573 ||
894 !e1000_check_mng_mode(&adapter->hw))
895 e1000_get_hw_control(adapter);
2d7edb92 896
1da177e4 897 strcpy(netdev->name, "eth%d");
96838a40 898 if ((err = register_netdev(netdev)))
1da177e4
LT		 899 goto err_register;
900
901 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
902
903 cards_found++;
904 return 0;
905
906err_register:
907err_sw_init:
908err_eeprom:
909 iounmap(adapter->hw.hw_addr);
910err_ioremap:
911 free_netdev(netdev);
912err_alloc_etherdev:
913 pci_release_regions(pdev);
914 return err;
915}
916
917/**
918 * e1000_remove - Device Removal Routine
919 * @pdev: PCI device information struct
920 *
921 * e1000_remove is called by the PCI subsystem to alert the driver
922 * that it should release a PCI device. The could be caused by a
923 * Hot-Plug event, or because the driver is going to be removed from
924 * memory.
925 **/
926
927static void __devexit
928e1000_remove(struct pci_dev *pdev)
929{
930 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 931 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 932 uint32_t manc;
581d708e
MC		 933#ifdef CONFIG_E1000_NAPI
934 int i;
935#endif
1da177e4 936
be2b28ed
JG		 937 flush_scheduled_work();
938
96838a40 939 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 940 adapter->hw.media_type == e1000_media_type_copper) {
941 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 942 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 943 manc |= E1000_MANC_ARP_EN;
944 E1000_WRITE_REG(&adapter->hw, MANC, manc);
945 }
946 }
947
b55ccb35
JK		 948 /* Release control of h/w to f/w. If f/w is AMT enabled, this
949 * would have already happened in close and is redundant. */
950 e1000_release_hw_control(adapter);
2d7edb92 951
1da177e4 952 unregister_netdev(netdev);
581d708e 953#ifdef CONFIG_E1000_NAPI
f56799ea 954 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 955 dev_put(&adapter->polling_netdev[i]);
581d708e 956#endif
1da177e4 957
96838a40 958 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 959 e1000_phy_hw_reset(&adapter->hw);
1da177e4 960
24025e4e
MC		 961 kfree(adapter->tx_ring);
962 kfree(adapter->rx_ring);
963#ifdef CONFIG_E1000_NAPI
964 kfree(adapter->polling_netdev);
965#endif
966
1da177e4
LT		 967 iounmap(adapter->hw.hw_addr);
968 pci_release_regions(pdev);
969
970 free_netdev(netdev);
971
972 pci_disable_device(pdev);
973}
974
975/**
976 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
977 * @adapter: board private structure to initialize
978 *
979 * e1000_sw_init initializes the Adapter private data structure.
980 * Fields are initialized based on PCI device information and
981 * OS network device settings (MTU size).
982 **/
983
984static int __devinit
985e1000_sw_init(struct e1000_adapter *adapter)
986{
987 struct e1000_hw *hw = &adapter->hw;
988 struct net_device *netdev = adapter->netdev;
989 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 990#ifdef CONFIG_E1000_NAPI
991 int i;
992#endif
1da177e4
LT		 993
994 /* PCI config space info */
995
996 hw->vendor_id = pdev->vendor;
997 hw->device_id = pdev->device;
998 hw->subsystem_vendor_id = pdev->subsystem_vendor;
999 hw->subsystem_id = pdev->subsystem_device;
1000
1001 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1002
1003 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1004
9e2feace
AK		 1005 adapter->rx_buffer_len = MAXIMUM_ETHERNET_FRAME_SIZE;
1006 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1007 hw->max_frame_size = netdev->mtu +
1008 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1009 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1010
1011 /* identify the MAC */
1012
96838a40 1013 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1014 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1015 return -EIO;
1016 }
1017
1018 /* initialize eeprom parameters */
1019
96838a40 1020 if (e1000_init_eeprom_params(hw)) {
2d7edb92
MC		 1021 E1000_ERR("EEPROM initialization failed\n");
1022 return -EIO;
1023 }
1da177e4 1024
96838a40 1025 switch (hw->mac_type) {
1da177e4
LT		 1026 default:
1027 break;
1028 case e1000_82541:
1029 case e1000_82547:
1030 case e1000_82541_rev_2:
1031 case e1000_82547_rev_2:
1032 hw->phy_init_script = 1;
1033 break;
1034 }
1035
1036 e1000_set_media_type(hw);
1037
1038 hw->wait_autoneg_complete = FALSE;
1039 hw->tbi_compatibility_en = TRUE;
1040 hw->adaptive_ifs = TRUE;
1041
1042 /* Copper options */
1043
96838a40 1044 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1045 hw->mdix = AUTO_ALL_MODES;
1046 hw->disable_polarity_correction = FALSE;
1047 hw->master_slave = E1000_MASTER_SLAVE;
1048 }
1049
f56799ea
JK		 1050 adapter->num_tx_queues = 1;
1051 adapter->num_rx_queues = 1;
581d708e
MC		 1052
1053 if (e1000_alloc_queues(adapter)) {
1054 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1055 return -ENOMEM;
1056 }
1057
1058#ifdef CONFIG_E1000_NAPI
f56799ea 1059 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1060 adapter->polling_netdev[i].priv = adapter;
1061 adapter->polling_netdev[i].poll = &e1000_clean;
1062 adapter->polling_netdev[i].weight = 64;
1063 dev_hold(&adapter->polling_netdev[i]);
1064 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1065 }
7bfa4816 1066 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1067#endif
1068
1da177e4
LT		 1069 atomic_set(&adapter->irq_sem, 1);
1070 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1071
1072 return 0;
1073}
1074
581d708e
MC		 1075/**
1076 * e1000_alloc_queues - Allocate memory for all rings
1077 * @adapter: board private structure to initialize
1078 *
1079 * We allocate one ring per queue at run-time since we don't know the
1080 * number of queues at compile-time. The polling_netdev array is
1081 * intended for Multiqueue, but should work fine with a single queue.
1082 **/
1083
1084static int __devinit
1085e1000_alloc_queues(struct e1000_adapter *adapter)
1086{
1087 int size;
1088
f56799ea 1089 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1090 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1091 if (!adapter->tx_ring)
1092 return -ENOMEM;
1093 memset(adapter->tx_ring, 0, size);
1094
f56799ea 1095 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1096 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1097 if (!adapter->rx_ring) {
1098 kfree(adapter->tx_ring);
1099 return -ENOMEM;
1100 }
1101 memset(adapter->rx_ring, 0, size);
1102
1103#ifdef CONFIG_E1000_NAPI
f56799ea 1104 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1105 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1106 if (!adapter->polling_netdev) {
1107 kfree(adapter->tx_ring);
1108 kfree(adapter->rx_ring);
1109 return -ENOMEM;
1110 }
1111 memset(adapter->polling_netdev, 0, size);
1112#endif
1113
1114 return E1000_SUCCESS;
1115}
1116
1da177e4
LT		 1117/**
1118 * e1000_open - Called when a network interface is made active
1119 * @netdev: network interface device structure
1120 *
1121 * Returns 0 on success, negative value on failure
1122 *
1123 * The open entry point is called when a network interface is made
1124 * active by the system (IFF_UP). At this point all resources needed
1125 * for transmit and receive operations are allocated, the interrupt
1126 * handler is registered with the OS, the watchdog timer is started,
1127 * and the stack is notified that the interface is ready.
1128 **/
1129
1130static int
1131e1000_open(struct net_device *netdev)
1132{
60490fe0 1133 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1134 int err;
1135
2db10a08
AK		 1136 /* disallow open during test */
1137 if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
1138 return -EBUSY;
1139
1da177e4
LT		 1140 /* allocate transmit descriptors */
1141
581d708e 1142 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1143 goto err_setup_tx;
1144
1145 /* allocate receive descriptors */
1146
581d708e 1147 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1148 goto err_setup_rx;
1149
2db10a08
AK		 1150 err = e1000_request_irq(adapter);
1151 if (err)
1152 goto err_up;
1153
79f05bf0
AK		 1154 e1000_power_up_phy(adapter);
1155
96838a40 1156 if ((err = e1000_up(adapter)))
1da177e4 1157 goto err_up;
2d7edb92 1158 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1159 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1160 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1161 e1000_update_mng_vlan(adapter);
1162 }
1da177e4 1163
b55ccb35
JK		 1164 /* If AMT is enabled, let the firmware know that the network
1165 * interface is now open */
1166 if (adapter->hw.mac_type == e1000_82573 &&
1167 e1000_check_mng_mode(&adapter->hw))
1168 e1000_get_hw_control(adapter);
1169
1da177e4
LT		 1170 return E1000_SUCCESS;
1171
1172err_up:
581d708e 1173 e1000_free_all_rx_resources(adapter);
1da177e4 1174err_setup_rx:
581d708e 1175 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1176err_setup_tx:
1177 e1000_reset(adapter);
1178
1179 return err;
1180}
1181
1182/**
1183 * e1000_close - Disables a network interface
1184 * @netdev: network interface device structure
1185 *
1186 * Returns 0, this is not allowed to fail
1187 *
1188 * The close entry point is called when an interface is de-activated
1189 * by the OS. The hardware is still under the drivers control, but
1190 * needs to be disabled. A global MAC reset is issued to stop the
1191 * hardware, and all transmit and receive resources are freed.
1192 **/
1193
1194static int
1195e1000_close(struct net_device *netdev)
1196{
60490fe0 1197 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1198
2db10a08 1199 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1200 e1000_down(adapter);
79f05bf0 1201 e1000_power_down_phy(adapter);
2db10a08 1202 e1000_free_irq(adapter);
1da177e4 1203
581d708e
MC		 1204 e1000_free_all_tx_resources(adapter);
1205 e1000_free_all_rx_resources(adapter);
1da177e4 1206
96838a40 1207 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1208 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1209 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1210 }
b55ccb35
JK		 1211
1212 /* If AMT is enabled, let the firmware know that the network
1213 * interface is now closed */
1214 if (adapter->hw.mac_type == e1000_82573 &&
1215 e1000_check_mng_mode(&adapter->hw))
1216 e1000_release_hw_control(adapter);
1217
1da177e4
LT		 1218 return 0;
1219}
1220
1221/**
1222 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1223 * @adapter: address of board private structure
2d7edb92
MC		 1224 * @start: address of beginning of memory
1225 * @len: length of memory
1da177e4 1226 **/
e619d523 1227static boolean_t
1da177e4
LT		 1228e1000_check_64k_bound(struct e1000_adapter *adapter,
1229 void *start, unsigned long len)
1230{
1231 unsigned long begin = (unsigned long) start;
1232 unsigned long end = begin + len;
1233
2648345f
MC		 1234 /* First rev 82545 and 82546 need to not allow any memory
1235 * write location to cross 64k boundary due to errata 23 */
1da177e4 1236 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1237 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1238 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1239 }
1240
1241 return TRUE;
1242}
1243
1244/**
1245 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1246 * @adapter: board private structure
581d708e 1247 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1248 *
1249 * Return 0 on success, negative on failure
1250 **/
1251
3ad2cc67 1252static int
581d708e
MC		 1253e1000_setup_tx_resources(struct e1000_adapter *adapter,
1254 struct e1000_tx_ring *txdr)
1da177e4 1255{
1da177e4
LT		 1256 struct pci_dev *pdev = adapter->pdev;
1257 int size;
1258
1259 size = sizeof(struct e1000_buffer) * txdr->count;
a7ec15da
RT		 1260
1261 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
96838a40 1262 if (!txdr->buffer_info) {
2648345f
MC		 1263 DPRINTK(PROBE, ERR,
1264 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1265 return -ENOMEM;
1266 }
1267 memset(txdr->buffer_info, 0, size);
1268
1269 /* round up to nearest 4K */
1270
1271 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1272 E1000_ROUNDUP(txdr->size, 4096);
1273
1274 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1275 if (!txdr->desc) {
1da177e4 1276setup_tx_desc_die:
1da177e4 1277 vfree(txdr->buffer_info);
2648345f
MC		 1278 DPRINTK(PROBE, ERR,
1279 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1280 return -ENOMEM;
1281 }
1282
2648345f 1283 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1284 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1285 void *olddesc = txdr->desc;
1286 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1287 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1288 "at %p\n", txdr->size, txdr->desc);
1289 /* Try again, without freeing the previous */
1da177e4 1290 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1291 /* Failed allocation, critical failure */
96838a40 1292 if (!txdr->desc) {
1da177e4
LT		 1293 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1294 goto setup_tx_desc_die;
1295 }
1296
1297 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1298 /* give up */
2648345f
MC		 1299 pci_free_consistent(pdev, txdr->size, txdr->desc,
1300 txdr->dma);
1da177e4
LT		 1301 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1302 DPRINTK(PROBE, ERR,
2648345f
MC		 1303 "Unable to allocate aligned memory "
1304 "for the transmit descriptor ring\n");
1da177e4
LT		 1305 vfree(txdr->buffer_info);
1306 return -ENOMEM;
1307 } else {
2648345f 1308 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1309 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1310 }
1311 }
1312 memset(txdr->desc, 0, txdr->size);
1313
1314 txdr->next_to_use = 0;
1315 txdr->next_to_clean = 0;
2ae76d98 1316 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1317
1318 return 0;
1319}
1320
581d708e
MC		 1321/**
1322 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1323 * (Descriptors) for all queues
1324 * @adapter: board private structure
1325 *
1326 * If this function returns with an error, then it's possible one or
1327 * more of the rings is populated (while the rest are not). It is the
1328 * callers duty to clean those orphaned rings.
1329 *
1330 * Return 0 on success, negative on failure
1331 **/
1332
1333int
1334e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1335{
1336 int i, err = 0;
1337
f56799ea 1338 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1339 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1340 if (err) {
1341 DPRINTK(PROBE, ERR,
1342 "Allocation for Tx Queue %u failed\n", i);
1343 break;
1344 }
1345 }
1346
1347 return err;
1348}
1349
1da177e4
LT		 1350/**
1351 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1352 * @adapter: board private structure
1353 *
1354 * Configure the Tx unit of the MAC after a reset.
1355 **/
1356
1357static void
1358e1000_configure_tx(struct e1000_adapter *adapter)
1359{
581d708e
MC		 1360 uint64_t tdba;
1361 struct e1000_hw *hw = &adapter->hw;
1362 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1363 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1364
1365 /* Setup the HW Tx Head and Tail descriptor pointers */
1366
f56799ea 1367 switch (adapter->num_tx_queues) {
24025e4e
MC		 1368 case 1:
1369 default:
581d708e
MC		 1370 tdba = adapter->tx_ring[0].dma;
1371 tdlen = adapter->tx_ring[0].count *
1372 sizeof(struct e1000_tx_desc);
1373 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1374 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1375 E1000_WRITE_REG(hw, TDLEN, tdlen);
1376 E1000_WRITE_REG(hw, TDH, 0);
1377 E1000_WRITE_REG(hw, TDT, 0);
1378 adapter->tx_ring[0].tdh = E1000_TDH;
1379 adapter->tx_ring[0].tdt = E1000_TDT;
24025e4e
MC		 1380 break;
1381 }
1da177e4
LT		 1382
1383 /* Set the default values for the Tx Inter Packet Gap timer */
1384
0fadb059
JK		 1385 if (hw->media_type == e1000_media_type_fiber ||
1386 hw->media_type == e1000_media_type_internal_serdes)
1387 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1388 else
1389 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1390
581d708e 1391 switch (hw->mac_type) {
1da177e4
LT		 1392 case e1000_82542_rev2_0:
1393 case e1000_82542_rev2_1:
1394 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1395 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1396 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1397 break;
87041639
JK		 1398 case e1000_80003es2lan:
1399 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1400 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1401 break;
1da177e4 1402 default:
0fadb059
JK		 1403 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1404 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1405 break;
1da177e4 1406 }
0fadb059
JK		 1407 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1408 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1409 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1410
1411 /* Set the Tx Interrupt Delay register */
1412
581d708e
MC		 1413 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1414 if (hw->mac_type >= e1000_82540)
1415 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1416
1417 /* Program the Transmit Control Register */
1418
581d708e 1419 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1420
1421 tctl &= ~E1000_TCTL_CT;
7e6c9861 1422 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1423 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1424
7e6c9861
JK		 1425#ifdef DISABLE_MULR
1426 /* disable Multiple Reads for debugging */
1427 tctl &= ~E1000_TCTL_MULR;
1428#endif
1da177e4 1429
2ae76d98
MC		 1430 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1431 tarc = E1000_READ_REG(hw, TARC0);
1432 tarc |= ((1 << 25) | (1 << 21));
1433 E1000_WRITE_REG(hw, TARC0, tarc);
1434 tarc = E1000_READ_REG(hw, TARC1);
1435 tarc |= (1 << 25);
1436 if (tctl & E1000_TCTL_MULR)
1437 tarc &= ~(1 << 28);
1438 else
1439 tarc |= (1 << 28);
1440 E1000_WRITE_REG(hw, TARC1, tarc);
87041639
JK		 1441 } else if (hw->mac_type == e1000_80003es2lan) {
1442 tarc = E1000_READ_REG(hw, TARC0);
1443 tarc |= 1;
1444 if (hw->media_type == e1000_media_type_internal_serdes)
1445 tarc |= (1 << 20);
1446 E1000_WRITE_REG(hw, TARC0, tarc);
1447 tarc = E1000_READ_REG(hw, TARC1);
1448 tarc |= 1;
1449 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1450 }
1451
581d708e 1452 e1000_config_collision_dist(hw);
1da177e4
LT		 1453
1454 /* Setup Transmit Descriptor Settings for eop descriptor */
1455 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1456 E1000_TXD_CMD_IFCS;
1457
581d708e 1458 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1459 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1460 else
1461 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1462
1463 /* Cache if we're 82544 running in PCI-X because we'll
1464 * need this to apply a workaround later in the send path. */
581d708e
MC		 1465 if (hw->mac_type == e1000_82544 &&
1466 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1467 adapter->pcix_82544 = 1;
7e6c9861
JK		 1468
1469 E1000_WRITE_REG(hw, TCTL, tctl);
1470
1da177e4
LT		 1471}
1472
1473/**
1474 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1475 * @adapter: board private structure
581d708e 1476 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1477 *
1478 * Returns 0 on success, negative on failure
1479 **/
1480
3ad2cc67 1481static int
581d708e
MC		 1482e1000_setup_rx_resources(struct e1000_adapter *adapter,
1483 struct e1000_rx_ring *rxdr)
1da177e4 1484{
1da177e4 1485 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1486 int size, desc_len;
1da177e4
LT		 1487
1488 size = sizeof(struct e1000_buffer) * rxdr->count;
a7ec15da 1489 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
581d708e 1490 if (!rxdr->buffer_info) {
2648345f
MC		 1491 DPRINTK(PROBE, ERR,
1492 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1493 return -ENOMEM;
1494 }
1495 memset(rxdr->buffer_info, 0, size);
1496
2d7edb92
MC		 1497 size = sizeof(struct e1000_ps_page) * rxdr->count;
1498 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1499 if (!rxdr->ps_page) {
2d7edb92
MC		 1500 vfree(rxdr->buffer_info);
1501 DPRINTK(PROBE, ERR,
1502 "Unable to allocate memory for the receive descriptor ring\n");
1503 return -ENOMEM;
1504 }
1505 memset(rxdr->ps_page, 0, size);
1506
1507 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1508 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1509 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1510 vfree(rxdr->buffer_info);
1511 kfree(rxdr->ps_page);
1512 DPRINTK(PROBE, ERR,
1513 "Unable to allocate memory for the receive descriptor ring\n");
1514 return -ENOMEM;
1515 }
1516 memset(rxdr->ps_page_dma, 0, size);
1517
96838a40 1518 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1519 desc_len = sizeof(struct e1000_rx_desc);
1520 else
1521 desc_len = sizeof(union e1000_rx_desc_packet_split);
1522
1da177e4
LT		 1523 /* Round up to nearest 4K */
1524
2d7edb92 1525 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1526 E1000_ROUNDUP(rxdr->size, 4096);
1527
1528 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1529
581d708e
MC		 1530 if (!rxdr->desc) {
1531 DPRINTK(PROBE, ERR,
1532 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1533setup_rx_desc_die:
1da177e4 1534 vfree(rxdr->buffer_info);
2d7edb92
MC		 1535 kfree(rxdr->ps_page);
1536 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1537 return -ENOMEM;
1538 }
1539
2648345f 1540 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1541 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1542 void *olddesc = rxdr->desc;
1543 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1544 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1545 "at %p\n", rxdr->size, rxdr->desc);
1546 /* Try again, without freeing the previous */
1da177e4 1547 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1548 /* Failed allocation, critical failure */
581d708e 1549 if (!rxdr->desc) {
1da177e4 1550 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1551 DPRINTK(PROBE, ERR,
1552 "Unable to allocate memory "
1553 "for the receive descriptor ring\n");
1da177e4
LT		 1554 goto setup_rx_desc_die;
1555 }
1556
1557 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1558 /* give up */
2648345f
MC		 1559 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1560 rxdr->dma);
1da177e4 1561 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1562 DPRINTK(PROBE, ERR,
1563 "Unable to allocate aligned memory "
1564 "for the receive descriptor ring\n");
581d708e 1565 goto setup_rx_desc_die;
1da177e4 1566 } else {
2648345f 1567 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1568 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1569 }
1570 }
1571 memset(rxdr->desc, 0, rxdr->size);
1572
1573 rxdr->next_to_clean = 0;
1574 rxdr->next_to_use = 0;
1575
1576 return 0;
1577}
1578
581d708e
MC		 1579/**
1580 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1581 * (Descriptors) for all queues
1582 * @adapter: board private structure
1583 *
1584 * If this function returns with an error, then it's possible one or
1585 * more of the rings is populated (while the rest are not). It is the
1586 * callers duty to clean those orphaned rings.
1587 *
1588 * Return 0 on success, negative on failure
1589 **/
1590
1591int
1592e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1593{
1594 int i, err = 0;
1595
f56799ea 1596 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1597 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1598 if (err) {
1599 DPRINTK(PROBE, ERR,
1600 "Allocation for Rx Queue %u failed\n", i);
1601 break;
1602 }
1603 }
1604
1605 return err;
1606}
1607
1da177e4 1608/**
2648345f 1609 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1610 * @adapter: Board private structure
1611 **/
e4c811c9
MC		 1612#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1613 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1614static void
1615e1000_setup_rctl(struct e1000_adapter *adapter)
1616{
2d7edb92
MC		 1617 uint32_t rctl, rfctl;
1618 uint32_t psrctl = 0;
35ec56bb 1619#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1620 uint32_t pages = 0;
1621#endif
1da177e4
LT		 1622
1623 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1624
1625 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1626
1627 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1628 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1629 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1630
0fadb059
JK		 1631 if (adapter->hw.mac_type > e1000_82543)
1632 rctl |= E1000_RCTL_SECRC;
1633
1634 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1635 rctl |= E1000_RCTL_SBP;
1636 else
1637 rctl &= ~E1000_RCTL_SBP;
1638
2d7edb92
MC		 1639 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1640 rctl &= ~E1000_RCTL_LPE;
1641 else
1642 rctl |= E1000_RCTL_LPE;
1643
1da177e4 1644 /* Setup buffer sizes */
9e2feace
AK		 1645 rctl &= ~E1000_RCTL_SZ_4096;
1646 rctl |= E1000_RCTL_BSEX;
1647 switch (adapter->rx_buffer_len) {
1648 case E1000_RXBUFFER_256:
1649 rctl |= E1000_RCTL_SZ_256;
1650 rctl &= ~E1000_RCTL_BSEX;
1651 break;
1652 case E1000_RXBUFFER_512:
1653 rctl |= E1000_RCTL_SZ_512;
1654 rctl &= ~E1000_RCTL_BSEX;
1655 break;
1656 case E1000_RXBUFFER_1024:
1657 rctl |= E1000_RCTL_SZ_1024;
1658 rctl &= ~E1000_RCTL_BSEX;
1659 break;
a1415ee6
JK		 1660 case E1000_RXBUFFER_2048:
1661 default:
1662 rctl |= E1000_RCTL_SZ_2048;
1663 rctl &= ~E1000_RCTL_BSEX;
1664 break;
1665 case E1000_RXBUFFER_4096:
1666 rctl |= E1000_RCTL_SZ_4096;
1667 break;
1668 case E1000_RXBUFFER_8192:
1669 rctl |= E1000_RCTL_SZ_8192;
1670 break;
1671 case E1000_RXBUFFER_16384:
1672 rctl |= E1000_RCTL_SZ_16384;
1673 break;
2d7edb92
MC		 1674 }
1675
35ec56bb 1676#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1677 /* 82571 and greater support packet-split where the protocol
1678 * header is placed in skb->data and the packet data is
1679 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1680 * In the case of a non-split, skb->data is linearly filled,
1681 * followed by the page buffers. Therefore, skb->data is
1682 * sized to hold the largest protocol header.
1683 */
e4c811c9
MC		 1684 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1685 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1686 PAGE_SIZE <= 16384)
1687 adapter->rx_ps_pages = pages;
1688 else
1689 adapter->rx_ps_pages = 0;
2d7edb92 1690#endif
e4c811c9 1691 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1692 /* Configure extra packet-split registers */
1693 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1694 rfctl |= E1000_RFCTL_EXTEN;
1695 /* disable IPv6 packet split support */
1696 rfctl |= E1000_RFCTL_IPV6_DIS;
1697 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1698
1699 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
96838a40 1700
2d7edb92
MC		 1701 psrctl |= adapter->rx_ps_bsize0 >>
1702 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1703
1704 switch (adapter->rx_ps_pages) {
1705 case 3:
1706 psrctl |= PAGE_SIZE <<
1707 E1000_PSRCTL_BSIZE3_SHIFT;
1708 case 2:
1709 psrctl |= PAGE_SIZE <<
1710 E1000_PSRCTL_BSIZE2_SHIFT;
1711 case 1:
1712 psrctl |= PAGE_SIZE >>
1713 E1000_PSRCTL_BSIZE1_SHIFT;
1714 break;
1715 }
2d7edb92
MC		 1716
1717 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1718 }
1719
1720 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1721}
1722
1723/**
1724 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1725 * @adapter: board private structure
1726 *
1727 * Configure the Rx unit of the MAC after a reset.
1728 **/
1729
1730static void
1731e1000_configure_rx(struct e1000_adapter *adapter)
1732{
581d708e
MC		 1733 uint64_t rdba;
1734 struct e1000_hw *hw = &adapter->hw;
1735 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1736
e4c811c9 1737 if (adapter->rx_ps_pages) {
0f15a8fa 1738 /* this is a 32 byte descriptor */
581d708e 1739 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1740 sizeof(union e1000_rx_desc_packet_split);
1741 adapter->clean_rx = e1000_clean_rx_irq_ps;
1742 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1743 } else {
581d708e
MC		 1744 rdlen = adapter->rx_ring[0].count *
1745 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1746 adapter->clean_rx = e1000_clean_rx_irq;
1747 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1748 }
1da177e4
LT		 1749
1750 /* disable receives while setting up the descriptors */
581d708e
MC		 1751 rctl = E1000_READ_REG(hw, RCTL);
1752 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1753
1754 /* set the Receive Delay Timer Register */
581d708e 1755 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1756
581d708e
MC		 1757 if (hw->mac_type >= e1000_82540) {
1758 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1759 if (adapter->itr > 1)
581d708e 1760 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1761 1000000000 / (adapter->itr * 256));
1762 }
1763
2ae76d98 1764 if (hw->mac_type >= e1000_82571) {
2ae76d98 1765 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1766 /* Reset delay timers after every interrupt */
6fc7a7ec 1767 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9
JK		 1768#ifdef CONFIG_E1000_NAPI
1769 /* Auto-Mask interrupts upon ICR read. */
1770 ctrl_ext |= E1000_CTRL_EXT_IAME;
1771#endif
2ae76d98 1772 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1773 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1774 E1000_WRITE_FLUSH(hw);
1775 }
1776
581d708e
MC		 1777 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1778 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1779 switch (adapter->num_rx_queues) {
24025e4e
MC		 1780 case 1:
1781 default:
581d708e
MC		 1782 rdba = adapter->rx_ring[0].dma;
1783 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1784 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1785 E1000_WRITE_REG(hw, RDLEN, rdlen);
1786 E1000_WRITE_REG(hw, RDH, 0);
1787 E1000_WRITE_REG(hw, RDT, 0);
1788 adapter->rx_ring[0].rdh = E1000_RDH;
1789 adapter->rx_ring[0].rdt = E1000_RDT;
1790 break;
24025e4e
MC		 1791 }
1792
1da177e4 1793 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1794 if (hw->mac_type >= e1000_82543) {
1795 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1796 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1797 rxcsum |= E1000_RXCSUM_TUOFL;
1798
868d5309 1799 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1800 * Must be used in conjunction with packet-split. */
96838a40
JB		 1801 if ((hw->mac_type >= e1000_82571) &&
1802 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1803 rxcsum |= E1000_RXCSUM_IPPCSE;
1804 }
1805 } else {
1806 rxcsum &= ~E1000_RXCSUM_TUOFL;
1807 /* don't need to clear IPPCSE as it defaults to 0 */
1808 }
581d708e 1809 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1810 }
1811
581d708e
MC		 1812 if (hw->mac_type == e1000_82573)
1813 E1000_WRITE_REG(hw, ERT, 0x0100);
2d7edb92 1814
1da177e4 1815 /* Enable Receives */
581d708e 1816 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1817}
1818
1819/**
581d708e 1820 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1821 * @adapter: board private structure
581d708e 1822 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1823 *
1824 * Free all transmit software resources
1825 **/
1826
3ad2cc67 1827static void
581d708e
MC		 1828e1000_free_tx_resources(struct e1000_adapter *adapter,
1829 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1830{
1831 struct pci_dev *pdev = adapter->pdev;
1832
581d708e 1833 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1834
581d708e
MC		 1835 vfree(tx_ring->buffer_info);
1836 tx_ring->buffer_info = NULL;
1da177e4 1837
581d708e 1838 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1839
581d708e
MC		 1840 tx_ring->desc = NULL;
1841}
1842
1843/**
1844 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1845 * @adapter: board private structure
1846 *
1847 * Free all transmit software resources
1848 **/
1849
1850void
1851e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1852{
1853 int i;
1854
f56799ea 1855 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1856 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1857}
1858
e619d523 1859static void
1da177e4
LT		 1860e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1861 struct e1000_buffer *buffer_info)
1862{
96838a40 1863 if (buffer_info->dma) {
2648345f
MC		 1864 pci_unmap_page(adapter->pdev,
1865 buffer_info->dma,
1866 buffer_info->length,
1867 PCI_DMA_TODEVICE);
1da177e4 1868 }
8241e35e 1869 if (buffer_info->skb)
1da177e4 1870 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1871 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1872}
1873
1874/**
1875 * e1000_clean_tx_ring - Free Tx Buffers
1876 * @adapter: board private structure
581d708e 1877 * @tx_ring: ring to be cleaned
1da177e4
LT		 1878 **/
1879
1880static void
581d708e
MC		 1881e1000_clean_tx_ring(struct e1000_adapter *adapter,
1882 struct e1000_tx_ring *tx_ring)
1da177e4 1883{
1da177e4
LT		 1884 struct e1000_buffer *buffer_info;
1885 unsigned long size;
1886 unsigned int i;
1887
1888 /* Free all the Tx ring sk_buffs */
1889
96838a40 1890 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1891 buffer_info = &tx_ring->buffer_info[i];
1892 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1893 }
1894
1895 size = sizeof(struct e1000_buffer) * tx_ring->count;
1896 memset(tx_ring->buffer_info, 0, size);
1897
1898 /* Zero out the descriptor ring */
1899
1900 memset(tx_ring->desc, 0, tx_ring->size);
1901
1902 tx_ring->next_to_use = 0;
1903 tx_ring->next_to_clean = 0;
fd803241 1904 tx_ring->last_tx_tso = 0;
1da177e4 1905
581d708e
MC		 1906 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1907 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1908}
1909
1910/**
1911 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1912 * @adapter: board private structure
1913 **/
1914
1915static void
1916e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1917{
1918 int i;
1919
f56799ea 1920 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1921 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1922}
1923
1924/**
1925 * e1000_free_rx_resources - Free Rx Resources
1926 * @adapter: board private structure
581d708e 1927 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1928 *
1929 * Free all receive software resources
1930 **/
1931
3ad2cc67 1932static void
581d708e
MC		 1933e1000_free_rx_resources(struct e1000_adapter *adapter,
1934 struct e1000_rx_ring *rx_ring)
1da177e4 1935{
1da177e4
LT		 1936 struct pci_dev *pdev = adapter->pdev;
1937
581d708e 1938 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1939
1940 vfree(rx_ring->buffer_info);
1941 rx_ring->buffer_info = NULL;
2d7edb92
MC		 1942 kfree(rx_ring->ps_page);
1943 rx_ring->ps_page = NULL;
1944 kfree(rx_ring->ps_page_dma);
1945 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 1946
1947 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1948
1949 rx_ring->desc = NULL;
1950}
1951
1952/**
581d708e 1953 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1954 * @adapter: board private structure
581d708e
MC		 1955 *
1956 * Free all receive software resources
1957 **/
1958
1959void
1960e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1961{
1962 int i;
1963
f56799ea 1964 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 1965 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1966}
1967
1968/**
1969 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1970 * @adapter: board private structure
1971 * @rx_ring: ring to free buffers from
1da177e4
LT		 1972 **/
1973
1974static void
581d708e
MC		 1975e1000_clean_rx_ring(struct e1000_adapter *adapter,
1976 struct e1000_rx_ring *rx_ring)
1da177e4 1977{
1da177e4 1978 struct e1000_buffer *buffer_info;
2d7edb92
MC		 1979 struct e1000_ps_page *ps_page;
1980 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 1981 struct pci_dev *pdev = adapter->pdev;
1982 unsigned long size;
2d7edb92 1983 unsigned int i, j;
1da177e4
LT		 1984
1985 /* Free all the Rx ring sk_buffs */
96838a40 1986 for (i = 0; i < rx_ring->count; i++) {
1da177e4 1987 buffer_info = &rx_ring->buffer_info[i];
96838a40 1988 if (buffer_info->skb) {
1da177e4
LT		 1989 pci_unmap_single(pdev,
1990 buffer_info->dma,
1991 buffer_info->length,
1992 PCI_DMA_FROMDEVICE);
1993
1994 dev_kfree_skb(buffer_info->skb);
1995 buffer_info->skb = NULL;
997f5cbd
JK		 1996 }
1997 ps_page = &rx_ring->ps_page[i];
1998 ps_page_dma = &rx_ring->ps_page_dma[i];
1999 for (j = 0; j < adapter->rx_ps_pages; j++) {
2000 if (!ps_page->ps_page[j]) break;
2001 pci_unmap_page(pdev,
2002 ps_page_dma->ps_page_dma[j],
2003 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2004 ps_page_dma->ps_page_dma[j] = 0;
2005 put_page(ps_page->ps_page[j]);
2006 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2007 }
2008 }
2009
2010 size = sizeof(struct e1000_buffer) * rx_ring->count;
2011 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2012 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2013 memset(rx_ring->ps_page, 0, size);
2014 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2015 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2016
2017 /* Zero out the descriptor ring */
2018
2019 memset(rx_ring->desc, 0, rx_ring->size);
2020
2021 rx_ring->next_to_clean = 0;
2022 rx_ring->next_to_use = 0;
2023
581d708e
MC		 2024 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2025 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2026}
2027
2028/**
2029 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2030 * @adapter: board private structure
2031 **/
2032
2033static void
2034e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2035{
2036 int i;
2037
f56799ea 2038 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2039 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2040}
2041
2042/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2043 * and memory write and invalidate disabled for certain operations
2044 */
2045static void
2046e1000_enter_82542_rst(struct e1000_adapter *adapter)
2047{
2048 struct net_device *netdev = adapter->netdev;
2049 uint32_t rctl;
2050
2051 e1000_pci_clear_mwi(&adapter->hw);
2052
2053 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2054 rctl |= E1000_RCTL_RST;
2055 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2056 E1000_WRITE_FLUSH(&adapter->hw);
2057 mdelay(5);
2058
96838a40 2059 if (netif_running(netdev))
581d708e 2060 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2061}
2062
2063static void
2064e1000_leave_82542_rst(struct e1000_adapter *adapter)
2065{
2066 struct net_device *netdev = adapter->netdev;
2067 uint32_t rctl;
2068
2069 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2070 rctl &= ~E1000_RCTL_RST;
2071 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2072 E1000_WRITE_FLUSH(&adapter->hw);
2073 mdelay(5);
2074
96838a40 2075 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2076 e1000_pci_set_mwi(&adapter->hw);
2077
96838a40 2078 if (netif_running(netdev)) {
72d64a43
JK		 2079 /* No need to loop, because 82542 supports only 1 queue */
2080 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2081 e1000_configure_rx(adapter);
72d64a43 2082 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2083 }
2084}
2085
2086/**
2087 * e1000_set_mac - Change the Ethernet Address of the NIC
2088 * @netdev: network interface device structure
2089 * @p: pointer to an address structure
2090 *
2091 * Returns 0 on success, negative on failure
2092 **/
2093
2094static int
2095e1000_set_mac(struct net_device *netdev, void *p)
2096{
60490fe0 2097 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2098 struct sockaddr *addr = p;
2099
96838a40 2100 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2101 return -EADDRNOTAVAIL;
2102
2103 /* 82542 2.0 needs to be in reset to write receive address registers */
2104
96838a40 2105 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2106 e1000_enter_82542_rst(adapter);
2107
2108 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2109 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2110
2111 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2112
868d5309
MC		 2113 /* With 82571 controllers, LAA may be overwritten (with the default)
2114 * due to controller reset from the other port. */
2115 if (adapter->hw.mac_type == e1000_82571) {
2116 /* activate the work around */
2117 adapter->hw.laa_is_present = 1;
2118
96838a40
JB		 2119 /* Hold a copy of the LAA in RAR[14] This is done so that
2120 * between the time RAR[0] gets clobbered and the time it
2121 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2122 * of the RARs and no incoming packets directed to this port
96838a40 2123 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2124 * RAR[14] */
96838a40 2125 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2126 E1000_RAR_ENTRIES - 1);
2127 }
2128
96838a40 2129 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2130 e1000_leave_82542_rst(adapter);
2131
2132 return 0;
2133}
2134
2135/**
2136 * e1000_set_multi - Multicast and Promiscuous mode set
2137 * @netdev: network interface device structure
2138 *
2139 * The set_multi entry point is called whenever the multicast address
2140 * list or the network interface flags are updated. This routine is
2141 * responsible for configuring the hardware for proper multicast,
2142 * promiscuous mode, and all-multi behavior.
2143 **/
2144
2145static void
2146e1000_set_multi(struct net_device *netdev)
2147{
60490fe0 2148 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2149 struct e1000_hw *hw = &adapter->hw;
2150 struct dev_mc_list *mc_ptr;
2151 uint32_t rctl;
2152 uint32_t hash_value;
868d5309 2153 int i, rar_entries = E1000_RAR_ENTRIES;
1da177e4 2154
868d5309
MC		 2155 /* reserve RAR[14] for LAA over-write work-around */
2156 if (adapter->hw.mac_type == e1000_82571)
2157 rar_entries--;
1da177e4 2158
2648345f
MC		 2159 /* Check for Promiscuous and All Multicast modes */
2160
1da177e4
LT		 2161 rctl = E1000_READ_REG(hw, RCTL);
2162
96838a40 2163 if (netdev->flags & IFF_PROMISC) {
1da177e4 2164 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2165 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2166 rctl |= E1000_RCTL_MPE;
2167 rctl &= ~E1000_RCTL_UPE;
2168 } else {
2169 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2170 }
2171
2172 E1000_WRITE_REG(hw, RCTL, rctl);
2173
2174 /* 82542 2.0 needs to be in reset to write receive address registers */
2175
96838a40 2176 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2177 e1000_enter_82542_rst(adapter);
2178
2179 /* load the first 14 multicast address into the exact filters 1-14
2180 * RAR 0 is used for the station MAC adddress
2181 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2182 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2183 */
2184 mc_ptr = netdev->mc_list;
2185
96838a40 2186 for (i = 1; i < rar_entries; i++) {
868d5309 2187 if (mc_ptr) {
1da177e4
LT		 2188 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2189 mc_ptr = mc_ptr->next;
2190 } else {
2191 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2192 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2193 }
2194 }
2195
2196 /* clear the old settings from the multicast hash table */
2197
96838a40 2198 for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
1da177e4
LT		 2199 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2200
2201 /* load any remaining addresses into the hash table */
2202
96838a40 2203 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2204 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2205 e1000_mta_set(hw, hash_value);
2206 }
2207
96838a40 2208 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2209 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2210}
2211
2212/* Need to wait a few seconds after link up to get diagnostic information from
2213 * the phy */
2214
2215static void
2216e1000_update_phy_info(unsigned long data)
2217{
2218 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2219 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2220}
2221
2222/**
2223 * e1000_82547_tx_fifo_stall - Timer Call-back
2224 * @data: pointer to adapter cast into an unsigned long
2225 **/
2226
2227static void
2228e1000_82547_tx_fifo_stall(unsigned long data)
2229{
2230 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2231 struct net_device *netdev = adapter->netdev;
2232 uint32_t tctl;
2233
96838a40
JB		 2234 if (atomic_read(&adapter->tx_fifo_stall)) {
2235 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2236 E1000_READ_REG(&adapter->hw, TDH)) &&
2237 (E1000_READ_REG(&adapter->hw, TDFT) ==
2238 E1000_READ_REG(&adapter->hw, TDFH)) &&
2239 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2240 E1000_READ_REG(&adapter->hw, TDFHS))) {
2241 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2242 E1000_WRITE_REG(&adapter->hw, TCTL,
2243 tctl & ~E1000_TCTL_EN);
2244 E1000_WRITE_REG(&adapter->hw, TDFT,
2245 adapter->tx_head_addr);
2246 E1000_WRITE_REG(&adapter->hw, TDFH,
2247 adapter->tx_head_addr);
2248 E1000_WRITE_REG(&adapter->hw, TDFTS,
2249 adapter->tx_head_addr);
2250 E1000_WRITE_REG(&adapter->hw, TDFHS,
2251 adapter->tx_head_addr);
2252 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2253 E1000_WRITE_FLUSH(&adapter->hw);
2254
2255 adapter->tx_fifo_head = 0;
2256 atomic_set(&adapter->tx_fifo_stall, 0);
2257 netif_wake_queue(netdev);
2258 } else {
2259 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2260 }
2261 }
2262}
2263
2264/**
2265 * e1000_watchdog - Timer Call-back
2266 * @data: pointer to adapter cast into an unsigned long
2267 **/
2268static void
2269e1000_watchdog(unsigned long data)
2270{
2271 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2272 struct net_device *netdev = adapter->netdev;
545c67c0 2273 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2274 uint32_t link, tctl;
1da177e4
LT		 2275
2276 e1000_check_for_link(&adapter->hw);
2d7edb92
MC		 2277 if (adapter->hw.mac_type == e1000_82573) {
2278 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2279 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2280 e1000_update_mng_vlan(adapter);
96838a40 2281 }
1da177e4 2282
96838a40 2283 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2284 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2285 link = !adapter->hw.serdes_link_down;
2286 else
2287 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2288
96838a40
JB		 2289 if (link) {
2290 if (!netif_carrier_ok(netdev)) {
fe7fe28e 2291 boolean_t txb2b = 1;
1da177e4
LT		 2292 e1000_get_speed_and_duplex(&adapter->hw,
2293 &adapter->link_speed,
2294 &adapter->link_duplex);
2295
2296 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2297 adapter->link_speed,
2298 adapter->link_duplex == FULL_DUPLEX ?
2299 "Full Duplex" : "Half Duplex");
2300
7e6c9861
JK		 2301 /* tweak tx_queue_len according to speed/duplex
2302 * and adjust the timeout factor */
66a2b0a3
JK		 2303 netdev->tx_queue_len = adapter->tx_queue_len;
2304 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2305 switch (adapter->link_speed) {
2306 case SPEED_10:
fe7fe28e 2307 txb2b = 0;
7e6c9861
JK		 2308 netdev->tx_queue_len = 10;
2309 adapter->tx_timeout_factor = 8;
2310 break;
2311 case SPEED_100:
fe7fe28e 2312 txb2b = 0;
7e6c9861
JK		 2313 netdev->tx_queue_len = 100;
2314 /* maybe add some timeout factor ? */
2315 break;
2316 }
2317
fe7fe28e 2318 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2319 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2320 txb2b == 0) {
7e6c9861
JK		 2321#define SPEED_MODE_BIT (1 << 21)
2322 uint32_t tarc0;
2323 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2324 tarc0 &= ~SPEED_MODE_BIT;
2325 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2326 }
2327
2328#ifdef NETIF_F_TSO
2329 /* disable TSO for pcie and 10/100 speeds, to avoid
2330 * some hardware issues */
2331 if (!adapter->tso_force &&
2332 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2333 switch (adapter->link_speed) {
2334 case SPEED_10:
66a2b0a3 2335 case SPEED_100:
7e6c9861
JK		 2336 DPRINTK(PROBE,INFO,
2337 "10/100 speed: disabling TSO\n");
2338 netdev->features &= ~NETIF_F_TSO;
2339 break;
2340 case SPEED_1000:
2341 netdev->features |= NETIF_F_TSO;
2342 break;
2343 default:
2344 /* oops */
66a2b0a3
JK		 2345 break;
2346 }
2347 }
7e6c9861
JK		 2348#endif
2349
2350 /* enable transmits in the hardware, need to do this
2351 * after setting TARC0 */
2352 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2353 tctl |= E1000_TCTL_EN;
2354 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2355
1da177e4
LT		 2356 netif_carrier_on(netdev);
2357 netif_wake_queue(netdev);
2358 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2359 adapter->smartspeed = 0;
2360 }
2361 } else {
96838a40 2362 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2363 adapter->link_speed = 0;
2364 adapter->link_duplex = 0;
2365 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2366 netif_carrier_off(netdev);
2367 netif_stop_queue(netdev);
2368 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2369
2370 /* 80003ES2LAN workaround--
2371 * For packet buffer work-around on link down event;
2372 * disable receives in the ISR and
2373 * reset device here in the watchdog
2374 */
2375 if (adapter->hw.mac_type == e1000_80003es2lan) {
2376 /* reset device */
2377 schedule_work(&adapter->reset_task);
2378 }
1da177e4
LT		 2379 }
2380
2381 e1000_smartspeed(adapter);
2382 }
2383
2384 e1000_update_stats(adapter);
2385
2386 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2387 adapter->tpt_old = adapter->stats.tpt;
2388 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2389 adapter->colc_old = adapter->stats.colc;
2390
2391 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2392 adapter->gorcl_old = adapter->stats.gorcl;
2393 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2394 adapter->gotcl_old = adapter->stats.gotcl;
2395
2396 e1000_update_adaptive(&adapter->hw);
2397
f56799ea 2398 if (!netif_carrier_ok(netdev)) {
581d708e 2399 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2400 /* We've lost link, so the controller stops DMA,
2401 * but we've got queued Tx work that's never going
2402 * to get done, so reset controller to flush Tx.
2403 * (Do the reset outside of interrupt context). */
87041639
JK		 2404 adapter->tx_timeout_count++;
2405 schedule_work(&adapter->reset_task);
1da177e4
LT		 2406 }
2407 }
2408
2409 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2410 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2411 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2412 * asymmetrical Tx or Rx gets ITR=8000; everyone
2413 * else is between 2000-8000. */
2414 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2415 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2416 adapter->gotcl - adapter->gorcl :
2417 adapter->gorcl - adapter->gotcl) / 10000;
2418 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2419 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2420 }
2421
2422 /* Cause software interrupt to ensure rx ring is cleaned */
2423 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2424
2648345f 2425 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2426 adapter->detect_tx_hung = TRUE;
2427
96838a40 2428 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2429 * reset from the other port. Set the appropriate LAA in RAR[0] */
2430 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2431 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2432
1da177e4
LT		 2433 /* Reset the timer */
2434 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2435}
2436
2437#define E1000_TX_FLAGS_CSUM 0x00000001
2438#define E1000_TX_FLAGS_VLAN 0x00000002
2439#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2440#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2441#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2442#define E1000_TX_FLAGS_VLAN_SHIFT 16
2443
e619d523 2444static int
581d708e
MC		 2445e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2446 struct sk_buff *skb)
1da177e4
LT		 2447{
2448#ifdef NETIF_F_TSO
2449 struct e1000_context_desc *context_desc;
545c67c0 2450 struct e1000_buffer *buffer_info;
1da177e4
LT		 2451 unsigned int i;
2452 uint32_t cmd_length = 0;
2d7edb92 2453 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2454 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2455 int err;
2456
96838a40 2457 if (skb_shinfo(skb)->tso_size) {
1da177e4
LT		 2458 if (skb_header_cloned(skb)) {
2459 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2460 if (err)
2461 return err;
2462 }
2463
2464 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2465 mss = skb_shinfo(skb)->tso_size;
60828236 2466 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2467 skb->nh.iph->tot_len = 0;
2468 skb->nh.iph->check = 0;
2469 skb->h.th->check =
2470 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2471 skb->nh.iph->daddr,
2472 0,
2473 IPPROTO_TCP,
2474 0);
2475 cmd_length = E1000_TXD_CMD_IP;
2476 ipcse = skb->h.raw - skb->data - 1;
2477#ifdef NETIF_F_TSO_IPV6
96838a40 2478 } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
2d7edb92
MC		 2479 skb->nh.ipv6h->payload_len = 0;
2480 skb->h.th->check =
2481 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2482 &skb->nh.ipv6h->daddr,
2483 0,
2484 IPPROTO_TCP,
2485 0);
2486 ipcse = 0;
2487#endif
2488 }
1da177e4
LT		 2489 ipcss = skb->nh.raw - skb->data;
2490 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2491 tucss = skb->h.raw - skb->data;
2492 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2493 tucse = 0;
2494
2495 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2496 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2497
581d708e
MC		 2498 i = tx_ring->next_to_use;
2499 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2500 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2501
2502 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2503 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2504 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2505 context_desc->upper_setup.tcp_fields.tucss = tucss;
2506 context_desc->upper_setup.tcp_fields.tucso = tucso;
2507 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2508 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2509 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2510 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2511
545c67c0
JK		 2512 buffer_info->time_stamp = jiffies;
2513
581d708e
MC		 2514 if (++i == tx_ring->count) i = 0;
2515 tx_ring->next_to_use = i;
1da177e4 2516
8241e35e 2517 return TRUE;
1da177e4
LT		 2518 }
2519#endif
2520
8241e35e 2521 return FALSE;
1da177e4
LT		 2522}
2523
e619d523 2524static boolean_t
581d708e
MC		 2525e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2526 struct sk_buff *skb)
1da177e4
LT		 2527{
2528 struct e1000_context_desc *context_desc;
545c67c0 2529 struct e1000_buffer *buffer_info;
1da177e4
LT		 2530 unsigned int i;
2531 uint8_t css;
2532
96838a40 2533 if (likely(skb->ip_summed == CHECKSUM_HW)) {
1da177e4
LT		 2534 css = skb->h.raw - skb->data;
2535
581d708e 2536 i = tx_ring->next_to_use;
545c67c0 2537 buffer_info = &tx_ring->buffer_info[i];
581d708e 2538 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2539
2540 context_desc->upper_setup.tcp_fields.tucss = css;
2541 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2542 context_desc->upper_setup.tcp_fields.tucse = 0;
2543 context_desc->tcp_seg_setup.data = 0;
2544 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2545
545c67c0
JK		 2546 buffer_info->time_stamp = jiffies;
2547
581d708e
MC		 2548 if (unlikely(++i == tx_ring->count)) i = 0;
2549 tx_ring->next_to_use = i;
1da177e4
LT		 2550
2551 return TRUE;
2552 }
2553
2554 return FALSE;
2555}
2556
2557#define E1000_MAX_TXD_PWR 12
2558#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2559
e619d523 2560static int
581d708e
MC		 2561e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2562 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2563 unsigned int nr_frags, unsigned int mss)
1da177e4 2564{
1da177e4
LT		 2565 struct e1000_buffer *buffer_info;
2566 unsigned int len = skb->len;
2567 unsigned int offset = 0, size, count = 0, i;
2568 unsigned int f;
2569 len -= skb->data_len;
2570
2571 i = tx_ring->next_to_use;
2572
96838a40 2573 while (len) {
1da177e4
LT		 2574 buffer_info = &tx_ring->buffer_info[i];
2575 size = min(len, max_per_txd);
2576#ifdef NETIF_F_TSO
fd803241
JK		 2577 /* Workaround for Controller erratum --
2578 * descriptor for non-tso packet in a linear SKB that follows a
2579 * tso gets written back prematurely before the data is fully
0f15a8fa 2580 * DMA'd to the controller */
fd803241 2581 if (!skb->data_len && tx_ring->last_tx_tso &&
0f15a8fa 2582 !skb_shinfo(skb)->tso_size) {
fd803241
JK		 2583 tx_ring->last_tx_tso = 0;
2584 size -= 4;
2585 }
2586
1da177e4
LT		 2587 /* Workaround for premature desc write-backs
2588 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2589 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2590 size -= 4;
2591#endif
97338bde
MC		 2592 /* work-around for errata 10 and it applies
2593 * to all controllers in PCI-X mode
2594 * The fix is to make sure that the first descriptor of a
2595 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2596 */
96838a40 2597 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2598 (size > 2015) && count == 0))
2599 size = 2015;
96838a40 2600
1da177e4
LT		 2601 /* Workaround for potential 82544 hang in PCI-X. Avoid
2602 * terminating buffers within evenly-aligned dwords. */
96838a40 2603 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2604 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2605 size > 4))
2606 size -= 4;
2607
2608 buffer_info->length = size;
2609 buffer_info->dma =
2610 pci_map_single(adapter->pdev,
2611 skb->data + offset,
2612 size,
2613 PCI_DMA_TODEVICE);
2614 buffer_info->time_stamp = jiffies;
2615
2616 len -= size;
2617 offset += size;
2618 count++;
96838a40 2619 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2620 }
2621
96838a40 2622 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2623 struct skb_frag_struct *frag;
2624
2625 frag = &skb_shinfo(skb)->frags[f];
2626 len = frag->size;
2627 offset = frag->page_offset;
2628
96838a40 2629 while (len) {
1da177e4
LT		 2630 buffer_info = &tx_ring->buffer_info[i];
2631 size = min(len, max_per_txd);
2632#ifdef NETIF_F_TSO
2633 /* Workaround for premature desc write-backs
2634 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2635 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2636 size -= 4;
2637#endif
2638 /* Workaround for potential 82544 hang in PCI-X.
2639 * Avoid terminating buffers within evenly-aligned
2640 * dwords. */
96838a40 2641 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2642 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2643 size > 4))
2644 size -= 4;
2645
2646 buffer_info->length = size;
2647 buffer_info->dma =
2648 pci_map_page(adapter->pdev,
2649 frag->page,
2650 offset,
2651 size,
2652 PCI_DMA_TODEVICE);
2653 buffer_info->time_stamp = jiffies;
2654
2655 len -= size;
2656 offset += size;
2657 count++;
96838a40 2658 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2659 }
2660 }
2661
2662 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2663 tx_ring->buffer_info[i].skb = skb;
2664 tx_ring->buffer_info[first].next_to_watch = i;
2665
2666 return count;
2667}
2668
e619d523 2669static void
581d708e
MC		 2670e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2671 int tx_flags, int count)
1da177e4 2672{
1da177e4
LT		 2673 struct e1000_tx_desc *tx_desc = NULL;
2674 struct e1000_buffer *buffer_info;
2675 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2676 unsigned int i;
2677
96838a40 2678 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2679 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2680 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2681 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2682
96838a40 2683 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2684 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2685 }
2686
96838a40 2687 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2688 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2689 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2690 }
2691
96838a40 2692 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2693 txd_lower |= E1000_TXD_CMD_VLE;
2694 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2695 }
2696
2697 i = tx_ring->next_to_use;
2698
96838a40 2699 while (count--) {
1da177e4
LT		 2700 buffer_info = &tx_ring->buffer_info[i];
2701 tx_desc = E1000_TX_DESC(*tx_ring, i);
2702 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2703 tx_desc->lower.data =
2704 cpu_to_le32(txd_lower | buffer_info->length);
2705 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2706 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2707 }
2708
2709 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2710
2711 /* Force memory writes to complete before letting h/w
2712 * know there are new descriptors to fetch. (Only
2713 * applicable for weak-ordered memory model archs,
2714 * such as IA-64). */
2715 wmb();
2716
2717 tx_ring->next_to_use = i;
581d708e 2718 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2719}
2720
2721/**
2722 * 82547 workaround to avoid controller hang in half-duplex environment.
2723 * The workaround is to avoid queuing a large packet that would span
2724 * the internal Tx FIFO ring boundary by notifying the stack to resend
2725 * the packet at a later time. This gives the Tx FIFO an opportunity to
2726 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2727 * to the beginning of the Tx FIFO.
2728 **/
2729
2730#define E1000_FIFO_HDR 0x10
2731#define E1000_82547_PAD_LEN 0x3E0
2732
e619d523 2733static int
1da177e4
LT		 2734e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2735{
2736 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2737 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2738
2739 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2740
96838a40 2741 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2742 goto no_fifo_stall_required;
2743
96838a40 2744 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2745 return 1;
2746
96838a40 2747 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2748 atomic_set(&adapter->tx_fifo_stall, 1);
2749 return 1;
2750 }
2751
2752no_fifo_stall_required:
2753 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2754 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2755 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2756 return 0;
2757}
2758
2d7edb92 2759#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 2760static int
2d7edb92
MC		 2761e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2762{
2763 struct e1000_hw *hw = &adapter->hw;
2764 uint16_t length, offset;
96838a40
JB		 2765 if (vlan_tx_tag_present(skb)) {
2766 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2767 ( adapter->hw.mng_cookie.status &
2768 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2769 return 0;
2770 }
20a44028 2771 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2772 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2773 if ((htons(ETH_P_IP) == eth->h_proto)) {
2774 const struct iphdr *ip =
2d7edb92 2775 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2776 if (IPPROTO_UDP == ip->protocol) {
2777 struct udphdr *udp =
2778 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2779 (ip->ihl << 2));
96838a40 2780 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2781 offset = (uint8_t *)udp + 8 - skb->data;
2782 length = skb->len - offset;
2783
2784 return e1000_mng_write_dhcp_info(hw,
96838a40 2785 (uint8_t *)udp + 8,
2d7edb92
MC		 2786 length);
2787 }
2788 }
2789 }
2790 }
2791 return 0;
2792}
2793
1da177e4
LT		 2794#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2795static int
2796e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2797{
60490fe0 2798 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2799 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2800 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2801 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2802 unsigned int tx_flags = 0;
2803 unsigned int len = skb->len;
2804 unsigned long flags;
2805 unsigned int nr_frags = 0;
2806 unsigned int mss = 0;
2807 int count = 0;
76c224bc 2808 int tso;
1da177e4
LT		 2809 unsigned int f;
2810 len -= skb->data_len;
2811
581d708e 2812 tx_ring = adapter->tx_ring;
24025e4e 2813
581d708e 2814 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2815 dev_kfree_skb_any(skb);
2816 return NETDEV_TX_OK;
2817 }
2818
2819#ifdef NETIF_F_TSO
2820 mss = skb_shinfo(skb)->tso_size;
76c224bc 2821 /* The controller does a simple calculation to
1da177e4
LT		 2822 * make sure there is enough room in the FIFO before
2823 * initiating the DMA for each buffer. The calc is:
2824 * 4 = ceil(buffer len/mss). To make sure we don't
2825 * overrun the FIFO, adjust the max buffer len if mss
2826 * drops. */
96838a40 2827 if (mss) {
9a3056da 2828 uint8_t hdr_len;
1da177e4
LT		 2829 max_per_txd = min(mss << 2, max_per_txd);
2830 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2831
9f687888 2832 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
9a3056da
JK		 2833 * points to just header, pull a few bytes of payload from
2834 * frags into skb->data */
2835 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 2836 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2837 switch (adapter->hw.mac_type) {
2838 unsigned int pull_size;
2839 case e1000_82571:
2840 case e1000_82572:
2841 case e1000_82573:
2842 pull_size = min((unsigned int)4, skb->data_len);
2843 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 2844 DPRINTK(DRV, ERR,
9f687888
JK		 2845 "__pskb_pull_tail failed.\n");
2846 dev_kfree_skb_any(skb);
749dfc70 2847 return NETDEV_TX_OK;
9f687888
JK		 2848 }
2849 len = skb->len - skb->data_len;
2850 break;
2851 default:
2852 /* do nothing */
2853 break;
d74bbd3b 2854 }
9a3056da 2855 }
1da177e4
LT		 2856 }
2857
9a3056da 2858 /* reserve a descriptor for the offload context */
96838a40 2859 if ((mss) || (skb->ip_summed == CHECKSUM_HW))
1da177e4 2860 count++;
2648345f 2861 count++;
1da177e4 2862#else
96838a40 2863 if (skb->ip_summed == CHECKSUM_HW)
1da177e4
LT		 2864 count++;
2865#endif
fd803241
JK		 2866
2867#ifdef NETIF_F_TSO
2868 /* Controller Erratum workaround */
2869 if (!skb->data_len && tx_ring->last_tx_tso &&
0f15a8fa 2870 !skb_shinfo(skb)->tso_size)
fd803241
JK		 2871 count++;
2872#endif
2873
1da177e4
LT		 2874 count += TXD_USE_COUNT(len, max_txd_pwr);
2875
96838a40 2876 if (adapter->pcix_82544)
1da177e4
LT		 2877 count++;
2878
96838a40 2879 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2880 * in PCI-X mode, so add one more descriptor to the count
2881 */
96838a40 2882 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2883 (len > 2015)))
2884 count++;
2885
1da177e4 2886 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2887 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2888 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2889 max_txd_pwr);
96838a40 2890 if (adapter->pcix_82544)
1da177e4
LT		 2891 count += nr_frags;
2892
0f15a8fa
JK		 2893
2894 if (adapter->hw.tx_pkt_filtering &&
2895 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 2896 e1000_transfer_dhcp_info(adapter, skb);
2897
581d708e
MC		 2898 local_irq_save(flags);
2899 if (!spin_trylock(&tx_ring->tx_lock)) {
2900 /* Collision - tell upper layer to requeue */
2901 local_irq_restore(flags);
2902 return NETDEV_TX_LOCKED;
2903 }
1da177e4
LT		 2904
2905 /* need: count + 2 desc gap to keep tail from touching
2906 * head, otherwise try next time */
581d708e 2907 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2908 netif_stop_queue(netdev);
581d708e 2909 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2910 return NETDEV_TX_BUSY;
2911 }
2912
96838a40
JB		 2913 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
2914 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 2915 netif_stop_queue(netdev);
2916 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2917 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2918 return NETDEV_TX_BUSY;
2919 }
2920 }
2921
96838a40 2922 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 2923 tx_flags |= E1000_TX_FLAGS_VLAN;
2924 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2925 }
2926
581d708e 2927 first = tx_ring->next_to_use;
96838a40 2928
581d708e 2929 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2930 if (tso < 0) {
2931 dev_kfree_skb_any(skb);
581d708e 2932 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2933 return NETDEV_TX_OK;
2934 }
2935
fd803241
JK		 2936 if (likely(tso)) {
2937 tx_ring->last_tx_tso = 1;
1da177e4 2938 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 2939 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 2940 tx_flags |= E1000_TX_FLAGS_CSUM;
2941
2d7edb92 2942 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 2943 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 2944 * no longer assume, we must. */
60828236 2945 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 2946 tx_flags |= E1000_TX_FLAGS_IPV4;
2947
581d708e
MC		 2948 e1000_tx_queue(adapter, tx_ring, tx_flags,
2949 e1000_tx_map(adapter, tx_ring, skb, first,
2950 max_per_txd, nr_frags, mss));
1da177e4
LT		 2951
2952 netdev->trans_start = jiffies;
2953
2954 /* Make sure there is space in the ring for the next send. */
581d708e 2955 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 2956 netif_stop_queue(netdev);
2957
581d708e 2958 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2959 return NETDEV_TX_OK;
2960}
2961
2962/**
2963 * e1000_tx_timeout - Respond to a Tx Hang
2964 * @netdev: network interface device structure
2965 **/
2966
2967static void
2968e1000_tx_timeout(struct net_device *netdev)
2969{
60490fe0 2970 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2971
2972 /* Do the reset outside of interrupt context */
87041639
JK		 2973 adapter->tx_timeout_count++;
2974 schedule_work(&adapter->reset_task);
1da177e4
LT		 2975}
2976
2977static void
87041639 2978e1000_reset_task(struct net_device *netdev)
1da177e4 2979{
60490fe0 2980 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2981
2db10a08 2982 e1000_reinit_locked(adapter);
1da177e4
LT		 2983}
2984
2985/**
2986 * e1000_get_stats - Get System Network Statistics
2987 * @netdev: network interface device structure
2988 *
2989 * Returns the address of the device statistics structure.
2990 * The statistics are actually updated from the timer callback.
2991 **/
2992
2993static struct net_device_stats *
2994e1000_get_stats(struct net_device *netdev)
2995{
60490fe0 2996 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2997
6b7660cd 2998 /* only return the current stats */
1da177e4
LT		 2999 return &adapter->net_stats;
3000}
3001
3002/**
3003 * e1000_change_mtu - Change the Maximum Transfer Unit
3004 * @netdev: network interface device structure
3005 * @new_mtu: new value for maximum frame size
3006 *
3007 * Returns 0 on success, negative on failure
3008 **/
3009
3010static int
3011e1000_change_mtu(struct net_device *netdev, int new_mtu)
3012{
60490fe0 3013 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3014 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3015 uint16_t eeprom_data = 0;
1da177e4 3016
96838a40
JB		 3017 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3018 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3019 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3020 return -EINVAL;
2d7edb92 3021 }
1da177e4 3022
997f5cbd
JK		 3023 /* Adapter-specific max frame size limits. */
3024 switch (adapter->hw.mac_type) {
9e2feace 3025 case e1000_undefined ... e1000_82542_rev2_1:
997f5cbd
JK		 3026 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3027 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3028 return -EINVAL;
2d7edb92 3029 }
997f5cbd 3030 break;
85b22eb6
JK		 3031 case e1000_82573:
3032 /* only enable jumbo frames if ASPM is disabled completely
3033 * this means both bits must be zero in 0x1A bits 3:2 */
3034 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3035 &eeprom_data);
3036 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
3037 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3038 DPRINTK(PROBE, ERR,
3039 "Jumbo Frames not supported.\n");
3040 return -EINVAL;
3041 }
3042 break;
3043 }
3044 /* fall through to get support */
997f5cbd
JK		 3045 case e1000_82571:
3046 case e1000_82572:
87041639 3047 case e1000_80003es2lan:
997f5cbd
JK		 3048#define MAX_STD_JUMBO_FRAME_SIZE 9234
3049 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3050 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3051 return -EINVAL;
3052 }
3053 break;
3054 default:
3055 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3056 break;
1da177e4
LT		 3057 }
3058
9e2feace
AK		 3059 /* NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3060 * means we reserve 2 more, this pushes us to allocate from the next
3061 * larger slab size
3062 * i.e. RXBUFFER_2048 --> size-4096 slab */
3063
3064 if (max_frame <= E1000_RXBUFFER_256)
3065 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3066 else if (max_frame <= E1000_RXBUFFER_512)
3067 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3068 else if (max_frame <= E1000_RXBUFFER_1024)
3069 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3070 else if (max_frame <= E1000_RXBUFFER_2048)
3071 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3072 else if (max_frame <= E1000_RXBUFFER_4096)
3073 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3074 else if (max_frame <= E1000_RXBUFFER_8192)
3075 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3076 else if (max_frame <= E1000_RXBUFFER_16384)
3077 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3078
3079 /* adjust allocation if LPE protects us, and we aren't using SBP */
3080#define MAXIMUM_ETHERNET_VLAN_SIZE 1522
3081 if (!adapter->hw.tbi_compatibility_on &&
3082 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3083 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3084 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3085
2d7edb92
MC		 3086 netdev->mtu = new_mtu;
3087
2db10a08
AK		 3088 if (netif_running(netdev))
3089 e1000_reinit_locked(adapter);
1da177e4 3090
1da177e4
LT		 3091 adapter->hw.max_frame_size = max_frame;
3092
3093 return 0;
3094}
3095
3096/**
3097 * e1000_update_stats - Update the board statistics counters
3098 * @adapter: board private structure
3099 **/
3100
3101void
3102e1000_update_stats(struct e1000_adapter *adapter)
3103{
3104 struct e1000_hw *hw = &adapter->hw;
a487a8f7 3105 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3106 unsigned long flags;
3107 uint16_t phy_tmp;
3108
3109#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3110
a487a8f7
AK		 3111 /*
3112 * Prevent stats update while adapter is being reset, or if the pci
3113 * connection is down.
3114 */
9026729b 3115 if (adapter->link_speed == 0)
a487a8f7
AK		 3116 return;
3117 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
9026729b
AK		 3118 return;
3119
1da177e4
LT		 3120 spin_lock_irqsave(&adapter->stats_lock, flags);
3121
3122 /* these counters are modified from e1000_adjust_tbi_stats,
3123 * called from the interrupt context, so they must only
3124 * be written while holding adapter->stats_lock
3125 */
3126
3127 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3128 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3129 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3130 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3131 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3132 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3133 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3134 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3135 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3136 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3137 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3138 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3139 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3140
3141 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3142 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3143 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3144 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3145 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3146 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3147 adapter->stats.dc += E1000_READ_REG(hw, DC);
3148 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3149 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3150 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3151 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3152 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3153 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3154 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3155 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3156 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3157 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3158 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3159 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3160 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3161 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3162 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3163 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3164 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3165 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3166 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3167 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3168 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3169 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3170 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3171 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3172 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3173 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3174 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3175
3176 /* used for adaptive IFS */
3177
3178 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3179 adapter->stats.tpt += hw->tx_packet_delta;
3180 hw->collision_delta = E1000_READ_REG(hw, COLC);
3181 adapter->stats.colc += hw->collision_delta;
3182
96838a40 3183 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3184 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3185 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3186 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3187 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3188 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3189 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3190 }
96838a40 3191 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3192 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3193 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3194 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3195 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3196 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3197 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3198 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3199 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3200 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3201 }
1da177e4
LT		 3202
3203 /* Fill out the OS statistics structure */
3204
3205 adapter->net_stats.rx_packets = adapter->stats.gprc;
3206 adapter->net_stats.tx_packets = adapter->stats.gptc;
3207 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3208 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3209 adapter->net_stats.multicast = adapter->stats.mprc;
3210 adapter->net_stats.collisions = adapter->stats.colc;
3211
3212 /* Rx Errors */
3213
87041639
JK		 3214 /* RLEC on some newer hardware can be incorrect so build
3215 * our own version based on RUC and ROC */
1da177e4
LT		 3216 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3217 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3218 adapter->stats.ruc + adapter->stats.roc +
3219 adapter->stats.cexterr;
87041639
JK		 3220 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3221 adapter->stats.roc;
1da177e4
LT		 3222 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3223 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3224 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3225
3226 /* Tx Errors */
3227
3228 adapter->net_stats.tx_errors = adapter->stats.ecol +
3229 adapter->stats.latecol;
3230 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3231 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3232 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3233
3234 /* Tx Dropped needs to be maintained elsewhere */
3235
3236 /* Phy Stats */
3237
96838a40
JB		 3238 if (hw->media_type == e1000_media_type_copper) {
3239 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3240 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3241 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3242 adapter->phy_stats.idle_errors += phy_tmp;
3243 }
3244
96838a40 3245 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3246 (hw->phy_type == e1000_phy_m88) &&
3247 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3248 adapter->phy_stats.receive_errors += phy_tmp;
3249 }
3250
3251 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3252}
3253
3254/**
3255 * e1000_intr - Interrupt Handler
3256 * @irq: interrupt number
3257 * @data: pointer to a network interface device structure
3258 * @pt_regs: CPU registers structure
3259 **/
3260
3261static irqreturn_t
3262e1000_intr(int irq, void *data, struct pt_regs *regs)
3263{
3264 struct net_device *netdev = data;
60490fe0 3265 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3266 struct e1000_hw *hw = &adapter->hw;
87041639 3267 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3268#ifndef CONFIG_E1000_NAPI
581d708e 3269 int i;
1e613fd9
JK		 3270#else
3271 /* Interrupt Auto-Mask...upon reading ICR,
3272 * interrupts are masked. No need for the
3273 * IMC write, but it does mean we should
3274 * account for it ASAP. */
3275 if (likely(hw->mac_type >= e1000_82571))
3276 atomic_inc(&adapter->irq_sem);
be2b28ed 3277#endif
1da177e4 3278
1e613fd9
JK		 3279 if (unlikely(!icr)) {
3280#ifdef CONFIG_E1000_NAPI
3281 if (hw->mac_type >= e1000_82571)
3282 e1000_irq_enable(adapter);
3283#endif
1da177e4 3284 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3285 }
1da177e4 3286
96838a40 3287 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3288 hw->get_link_status = 1;
87041639
JK		 3289 /* 80003ES2LAN workaround--
3290 * For packet buffer work-around on link down event;
3291 * disable receives here in the ISR and
3292 * reset adapter in watchdog
3293 */
3294 if (netif_carrier_ok(netdev) &&
3295 (adapter->hw.mac_type == e1000_80003es2lan)) {
3296 /* disable receives */
3297 rctl = E1000_READ_REG(hw, RCTL);
3298 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3299 }
1da177e4
LT		 3300 mod_timer(&adapter->watchdog_timer, jiffies);
3301 }
3302
3303#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3304 if (unlikely(hw->mac_type < e1000_82571)) {
3305 atomic_inc(&adapter->irq_sem);
3306 E1000_WRITE_REG(hw, IMC, ~0);
3307 E1000_WRITE_FLUSH(hw);
3308 }
581d708e
MC		 3309 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3310 __netif_rx_schedule(&adapter->polling_netdev[0]);
3311 else
3312 e1000_irq_enable(adapter);
c1605eb3 3313#else
1da177e4 3314 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3315 * Due to Hub Link bus being occupied, an interrupt
3316 * de-assertion message is not able to be sent.
3317 * When an interrupt assertion message is generated later,
3318 * two messages are re-ordered and sent out.
3319 * That causes APIC to think 82547 is in de-assertion
3320 * state, while 82547 is in assertion state, resulting
3321 * in dead lock. Writing IMC forces 82547 into
3322 * de-assertion state.
3323 */
3324 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3325 atomic_inc(&adapter->irq_sem);
2648345f 3326 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3327 }
3328
96838a40
JB		 3329 for (i = 0; i < E1000_MAX_INTR; i++)
3330 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3331 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3332 break;
3333
96838a40 3334 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3335 e1000_irq_enable(adapter);
581d708e 3336
c1605eb3 3337#endif
1da177e4
LT		 3338
3339 return IRQ_HANDLED;
3340}
3341
3342#ifdef CONFIG_E1000_NAPI
3343/**
3344 * e1000_clean - NAPI Rx polling callback
3345 * @adapter: board private structure
3346 **/
3347
3348static int
581d708e 3349e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3350{
581d708e
MC		 3351 struct e1000_adapter *adapter;
3352 int work_to_do = min(*budget, poll_dev->quota);
38bd3b26 3353 int tx_cleaned = 0, i = 0, work_done = 0;
581d708e
MC		 3354
3355 /* Must NOT use netdev_priv macro here. */
3356 adapter = poll_dev->priv;
3357
3358 /* Keep link state information with original netdev */
3359 if (!netif_carrier_ok(adapter->netdev))
3360 goto quit_polling;
2648345f 3361
581d708e
MC		 3362 while (poll_dev != &adapter->polling_netdev[i]) {
3363 i++;
5d9428de 3364 BUG_ON(i == adapter->num_rx_queues);
581d708e
MC		 3365 }
3366
8241e35e
JK		 3367 if (likely(adapter->num_tx_queues == 1)) {
3368 /* e1000_clean is called per-cpu. This lock protects
3369 * tx_ring[0] from being cleaned by multiple cpus
3370 * simultaneously. A failure obtaining the lock means
3371 * tx_ring[0] is currently being cleaned anyway. */
3372 if (spin_trylock(&adapter->tx_queue_lock)) {
3373 tx_cleaned = e1000_clean_tx_irq(adapter,
3374 &adapter->tx_ring[0]);
3375 spin_unlock(&adapter->tx_queue_lock);
3376 }
3377 } else
3378 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3379
581d708e
MC		 3380 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3381 &work_done, work_to_do);
1da177e4
LT		 3382
3383 *budget -= work_done;
581d708e 3384 poll_dev->quota -= work_done;
96838a40 3385
2b02893e 3386 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3387 if ((!tx_cleaned && (work_done == 0)) ||
581d708e
MC		 3388 !netif_running(adapter->netdev)) {
3389quit_polling:
3390 netif_rx_complete(poll_dev);
1da177e4
LT		 3391 e1000_irq_enable(adapter);
3392 return 0;
3393 }
3394
3395 return 1;
3396}
3397
3398#endif
3399/**
3400 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3401 * @adapter: board private structure
3402 **/
3403
3404static boolean_t
581d708e
MC		 3405e1000_clean_tx_irq(struct e1000_adapter *adapter,
3406 struct e1000_tx_ring *tx_ring)
1da177e4 3407{
1da177e4
LT		 3408 struct net_device *netdev = adapter->netdev;
3409 struct e1000_tx_desc *tx_desc, *eop_desc;
3410 struct e1000_buffer *buffer_info;
3411 unsigned int i, eop;
2a1af5d7
JK		 3412#ifdef CONFIG_E1000_NAPI
3413 unsigned int count = 0;
3414#endif
1da177e4
LT		 3415 boolean_t cleaned = FALSE;
3416
3417 i = tx_ring->next_to_clean;
3418 eop = tx_ring->buffer_info[i].next_to_watch;
3419 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3420
581d708e 3421 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3422 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3423 tx_desc = E1000_TX_DESC(*tx_ring, i);
3424 buffer_info = &tx_ring->buffer_info[i];
3425 cleaned = (i == eop);
3426
fd803241 3427 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3428 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3429
96838a40 3430 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3431 }
581d708e 3432
7bfa4816 3433
1da177e4
LT		 3434 eop = tx_ring->buffer_info[i].next_to_watch;
3435 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3436#ifdef CONFIG_E1000_NAPI
3437#define E1000_TX_WEIGHT 64
3438 /* weight of a sort for tx, to avoid endless transmit cleanup */
3439 if (count++ == E1000_TX_WEIGHT) break;
3440#endif
1da177e4
LT		 3441 }
3442
3443 tx_ring->next_to_clean = i;
3444
77b2aad5 3445#define TX_WAKE_THRESHOLD 32
96838a40 3446 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
77b2aad5
AK		 3447 netif_carrier_ok(netdev))) {
3448 spin_lock(&tx_ring->tx_lock);
3449 if (netif_queue_stopped(netdev) &&
3450 (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
3451 netif_wake_queue(netdev);
3452 spin_unlock(&tx_ring->tx_lock);
3453 }
2648345f 3454
581d708e 3455 if (adapter->detect_tx_hung) {
2648345f 3456 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3457 * check with the clearing of time_stamp and movement of i */
3458 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3459 if (tx_ring->buffer_info[eop].dma &&
3460 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3461 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3462 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3463 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3464
3465 /* detected Tx unit hang */
c6963ef5 3466 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3467 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3468 " TDH <%x>\n"
3469 " TDT <%x>\n"
3470 " next_to_use <%x>\n"
3471 " next_to_clean <%x>\n"
3472 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3473 " time_stamp <%lx>\n"
3474 " next_to_watch <%x>\n"
3475 " jiffies <%lx>\n"
3476 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3477 (unsigned long)((tx_ring - adapter->tx_ring) /
3478 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3479 readl(adapter->hw.hw_addr + tx_ring->tdh),
3480 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3481 tx_ring->next_to_use,
392137fa
JK		 3482 tx_ring->next_to_clean,
3483 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3484 eop,
3485 jiffies,
3486 eop_desc->upper.fields.status);
1da177e4 3487 netif_stop_queue(netdev);
70b8f1e1 3488 }
1da177e4 3489 }
1da177e4
LT		 3490 return cleaned;
3491}
3492
3493/**
3494 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3495 * @adapter: board private structure
3496 * @status_err: receive descriptor status and error fields
3497 * @csum: receive descriptor csum field
3498 * @sk_buff: socket buffer with received data
1da177e4
LT		 3499 **/
3500
e619d523 3501static void
1da177e4 3502e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3503 uint32_t status_err, uint32_t csum,
3504 struct sk_buff *skb)
1da177e4 3505{
2d7edb92
MC		 3506 uint16_t status = (uint16_t)status_err;
3507 uint8_t errors = (uint8_t)(status_err >> 24);
3508 skb->ip_summed = CHECKSUM_NONE;
3509
1da177e4 3510 /* 82543 or newer only */
96838a40 3511 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3512 /* Ignore Checksum bit is set */
96838a40 3513 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3514 /* TCP/UDP checksum error bit is set */
96838a40 3515 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3516 /* let the stack verify checksum errors */
1da177e4 3517 adapter->hw_csum_err++;
2d7edb92
MC		 3518 return;
3519 }
3520 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3521 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3522 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3523 return;
1da177e4 3524 } else {
96838a40 3525 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3526 return;
3527 }
3528 /* It must be a TCP or UDP packet with a valid checksum */
3529 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3530 /* TCP checksum is good */
3531 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3532 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3533 /* IP fragment with UDP payload */
3534 /* Hardware complements the payload checksum, so we undo it
3535 * and then put the value in host order for further stack use.
3536 */
3537 csum = ntohl(csum ^ 0xFFFF);
3538 skb->csum = csum;
3539 skb->ip_summed = CHECKSUM_HW;
1da177e4 3540 }
2d7edb92 3541 adapter->hw_csum_good++;
1da177e4
LT		 3542}
3543
3544/**
2d7edb92 3545 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3546 * @adapter: board private structure
3547 **/
3548
3549static boolean_t
3550#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3551e1000_clean_rx_irq(struct e1000_adapter *adapter,
3552 struct e1000_rx_ring *rx_ring,
3553 int *work_done, int work_to_do)
1da177e4 3554#else
581d708e
MC		 3555e1000_clean_rx_irq(struct e1000_adapter *adapter,
3556 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3557#endif
3558{
1da177e4
LT		 3559 struct net_device *netdev = adapter->netdev;
3560 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3561 struct e1000_rx_desc *rx_desc, *next_rxd;
3562 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3563 unsigned long flags;
3564 uint32_t length;
3565 uint8_t last_byte;
3566 unsigned int i;
72d64a43 3567 int cleaned_count = 0;
a1415ee6 3568 boolean_t cleaned = FALSE;
1da177e4
LT		 3569
3570 i = rx_ring->next_to_clean;
3571 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3572 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3573
b92ff8ee 3574 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3575 struct sk_buff *skb;
a292ca6e 3576 u8 status;
1da177e4 3577#ifdef CONFIG_E1000_NAPI
96838a40 3578 if (*work_done >= work_to_do)
1da177e4
LT		 3579 break;
3580 (*work_done)++;
3581#endif
a292ca6e 3582 status = rx_desc->status;
b92ff8ee 3583 skb = buffer_info->skb;
86c3d59f
JB		 3584 buffer_info->skb = NULL;
3585
30320be8
JK		 3586 prefetch(skb->data - NET_IP_ALIGN);
3587
86c3d59f
JB		 3588 if (++i == rx_ring->count) i = 0;
3589 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3590 prefetch(next_rxd);
3591
86c3d59f 3592 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3593
72d64a43
JK		 3594 cleaned = TRUE;
3595 cleaned_count++;
a292ca6e
JK		 3596 pci_unmap_single(pdev,
3597 buffer_info->dma,
3598 buffer_info->length,
1da177e4
LT		 3599 PCI_DMA_FROMDEVICE);
3600
1da177e4
LT		 3601 length = le16_to_cpu(rx_desc->length);
3602
a1415ee6
JK		 3603 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3604 /* All receives must fit into a single buffer */
3605 E1000_DBG("%s: Receive packet consumed multiple"
3606 " buffers\n", netdev->name);
864c4e45
AK		 3607 /* recycle */
3608 buffer_info-> skb = skb;
1da177e4
LT		 3609 goto next_desc;
3610 }
3611
96838a40 3612 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3613 last_byte = *(skb->data + length - 1);
b92ff8ee 3614 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3615 rx_desc->errors, length, last_byte)) {
3616 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3617 e1000_tbi_adjust_stats(&adapter->hw,
3618 &adapter->stats,
1da177e4
LT		 3619 length, skb->data);
3620 spin_unlock_irqrestore(&adapter->stats_lock,
3621 flags);
3622 length--;
3623 } else {
9e2feace
AK		 3624 /* recycle */
3625 buffer_info->skb = skb;
1da177e4
LT		 3626 goto next_desc;
3627 }
1cb5821f 3628 }
1da177e4 3629
a292ca6e
JK		 3630 /* code added for copybreak, this should improve
3631 * performance for small packets with large amounts
3632 * of reassembly being done in the stack */
3633#define E1000_CB_LENGTH 256
a1415ee6 3634 if (length < E1000_CB_LENGTH) {
a292ca6e
JK		 3635 struct sk_buff *new_skb =
3636 dev_alloc_skb(length + NET_IP_ALIGN);
3637 if (new_skb) {
3638 skb_reserve(new_skb, NET_IP_ALIGN);
3639 new_skb->dev = netdev;
3640 memcpy(new_skb->data - NET_IP_ALIGN,
3641 skb->data - NET_IP_ALIGN,
3642 length + NET_IP_ALIGN);
3643 /* save the skb in buffer_info as good */
3644 buffer_info->skb = skb;
3645 skb = new_skb;
3646 skb_put(skb, length);
3647 }
a1415ee6
JK		 3648 } else
3649 skb_put(skb, length);
a292ca6e
JK		 3650
3651 /* end copybreak code */
1da177e4
LT		 3652
3653 /* Receive Checksum Offload */
a292ca6e
JK		 3654 e1000_rx_checksum(adapter,
3655 (uint32_t)(status) |
2d7edb92 3656 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 3657 le16_to_cpu(rx_desc->csum), skb);
96838a40 3658
1da177e4
LT		 3659 skb->protocol = eth_type_trans(skb, netdev);
3660#ifdef CONFIG_E1000_NAPI
96838a40 3661 if (unlikely(adapter->vlgrp &&
a292ca6e 3662 (status & E1000_RXD_STAT_VP))) {
1da177e4 3663 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3664 le16_to_cpu(rx_desc->special) &
3665 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3666 } else {
3667 netif_receive_skb(skb);
3668 }
3669#else /* CONFIG_E1000_NAPI */
96838a40 3670 if (unlikely(adapter->vlgrp &&
b92ff8ee 3671 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3672 vlan_hwaccel_rx(skb, adapter->vlgrp,
3673 le16_to_cpu(rx_desc->special) &
3674 E1000_RXD_SPC_VLAN_MASK);
3675 } else {
3676 netif_rx(skb);
3677 }
3678#endif /* CONFIG_E1000_NAPI */
3679 netdev->last_rx = jiffies;
3680
3681next_desc:
3682 rx_desc->status = 0;
1da177e4 3683
72d64a43
JK		 3684 /* return some buffers to hardware, one at a time is too slow */
3685 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3686 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3687 cleaned_count = 0;
3688 }
3689
30320be8 3690 /* use prefetched values */
86c3d59f
JB		 3691 rx_desc = next_rxd;
3692 buffer_info = next_buffer;
1da177e4 3693 }
1da177e4 3694 rx_ring->next_to_clean = i;
72d64a43
JK		 3695
3696 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3697 if (cleaned_count)
3698 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3699
3700 return cleaned;
3701}
3702
3703/**
3704 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3705 * @adapter: board private structure
3706 **/
3707
3708static boolean_t
3709#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3710e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3711 struct e1000_rx_ring *rx_ring,
3712 int *work_done, int work_to_do)
2d7edb92 3713#else
581d708e
MC		 3714e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3715 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3716#endif
3717{
86c3d59f 3718 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3719 struct net_device *netdev = adapter->netdev;
3720 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3721 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3722 struct e1000_ps_page *ps_page;
3723 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 3724 struct sk_buff *skb;
2d7edb92
MC		 3725 unsigned int i, j;
3726 uint32_t length, staterr;
72d64a43 3727 int cleaned_count = 0;
2d7edb92
MC		 3728 boolean_t cleaned = FALSE;
3729
3730 i = rx_ring->next_to_clean;
3731 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3732 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 3733 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3734
96838a40 3735 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3736 ps_page = &rx_ring->ps_page[i];
3737 ps_page_dma = &rx_ring->ps_page_dma[i];
3738#ifdef CONFIG_E1000_NAPI
96838a40 3739 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3740 break;
3741 (*work_done)++;
3742#endif
86c3d59f
JB		 3743 skb = buffer_info->skb;
3744
30320be8
JK		 3745 /* in the packet split case this is header only */
3746 prefetch(skb->data - NET_IP_ALIGN);
3747
86c3d59f
JB		 3748 if (++i == rx_ring->count) i = 0;
3749 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3750 prefetch(next_rxd);
3751
86c3d59f 3752 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3753
2d7edb92 3754 cleaned = TRUE;
72d64a43 3755 cleaned_count++;
2d7edb92
MC		 3756 pci_unmap_single(pdev, buffer_info->dma,
3757 buffer_info->length,
3758 PCI_DMA_FROMDEVICE);
3759
96838a40 3760 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3761 E1000_DBG("%s: Packet Split buffers didn't pick up"
3762 " the full packet\n", netdev->name);
3763 dev_kfree_skb_irq(skb);
3764 goto next_desc;
3765 }
1da177e4 3766
96838a40 3767 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3768 dev_kfree_skb_irq(skb);
3769 goto next_desc;
3770 }
3771
3772 length = le16_to_cpu(rx_desc->wb.middle.length0);
3773
96838a40 3774 if (unlikely(!length)) {
2d7edb92
MC		 3775 E1000_DBG("%s: Last part of the packet spanning"
3776 " multiple descriptors\n", netdev->name);
3777 dev_kfree_skb_irq(skb);
3778 goto next_desc;
3779 }
3780
3781 /* Good Receive */
3782 skb_put(skb, length);
3783
dc7c6add
JK		 3784 {
3785 /* this looks ugly, but it seems compiler issues make it
3786 more efficient than reusing j */
3787 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3788
3789 /* page alloc/put takes too long and effects small packet
3790 * throughput, so unsplit small packets and save the alloc/put*/
9e2feace 3791 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 3792 u8 *vaddr;
76c224bc 3793 /* there is no documentation about how to call
dc7c6add
JK		 3794 * kmap_atomic, so we can't hold the mapping
3795 * very long */
3796 pci_dma_sync_single_for_cpu(pdev,
3797 ps_page_dma->ps_page_dma[0],
3798 PAGE_SIZE,
3799 PCI_DMA_FROMDEVICE);
3800 vaddr = kmap_atomic(ps_page->ps_page[0],
3801 KM_SKB_DATA_SOFTIRQ);
3802 memcpy(skb->tail, vaddr, l1);
3803 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3804 pci_dma_sync_single_for_device(pdev,
3805 ps_page_dma->ps_page_dma[0],
3806 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3807 skb_put(skb, l1);
3808 length += l1;
3809 goto copydone;
3810 } /* if */
3811 }
3812
96838a40 3813 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 3814 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 3815 break;
2d7edb92
MC		 3816 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3817 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3818 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 3819 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3820 length);
2d7edb92 3821 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 3822 skb->len += length;
3823 skb->data_len += length;
5d51b80f 3824 skb->truesize += length;
2d7edb92
MC		 3825 }
3826
dc7c6add 3827copydone:
2d7edb92 3828 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 3829 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 3830 skb->protocol = eth_type_trans(skb, netdev);
3831
96838a40 3832 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 3833 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 3834 adapter->rx_hdr_split++;
2d7edb92 3835#ifdef CONFIG_E1000_NAPI
96838a40 3836 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3837 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3838 le16_to_cpu(rx_desc->wb.middle.vlan) &
3839 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3840 } else {
3841 netif_receive_skb(skb);
3842 }
3843#else /* CONFIG_E1000_NAPI */
96838a40 3844 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3845 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3846 le16_to_cpu(rx_desc->wb.middle.vlan) &
3847 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3848 } else {
3849 netif_rx(skb);
3850 }
3851#endif /* CONFIG_E1000_NAPI */
3852 netdev->last_rx = jiffies;
3853
3854next_desc:
c3d7a3a4 3855 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 3856 buffer_info->skb = NULL;
2d7edb92 3857
72d64a43
JK		 3858 /* return some buffers to hardware, one at a time is too slow */
3859 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3860 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3861 cleaned_count = 0;
3862 }
3863
30320be8 3864 /* use prefetched values */
86c3d59f
JB		 3865 rx_desc = next_rxd;
3866 buffer_info = next_buffer;
3867
683a38f3 3868 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3869 }
3870 rx_ring->next_to_clean = i;
72d64a43
JK		 3871
3872 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3873 if (cleaned_count)
3874 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3875
3876 return cleaned;
3877}
3878
3879/**
2d7edb92 3880 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3881 * @adapter: address of board private structure
3882 **/
3883
3884static void
581d708e 3885e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 3886 struct e1000_rx_ring *rx_ring,
a292ca6e 3887 int cleaned_count)
1da177e4 3888{
1da177e4
LT		 3889 struct net_device *netdev = adapter->netdev;
3890 struct pci_dev *pdev = adapter->pdev;
3891 struct e1000_rx_desc *rx_desc;
3892 struct e1000_buffer *buffer_info;
3893 struct sk_buff *skb;
2648345f
MC		 3894 unsigned int i;
3895 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3896
3897 i = rx_ring->next_to_use;
3898 buffer_info = &rx_ring->buffer_info[i];
3899
a292ca6e
JK		 3900 while (cleaned_count--) {
3901 if (!(skb = buffer_info->skb))
3902 skb = dev_alloc_skb(bufsz);
3903 else {
3904 skb_trim(skb, 0);
3905 goto map_skb;
3906 }
3907
96838a40 3908 if (unlikely(!skb)) {
1da177e4 3909 /* Better luck next round */
72d64a43 3910 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 3911 break;
3912 }
3913
2648345f 3914 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 3915 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3916 struct sk_buff *oldskb = skb;
2648345f
MC		 3917 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3918 "at %p\n", bufsz, skb->data);
3919 /* Try again, without freeing the previous */
1da177e4 3920 skb = dev_alloc_skb(bufsz);
2648345f 3921 /* Failed allocation, critical failure */
1da177e4
LT		 3922 if (!skb) {
3923 dev_kfree_skb(oldskb);
3924 break;
3925 }
2648345f 3926
1da177e4
LT		 3927 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3928 /* give up */
3929 dev_kfree_skb(skb);
3930 dev_kfree_skb(oldskb);
3931 break; /* while !buffer_info->skb */
3932 } else {
2648345f 3933 /* Use new allocation */
1da177e4
LT		 3934 dev_kfree_skb(oldskb);
3935 }
3936 }
1da177e4
LT		 3937 /* Make buffer alignment 2 beyond a 16 byte boundary
3938 * this will result in a 16 byte aligned IP header after
3939 * the 14 byte MAC header is removed
3940 */
3941 skb_reserve(skb, NET_IP_ALIGN);
3942
3943 skb->dev = netdev;
3944
3945 buffer_info->skb = skb;
3946 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 3947map_skb:
1da177e4
LT		 3948 buffer_info->dma = pci_map_single(pdev,
3949 skb->data,
3950 adapter->rx_buffer_len,
3951 PCI_DMA_FROMDEVICE);
3952
2648345f
MC		 3953 /* Fix for errata 23, can't cross 64kB boundary */
3954 if (!e1000_check_64k_bound(adapter,
3955 (void *)(unsigned long)buffer_info->dma,
3956 adapter->rx_buffer_len)) {
3957 DPRINTK(RX_ERR, ERR,
3958 "dma align check failed: %u bytes at %p\n",
3959 adapter->rx_buffer_len,
3960 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 3961 dev_kfree_skb(skb);
3962 buffer_info->skb = NULL;
3963
2648345f 3964 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 3965 adapter->rx_buffer_len,
3966 PCI_DMA_FROMDEVICE);
3967
3968 break; /* while !buffer_info->skb */
3969 }
1da177e4
LT		 3970 rx_desc = E1000_RX_DESC(*rx_ring, i);
3971 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3972
96838a40
JB		 3973 if (unlikely(++i == rx_ring->count))
3974 i = 0;
1da177e4
LT		 3975 buffer_info = &rx_ring->buffer_info[i];
3976 }
3977
b92ff8ee
JB		 3978 if (likely(rx_ring->next_to_use != i)) {
3979 rx_ring->next_to_use = i;
3980 if (unlikely(i-- == 0))
3981 i = (rx_ring->count - 1);
3982
3983 /* Force memory writes to complete before letting h/w
3984 * know there are new descriptors to fetch. (Only
3985 * applicable for weak-ordered memory model archs,
3986 * such as IA-64). */
3987 wmb();
3988 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3989 }
1da177e4
LT		 3990}
3991
2d7edb92
MC		 3992/**
3993 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3994 * @adapter: address of board private structure
3995 **/
3996
3997static void
581d708e 3998e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 3999 struct e1000_rx_ring *rx_ring,
4000 int cleaned_count)
2d7edb92 4001{
2d7edb92
MC		 4002 struct net_device *netdev = adapter->netdev;
4003 struct pci_dev *pdev = adapter->pdev;
4004 union e1000_rx_desc_packet_split *rx_desc;
4005 struct e1000_buffer *buffer_info;
4006 struct e1000_ps_page *ps_page;
4007 struct e1000_ps_page_dma *ps_page_dma;
4008 struct sk_buff *skb;
4009 unsigned int i, j;
4010
4011 i = rx_ring->next_to_use;
4012 buffer_info = &rx_ring->buffer_info[i];
4013 ps_page = &rx_ring->ps_page[i];
4014 ps_page_dma = &rx_ring->ps_page_dma[i];
4015
72d64a43 4016 while (cleaned_count--) {
2d7edb92
MC		 4017 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4018
96838a40 4019 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4020 if (j < adapter->rx_ps_pages) {
4021 if (likely(!ps_page->ps_page[j])) {
4022 ps_page->ps_page[j] =
4023 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4024 if (unlikely(!ps_page->ps_page[j])) {
4025 adapter->alloc_rx_buff_failed++;
e4c811c9 4026 goto no_buffers;
b92ff8ee 4027 }
e4c811c9
MC		 4028 ps_page_dma->ps_page_dma[j] =
4029 pci_map_page(pdev,
4030 ps_page->ps_page[j],
4031 0, PAGE_SIZE,
4032 PCI_DMA_FROMDEVICE);
4033 }
4034 /* Refresh the desc even if buffer_addrs didn't
96838a40 4035 * change because each write-back erases
e4c811c9
MC		 4036 * this info.
4037 */
4038 rx_desc->read.buffer_addr[j+1] =
4039 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4040 } else
4041 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4042 }
4043
4044 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4045
b92ff8ee
JB		 4046 if (unlikely(!skb)) {
4047 adapter->alloc_rx_buff_failed++;
2d7edb92 4048 break;
b92ff8ee 4049 }
2d7edb92
MC		 4050
4051 /* Make buffer alignment 2 beyond a 16 byte boundary
4052 * this will result in a 16 byte aligned IP header after
4053 * the 14 byte MAC header is removed
4054 */
4055 skb_reserve(skb, NET_IP_ALIGN);
4056
4057 skb->dev = netdev;
4058
4059 buffer_info->skb = skb;
4060 buffer_info->length = adapter->rx_ps_bsize0;
4061 buffer_info->dma = pci_map_single(pdev, skb->data,
4062 adapter->rx_ps_bsize0,
4063 PCI_DMA_FROMDEVICE);
4064
4065 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4066
96838a40 4067 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4068 buffer_info = &rx_ring->buffer_info[i];
4069 ps_page = &rx_ring->ps_page[i];
4070 ps_page_dma = &rx_ring->ps_page_dma[i];
4071 }
4072
4073no_buffers:
b92ff8ee
JB		 4074 if (likely(rx_ring->next_to_use != i)) {
4075 rx_ring->next_to_use = i;
4076 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4077
4078 /* Force memory writes to complete before letting h/w
4079 * know there are new descriptors to fetch. (Only
4080 * applicable for weak-ordered memory model archs,
4081 * such as IA-64). */
4082 wmb();
4083 /* Hardware increments by 16 bytes, but packet split
4084 * descriptors are 32 bytes...so we increment tail
4085 * twice as much.
4086 */
4087 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4088 }
2d7edb92
MC		 4089}
4090
1da177e4
LT		 4091/**
4092 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4093 * @adapter:
4094 **/
4095
4096static void
4097e1000_smartspeed(struct e1000_adapter *adapter)
4098{
4099 uint16_t phy_status;
4100 uint16_t phy_ctrl;
4101
96838a40 4102 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4103 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4104 return;
4105
96838a40 4106 if (adapter->smartspeed == 0) {
1da177e4
LT		 4107 /* If Master/Slave config fault is asserted twice,
4108 * we assume back-to-back */
4109 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4110 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4111 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4112 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4113 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4114 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4115 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4116 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4117 phy_ctrl);
4118 adapter->smartspeed++;
96838a40 4119 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4120 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4121 &phy_ctrl)) {
4122 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4123 MII_CR_RESTART_AUTO_NEG);
4124 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4125 phy_ctrl);
4126 }
4127 }
4128 return;
96838a40 4129 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4130 /* If still no link, perhaps using 2/3 pair cable */
4131 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4132 phy_ctrl |= CR_1000T_MS_ENABLE;
4133 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4134 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4135 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4136 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4137 MII_CR_RESTART_AUTO_NEG);
4138 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4139 }
4140 }
4141 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4142 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4143 adapter->smartspeed = 0;
4144}
4145
4146/**
4147 * e1000_ioctl -
4148 * @netdev:
4149 * @ifreq:
4150 * @cmd:
4151 **/
4152
4153static int
4154e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4155{
4156 switch (cmd) {
4157 case SIOCGMIIPHY:
4158 case SIOCGMIIREG:
4159 case SIOCSMIIREG:
4160 return e1000_mii_ioctl(netdev, ifr, cmd);
4161 default:
4162 return -EOPNOTSUPP;
4163 }
4164}
4165
4166/**
4167 * e1000_mii_ioctl -
4168 * @netdev:
4169 * @ifreq:
4170 * @cmd:
4171 **/
4172
4173static int
4174e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4175{
60490fe0 4176 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4177 struct mii_ioctl_data *data = if_mii(ifr);
4178 int retval;
4179 uint16_t mii_reg;
4180 uint16_t spddplx;
97876fc6 4181 unsigned long flags;
1da177e4 4182
96838a40 4183 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4184 return -EOPNOTSUPP;
4185
4186 switch (cmd) {
4187 case SIOCGMIIPHY:
4188 data->phy_id = adapter->hw.phy_addr;
4189 break;
4190 case SIOCGMIIREG:
96838a40 4191 if (!capable(CAP_NET_ADMIN))
1da177e4 4192 return -EPERM;
97876fc6 4193 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4194 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4195 &data->val_out)) {
4196 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4197 return -EIO;
97876fc6
MC		 4198 }
4199 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4200 break;
4201 case SIOCSMIIREG:
96838a40 4202 if (!capable(CAP_NET_ADMIN))
1da177e4 4203 return -EPERM;
96838a40 4204 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4205 return -EFAULT;
4206 mii_reg = data->val_in;
97876fc6 4207 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4208 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4209 mii_reg)) {
4210 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4211 return -EIO;
97876fc6 4212 }
dc86d32a 4213 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4214 switch (data->reg_num) {
4215 case PHY_CTRL:
96838a40 4216 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4217 break;
96838a40 4218 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4219 adapter->hw.autoneg = 1;
4220 adapter->hw.autoneg_advertised = 0x2F;
4221 } else {
4222 if (mii_reg & 0x40)
4223 spddplx = SPEED_1000;
4224 else if (mii_reg & 0x2000)
4225 spddplx = SPEED_100;
4226 else
4227 spddplx = SPEED_10;
4228 spddplx += (mii_reg & 0x100)
cb764326
JK		 4229 ? DUPLEX_FULL :
4230 DUPLEX_HALF;
1da177e4
LT		 4231 retval = e1000_set_spd_dplx(adapter,
4232 spddplx);
96838a40 4233 if (retval) {
97876fc6 4234 spin_unlock_irqrestore(
96838a40 4235 &adapter->stats_lock,
97876fc6 4236 flags);
1da177e4 4237 return retval;
97876fc6 4238 }
1da177e4 4239 }
2db10a08
AK		 4240 if (netif_running(adapter->netdev))
4241 e1000_reinit_locked(adapter);
4242 else
1da177e4
LT		 4243 e1000_reset(adapter);
4244 break;
4245 case M88E1000_PHY_SPEC_CTRL:
4246 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4247 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4248 spin_unlock_irqrestore(
4249 &adapter->stats_lock, flags);
1da177e4 4250 return -EIO;
97876fc6 4251 }
1da177e4
LT		 4252 break;
4253 }
4254 } else {
4255 switch (data->reg_num) {
4256 case PHY_CTRL:
96838a40 4257 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4258 break;
2db10a08
AK		 4259 if (netif_running(adapter->netdev))
4260 e1000_reinit_locked(adapter);
4261 else
1da177e4
LT		 4262 e1000_reset(adapter);
4263 break;
4264 }
4265 }
97876fc6 4266 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4267 break;
4268 default:
4269 return -EOPNOTSUPP;
4270 }
4271 return E1000_SUCCESS;
4272}
4273
4274void
4275e1000_pci_set_mwi(struct e1000_hw *hw)
4276{
4277 struct e1000_adapter *adapter = hw->back;
2648345f 4278 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4279
96838a40 4280 if (ret_val)
2648345f 4281 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4282}
4283
4284void
4285e1000_pci_clear_mwi(struct e1000_hw *hw)
4286{
4287 struct e1000_adapter *adapter = hw->back;
4288
4289 pci_clear_mwi(adapter->pdev);
4290}
4291
4292void
4293e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4294{
4295 struct e1000_adapter *adapter = hw->back;
4296
4297 pci_read_config_word(adapter->pdev, reg, value);
4298}
4299
4300void
4301e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4302{
4303 struct e1000_adapter *adapter = hw->back;
4304
4305 pci_write_config_word(adapter->pdev, reg, *value);
4306}
4307
4308uint32_t
4309e1000_io_read(struct e1000_hw *hw, unsigned long port)
4310{
4311 return inl(port);
4312}
4313
4314void
4315e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4316{
4317 outl(value, port);
4318}
4319
4320static void
4321e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4322{
60490fe0 4323 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4324 uint32_t ctrl, rctl;
4325
4326 e1000_irq_disable(adapter);
4327 adapter->vlgrp = grp;
4328
96838a40 4329 if (grp) {
1da177e4
LT		 4330 /* enable VLAN tag insert/strip */
4331 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4332 ctrl |= E1000_CTRL_VME;
4333 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4334
4335 /* enable VLAN receive filtering */
4336 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4337 rctl |= E1000_RCTL_VFE;
4338 rctl &= ~E1000_RCTL_CFIEN;
4339 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4340 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4341 } else {
4342 /* disable VLAN tag insert/strip */
4343 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4344 ctrl &= ~E1000_CTRL_VME;
4345 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4346
4347 /* disable VLAN filtering */
4348 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4349 rctl &= ~E1000_RCTL_VFE;
4350 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4351 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4352 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4353 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4354 }
1da177e4
LT		 4355 }
4356
4357 e1000_irq_enable(adapter);
4358}
4359
4360static void
4361e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4362{
60490fe0 4363 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4364 uint32_t vfta, index;
96838a40
JB		 4365
4366 if ((adapter->hw.mng_cookie.status &
4367 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4368 (vid == adapter->mng_vlan_id))
2d7edb92 4369 return;
1da177e4
LT		 4370 /* add VID to filter table */
4371 index = (vid >> 5) & 0x7F;
4372 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4373 vfta |= (1 << (vid & 0x1F));
4374 e1000_write_vfta(&adapter->hw, index, vfta);
4375}
4376
4377static void
4378e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4379{
60490fe0 4380 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4381 uint32_t vfta, index;
4382
4383 e1000_irq_disable(adapter);
4384
96838a40 4385 if (adapter->vlgrp)
1da177e4
LT		 4386 adapter->vlgrp->vlan_devices[vid] = NULL;
4387
4388 e1000_irq_enable(adapter);
4389
96838a40
JB		 4390 if ((adapter->hw.mng_cookie.status &
4391 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4392 (vid == adapter->mng_vlan_id)) {
4393 /* release control to f/w */
4394 e1000_release_hw_control(adapter);
2d7edb92 4395 return;
ff147013
JK		 4396 }
4397
1da177e4
LT		 4398 /* remove VID from filter table */
4399 index = (vid >> 5) & 0x7F;
4400 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4401 vfta &= ~(1 << (vid & 0x1F));
4402 e1000_write_vfta(&adapter->hw, index, vfta);
4403}
4404
4405static void
4406e1000_restore_vlan(struct e1000_adapter *adapter)
4407{
4408 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4409
96838a40 4410 if (adapter->vlgrp) {
1da177e4 4411 uint16_t vid;
96838a40
JB		 4412 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4413 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4414 continue;
4415 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4416 }
4417 }
4418}
4419
4420int
4421e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4422{
4423 adapter->hw.autoneg = 0;
4424
6921368f 4425 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4426 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4427 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4428 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4429 return -EINVAL;
4430 }
4431
96838a40 4432 switch (spddplx) {
1da177e4
LT		 4433 case SPEED_10 + DUPLEX_HALF:
4434 adapter->hw.forced_speed_duplex = e1000_10_half;
4435 break;
4436 case SPEED_10 + DUPLEX_FULL:
4437 adapter->hw.forced_speed_duplex = e1000_10_full;
4438 break;
4439 case SPEED_100 + DUPLEX_HALF:
4440 adapter->hw.forced_speed_duplex = e1000_100_half;
4441 break;
4442 case SPEED_100 + DUPLEX_FULL:
4443 adapter->hw.forced_speed_duplex = e1000_100_full;
4444 break;
4445 case SPEED_1000 + DUPLEX_FULL:
4446 adapter->hw.autoneg = 1;
4447 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4448 break;
4449 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4450 default:
2648345f 4451 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4452 return -EINVAL;
4453 }
4454 return 0;
4455}
4456
b6a1d5f8 4457#ifdef CONFIG_PM
0f15a8fa
JK		 4458/* Save/restore 16 or 64 dwords of PCI config space depending on which
4459 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4460 */
4461#define PCIE_CONFIG_SPACE_LEN 256
4462#define PCI_CONFIG_SPACE_LEN 64
4463static int
4464e1000_pci_save_state(struct e1000_adapter *adapter)
4465{
4466 struct pci_dev *dev = adapter->pdev;
4467 int size;
4468 int i;
0f15a8fa 4469
2f82665f
JB		 4470 if (adapter->hw.mac_type >= e1000_82571)
4471 size = PCIE_CONFIG_SPACE_LEN;
4472 else
4473 size = PCI_CONFIG_SPACE_LEN;
4474
4475 WARN_ON(adapter->config_space != NULL);
4476
4477 adapter->config_space = kmalloc(size, GFP_KERNEL);
4478 if (!adapter->config_space) {
4479 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4480 return -ENOMEM;
4481 }
4482 for (i = 0; i < (size / 4); i++)
4483 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4484 return 0;
4485}
4486
4487static void
4488e1000_pci_restore_state(struct e1000_adapter *adapter)
4489{
4490 struct pci_dev *dev = adapter->pdev;
4491 int size;
4492 int i;
0f15a8fa 4493
2f82665f
JB		 4494 if (adapter->config_space == NULL)
4495 return;
0f15a8fa 4496
2f82665f
JB		 4497 if (adapter->hw.mac_type >= e1000_82571)
4498 size = PCIE_CONFIG_SPACE_LEN;
4499 else
4500 size = PCI_CONFIG_SPACE_LEN;
4501 for (i = 0; i < (size / 4); i++)
4502 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4503 kfree(adapter->config_space);
4504 adapter->config_space = NULL;
4505 return;
4506}
4507#endif /* CONFIG_PM */
4508
1da177e4 4509static int
829ca9a3 4510e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4511{
4512 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4513 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4514 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4515 uint32_t wufc = adapter->wol;
6fdfef16 4516#ifdef CONFIG_PM
240b1710 4517 int retval = 0;
6fdfef16 4518#endif
1da177e4
LT		 4519
4520 netif_device_detach(netdev);
4521
2db10a08
AK		 4522 if (netif_running(netdev)) {
4523 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4524 e1000_down(adapter);
2db10a08 4525 }
1da177e4 4526
2f82665f 4527#ifdef CONFIG_PM
0f15a8fa
JK		 4528 /* Implement our own version of pci_save_state(pdev) because pci-
4529 * express adapters have 256-byte config spaces. */
2f82665f
JB		 4530 retval = e1000_pci_save_state(adapter);
4531 if (retval)
4532 return retval;
4533#endif
4534
1da177e4 4535 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4536 if (status & E1000_STATUS_LU)
1da177e4
LT		 4537 wufc &= ~E1000_WUFC_LNKC;
4538
96838a40 4539 if (wufc) {
1da177e4
LT		 4540 e1000_setup_rctl(adapter);
4541 e1000_set_multi(netdev);
4542
4543 /* turn on all-multi mode if wake on multicast is enabled */
96838a40 4544 if (adapter->wol & E1000_WUFC_MC) {
1da177e4
LT		 4545 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4546 rctl |= E1000_RCTL_MPE;
4547 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4548 }
4549
96838a40 4550 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4551 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4552 /* advertise wake from D3Cold */
4553 #define E1000_CTRL_ADVD3WUC 0x00100000
4554 /* phy power management enable */
4555 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4556 ctrl |= E1000_CTRL_ADVD3WUC |
4557 E1000_CTRL_EN_PHY_PWR_MGMT;
4558 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4559 }
4560
96838a40 4561 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4562 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4563 /* keep the laser running in D3 */
4564 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4565 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4566 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4567 }
4568
2d7edb92
MC		 4569 /* Allow time for pending master requests to run */
4570 e1000_disable_pciex_master(&adapter->hw);
4571
1da177e4
LT		 4572 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4573 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 4574 pci_enable_wake(pdev, PCI_D3hot, 1);
4575 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4576 } else {
4577 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4578 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 4579 pci_enable_wake(pdev, PCI_D3hot, 0);
4580 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4581 }
4582
96838a40 4583 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4584 adapter->hw.media_type == e1000_media_type_copper) {
4585 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4586 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4587 manc |= E1000_MANC_ARP_EN;
4588 E1000_WRITE_REG(&adapter->hw, MANC, manc);
d0e027db
AK		 4589 pci_enable_wake(pdev, PCI_D3hot, 1);
4590 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4591 }
4592 }
4593
b55ccb35
JK		 4594 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4595 * would have already happened in close and is redundant. */
4596 e1000_release_hw_control(adapter);
2d7edb92 4597
1da177e4 4598 pci_disable_device(pdev);
240b1710 4599
d0e027db 4600 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4601
4602 return 0;
4603}
4604
2f82665f 4605#ifdef CONFIG_PM
1da177e4
LT		 4606static int
4607e1000_resume(struct pci_dev *pdev)
4608{
4609 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4610 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4611 uint32_t manc, ret_val;
1da177e4 4612
d0e027db 4613 pci_set_power_state(pdev, PCI_D0);
2f82665f 4614 e1000_pci_restore_state(adapter);
2b02893e 4615 ret_val = pci_enable_device(pdev);
a4cb847d 4616 pci_set_master(pdev);
1da177e4 4617
d0e027db
AK		 4618 pci_enable_wake(pdev, PCI_D3hot, 0);
4619 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4620
4621 e1000_reset(adapter);
4622 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4623
96838a40 4624 if (netif_running(netdev))
1da177e4
LT		 4625 e1000_up(adapter);
4626
4627 netif_device_attach(netdev);
4628
96838a40 4629 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4630 adapter->hw.media_type == e1000_media_type_copper) {
4631 manc = E1000_READ_REG(&adapter->hw, MANC);
4632 manc &= ~(E1000_MANC_ARP_EN);
4633 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4634 }
4635
b55ccb35
JK		 4636 /* If the controller is 82573 and f/w is AMT, do not set
4637 * DRV_LOAD until the interface is up. For all other cases,
4638 * let the f/w know that the h/w is now under the control
4639 * of the driver. */
4640 if (adapter->hw.mac_type != e1000_82573 ||
4641 !e1000_check_mng_mode(&adapter->hw))
4642 e1000_get_hw_control(adapter);
2d7edb92 4643
1da177e4
LT		 4644 return 0;
4645}
4646#endif
c653e635
AK		 4647
4648static void e1000_shutdown(struct pci_dev *pdev)
4649{
4650 e1000_suspend(pdev, PMSG_SUSPEND);
4651}
4652
1da177e4
LT		 4653#ifdef CONFIG_NET_POLL_CONTROLLER
4654/*
4655 * Polling 'interrupt' - used by things like netconsole to send skbs
4656 * without having to re-enable interrupts. It's not called while
4657 * the interrupt routine is executing.
4658 */
4659static void
2648345f 4660e1000_netpoll(struct net_device *netdev)
1da177e4 4661{
60490fe0 4662 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4663 disable_irq(adapter->pdev->irq);
4664 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4665 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4666#ifndef CONFIG_E1000_NAPI
4667 adapter->clean_rx(adapter, adapter->rx_ring);
4668#endif
1da177e4
LT		 4669 enable_irq(adapter->pdev->irq);
4670}
4671#endif
4672
9026729b
AK		 4673/**
4674 * e1000_io_error_detected - called when PCI error is detected
4675 * @pdev: Pointer to PCI device
4676 * @state: The current pci conneection state
4677 *
4678 * This function is called after a PCI bus error affecting
4679 * this device has been detected.
4680 */
4681static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4682{
4683 struct net_device *netdev = pci_get_drvdata(pdev);
4684 struct e1000_adapter *adapter = netdev->priv;
4685
4686 netif_device_detach(netdev);
4687
4688 if (netif_running(netdev))
4689 e1000_down(adapter);
4690
4691 /* Request a slot slot reset. */
4692 return PCI_ERS_RESULT_NEED_RESET;
4693}
4694
4695/**
4696 * e1000_io_slot_reset - called after the pci bus has been reset.
4697 * @pdev: Pointer to PCI device
4698 *
4699 * Restart the card from scratch, as if from a cold-boot. Implementation
4700 * resembles the first-half of the e1000_resume routine.
4701 */
4702static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4703{
4704 struct net_device *netdev = pci_get_drvdata(pdev);
4705 struct e1000_adapter *adapter = netdev->priv;
4706
4707 if (pci_enable_device(pdev)) {
4708 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4709 return PCI_ERS_RESULT_DISCONNECT;
4710 }
4711 pci_set_master(pdev);
4712
4713 pci_enable_wake(pdev, 3, 0);
4714 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4715
4716 /* Perform card reset only on one instance of the card */
4717 if (PCI_FUNC (pdev->devfn) != 0)
4718 return PCI_ERS_RESULT_RECOVERED;
4719
4720 e1000_reset(adapter);
4721 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4722
4723 return PCI_ERS_RESULT_RECOVERED;
4724}
4725
4726/**
4727 * e1000_io_resume - called when traffic can start flowing again.
4728 * @pdev: Pointer to PCI device
4729 *
4730 * This callback is called when the error recovery driver tells us that
4731 * its OK to resume normal operation. Implementation resembles the
4732 * second-half of the e1000_resume routine.
4733 */
4734static void e1000_io_resume(struct pci_dev *pdev)
4735{
4736 struct net_device *netdev = pci_get_drvdata(pdev);
4737 struct e1000_adapter *adapter = netdev->priv;
4738 uint32_t manc, swsm;
4739
4740 if (netif_running(netdev)) {
4741 if (e1000_up(adapter)) {
4742 printk("e1000: can't bring device back up after reset\n");
4743 return;
4744 }
4745 }
4746
4747 netif_device_attach(netdev);
4748
4749 if (adapter->hw.mac_type >= e1000_82540 &&
4750 adapter->hw.media_type == e1000_media_type_copper) {
4751 manc = E1000_READ_REG(&adapter->hw, MANC);
4752 manc &= ~(E1000_MANC_ARP_EN);
4753 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4754 }
4755
4756 switch (adapter->hw.mac_type) {
4757 case e1000_82573:
4758 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4759 E1000_WRITE_REG(&adapter->hw, SWSM,
4760 swsm | E1000_SWSM_DRV_LOAD);
4761 break;
4762 default:
4763 break;
4764 }
4765
4766 if (netif_running(netdev))
4767 mod_timer(&adapter->watchdog_timer, jiffies);
4768}
4769
1da177e4 4770/* e1000_main.c */
Linux kernel - Deliverables
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