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e1000: Use module param array code
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
3d41e30a 4 Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
3d41e30a 25 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 26 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27
28*******************************************************************************/
29
30#include "e1000.h"
31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 34#ifndef CONFIG_E1000_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
dc335d97 39#define DRV_VERSION "7.1.9-k6"DRIVERNAPI
1da177e4 40char e1000_driver_version[] = DRV_VERSION;
3d41e30a 41static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 42
43/* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50static struct pci_device_id e1000_pci_tbl[] = {
1da177e4
LT		 51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
ae2c3860
AK		 75 INTEL_E1000_ETHERNET_DEVICE(0x1049),
76 INTEL_E1000_ETHERNET_DEVICE(0x104A),
77 INTEL_E1000_ETHERNET_DEVICE(0x104B),
78 INTEL_E1000_ETHERNET_DEVICE(0x104C),
79 INTEL_E1000_ETHERNET_DEVICE(0x104D),
07b8fede
MC		 80 INTEL_E1000_ETHERNET_DEVICE(0x105E),
81 INTEL_E1000_ETHERNET_DEVICE(0x105F),
82 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 83 INTEL_E1000_ETHERNET_DEVICE(0x1075),
84 INTEL_E1000_ETHERNET_DEVICE(0x1076),
85 INTEL_E1000_ETHERNET_DEVICE(0x1077),
86 INTEL_E1000_ETHERNET_DEVICE(0x1078),
87 INTEL_E1000_ETHERNET_DEVICE(0x1079),
88 INTEL_E1000_ETHERNET_DEVICE(0x107A),
89 INTEL_E1000_ETHERNET_DEVICE(0x107B),
90 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 91 INTEL_E1000_ETHERNET_DEVICE(0x107D),
92 INTEL_E1000_ETHERNET_DEVICE(0x107E),
93 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 94 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 95 INTEL_E1000_ETHERNET_DEVICE(0x108B),
96 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 97 INTEL_E1000_ETHERNET_DEVICE(0x1096),
98 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 99 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
b7ee49db 101 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 102 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
ae2c3860
AK		 103 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
104 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
1da177e4
LT		 105 /* required last entry */
106 {0,}
107};
108
109MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
110
3ad2cc67 111static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 112 struct e1000_tx_ring *txdr);
3ad2cc67 113static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 114 struct e1000_rx_ring *rxdr);
3ad2cc67 115static void e1000_free_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 116 struct e1000_tx_ring *tx_ring);
3ad2cc67 117static void e1000_free_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 118 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 119
120/* Local Function Prototypes */
121
122static int e1000_init_module(void);
123static void e1000_exit_module(void);
124static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
125static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 126static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 127static int e1000_sw_init(struct e1000_adapter *adapter);
128static int e1000_open(struct net_device *netdev);
129static int e1000_close(struct net_device *netdev);
130static void e1000_configure_tx(struct e1000_adapter *adapter);
131static void e1000_configure_rx(struct e1000_adapter *adapter);
132static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 133static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
134static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
135static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
136 struct e1000_tx_ring *tx_ring);
137static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 139static void e1000_set_multi(struct net_device *netdev);
140static void e1000_update_phy_info(unsigned long data);
141static void e1000_watchdog(unsigned long data);
1da177e4
LT		 142static void e1000_82547_tx_fifo_stall(unsigned long data);
143static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
144static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
145static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
146static int e1000_set_mac(struct net_device *netdev, void *p);
147static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 148static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
149 struct e1000_tx_ring *tx_ring);
1da177e4 150#ifdef CONFIG_E1000_NAPI
581d708e 151static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 152static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 153 struct e1000_rx_ring *rx_ring,
1da177e4 154 int *work_done, int work_to_do);
2d7edb92 155static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 156 struct e1000_rx_ring *rx_ring,
2d7edb92 157 int *work_done, int work_to_do);
1da177e4 158#else
581d708e
MC		 159static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
160 struct e1000_rx_ring *rx_ring);
161static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
162 struct e1000_rx_ring *rx_ring);
1da177e4 163#endif
581d708e 164static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 165 struct e1000_rx_ring *rx_ring,
166 int cleaned_count);
581d708e 167static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 168 struct e1000_rx_ring *rx_ring,
169 int cleaned_count);
1da177e4
LT		 170static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
171static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
172 int cmd);
1da177e4
LT		 173static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
174static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
175static void e1000_tx_timeout(struct net_device *dev);
87041639 176static void e1000_reset_task(struct net_device *dev);
1da177e4 177static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 178static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
179 struct sk_buff *skb);
1da177e4
LT		 180
181static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
182static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
183static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
184static void e1000_restore_vlan(struct e1000_adapter *adapter);
185
977e74b5 186static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 187#ifdef CONFIG_PM
1da177e4
LT		 188static int e1000_resume(struct pci_dev *pdev);
189#endif
c653e635 190static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 191
192#ifdef CONFIG_NET_POLL_CONTROLLER
193/* for netdump / net console */
194static void e1000_netpoll (struct net_device *netdev);
195#endif
196
9026729b
AK		 197static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
198 pci_channel_state_t state);
199static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
200static void e1000_io_resume(struct pci_dev *pdev);
201
202static struct pci_error_handlers e1000_err_handler = {
203 .error_detected = e1000_io_error_detected,
204 .slot_reset = e1000_io_slot_reset,
205 .resume = e1000_io_resume,
206};
24025e4e 207
1da177e4
LT		 208static struct pci_driver e1000_driver = {
209 .name = e1000_driver_name,
210 .id_table = e1000_pci_tbl,
211 .probe = e1000_probe,
212 .remove = __devexit_p(e1000_remove),
213 /* Power Managment Hooks */
1da177e4 214 .suspend = e1000_suspend,
6fdfef16 215#ifdef CONFIG_PM
c653e635 216 .resume = e1000_resume,
1da177e4 217#endif
9026729b
AK		 218 .shutdown = e1000_shutdown,
219 .err_handler = &e1000_err_handler
1da177e4
LT		 220};
221
222MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
223MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
224MODULE_LICENSE("GPL");
225MODULE_VERSION(DRV_VERSION);
226
227static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
228module_param(debug, int, 0);
229MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
230
231/**
232 * e1000_init_module - Driver Registration Routine
233 *
234 * e1000_init_module is the first routine called when the driver is
235 * loaded. All it does is register with the PCI subsystem.
236 **/
237
238static int __init
239e1000_init_module(void)
240{
241 int ret;
242 printk(KERN_INFO "%s - version %s\n",
243 e1000_driver_string, e1000_driver_version);
244
245 printk(KERN_INFO "%s\n", e1000_copyright);
246
29917620 247 ret = pci_register_driver(&e1000_driver);
8b378def 248
1da177e4
LT		 249 return ret;
250}
251
252module_init(e1000_init_module);
253
254/**
255 * e1000_exit_module - Driver Exit Cleanup Routine
256 *
257 * e1000_exit_module is called just before the driver is removed
258 * from memory.
259 **/
260
261static void __exit
262e1000_exit_module(void)
263{
1da177e4
LT		 264 pci_unregister_driver(&e1000_driver);
265}
266
267module_exit(e1000_exit_module);
268
2db10a08
AK		 269static int e1000_request_irq(struct e1000_adapter *adapter)
270{
271 struct net_device *netdev = adapter->netdev;
272 int flags, err = 0;
273
c0bc8721 274 flags = IRQF_SHARED;
2db10a08
AK		 275#ifdef CONFIG_PCI_MSI
276 if (adapter->hw.mac_type > e1000_82547_rev_2) {
277 adapter->have_msi = TRUE;
278 if ((err = pci_enable_msi(adapter->pdev))) {
279 DPRINTK(PROBE, ERR,
280 "Unable to allocate MSI interrupt Error: %d\n", err);
281 adapter->have_msi = FALSE;
282 }
283 }
284 if (adapter->have_msi)
61ef5c00 285 flags &= ~IRQF_SHARED;
2db10a08
AK		 286#endif
287 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
288 netdev->name, netdev)))
289 DPRINTK(PROBE, ERR,
290 "Unable to allocate interrupt Error: %d\n", err);
291
292 return err;
293}
294
295static void e1000_free_irq(struct e1000_adapter *adapter)
296{
297 struct net_device *netdev = adapter->netdev;
298
299 free_irq(adapter->pdev->irq, netdev);
300
301#ifdef CONFIG_PCI_MSI
302 if (adapter->have_msi)
303 pci_disable_msi(adapter->pdev);
304#endif
305}
306
1da177e4
LT		 307/**
308 * e1000_irq_disable - Mask off interrupt generation on the NIC
309 * @adapter: board private structure
310 **/
311
e619d523 312static void
1da177e4
LT		 313e1000_irq_disable(struct e1000_adapter *adapter)
314{
315 atomic_inc(&adapter->irq_sem);
316 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
317 E1000_WRITE_FLUSH(&adapter->hw);
318 synchronize_irq(adapter->pdev->irq);
319}
320
321/**
322 * e1000_irq_enable - Enable default interrupt generation settings
323 * @adapter: board private structure
324 **/
325
e619d523 326static void
1da177e4
LT		 327e1000_irq_enable(struct e1000_adapter *adapter)
328{
96838a40 329 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 330 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
331 E1000_WRITE_FLUSH(&adapter->hw);
332 }
333}
3ad2cc67
AB		 334
335static void
2d7edb92
MC		 336e1000_update_mng_vlan(struct e1000_adapter *adapter)
337{
338 struct net_device *netdev = adapter->netdev;
339 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
340 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 341 if (adapter->vlgrp) {
342 if (!adapter->vlgrp->vlan_devices[vid]) {
343 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 344 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
345 e1000_vlan_rx_add_vid(netdev, vid);
346 adapter->mng_vlan_id = vid;
347 } else
348 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 349
350 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
351 (vid != old_vid) &&
2d7edb92
MC		 352 !adapter->vlgrp->vlan_devices[old_vid])
353 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 354 } else
355 adapter->mng_vlan_id = vid;
2d7edb92
MC		 356 }
357}
b55ccb35
JK		 358
359/**
360 * e1000_release_hw_control - release control of the h/w to f/w
361 * @adapter: address of board private structure
362 *
363 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
364 * For ASF and Pass Through versions of f/w this means that the
365 * driver is no longer loaded. For AMT version (only with 82573) i
366 * of the f/w this means that the netowrk i/f is closed.
76c224bc 367 *
b55ccb35
JK		 368 **/
369
e619d523 370static void
b55ccb35
JK		 371e1000_release_hw_control(struct e1000_adapter *adapter)
372{
373 uint32_t ctrl_ext;
374 uint32_t swsm;
cd94dd0b 375 uint32_t extcnf;
b55ccb35
JK		 376
377 /* Let firmware taken over control of h/w */
378 switch (adapter->hw.mac_type) {
379 case e1000_82571:
380 case e1000_82572:
4cc15f54 381 case e1000_80003es2lan:
b55ccb35
JK		 382 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
383 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
384 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
385 break;
386 case e1000_82573:
387 swsm = E1000_READ_REG(&adapter->hw, SWSM);
388 E1000_WRITE_REG(&adapter->hw, SWSM,
389 swsm & ~E1000_SWSM_DRV_LOAD);
cd94dd0b
AK		 390 case e1000_ich8lan:
391 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
392 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
393 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
394 break;
b55ccb35
JK		 395 default:
396 break;
397 }
398}
399
400/**
401 * e1000_get_hw_control - get control of the h/w from f/w
402 * @adapter: address of board private structure
403 *
404 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 405 * For ASF and Pass Through versions of f/w this means that
406 * the driver is loaded. For AMT version (only with 82573)
b55ccb35 407 * of the f/w this means that the netowrk i/f is open.
76c224bc 408 *
b55ccb35
JK		 409 **/
410
e619d523 411static void
b55ccb35
JK		 412e1000_get_hw_control(struct e1000_adapter *adapter)
413{
414 uint32_t ctrl_ext;
415 uint32_t swsm;
cd94dd0b 416 uint32_t extcnf;
b55ccb35
JK		 417 /* Let firmware know the driver has taken over */
418 switch (adapter->hw.mac_type) {
419 case e1000_82571:
420 case e1000_82572:
4cc15f54 421 case e1000_80003es2lan:
b55ccb35
JK		 422 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
423 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
424 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
425 break;
426 case e1000_82573:
427 swsm = E1000_READ_REG(&adapter->hw, SWSM);
428 E1000_WRITE_REG(&adapter->hw, SWSM,
429 swsm | E1000_SWSM_DRV_LOAD);
430 break;
cd94dd0b
AK		 431 case e1000_ich8lan:
432 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
433 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
434 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
435 break;
b55ccb35
JK		 436 default:
437 break;
438 }
439}
440
1da177e4
LT		 441int
442e1000_up(struct e1000_adapter *adapter)
443{
444 struct net_device *netdev = adapter->netdev;
2db10a08 445 int i;
1da177e4
LT		 446
447 /* hardware has been reset, we need to reload some things */
448
1da177e4
LT		 449 e1000_set_multi(netdev);
450
451 e1000_restore_vlan(adapter);
452
453 e1000_configure_tx(adapter);
454 e1000_setup_rctl(adapter);
455 e1000_configure_rx(adapter);
72d64a43
JK		 456 /* call E1000_DESC_UNUSED which always leaves
457 * at least 1 descriptor unused to make sure
458 * next_to_use != next_to_clean */
f56799ea 459 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 460 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 461 adapter->alloc_rx_buf(adapter, ring,
462 E1000_DESC_UNUSED(ring));
f56799ea 463 }
1da177e4 464
7bfa4816
JK		 465 adapter->tx_queue_len = netdev->tx_queue_len;
466
1da177e4 467 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 468
469#ifdef CONFIG_E1000_NAPI
470 netif_poll_enable(netdev);
471#endif
5de55624
MC		 472 e1000_irq_enable(adapter);
473
1da177e4
LT		 474 return 0;
475}
476
79f05bf0
AK		 477/**
478 * e1000_power_up_phy - restore link in case the phy was powered down
479 * @adapter: address of board private structure
480 *
481 * The phy may be powered down to save power and turn off link when the
482 * driver is unloaded and wake on lan is not enabled (among others)
483 * *** this routine MUST be followed by a call to e1000_reset ***
484 *
485 **/
486
d658266e 487void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0
AK		 488{
489 uint16_t mii_reg = 0;
490
491 /* Just clear the power down bit to wake the phy back up */
492 if (adapter->hw.media_type == e1000_media_type_copper) {
493 /* according to the manual, the phy will retain its
494 * settings across a power-down/up cycle */
495 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
496 mii_reg &= ~MII_CR_POWER_DOWN;
497 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
498 }
499}
500
501static void e1000_power_down_phy(struct e1000_adapter *adapter)
502{
503 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
504 e1000_check_mng_mode(&adapter->hw);
505 /* Power down the PHY so no link is implied when interface is down
506 * The PHY cannot be powered down if any of the following is TRUE
507 * (a) WoL is enabled
508 * (b) AMT is active
509 * (c) SoL/IDER session is active */
510 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 511 adapter->hw.mac_type != e1000_ich8lan &&
79f05bf0
AK		 512 adapter->hw.media_type == e1000_media_type_copper &&
513 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
514 !mng_mode_enabled &&
515 !e1000_check_phy_reset_block(&adapter->hw)) {
516 uint16_t mii_reg = 0;
517 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
518 mii_reg |= MII_CR_POWER_DOWN;
519 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
520 mdelay(1);
521 }
522}
523
1da177e4
LT		 524void
525e1000_down(struct e1000_adapter *adapter)
526{
527 struct net_device *netdev = adapter->netdev;
528
529 e1000_irq_disable(adapter);
c1605eb3 530
1da177e4
LT		 531 del_timer_sync(&adapter->tx_fifo_stall_timer);
532 del_timer_sync(&adapter->watchdog_timer);
533 del_timer_sync(&adapter->phy_info_timer);
534
535#ifdef CONFIG_E1000_NAPI
536 netif_poll_disable(netdev);
537#endif
7bfa4816 538 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 539 adapter->link_speed = 0;
540 adapter->link_duplex = 0;
541 netif_carrier_off(netdev);
542 netif_stop_queue(netdev);
543
544 e1000_reset(adapter);
581d708e
MC		 545 e1000_clean_all_tx_rings(adapter);
546 e1000_clean_all_rx_rings(adapter);
1da177e4 547}
1da177e4 548
2db10a08
AK		 549void
550e1000_reinit_locked(struct e1000_adapter *adapter)
551{
552 WARN_ON(in_interrupt());
553 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
554 msleep(1);
555 e1000_down(adapter);
556 e1000_up(adapter);
557 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 558}
559
560void
561e1000_reset(struct e1000_adapter *adapter)
562{
2d7edb92 563 uint32_t pba, manc;
1125ecbc 564 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 565
566 /* Repartition Pba for greater than 9k mtu
567 * To take effect CTRL.RST is required.
568 */
569
2d7edb92
MC		 570 switch (adapter->hw.mac_type) {
571 case e1000_82547:
0e6ef3e0 572 case e1000_82547_rev_2:
2d7edb92
MC		 573 pba = E1000_PBA_30K;
574 break;
868d5309
MC		 575 case e1000_82571:
576 case e1000_82572:
6418ecc6 577 case e1000_80003es2lan:
868d5309
MC		 578 pba = E1000_PBA_38K;
579 break;
2d7edb92
MC		 580 case e1000_82573:
581 pba = E1000_PBA_12K;
582 break;
cd94dd0b
AK		 583 case e1000_ich8lan:
584 pba = E1000_PBA_8K;
585 break;
2d7edb92
MC		 586 default:
587 pba = E1000_PBA_48K;
588 break;
589 }
590
96838a40 591 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 592 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 593 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 594
595
96838a40 596 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 597 adapter->tx_fifo_head = 0;
598 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
599 adapter->tx_fifo_size =
600 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
601 atomic_set(&adapter->tx_fifo_stall, 0);
602 }
2d7edb92 603
1da177e4
LT		 604 E1000_WRITE_REG(&adapter->hw, PBA, pba);
605
606 /* flow control settings */
f11b7f85
JK		 607 /* Set the FC high water mark to 90% of the FIFO size.
608 * Required to clear last 3 LSB */
609 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 610 /* We can't use 90% on small FIFOs because the remainder
611 * would be less than 1 full frame. In this case, we size
612 * it to allow at least a full frame above the high water
613 * mark. */
614 if (pba < E1000_PBA_16K)
615 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85
JK		 616
617 adapter->hw.fc_high_water = fc_high_water_mark;
618 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 619 if (adapter->hw.mac_type == e1000_80003es2lan)
620 adapter->hw.fc_pause_time = 0xFFFF;
621 else
622 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 623 adapter->hw.fc_send_xon = 1;
624 adapter->hw.fc = adapter->hw.original_fc;
625
2d7edb92 626 /* Allow time for pending master requests to run */
1da177e4 627 e1000_reset_hw(&adapter->hw);
96838a40 628 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 629 E1000_WRITE_REG(&adapter->hw, WUC, 0);
96838a40 630 if (e1000_init_hw(&adapter->hw))
1da177e4 631 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 632 e1000_update_mng_vlan(adapter);
1da177e4
LT		 633 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
634 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
635
636 e1000_reset_adaptive(&adapter->hw);
637 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 638
639 if (!adapter->smart_power_down &&
640 (adapter->hw.mac_type == e1000_82571 ||
641 adapter->hw.mac_type == e1000_82572)) {
642 uint16_t phy_data = 0;
643 /* speed up time to link by disabling smart power down, ignore
644 * the return value of this function because there is nothing
645 * different we would do if it failed */
646 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
647 &phy_data);
648 phy_data &= ~IGP02E1000_PM_SPD;
649 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
650 phy_data);
651 }
652
cd94dd0b
AK		 653 if (adapter->hw.mac_type < e1000_ich8lan)
654 /* FIXME: this code is duplicate and wrong for PCI Express */
2d7edb92
MC		 655 if (adapter->en_mng_pt) {
656 manc = E1000_READ_REG(&adapter->hw, MANC);
657 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
658 E1000_WRITE_REG(&adapter->hw, MANC, manc);
659 }
1da177e4
LT		 660}
661
662/**
663 * e1000_probe - Device Initialization Routine
664 * @pdev: PCI device information struct
665 * @ent: entry in e1000_pci_tbl
666 *
667 * Returns 0 on success, negative on failure
668 *
669 * e1000_probe initializes an adapter identified by a pci_dev structure.
670 * The OS initialization, configuring of the adapter private structure,
671 * and a hardware reset occur.
672 **/
673
674static int __devinit
675e1000_probe(struct pci_dev *pdev,
676 const struct pci_device_id *ent)
677{
678 struct net_device *netdev;
679 struct e1000_adapter *adapter;
2d7edb92 680 unsigned long mmio_start, mmio_len;
cd94dd0b 681 unsigned long flash_start, flash_len;
2d7edb92 682
1da177e4 683 static int cards_found = 0;
84916829 684 static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
2d7edb92 685 int i, err, pci_using_dac;
1da177e4
LT		 686 uint16_t eeprom_data;
687 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 688 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 689 return err;
690
cd94dd0b
AK		 691 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
692 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 693 pci_using_dac = 1;
694 } else {
cd94dd0b
AK		 695 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
696 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 697 E1000_ERR("No usable DMA configuration, aborting\n");
6dd62ab0 698 goto err_dma;
1da177e4
LT		 699 }
700 pci_using_dac = 0;
701 }
702
96838a40 703 if ((err = pci_request_regions(pdev, e1000_driver_name)))
6dd62ab0 704 goto err_pci_reg;
1da177e4
LT		 705
706 pci_set_master(pdev);
707
6dd62ab0 708 err = -ENOMEM;
1da177e4 709 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 710 if (!netdev)
1da177e4 711 goto err_alloc_etherdev;
1da177e4
LT		 712
713 SET_MODULE_OWNER(netdev);
714 SET_NETDEV_DEV(netdev, &pdev->dev);
715
716 pci_set_drvdata(pdev, netdev);
60490fe0 717 adapter = netdev_priv(netdev);
1da177e4
LT		 718 adapter->netdev = netdev;
719 adapter->pdev = pdev;
720 adapter->hw.back = adapter;
721 adapter->msg_enable = (1 << debug) - 1;
722
723 mmio_start = pci_resource_start(pdev, BAR_0);
724 mmio_len = pci_resource_len(pdev, BAR_0);
725
6dd62ab0 726 err = -EIO;
1da177e4 727 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6dd62ab0 728 if (!adapter->hw.hw_addr)
1da177e4 729 goto err_ioremap;
1da177e4 730
96838a40
JB		 731 for (i = BAR_1; i <= BAR_5; i++) {
732 if (pci_resource_len(pdev, i) == 0)
1da177e4 733 continue;
96838a40 734 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 735 adapter->hw.io_base = pci_resource_start(pdev, i);
736 break;
737 }
738 }
739
740 netdev->open = &e1000_open;
741 netdev->stop = &e1000_close;
742 netdev->hard_start_xmit = &e1000_xmit_frame;
743 netdev->get_stats = &e1000_get_stats;
744 netdev->set_multicast_list = &e1000_set_multi;
745 netdev->set_mac_address = &e1000_set_mac;
746 netdev->change_mtu = &e1000_change_mtu;
747 netdev->do_ioctl = &e1000_ioctl;
748 e1000_set_ethtool_ops(netdev);
749 netdev->tx_timeout = &e1000_tx_timeout;
750 netdev->watchdog_timeo = 5 * HZ;
751#ifdef CONFIG_E1000_NAPI
752 netdev->poll = &e1000_clean;
753 netdev->weight = 64;
754#endif
755 netdev->vlan_rx_register = e1000_vlan_rx_register;
756 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
757 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
758#ifdef CONFIG_NET_POLL_CONTROLLER
759 netdev->poll_controller = e1000_netpoll;
760#endif
761 strcpy(netdev->name, pci_name(pdev));
762
763 netdev->mem_start = mmio_start;
764 netdev->mem_end = mmio_start + mmio_len;
765 netdev->base_addr = adapter->hw.io_base;
766
767 adapter->bd_number = cards_found;
768
769 /* setup the private structure */
770
96838a40 771 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 772 goto err_sw_init;
773
6dd62ab0 774 err = -EIO;
cd94dd0b
AK		 775 /* Flash BAR mapping must happen after e1000_sw_init
776 * because it depends on mac_type */
777 if ((adapter->hw.mac_type == e1000_ich8lan) &&
778 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
779 flash_start = pci_resource_start(pdev, 1);
780 flash_len = pci_resource_len(pdev, 1);
781 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6dd62ab0 782 if (!adapter->hw.flash_address)
cd94dd0b 783 goto err_flashmap;
cd94dd0b
AK		 784 }
785
6dd62ab0 786 if (e1000_check_phy_reset_block(&adapter->hw))
2d7edb92
MC		 787 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
788
84916829 789 /* if ksp3, indicate if it's port a being setup */
76c224bc
AK		 790 if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
791 e1000_ksp3_port_a == 0)
84916829
JK		 792 adapter->ksp3_port_a = 1;
793 e1000_ksp3_port_a++;
794 /* Reset for multiple KP3 adapters */
795 if (e1000_ksp3_port_a == 4)
796 e1000_ksp3_port_a = 0;
797
96838a40 798 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 799 netdev->features = NETIF_F_SG |
800 NETIF_F_HW_CSUM |
801 NETIF_F_HW_VLAN_TX |
802 NETIF_F_HW_VLAN_RX |
803 NETIF_F_HW_VLAN_FILTER;
cd94dd0b
AK		 804 if (adapter->hw.mac_type == e1000_ich8lan)
805 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 806 }
807
808#ifdef NETIF_F_TSO
96838a40 809 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 810 (adapter->hw.mac_type != e1000_82547))
811 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 812
813#ifdef NETIF_F_TSO_IPV6
96838a40 814 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 815 netdev->features |= NETIF_F_TSO_IPV6;
816#endif
1da177e4 817#endif
96838a40 818 if (pci_using_dac)
1da177e4
LT		 819 netdev->features |= NETIF_F_HIGHDMA;
820
76c224bc
AK		 821 netdev->features |= NETIF_F_LLTX;
822
2d7edb92
MC		 823 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
824
cd94dd0b
AK		 825 /* initialize eeprom parameters */
826
827 if (e1000_init_eeprom_params(&adapter->hw)) {
828 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 829 goto err_eeprom;
cd94dd0b
AK		 830 }
831
96838a40 832 /* before reading the EEPROM, reset the controller to
1da177e4 833 * put the device in a known good starting state */
96838a40 834
1da177e4
LT		 835 e1000_reset_hw(&adapter->hw);
836
837 /* make sure the EEPROM is good */
838
96838a40 839 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4 840 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 841 goto err_eeprom;
842 }
843
844 /* copy the MAC address out of the EEPROM */
845
96838a40 846 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 847 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
848 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 849 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 850
96838a40 851 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4 852 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 853 goto err_eeprom;
854 }
855
1da177e4
LT		 856 e1000_get_bus_info(&adapter->hw);
857
858 init_timer(&adapter->tx_fifo_stall_timer);
859 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
860 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
861
862 init_timer(&adapter->watchdog_timer);
863 adapter->watchdog_timer.function = &e1000_watchdog;
864 adapter->watchdog_timer.data = (unsigned long) adapter;
865
1da177e4
LT		 866 init_timer(&adapter->phy_info_timer);
867 adapter->phy_info_timer.function = &e1000_update_phy_info;
868 adapter->phy_info_timer.data = (unsigned long) adapter;
869
87041639
JK		 870 INIT_WORK(&adapter->reset_task,
871 (void (*)(void *))e1000_reset_task, netdev);
1da177e4
LT		 872
873 /* we're going to reset, so assume we have no link for now */
874
875 netif_carrier_off(netdev);
876 netif_stop_queue(netdev);
877
878 e1000_check_options(adapter);
879
880 /* Initial Wake on LAN setting
881 * If APM wake is enabled in the EEPROM,
882 * enable the ACPI Magic Packet filter
883 */
884
96838a40 885 switch (adapter->hw.mac_type) {
1da177e4
LT		 886 case e1000_82542_rev2_0:
887 case e1000_82542_rev2_1:
888 case e1000_82543:
889 break;
890 case e1000_82544:
891 e1000_read_eeprom(&adapter->hw,
892 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
893 eeprom_apme_mask = E1000_EEPROM_82544_APM;
894 break;
cd94dd0b
AK		 895 case e1000_ich8lan:
896 e1000_read_eeprom(&adapter->hw,
897 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
898 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
899 break;
1da177e4
LT		 900 case e1000_82546:
901 case e1000_82546_rev_3:
fd803241 902 case e1000_82571:
6418ecc6 903 case e1000_80003es2lan:
96838a40 904 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 905 e1000_read_eeprom(&adapter->hw,
906 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
907 break;
908 }
909 /* Fall Through */
910 default:
911 e1000_read_eeprom(&adapter->hw,
912 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
913 break;
914 }
96838a40 915 if (eeprom_data & eeprom_apme_mask)
1da177e4
LT		 916 adapter->wol |= E1000_WUFC_MAG;
917
fb3d47d4
JK		 918 /* print bus type/speed/width info */
919 {
920 struct e1000_hw *hw = &adapter->hw;
921 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
922 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
923 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
924 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
925 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
926 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
927 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
928 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
929 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
930 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
931 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
932 "32-bit"));
933 }
934
935 for (i = 0; i < 6; i++)
936 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
937
1da177e4
LT		 938 /* reset the hardware with the new settings */
939 e1000_reset(adapter);
940
b55ccb35
JK		 941 /* If the controller is 82573 and f/w is AMT, do not set
942 * DRV_LOAD until the interface is up. For all other cases,
943 * let the f/w know that the h/w is now under the control
944 * of the driver. */
945 if (adapter->hw.mac_type != e1000_82573 ||
946 !e1000_check_mng_mode(&adapter->hw))
947 e1000_get_hw_control(adapter);
2d7edb92 948
1da177e4 949 strcpy(netdev->name, "eth%d");
96838a40 950 if ((err = register_netdev(netdev)))
1da177e4
LT		 951 goto err_register;
952
953 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
954
955 cards_found++;
956 return 0;
957
958err_register:
6dd62ab0
VA		 959 e1000_release_hw_control(adapter);
960err_eeprom:
961 if (!e1000_check_phy_reset_block(&adapter->hw))
962 e1000_phy_hw_reset(&adapter->hw);
963
cd94dd0b
AK		 964 if (adapter->hw.flash_address)
965 iounmap(adapter->hw.flash_address);
966err_flashmap:
6dd62ab0
VA		 967#ifdef CONFIG_E1000_NAPI
968 for (i = 0; i < adapter->num_rx_queues; i++)
969 dev_put(&adapter->polling_netdev[i]);
970#endif
971
972 kfree(adapter->tx_ring);
973 kfree(adapter->rx_ring);
974#ifdef CONFIG_E1000_NAPI
975 kfree(adapter->polling_netdev);
976#endif
1da177e4 977err_sw_init:
1da177e4
LT		 978 iounmap(adapter->hw.hw_addr);
979err_ioremap:
980 free_netdev(netdev);
981err_alloc_etherdev:
982 pci_release_regions(pdev);
6dd62ab0
VA		 983err_pci_reg:
984err_dma:
985 pci_disable_device(pdev);
1da177e4
LT		 986 return err;
987}
988
989/**
990 * e1000_remove - Device Removal Routine
991 * @pdev: PCI device information struct
992 *
993 * e1000_remove is called by the PCI subsystem to alert the driver
994 * that it should release a PCI device. The could be caused by a
995 * Hot-Plug event, or because the driver is going to be removed from
996 * memory.
997 **/
998
999static void __devexit
1000e1000_remove(struct pci_dev *pdev)
1001{
1002 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1003 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 1004 uint32_t manc;
581d708e
MC		 1005#ifdef CONFIG_E1000_NAPI
1006 int i;
1007#endif
1da177e4 1008
be2b28ed
JG		 1009 flush_scheduled_work();
1010
96838a40 1011 if (adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 1012 adapter->hw.mac_type != e1000_ich8lan &&
1da177e4
LT		 1013 adapter->hw.media_type == e1000_media_type_copper) {
1014 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 1015 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 1016 manc |= E1000_MANC_ARP_EN;
1017 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1018 }
1019 }
1020
b55ccb35
JK		 1021 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1022 * would have already happened in close and is redundant. */
1023 e1000_release_hw_control(adapter);
2d7edb92 1024
1da177e4 1025 unregister_netdev(netdev);
581d708e 1026#ifdef CONFIG_E1000_NAPI
f56799ea 1027 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1028 dev_put(&adapter->polling_netdev[i]);
581d708e 1029#endif
1da177e4 1030
96838a40 1031 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 1032 e1000_phy_hw_reset(&adapter->hw);
1da177e4 1033
24025e4e
MC		 1034 kfree(adapter->tx_ring);
1035 kfree(adapter->rx_ring);
1036#ifdef CONFIG_E1000_NAPI
1037 kfree(adapter->polling_netdev);
1038#endif
1039
1da177e4 1040 iounmap(adapter->hw.hw_addr);
cd94dd0b
AK		 1041 if (adapter->hw.flash_address)
1042 iounmap(adapter->hw.flash_address);
1da177e4
LT		 1043 pci_release_regions(pdev);
1044
1045 free_netdev(netdev);
1046
1047 pci_disable_device(pdev);
1048}
1049
1050/**
1051 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1052 * @adapter: board private structure to initialize
1053 *
1054 * e1000_sw_init initializes the Adapter private data structure.
1055 * Fields are initialized based on PCI device information and
1056 * OS network device settings (MTU size).
1057 **/
1058
1059static int __devinit
1060e1000_sw_init(struct e1000_adapter *adapter)
1061{
1062 struct e1000_hw *hw = &adapter->hw;
1063 struct net_device *netdev = adapter->netdev;
1064 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1065#ifdef CONFIG_E1000_NAPI
1066 int i;
1067#endif
1da177e4
LT		 1068
1069 /* PCI config space info */
1070
1071 hw->vendor_id = pdev->vendor;
1072 hw->device_id = pdev->device;
1073 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1074 hw->subsystem_id = pdev->subsystem_device;
1075
1076 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1077
1078 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1079
eb0f8054 1080 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
9e2feace 1081 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1082 hw->max_frame_size = netdev->mtu +
1083 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1084 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1085
1086 /* identify the MAC */
1087
96838a40 1088 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1089 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1090 return -EIO;
1091 }
1092
96838a40 1093 switch (hw->mac_type) {
1da177e4
LT		 1094 default:
1095 break;
1096 case e1000_82541:
1097 case e1000_82547:
1098 case e1000_82541_rev_2:
1099 case e1000_82547_rev_2:
1100 hw->phy_init_script = 1;
1101 break;
1102 }
1103
1104 e1000_set_media_type(hw);
1105
1106 hw->wait_autoneg_complete = FALSE;
1107 hw->tbi_compatibility_en = TRUE;
1108 hw->adaptive_ifs = TRUE;
1109
1110 /* Copper options */
1111
96838a40 1112 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1113 hw->mdix = AUTO_ALL_MODES;
1114 hw->disable_polarity_correction = FALSE;
1115 hw->master_slave = E1000_MASTER_SLAVE;
1116 }
1117
f56799ea
JK		 1118 adapter->num_tx_queues = 1;
1119 adapter->num_rx_queues = 1;
581d708e
MC		 1120
1121 if (e1000_alloc_queues(adapter)) {
1122 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1123 return -ENOMEM;
1124 }
1125
1126#ifdef CONFIG_E1000_NAPI
f56799ea 1127 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1128 adapter->polling_netdev[i].priv = adapter;
1129 adapter->polling_netdev[i].poll = &e1000_clean;
1130 adapter->polling_netdev[i].weight = 64;
1131 dev_hold(&adapter->polling_netdev[i]);
1132 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1133 }
7bfa4816 1134 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1135#endif
1136
1da177e4
LT		 1137 atomic_set(&adapter->irq_sem, 1);
1138 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1139
1140 return 0;
1141}
1142
581d708e
MC		 1143/**
1144 * e1000_alloc_queues - Allocate memory for all rings
1145 * @adapter: board private structure to initialize
1146 *
1147 * We allocate one ring per queue at run-time since we don't know the
1148 * number of queues at compile-time. The polling_netdev array is
1149 * intended for Multiqueue, but should work fine with a single queue.
1150 **/
1151
1152static int __devinit
1153e1000_alloc_queues(struct e1000_adapter *adapter)
1154{
1155 int size;
1156
f56799ea 1157 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1158 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1159 if (!adapter->tx_ring)
1160 return -ENOMEM;
1161 memset(adapter->tx_ring, 0, size);
1162
f56799ea 1163 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1164 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1165 if (!adapter->rx_ring) {
1166 kfree(adapter->tx_ring);
1167 return -ENOMEM;
1168 }
1169 memset(adapter->rx_ring, 0, size);
1170
1171#ifdef CONFIG_E1000_NAPI
f56799ea 1172 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1173 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1174 if (!adapter->polling_netdev) {
1175 kfree(adapter->tx_ring);
1176 kfree(adapter->rx_ring);
1177 return -ENOMEM;
1178 }
1179 memset(adapter->polling_netdev, 0, size);
1180#endif
1181
1182 return E1000_SUCCESS;
1183}
1184
1da177e4
LT		 1185/**
1186 * e1000_open - Called when a network interface is made active
1187 * @netdev: network interface device structure
1188 *
1189 * Returns 0 on success, negative value on failure
1190 *
1191 * The open entry point is called when a network interface is made
1192 * active by the system (IFF_UP). At this point all resources needed
1193 * for transmit and receive operations are allocated, the interrupt
1194 * handler is registered with the OS, the watchdog timer is started,
1195 * and the stack is notified that the interface is ready.
1196 **/
1197
1198static int
1199e1000_open(struct net_device *netdev)
1200{
60490fe0 1201 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1202 int err;
1203
2db10a08
AK		 1204 /* disallow open during test */
1205 if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
1206 return -EBUSY;
1207
1da177e4
LT		 1208 /* allocate transmit descriptors */
1209
581d708e 1210 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1211 goto err_setup_tx;
1212
1213 /* allocate receive descriptors */
1214
581d708e 1215 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1216 goto err_setup_rx;
1217
2db10a08
AK		 1218 err = e1000_request_irq(adapter);
1219 if (err)
401a552b 1220 goto err_req_irq;
2db10a08 1221
79f05bf0
AK		 1222 e1000_power_up_phy(adapter);
1223
96838a40 1224 if ((err = e1000_up(adapter)))
1da177e4 1225 goto err_up;
2d7edb92 1226 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1227 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1228 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1229 e1000_update_mng_vlan(adapter);
1230 }
1da177e4 1231
b55ccb35
JK		 1232 /* If AMT is enabled, let the firmware know that the network
1233 * interface is now open */
1234 if (adapter->hw.mac_type == e1000_82573 &&
1235 e1000_check_mng_mode(&adapter->hw))
1236 e1000_get_hw_control(adapter);
1237
1da177e4
LT		 1238 return E1000_SUCCESS;
1239
1240err_up:
401a552b
VA		 1241 e1000_power_down_phy(adapter);
1242 e1000_free_irq(adapter);
1243err_req_irq:
581d708e 1244 e1000_free_all_rx_resources(adapter);
1da177e4 1245err_setup_rx:
581d708e 1246 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1247err_setup_tx:
1248 e1000_reset(adapter);
1249
1250 return err;
1251}
1252
1253/**
1254 * e1000_close - Disables a network interface
1255 * @netdev: network interface device structure
1256 *
1257 * Returns 0, this is not allowed to fail
1258 *
1259 * The close entry point is called when an interface is de-activated
1260 * by the OS. The hardware is still under the drivers control, but
1261 * needs to be disabled. A global MAC reset is issued to stop the
1262 * hardware, and all transmit and receive resources are freed.
1263 **/
1264
1265static int
1266e1000_close(struct net_device *netdev)
1267{
60490fe0 1268 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1269
2db10a08 1270 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1271 e1000_down(adapter);
79f05bf0 1272 e1000_power_down_phy(adapter);
2db10a08 1273 e1000_free_irq(adapter);
1da177e4 1274
581d708e
MC		 1275 e1000_free_all_tx_resources(adapter);
1276 e1000_free_all_rx_resources(adapter);
1da177e4 1277
96838a40 1278 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1279 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1280 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1281 }
b55ccb35
JK		 1282
1283 /* If AMT is enabled, let the firmware know that the network
1284 * interface is now closed */
1285 if (adapter->hw.mac_type == e1000_82573 &&
1286 e1000_check_mng_mode(&adapter->hw))
1287 e1000_release_hw_control(adapter);
1288
1da177e4
LT		 1289 return 0;
1290}
1291
1292/**
1293 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1294 * @adapter: address of board private structure
2d7edb92
MC		 1295 * @start: address of beginning of memory
1296 * @len: length of memory
1da177e4 1297 **/
e619d523 1298static boolean_t
1da177e4
LT		 1299e1000_check_64k_bound(struct e1000_adapter *adapter,
1300 void *start, unsigned long len)
1301{
1302 unsigned long begin = (unsigned long) start;
1303 unsigned long end = begin + len;
1304
2648345f
MC		 1305 /* First rev 82545 and 82546 need to not allow any memory
1306 * write location to cross 64k boundary due to errata 23 */
1da177e4 1307 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1308 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1309 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1310 }
1311
1312 return TRUE;
1313}
1314
1315/**
1316 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1317 * @adapter: board private structure
581d708e 1318 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1319 *
1320 * Return 0 on success, negative on failure
1321 **/
1322
3ad2cc67 1323static int
581d708e
MC		 1324e1000_setup_tx_resources(struct e1000_adapter *adapter,
1325 struct e1000_tx_ring *txdr)
1da177e4 1326{
1da177e4
LT		 1327 struct pci_dev *pdev = adapter->pdev;
1328 int size;
1329
1330 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1331 txdr->buffer_info = vmalloc(size);
96838a40 1332 if (!txdr->buffer_info) {
2648345f
MC		 1333 DPRINTK(PROBE, ERR,
1334 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1335 return -ENOMEM;
1336 }
1337 memset(txdr->buffer_info, 0, size);
1338
1339 /* round up to nearest 4K */
1340
1341 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1342 E1000_ROUNDUP(txdr->size, 4096);
1343
1344 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1345 if (!txdr->desc) {
1da177e4 1346setup_tx_desc_die:
1da177e4 1347 vfree(txdr->buffer_info);
2648345f
MC		 1348 DPRINTK(PROBE, ERR,
1349 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1350 return -ENOMEM;
1351 }
1352
2648345f 1353 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1354 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1355 void *olddesc = txdr->desc;
1356 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1357 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1358 "at %p\n", txdr->size, txdr->desc);
1359 /* Try again, without freeing the previous */
1da177e4 1360 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1361 /* Failed allocation, critical failure */
96838a40 1362 if (!txdr->desc) {
1da177e4
LT		 1363 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1364 goto setup_tx_desc_die;
1365 }
1366
1367 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1368 /* give up */
2648345f
MC		 1369 pci_free_consistent(pdev, txdr->size, txdr->desc,
1370 txdr->dma);
1da177e4
LT		 1371 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1372 DPRINTK(PROBE, ERR,
2648345f
MC		 1373 "Unable to allocate aligned memory "
1374 "for the transmit descriptor ring\n");
1da177e4
LT		 1375 vfree(txdr->buffer_info);
1376 return -ENOMEM;
1377 } else {
2648345f 1378 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1379 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1380 }
1381 }
1382 memset(txdr->desc, 0, txdr->size);
1383
1384 txdr->next_to_use = 0;
1385 txdr->next_to_clean = 0;
2ae76d98 1386 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1387
1388 return 0;
1389}
1390
581d708e
MC		 1391/**
1392 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1393 * (Descriptors) for all queues
1394 * @adapter: board private structure
1395 *
581d708e
MC		 1396 * Return 0 on success, negative on failure
1397 **/
1398
1399int
1400e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1401{
1402 int i, err = 0;
1403
f56799ea 1404 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1405 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1406 if (err) {
1407 DPRINTK(PROBE, ERR,
1408 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1409 for (i-- ; i >= 0; i--)
1410 e1000_free_tx_resources(adapter,
1411 &adapter->tx_ring[i]);
581d708e
MC		 1412 break;
1413 }
1414 }
1415
1416 return err;
1417}
1418
1da177e4
LT		 1419/**
1420 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1421 * @adapter: board private structure
1422 *
1423 * Configure the Tx unit of the MAC after a reset.
1424 **/
1425
1426static void
1427e1000_configure_tx(struct e1000_adapter *adapter)
1428{
581d708e
MC		 1429 uint64_t tdba;
1430 struct e1000_hw *hw = &adapter->hw;
1431 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1432 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1433
1434 /* Setup the HW Tx Head and Tail descriptor pointers */
1435
f56799ea 1436 switch (adapter->num_tx_queues) {
24025e4e
MC		 1437 case 1:
1438 default:
581d708e
MC		 1439 tdba = adapter->tx_ring[0].dma;
1440 tdlen = adapter->tx_ring[0].count *
1441 sizeof(struct e1000_tx_desc);
581d708e 1442 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1443 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1444 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1445 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1446 E1000_WRITE_REG(hw, TDH, 0);
581d708e
MC		 1447 adapter->tx_ring[0].tdh = E1000_TDH;
1448 adapter->tx_ring[0].tdt = E1000_TDT;
24025e4e
MC		 1449 break;
1450 }
1da177e4
LT		 1451
1452 /* Set the default values for the Tx Inter Packet Gap timer */
1453
0fadb059
JK		 1454 if (hw->media_type == e1000_media_type_fiber ||
1455 hw->media_type == e1000_media_type_internal_serdes)
1456 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1457 else
1458 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1459
581d708e 1460 switch (hw->mac_type) {
1da177e4
LT		 1461 case e1000_82542_rev2_0:
1462 case e1000_82542_rev2_1:
1463 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1464 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1465 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1466 break;
87041639
JK		 1467 case e1000_80003es2lan:
1468 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1469 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1470 break;
1da177e4 1471 default:
0fadb059
JK		 1472 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1473 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1474 break;
1da177e4 1475 }
0fadb059
JK		 1476 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1477 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1478 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1479
1480 /* Set the Tx Interrupt Delay register */
1481
581d708e
MC		 1482 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1483 if (hw->mac_type >= e1000_82540)
1484 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1485
1486 /* Program the Transmit Control Register */
1487
581d708e 1488 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1489
1490 tctl &= ~E1000_TCTL_CT;
7e6c9861 1491 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1492 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1493
7e6c9861
JK		 1494#ifdef DISABLE_MULR
1495 /* disable Multiple Reads for debugging */
1496 tctl &= ~E1000_TCTL_MULR;
1497#endif
1da177e4 1498
2ae76d98
MC		 1499 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1500 tarc = E1000_READ_REG(hw, TARC0);
1501 tarc |= ((1 << 25) | (1 << 21));
1502 E1000_WRITE_REG(hw, TARC0, tarc);
1503 tarc = E1000_READ_REG(hw, TARC1);
1504 tarc |= (1 << 25);
1505 if (tctl & E1000_TCTL_MULR)
1506 tarc &= ~(1 << 28);
1507 else
1508 tarc |= (1 << 28);
1509 E1000_WRITE_REG(hw, TARC1, tarc);
87041639
JK		 1510 } else if (hw->mac_type == e1000_80003es2lan) {
1511 tarc = E1000_READ_REG(hw, TARC0);
1512 tarc |= 1;
87041639
JK		 1513 E1000_WRITE_REG(hw, TARC0, tarc);
1514 tarc = E1000_READ_REG(hw, TARC1);
1515 tarc |= 1;
1516 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1517 }
1518
581d708e 1519 e1000_config_collision_dist(hw);
1da177e4
LT		 1520
1521 /* Setup Transmit Descriptor Settings for eop descriptor */
1522 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1523 E1000_TXD_CMD_IFCS;
1524
581d708e 1525 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1526 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1527 else
1528 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1529
1530 /* Cache if we're 82544 running in PCI-X because we'll
1531 * need this to apply a workaround later in the send path. */
581d708e
MC		 1532 if (hw->mac_type == e1000_82544 &&
1533 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1534 adapter->pcix_82544 = 1;
7e6c9861
JK		 1535
1536 E1000_WRITE_REG(hw, TCTL, tctl);
1537
1da177e4
LT		 1538}
1539
1540/**
1541 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1542 * @adapter: board private structure
581d708e 1543 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1544 *
1545 * Returns 0 on success, negative on failure
1546 **/
1547
3ad2cc67 1548static int
581d708e
MC		 1549e1000_setup_rx_resources(struct e1000_adapter *adapter,
1550 struct e1000_rx_ring *rxdr)
1da177e4 1551{
1da177e4 1552 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1553 int size, desc_len;
1da177e4
LT		 1554
1555 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1556 rxdr->buffer_info = vmalloc(size);
581d708e 1557 if (!rxdr->buffer_info) {
2648345f
MC		 1558 DPRINTK(PROBE, ERR,
1559 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1560 return -ENOMEM;
1561 }
1562 memset(rxdr->buffer_info, 0, size);
1563
2d7edb92
MC		 1564 size = sizeof(struct e1000_ps_page) * rxdr->count;
1565 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1566 if (!rxdr->ps_page) {
2d7edb92
MC		 1567 vfree(rxdr->buffer_info);
1568 DPRINTK(PROBE, ERR,
1569 "Unable to allocate memory for the receive descriptor ring\n");
1570 return -ENOMEM;
1571 }
1572 memset(rxdr->ps_page, 0, size);
1573
1574 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1575 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1576 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1577 vfree(rxdr->buffer_info);
1578 kfree(rxdr->ps_page);
1579 DPRINTK(PROBE, ERR,
1580 "Unable to allocate memory for the receive descriptor ring\n");
1581 return -ENOMEM;
1582 }
1583 memset(rxdr->ps_page_dma, 0, size);
1584
96838a40 1585 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1586 desc_len = sizeof(struct e1000_rx_desc);
1587 else
1588 desc_len = sizeof(union e1000_rx_desc_packet_split);
1589
1da177e4
LT		 1590 /* Round up to nearest 4K */
1591
2d7edb92 1592 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1593 E1000_ROUNDUP(rxdr->size, 4096);
1594
1595 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1596
581d708e
MC		 1597 if (!rxdr->desc) {
1598 DPRINTK(PROBE, ERR,
1599 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1600setup_rx_desc_die:
1da177e4 1601 vfree(rxdr->buffer_info);
2d7edb92
MC		 1602 kfree(rxdr->ps_page);
1603 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1604 return -ENOMEM;
1605 }
1606
2648345f 1607 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1608 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1609 void *olddesc = rxdr->desc;
1610 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1611 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1612 "at %p\n", rxdr->size, rxdr->desc);
1613 /* Try again, without freeing the previous */
1da177e4 1614 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1615 /* Failed allocation, critical failure */
581d708e 1616 if (!rxdr->desc) {
1da177e4 1617 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1618 DPRINTK(PROBE, ERR,
1619 "Unable to allocate memory "
1620 "for the receive descriptor ring\n");
1da177e4
LT		 1621 goto setup_rx_desc_die;
1622 }
1623
1624 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1625 /* give up */
2648345f
MC		 1626 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1627 rxdr->dma);
1da177e4 1628 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1629 DPRINTK(PROBE, ERR,
1630 "Unable to allocate aligned memory "
1631 "for the receive descriptor ring\n");
581d708e 1632 goto setup_rx_desc_die;
1da177e4 1633 } else {
2648345f 1634 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1635 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1636 }
1637 }
1638 memset(rxdr->desc, 0, rxdr->size);
1639
1640 rxdr->next_to_clean = 0;
1641 rxdr->next_to_use = 0;
1642
1643 return 0;
1644}
1645
581d708e
MC		 1646/**
1647 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1648 * (Descriptors) for all queues
1649 * @adapter: board private structure
1650 *
581d708e
MC		 1651 * Return 0 on success, negative on failure
1652 **/
1653
1654int
1655e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1656{
1657 int i, err = 0;
1658
f56799ea 1659 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1660 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1661 if (err) {
1662 DPRINTK(PROBE, ERR,
1663 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1664 for (i-- ; i >= 0; i--)
1665 e1000_free_rx_resources(adapter,
1666 &adapter->rx_ring[i]);
581d708e
MC		 1667 break;
1668 }
1669 }
1670
1671 return err;
1672}
1673
1da177e4 1674/**
2648345f 1675 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1676 * @adapter: Board private structure
1677 **/
e4c811c9
MC		 1678#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1679 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1680static void
1681e1000_setup_rctl(struct e1000_adapter *adapter)
1682{
2d7edb92
MC		 1683 uint32_t rctl, rfctl;
1684 uint32_t psrctl = 0;
35ec56bb 1685#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1686 uint32_t pages = 0;
1687#endif
1da177e4
LT		 1688
1689 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1690
1691 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1692
1693 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1694 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1695 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1696
0fadb059 1697 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1698 rctl |= E1000_RCTL_SBP;
1699 else
1700 rctl &= ~E1000_RCTL_SBP;
1701
2d7edb92
MC		 1702 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1703 rctl &= ~E1000_RCTL_LPE;
1704 else
1705 rctl |= E1000_RCTL_LPE;
1706
1da177e4 1707 /* Setup buffer sizes */
9e2feace
AK		 1708 rctl &= ~E1000_RCTL_SZ_4096;
1709 rctl |= E1000_RCTL_BSEX;
1710 switch (adapter->rx_buffer_len) {
1711 case E1000_RXBUFFER_256:
1712 rctl |= E1000_RCTL_SZ_256;
1713 rctl &= ~E1000_RCTL_BSEX;
1714 break;
1715 case E1000_RXBUFFER_512:
1716 rctl |= E1000_RCTL_SZ_512;
1717 rctl &= ~E1000_RCTL_BSEX;
1718 break;
1719 case E1000_RXBUFFER_1024:
1720 rctl |= E1000_RCTL_SZ_1024;
1721 rctl &= ~E1000_RCTL_BSEX;
1722 break;
a1415ee6
JK		 1723 case E1000_RXBUFFER_2048:
1724 default:
1725 rctl |= E1000_RCTL_SZ_2048;
1726 rctl &= ~E1000_RCTL_BSEX;
1727 break;
1728 case E1000_RXBUFFER_4096:
1729 rctl |= E1000_RCTL_SZ_4096;
1730 break;
1731 case E1000_RXBUFFER_8192:
1732 rctl |= E1000_RCTL_SZ_8192;
1733 break;
1734 case E1000_RXBUFFER_16384:
1735 rctl |= E1000_RCTL_SZ_16384;
1736 break;
2d7edb92
MC		 1737 }
1738
35ec56bb 1739#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1740 /* 82571 and greater support packet-split where the protocol
1741 * header is placed in skb->data and the packet data is
1742 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1743 * In the case of a non-split, skb->data is linearly filled,
1744 * followed by the page buffers. Therefore, skb->data is
1745 * sized to hold the largest protocol header.
1746 */
e4c811c9
MC		 1747 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1748 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1749 PAGE_SIZE <= 16384)
1750 adapter->rx_ps_pages = pages;
1751 else
1752 adapter->rx_ps_pages = 0;
2d7edb92 1753#endif
e4c811c9 1754 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1755 /* Configure extra packet-split registers */
1756 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1757 rfctl |= E1000_RFCTL_EXTEN;
1758 /* disable IPv6 packet split support */
1759 rfctl |= E1000_RFCTL_IPV6_DIS;
1760 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1761
7dfee0cb 1762 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1763
2d7edb92
MC		 1764 psrctl |= adapter->rx_ps_bsize0 >>
1765 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1766
1767 switch (adapter->rx_ps_pages) {
1768 case 3:
1769 psrctl |= PAGE_SIZE <<
1770 E1000_PSRCTL_BSIZE3_SHIFT;
1771 case 2:
1772 psrctl |= PAGE_SIZE <<
1773 E1000_PSRCTL_BSIZE2_SHIFT;
1774 case 1:
1775 psrctl |= PAGE_SIZE >>
1776 E1000_PSRCTL_BSIZE1_SHIFT;
1777 break;
1778 }
2d7edb92
MC		 1779
1780 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1781 }
1782
1783 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1784}
1785
1786/**
1787 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1788 * @adapter: board private structure
1789 *
1790 * Configure the Rx unit of the MAC after a reset.
1791 **/
1792
1793static void
1794e1000_configure_rx(struct e1000_adapter *adapter)
1795{
581d708e
MC		 1796 uint64_t rdba;
1797 struct e1000_hw *hw = &adapter->hw;
1798 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1799
e4c811c9 1800 if (adapter->rx_ps_pages) {
0f15a8fa 1801 /* this is a 32 byte descriptor */
581d708e 1802 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1803 sizeof(union e1000_rx_desc_packet_split);
1804 adapter->clean_rx = e1000_clean_rx_irq_ps;
1805 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1806 } else {
581d708e
MC		 1807 rdlen = adapter->rx_ring[0].count *
1808 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1809 adapter->clean_rx = e1000_clean_rx_irq;
1810 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1811 }
1da177e4
LT		 1812
1813 /* disable receives while setting up the descriptors */
581d708e
MC		 1814 rctl = E1000_READ_REG(hw, RCTL);
1815 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1816
1817 /* set the Receive Delay Timer Register */
581d708e 1818 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1819
581d708e
MC		 1820 if (hw->mac_type >= e1000_82540) {
1821 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1822 if (adapter->itr > 1)
581d708e 1823 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1824 1000000000 / (adapter->itr * 256));
1825 }
1826
2ae76d98 1827 if (hw->mac_type >= e1000_82571) {
2ae76d98 1828 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1829 /* Reset delay timers after every interrupt */
6fc7a7ec 1830 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9
JK		 1831#ifdef CONFIG_E1000_NAPI
1832 /* Auto-Mask interrupts upon ICR read. */
1833 ctrl_ext |= E1000_CTRL_EXT_IAME;
1834#endif
2ae76d98 1835 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1836 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1837 E1000_WRITE_FLUSH(hw);
1838 }
1839
581d708e
MC		 1840 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1841 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1842 switch (adapter->num_rx_queues) {
24025e4e
MC		 1843 case 1:
1844 default:
581d708e 1845 rdba = adapter->rx_ring[0].dma;
581d708e 1846 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 1847 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1848 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 1849 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 1850 E1000_WRITE_REG(hw, RDH, 0);
581d708e
MC		 1851 adapter->rx_ring[0].rdh = E1000_RDH;
1852 adapter->rx_ring[0].rdt = E1000_RDT;
1853 break;
24025e4e
MC		 1854 }
1855
1da177e4 1856 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1857 if (hw->mac_type >= e1000_82543) {
1858 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1859 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1860 rxcsum |= E1000_RXCSUM_TUOFL;
1861
868d5309 1862 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1863 * Must be used in conjunction with packet-split. */
96838a40
JB		 1864 if ((hw->mac_type >= e1000_82571) &&
1865 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1866 rxcsum |= E1000_RXCSUM_IPPCSE;
1867 }
1868 } else {
1869 rxcsum &= ~E1000_RXCSUM_TUOFL;
1870 /* don't need to clear IPPCSE as it defaults to 0 */
1871 }
581d708e 1872 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1873 }
1874
1875 /* Enable Receives */
581d708e 1876 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1877}
1878
1879/**
581d708e 1880 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1881 * @adapter: board private structure
581d708e 1882 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1883 *
1884 * Free all transmit software resources
1885 **/
1886
3ad2cc67 1887static void
581d708e
MC		 1888e1000_free_tx_resources(struct e1000_adapter *adapter,
1889 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1890{
1891 struct pci_dev *pdev = adapter->pdev;
1892
581d708e 1893 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1894
581d708e
MC		 1895 vfree(tx_ring->buffer_info);
1896 tx_ring->buffer_info = NULL;
1da177e4 1897
581d708e 1898 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1899
581d708e
MC		 1900 tx_ring->desc = NULL;
1901}
1902
1903/**
1904 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1905 * @adapter: board private structure
1906 *
1907 * Free all transmit software resources
1908 **/
1909
1910void
1911e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1912{
1913 int i;
1914
f56799ea 1915 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1916 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1917}
1918
e619d523 1919static void
1da177e4
LT		 1920e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1921 struct e1000_buffer *buffer_info)
1922{
96838a40 1923 if (buffer_info->dma) {
2648345f
MC		 1924 pci_unmap_page(adapter->pdev,
1925 buffer_info->dma,
1926 buffer_info->length,
1927 PCI_DMA_TODEVICE);
1da177e4 1928 }
8241e35e 1929 if (buffer_info->skb)
1da177e4 1930 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1931 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1932}
1933
1934/**
1935 * e1000_clean_tx_ring - Free Tx Buffers
1936 * @adapter: board private structure
581d708e 1937 * @tx_ring: ring to be cleaned
1da177e4
LT		 1938 **/
1939
1940static void
581d708e
MC		 1941e1000_clean_tx_ring(struct e1000_adapter *adapter,
1942 struct e1000_tx_ring *tx_ring)
1da177e4 1943{
1da177e4
LT		 1944 struct e1000_buffer *buffer_info;
1945 unsigned long size;
1946 unsigned int i;
1947
1948 /* Free all the Tx ring sk_buffs */
1949
96838a40 1950 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1951 buffer_info = &tx_ring->buffer_info[i];
1952 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1953 }
1954
1955 size = sizeof(struct e1000_buffer) * tx_ring->count;
1956 memset(tx_ring->buffer_info, 0, size);
1957
1958 /* Zero out the descriptor ring */
1959
1960 memset(tx_ring->desc, 0, tx_ring->size);
1961
1962 tx_ring->next_to_use = 0;
1963 tx_ring->next_to_clean = 0;
fd803241 1964 tx_ring->last_tx_tso = 0;
1da177e4 1965
581d708e
MC		 1966 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1967 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1968}
1969
1970/**
1971 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1972 * @adapter: board private structure
1973 **/
1974
1975static void
1976e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1977{
1978 int i;
1979
f56799ea 1980 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1981 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1982}
1983
1984/**
1985 * e1000_free_rx_resources - Free Rx Resources
1986 * @adapter: board private structure
581d708e 1987 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1988 *
1989 * Free all receive software resources
1990 **/
1991
3ad2cc67 1992static void
581d708e
MC		 1993e1000_free_rx_resources(struct e1000_adapter *adapter,
1994 struct e1000_rx_ring *rx_ring)
1da177e4 1995{
1da177e4
LT		 1996 struct pci_dev *pdev = adapter->pdev;
1997
581d708e 1998 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1999
2000 vfree(rx_ring->buffer_info);
2001 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2002 kfree(rx_ring->ps_page);
2003 rx_ring->ps_page = NULL;
2004 kfree(rx_ring->ps_page_dma);
2005 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2006
2007 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2008
2009 rx_ring->desc = NULL;
2010}
2011
2012/**
581d708e 2013 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2014 * @adapter: board private structure
581d708e
MC		 2015 *
2016 * Free all receive software resources
2017 **/
2018
2019void
2020e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2021{
2022 int i;
2023
f56799ea 2024 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2025 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2026}
2027
2028/**
2029 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2030 * @adapter: board private structure
2031 * @rx_ring: ring to free buffers from
1da177e4
LT		 2032 **/
2033
2034static void
581d708e
MC		 2035e1000_clean_rx_ring(struct e1000_adapter *adapter,
2036 struct e1000_rx_ring *rx_ring)
1da177e4 2037{
1da177e4 2038 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2039 struct e1000_ps_page *ps_page;
2040 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2041 struct pci_dev *pdev = adapter->pdev;
2042 unsigned long size;
2d7edb92 2043 unsigned int i, j;
1da177e4
LT		 2044
2045 /* Free all the Rx ring sk_buffs */
96838a40 2046 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2047 buffer_info = &rx_ring->buffer_info[i];
96838a40 2048 if (buffer_info->skb) {
1da177e4
LT		 2049 pci_unmap_single(pdev,
2050 buffer_info->dma,
2051 buffer_info->length,
2052 PCI_DMA_FROMDEVICE);
2053
2054 dev_kfree_skb(buffer_info->skb);
2055 buffer_info->skb = NULL;
997f5cbd
JK		 2056 }
2057 ps_page = &rx_ring->ps_page[i];
2058 ps_page_dma = &rx_ring->ps_page_dma[i];
2059 for (j = 0; j < adapter->rx_ps_pages; j++) {
2060 if (!ps_page->ps_page[j]) break;
2061 pci_unmap_page(pdev,
2062 ps_page_dma->ps_page_dma[j],
2063 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2064 ps_page_dma->ps_page_dma[j] = 0;
2065 put_page(ps_page->ps_page[j]);
2066 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2067 }
2068 }
2069
2070 size = sizeof(struct e1000_buffer) * rx_ring->count;
2071 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2072 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2073 memset(rx_ring->ps_page, 0, size);
2074 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2075 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2076
2077 /* Zero out the descriptor ring */
2078
2079 memset(rx_ring->desc, 0, rx_ring->size);
2080
2081 rx_ring->next_to_clean = 0;
2082 rx_ring->next_to_use = 0;
2083
581d708e
MC		 2084 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2085 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2086}
2087
2088/**
2089 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2090 * @adapter: board private structure
2091 **/
2092
2093static void
2094e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2095{
2096 int i;
2097
f56799ea 2098 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2099 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2100}
2101
2102/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2103 * and memory write and invalidate disabled for certain operations
2104 */
2105static void
2106e1000_enter_82542_rst(struct e1000_adapter *adapter)
2107{
2108 struct net_device *netdev = adapter->netdev;
2109 uint32_t rctl;
2110
2111 e1000_pci_clear_mwi(&adapter->hw);
2112
2113 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2114 rctl |= E1000_RCTL_RST;
2115 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2116 E1000_WRITE_FLUSH(&adapter->hw);
2117 mdelay(5);
2118
96838a40 2119 if (netif_running(netdev))
581d708e 2120 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2121}
2122
2123static void
2124e1000_leave_82542_rst(struct e1000_adapter *adapter)
2125{
2126 struct net_device *netdev = adapter->netdev;
2127 uint32_t rctl;
2128
2129 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2130 rctl &= ~E1000_RCTL_RST;
2131 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2132 E1000_WRITE_FLUSH(&adapter->hw);
2133 mdelay(5);
2134
96838a40 2135 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2136 e1000_pci_set_mwi(&adapter->hw);
2137
96838a40 2138 if (netif_running(netdev)) {
72d64a43
JK		 2139 /* No need to loop, because 82542 supports only 1 queue */
2140 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2141 e1000_configure_rx(adapter);
72d64a43 2142 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2143 }
2144}
2145
2146/**
2147 * e1000_set_mac - Change the Ethernet Address of the NIC
2148 * @netdev: network interface device structure
2149 * @p: pointer to an address structure
2150 *
2151 * Returns 0 on success, negative on failure
2152 **/
2153
2154static int
2155e1000_set_mac(struct net_device *netdev, void *p)
2156{
60490fe0 2157 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2158 struct sockaddr *addr = p;
2159
96838a40 2160 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2161 return -EADDRNOTAVAIL;
2162
2163 /* 82542 2.0 needs to be in reset to write receive address registers */
2164
96838a40 2165 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2166 e1000_enter_82542_rst(adapter);
2167
2168 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2169 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2170
2171 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2172
868d5309
MC		 2173 /* With 82571 controllers, LAA may be overwritten (with the default)
2174 * due to controller reset from the other port. */
2175 if (adapter->hw.mac_type == e1000_82571) {
2176 /* activate the work around */
2177 adapter->hw.laa_is_present = 1;
2178
96838a40
JB		 2179 /* Hold a copy of the LAA in RAR[14] This is done so that
2180 * between the time RAR[0] gets clobbered and the time it
2181 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2182 * of the RARs and no incoming packets directed to this port
96838a40 2183 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2184 * RAR[14] */
96838a40 2185 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2186 E1000_RAR_ENTRIES - 1);
2187 }
2188
96838a40 2189 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2190 e1000_leave_82542_rst(adapter);
2191
2192 return 0;
2193}
2194
2195/**
2196 * e1000_set_multi - Multicast and Promiscuous mode set
2197 * @netdev: network interface device structure
2198 *
2199 * The set_multi entry point is called whenever the multicast address
2200 * list or the network interface flags are updated. This routine is
2201 * responsible for configuring the hardware for proper multicast,
2202 * promiscuous mode, and all-multi behavior.
2203 **/
2204
2205static void
2206e1000_set_multi(struct net_device *netdev)
2207{
60490fe0 2208 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2209 struct e1000_hw *hw = &adapter->hw;
2210 struct dev_mc_list *mc_ptr;
2211 uint32_t rctl;
2212 uint32_t hash_value;
868d5309 2213 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2214 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2215 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2216 E1000_NUM_MTA_REGISTERS;
2217
2218 if (adapter->hw.mac_type == e1000_ich8lan)
2219 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2220
868d5309
MC		 2221 /* reserve RAR[14] for LAA over-write work-around */
2222 if (adapter->hw.mac_type == e1000_82571)
2223 rar_entries--;
1da177e4 2224
2648345f
MC		 2225 /* Check for Promiscuous and All Multicast modes */
2226
1da177e4
LT		 2227 rctl = E1000_READ_REG(hw, RCTL);
2228
96838a40 2229 if (netdev->flags & IFF_PROMISC) {
1da177e4 2230 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2231 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2232 rctl |= E1000_RCTL_MPE;
2233 rctl &= ~E1000_RCTL_UPE;
2234 } else {
2235 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2236 }
2237
2238 E1000_WRITE_REG(hw, RCTL, rctl);
2239
2240 /* 82542 2.0 needs to be in reset to write receive address registers */
2241
96838a40 2242 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2243 e1000_enter_82542_rst(adapter);
2244
2245 /* load the first 14 multicast address into the exact filters 1-14
2246 * RAR 0 is used for the station MAC adddress
2247 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2248 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2249 */
2250 mc_ptr = netdev->mc_list;
2251
96838a40 2252 for (i = 1; i < rar_entries; i++) {
868d5309 2253 if (mc_ptr) {
1da177e4
LT		 2254 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2255 mc_ptr = mc_ptr->next;
2256 } else {
2257 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2258 E1000_WRITE_FLUSH(hw);
1da177e4 2259 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2260 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2261 }
2262 }
2263
2264 /* clear the old settings from the multicast hash table */
2265
cd94dd0b 2266 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2267 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2268 E1000_WRITE_FLUSH(hw);
2269 }
1da177e4
LT		 2270
2271 /* load any remaining addresses into the hash table */
2272
96838a40 2273 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2274 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2275 e1000_mta_set(hw, hash_value);
2276 }
2277
96838a40 2278 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2279 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2280}
2281
2282/* Need to wait a few seconds after link up to get diagnostic information from
2283 * the phy */
2284
2285static void
2286e1000_update_phy_info(unsigned long data)
2287{
2288 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2289 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2290}
2291
2292/**
2293 * e1000_82547_tx_fifo_stall - Timer Call-back
2294 * @data: pointer to adapter cast into an unsigned long
2295 **/
2296
2297static void
2298e1000_82547_tx_fifo_stall(unsigned long data)
2299{
2300 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2301 struct net_device *netdev = adapter->netdev;
2302 uint32_t tctl;
2303
96838a40
JB		 2304 if (atomic_read(&adapter->tx_fifo_stall)) {
2305 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2306 E1000_READ_REG(&adapter->hw, TDH)) &&
2307 (E1000_READ_REG(&adapter->hw, TDFT) ==
2308 E1000_READ_REG(&adapter->hw, TDFH)) &&
2309 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2310 E1000_READ_REG(&adapter->hw, TDFHS))) {
2311 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2312 E1000_WRITE_REG(&adapter->hw, TCTL,
2313 tctl & ~E1000_TCTL_EN);
2314 E1000_WRITE_REG(&adapter->hw, TDFT,
2315 adapter->tx_head_addr);
2316 E1000_WRITE_REG(&adapter->hw, TDFH,
2317 adapter->tx_head_addr);
2318 E1000_WRITE_REG(&adapter->hw, TDFTS,
2319 adapter->tx_head_addr);
2320 E1000_WRITE_REG(&adapter->hw, TDFHS,
2321 adapter->tx_head_addr);
2322 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2323 E1000_WRITE_FLUSH(&adapter->hw);
2324
2325 adapter->tx_fifo_head = 0;
2326 atomic_set(&adapter->tx_fifo_stall, 0);
2327 netif_wake_queue(netdev);
2328 } else {
2329 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2330 }
2331 }
2332}
2333
2334/**
2335 * e1000_watchdog - Timer Call-back
2336 * @data: pointer to adapter cast into an unsigned long
2337 **/
2338static void
2339e1000_watchdog(unsigned long data)
2340{
2341 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2342 struct net_device *netdev = adapter->netdev;
545c67c0 2343 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2344 uint32_t link, tctl;
cd94dd0b
AK		 2345 int32_t ret_val;
2346
2347 ret_val = e1000_check_for_link(&adapter->hw);
2348 if ((ret_val == E1000_ERR_PHY) &&
2349 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2350 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2351 /* See e1000_kumeran_lock_loss_workaround() */
2352 DPRINTK(LINK, INFO,
2353 "Gigabit has been disabled, downgrading speed\n");
2354 }
2d7edb92
MC		 2355 if (adapter->hw.mac_type == e1000_82573) {
2356 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2357 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2358 e1000_update_mng_vlan(adapter);
96838a40 2359 }
1da177e4 2360
96838a40 2361 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2362 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2363 link = !adapter->hw.serdes_link_down;
2364 else
2365 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2366
96838a40
JB		 2367 if (link) {
2368 if (!netif_carrier_ok(netdev)) {
fe7fe28e 2369 boolean_t txb2b = 1;
1da177e4
LT		 2370 e1000_get_speed_and_duplex(&adapter->hw,
2371 &adapter->link_speed,
2372 &adapter->link_duplex);
2373
2374 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2375 adapter->link_speed,
2376 adapter->link_duplex == FULL_DUPLEX ?
2377 "Full Duplex" : "Half Duplex");
2378
7e6c9861
JK		 2379 /* tweak tx_queue_len according to speed/duplex
2380 * and adjust the timeout factor */
66a2b0a3
JK		 2381 netdev->tx_queue_len = adapter->tx_queue_len;
2382 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2383 switch (adapter->link_speed) {
2384 case SPEED_10:
fe7fe28e 2385 txb2b = 0;
7e6c9861
JK		 2386 netdev->tx_queue_len = 10;
2387 adapter->tx_timeout_factor = 8;
2388 break;
2389 case SPEED_100:
fe7fe28e 2390 txb2b = 0;
7e6c9861
JK		 2391 netdev->tx_queue_len = 100;
2392 /* maybe add some timeout factor ? */
2393 break;
2394 }
2395
fe7fe28e 2396 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2397 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2398 txb2b == 0) {
7e6c9861
JK		 2399#define SPEED_MODE_BIT (1 << 21)
2400 uint32_t tarc0;
2401 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2402 tarc0 &= ~SPEED_MODE_BIT;
2403 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2404 }
2405
2406#ifdef NETIF_F_TSO
2407 /* disable TSO for pcie and 10/100 speeds, to avoid
2408 * some hardware issues */
2409 if (!adapter->tso_force &&
2410 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2411 switch (adapter->link_speed) {
2412 case SPEED_10:
66a2b0a3 2413 case SPEED_100:
7e6c9861
JK		 2414 DPRINTK(PROBE,INFO,
2415 "10/100 speed: disabling TSO\n");
2416 netdev->features &= ~NETIF_F_TSO;
2417 break;
2418 case SPEED_1000:
2419 netdev->features |= NETIF_F_TSO;
2420 break;
2421 default:
2422 /* oops */
66a2b0a3
JK		 2423 break;
2424 }
2425 }
7e6c9861
JK		 2426#endif
2427
2428 /* enable transmits in the hardware, need to do this
2429 * after setting TARC0 */
2430 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2431 tctl |= E1000_TCTL_EN;
2432 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2433
1da177e4
LT		 2434 netif_carrier_on(netdev);
2435 netif_wake_queue(netdev);
2436 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2437 adapter->smartspeed = 0;
2438 }
2439 } else {
96838a40 2440 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2441 adapter->link_speed = 0;
2442 adapter->link_duplex = 0;
2443 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2444 netif_carrier_off(netdev);
2445 netif_stop_queue(netdev);
2446 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2447
2448 /* 80003ES2LAN workaround--
2449 * For packet buffer work-around on link down event;
2450 * disable receives in the ISR and
2451 * reset device here in the watchdog
2452 */
8fc897b0 2453 if (adapter->hw.mac_type == e1000_80003es2lan)
87041639
JK		 2454 /* reset device */
2455 schedule_work(&adapter->reset_task);
1da177e4
LT		 2456 }
2457
2458 e1000_smartspeed(adapter);
2459 }
2460
2461 e1000_update_stats(adapter);
2462
2463 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2464 adapter->tpt_old = adapter->stats.tpt;
2465 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2466 adapter->colc_old = adapter->stats.colc;
2467
2468 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2469 adapter->gorcl_old = adapter->stats.gorcl;
2470 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2471 adapter->gotcl_old = adapter->stats.gotcl;
2472
2473 e1000_update_adaptive(&adapter->hw);
2474
f56799ea 2475 if (!netif_carrier_ok(netdev)) {
581d708e 2476 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2477 /* We've lost link, so the controller stops DMA,
2478 * but we've got queued Tx work that's never going
2479 * to get done, so reset controller to flush Tx.
2480 * (Do the reset outside of interrupt context). */
87041639
JK		 2481 adapter->tx_timeout_count++;
2482 schedule_work(&adapter->reset_task);
1da177e4
LT		 2483 }
2484 }
2485
2486 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2487 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2488 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2489 * asymmetrical Tx or Rx gets ITR=8000; everyone
2490 * else is between 2000-8000. */
2491 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2492 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2493 adapter->gotcl - adapter->gorcl :
2494 adapter->gorcl - adapter->gotcl) / 10000;
2495 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2496 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2497 }
2498
2499 /* Cause software interrupt to ensure rx ring is cleaned */
2500 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2501
2648345f 2502 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2503 adapter->detect_tx_hung = TRUE;
2504
96838a40 2505 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2506 * reset from the other port. Set the appropriate LAA in RAR[0] */
2507 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2508 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2509
1da177e4
LT		 2510 /* Reset the timer */
2511 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2512}
2513
2514#define E1000_TX_FLAGS_CSUM 0x00000001
2515#define E1000_TX_FLAGS_VLAN 0x00000002
2516#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2517#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2518#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2519#define E1000_TX_FLAGS_VLAN_SHIFT 16
2520
e619d523 2521static int
581d708e
MC		 2522e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2523 struct sk_buff *skb)
1da177e4
LT		 2524{
2525#ifdef NETIF_F_TSO
2526 struct e1000_context_desc *context_desc;
545c67c0 2527 struct e1000_buffer *buffer_info;
1da177e4
LT		 2528 unsigned int i;
2529 uint32_t cmd_length = 0;
2d7edb92 2530 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2531 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2532 int err;
2533
89114afd 2534 if (skb_is_gso(skb)) {
1da177e4
LT		 2535 if (skb_header_cloned(skb)) {
2536 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2537 if (err)
2538 return err;
2539 }
2540
2541 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 2542 mss = skb_shinfo(skb)->gso_size;
60828236 2543 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2544 skb->nh.iph->tot_len = 0;
2545 skb->nh.iph->check = 0;
2546 skb->h.th->check =
2547 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2548 skb->nh.iph->daddr,
2549 0,
2550 IPPROTO_TCP,
2551 0);
2552 cmd_length = E1000_TXD_CMD_IP;
2553 ipcse = skb->h.raw - skb->data - 1;
2554#ifdef NETIF_F_TSO_IPV6
e15fdd03 2555 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2d7edb92
MC		 2556 skb->nh.ipv6h->payload_len = 0;
2557 skb->h.th->check =
2558 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2559 &skb->nh.ipv6h->daddr,
2560 0,
2561 IPPROTO_TCP,
2562 0);
2563 ipcse = 0;
2564#endif
2565 }
1da177e4
LT		 2566 ipcss = skb->nh.raw - skb->data;
2567 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2568 tucss = skb->h.raw - skb->data;
2569 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2570 tucse = 0;
2571
2572 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2573 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2574
581d708e
MC		 2575 i = tx_ring->next_to_use;
2576 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2577 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2578
2579 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2580 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2581 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2582 context_desc->upper_setup.tcp_fields.tucss = tucss;
2583 context_desc->upper_setup.tcp_fields.tucso = tucso;
2584 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2585 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2586 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2587 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2588
545c67c0
JK		 2589 buffer_info->time_stamp = jiffies;
2590
581d708e
MC		 2591 if (++i == tx_ring->count) i = 0;
2592 tx_ring->next_to_use = i;
1da177e4 2593
8241e35e 2594 return TRUE;
1da177e4
LT		 2595 }
2596#endif
2597
8241e35e 2598 return FALSE;
1da177e4
LT		 2599}
2600
e619d523 2601static boolean_t
581d708e
MC		 2602e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2603 struct sk_buff *skb)
1da177e4
LT		 2604{
2605 struct e1000_context_desc *context_desc;
545c67c0 2606 struct e1000_buffer *buffer_info;
1da177e4
LT		 2607 unsigned int i;
2608 uint8_t css;
2609
96838a40 2610 if (likely(skb->ip_summed == CHECKSUM_HW)) {
1da177e4
LT		 2611 css = skb->h.raw - skb->data;
2612
581d708e 2613 i = tx_ring->next_to_use;
545c67c0 2614 buffer_info = &tx_ring->buffer_info[i];
581d708e 2615 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2616
2617 context_desc->upper_setup.tcp_fields.tucss = css;
2618 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2619 context_desc->upper_setup.tcp_fields.tucse = 0;
2620 context_desc->tcp_seg_setup.data = 0;
2621 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2622
545c67c0
JK		 2623 buffer_info->time_stamp = jiffies;
2624
581d708e
MC		 2625 if (unlikely(++i == tx_ring->count)) i = 0;
2626 tx_ring->next_to_use = i;
1da177e4
LT		 2627
2628 return TRUE;
2629 }
2630
2631 return FALSE;
2632}
2633
2634#define E1000_MAX_TXD_PWR 12
2635#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2636
e619d523 2637static int
581d708e
MC		 2638e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2639 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2640 unsigned int nr_frags, unsigned int mss)
1da177e4 2641{
1da177e4
LT		 2642 struct e1000_buffer *buffer_info;
2643 unsigned int len = skb->len;
2644 unsigned int offset = 0, size, count = 0, i;
2645 unsigned int f;
2646 len -= skb->data_len;
2647
2648 i = tx_ring->next_to_use;
2649
96838a40 2650 while (len) {
1da177e4
LT		 2651 buffer_info = &tx_ring->buffer_info[i];
2652 size = min(len, max_per_txd);
2653#ifdef NETIF_F_TSO
fd803241
JK		 2654 /* Workaround for Controller erratum --
2655 * descriptor for non-tso packet in a linear SKB that follows a
2656 * tso gets written back prematurely before the data is fully
0f15a8fa 2657 * DMA'd to the controller */
fd803241 2658 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2659 !skb_is_gso(skb)) {
fd803241
JK		 2660 tx_ring->last_tx_tso = 0;
2661 size -= 4;
2662 }
2663
1da177e4
LT		 2664 /* Workaround for premature desc write-backs
2665 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2666 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2667 size -= 4;
2668#endif
97338bde
MC		 2669 /* work-around for errata 10 and it applies
2670 * to all controllers in PCI-X mode
2671 * The fix is to make sure that the first descriptor of a
2672 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2673 */
96838a40 2674 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2675 (size > 2015) && count == 0))
2676 size = 2015;
96838a40 2677
1da177e4
LT		 2678 /* Workaround for potential 82544 hang in PCI-X. Avoid
2679 * terminating buffers within evenly-aligned dwords. */
96838a40 2680 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2681 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2682 size > 4))
2683 size -= 4;
2684
2685 buffer_info->length = size;
2686 buffer_info->dma =
2687 pci_map_single(adapter->pdev,
2688 skb->data + offset,
2689 size,
2690 PCI_DMA_TODEVICE);
2691 buffer_info->time_stamp = jiffies;
2692
2693 len -= size;
2694 offset += size;
2695 count++;
96838a40 2696 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2697 }
2698
96838a40 2699 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2700 struct skb_frag_struct *frag;
2701
2702 frag = &skb_shinfo(skb)->frags[f];
2703 len = frag->size;
2704 offset = frag->page_offset;
2705
96838a40 2706 while (len) {
1da177e4
LT		 2707 buffer_info = &tx_ring->buffer_info[i];
2708 size = min(len, max_per_txd);
2709#ifdef NETIF_F_TSO
2710 /* Workaround for premature desc write-backs
2711 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2712 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2713 size -= 4;
2714#endif
2715 /* Workaround for potential 82544 hang in PCI-X.
2716 * Avoid terminating buffers within evenly-aligned
2717 * dwords. */
96838a40 2718 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2719 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2720 size > 4))
2721 size -= 4;
2722
2723 buffer_info->length = size;
2724 buffer_info->dma =
2725 pci_map_page(adapter->pdev,
2726 frag->page,
2727 offset,
2728 size,
2729 PCI_DMA_TODEVICE);
2730 buffer_info->time_stamp = jiffies;
2731
2732 len -= size;
2733 offset += size;
2734 count++;
96838a40 2735 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2736 }
2737 }
2738
2739 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2740 tx_ring->buffer_info[i].skb = skb;
2741 tx_ring->buffer_info[first].next_to_watch = i;
2742
2743 return count;
2744}
2745
e619d523 2746static void
581d708e
MC		 2747e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2748 int tx_flags, int count)
1da177e4 2749{
1da177e4
LT		 2750 struct e1000_tx_desc *tx_desc = NULL;
2751 struct e1000_buffer *buffer_info;
2752 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2753 unsigned int i;
2754
96838a40 2755 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2756 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2757 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2758 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2759
96838a40 2760 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2761 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2762 }
2763
96838a40 2764 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2765 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2766 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2767 }
2768
96838a40 2769 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2770 txd_lower |= E1000_TXD_CMD_VLE;
2771 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2772 }
2773
2774 i = tx_ring->next_to_use;
2775
96838a40 2776 while (count--) {
1da177e4
LT		 2777 buffer_info = &tx_ring->buffer_info[i];
2778 tx_desc = E1000_TX_DESC(*tx_ring, i);
2779 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2780 tx_desc->lower.data =
2781 cpu_to_le32(txd_lower | buffer_info->length);
2782 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2783 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2784 }
2785
2786 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2787
2788 /* Force memory writes to complete before letting h/w
2789 * know there are new descriptors to fetch. (Only
2790 * applicable for weak-ordered memory model archs,
2791 * such as IA-64). */
2792 wmb();
2793
2794 tx_ring->next_to_use = i;
581d708e 2795 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2796}
2797
2798/**
2799 * 82547 workaround to avoid controller hang in half-duplex environment.
2800 * The workaround is to avoid queuing a large packet that would span
2801 * the internal Tx FIFO ring boundary by notifying the stack to resend
2802 * the packet at a later time. This gives the Tx FIFO an opportunity to
2803 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2804 * to the beginning of the Tx FIFO.
2805 **/
2806
2807#define E1000_FIFO_HDR 0x10
2808#define E1000_82547_PAD_LEN 0x3E0
2809
e619d523 2810static int
1da177e4
LT		 2811e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2812{
2813 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2814 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2815
2816 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2817
96838a40 2818 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2819 goto no_fifo_stall_required;
2820
96838a40 2821 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2822 return 1;
2823
96838a40 2824 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2825 atomic_set(&adapter->tx_fifo_stall, 1);
2826 return 1;
2827 }
2828
2829no_fifo_stall_required:
2830 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2831 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2832 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2833 return 0;
2834}
2835
2d7edb92 2836#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 2837static int
2d7edb92
MC		 2838e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2839{
2840 struct e1000_hw *hw = &adapter->hw;
2841 uint16_t length, offset;
96838a40
JB		 2842 if (vlan_tx_tag_present(skb)) {
2843 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2844 ( adapter->hw.mng_cookie.status &
2845 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2846 return 0;
2847 }
20a44028 2848 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2849 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2850 if ((htons(ETH_P_IP) == eth->h_proto)) {
2851 const struct iphdr *ip =
2d7edb92 2852 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2853 if (IPPROTO_UDP == ip->protocol) {
2854 struct udphdr *udp =
2855 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2856 (ip->ihl << 2));
96838a40 2857 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2858 offset = (uint8_t *)udp + 8 - skb->data;
2859 length = skb->len - offset;
2860
2861 return e1000_mng_write_dhcp_info(hw,
96838a40 2862 (uint8_t *)udp + 8,
2d7edb92
MC		 2863 length);
2864 }
2865 }
2866 }
2867 }
2868 return 0;
2869}
2870
1da177e4
LT		 2871#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2872static int
2873e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2874{
60490fe0 2875 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2876 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2877 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2878 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2879 unsigned int tx_flags = 0;
2880 unsigned int len = skb->len;
2881 unsigned long flags;
2882 unsigned int nr_frags = 0;
2883 unsigned int mss = 0;
2884 int count = 0;
76c224bc 2885 int tso;
1da177e4
LT		 2886 unsigned int f;
2887 len -= skb->data_len;
2888
581d708e 2889 tx_ring = adapter->tx_ring;
24025e4e 2890
581d708e 2891 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2892 dev_kfree_skb_any(skb);
2893 return NETDEV_TX_OK;
2894 }
2895
2896#ifdef NETIF_F_TSO
7967168c 2897 mss = skb_shinfo(skb)->gso_size;
76c224bc 2898 /* The controller does a simple calculation to
1da177e4
LT		 2899 * make sure there is enough room in the FIFO before
2900 * initiating the DMA for each buffer. The calc is:
2901 * 4 = ceil(buffer len/mss). To make sure we don't
2902 * overrun the FIFO, adjust the max buffer len if mss
2903 * drops. */
96838a40 2904 if (mss) {
9a3056da 2905 uint8_t hdr_len;
1da177e4
LT		 2906 max_per_txd = min(mss << 2, max_per_txd);
2907 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2908
9f687888 2909 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
9a3056da
JK		 2910 * points to just header, pull a few bytes of payload from
2911 * frags into skb->data */
2912 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 2913 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2914 switch (adapter->hw.mac_type) {
2915 unsigned int pull_size;
2916 case e1000_82571:
2917 case e1000_82572:
2918 case e1000_82573:
cd94dd0b 2919 case e1000_ich8lan:
9f687888
JK		 2920 pull_size = min((unsigned int)4, skb->data_len);
2921 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 2922 DPRINTK(DRV, ERR,
9f687888
JK		 2923 "__pskb_pull_tail failed.\n");
2924 dev_kfree_skb_any(skb);
749dfc70 2925 return NETDEV_TX_OK;
9f687888
JK		 2926 }
2927 len = skb->len - skb->data_len;
2928 break;
2929 default:
2930 /* do nothing */
2931 break;
d74bbd3b 2932 }
9a3056da 2933 }
1da177e4
LT		 2934 }
2935
9a3056da 2936 /* reserve a descriptor for the offload context */
96838a40 2937 if ((mss) || (skb->ip_summed == CHECKSUM_HW))
1da177e4 2938 count++;
2648345f 2939 count++;
1da177e4 2940#else
96838a40 2941 if (skb->ip_summed == CHECKSUM_HW)
1da177e4
LT		 2942 count++;
2943#endif
fd803241
JK		 2944
2945#ifdef NETIF_F_TSO
2946 /* Controller Erratum workaround */
89114afd 2947 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241
JK		 2948 count++;
2949#endif
2950
1da177e4
LT		 2951 count += TXD_USE_COUNT(len, max_txd_pwr);
2952
96838a40 2953 if (adapter->pcix_82544)
1da177e4
LT		 2954 count++;
2955
96838a40 2956 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2957 * in PCI-X mode, so add one more descriptor to the count
2958 */
96838a40 2959 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2960 (len > 2015)))
2961 count++;
2962
1da177e4 2963 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2964 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2965 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2966 max_txd_pwr);
96838a40 2967 if (adapter->pcix_82544)
1da177e4
LT		 2968 count += nr_frags;
2969
0f15a8fa
JK		 2970
2971 if (adapter->hw.tx_pkt_filtering &&
2972 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 2973 e1000_transfer_dhcp_info(adapter, skb);
2974
581d708e
MC		 2975 local_irq_save(flags);
2976 if (!spin_trylock(&tx_ring->tx_lock)) {
2977 /* Collision - tell upper layer to requeue */
2978 local_irq_restore(flags);
2979 return NETDEV_TX_LOCKED;
2980 }
1da177e4
LT		 2981
2982 /* need: count + 2 desc gap to keep tail from touching
2983 * head, otherwise try next time */
581d708e 2984 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2985 netif_stop_queue(netdev);
581d708e 2986 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2987 return NETDEV_TX_BUSY;
2988 }
2989
96838a40
JB		 2990 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
2991 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 2992 netif_stop_queue(netdev);
2993 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2994 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2995 return NETDEV_TX_BUSY;
2996 }
2997 }
2998
96838a40 2999 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3000 tx_flags |= E1000_TX_FLAGS_VLAN;
3001 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3002 }
3003
581d708e 3004 first = tx_ring->next_to_use;
96838a40 3005
581d708e 3006 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3007 if (tso < 0) {
3008 dev_kfree_skb_any(skb);
581d708e 3009 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3010 return NETDEV_TX_OK;
3011 }
3012
fd803241
JK		 3013 if (likely(tso)) {
3014 tx_ring->last_tx_tso = 1;
1da177e4 3015 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3016 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3017 tx_flags |= E1000_TX_FLAGS_CSUM;
3018
2d7edb92 3019 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3020 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3021 * no longer assume, we must. */
60828236 3022 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3023 tx_flags |= E1000_TX_FLAGS_IPV4;
3024
581d708e
MC		 3025 e1000_tx_queue(adapter, tx_ring, tx_flags,
3026 e1000_tx_map(adapter, tx_ring, skb, first,
3027 max_per_txd, nr_frags, mss));
1da177e4
LT		 3028
3029 netdev->trans_start = jiffies;
3030
3031 /* Make sure there is space in the ring for the next send. */
581d708e 3032 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 3033 netif_stop_queue(netdev);
3034
581d708e 3035 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3036 return NETDEV_TX_OK;
3037}
3038
3039/**
3040 * e1000_tx_timeout - Respond to a Tx Hang
3041 * @netdev: network interface device structure
3042 **/
3043
3044static void
3045e1000_tx_timeout(struct net_device *netdev)
3046{
60490fe0 3047 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3048
3049 /* Do the reset outside of interrupt context */
87041639
JK		 3050 adapter->tx_timeout_count++;
3051 schedule_work(&adapter->reset_task);
1da177e4
LT		 3052}
3053
3054static void
87041639 3055e1000_reset_task(struct net_device *netdev)
1da177e4 3056{
60490fe0 3057 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3058
2db10a08 3059 e1000_reinit_locked(adapter);
1da177e4
LT		 3060}
3061
3062/**
3063 * e1000_get_stats - Get System Network Statistics
3064 * @netdev: network interface device structure
3065 *
3066 * Returns the address of the device statistics structure.
3067 * The statistics are actually updated from the timer callback.
3068 **/
3069
3070static struct net_device_stats *
3071e1000_get_stats(struct net_device *netdev)
3072{
60490fe0 3073 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3074
6b7660cd 3075 /* only return the current stats */
1da177e4
LT		 3076 return &adapter->net_stats;
3077}
3078
3079/**
3080 * e1000_change_mtu - Change the Maximum Transfer Unit
3081 * @netdev: network interface device structure
3082 * @new_mtu: new value for maximum frame size
3083 *
3084 * Returns 0 on success, negative on failure
3085 **/
3086
3087static int
3088e1000_change_mtu(struct net_device *netdev, int new_mtu)
3089{
60490fe0 3090 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3091 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3092 uint16_t eeprom_data = 0;
1da177e4 3093
96838a40
JB		 3094 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3095 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3096 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3097 return -EINVAL;
2d7edb92 3098 }
1da177e4 3099
997f5cbd
JK		 3100 /* Adapter-specific max frame size limits. */
3101 switch (adapter->hw.mac_type) {
9e2feace 3102 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3103 case e1000_ich8lan:
997f5cbd
JK		 3104 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3105 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3106 return -EINVAL;
2d7edb92 3107 }
997f5cbd 3108 break;
85b22eb6
JK		 3109 case e1000_82573:
3110 /* only enable jumbo frames if ASPM is disabled completely
3111 * this means both bits must be zero in 0x1A bits 3:2 */
3112 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3113 &eeprom_data);
3114 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
3115 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3116 DPRINTK(PROBE, ERR,
3117 "Jumbo Frames not supported.\n");
3118 return -EINVAL;
3119 }
3120 break;
3121 }
3122 /* fall through to get support */
997f5cbd
JK		 3123 case e1000_82571:
3124 case e1000_82572:
87041639 3125 case e1000_80003es2lan:
997f5cbd
JK		 3126#define MAX_STD_JUMBO_FRAME_SIZE 9234
3127 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3128 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3129 return -EINVAL;
3130 }
3131 break;
3132 default:
3133 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3134 break;
1da177e4
LT		 3135 }
3136
87f5032e 3137 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3138 * means we reserve 2 more, this pushes us to allocate from the next
3139 * larger slab size
3140 * i.e. RXBUFFER_2048 --> size-4096 slab */
3141
3142 if (max_frame <= E1000_RXBUFFER_256)
3143 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3144 else if (max_frame <= E1000_RXBUFFER_512)
3145 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3146 else if (max_frame <= E1000_RXBUFFER_1024)
3147 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3148 else if (max_frame <= E1000_RXBUFFER_2048)
3149 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3150 else if (max_frame <= E1000_RXBUFFER_4096)
3151 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3152 else if (max_frame <= E1000_RXBUFFER_8192)
3153 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3154 else if (max_frame <= E1000_RXBUFFER_16384)
3155 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3156
3157 /* adjust allocation if LPE protects us, and we aren't using SBP */
9e2feace
AK		 3158 if (!adapter->hw.tbi_compatibility_on &&
3159 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3160 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3161 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3162
2d7edb92
MC		 3163 netdev->mtu = new_mtu;
3164
2db10a08
AK		 3165 if (netif_running(netdev))
3166 e1000_reinit_locked(adapter);
1da177e4 3167
1da177e4
LT		 3168 adapter->hw.max_frame_size = max_frame;
3169
3170 return 0;
3171}
3172
3173/**
3174 * e1000_update_stats - Update the board statistics counters
3175 * @adapter: board private structure
3176 **/
3177
3178void
3179e1000_update_stats(struct e1000_adapter *adapter)
3180{
3181 struct e1000_hw *hw = &adapter->hw;
282f33c9 3182 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3183 unsigned long flags;
3184 uint16_t phy_tmp;
3185
3186#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3187
282f33c9
LV		 3188 /*
3189 * Prevent stats update while adapter is being reset, or if the pci
3190 * connection is down.
3191 */
9026729b 3192 if (adapter->link_speed == 0)
282f33c9
LV		 3193 return;
3194 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
9026729b
AK		 3195 return;
3196
1da177e4
LT		 3197 spin_lock_irqsave(&adapter->stats_lock, flags);
3198
3199 /* these counters are modified from e1000_adjust_tbi_stats,
3200 * called from the interrupt context, so they must only
3201 * be written while holding adapter->stats_lock
3202 */
3203
3204 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3205 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3206 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3207 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3208 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3209 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3210 adapter->stats.roc += E1000_READ_REG(hw, ROC);
cd94dd0b
AK		 3211
3212 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3213 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3214 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3215 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3216 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3217 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3218 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
cd94dd0b 3219 }
1da177e4
LT		 3220
3221 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3222 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3223 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3224 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3225 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3226 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3227 adapter->stats.dc += E1000_READ_REG(hw, DC);
3228 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3229 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3230 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3231 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3232 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3233 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3234 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3235 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3236 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3237 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3238 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3239 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3240 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3241 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3242 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3243 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3244 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3245 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3246 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
cd94dd0b
AK		 3247
3248 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3249 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3250 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3251 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3252 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3253 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3254 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
cd94dd0b
AK		 3255 }
3256
1da177e4
LT		 3257 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3258 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3259
3260 /* used for adaptive IFS */
3261
3262 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3263 adapter->stats.tpt += hw->tx_packet_delta;
3264 hw->collision_delta = E1000_READ_REG(hw, COLC);
3265 adapter->stats.colc += hw->collision_delta;
3266
96838a40 3267 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3268 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3269 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3270 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3271 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3272 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3273 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3274 }
96838a40 3275 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3276 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3277 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
cd94dd0b
AK		 3278
3279 if (adapter->hw.mac_type != e1000_ich8lan) {
2d7edb92
MC		 3280 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3281 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3282 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3283 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3284 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3285 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3286 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
cd94dd0b 3287 }
2d7edb92 3288 }
1da177e4
LT		 3289
3290 /* Fill out the OS statistics structure */
3291
3292 adapter->net_stats.rx_packets = adapter->stats.gprc;
3293 adapter->net_stats.tx_packets = adapter->stats.gptc;
3294 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3295 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3296 adapter->net_stats.multicast = adapter->stats.mprc;
3297 adapter->net_stats.collisions = adapter->stats.colc;
3298
3299 /* Rx Errors */
3300
87041639
JK		 3301 /* RLEC on some newer hardware can be incorrect so build
3302 * our own version based on RUC and ROC */
1da177e4
LT		 3303 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3304 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3305 adapter->stats.ruc + adapter->stats.roc +
3306 adapter->stats.cexterr;
87041639
JK		 3307 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3308 adapter->stats.roc;
1da177e4
LT		 3309 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3310 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3311 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3312
3313 /* Tx Errors */
3314
3315 adapter->net_stats.tx_errors = adapter->stats.ecol +
3316 adapter->stats.latecol;
3317 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3318 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3319 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3320
3321 /* Tx Dropped needs to be maintained elsewhere */
3322
3323 /* Phy Stats */
3324
96838a40
JB		 3325 if (hw->media_type == e1000_media_type_copper) {
3326 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3327 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3328 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3329 adapter->phy_stats.idle_errors += phy_tmp;
3330 }
3331
96838a40 3332 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3333 (hw->phy_type == e1000_phy_m88) &&
3334 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3335 adapter->phy_stats.receive_errors += phy_tmp;
3336 }
3337
3338 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3339}
3340
3341/**
3342 * e1000_intr - Interrupt Handler
3343 * @irq: interrupt number
3344 * @data: pointer to a network interface device structure
3345 * @pt_regs: CPU registers structure
3346 **/
3347
3348static irqreturn_t
3349e1000_intr(int irq, void *data, struct pt_regs *regs)
3350{
3351 struct net_device *netdev = data;
60490fe0 3352 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3353 struct e1000_hw *hw = &adapter->hw;
87041639 3354 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3355#ifndef CONFIG_E1000_NAPI
581d708e 3356 int i;
1e613fd9
JK		 3357#else
3358 /* Interrupt Auto-Mask...upon reading ICR,
3359 * interrupts are masked. No need for the
3360 * IMC write, but it does mean we should
3361 * account for it ASAP. */
3362 if (likely(hw->mac_type >= e1000_82571))
3363 atomic_inc(&adapter->irq_sem);
be2b28ed 3364#endif
1da177e4 3365
1e613fd9
JK		 3366 if (unlikely(!icr)) {
3367#ifdef CONFIG_E1000_NAPI
3368 if (hw->mac_type >= e1000_82571)
3369 e1000_irq_enable(adapter);
3370#endif
1da177e4 3371 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3372 }
1da177e4 3373
96838a40 3374 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3375 hw->get_link_status = 1;
87041639
JK		 3376 /* 80003ES2LAN workaround--
3377 * For packet buffer work-around on link down event;
3378 * disable receives here in the ISR and
3379 * reset adapter in watchdog
3380 */
3381 if (netif_carrier_ok(netdev) &&
3382 (adapter->hw.mac_type == e1000_80003es2lan)) {
3383 /* disable receives */
3384 rctl = E1000_READ_REG(hw, RCTL);
3385 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3386 }
1da177e4
LT		 3387 mod_timer(&adapter->watchdog_timer, jiffies);
3388 }
3389
3390#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3391 if (unlikely(hw->mac_type < e1000_82571)) {
3392 atomic_inc(&adapter->irq_sem);
3393 E1000_WRITE_REG(hw, IMC, ~0);
3394 E1000_WRITE_FLUSH(hw);
3395 }
d3d9e484
AK		 3396 if (likely(netif_rx_schedule_prep(netdev)))
3397 __netif_rx_schedule(netdev);
581d708e
MC		 3398 else
3399 e1000_irq_enable(adapter);
c1605eb3 3400#else
1da177e4 3401 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3402 * Due to Hub Link bus being occupied, an interrupt
3403 * de-assertion message is not able to be sent.
3404 * When an interrupt assertion message is generated later,
3405 * two messages are re-ordered and sent out.
3406 * That causes APIC to think 82547 is in de-assertion
3407 * state, while 82547 is in assertion state, resulting
3408 * in dead lock. Writing IMC forces 82547 into
3409 * de-assertion state.
3410 */
3411 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3412 atomic_inc(&adapter->irq_sem);
2648345f 3413 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3414 }
3415
96838a40
JB		 3416 for (i = 0; i < E1000_MAX_INTR; i++)
3417 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3418 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3419 break;
3420
96838a40 3421 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3422 e1000_irq_enable(adapter);
581d708e 3423
c1605eb3 3424#endif
1da177e4
LT		 3425
3426 return IRQ_HANDLED;
3427}
3428
3429#ifdef CONFIG_E1000_NAPI
3430/**
3431 * e1000_clean - NAPI Rx polling callback
3432 * @adapter: board private structure
3433 **/
3434
3435static int
581d708e 3436e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3437{
581d708e
MC		 3438 struct e1000_adapter *adapter;
3439 int work_to_do = min(*budget, poll_dev->quota);
d3d9e484 3440 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3441
3442 /* Must NOT use netdev_priv macro here. */
3443 adapter = poll_dev->priv;
3444
3445 /* Keep link state information with original netdev */
d3d9e484 3446 if (!netif_carrier_ok(poll_dev))
581d708e 3447 goto quit_polling;
2648345f 3448
d3d9e484
AK		 3449 /* e1000_clean is called per-cpu. This lock protects
3450 * tx_ring[0] from being cleaned by multiple cpus
3451 * simultaneously. A failure obtaining the lock means
3452 * tx_ring[0] is currently being cleaned anyway. */
3453 if (spin_trylock(&adapter->tx_queue_lock)) {
3454 tx_cleaned = e1000_clean_tx_irq(adapter,
3455 &adapter->tx_ring[0]);
3456 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3457 }
3458
d3d9e484 3459 adapter->clean_rx(adapter, &adapter->rx_ring[0],
581d708e 3460 &work_done, work_to_do);
1da177e4
LT		 3461
3462 *budget -= work_done;
581d708e 3463 poll_dev->quota -= work_done;
96838a40 3464
2b02893e 3465 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3466 if ((!tx_cleaned && (work_done == 0)) ||
d3d9e484 3467 !netif_running(poll_dev)) {
581d708e
MC		 3468quit_polling:
3469 netif_rx_complete(poll_dev);
1da177e4
LT		 3470 e1000_irq_enable(adapter);
3471 return 0;
3472 }
3473
3474 return 1;
3475}
3476
3477#endif
3478/**
3479 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3480 * @adapter: board private structure
3481 **/
3482
3483static boolean_t
581d708e
MC		 3484e1000_clean_tx_irq(struct e1000_adapter *adapter,
3485 struct e1000_tx_ring *tx_ring)
1da177e4 3486{
1da177e4
LT		 3487 struct net_device *netdev = adapter->netdev;
3488 struct e1000_tx_desc *tx_desc, *eop_desc;
3489 struct e1000_buffer *buffer_info;
3490 unsigned int i, eop;
2a1af5d7
JK		 3491#ifdef CONFIG_E1000_NAPI
3492 unsigned int count = 0;
3493#endif
1da177e4
LT		 3494 boolean_t cleaned = FALSE;
3495
3496 i = tx_ring->next_to_clean;
3497 eop = tx_ring->buffer_info[i].next_to_watch;
3498 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3499
581d708e 3500 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3501 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3502 tx_desc = E1000_TX_DESC(*tx_ring, i);
3503 buffer_info = &tx_ring->buffer_info[i];
3504 cleaned = (i == eop);
3505
fd803241 3506 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3507 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3508
96838a40 3509 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3510 }
581d708e 3511
7bfa4816 3512
1da177e4
LT		 3513 eop = tx_ring->buffer_info[i].next_to_watch;
3514 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3515#ifdef CONFIG_E1000_NAPI
3516#define E1000_TX_WEIGHT 64
3517 /* weight of a sort for tx, to avoid endless transmit cleanup */
3518 if (count++ == E1000_TX_WEIGHT) break;
3519#endif
1da177e4
LT		 3520 }
3521
3522 tx_ring->next_to_clean = i;
3523
77b2aad5 3524#define TX_WAKE_THRESHOLD 32
96838a40 3525 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
77b2aad5
AK		 3526 netif_carrier_ok(netdev))) {
3527 spin_lock(&tx_ring->tx_lock);
3528 if (netif_queue_stopped(netdev) &&
3529 (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
3530 netif_wake_queue(netdev);
3531 spin_unlock(&tx_ring->tx_lock);
3532 }
2648345f 3533
581d708e 3534 if (adapter->detect_tx_hung) {
2648345f 3535 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3536 * check with the clearing of time_stamp and movement of i */
3537 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3538 if (tx_ring->buffer_info[eop].dma &&
3539 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3540 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3541 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3542 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3543
3544 /* detected Tx unit hang */
c6963ef5 3545 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3546 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3547 " TDH <%x>\n"
3548 " TDT <%x>\n"
3549 " next_to_use <%x>\n"
3550 " next_to_clean <%x>\n"
3551 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3552 " time_stamp <%lx>\n"
3553 " next_to_watch <%x>\n"
3554 " jiffies <%lx>\n"
3555 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3556 (unsigned long)((tx_ring - adapter->tx_ring) /
3557 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3558 readl(adapter->hw.hw_addr + tx_ring->tdh),
3559 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3560 tx_ring->next_to_use,
392137fa
JK		 3561 tx_ring->next_to_clean,
3562 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3563 eop,
3564 jiffies,
3565 eop_desc->upper.fields.status);
1da177e4 3566 netif_stop_queue(netdev);
70b8f1e1 3567 }
1da177e4 3568 }
1da177e4
LT		 3569 return cleaned;
3570}
3571
3572/**
3573 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3574 * @adapter: board private structure
3575 * @status_err: receive descriptor status and error fields
3576 * @csum: receive descriptor csum field
3577 * @sk_buff: socket buffer with received data
1da177e4
LT		 3578 **/
3579
e619d523 3580static void
1da177e4 3581e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3582 uint32_t status_err, uint32_t csum,
3583 struct sk_buff *skb)
1da177e4 3584{
2d7edb92
MC		 3585 uint16_t status = (uint16_t)status_err;
3586 uint8_t errors = (uint8_t)(status_err >> 24);
3587 skb->ip_summed = CHECKSUM_NONE;
3588
1da177e4 3589 /* 82543 or newer only */
96838a40 3590 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3591 /* Ignore Checksum bit is set */
96838a40 3592 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3593 /* TCP/UDP checksum error bit is set */
96838a40 3594 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3595 /* let the stack verify checksum errors */
1da177e4 3596 adapter->hw_csum_err++;
2d7edb92
MC		 3597 return;
3598 }
3599 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3600 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3601 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3602 return;
1da177e4 3603 } else {
96838a40 3604 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3605 return;
3606 }
3607 /* It must be a TCP or UDP packet with a valid checksum */
3608 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3609 /* TCP checksum is good */
3610 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3611 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3612 /* IP fragment with UDP payload */
3613 /* Hardware complements the payload checksum, so we undo it
3614 * and then put the value in host order for further stack use.
3615 */
3616 csum = ntohl(csum ^ 0xFFFF);
3617 skb->csum = csum;
3618 skb->ip_summed = CHECKSUM_HW;
1da177e4 3619 }
2d7edb92 3620 adapter->hw_csum_good++;
1da177e4
LT		 3621}
3622
3623/**
2d7edb92 3624 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3625 * @adapter: board private structure
3626 **/
3627
3628static boolean_t
3629#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3630e1000_clean_rx_irq(struct e1000_adapter *adapter,
3631 struct e1000_rx_ring *rx_ring,
3632 int *work_done, int work_to_do)
1da177e4 3633#else
581d708e
MC		 3634e1000_clean_rx_irq(struct e1000_adapter *adapter,
3635 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3636#endif
3637{
1da177e4
LT		 3638 struct net_device *netdev = adapter->netdev;
3639 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3640 struct e1000_rx_desc *rx_desc, *next_rxd;
3641 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3642 unsigned long flags;
3643 uint32_t length;
3644 uint8_t last_byte;
3645 unsigned int i;
72d64a43 3646 int cleaned_count = 0;
a1415ee6 3647 boolean_t cleaned = FALSE;
1da177e4
LT		 3648
3649 i = rx_ring->next_to_clean;
3650 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3651 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3652
b92ff8ee 3653 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3654 struct sk_buff *skb;
a292ca6e 3655 u8 status;
1da177e4 3656#ifdef CONFIG_E1000_NAPI
96838a40 3657 if (*work_done >= work_to_do)
1da177e4
LT		 3658 break;
3659 (*work_done)++;
3660#endif
a292ca6e 3661 status = rx_desc->status;
b92ff8ee 3662 skb = buffer_info->skb;
86c3d59f
JB		 3663 buffer_info->skb = NULL;
3664
30320be8
JK		 3665 prefetch(skb->data - NET_IP_ALIGN);
3666
86c3d59f
JB		 3667 if (++i == rx_ring->count) i = 0;
3668 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3669 prefetch(next_rxd);
3670
86c3d59f 3671 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3672
72d64a43
JK		 3673 cleaned = TRUE;
3674 cleaned_count++;
a292ca6e
JK		 3675 pci_unmap_single(pdev,
3676 buffer_info->dma,
3677 buffer_info->length,
1da177e4
LT		 3678 PCI_DMA_FROMDEVICE);
3679
1da177e4
LT		 3680 length = le16_to_cpu(rx_desc->length);
3681
f235a2ab
AK		 3682 /* adjust length to remove Ethernet CRC */
3683 length -= 4;
3684
a1415ee6
JK		 3685 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3686 /* All receives must fit into a single buffer */
3687 E1000_DBG("%s: Receive packet consumed multiple"
3688 " buffers\n", netdev->name);
864c4e45 3689 /* recycle */
8fc897b0 3690 buffer_info->skb = skb;
1da177e4
LT		 3691 goto next_desc;
3692 }
3693
96838a40 3694 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3695 last_byte = *(skb->data + length - 1);
b92ff8ee 3696 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3697 rx_desc->errors, length, last_byte)) {
3698 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3699 e1000_tbi_adjust_stats(&adapter->hw,
3700 &adapter->stats,
1da177e4
LT		 3701 length, skb->data);
3702 spin_unlock_irqrestore(&adapter->stats_lock,
3703 flags);
3704 length--;
3705 } else {
9e2feace
AK		 3706 /* recycle */
3707 buffer_info->skb = skb;
1da177e4
LT		 3708 goto next_desc;
3709 }
1cb5821f 3710 }
1da177e4 3711
a292ca6e
JK		 3712 /* code added for copybreak, this should improve
3713 * performance for small packets with large amounts
3714 * of reassembly being done in the stack */
3715#define E1000_CB_LENGTH 256
a1415ee6 3716 if (length < E1000_CB_LENGTH) {
a292ca6e 3717 struct sk_buff *new_skb =
87f5032e 3718 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 3719 if (new_skb) {
3720 skb_reserve(new_skb, NET_IP_ALIGN);
3721 new_skb->dev = netdev;
3722 memcpy(new_skb->data - NET_IP_ALIGN,
3723 skb->data - NET_IP_ALIGN,
3724 length + NET_IP_ALIGN);
3725 /* save the skb in buffer_info as good */
3726 buffer_info->skb = skb;
3727 skb = new_skb;
3728 skb_put(skb, length);
3729 }
a1415ee6
JK		 3730 } else
3731 skb_put(skb, length);
a292ca6e
JK		 3732
3733 /* end copybreak code */
1da177e4
LT		 3734
3735 /* Receive Checksum Offload */
a292ca6e
JK		 3736 e1000_rx_checksum(adapter,
3737 (uint32_t)(status) |
2d7edb92 3738 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 3739 le16_to_cpu(rx_desc->csum), skb);
96838a40 3740
1da177e4
LT		 3741 skb->protocol = eth_type_trans(skb, netdev);
3742#ifdef CONFIG_E1000_NAPI
96838a40 3743 if (unlikely(adapter->vlgrp &&
a292ca6e 3744 (status & E1000_RXD_STAT_VP))) {
1da177e4 3745 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3746 le16_to_cpu(rx_desc->special) &
3747 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3748 } else {
3749 netif_receive_skb(skb);
3750 }
3751#else /* CONFIG_E1000_NAPI */
96838a40 3752 if (unlikely(adapter->vlgrp &&
b92ff8ee 3753 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3754 vlan_hwaccel_rx(skb, adapter->vlgrp,
3755 le16_to_cpu(rx_desc->special) &
3756 E1000_RXD_SPC_VLAN_MASK);
3757 } else {
3758 netif_rx(skb);
3759 }
3760#endif /* CONFIG_E1000_NAPI */
3761 netdev->last_rx = jiffies;
3762
3763next_desc:
3764 rx_desc->status = 0;
1da177e4 3765
72d64a43
JK		 3766 /* return some buffers to hardware, one at a time is too slow */
3767 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3768 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3769 cleaned_count = 0;
3770 }
3771
30320be8 3772 /* use prefetched values */
86c3d59f
JB		 3773 rx_desc = next_rxd;
3774 buffer_info = next_buffer;
1da177e4 3775 }
1da177e4 3776 rx_ring->next_to_clean = i;
72d64a43
JK		 3777
3778 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3779 if (cleaned_count)
3780 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3781
3782 return cleaned;
3783}
3784
3785/**
3786 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3787 * @adapter: board private structure
3788 **/
3789
3790static boolean_t
3791#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3792e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3793 struct e1000_rx_ring *rx_ring,
3794 int *work_done, int work_to_do)
2d7edb92 3795#else
581d708e
MC		 3796e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3797 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3798#endif
3799{
86c3d59f 3800 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3801 struct net_device *netdev = adapter->netdev;
3802 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3803 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3804 struct e1000_ps_page *ps_page;
3805 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 3806 struct sk_buff *skb;
2d7edb92
MC		 3807 unsigned int i, j;
3808 uint32_t length, staterr;
72d64a43 3809 int cleaned_count = 0;
2d7edb92
MC		 3810 boolean_t cleaned = FALSE;
3811
3812 i = rx_ring->next_to_clean;
3813 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3814 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 3815 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3816
96838a40 3817 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3818 ps_page = &rx_ring->ps_page[i];
3819 ps_page_dma = &rx_ring->ps_page_dma[i];
3820#ifdef CONFIG_E1000_NAPI
96838a40 3821 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3822 break;
3823 (*work_done)++;
3824#endif
86c3d59f
JB		 3825 skb = buffer_info->skb;
3826
30320be8
JK		 3827 /* in the packet split case this is header only */
3828 prefetch(skb->data - NET_IP_ALIGN);
3829
86c3d59f
JB		 3830 if (++i == rx_ring->count) i = 0;
3831 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3832 prefetch(next_rxd);
3833
86c3d59f 3834 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3835
2d7edb92 3836 cleaned = TRUE;
72d64a43 3837 cleaned_count++;
2d7edb92
MC		 3838 pci_unmap_single(pdev, buffer_info->dma,
3839 buffer_info->length,
3840 PCI_DMA_FROMDEVICE);
3841
96838a40 3842 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3843 E1000_DBG("%s: Packet Split buffers didn't pick up"
3844 " the full packet\n", netdev->name);
3845 dev_kfree_skb_irq(skb);
3846 goto next_desc;
3847 }
1da177e4 3848
96838a40 3849 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3850 dev_kfree_skb_irq(skb);
3851 goto next_desc;
3852 }
3853
3854 length = le16_to_cpu(rx_desc->wb.middle.length0);
3855
96838a40 3856 if (unlikely(!length)) {
2d7edb92
MC		 3857 E1000_DBG("%s: Last part of the packet spanning"
3858 " multiple descriptors\n", netdev->name);
3859 dev_kfree_skb_irq(skb);
3860 goto next_desc;
3861 }
3862
3863 /* Good Receive */
3864 skb_put(skb, length);
3865
dc7c6add
JK		 3866 {
3867 /* this looks ugly, but it seems compiler issues make it
3868 more efficient than reusing j */
3869 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3870
3871 /* page alloc/put takes too long and effects small packet
3872 * throughput, so unsplit small packets and save the alloc/put*/
9e2feace 3873 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 3874 u8 *vaddr;
76c224bc 3875 /* there is no documentation about how to call
dc7c6add
JK		 3876 * kmap_atomic, so we can't hold the mapping
3877 * very long */
3878 pci_dma_sync_single_for_cpu(pdev,
3879 ps_page_dma->ps_page_dma[0],
3880 PAGE_SIZE,
3881 PCI_DMA_FROMDEVICE);
3882 vaddr = kmap_atomic(ps_page->ps_page[0],
3883 KM_SKB_DATA_SOFTIRQ);
3884 memcpy(skb->tail, vaddr, l1);
3885 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3886 pci_dma_sync_single_for_device(pdev,
3887 ps_page_dma->ps_page_dma[0],
3888 PAGE_SIZE, PCI_DMA_FROMDEVICE);
f235a2ab
AK		 3889 /* remove the CRC */
3890 l1 -= 4;
dc7c6add 3891 skb_put(skb, l1);
dc7c6add
JK		 3892 goto copydone;
3893 } /* if */
3894 }
3895
96838a40 3896 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 3897 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 3898 break;
2d7edb92
MC		 3899 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3900 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3901 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 3902 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3903 length);
2d7edb92 3904 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 3905 skb->len += length;
3906 skb->data_len += length;
5d51b80f 3907 skb->truesize += length;
2d7edb92
MC		 3908 }
3909
f235a2ab
AK		 3910 /* strip the ethernet crc, problem is we're using pages now so
3911 * this whole operation can get a little cpu intensive */
3912 pskb_trim(skb, skb->len - 4);
3913
dc7c6add 3914copydone:
2d7edb92 3915 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 3916 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 3917 skb->protocol = eth_type_trans(skb, netdev);
3918
96838a40 3919 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 3920 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 3921 adapter->rx_hdr_split++;
2d7edb92 3922#ifdef CONFIG_E1000_NAPI
96838a40 3923 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3924 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3925 le16_to_cpu(rx_desc->wb.middle.vlan) &
3926 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3927 } else {
3928 netif_receive_skb(skb);
3929 }
3930#else /* CONFIG_E1000_NAPI */
96838a40 3931 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3932 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3933 le16_to_cpu(rx_desc->wb.middle.vlan) &
3934 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3935 } else {
3936 netif_rx(skb);
3937 }
3938#endif /* CONFIG_E1000_NAPI */
3939 netdev->last_rx = jiffies;
3940
3941next_desc:
c3d7a3a4 3942 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 3943 buffer_info->skb = NULL;
2d7edb92 3944
72d64a43
JK		 3945 /* return some buffers to hardware, one at a time is too slow */
3946 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3947 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3948 cleaned_count = 0;
3949 }
3950
30320be8 3951 /* use prefetched values */
86c3d59f
JB		 3952 rx_desc = next_rxd;
3953 buffer_info = next_buffer;
3954
683a38f3 3955 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3956 }
3957 rx_ring->next_to_clean = i;
72d64a43
JK		 3958
3959 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3960 if (cleaned_count)
3961 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3962
3963 return cleaned;
3964}
3965
3966/**
2d7edb92 3967 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3968 * @adapter: address of board private structure
3969 **/
3970
3971static void
581d708e 3972e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 3973 struct e1000_rx_ring *rx_ring,
a292ca6e 3974 int cleaned_count)
1da177e4 3975{
1da177e4
LT		 3976 struct net_device *netdev = adapter->netdev;
3977 struct pci_dev *pdev = adapter->pdev;
3978 struct e1000_rx_desc *rx_desc;
3979 struct e1000_buffer *buffer_info;
3980 struct sk_buff *skb;
2648345f
MC		 3981 unsigned int i;
3982 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3983
3984 i = rx_ring->next_to_use;
3985 buffer_info = &rx_ring->buffer_info[i];
3986
a292ca6e
JK		 3987 while (cleaned_count--) {
3988 if (!(skb = buffer_info->skb))
87f5032e 3989 skb = netdev_alloc_skb(netdev, bufsz);
a292ca6e
JK		 3990 else {
3991 skb_trim(skb, 0);
3992 goto map_skb;
3993 }
3994
96838a40 3995 if (unlikely(!skb)) {
1da177e4 3996 /* Better luck next round */
72d64a43 3997 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 3998 break;
3999 }
4000
2648345f 4001 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4002 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4003 struct sk_buff *oldskb = skb;
2648345f
MC		 4004 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4005 "at %p\n", bufsz, skb->data);
4006 /* Try again, without freeing the previous */
87f5032e 4007 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4008 /* Failed allocation, critical failure */
1da177e4
LT		 4009 if (!skb) {
4010 dev_kfree_skb(oldskb);
4011 break;
4012 }
2648345f 4013
1da177e4
LT		 4014 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4015 /* give up */
4016 dev_kfree_skb(skb);
4017 dev_kfree_skb(oldskb);
4018 break; /* while !buffer_info->skb */
4019 } else {
2648345f 4020 /* Use new allocation */
1da177e4
LT		 4021 dev_kfree_skb(oldskb);
4022 }
4023 }
1da177e4
LT		 4024 /* Make buffer alignment 2 beyond a 16 byte boundary
4025 * this will result in a 16 byte aligned IP header after
4026 * the 14 byte MAC header is removed
4027 */
4028 skb_reserve(skb, NET_IP_ALIGN);
4029
4030 skb->dev = netdev;
4031
4032 buffer_info->skb = skb;
4033 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4034map_skb:
1da177e4
LT		 4035 buffer_info->dma = pci_map_single(pdev,
4036 skb->data,
4037 adapter->rx_buffer_len,
4038 PCI_DMA_FROMDEVICE);
4039
2648345f
MC		 4040 /* Fix for errata 23, can't cross 64kB boundary */
4041 if (!e1000_check_64k_bound(adapter,
4042 (void *)(unsigned long)buffer_info->dma,
4043 adapter->rx_buffer_len)) {
4044 DPRINTK(RX_ERR, ERR,
4045 "dma align check failed: %u bytes at %p\n",
4046 adapter->rx_buffer_len,
4047 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4048 dev_kfree_skb(skb);
4049 buffer_info->skb = NULL;
4050
2648345f 4051 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4052 adapter->rx_buffer_len,
4053 PCI_DMA_FROMDEVICE);
4054
4055 break; /* while !buffer_info->skb */
4056 }
1da177e4
LT		 4057 rx_desc = E1000_RX_DESC(*rx_ring, i);
4058 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4059
96838a40
JB		 4060 if (unlikely(++i == rx_ring->count))
4061 i = 0;
1da177e4
LT		 4062 buffer_info = &rx_ring->buffer_info[i];
4063 }
4064
b92ff8ee
JB		 4065 if (likely(rx_ring->next_to_use != i)) {
4066 rx_ring->next_to_use = i;
4067 if (unlikely(i-- == 0))
4068 i = (rx_ring->count - 1);
4069
4070 /* Force memory writes to complete before letting h/w
4071 * know there are new descriptors to fetch. (Only
4072 * applicable for weak-ordered memory model archs,
4073 * such as IA-64). */
4074 wmb();
4075 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4076 }
1da177e4
LT		 4077}
4078
2d7edb92
MC		 4079/**
4080 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4081 * @adapter: address of board private structure
4082 **/
4083
4084static void
581d708e 4085e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4086 struct e1000_rx_ring *rx_ring,
4087 int cleaned_count)
2d7edb92 4088{
2d7edb92
MC		 4089 struct net_device *netdev = adapter->netdev;
4090 struct pci_dev *pdev = adapter->pdev;
4091 union e1000_rx_desc_packet_split *rx_desc;
4092 struct e1000_buffer *buffer_info;
4093 struct e1000_ps_page *ps_page;
4094 struct e1000_ps_page_dma *ps_page_dma;
4095 struct sk_buff *skb;
4096 unsigned int i, j;
4097
4098 i = rx_ring->next_to_use;
4099 buffer_info = &rx_ring->buffer_info[i];
4100 ps_page = &rx_ring->ps_page[i];
4101 ps_page_dma = &rx_ring->ps_page_dma[i];
4102
72d64a43 4103 while (cleaned_count--) {
2d7edb92
MC		 4104 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4105
96838a40 4106 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4107 if (j < adapter->rx_ps_pages) {
4108 if (likely(!ps_page->ps_page[j])) {
4109 ps_page->ps_page[j] =
4110 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4111 if (unlikely(!ps_page->ps_page[j])) {
4112 adapter->alloc_rx_buff_failed++;
e4c811c9 4113 goto no_buffers;
b92ff8ee 4114 }
e4c811c9
MC		 4115 ps_page_dma->ps_page_dma[j] =
4116 pci_map_page(pdev,
4117 ps_page->ps_page[j],
4118 0, PAGE_SIZE,
4119 PCI_DMA_FROMDEVICE);
4120 }
4121 /* Refresh the desc even if buffer_addrs didn't
96838a40 4122 * change because each write-back erases
e4c811c9
MC		 4123 * this info.
4124 */
4125 rx_desc->read.buffer_addr[j+1] =
4126 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4127 } else
4128 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4129 }
4130
87f5032e
DM		 4131 skb = netdev_alloc_skb(netdev,
4132 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
2d7edb92 4133
b92ff8ee
JB		 4134 if (unlikely(!skb)) {
4135 adapter->alloc_rx_buff_failed++;
2d7edb92 4136 break;
b92ff8ee 4137 }
2d7edb92
MC		 4138
4139 /* Make buffer alignment 2 beyond a 16 byte boundary
4140 * this will result in a 16 byte aligned IP header after
4141 * the 14 byte MAC header is removed
4142 */
4143 skb_reserve(skb, NET_IP_ALIGN);
4144
4145 skb->dev = netdev;
4146
4147 buffer_info->skb = skb;
4148 buffer_info->length = adapter->rx_ps_bsize0;
4149 buffer_info->dma = pci_map_single(pdev, skb->data,
4150 adapter->rx_ps_bsize0,
4151 PCI_DMA_FROMDEVICE);
4152
4153 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4154
96838a40 4155 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4156 buffer_info = &rx_ring->buffer_info[i];
4157 ps_page = &rx_ring->ps_page[i];
4158 ps_page_dma = &rx_ring->ps_page_dma[i];
4159 }
4160
4161no_buffers:
b92ff8ee
JB		 4162 if (likely(rx_ring->next_to_use != i)) {
4163 rx_ring->next_to_use = i;
4164 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4165
4166 /* Force memory writes to complete before letting h/w
4167 * know there are new descriptors to fetch. (Only
4168 * applicable for weak-ordered memory model archs,
4169 * such as IA-64). */
4170 wmb();
4171 /* Hardware increments by 16 bytes, but packet split
4172 * descriptors are 32 bytes...so we increment tail
4173 * twice as much.
4174 */
4175 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4176 }
2d7edb92
MC		 4177}
4178
1da177e4
LT		 4179/**
4180 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4181 * @adapter:
4182 **/
4183
4184static void
4185e1000_smartspeed(struct e1000_adapter *adapter)
4186{
4187 uint16_t phy_status;
4188 uint16_t phy_ctrl;
4189
96838a40 4190 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4191 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4192 return;
4193
96838a40 4194 if (adapter->smartspeed == 0) {
1da177e4
LT		 4195 /* If Master/Slave config fault is asserted twice,
4196 * we assume back-to-back */
4197 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4198 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4199 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4200 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4201 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4202 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4203 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4204 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4205 phy_ctrl);
4206 adapter->smartspeed++;
96838a40 4207 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4208 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4209 &phy_ctrl)) {
4210 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4211 MII_CR_RESTART_AUTO_NEG);
4212 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4213 phy_ctrl);
4214 }
4215 }
4216 return;
96838a40 4217 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4218 /* If still no link, perhaps using 2/3 pair cable */
4219 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4220 phy_ctrl |= CR_1000T_MS_ENABLE;
4221 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4222 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4223 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4224 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4225 MII_CR_RESTART_AUTO_NEG);
4226 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4227 }
4228 }
4229 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4230 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4231 adapter->smartspeed = 0;
4232}
4233
4234/**
4235 * e1000_ioctl -
4236 * @netdev:
4237 * @ifreq:
4238 * @cmd:
4239 **/
4240
4241static int
4242e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4243{
4244 switch (cmd) {
4245 case SIOCGMIIPHY:
4246 case SIOCGMIIREG:
4247 case SIOCSMIIREG:
4248 return e1000_mii_ioctl(netdev, ifr, cmd);
4249 default:
4250 return -EOPNOTSUPP;
4251 }
4252}
4253
4254/**
4255 * e1000_mii_ioctl -
4256 * @netdev:
4257 * @ifreq:
4258 * @cmd:
4259 **/
4260
4261static int
4262e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4263{
60490fe0 4264 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4265 struct mii_ioctl_data *data = if_mii(ifr);
4266 int retval;
4267 uint16_t mii_reg;
4268 uint16_t spddplx;
97876fc6 4269 unsigned long flags;
1da177e4 4270
96838a40 4271 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4272 return -EOPNOTSUPP;
4273
4274 switch (cmd) {
4275 case SIOCGMIIPHY:
4276 data->phy_id = adapter->hw.phy_addr;
4277 break;
4278 case SIOCGMIIREG:
96838a40 4279 if (!capable(CAP_NET_ADMIN))
1da177e4 4280 return -EPERM;
97876fc6 4281 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4282 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4283 &data->val_out)) {
4284 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4285 return -EIO;
97876fc6
MC		 4286 }
4287 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4288 break;
4289 case SIOCSMIIREG:
96838a40 4290 if (!capable(CAP_NET_ADMIN))
1da177e4 4291 return -EPERM;
96838a40 4292 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4293 return -EFAULT;
4294 mii_reg = data->val_in;
97876fc6 4295 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4296 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4297 mii_reg)) {
4298 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4299 return -EIO;
97876fc6 4300 }
dc86d32a 4301 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4302 switch (data->reg_num) {
4303 case PHY_CTRL:
96838a40 4304 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4305 break;
96838a40 4306 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4307 adapter->hw.autoneg = 1;
4308 adapter->hw.autoneg_advertised = 0x2F;
4309 } else {
4310 if (mii_reg & 0x40)
4311 spddplx = SPEED_1000;
4312 else if (mii_reg & 0x2000)
4313 spddplx = SPEED_100;
4314 else
4315 spddplx = SPEED_10;
4316 spddplx += (mii_reg & 0x100)
cb764326
JK		 4317 ? DUPLEX_FULL :
4318 DUPLEX_HALF;
1da177e4
LT		 4319 retval = e1000_set_spd_dplx(adapter,
4320 spddplx);
96838a40 4321 if (retval) {
97876fc6 4322 spin_unlock_irqrestore(
96838a40 4323 &adapter->stats_lock,
97876fc6 4324 flags);
1da177e4 4325 return retval;
97876fc6 4326 }
1da177e4 4327 }
2db10a08
AK		 4328 if (netif_running(adapter->netdev))
4329 e1000_reinit_locked(adapter);
4330 else
1da177e4
LT		 4331 e1000_reset(adapter);
4332 break;
4333 case M88E1000_PHY_SPEC_CTRL:
4334 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4335 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4336 spin_unlock_irqrestore(
4337 &adapter->stats_lock, flags);
1da177e4 4338 return -EIO;
97876fc6 4339 }
1da177e4
LT		 4340 break;
4341 }
4342 } else {
4343 switch (data->reg_num) {
4344 case PHY_CTRL:
96838a40 4345 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4346 break;
2db10a08
AK		 4347 if (netif_running(adapter->netdev))
4348 e1000_reinit_locked(adapter);
4349 else
1da177e4
LT		 4350 e1000_reset(adapter);
4351 break;
4352 }
4353 }
97876fc6 4354 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4355 break;
4356 default:
4357 return -EOPNOTSUPP;
4358 }
4359 return E1000_SUCCESS;
4360}
4361
4362void
4363e1000_pci_set_mwi(struct e1000_hw *hw)
4364{
4365 struct e1000_adapter *adapter = hw->back;
2648345f 4366 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4367
96838a40 4368 if (ret_val)
2648345f 4369 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4370}
4371
4372void
4373e1000_pci_clear_mwi(struct e1000_hw *hw)
4374{
4375 struct e1000_adapter *adapter = hw->back;
4376
4377 pci_clear_mwi(adapter->pdev);
4378}
4379
4380void
4381e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4382{
4383 struct e1000_adapter *adapter = hw->back;
4384
4385 pci_read_config_word(adapter->pdev, reg, value);
4386}
4387
4388void
4389e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4390{
4391 struct e1000_adapter *adapter = hw->back;
4392
4393 pci_write_config_word(adapter->pdev, reg, *value);
4394}
4395
e4c780b1 4396#if 0
1da177e4
LT		 4397uint32_t
4398e1000_io_read(struct e1000_hw *hw, unsigned long port)
4399{
4400 return inl(port);
4401}
e4c780b1 4402#endif /* 0 */
1da177e4
LT		 4403
4404void
4405e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4406{
4407 outl(value, port);
4408}
4409
4410static void
4411e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4412{
60490fe0 4413 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4414 uint32_t ctrl, rctl;
4415
4416 e1000_irq_disable(adapter);
4417 adapter->vlgrp = grp;
4418
96838a40 4419 if (grp) {
1da177e4
LT		 4420 /* enable VLAN tag insert/strip */
4421 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4422 ctrl |= E1000_CTRL_VME;
4423 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4424
cd94dd0b 4425 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4426 /* enable VLAN receive filtering */
4427 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4428 rctl |= E1000_RCTL_VFE;
4429 rctl &= ~E1000_RCTL_CFIEN;
4430 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4431 e1000_update_mng_vlan(adapter);
cd94dd0b 4432 }
1da177e4
LT		 4433 } else {
4434 /* disable VLAN tag insert/strip */
4435 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4436 ctrl &= ~E1000_CTRL_VME;
4437 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4438
cd94dd0b 4439 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4440 /* disable VLAN filtering */
4441 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4442 rctl &= ~E1000_RCTL_VFE;
4443 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4444 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4445 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4446 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4447 }
cd94dd0b 4448 }
1da177e4
LT		 4449 }
4450
4451 e1000_irq_enable(adapter);
4452}
4453
4454static void
4455e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4456{
60490fe0 4457 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4458 uint32_t vfta, index;
96838a40
JB		 4459
4460 if ((adapter->hw.mng_cookie.status &
4461 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4462 (vid == adapter->mng_vlan_id))
2d7edb92 4463 return;
1da177e4
LT		 4464 /* add VID to filter table */
4465 index = (vid >> 5) & 0x7F;
4466 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4467 vfta |= (1 << (vid & 0x1F));
4468 e1000_write_vfta(&adapter->hw, index, vfta);
4469}
4470
4471static void
4472e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4473{
60490fe0 4474 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4475 uint32_t vfta, index;
4476
4477 e1000_irq_disable(adapter);
4478
96838a40 4479 if (adapter->vlgrp)
1da177e4
LT		 4480 adapter->vlgrp->vlan_devices[vid] = NULL;
4481
4482 e1000_irq_enable(adapter);
4483
96838a40
JB		 4484 if ((adapter->hw.mng_cookie.status &
4485 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4486 (vid == adapter->mng_vlan_id)) {
4487 /* release control to f/w */
4488 e1000_release_hw_control(adapter);
2d7edb92 4489 return;
ff147013
JK		 4490 }
4491
1da177e4
LT		 4492 /* remove VID from filter table */
4493 index = (vid >> 5) & 0x7F;
4494 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4495 vfta &= ~(1 << (vid & 0x1F));
4496 e1000_write_vfta(&adapter->hw, index, vfta);
4497}
4498
4499static void
4500e1000_restore_vlan(struct e1000_adapter *adapter)
4501{
4502 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4503
96838a40 4504 if (adapter->vlgrp) {
1da177e4 4505 uint16_t vid;
96838a40
JB		 4506 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4507 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4508 continue;
4509 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4510 }
4511 }
4512}
4513
4514int
4515e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4516{
4517 adapter->hw.autoneg = 0;
4518
6921368f 4519 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4520 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4521 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4522 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4523 return -EINVAL;
4524 }
4525
96838a40 4526 switch (spddplx) {
1da177e4
LT		 4527 case SPEED_10 + DUPLEX_HALF:
4528 adapter->hw.forced_speed_duplex = e1000_10_half;
4529 break;
4530 case SPEED_10 + DUPLEX_FULL:
4531 adapter->hw.forced_speed_duplex = e1000_10_full;
4532 break;
4533 case SPEED_100 + DUPLEX_HALF:
4534 adapter->hw.forced_speed_duplex = e1000_100_half;
4535 break;
4536 case SPEED_100 + DUPLEX_FULL:
4537 adapter->hw.forced_speed_duplex = e1000_100_full;
4538 break;
4539 case SPEED_1000 + DUPLEX_FULL:
4540 adapter->hw.autoneg = 1;
4541 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4542 break;
4543 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4544 default:
2648345f 4545 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4546 return -EINVAL;
4547 }
4548 return 0;
4549}
4550
b6a1d5f8 4551#ifdef CONFIG_PM
0f15a8fa
JK		 4552/* Save/restore 16 or 64 dwords of PCI config space depending on which
4553 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4554 */
4555#define PCIE_CONFIG_SPACE_LEN 256
4556#define PCI_CONFIG_SPACE_LEN 64
4557static int
4558e1000_pci_save_state(struct e1000_adapter *adapter)
4559{
4560 struct pci_dev *dev = adapter->pdev;
4561 int size;
4562 int i;
0f15a8fa 4563
2f82665f
JB		 4564 if (adapter->hw.mac_type >= e1000_82571)
4565 size = PCIE_CONFIG_SPACE_LEN;
4566 else
4567 size = PCI_CONFIG_SPACE_LEN;
4568
4569 WARN_ON(adapter->config_space != NULL);
4570
4571 adapter->config_space = kmalloc(size, GFP_KERNEL);
4572 if (!adapter->config_space) {
4573 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4574 return -ENOMEM;
4575 }
4576 for (i = 0; i < (size / 4); i++)
4577 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4578 return 0;
4579}
4580
4581static void
4582e1000_pci_restore_state(struct e1000_adapter *adapter)
4583{
4584 struct pci_dev *dev = adapter->pdev;
4585 int size;
4586 int i;
0f15a8fa 4587
2f82665f
JB		 4588 if (adapter->config_space == NULL)
4589 return;
0f15a8fa 4590
2f82665f
JB		 4591 if (adapter->hw.mac_type >= e1000_82571)
4592 size = PCIE_CONFIG_SPACE_LEN;
4593 else
4594 size = PCI_CONFIG_SPACE_LEN;
4595 for (i = 0; i < (size / 4); i++)
4596 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4597 kfree(adapter->config_space);
4598 adapter->config_space = NULL;
4599 return;
4600}
4601#endif /* CONFIG_PM */
4602
1da177e4 4603static int
829ca9a3 4604e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4605{
4606 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4607 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4608 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4609 uint32_t wufc = adapter->wol;
6fdfef16 4610#ifdef CONFIG_PM
240b1710 4611 int retval = 0;
6fdfef16 4612#endif
1da177e4
LT		 4613
4614 netif_device_detach(netdev);
4615
2db10a08
AK		 4616 if (netif_running(netdev)) {
4617 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4618 e1000_down(adapter);
2db10a08 4619 }
1da177e4 4620
2f82665f 4621#ifdef CONFIG_PM
0f15a8fa
JK		 4622 /* Implement our own version of pci_save_state(pdev) because pci-
4623 * express adapters have 256-byte config spaces. */
2f82665f
JB		 4624 retval = e1000_pci_save_state(adapter);
4625 if (retval)
4626 return retval;
4627#endif
4628
1da177e4 4629 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4630 if (status & E1000_STATUS_LU)
1da177e4
LT		 4631 wufc &= ~E1000_WUFC_LNKC;
4632
96838a40 4633 if (wufc) {
1da177e4
LT		 4634 e1000_setup_rctl(adapter);
4635 e1000_set_multi(netdev);
4636
4637 /* turn on all-multi mode if wake on multicast is enabled */
96838a40 4638 if (adapter->wol & E1000_WUFC_MC) {
1da177e4
LT		 4639 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4640 rctl |= E1000_RCTL_MPE;
4641 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4642 }
4643
96838a40 4644 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4645 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4646 /* advertise wake from D3Cold */
4647 #define E1000_CTRL_ADVD3WUC 0x00100000
4648 /* phy power management enable */
4649 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4650 ctrl |= E1000_CTRL_ADVD3WUC |
4651 E1000_CTRL_EN_PHY_PWR_MGMT;
4652 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4653 }
4654
96838a40 4655 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4656 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4657 /* keep the laser running in D3 */
4658 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4659 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4660 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4661 }
4662
2d7edb92
MC		 4663 /* Allow time for pending master requests to run */
4664 e1000_disable_pciex_master(&adapter->hw);
4665
1da177e4
LT		 4666 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4667 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 4668 pci_enable_wake(pdev, PCI_D3hot, 1);
4669 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4670 } else {
4671 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4672 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 4673 pci_enable_wake(pdev, PCI_D3hot, 0);
4674 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4675 }
4676
cd94dd0b 4677 /* FIXME: this code is incorrect for PCI Express */
96838a40 4678 if (adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 4679 adapter->hw.mac_type != e1000_ich8lan &&
1da177e4
LT		 4680 adapter->hw.media_type == e1000_media_type_copper) {
4681 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4682 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4683 manc |= E1000_MANC_ARP_EN;
4684 E1000_WRITE_REG(&adapter->hw, MANC, manc);
d0e027db
AK		 4685 pci_enable_wake(pdev, PCI_D3hot, 1);
4686 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4687 }
4688 }
4689
cd94dd0b
AK		 4690 if (adapter->hw.phy_type == e1000_phy_igp_3)
4691 e1000_phy_powerdown_workaround(&adapter->hw);
4692
b55ccb35
JK		 4693 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4694 * would have already happened in close and is redundant. */
4695 e1000_release_hw_control(adapter);
2d7edb92 4696
1da177e4 4697 pci_disable_device(pdev);
240b1710 4698
d0e027db 4699 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4700
4701 return 0;
4702}
4703
2f82665f 4704#ifdef CONFIG_PM
1da177e4
LT		 4705static int
4706e1000_resume(struct pci_dev *pdev)
4707{
4708 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4709 struct e1000_adapter *adapter = netdev_priv(netdev);
3d1dd8cb 4710 uint32_t manc, err;
1da177e4 4711
d0e027db 4712 pci_set_power_state(pdev, PCI_D0);
2f82665f 4713 e1000_pci_restore_state(adapter);
3d1dd8cb
AK		 4714 if ((err = pci_enable_device(pdev))) {
4715 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4716 return err;
4717 }
a4cb847d 4718 pci_set_master(pdev);
1da177e4 4719
d0e027db
AK		 4720 pci_enable_wake(pdev, PCI_D3hot, 0);
4721 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4722
4723 e1000_reset(adapter);
4724 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4725
96838a40 4726 if (netif_running(netdev))
1da177e4
LT		 4727 e1000_up(adapter);
4728
4729 netif_device_attach(netdev);
4730
cd94dd0b 4731 /* FIXME: this code is incorrect for PCI Express */
96838a40 4732 if (adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 4733 adapter->hw.mac_type != e1000_ich8lan &&
1da177e4
LT		 4734 adapter->hw.media_type == e1000_media_type_copper) {
4735 manc = E1000_READ_REG(&adapter->hw, MANC);
4736 manc &= ~(E1000_MANC_ARP_EN);
4737 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4738 }
4739
b55ccb35
JK		 4740 /* If the controller is 82573 and f/w is AMT, do not set
4741 * DRV_LOAD until the interface is up. For all other cases,
4742 * let the f/w know that the h/w is now under the control
4743 * of the driver. */
4744 if (adapter->hw.mac_type != e1000_82573 ||
4745 !e1000_check_mng_mode(&adapter->hw))
4746 e1000_get_hw_control(adapter);
2d7edb92 4747
1da177e4
LT		 4748 return 0;
4749}
4750#endif
c653e635
AK		 4751
4752static void e1000_shutdown(struct pci_dev *pdev)
4753{
4754 e1000_suspend(pdev, PMSG_SUSPEND);
4755}
4756
1da177e4
LT		 4757#ifdef CONFIG_NET_POLL_CONTROLLER
4758/*
4759 * Polling 'interrupt' - used by things like netconsole to send skbs
4760 * without having to re-enable interrupts. It's not called while
4761 * the interrupt routine is executing.
4762 */
4763static void
2648345f 4764e1000_netpoll(struct net_device *netdev)
1da177e4 4765{
60490fe0 4766 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4767
1da177e4
LT		 4768 disable_irq(adapter->pdev->irq);
4769 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4770 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4771#ifndef CONFIG_E1000_NAPI
4772 adapter->clean_rx(adapter, adapter->rx_ring);
4773#endif
1da177e4
LT		 4774 enable_irq(adapter->pdev->irq);
4775}
4776#endif
4777
9026729b
AK		 4778/**
4779 * e1000_io_error_detected - called when PCI error is detected
4780 * @pdev: Pointer to PCI device
4781 * @state: The current pci conneection state
4782 *
4783 * This function is called after a PCI bus error affecting
4784 * this device has been detected.
4785 */
4786static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4787{
4788 struct net_device *netdev = pci_get_drvdata(pdev);
4789 struct e1000_adapter *adapter = netdev->priv;
4790
4791 netif_device_detach(netdev);
4792
4793 if (netif_running(netdev))
4794 e1000_down(adapter);
4795
4796 /* Request a slot slot reset. */
4797 return PCI_ERS_RESULT_NEED_RESET;
4798}
4799
4800/**
4801 * e1000_io_slot_reset - called after the pci bus has been reset.
4802 * @pdev: Pointer to PCI device
4803 *
4804 * Restart the card from scratch, as if from a cold-boot. Implementation
4805 * resembles the first-half of the e1000_resume routine.
4806 */
4807static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4808{
4809 struct net_device *netdev = pci_get_drvdata(pdev);
4810 struct e1000_adapter *adapter = netdev->priv;
4811
4812 if (pci_enable_device(pdev)) {
4813 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4814 return PCI_ERS_RESULT_DISCONNECT;
4815 }
4816 pci_set_master(pdev);
4817
4818 pci_enable_wake(pdev, 3, 0);
4819 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4820
4821 /* Perform card reset only on one instance of the card */
4822 if (PCI_FUNC (pdev->devfn) != 0)
4823 return PCI_ERS_RESULT_RECOVERED;
4824
4825 e1000_reset(adapter);
4826 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4827
4828 return PCI_ERS_RESULT_RECOVERED;
4829}
4830
4831/**
4832 * e1000_io_resume - called when traffic can start flowing again.
4833 * @pdev: Pointer to PCI device
4834 *
4835 * This callback is called when the error recovery driver tells us that
4836 * its OK to resume normal operation. Implementation resembles the
4837 * second-half of the e1000_resume routine.
4838 */
4839static void e1000_io_resume(struct pci_dev *pdev)
4840{
4841 struct net_device *netdev = pci_get_drvdata(pdev);
4842 struct e1000_adapter *adapter = netdev->priv;
4843 uint32_t manc, swsm;
4844
4845 if (netif_running(netdev)) {
4846 if (e1000_up(adapter)) {
4847 printk("e1000: can't bring device back up after reset\n");
4848 return;
4849 }
4850 }
4851
4852 netif_device_attach(netdev);
4853
4854 if (adapter->hw.mac_type >= e1000_82540 &&
4855 adapter->hw.media_type == e1000_media_type_copper) {
4856 manc = E1000_READ_REG(&adapter->hw, MANC);
4857 manc &= ~(E1000_MANC_ARP_EN);
4858 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4859 }
4860
4861 switch (adapter->hw.mac_type) {
4862 case e1000_82573:
4863 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4864 E1000_WRITE_REG(&adapter->hw, SWSM,
4865 swsm | E1000_SWSM_DRV_LOAD);
4866 break;
4867 default:
4868 break;
4869 }
4870
4871 if (netif_running(netdev))
4872 mod_timer(&adapter->watchdog_timer, jiffies);
4873}
4874
1da177e4 4875/* e1000_main.c */
Linux kernel - Deliverables
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