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netdevice: safe convert to netdev_priv() #part-2
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
c3570acb 34#define DRV_VERSION "7.3.20-k3-NAPI"
abec42a4
SH		 35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
45static struct pci_device_id e1000_pci_tbl[] = {
46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN		 88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN		 93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT		 125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4
LT		 127static void e1000_82547_tx_fifo_stall(unsigned long data);
128static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
129static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
130static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
131static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 132static irqreturn_t e1000_intr(int irq, void *data);
9ac98284 133static irqreturn_t e1000_intr_msi(int irq, void *data);
c3033b01
JP		 134static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
bea3348e 136static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 137static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
581d708e 140static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 141 struct e1000_rx_ring *rx_ring,
142 int cleaned_count);
1da177e4
LT		 143static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
144static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
145 int cmd);
1da177e4
LT		 146static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
147static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
148static void e1000_tx_timeout(struct net_device *dev);
65f27f38 149static void e1000_reset_task(struct work_struct *work);
1da177e4 150static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 151static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
152 struct sk_buff *skb);
1da177e4
LT		 153
154static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP		 155static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
156static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 157static void e1000_restore_vlan(struct e1000_adapter *adapter);
158
977e74b5 159static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 160#ifdef CONFIG_PM
1da177e4
LT		 161static int e1000_resume(struct pci_dev *pdev);
162#endif
c653e635 163static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 164
165#ifdef CONFIG_NET_POLL_CONTROLLER
166/* for netdump / net console */
167static void e1000_netpoll (struct net_device *netdev);
168#endif
169
1f753861
JB		 170#define COPYBREAK_DEFAULT 256
171static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
172module_param(copybreak, uint, 0644);
173MODULE_PARM_DESC(copybreak,
174 "Maximum size of packet that is copied to a new buffer on receive");
175
9026729b
AK		 176static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
177 pci_channel_state_t state);
178static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
179static void e1000_io_resume(struct pci_dev *pdev);
180
181static struct pci_error_handlers e1000_err_handler = {
182 .error_detected = e1000_io_error_detected,
183 .slot_reset = e1000_io_slot_reset,
184 .resume = e1000_io_resume,
185};
24025e4e 186
1da177e4
LT		 187static struct pci_driver e1000_driver = {
188 .name = e1000_driver_name,
189 .id_table = e1000_pci_tbl,
190 .probe = e1000_probe,
191 .remove = __devexit_p(e1000_remove),
c4e24f01 192#ifdef CONFIG_PM
1da177e4 193 /* Power Managment Hooks */
1da177e4 194 .suspend = e1000_suspend,
c653e635 195 .resume = e1000_resume,
1da177e4 196#endif
9026729b
AK		 197 .shutdown = e1000_shutdown,
198 .err_handler = &e1000_err_handler
1da177e4
LT		 199};
200
201MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
202MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
203MODULE_LICENSE("GPL");
204MODULE_VERSION(DRV_VERSION);
205
206static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
207module_param(debug, int, 0);
208MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
209
210/**
211 * e1000_init_module - Driver Registration Routine
212 *
213 * e1000_init_module is the first routine called when the driver is
214 * loaded. All it does is register with the PCI subsystem.
215 **/
216
64798845 217static int __init e1000_init_module(void)
1da177e4
LT		 218{
219 int ret;
220 printk(KERN_INFO "%s - version %s\n",
221 e1000_driver_string, e1000_driver_version);
222
223 printk(KERN_INFO "%s\n", e1000_copyright);
224
29917620 225 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 226 if (copybreak != COPYBREAK_DEFAULT) {
227 if (copybreak == 0)
228 printk(KERN_INFO "e1000: copybreak disabled\n");
229 else
230 printk(KERN_INFO "e1000: copybreak enabled for "
231 "packets <= %u bytes\n", copybreak);
232 }
1da177e4
LT		 233 return ret;
234}
235
236module_init(e1000_init_module);
237
238/**
239 * e1000_exit_module - Driver Exit Cleanup Routine
240 *
241 * e1000_exit_module is called just before the driver is removed
242 * from memory.
243 **/
244
64798845 245static void __exit e1000_exit_module(void)
1da177e4 246{
1da177e4
LT		 247 pci_unregister_driver(&e1000_driver);
248}
249
250module_exit(e1000_exit_module);
251
2db10a08
AK		 252static int e1000_request_irq(struct e1000_adapter *adapter)
253{
1dc32918 254 struct e1000_hw *hw = &adapter->hw;
2db10a08 255 struct net_device *netdev = adapter->netdev;
3e18826c 256 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 257 int irq_flags = IRQF_SHARED;
258 int err;
2db10a08 259
1dc32918 260 if (hw->mac_type >= e1000_82571) {
e94bd23f
AK		 261 adapter->have_msi = !pci_enable_msi(adapter->pdev);
262 if (adapter->have_msi) {
3e18826c 263 handler = e1000_intr_msi;
e94bd23f 264 irq_flags = 0;
2db10a08
AK		 265 }
266 }
e94bd23f
AK		 267
268 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
269 netdev);
270 if (err) {
271 if (adapter->have_msi)
272 pci_disable_msi(adapter->pdev);
2db10a08
AK		 273 DPRINTK(PROBE, ERR,
274 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 275 }
2db10a08
AK		 276
277 return err;
278}
279
280static void e1000_free_irq(struct e1000_adapter *adapter)
281{
282 struct net_device *netdev = adapter->netdev;
283
284 free_irq(adapter->pdev->irq, netdev);
285
2db10a08
AK		 286 if (adapter->have_msi)
287 pci_disable_msi(adapter->pdev);
2db10a08
AK		 288}
289
1da177e4
LT		 290/**
291 * e1000_irq_disable - Mask off interrupt generation on the NIC
292 * @adapter: board private structure
293 **/
294
64798845 295static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 296{
1dc32918
JP		 297 struct e1000_hw *hw = &adapter->hw;
298
299 ew32(IMC, ~0);
300 E1000_WRITE_FLUSH();
1da177e4
LT		 301 synchronize_irq(adapter->pdev->irq);
302}
303
304/**
305 * e1000_irq_enable - Enable default interrupt generation settings
306 * @adapter: board private structure
307 **/
308
64798845 309static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 310{
1dc32918
JP		 311 struct e1000_hw *hw = &adapter->hw;
312
313 ew32(IMS, IMS_ENABLE_MASK);
314 E1000_WRITE_FLUSH();
1da177e4 315}
3ad2cc67 316
64798845 317static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 318{
1dc32918 319 struct e1000_hw *hw = &adapter->hw;
2d7edb92 320 struct net_device *netdev = adapter->netdev;
1dc32918 321 u16 vid = hw->mng_cookie.vlan_id;
406874a7 322 u16 old_vid = adapter->mng_vlan_id;
96838a40 323 if (adapter->vlgrp) {
5c15bdec 324 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 325 if (hw->mng_cookie.status &
2d7edb92
MC		 326 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
327 e1000_vlan_rx_add_vid(netdev, vid);
328 adapter->mng_vlan_id = vid;
329 } else
330 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 331
406874a7 332 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 333 (vid != old_vid) &&
5c15bdec 334 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 335 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 336 } else
337 adapter->mng_vlan_id = vid;
2d7edb92
MC		 338 }
339}
b55ccb35
JK		 340
341/**
342 * e1000_release_hw_control - release control of the h/w to f/w
343 * @adapter: address of board private structure
344 *
345 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
346 * For ASF and Pass Through versions of f/w this means that the
347 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 348 * of the f/w this means that the network i/f is closed.
76c224bc 349 *
b55ccb35
JK		 350 **/
351
64798845 352static void e1000_release_hw_control(struct e1000_adapter *adapter)
b55ccb35 353{
406874a7
JP		 354 u32 ctrl_ext;
355 u32 swsm;
1dc32918 356 struct e1000_hw *hw = &adapter->hw;
b55ccb35
JK		 357
358 /* Let firmware taken over control of h/w */
1dc32918 359 switch (hw->mac_type) {
b55ccb35 360 case e1000_82573:
1dc32918
JP		 361 swsm = er32(SWSM);
362 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
31d76442
BA		 363 break;
364 case e1000_82571:
365 case e1000_82572:
366 case e1000_80003es2lan:
cd94dd0b 367 case e1000_ich8lan:
1dc32918
JP		 368 ctrl_ext = er32(CTRL_EXT);
369 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 370 break;
b55ccb35
JK		 371 default:
372 break;
373 }
374}
375
376/**
377 * e1000_get_hw_control - get control of the h/w from f/w
378 * @adapter: address of board private structure
379 *
380 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 381 * For ASF and Pass Through versions of f/w this means that
382 * the driver is loaded. For AMT version (only with 82573)
90fb5135 383 * of the f/w this means that the network i/f is open.
76c224bc 384 *
b55ccb35
JK		 385 **/
386
64798845 387static void e1000_get_hw_control(struct e1000_adapter *adapter)
b55ccb35 388{
406874a7
JP		 389 u32 ctrl_ext;
390 u32 swsm;
1dc32918 391 struct e1000_hw *hw = &adapter->hw;
90fb5135 392
b55ccb35 393 /* Let firmware know the driver has taken over */
1dc32918 394 switch (hw->mac_type) {
b55ccb35 395 case e1000_82573:
1dc32918
JP		 396 swsm = er32(SWSM);
397 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
b55ccb35 398 break;
31d76442
BA		 399 case e1000_82571:
400 case e1000_82572:
401 case e1000_80003es2lan:
cd94dd0b 402 case e1000_ich8lan:
1dc32918
JP		 403 ctrl_ext = er32(CTRL_EXT);
404 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 405 break;
b55ccb35
JK		 406 default:
407 break;
408 }
409}
410
64798845 411static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 412{
1dc32918
JP		 413 struct e1000_hw *hw = &adapter->hw;
414
0fccd0e9 415 if (adapter->en_mng_pt) {
1dc32918 416 u32 manc = er32(MANC);
0fccd0e9
JG		 417
418 /* disable hardware interception of ARP */
419 manc &= ~(E1000_MANC_ARP_EN);
420
421 /* enable receiving management packets to the host */
422 /* this will probably generate destination unreachable messages
423 * from the host OS, but the packets will be handled on SMBUS */
1dc32918
JP		 424 if (hw->has_manc2h) {
425 u32 manc2h = er32(MANC2H);
0fccd0e9
JG		 426
427 manc |= E1000_MANC_EN_MNG2HOST;
428#define E1000_MNG2HOST_PORT_623 (1 << 5)
429#define E1000_MNG2HOST_PORT_664 (1 << 6)
430 manc2h |= E1000_MNG2HOST_PORT_623;
431 manc2h |= E1000_MNG2HOST_PORT_664;
1dc32918 432 ew32(MANC2H, manc2h);
0fccd0e9
JG		 433 }
434
1dc32918 435 ew32(MANC, manc);
0fccd0e9
JG		 436 }
437}
438
64798845 439static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 440{
1dc32918
JP		 441 struct e1000_hw *hw = &adapter->hw;
442
0fccd0e9 443 if (adapter->en_mng_pt) {
1dc32918 444 u32 manc = er32(MANC);
0fccd0e9
JG		 445
446 /* re-enable hardware interception of ARP */
447 manc |= E1000_MANC_ARP_EN;
448
1dc32918 449 if (hw->has_manc2h)
0fccd0e9
JG		 450 manc &= ~E1000_MANC_EN_MNG2HOST;
451
452 /* don't explicitly have to mess with MANC2H since
453 * MANC has an enable disable that gates MANC2H */
454
1dc32918 455 ew32(MANC, manc);
0fccd0e9
JG		 456 }
457}
458
e0aac5a2
AK		 459/**
460 * e1000_configure - configure the hardware for RX and TX
461 * @adapter = private board structure
462 **/
463static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 464{
465 struct net_device *netdev = adapter->netdev;
2db10a08 466 int i;
1da177e4 467
db0ce50d 468 e1000_set_rx_mode(netdev);
1da177e4
LT		 469
470 e1000_restore_vlan(adapter);
0fccd0e9 471 e1000_init_manageability(adapter);
1da177e4
LT		 472
473 e1000_configure_tx(adapter);
474 e1000_setup_rctl(adapter);
475 e1000_configure_rx(adapter);
72d64a43
JK		 476 /* call E1000_DESC_UNUSED which always leaves
477 * at least 1 descriptor unused to make sure
478 * next_to_use != next_to_clean */
f56799ea 479 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 480 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 481 adapter->alloc_rx_buf(adapter, ring,
482 E1000_DESC_UNUSED(ring));
f56799ea 483 }
1da177e4 484
7bfa4816 485 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 486}
487
488int e1000_up(struct e1000_adapter *adapter)
489{
1dc32918
JP		 490 struct e1000_hw *hw = &adapter->hw;
491
e0aac5a2
AK		 492 /* hardware has been reset, we need to reload some things */
493 e1000_configure(adapter);
494
495 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 496
bea3348e 497 napi_enable(&adapter->napi);
c3570acb 498
5de55624
MC		 499 e1000_irq_enable(adapter);
500
79f3d399 501 /* fire a link change interrupt to start the watchdog */
1dc32918 502 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 503 return 0;
504}
505
79f05bf0
AK		 506/**
507 * e1000_power_up_phy - restore link in case the phy was powered down
508 * @adapter: address of board private structure
509 *
510 * The phy may be powered down to save power and turn off link when the
511 * driver is unloaded and wake on lan is not enabled (among others)
512 * *** this routine MUST be followed by a call to e1000_reset ***
513 *
514 **/
515
d658266e 516void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 517{
1dc32918 518 struct e1000_hw *hw = &adapter->hw;
406874a7 519 u16 mii_reg = 0;
79f05bf0
AK		 520
521 /* Just clear the power down bit to wake the phy back up */
1dc32918 522 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 523 /* according to the manual, the phy will retain its
524 * settings across a power-down/up cycle */
1dc32918 525 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 526 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 527 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 528 }
529}
530
531static void e1000_power_down_phy(struct e1000_adapter *adapter)
532{
1dc32918
JP		 533 struct e1000_hw *hw = &adapter->hw;
534
61c2505f 535 /* Power down the PHY so no link is implied when interface is down *
c3033b01 536 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 537 * (a) WoL is enabled
538 * (b) AMT is active
539 * (c) SoL/IDER session is active */
1dc32918
JP		 540 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
541 hw->media_type == e1000_media_type_copper) {
406874a7 542 u16 mii_reg = 0;
61c2505f 543
1dc32918 544 switch (hw->mac_type) {
61c2505f
BA		 545 case e1000_82540:
546 case e1000_82545:
547 case e1000_82545_rev_3:
548 case e1000_82546:
549 case e1000_82546_rev_3:
550 case e1000_82541:
551 case e1000_82541_rev_2:
552 case e1000_82547:
553 case e1000_82547_rev_2:
1dc32918 554 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 555 goto out;
556 break;
557 case e1000_82571:
558 case e1000_82572:
559 case e1000_82573:
560 case e1000_80003es2lan:
561 case e1000_ich8lan:
1dc32918
JP		 562 if (e1000_check_mng_mode(hw) ||
563 e1000_check_phy_reset_block(hw))
61c2505f
BA		 564 goto out;
565 break;
566 default:
567 goto out;
568 }
1dc32918 569 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 570 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 571 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 572 mdelay(1);
573 }
61c2505f
BA		 574out:
575 return;
79f05bf0
AK		 576}
577
64798845 578void e1000_down(struct e1000_adapter *adapter)
1da177e4
LT		 579{
580 struct net_device *netdev = adapter->netdev;
581
1314bbf3
AK		 582 /* signal that we're down so the interrupt handler does not
583 * reschedule our watchdog timer */
584 set_bit(__E1000_DOWN, &adapter->flags);
585
bea3348e 586 napi_disable(&adapter->napi);
c3570acb 587
1da177e4 588 e1000_irq_disable(adapter);
c1605eb3 589
1da177e4
LT		 590 del_timer_sync(&adapter->tx_fifo_stall_timer);
591 del_timer_sync(&adapter->watchdog_timer);
592 del_timer_sync(&adapter->phy_info_timer);
593
7bfa4816 594 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 595 adapter->link_speed = 0;
596 adapter->link_duplex = 0;
597 netif_carrier_off(netdev);
598 netif_stop_queue(netdev);
599
600 e1000_reset(adapter);
581d708e
MC		 601 e1000_clean_all_tx_rings(adapter);
602 e1000_clean_all_rx_rings(adapter);
1da177e4 603}
1da177e4 604
64798845 605void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 606{
607 WARN_ON(in_interrupt());
608 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
609 msleep(1);
610 e1000_down(adapter);
611 e1000_up(adapter);
612 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 613}
614
64798845 615void e1000_reset(struct e1000_adapter *adapter)
1da177e4 616{
1dc32918 617 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 618 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
619 u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
c3033b01 620 bool legacy_pba_adjust = false;
1da177e4
LT		 621
622 /* Repartition Pba for greater than 9k mtu
623 * To take effect CTRL.RST is required.
624 */
625
1dc32918 626 switch (hw->mac_type) {
018ea44e
BA		 627 case e1000_82542_rev2_0:
628 case e1000_82542_rev2_1:
629 case e1000_82543:
630 case e1000_82544:
631 case e1000_82540:
632 case e1000_82541:
633 case e1000_82541_rev_2:
c3033b01 634 legacy_pba_adjust = true;
018ea44e
BA		 635 pba = E1000_PBA_48K;
636 break;
637 case e1000_82545:
638 case e1000_82545_rev_3:
639 case e1000_82546:
640 case e1000_82546_rev_3:
641 pba = E1000_PBA_48K;
642 break;
2d7edb92 643 case e1000_82547:
0e6ef3e0 644 case e1000_82547_rev_2:
c3033b01 645 legacy_pba_adjust = true;
2d7edb92
MC		 646 pba = E1000_PBA_30K;
647 break;
868d5309
MC		 648 case e1000_82571:
649 case e1000_82572:
6418ecc6 650 case e1000_80003es2lan:
868d5309
MC		 651 pba = E1000_PBA_38K;
652 break;
2d7edb92 653 case e1000_82573:
018ea44e 654 pba = E1000_PBA_20K;
2d7edb92 655 break;
cd94dd0b
AK		 656 case e1000_ich8lan:
657 pba = E1000_PBA_8K;
018ea44e
BA		 658 case e1000_undefined:
659 case e1000_num_macs:
2d7edb92
MC		 660 break;
661 }
662
c3033b01 663 if (legacy_pba_adjust) {
018ea44e
BA		 664 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
665 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 666
1dc32918 667 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 668 adapter->tx_fifo_head = 0;
669 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
670 adapter->tx_fifo_size =
671 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
672 atomic_set(&adapter->tx_fifo_stall, 0);
673 }
1dc32918 674 } else if (hw->max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
018ea44e 675 /* adjust PBA for jumbo frames */
1dc32918 676 ew32(PBA, pba);
018ea44e
BA		 677
678 /* To maintain wire speed transmits, the Tx FIFO should be
679 * large enough to accomodate two full transmit packets,
680 * rounded up to the next 1KB and expressed in KB. Likewise,
681 * the Rx FIFO should be large enough to accomodate at least
682 * one full receive packet and is similarly rounded up and
683 * expressed in KB. */
1dc32918 684 pba = er32(PBA);
018ea44e
BA		 685 /* upper 16 bits has Tx packet buffer allocation size in KB */
686 tx_space = pba >> 16;
687 /* lower 16 bits has Rx packet buffer allocation size in KB */
688 pba &= 0xffff;
689 /* don't include ethernet FCS because hardware appends/strips */
690 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
691 VLAN_TAG_SIZE;
692 min_tx_space = min_rx_space;
693 min_tx_space *= 2;
9099cfb9 694 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 695 min_tx_space >>= 10;
9099cfb9 696 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 697 min_rx_space >>= 10;
698
699 /* If current Tx allocation is less than the min Tx FIFO size,
700 * and the min Tx FIFO size is less than the current Rx FIFO
701 * allocation, take space away from current Rx allocation */
702 if (tx_space < min_tx_space &&
703 ((min_tx_space - tx_space) < pba)) {
704 pba = pba - (min_tx_space - tx_space);
705
706 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 707 switch (hw->mac_type) {
018ea44e
BA		 708 case e1000_82545 ... e1000_82546_rev_3:
709 pba &= ~(E1000_PBA_8K - 1);
710 break;
711 default:
712 break;
713 }
714
715 /* if short on rx space, rx wins and must trump tx
716 * adjustment or use Early Receive if available */
717 if (pba < min_rx_space) {
1dc32918 718 switch (hw->mac_type) {
018ea44e
BA		 719 case e1000_82573:
720 /* ERT enabled in e1000_configure_rx */
721 break;
722 default:
723 pba = min_rx_space;
724 break;
725 }
726 }
727 }
1da177e4 728 }
2d7edb92 729
1dc32918 730 ew32(PBA, pba);
1da177e4
LT		 731
732 /* flow control settings */
f11b7f85
JK		 733 /* Set the FC high water mark to 90% of the FIFO size.
734 * Required to clear last 3 LSB */
735 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 736 /* We can't use 90% on small FIFOs because the remainder
737 * would be less than 1 full frame. In this case, we size
738 * it to allow at least a full frame above the high water
739 * mark. */
740 if (pba < E1000_PBA_16K)
741 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85 742
1dc32918
JP		 743 hw->fc_high_water = fc_high_water_mark;
744 hw->fc_low_water = fc_high_water_mark - 8;
745 if (hw->mac_type == e1000_80003es2lan)
746 hw->fc_pause_time = 0xFFFF;
87041639 747 else
1dc32918
JP		 748 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
749 hw->fc_send_xon = 1;
750 hw->fc = hw->original_fc;
1da177e4 751
2d7edb92 752 /* Allow time for pending master requests to run */
1dc32918
JP		 753 e1000_reset_hw(hw);
754 if (hw->mac_type >= e1000_82544)
755 ew32(WUC, 0);
09ae3e88 756
1dc32918 757 if (e1000_init_hw(hw))
1da177e4 758 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 759 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 760
761 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918
JP		 762 if (hw->mac_type >= e1000_82544 &&
763 hw->mac_type <= e1000_82547_rev_2 &&
764 hw->autoneg == 1 &&
765 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
766 u32 ctrl = er32(CTRL);
3d5460a0
JB		 767 /* clear phy power management bit if we are in gig only mode,
768 * which if enabled will attempt negotiation to 100Mb, which
769 * can cause a loss of link at power off or driver unload */
770 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 771 ew32(CTRL, ctrl);
3d5460a0
JB		 772 }
773
1da177e4 774 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 775 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 776
1dc32918
JP		 777 e1000_reset_adaptive(hw);
778 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202
AK		 779
780 if (!adapter->smart_power_down &&
1dc32918
JP		 781 (hw->mac_type == e1000_82571 ||
782 hw->mac_type == e1000_82572)) {
406874a7 783 u16 phy_data = 0;
9a53a202
AK		 784 /* speed up time to link by disabling smart power down, ignore
785 * the return value of this function because there is nothing
786 * different we would do if it failed */
1dc32918 787 e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 788 &phy_data);
789 phy_data &= ~IGP02E1000_PM_SPD;
1dc32918 790 e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 791 phy_data);
792 }
793
0fccd0e9 794 e1000_release_manageability(adapter);
1da177e4
LT		 795}
796
67b3c27c
AK		 797/**
798 * Dump the eeprom for users having checksum issues
799 **/
b4ea895d 800static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 801{
802 struct net_device *netdev = adapter->netdev;
803 struct ethtool_eeprom eeprom;
804 const struct ethtool_ops *ops = netdev->ethtool_ops;
805 u8 *data;
806 int i;
807 u16 csum_old, csum_new = 0;
808
809 eeprom.len = ops->get_eeprom_len(netdev);
810 eeprom.offset = 0;
811
812 data = kmalloc(eeprom.len, GFP_KERNEL);
813 if (!data) {
814 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
815 " data\n");
816 return;
817 }
818
819 ops->get_eeprom(netdev, &eeprom, data);
820
821 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
822 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
823 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
824 csum_new += data[i] + (data[i + 1] << 8);
825 csum_new = EEPROM_SUM - csum_new;
826
827 printk(KERN_ERR "/*********************/\n");
828 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
829 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
830
831 printk(KERN_ERR "Offset Values\n");
832 printk(KERN_ERR "======== ======\n");
833 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
834
835 printk(KERN_ERR "Include this output when contacting your support "
836 "provider.\n");
837 printk(KERN_ERR "This is not a software error! Something bad "
838 "happened to your hardware or\n");
839 printk(KERN_ERR "EEPROM image. Ignoring this "
840 "problem could result in further problems,\n");
841 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
842 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
843 "which is invalid\n");
844 printk(KERN_ERR "and requires you to set the proper MAC "
845 "address manually before continuing\n");
846 printk(KERN_ERR "to enable this network device.\n");
847 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
848 "to your hardware vendor\n");
63cd31f6 849 printk(KERN_ERR "or Intel Customer Support.\n");
67b3c27c
AK		 850 printk(KERN_ERR "/*********************/\n");
851
852 kfree(data);
853}
854
81250297
TI		 855/**
856 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
857 * @pdev: PCI device information struct
858 *
859 * Return true if an adapter needs ioport resources
860 **/
861static int e1000_is_need_ioport(struct pci_dev *pdev)
862{
863 switch (pdev->device) {
864 case E1000_DEV_ID_82540EM:
865 case E1000_DEV_ID_82540EM_LOM:
866 case E1000_DEV_ID_82540EP:
867 case E1000_DEV_ID_82540EP_LOM:
868 case E1000_DEV_ID_82540EP_LP:
869 case E1000_DEV_ID_82541EI:
870 case E1000_DEV_ID_82541EI_MOBILE:
871 case E1000_DEV_ID_82541ER:
872 case E1000_DEV_ID_82541ER_LOM:
873 case E1000_DEV_ID_82541GI:
874 case E1000_DEV_ID_82541GI_LF:
875 case E1000_DEV_ID_82541GI_MOBILE:
876 case E1000_DEV_ID_82544EI_COPPER:
877 case E1000_DEV_ID_82544EI_FIBER:
878 case E1000_DEV_ID_82544GC_COPPER:
879 case E1000_DEV_ID_82544GC_LOM:
880 case E1000_DEV_ID_82545EM_COPPER:
881 case E1000_DEV_ID_82545EM_FIBER:
882 case E1000_DEV_ID_82546EB_COPPER:
883 case E1000_DEV_ID_82546EB_FIBER:
884 case E1000_DEV_ID_82546EB_QUAD_COPPER:
885 return true;
886 default:
887 return false;
888 }
889}
890
1da177e4
LT		 891/**
892 * e1000_probe - Device Initialization Routine
893 * @pdev: PCI device information struct
894 * @ent: entry in e1000_pci_tbl
895 *
896 * Returns 0 on success, negative on failure
897 *
898 * e1000_probe initializes an adapter identified by a pci_dev structure.
899 * The OS initialization, configuring of the adapter private structure,
900 * and a hardware reset occur.
901 **/
1dc32918
JP		 902static int __devinit e1000_probe(struct pci_dev *pdev,
903 const struct pci_device_id *ent)
1da177e4
LT		 904{
905 struct net_device *netdev;
906 struct e1000_adapter *adapter;
1dc32918 907 struct e1000_hw *hw;
2d7edb92 908
1da177e4 909 static int cards_found = 0;
120cd576 910 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 911 int i, err, pci_using_dac;
406874a7
JP		 912 u16 eeprom_data = 0;
913 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 914 int bars, need_ioport;
0795af57 915
81250297
TI		 916 /* do not allocate ioport bars when not needed */
917 need_ioport = e1000_is_need_ioport(pdev);
918 if (need_ioport) {
919 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
920 err = pci_enable_device(pdev);
921 } else {
922 bars = pci_select_bars(pdev, IORESOURCE_MEM);
923 err = pci_enable_device(pdev);
924 }
c7be73bc 925 if (err)
1da177e4
LT		 926 return err;
927
c7be73bc
JP		 928 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
929 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
1da177e4
LT		 930 pci_using_dac = 1;
931 } else {
c7be73bc
JP		 932 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
933 if (err) {
934 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
935 if (err) {
936 E1000_ERR("No usable DMA configuration, "
937 "aborting\n");
938 goto err_dma;
939 }
1da177e4
LT		 940 }
941 pci_using_dac = 0;
942 }
943
81250297 944 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 945 if (err)
6dd62ab0 946 goto err_pci_reg;
1da177e4
LT		 947
948 pci_set_master(pdev);
949
6dd62ab0 950 err = -ENOMEM;
1da177e4 951 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 952 if (!netdev)
1da177e4 953 goto err_alloc_etherdev;
1da177e4 954
1da177e4
LT		 955 SET_NETDEV_DEV(netdev, &pdev->dev);
956
957 pci_set_drvdata(pdev, netdev);
60490fe0 958 adapter = netdev_priv(netdev);
1da177e4
LT		 959 adapter->netdev = netdev;
960 adapter->pdev = pdev;
1da177e4 961 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 962 adapter->bars = bars;
963 adapter->need_ioport = need_ioport;
1da177e4 964
1dc32918
JP		 965 hw = &adapter->hw;
966 hw->back = adapter;
967
6dd62ab0 968 err = -EIO;
275f165f 969 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 970 if (!hw->hw_addr)
1da177e4 971 goto err_ioremap;
1da177e4 972
81250297
TI		 973 if (adapter->need_ioport) {
974 for (i = BAR_1; i <= BAR_5; i++) {
975 if (pci_resource_len(pdev, i) == 0)
976 continue;
977 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
978 hw->io_base = pci_resource_start(pdev, i);
979 break;
980 }
1da177e4
LT		 981 }
982 }
983
984 netdev->open = &e1000_open;
985 netdev->stop = &e1000_close;
986 netdev->hard_start_xmit = &e1000_xmit_frame;
987 netdev->get_stats = &e1000_get_stats;
db0ce50d 988 netdev->set_rx_mode = &e1000_set_rx_mode;
1da177e4
LT		 989 netdev->set_mac_address = &e1000_set_mac;
990 netdev->change_mtu = &e1000_change_mtu;
991 netdev->do_ioctl = &e1000_ioctl;
992 e1000_set_ethtool_ops(netdev);
993 netdev->tx_timeout = &e1000_tx_timeout;
994 netdev->watchdog_timeo = 5 * HZ;
bea3348e 995 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
1da177e4
LT		 996 netdev->vlan_rx_register = e1000_vlan_rx_register;
997 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
998 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
999#ifdef CONFIG_NET_POLL_CONTROLLER
1000 netdev->poll_controller = e1000_netpoll;
1001#endif
0eb5a34c 1002 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1003
1da177e4
LT		 1004 adapter->bd_number = cards_found;
1005
1006 /* setup the private structure */
1007
c7be73bc
JP		 1008 err = e1000_sw_init(adapter);
1009 if (err)
1da177e4
LT		 1010 goto err_sw_init;
1011
6dd62ab0 1012 err = -EIO;
cd94dd0b
AK		 1013 /* Flash BAR mapping must happen after e1000_sw_init
1014 * because it depends on mac_type */
1dc32918 1015 if ((hw->mac_type == e1000_ich8lan) &&
cd94dd0b 1016 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
275f165f 1017 hw->flash_address = pci_ioremap_bar(pdev, 1);
1dc32918 1018 if (!hw->flash_address)
cd94dd0b 1019 goto err_flashmap;
cd94dd0b
AK		 1020 }
1021
1dc32918 1022 if (e1000_check_phy_reset_block(hw))
2d7edb92
MC		 1023 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1024
1dc32918 1025 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 1026 netdev->features = NETIF_F_SG |
1027 NETIF_F_HW_CSUM |
1028 NETIF_F_HW_VLAN_TX |
1029 NETIF_F_HW_VLAN_RX |
1030 NETIF_F_HW_VLAN_FILTER;
1dc32918 1031 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 1032 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 1033 }
1034
1dc32918
JP		 1035 if ((hw->mac_type >= e1000_82544) &&
1036 (hw->mac_type != e1000_82547))
1da177e4 1037 netdev->features |= NETIF_F_TSO;
2d7edb92 1038
1dc32918 1039 if (hw->mac_type > e1000_82547_rev_2)
87ca4e5b 1040 netdev->features |= NETIF_F_TSO6;
96838a40 1041 if (pci_using_dac)
1da177e4
LT		 1042 netdev->features |= NETIF_F_HIGHDMA;
1043
76c224bc
AK		 1044 netdev->features |= NETIF_F_LLTX;
1045
20501a69
PM		 1046 netdev->vlan_features |= NETIF_F_TSO;
1047 netdev->vlan_features |= NETIF_F_TSO6;
1048 netdev->vlan_features |= NETIF_F_HW_CSUM;
1049 netdev->vlan_features |= NETIF_F_SG;
1050
1dc32918 1051 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1052
cd94dd0b 1053 /* initialize eeprom parameters */
1dc32918 1054 if (e1000_init_eeprom_params(hw)) {
cd94dd0b 1055 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 1056 goto err_eeprom;
cd94dd0b
AK		 1057 }
1058
96838a40 1059 /* before reading the EEPROM, reset the controller to
1da177e4 1060 * put the device in a known good starting state */
96838a40 1061
1dc32918 1062 e1000_reset_hw(hw);
1da177e4
LT		 1063
1064 /* make sure the EEPROM is good */
1dc32918 1065 if (e1000_validate_eeprom_checksum(hw) < 0) {
1da177e4 1066 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 1067 e1000_dump_eeprom(adapter);
1068 /*
1069 * set MAC address to all zeroes to invalidate and temporary
1070 * disable this device for the user. This blocks regular
1071 * traffic while still permitting ethtool ioctls from reaching
1072 * the hardware as well as allowing the user to run the
1073 * interface after manually setting a hw addr using
1074 * `ip set address`
1075 */
1dc32918 1076 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1077 } else {
1078 /* copy the MAC address out of the EEPROM */
1dc32918 1079 if (e1000_read_mac_addr(hw))
67b3c27c 1080 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1da177e4 1081 }
67b3c27c 1082 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 1083 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1084 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1085
67b3c27c 1086 if (!is_valid_ether_addr(netdev->perm_addr))
1da177e4 1087 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4 1088
1dc32918 1089 e1000_get_bus_info(hw);
1da177e4
LT		 1090
1091 init_timer(&adapter->tx_fifo_stall_timer);
1092 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
e982f17c 1093 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 1094
1095 init_timer(&adapter->watchdog_timer);
1096 adapter->watchdog_timer.function = &e1000_watchdog;
1097 adapter->watchdog_timer.data = (unsigned long) adapter;
1098
1da177e4
LT		 1099 init_timer(&adapter->phy_info_timer);
1100 adapter->phy_info_timer.function = &e1000_update_phy_info;
e982f17c 1101 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 1102
65f27f38 1103 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1104
1da177e4
LT		 1105 e1000_check_options(adapter);
1106
1107 /* Initial Wake on LAN setting
1108 * If APM wake is enabled in the EEPROM,
1109 * enable the ACPI Magic Packet filter
1110 */
1111
1dc32918 1112 switch (hw->mac_type) {
1da177e4
LT		 1113 case e1000_82542_rev2_0:
1114 case e1000_82542_rev2_1:
1115 case e1000_82543:
1116 break;
1117 case e1000_82544:
1dc32918 1118 e1000_read_eeprom(hw,
1da177e4
LT		 1119 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1120 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1121 break;
cd94dd0b 1122 case e1000_ich8lan:
1dc32918 1123 e1000_read_eeprom(hw,
cd94dd0b
AK		 1124 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1125 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1126 break;
1da177e4
LT		 1127 case e1000_82546:
1128 case e1000_82546_rev_3:
fd803241 1129 case e1000_82571:
6418ecc6 1130 case e1000_80003es2lan:
1dc32918
JP		 1131 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1132 e1000_read_eeprom(hw,
1da177e4
LT		 1133 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1134 break;
1135 }
1136 /* Fall Through */
1137 default:
1dc32918 1138 e1000_read_eeprom(hw,
1da177e4
LT		 1139 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1140 break;
1141 }
96838a40 1142 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1143 adapter->eeprom_wol |= E1000_WUFC_MAG;
1144
1145 /* now that we have the eeprom settings, apply the special cases
1146 * where the eeprom may be wrong or the board simply won't support
1147 * wake on lan on a particular port */
1148 switch (pdev->device) {
1149 case E1000_DEV_ID_82546GB_PCIE:
1150 adapter->eeprom_wol = 0;
1151 break;
1152 case E1000_DEV_ID_82546EB_FIBER:
1153 case E1000_DEV_ID_82546GB_FIBER:
1154 case E1000_DEV_ID_82571EB_FIBER:
1155 /* Wake events only supported on port A for dual fiber
1156 * regardless of eeprom setting */
1dc32918 1157 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1158 adapter->eeprom_wol = 0;
1159 break;
1160 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 1161 case E1000_DEV_ID_82571EB_QUAD_COPPER:
ce57a02c 1162 case E1000_DEV_ID_82571EB_QUAD_FIBER:
fc2307d0 1163 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
f4ec7f98 1164 case E1000_DEV_ID_82571PT_QUAD_COPPER:
120cd576
JB		 1165 /* if quad port adapter, disable WoL on all but port A */
1166 if (global_quad_port_a != 0)
1167 adapter->eeprom_wol = 0;
1168 else
1169 adapter->quad_port_a = 1;
1170 /* Reset for multiple quad port adapters */
1171 if (++global_quad_port_a == 4)
1172 global_quad_port_a = 0;
1173 break;
1174 }
1175
1176 /* initialize the wol settings based on the eeprom settings */
1177 adapter->wol = adapter->eeprom_wol;
1da177e4 1178
fb3d47d4 1179 /* print bus type/speed/width info */
fb3d47d4
JK		 1180 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1181 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1182 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1183 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1184 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1185 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1186 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1187 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1188 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1189 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1190 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1191 "32-bit"));
fb3d47d4 1192
e174961c 1193 printk("%pM\n", netdev->dev_addr);
fb3d47d4 1194
1dc32918 1195 if (hw->bus_type == e1000_bus_type_pci_express) {
14782ca8
AK		 1196 DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no "
1197 "longer be supported by this driver in the future.\n",
1198 pdev->vendor, pdev->device);
1199 DPRINTK(PROBE, WARNING, "please use the \"e1000e\" "
1200 "driver instead.\n");
1201 }
1202
1da177e4
LT		 1203 /* reset the hardware with the new settings */
1204 e1000_reset(adapter);
1205
b55ccb35
JK		 1206 /* If the controller is 82573 and f/w is AMT, do not set
1207 * DRV_LOAD until the interface is up. For all other cases,
1208 * let the f/w know that the h/w is now under the control
1209 * of the driver. */
1dc32918
JP		 1210 if (hw->mac_type != e1000_82573 ||
1211 !e1000_check_mng_mode(hw))
b55ccb35 1212 e1000_get_hw_control(adapter);
2d7edb92 1213
1314bbf3
AK		 1214 /* tell the stack to leave us alone until e1000_open() is called */
1215 netif_carrier_off(netdev);
1216 netif_stop_queue(netdev);
416b5d10
AK		 1217
1218 strcpy(netdev->name, "eth%d");
c7be73bc
JP		 1219 err = register_netdev(netdev);
1220 if (err)
416b5d10 1221 goto err_register;
1314bbf3 1222
1da177e4
LT		 1223 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1224
1225 cards_found++;
1226 return 0;
1227
1228err_register:
6dd62ab0
VA		 1229 e1000_release_hw_control(adapter);
1230err_eeprom:
1dc32918
JP		 1231 if (!e1000_check_phy_reset_block(hw))
1232 e1000_phy_hw_reset(hw);
6dd62ab0 1233
1dc32918
JP		 1234 if (hw->flash_address)
1235 iounmap(hw->flash_address);
cd94dd0b 1236err_flashmap:
6dd62ab0
VA		 1237 for (i = 0; i < adapter->num_rx_queues; i++)
1238 dev_put(&adapter->polling_netdev[i]);
6dd62ab0
VA		 1239
1240 kfree(adapter->tx_ring);
1241 kfree(adapter->rx_ring);
6dd62ab0 1242 kfree(adapter->polling_netdev);
1da177e4 1243err_sw_init:
1dc32918 1244 iounmap(hw->hw_addr);
1da177e4
LT		 1245err_ioremap:
1246 free_netdev(netdev);
1247err_alloc_etherdev:
81250297 1248 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA		 1249err_pci_reg:
1250err_dma:
1251 pci_disable_device(pdev);
1da177e4
LT		 1252 return err;
1253}
1254
1255/**
1256 * e1000_remove - Device Removal Routine
1257 * @pdev: PCI device information struct
1258 *
1259 * e1000_remove is called by the PCI subsystem to alert the driver
1260 * that it should release a PCI device. The could be caused by a
1261 * Hot-Plug event, or because the driver is going to be removed from
1262 * memory.
1263 **/
1264
64798845 1265static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1266{
1267 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1268 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1269 struct e1000_hw *hw = &adapter->hw;
581d708e 1270 int i;
1da177e4 1271
28e53bdd 1272 cancel_work_sync(&adapter->reset_task);
be2b28ed 1273
0fccd0e9 1274 e1000_release_manageability(adapter);
1da177e4 1275
b55ccb35
JK		 1276 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1277 * would have already happened in close and is redundant. */
1278 e1000_release_hw_control(adapter);
2d7edb92 1279
f56799ea 1280 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1281 dev_put(&adapter->polling_netdev[i]);
1da177e4 1282
bea3348e
SH		 1283 unregister_netdev(netdev);
1284
1dc32918
JP		 1285 if (!e1000_check_phy_reset_block(hw))
1286 e1000_phy_hw_reset(hw);
1da177e4 1287
24025e4e
MC		 1288 kfree(adapter->tx_ring);
1289 kfree(adapter->rx_ring);
24025e4e 1290 kfree(adapter->polling_netdev);
24025e4e 1291
1dc32918
JP		 1292 iounmap(hw->hw_addr);
1293 if (hw->flash_address)
1294 iounmap(hw->flash_address);
81250297 1295 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1296
1297 free_netdev(netdev);
1298
1299 pci_disable_device(pdev);
1300}
1301
1302/**
1303 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1304 * @adapter: board private structure to initialize
1305 *
1306 * e1000_sw_init initializes the Adapter private data structure.
1307 * Fields are initialized based on PCI device information and
1308 * OS network device settings (MTU size).
1309 **/
1310
64798845 1311static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT		 1312{
1313 struct e1000_hw *hw = &adapter->hw;
1314 struct net_device *netdev = adapter->netdev;
1315 struct pci_dev *pdev = adapter->pdev;
581d708e 1316 int i;
1da177e4
LT		 1317
1318 /* PCI config space info */
1319
1320 hw->vendor_id = pdev->vendor;
1321 hw->device_id = pdev->device;
1322 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1323 hw->subsystem_id = pdev->subsystem_device;
44c10138 1324 hw->revision_id = pdev->revision;
1da177e4
LT		 1325
1326 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1327
eb0f8054 1328 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT		 1329 hw->max_frame_size = netdev->mtu +
1330 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1331 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1332
1333 /* identify the MAC */
1334
96838a40 1335 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1336 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1337 return -EIO;
1338 }
1339
96838a40 1340 switch (hw->mac_type) {
1da177e4
LT		 1341 default:
1342 break;
1343 case e1000_82541:
1344 case e1000_82547:
1345 case e1000_82541_rev_2:
1346 case e1000_82547_rev_2:
1347 hw->phy_init_script = 1;
1348 break;
1349 }
1350
1351 e1000_set_media_type(hw);
1352
c3033b01
JP		 1353 hw->wait_autoneg_complete = false;
1354 hw->tbi_compatibility_en = true;
1355 hw->adaptive_ifs = true;
1da177e4
LT		 1356
1357 /* Copper options */
1358
96838a40 1359 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1360 hw->mdix = AUTO_ALL_MODES;
c3033b01 1361 hw->disable_polarity_correction = false;
1da177e4
LT		 1362 hw->master_slave = E1000_MASTER_SLAVE;
1363 }
1364
f56799ea
JK		 1365 adapter->num_tx_queues = 1;
1366 adapter->num_rx_queues = 1;
581d708e
MC		 1367
1368 if (e1000_alloc_queues(adapter)) {
1369 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1370 return -ENOMEM;
1371 }
1372
f56799ea 1373 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e 1374 adapter->polling_netdev[i].priv = adapter;
581d708e
MC		 1375 dev_hold(&adapter->polling_netdev[i]);
1376 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1377 }
7bfa4816 1378 spin_lock_init(&adapter->tx_queue_lock);
24025e4e 1379
47313054 1380 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1381 e1000_irq_disable(adapter);
1382
1da177e4 1383 spin_lock_init(&adapter->stats_lock);
1da177e4 1384
1314bbf3
AK		 1385 set_bit(__E1000_DOWN, &adapter->flags);
1386
1da177e4
LT		 1387 return 0;
1388}
1389
581d708e
MC		 1390/**
1391 * e1000_alloc_queues - Allocate memory for all rings
1392 * @adapter: board private structure to initialize
1393 *
1394 * We allocate one ring per queue at run-time since we don't know the
1395 * number of queues at compile-time. The polling_netdev array is
1396 * intended for Multiqueue, but should work fine with a single queue.
1397 **/
1398
64798845 1399static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1400{
1c7e5b12
YB		 1401 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1402 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1403 if (!adapter->tx_ring)
1404 return -ENOMEM;
581d708e 1405
1c7e5b12
YB		 1406 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1407 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1408 if (!adapter->rx_ring) {
1409 kfree(adapter->tx_ring);
1410 return -ENOMEM;
1411 }
581d708e 1412
1c7e5b12
YB		 1413 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1414 sizeof(struct net_device),
1415 GFP_KERNEL);
581d708e
MC		 1416 if (!adapter->polling_netdev) {
1417 kfree(adapter->tx_ring);
1418 kfree(adapter->rx_ring);
1419 return -ENOMEM;
1420 }
581d708e
MC		 1421
1422 return E1000_SUCCESS;
1423}
1424
1da177e4
LT		 1425/**
1426 * e1000_open - Called when a network interface is made active
1427 * @netdev: network interface device structure
1428 *
1429 * Returns 0 on success, negative value on failure
1430 *
1431 * The open entry point is called when a network interface is made
1432 * active by the system (IFF_UP). At this point all resources needed
1433 * for transmit and receive operations are allocated, the interrupt
1434 * handler is registered with the OS, the watchdog timer is started,
1435 * and the stack is notified that the interface is ready.
1436 **/
1437
64798845 1438static int e1000_open(struct net_device *netdev)
1da177e4 1439{
60490fe0 1440 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1441 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1442 int err;
1443
2db10a08 1444 /* disallow open during test */
1314bbf3 1445 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1446 return -EBUSY;
1447
1da177e4 1448 /* allocate transmit descriptors */
e0aac5a2
AK		 1449 err = e1000_setup_all_tx_resources(adapter);
1450 if (err)
1da177e4
LT		 1451 goto err_setup_tx;
1452
1453 /* allocate receive descriptors */
e0aac5a2 1454 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1455 if (err)
e0aac5a2 1456 goto err_setup_rx;
b5bf28cd 1457
79f05bf0
AK		 1458 e1000_power_up_phy(adapter);
1459
2d7edb92 1460 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1461 if ((hw->mng_cookie.status &
2d7edb92
MC		 1462 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1463 e1000_update_mng_vlan(adapter);
1464 }
1da177e4 1465
b55ccb35
JK		 1466 /* If AMT is enabled, let the firmware know that the network
1467 * interface is now open */
1dc32918
JP		 1468 if (hw->mac_type == e1000_82573 &&
1469 e1000_check_mng_mode(hw))
b55ccb35
JK		 1470 e1000_get_hw_control(adapter);
1471
e0aac5a2
AK		 1472 /* before we allocate an interrupt, we must be ready to handle it.
1473 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1474 * as soon as we call pci_request_irq, so we have to setup our
1475 * clean_rx handler before we do so. */
1476 e1000_configure(adapter);
1477
1478 err = e1000_request_irq(adapter);
1479 if (err)
1480 goto err_req_irq;
1481
1482 /* From here on the code is the same as e1000_up() */
1483 clear_bit(__E1000_DOWN, &adapter->flags);
1484
bea3348e 1485 napi_enable(&adapter->napi);
47313054 1486
e0aac5a2
AK		 1487 e1000_irq_enable(adapter);
1488
076152d5
BH		 1489 netif_start_queue(netdev);
1490
e0aac5a2 1491 /* fire a link status change interrupt to start the watchdog */
1dc32918 1492 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1493
1da177e4
LT		 1494 return E1000_SUCCESS;
1495
b5bf28cd 1496err_req_irq:
e0aac5a2
AK		 1497 e1000_release_hw_control(adapter);
1498 e1000_power_down_phy(adapter);
581d708e 1499 e1000_free_all_rx_resources(adapter);
1da177e4 1500err_setup_rx:
581d708e 1501 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1502err_setup_tx:
1503 e1000_reset(adapter);
1504
1505 return err;
1506}
1507
1508/**
1509 * e1000_close - Disables a network interface
1510 * @netdev: network interface device structure
1511 *
1512 * Returns 0, this is not allowed to fail
1513 *
1514 * The close entry point is called when an interface is de-activated
1515 * by the OS. The hardware is still under the drivers control, but
1516 * needs to be disabled. A global MAC reset is issued to stop the
1517 * hardware, and all transmit and receive resources are freed.
1518 **/
1519
64798845 1520static int e1000_close(struct net_device *netdev)
1da177e4 1521{
60490fe0 1522 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1523 struct e1000_hw *hw = &adapter->hw;
1da177e4 1524
2db10a08 1525 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1526 e1000_down(adapter);
79f05bf0 1527 e1000_power_down_phy(adapter);
2db10a08 1528 e1000_free_irq(adapter);
1da177e4 1529
581d708e
MC		 1530 e1000_free_all_tx_resources(adapter);
1531 e1000_free_all_rx_resources(adapter);
1da177e4 1532
4666560a
BA		 1533 /* kill manageability vlan ID if supported, but not if a vlan with
1534 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1535 if ((hw->mng_cookie.status &
4666560a
BA		 1536 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1537 !(adapter->vlgrp &&
5c15bdec 1538 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1539 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1540 }
b55ccb35
JK		 1541
1542 /* If AMT is enabled, let the firmware know that the network
1543 * interface is now closed */
1dc32918
JP		 1544 if (hw->mac_type == e1000_82573 &&
1545 e1000_check_mng_mode(hw))
b55ccb35
JK		 1546 e1000_release_hw_control(adapter);
1547
1da177e4
LT		 1548 return 0;
1549}
1550
1551/**
1552 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1553 * @adapter: address of board private structure
2d7edb92
MC		 1554 * @start: address of beginning of memory
1555 * @len: length of memory
1da177e4 1556 **/
64798845
JP		 1557static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1558 unsigned long len)
1da177e4 1559{
1dc32918 1560 struct e1000_hw *hw = &adapter->hw;
e982f17c 1561 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1562 unsigned long end = begin + len;
1563
2648345f
MC		 1564 /* First rev 82545 and 82546 need to not allow any memory
1565 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP		 1566 if (hw->mac_type == e1000_82545 ||
1567 hw->mac_type == e1000_82546) {
c3033b01 1568 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1569 }
1570
c3033b01 1571 return true;
1da177e4
LT		 1572}
1573
1574/**
1575 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1576 * @adapter: board private structure
581d708e 1577 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1578 *
1579 * Return 0 on success, negative on failure
1580 **/
1581
64798845
JP		 1582static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1583 struct e1000_tx_ring *txdr)
1da177e4 1584{
1da177e4
LT		 1585 struct pci_dev *pdev = adapter->pdev;
1586 int size;
1587
1588 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1589 txdr->buffer_info = vmalloc(size);
96838a40 1590 if (!txdr->buffer_info) {
2648345f
MC		 1591 DPRINTK(PROBE, ERR,
1592 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1593 return -ENOMEM;
1594 }
1595 memset(txdr->buffer_info, 0, size);
1596
1597 /* round up to nearest 4K */
1598
1599 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1600 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1601
1602 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1603 if (!txdr->desc) {
1da177e4 1604setup_tx_desc_die:
1da177e4 1605 vfree(txdr->buffer_info);
2648345f
MC		 1606 DPRINTK(PROBE, ERR,
1607 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1608 return -ENOMEM;
1609 }
1610
2648345f 1611 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1612 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1613 void *olddesc = txdr->desc;
1614 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1615 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1616 "at %p\n", txdr->size, txdr->desc);
1617 /* Try again, without freeing the previous */
1da177e4 1618 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1619 /* Failed allocation, critical failure */
96838a40 1620 if (!txdr->desc) {
1da177e4
LT		 1621 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1622 goto setup_tx_desc_die;
1623 }
1624
1625 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1626 /* give up */
2648345f
MC		 1627 pci_free_consistent(pdev, txdr->size, txdr->desc,
1628 txdr->dma);
1da177e4
LT		 1629 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1630 DPRINTK(PROBE, ERR,
2648345f
MC		 1631 "Unable to allocate aligned memory "
1632 "for the transmit descriptor ring\n");
1da177e4
LT		 1633 vfree(txdr->buffer_info);
1634 return -ENOMEM;
1635 } else {
2648345f 1636 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1637 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1638 }
1639 }
1640 memset(txdr->desc, 0, txdr->size);
1641
1642 txdr->next_to_use = 0;
1643 txdr->next_to_clean = 0;
2ae76d98 1644 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1645
1646 return 0;
1647}
1648
581d708e
MC		 1649/**
1650 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1651 * (Descriptors) for all queues
1652 * @adapter: board private structure
1653 *
581d708e
MC		 1654 * Return 0 on success, negative on failure
1655 **/
1656
64798845 1657int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1658{
1659 int i, err = 0;
1660
f56799ea 1661 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1662 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1663 if (err) {
1664 DPRINTK(PROBE, ERR,
1665 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1666 for (i-- ; i >= 0; i--)
1667 e1000_free_tx_resources(adapter,
1668 &adapter->tx_ring[i]);
581d708e
MC		 1669 break;
1670 }
1671 }
1672
1673 return err;
1674}
1675
1da177e4
LT		 1676/**
1677 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1678 * @adapter: board private structure
1679 *
1680 * Configure the Tx unit of the MAC after a reset.
1681 **/
1682
64798845 1683static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1684{
406874a7 1685 u64 tdba;
581d708e 1686 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1687 u32 tdlen, tctl, tipg, tarc;
1688 u32 ipgr1, ipgr2;
1da177e4
LT		 1689
1690 /* Setup the HW Tx Head and Tail descriptor pointers */
1691
f56799ea 1692 switch (adapter->num_tx_queues) {
24025e4e
MC		 1693 case 1:
1694 default:
581d708e
MC		 1695 tdba = adapter->tx_ring[0].dma;
1696 tdlen = adapter->tx_ring[0].count *
1697 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1698 ew32(TDLEN, tdlen);
1699 ew32(TDBAH, (tdba >> 32));
1700 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1701 ew32(TDT, 0);
1702 ew32(TDH, 0);
6a951698
AK		 1703 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1704 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1705 break;
1706 }
1da177e4
LT		 1707
1708 /* Set the default values for the Tx Inter Packet Gap timer */
1dc32918 1709 if (hw->mac_type <= e1000_82547_rev_2 &&
d89b6c67
JB		 1710 (hw->media_type == e1000_media_type_fiber ||
1711 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1712 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1713 else
1714 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1715
581d708e 1716 switch (hw->mac_type) {
1da177e4
LT		 1717 case e1000_82542_rev2_0:
1718 case e1000_82542_rev2_1:
1719 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1720 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1721 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1722 break;
87041639
JK		 1723 case e1000_80003es2lan:
1724 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1725 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1726 break;
1da177e4 1727 default:
0fadb059
JK		 1728 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1729 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1730 break;
1da177e4 1731 }
0fadb059
JK		 1732 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1733 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1734 ew32(TIPG, tipg);
1da177e4
LT		 1735
1736 /* Set the Tx Interrupt Delay register */
1737
1dc32918 1738 ew32(TIDV, adapter->tx_int_delay);
581d708e 1739 if (hw->mac_type >= e1000_82540)
1dc32918 1740 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1741
1742 /* Program the Transmit Control Register */
1743
1dc32918 1744 tctl = er32(TCTL);
1da177e4 1745 tctl &= ~E1000_TCTL_CT;
7e6c9861 1746 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1747 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1748
2ae76d98 1749 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1dc32918 1750 tarc = er32(TARC0);
90fb5135
AK		 1751 /* set the speed mode bit, we'll clear it if we're not at
1752 * gigabit link later */
09ae3e88 1753 tarc |= (1 << 21);
1dc32918 1754 ew32(TARC0, tarc);
87041639 1755 } else if (hw->mac_type == e1000_80003es2lan) {
1dc32918 1756 tarc = er32(TARC0);
87041639 1757 tarc |= 1;
1dc32918
JP		 1758 ew32(TARC0, tarc);
1759 tarc = er32(TARC1);
87041639 1760 tarc |= 1;
1dc32918 1761 ew32(TARC1, tarc);
2ae76d98
MC		 1762 }
1763
581d708e 1764 e1000_config_collision_dist(hw);
1da177e4
LT		 1765
1766 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1767 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1768
1769 /* only set IDE if we are delaying interrupts using the timers */
1770 if (adapter->tx_int_delay)
1771 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1772
581d708e 1773 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1774 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1775 else
1776 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1777
1778 /* Cache if we're 82544 running in PCI-X because we'll
1779 * need this to apply a workaround later in the send path. */
581d708e
MC		 1780 if (hw->mac_type == e1000_82544 &&
1781 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1782 adapter->pcix_82544 = 1;
7e6c9861 1783
1dc32918 1784 ew32(TCTL, tctl);
7e6c9861 1785
1da177e4
LT		 1786}
1787
1788/**
1789 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1790 * @adapter: board private structure
581d708e 1791 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1792 *
1793 * Returns 0 on success, negative on failure
1794 **/
1795
64798845
JP		 1796static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1797 struct e1000_rx_ring *rxdr)
1da177e4 1798{
1dc32918 1799 struct e1000_hw *hw = &adapter->hw;
1da177e4 1800 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1801 int size, desc_len;
1da177e4
LT		 1802
1803 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1804 rxdr->buffer_info = vmalloc(size);
581d708e 1805 if (!rxdr->buffer_info) {
2648345f
MC		 1806 DPRINTK(PROBE, ERR,
1807 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1808 return -ENOMEM;
1809 }
1810 memset(rxdr->buffer_info, 0, size);
1811
1dc32918 1812 if (hw->mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1813 desc_len = sizeof(struct e1000_rx_desc);
1814 else
1815 desc_len = sizeof(union e1000_rx_desc_packet_split);
1816
1da177e4
LT		 1817 /* Round up to nearest 4K */
1818
2d7edb92 1819 rxdr->size = rxdr->count * desc_len;
9099cfb9 1820 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1821
1822 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1823
581d708e
MC		 1824 if (!rxdr->desc) {
1825 DPRINTK(PROBE, ERR,
1826 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1827setup_rx_desc_die:
1da177e4
LT		 1828 vfree(rxdr->buffer_info);
1829 return -ENOMEM;
1830 }
1831
2648345f 1832 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1833 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1834 void *olddesc = rxdr->desc;
1835 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1836 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1837 "at %p\n", rxdr->size, rxdr->desc);
1838 /* Try again, without freeing the previous */
1da177e4 1839 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1840 /* Failed allocation, critical failure */
581d708e 1841 if (!rxdr->desc) {
1da177e4 1842 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1843 DPRINTK(PROBE, ERR,
1844 "Unable to allocate memory "
1845 "for the receive descriptor ring\n");
1da177e4
LT		 1846 goto setup_rx_desc_die;
1847 }
1848
1849 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1850 /* give up */
2648345f
MC		 1851 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1852 rxdr->dma);
1da177e4 1853 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1854 DPRINTK(PROBE, ERR,
1855 "Unable to allocate aligned memory "
1856 "for the receive descriptor ring\n");
581d708e 1857 goto setup_rx_desc_die;
1da177e4 1858 } else {
2648345f 1859 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1860 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1861 }
1862 }
1863 memset(rxdr->desc, 0, rxdr->size);
1864
1865 rxdr->next_to_clean = 0;
1866 rxdr->next_to_use = 0;
1867
1868 return 0;
1869}
1870
581d708e
MC		 1871/**
1872 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1873 * (Descriptors) for all queues
1874 * @adapter: board private structure
1875 *
581d708e
MC		 1876 * Return 0 on success, negative on failure
1877 **/
1878
64798845 1879int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1880{
1881 int i, err = 0;
1882
f56799ea 1883 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1884 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1885 if (err) {
1886 DPRINTK(PROBE, ERR,
1887 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1888 for (i-- ; i >= 0; i--)
1889 e1000_free_rx_resources(adapter,
1890 &adapter->rx_ring[i]);
581d708e
MC		 1891 break;
1892 }
1893 }
1894
1895 return err;
1896}
1897
1da177e4 1898/**
2648345f 1899 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1900 * @adapter: Board private structure
1901 **/
e4c811c9
MC		 1902#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1903 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
64798845 1904static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1905{
1dc32918 1906 struct e1000_hw *hw = &adapter->hw;
630b25cd 1907 u32 rctl;
1da177e4 1908
1dc32918 1909 rctl = er32(RCTL);
1da177e4
LT		 1910
1911 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1912
1913 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1914 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1915 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1916
1dc32918 1917 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1918 rctl |= E1000_RCTL_SBP;
1919 else
1920 rctl &= ~E1000_RCTL_SBP;
1921
2d7edb92
MC		 1922 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1923 rctl &= ~E1000_RCTL_LPE;
1924 else
1925 rctl |= E1000_RCTL_LPE;
1926
1da177e4 1927 /* Setup buffer sizes */
9e2feace
AK		 1928 rctl &= ~E1000_RCTL_SZ_4096;
1929 rctl |= E1000_RCTL_BSEX;
1930 switch (adapter->rx_buffer_len) {
1931 case E1000_RXBUFFER_256:
1932 rctl |= E1000_RCTL_SZ_256;
1933 rctl &= ~E1000_RCTL_BSEX;
1934 break;
1935 case E1000_RXBUFFER_512:
1936 rctl |= E1000_RCTL_SZ_512;
1937 rctl &= ~E1000_RCTL_BSEX;
1938 break;
1939 case E1000_RXBUFFER_1024:
1940 rctl |= E1000_RCTL_SZ_1024;
1941 rctl &= ~E1000_RCTL_BSEX;
1942 break;
a1415ee6
JK		 1943 case E1000_RXBUFFER_2048:
1944 default:
1945 rctl |= E1000_RCTL_SZ_2048;
1946 rctl &= ~E1000_RCTL_BSEX;
1947 break;
1948 case E1000_RXBUFFER_4096:
1949 rctl |= E1000_RCTL_SZ_4096;
1950 break;
1951 case E1000_RXBUFFER_8192:
1952 rctl |= E1000_RCTL_SZ_8192;
1953 break;
1954 case E1000_RXBUFFER_16384:
1955 rctl |= E1000_RCTL_SZ_16384;
1956 break;
2d7edb92
MC		 1957 }
1958
1dc32918 1959 ew32(RCTL, rctl);
1da177e4
LT		 1960}
1961
1962/**
1963 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1964 * @adapter: board private structure
1965 *
1966 * Configure the Rx unit of the MAC after a reset.
1967 **/
1968
64798845 1969static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1970{
406874a7 1971 u64 rdba;
581d708e 1972 struct e1000_hw *hw = &adapter->hw;
406874a7 1973 u32 rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1974
630b25cd
BJ		 1975 rdlen = adapter->rx_ring[0].count *
1976 sizeof(struct e1000_rx_desc);
1977 adapter->clean_rx = e1000_clean_rx_irq;
1978 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1da177e4
LT		 1979
1980 /* disable receives while setting up the descriptors */
1dc32918
JP		 1981 rctl = er32(RCTL);
1982 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1983
1984 /* set the Receive Delay Timer Register */
1dc32918 1985 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1986
581d708e 1987 if (hw->mac_type >= e1000_82540) {
1dc32918 1988 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1989 if (adapter->itr_setting != 0)
1dc32918 1990 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1991 }
1992
2ae76d98 1993 if (hw->mac_type >= e1000_82571) {
1dc32918 1994 ctrl_ext = er32(CTRL_EXT);
1e613fd9 1995 /* Reset delay timers after every interrupt */
6fc7a7ec 1996 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
835bb129 1997 /* Auto-Mask interrupts upon ICR access */
1e613fd9 1998 ctrl_ext |= E1000_CTRL_EXT_IAME;
1dc32918 1999 ew32(IAM, 0xffffffff);
1dc32918
JP		 2000 ew32(CTRL_EXT, ctrl_ext);
2001 E1000_WRITE_FLUSH();
2ae76d98
MC		 2002 }
2003
581d708e
MC		 2004 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2005 * the Base and Length of the Rx Descriptor Ring */
f56799ea 2006 switch (adapter->num_rx_queues) {
24025e4e
MC		 2007 case 1:
2008 default:
581d708e 2009 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 2010 ew32(RDLEN, rdlen);
2011 ew32(RDBAH, (rdba >> 32));
2012 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
2013 ew32(RDT, 0);
2014 ew32(RDH, 0);
6a951698
AK		 2015 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2016 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 2017 break;
24025e4e
MC		 2018 }
2019
1da177e4 2020 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 2021 if (hw->mac_type >= e1000_82543) {
1dc32918 2022 rxcsum = er32(RXCSUM);
630b25cd 2023 if (adapter->rx_csum)
2d7edb92 2024 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 2025 else
2d7edb92 2026 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 2027 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 2028 ew32(RXCSUM, rxcsum);
1da177e4
LT		 2029 }
2030
2031 /* Enable Receives */
1dc32918 2032 ew32(RCTL, rctl);
1da177e4
LT		 2033}
2034
2035/**
581d708e 2036 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 2037 * @adapter: board private structure
581d708e 2038 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 2039 *
2040 * Free all transmit software resources
2041 **/
2042
64798845
JP		 2043static void e1000_free_tx_resources(struct e1000_adapter *adapter,
2044 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 2045{
2046 struct pci_dev *pdev = adapter->pdev;
2047
581d708e 2048 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 2049
581d708e
MC		 2050 vfree(tx_ring->buffer_info);
2051 tx_ring->buffer_info = NULL;
1da177e4 2052
581d708e 2053 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 2054
581d708e
MC		 2055 tx_ring->desc = NULL;
2056}
2057
2058/**
2059 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2060 * @adapter: board private structure
2061 *
2062 * Free all transmit software resources
2063 **/
2064
64798845 2065void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2066{
2067 int i;
2068
f56799ea 2069 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2070 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2071}
2072
64798845
JP		 2073static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2074 struct e1000_buffer *buffer_info)
1da177e4 2075{
96838a40 2076 if (buffer_info->dma) {
2648345f
MC		 2077 pci_unmap_page(adapter->pdev,
2078 buffer_info->dma,
2079 buffer_info->length,
2080 PCI_DMA_TODEVICE);
a9ebadd6 2081 buffer_info->dma = 0;
1da177e4 2082 }
a9ebadd6 2083 if (buffer_info->skb) {
1da177e4 2084 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 2085 buffer_info->skb = NULL;
2086 }
2087 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 2088}
2089
2090/**
2091 * e1000_clean_tx_ring - Free Tx Buffers
2092 * @adapter: board private structure
581d708e 2093 * @tx_ring: ring to be cleaned
1da177e4
LT		 2094 **/
2095
64798845
JP		 2096static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
2097 struct e1000_tx_ring *tx_ring)
1da177e4 2098{
1dc32918 2099 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2100 struct e1000_buffer *buffer_info;
2101 unsigned long size;
2102 unsigned int i;
2103
2104 /* Free all the Tx ring sk_buffs */
2105
96838a40 2106 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2107 buffer_info = &tx_ring->buffer_info[i];
2108 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2109 }
2110
2111 size = sizeof(struct e1000_buffer) * tx_ring->count;
2112 memset(tx_ring->buffer_info, 0, size);
2113
2114 /* Zero out the descriptor ring */
2115
2116 memset(tx_ring->desc, 0, tx_ring->size);
2117
2118 tx_ring->next_to_use = 0;
2119 tx_ring->next_to_clean = 0;
fd803241 2120 tx_ring->last_tx_tso = 0;
1da177e4 2121
1dc32918
JP		 2122 writel(0, hw->hw_addr + tx_ring->tdh);
2123 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2124}
2125
2126/**
2127 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2128 * @adapter: board private structure
2129 **/
2130
64798845 2131static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2132{
2133 int i;
2134
f56799ea 2135 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2136 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2137}
2138
2139/**
2140 * e1000_free_rx_resources - Free Rx Resources
2141 * @adapter: board private structure
581d708e 2142 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2143 *
2144 * Free all receive software resources
2145 **/
2146
64798845
JP		 2147static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2148 struct e1000_rx_ring *rx_ring)
1da177e4 2149{
1da177e4
LT		 2150 struct pci_dev *pdev = adapter->pdev;
2151
581d708e 2152 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2153
2154 vfree(rx_ring->buffer_info);
2155 rx_ring->buffer_info = NULL;
2156
2157 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2158
2159 rx_ring->desc = NULL;
2160}
2161
2162/**
581d708e 2163 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2164 * @adapter: board private structure
581d708e
MC		 2165 *
2166 * Free all receive software resources
2167 **/
2168
64798845 2169void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2170{
2171 int i;
2172
f56799ea 2173 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2174 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2175}
2176
2177/**
2178 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2179 * @adapter: board private structure
2180 * @rx_ring: ring to free buffers from
1da177e4
LT		 2181 **/
2182
64798845
JP		 2183static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2184 struct e1000_rx_ring *rx_ring)
1da177e4 2185{
1dc32918 2186 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2187 struct e1000_buffer *buffer_info;
2188 struct pci_dev *pdev = adapter->pdev;
2189 unsigned long size;
630b25cd 2190 unsigned int i;
1da177e4
LT		 2191
2192 /* Free all the Rx ring sk_buffs */
96838a40 2193 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2194 buffer_info = &rx_ring->buffer_info[i];
96838a40 2195 if (buffer_info->skb) {
1da177e4
LT		 2196 pci_unmap_single(pdev,
2197 buffer_info->dma,
2198 buffer_info->length,
2199 PCI_DMA_FROMDEVICE);
2200
2201 dev_kfree_skb(buffer_info->skb);
2202 buffer_info->skb = NULL;
997f5cbd 2203 }
1da177e4
LT		 2204 }
2205
2206 size = sizeof(struct e1000_buffer) * rx_ring->count;
2207 memset(rx_ring->buffer_info, 0, size);
2208
2209 /* Zero out the descriptor ring */
2210
2211 memset(rx_ring->desc, 0, rx_ring->size);
2212
2213 rx_ring->next_to_clean = 0;
2214 rx_ring->next_to_use = 0;
2215
1dc32918
JP		 2216 writel(0, hw->hw_addr + rx_ring->rdh);
2217 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2218}
2219
2220/**
2221 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2222 * @adapter: board private structure
2223 **/
2224
64798845 2225static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2226{
2227 int i;
2228
f56799ea 2229 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2230 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2231}
2232
2233/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2234 * and memory write and invalidate disabled for certain operations
2235 */
64798845 2236static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2237{
1dc32918 2238 struct e1000_hw *hw = &adapter->hw;
1da177e4 2239 struct net_device *netdev = adapter->netdev;
406874a7 2240 u32 rctl;
1da177e4 2241
1dc32918 2242 e1000_pci_clear_mwi(hw);
1da177e4 2243
1dc32918 2244 rctl = er32(RCTL);
1da177e4 2245 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2246 ew32(RCTL, rctl);
2247 E1000_WRITE_FLUSH();
1da177e4
LT		 2248 mdelay(5);
2249
96838a40 2250 if (netif_running(netdev))
581d708e 2251 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2252}
2253
64798845 2254static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2255{
1dc32918 2256 struct e1000_hw *hw = &adapter->hw;
1da177e4 2257 struct net_device *netdev = adapter->netdev;
406874a7 2258 u32 rctl;
1da177e4 2259
1dc32918 2260 rctl = er32(RCTL);
1da177e4 2261 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2262 ew32(RCTL, rctl);
2263 E1000_WRITE_FLUSH();
1da177e4
LT		 2264 mdelay(5);
2265
1dc32918
JP		 2266 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2267 e1000_pci_set_mwi(hw);
1da177e4 2268
96838a40 2269 if (netif_running(netdev)) {
72d64a43
JK		 2270 /* No need to loop, because 82542 supports only 1 queue */
2271 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2272 e1000_configure_rx(adapter);
72d64a43 2273 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2274 }
2275}
2276
2277/**
2278 * e1000_set_mac - Change the Ethernet Address of the NIC
2279 * @netdev: network interface device structure
2280 * @p: pointer to an address structure
2281 *
2282 * Returns 0 on success, negative on failure
2283 **/
2284
64798845 2285static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2286{
60490fe0 2287 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2288 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2289 struct sockaddr *addr = p;
2290
96838a40 2291 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2292 return -EADDRNOTAVAIL;
2293
2294 /* 82542 2.0 needs to be in reset to write receive address registers */
2295
1dc32918 2296 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2297 e1000_enter_82542_rst(adapter);
2298
2299 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2300 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2301
1dc32918 2302 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2303
868d5309
MC		 2304 /* With 82571 controllers, LAA may be overwritten (with the default)
2305 * due to controller reset from the other port. */
1dc32918 2306 if (hw->mac_type == e1000_82571) {
868d5309 2307 /* activate the work around */
1dc32918 2308 hw->laa_is_present = 1;
868d5309 2309
96838a40
JB		 2310 /* Hold a copy of the LAA in RAR[14] This is done so that
2311 * between the time RAR[0] gets clobbered and the time it
2312 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2313 * of the RARs and no incoming packets directed to this port
96838a40 2314 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2315 * RAR[14] */
1dc32918 2316 e1000_rar_set(hw, hw->mac_addr,
868d5309
MC		 2317 E1000_RAR_ENTRIES - 1);
2318 }
2319
1dc32918 2320 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2321 e1000_leave_82542_rst(adapter);
2322
2323 return 0;
2324}
2325
2326/**
db0ce50d 2327 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2328 * @netdev: network interface device structure
2329 *
db0ce50d
PM		 2330 * The set_rx_mode entry point is called whenever the unicast or multicast
2331 * address lists or the network interface flags are updated. This routine is
2332 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2333 * promiscuous mode, and all-multi behavior.
2334 **/
2335
64798845 2336static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2337{
60490fe0 2338 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2339 struct e1000_hw *hw = &adapter->hw;
db0ce50d
PM		 2340 struct dev_addr_list *uc_ptr;
2341 struct dev_addr_list *mc_ptr;
406874a7
JP		 2342 u32 rctl;
2343 u32 hash_value;
868d5309 2344 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2345 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2346 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2347 E1000_NUM_MTA_REGISTERS;
2348
1dc32918 2349 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 2350 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2351
868d5309 2352 /* reserve RAR[14] for LAA over-write work-around */
1dc32918 2353 if (hw->mac_type == e1000_82571)
868d5309 2354 rar_entries--;
1da177e4 2355
2648345f
MC		 2356 /* Check for Promiscuous and All Multicast modes */
2357
1dc32918 2358 rctl = er32(RCTL);
1da177e4 2359
96838a40 2360 if (netdev->flags & IFF_PROMISC) {
1da177e4 2361 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2362 rctl &= ~E1000_RCTL_VFE;
1da177e4 2363 } else {
746b9f02
PM		 2364 if (netdev->flags & IFF_ALLMULTI) {
2365 rctl |= E1000_RCTL_MPE;
2366 } else {
2367 rctl &= ~E1000_RCTL_MPE;
2368 }
78ed11a5 2369 if (adapter->hw.mac_type != e1000_ich8lan)
746b9f02 2370 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2371 }
2372
2373 uc_ptr = NULL;
2374 if (netdev->uc_count > rar_entries - 1) {
2375 rctl |= E1000_RCTL_UPE;
2376 } else if (!(netdev->flags & IFF_PROMISC)) {
2377 rctl &= ~E1000_RCTL_UPE;
2378 uc_ptr = netdev->uc_list;
1da177e4
LT		 2379 }
2380
1dc32918 2381 ew32(RCTL, rctl);
1da177e4
LT		 2382
2383 /* 82542 2.0 needs to be in reset to write receive address registers */
2384
96838a40 2385 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2386 e1000_enter_82542_rst(adapter);
2387
db0ce50d
PM		 2388 /* load the first 14 addresses into the exact filters 1-14. Unicast
2389 * addresses take precedence to avoid disabling unicast filtering
2390 * when possible.
2391 *
1da177e4
LT		 2392 * RAR 0 is used for the station MAC adddress
2393 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2394 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2395 */
2396 mc_ptr = netdev->mc_list;
2397
96838a40 2398 for (i = 1; i < rar_entries; i++) {
db0ce50d
PM		 2399 if (uc_ptr) {
2400 e1000_rar_set(hw, uc_ptr->da_addr, i);
2401 uc_ptr = uc_ptr->next;
2402 } else if (mc_ptr) {
2403 e1000_rar_set(hw, mc_ptr->da_addr, i);
1da177e4
LT		 2404 mc_ptr = mc_ptr->next;
2405 } else {
2406 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
1dc32918 2407 E1000_WRITE_FLUSH();
1da177e4 2408 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
1dc32918 2409 E1000_WRITE_FLUSH();
1da177e4
LT		 2410 }
2411 }
db0ce50d 2412 WARN_ON(uc_ptr != NULL);
1da177e4
LT		 2413
2414 /* clear the old settings from the multicast hash table */
2415
cd94dd0b 2416 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2417 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
1dc32918 2418 E1000_WRITE_FLUSH();
4ca213a6 2419 }
1da177e4
LT		 2420
2421 /* load any remaining addresses into the hash table */
2422
96838a40 2423 for (; mc_ptr; mc_ptr = mc_ptr->next) {
db0ce50d 2424 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
1da177e4
LT		 2425 e1000_mta_set(hw, hash_value);
2426 }
2427
96838a40 2428 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2429 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2430}
2431
2432/* Need to wait a few seconds after link up to get diagnostic information from
2433 * the phy */
2434
64798845 2435static void e1000_update_phy_info(unsigned long data)
1da177e4 2436{
e982f17c 2437 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP		 2438 struct e1000_hw *hw = &adapter->hw;
2439 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT		 2440}
2441
2442/**
2443 * e1000_82547_tx_fifo_stall - Timer Call-back
2444 * @data: pointer to adapter cast into an unsigned long
2445 **/
2446
64798845 2447static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2448{
e982f17c 2449 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2450 struct e1000_hw *hw = &adapter->hw;
1da177e4 2451 struct net_device *netdev = adapter->netdev;
406874a7 2452 u32 tctl;
1da177e4 2453
96838a40 2454 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2455 if ((er32(TDT) == er32(TDH)) &&
2456 (er32(TDFT) == er32(TDFH)) &&
2457 (er32(TDFTS) == er32(TDFHS))) {
2458 tctl = er32(TCTL);
2459 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2460 ew32(TDFT, adapter->tx_head_addr);
2461 ew32(TDFH, adapter->tx_head_addr);
2462 ew32(TDFTS, adapter->tx_head_addr);
2463 ew32(TDFHS, adapter->tx_head_addr);
2464 ew32(TCTL, tctl);
2465 E1000_WRITE_FLUSH();
1da177e4
LT		 2466
2467 adapter->tx_fifo_head = 0;
2468 atomic_set(&adapter->tx_fifo_stall, 0);
2469 netif_wake_queue(netdev);
2470 } else {
2471 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2472 }
2473 }
2474}
2475
2476/**
2477 * e1000_watchdog - Timer Call-back
2478 * @data: pointer to adapter cast into an unsigned long
2479 **/
64798845 2480static void e1000_watchdog(unsigned long data)
1da177e4 2481{
e982f17c 2482 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2483 struct e1000_hw *hw = &adapter->hw;
1da177e4 2484 struct net_device *netdev = adapter->netdev;
545c67c0 2485 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7
JP		 2486 u32 link, tctl;
2487 s32 ret_val;
cd94dd0b 2488
1dc32918 2489 ret_val = e1000_check_for_link(hw);
cd94dd0b 2490 if ((ret_val == E1000_ERR_PHY) &&
1dc32918
JP		 2491 (hw->phy_type == e1000_phy_igp_3) &&
2492 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
cd94dd0b
AK		 2493 /* See e1000_kumeran_lock_loss_workaround() */
2494 DPRINTK(LINK, INFO,
2495 "Gigabit has been disabled, downgrading speed\n");
2496 }
90fb5135 2497
1dc32918
JP		 2498 if (hw->mac_type == e1000_82573) {
2499 e1000_enable_tx_pkt_filtering(hw);
2500 if (adapter->mng_vlan_id != hw->mng_cookie.vlan_id)
2d7edb92 2501 e1000_update_mng_vlan(adapter);
96838a40 2502 }
1da177e4 2503
1dc32918
JP		 2504 if ((hw->media_type == e1000_media_type_internal_serdes) &&
2505 !(er32(TXCW) & E1000_TXCW_ANE))
2506 link = !hw->serdes_link_down;
1da177e4 2507 else
1dc32918 2508 link = er32(STATUS) & E1000_STATUS_LU;
1da177e4 2509
96838a40
JB		 2510 if (link) {
2511 if (!netif_carrier_ok(netdev)) {
406874a7 2512 u32 ctrl;
c3033b01 2513 bool txb2b = true;
1dc32918 2514 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2515 &adapter->link_speed,
2516 &adapter->link_duplex);
2517
1dc32918 2518 ctrl = er32(CTRL);
9669f53b
AK		 2519 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2520 "Flow Control: %s\n",
2521 adapter->link_speed,
2522 adapter->link_duplex == FULL_DUPLEX ?
2523 "Full Duplex" : "Half Duplex",
2524 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2525 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2526 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2527 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2528
7e6c9861
JK		 2529 /* tweak tx_queue_len according to speed/duplex
2530 * and adjust the timeout factor */
66a2b0a3
JK		 2531 netdev->tx_queue_len = adapter->tx_queue_len;
2532 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2533 switch (adapter->link_speed) {
2534 case SPEED_10:
c3033b01 2535 txb2b = false;
7e6c9861
JK		 2536 netdev->tx_queue_len = 10;
2537 adapter->tx_timeout_factor = 8;
2538 break;
2539 case SPEED_100:
c3033b01 2540 txb2b = false;
7e6c9861
JK		 2541 netdev->tx_queue_len = 100;
2542 /* maybe add some timeout factor ? */
2543 break;
2544 }
2545
1dc32918
JP		 2546 if ((hw->mac_type == e1000_82571 ||
2547 hw->mac_type == e1000_82572) &&
c3033b01 2548 !txb2b) {
406874a7 2549 u32 tarc0;
1dc32918 2550 tarc0 = er32(TARC0);
90fb5135 2551 tarc0 &= ~(1 << 21);
1dc32918 2552 ew32(TARC0, tarc0);
7e6c9861 2553 }
90fb5135 2554
7e6c9861
JK		 2555 /* disable TSO for pcie and 10/100 speeds, to avoid
2556 * some hardware issues */
2557 if (!adapter->tso_force &&
1dc32918 2558 hw->bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2559 switch (adapter->link_speed) {
2560 case SPEED_10:
66a2b0a3 2561 case SPEED_100:
7e6c9861
JK		 2562 DPRINTK(PROBE,INFO,
2563 "10/100 speed: disabling TSO\n");
2564 netdev->features &= ~NETIF_F_TSO;
87ca4e5b 2565 netdev->features &= ~NETIF_F_TSO6;
7e6c9861
JK		 2566 break;
2567 case SPEED_1000:
2568 netdev->features |= NETIF_F_TSO;
87ca4e5b 2569 netdev->features |= NETIF_F_TSO6;
7e6c9861
JK		 2570 break;
2571 default:
2572 /* oops */
66a2b0a3
JK		 2573 break;
2574 }
2575 }
7e6c9861
JK		 2576
2577 /* enable transmits in the hardware, need to do this
2578 * after setting TARC0 */
1dc32918 2579 tctl = er32(TCTL);
7e6c9861 2580 tctl |= E1000_TCTL_EN;
1dc32918 2581 ew32(TCTL, tctl);
66a2b0a3 2582
1da177e4
LT		 2583 netif_carrier_on(netdev);
2584 netif_wake_queue(netdev);
56e1393f 2585 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4 2586 adapter->smartspeed = 0;
bb8e3311
JG		 2587 } else {
2588 /* make sure the receive unit is started */
1dc32918
JP		 2589 if (hw->rx_needs_kicking) {
2590 u32 rctl = er32(RCTL);
2591 ew32(RCTL, rctl | E1000_RCTL_EN);
bb8e3311 2592 }
1da177e4
LT		 2593 }
2594 } else {
96838a40 2595 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2596 adapter->link_speed = 0;
2597 adapter->link_duplex = 0;
2598 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2599 netif_carrier_off(netdev);
2600 netif_stop_queue(netdev);
56e1393f 2601 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
87041639
JK		 2602
2603 /* 80003ES2LAN workaround--
2604 * For packet buffer work-around on link down event;
2605 * disable receives in the ISR and
2606 * reset device here in the watchdog
2607 */
1dc32918 2608 if (hw->mac_type == e1000_80003es2lan)
87041639
JK		 2609 /* reset device */
2610 schedule_work(&adapter->reset_task);
1da177e4
LT		 2611 }
2612
2613 e1000_smartspeed(adapter);
2614 }
2615
2616 e1000_update_stats(adapter);
2617
1dc32918 2618 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2619 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2620 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2621 adapter->colc_old = adapter->stats.colc;
2622
2623 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2624 adapter->gorcl_old = adapter->stats.gorcl;
2625 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2626 adapter->gotcl_old = adapter->stats.gotcl;
2627
1dc32918 2628 e1000_update_adaptive(hw);
1da177e4 2629
f56799ea 2630 if (!netif_carrier_ok(netdev)) {
581d708e 2631 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2632 /* We've lost link, so the controller stops DMA,
2633 * but we've got queued Tx work that's never going
2634 * to get done, so reset controller to flush Tx.
2635 * (Do the reset outside of interrupt context). */
87041639
JK		 2636 adapter->tx_timeout_count++;
2637 schedule_work(&adapter->reset_task);
1da177e4
LT		 2638 }
2639 }
2640
1da177e4 2641 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2642 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2643
2648345f 2644 /* Force detection of hung controller every watchdog period */
c3033b01 2645 adapter->detect_tx_hung = true;
1da177e4 2646
96838a40 2647 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309 2648 * reset from the other port. Set the appropriate LAA in RAR[0] */
1dc32918
JP		 2649 if (hw->mac_type == e1000_82571 && hw->laa_is_present)
2650 e1000_rar_set(hw, hw->mac_addr, 0);
868d5309 2651
1da177e4 2652 /* Reset the timer */
56e1393f 2653 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2654}
2655
835bb129
JB		 2656enum latency_range {
2657 lowest_latency = 0,
2658 low_latency = 1,
2659 bulk_latency = 2,
2660 latency_invalid = 255
2661};
2662
2663/**
2664 * e1000_update_itr - update the dynamic ITR value based on statistics
2665 * Stores a new ITR value based on packets and byte
2666 * counts during the last interrupt. The advantage of per interrupt
2667 * computation is faster updates and more accurate ITR for the current
2668 * traffic pattern. Constants in this function were computed
2669 * based on theoretical maximum wire speed and thresholds were set based
2670 * on testing data as well as attempting to minimize response time
2671 * while increasing bulk throughput.
2672 * this functionality is controlled by the InterruptThrottleRate module
2673 * parameter (see e1000_param.c)
2674 * @adapter: pointer to adapter
2675 * @itr_setting: current adapter->itr
2676 * @packets: the number of packets during this measurement interval
2677 * @bytes: the number of bytes during this measurement interval
2678 **/
2679static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2680 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2681{
2682 unsigned int retval = itr_setting;
2683 struct e1000_hw *hw = &adapter->hw;
2684
2685 if (unlikely(hw->mac_type < e1000_82540))
2686 goto update_itr_done;
2687
2688 if (packets == 0)
2689 goto update_itr_done;
2690
835bb129
JB		 2691 switch (itr_setting) {
2692 case lowest_latency:
2b65326e
JB		 2693 /* jumbo frames get bulk treatment*/
2694 if (bytes/packets > 8000)
2695 retval = bulk_latency;
2696 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2697 retval = low_latency;
2698 break;
2699 case low_latency: /* 50 usec aka 20000 ints/s */
2700 if (bytes > 10000) {
2b65326e
JB		 2701 /* jumbo frames need bulk latency setting */
2702 if (bytes/packets > 8000)
2703 retval = bulk_latency;
2704 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2705 retval = bulk_latency;
2706 else if ((packets > 35))
2707 retval = lowest_latency;
2b65326e
JB		 2708 } else if (bytes/packets > 2000)
2709 retval = bulk_latency;
2710 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2711 retval = lowest_latency;
2712 break;
2713 case bulk_latency: /* 250 usec aka 4000 ints/s */
2714 if (bytes > 25000) {
2715 if (packets > 35)
2716 retval = low_latency;
2b65326e
JB		 2717 } else if (bytes < 6000) {
2718 retval = low_latency;
835bb129
JB		 2719 }
2720 break;
2721 }
2722
2723update_itr_done:
2724 return retval;
2725}
2726
2727static void e1000_set_itr(struct e1000_adapter *adapter)
2728{
2729 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2730 u16 current_itr;
2731 u32 new_itr = adapter->itr;
835bb129
JB		 2732
2733 if (unlikely(hw->mac_type < e1000_82540))
2734 return;
2735
2736 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2737 if (unlikely(adapter->link_speed != SPEED_1000)) {
2738 current_itr = 0;
2739 new_itr = 4000;
2740 goto set_itr_now;
2741 }
2742
2743 adapter->tx_itr = e1000_update_itr(adapter,
2744 adapter->tx_itr,
2745 adapter->total_tx_packets,
2746 adapter->total_tx_bytes);
2b65326e
JB		 2747 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2748 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2749 adapter->tx_itr = low_latency;
2750
835bb129
JB		 2751 adapter->rx_itr = e1000_update_itr(adapter,
2752 adapter->rx_itr,
2753 adapter->total_rx_packets,
2754 adapter->total_rx_bytes);
2b65326e
JB		 2755 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2756 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2757 adapter->rx_itr = low_latency;
835bb129
JB		 2758
2759 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2760
835bb129
JB		 2761 switch (current_itr) {
2762 /* counts and packets in update_itr are dependent on these numbers */
2763 case lowest_latency:
2764 new_itr = 70000;
2765 break;
2766 case low_latency:
2767 new_itr = 20000; /* aka hwitr = ~200 */
2768 break;
2769 case bulk_latency:
2770 new_itr = 4000;
2771 break;
2772 default:
2773 break;
2774 }
2775
2776set_itr_now:
2777 if (new_itr != adapter->itr) {
2778 /* this attempts to bias the interrupt rate towards Bulk
2779 * by adding intermediate steps when interrupt rate is
2780 * increasing */
2781 new_itr = new_itr > adapter->itr ?
2782 min(adapter->itr + (new_itr >> 2), new_itr) :
2783 new_itr;
2784 adapter->itr = new_itr;
1dc32918 2785 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129
JB		 2786 }
2787
2788 return;
2789}
2790
1da177e4
LT		 2791#define E1000_TX_FLAGS_CSUM 0x00000001
2792#define E1000_TX_FLAGS_VLAN 0x00000002
2793#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2794#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2795#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2796#define E1000_TX_FLAGS_VLAN_SHIFT 16
2797
64798845
JP		 2798static int e1000_tso(struct e1000_adapter *adapter,
2799 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2800{
1da177e4 2801 struct e1000_context_desc *context_desc;
545c67c0 2802 struct e1000_buffer *buffer_info;
1da177e4 2803 unsigned int i;
406874a7
JP		 2804 u32 cmd_length = 0;
2805 u16 ipcse = 0, tucse, mss;
2806 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2807 int err;
2808
89114afd 2809 if (skb_is_gso(skb)) {
1da177e4
LT		 2810 if (skb_header_cloned(skb)) {
2811 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2812 if (err)
2813 return err;
2814 }
2815
ab6a5bb6 2816 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2817 mss = skb_shinfo(skb)->gso_size;
60828236 2818 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2819 struct iphdr *iph = ip_hdr(skb);
2820 iph->tot_len = 0;
2821 iph->check = 0;
aa8223c7
ACM		 2822 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2823 iph->daddr, 0,
2824 IPPROTO_TCP,
2825 0);
2d7edb92 2826 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2827 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2828 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2829 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2830 tcp_hdr(skb)->check =
0660e03f
ACM		 2831 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2832 &ipv6_hdr(skb)->daddr,
2833 0, IPPROTO_TCP, 0);
2d7edb92 2834 ipcse = 0;
2d7edb92 2835 }
bbe735e4 2836 ipcss = skb_network_offset(skb);
eddc9ec5 2837 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2838 tucss = skb_transport_offset(skb);
aa8223c7 2839 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2840 tucse = 0;
2841
2842 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2843 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2844
581d708e
MC		 2845 i = tx_ring->next_to_use;
2846 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2847 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2848
2849 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2850 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2851 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2852 context_desc->upper_setup.tcp_fields.tucss = tucss;
2853 context_desc->upper_setup.tcp_fields.tucso = tucso;
2854 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2855 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2856 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2857 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2858
545c67c0 2859 buffer_info->time_stamp = jiffies;
a9ebadd6 2860 buffer_info->next_to_watch = i;
545c67c0 2861
581d708e
MC		 2862 if (++i == tx_ring->count) i = 0;
2863 tx_ring->next_to_use = i;
1da177e4 2864
c3033b01 2865 return true;
1da177e4 2866 }
c3033b01 2867 return false;
1da177e4
LT		 2868}
2869
64798845
JP		 2870static bool e1000_tx_csum(struct e1000_adapter *adapter,
2871 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2872{
2873 struct e1000_context_desc *context_desc;
545c67c0 2874 struct e1000_buffer *buffer_info;
1da177e4 2875 unsigned int i;
406874a7 2876 u8 css;
3ed30676 2877 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2878
3ed30676
DG		 2879 if (skb->ip_summed != CHECKSUM_PARTIAL)
2880 return false;
1da177e4 2881
3ed30676
DG		 2882 switch (skb->protocol) {
2883 case __constant_htons(ETH_P_IP):
2884 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2885 cmd_len |= E1000_TXD_CMD_TCP;
2886 break;
2887 case __constant_htons(ETH_P_IPV6):
2888 /* XXX not handling all IPV6 headers */
2889 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2890 cmd_len |= E1000_TXD_CMD_TCP;
2891 break;
2892 default:
2893 if (unlikely(net_ratelimit()))
2894 DPRINTK(DRV, WARNING,
2895 "checksum_partial proto=%x!\n", skb->protocol);
2896 break;
2897 }
1da177e4 2898
3ed30676 2899 css = skb_transport_offset(skb);
1da177e4 2900
3ed30676
DG		 2901 i = tx_ring->next_to_use;
2902 buffer_info = &tx_ring->buffer_info[i];
2903 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2904
3ed30676
DG		 2905 context_desc->lower_setup.ip_config = 0;
2906 context_desc->upper_setup.tcp_fields.tucss = css;
2907 context_desc->upper_setup.tcp_fields.tucso =
2908 css + skb->csum_offset;
2909 context_desc->upper_setup.tcp_fields.tucse = 0;
2910 context_desc->tcp_seg_setup.data = 0;
2911 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2912
3ed30676
DG		 2913 buffer_info->time_stamp = jiffies;
2914 buffer_info->next_to_watch = i;
1da177e4 2915
3ed30676
DG		 2916 if (unlikely(++i == tx_ring->count)) i = 0;
2917 tx_ring->next_to_use = i;
2918
2919 return true;
1da177e4
LT		 2920}
2921
2922#define E1000_MAX_TXD_PWR 12
2923#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2924
64798845
JP		 2925static int e1000_tx_map(struct e1000_adapter *adapter,
2926 struct e1000_tx_ring *tx_ring,
2927 struct sk_buff *skb, unsigned int first,
2928 unsigned int max_per_txd, unsigned int nr_frags,
2929 unsigned int mss)
1da177e4 2930{
1dc32918 2931 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2932 struct e1000_buffer *buffer_info;
2933 unsigned int len = skb->len;
2934 unsigned int offset = 0, size, count = 0, i;
2935 unsigned int f;
2936 len -= skb->data_len;
2937
2938 i = tx_ring->next_to_use;
2939
96838a40 2940 while (len) {
1da177e4
LT		 2941 buffer_info = &tx_ring->buffer_info[i];
2942 size = min(len, max_per_txd);
fd803241
JK		 2943 /* Workaround for Controller erratum --
2944 * descriptor for non-tso packet in a linear SKB that follows a
2945 * tso gets written back prematurely before the data is fully
0f15a8fa 2946 * DMA'd to the controller */
fd803241 2947 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2948 !skb_is_gso(skb)) {
fd803241
JK		 2949 tx_ring->last_tx_tso = 0;
2950 size -= 4;
2951 }
2952
1da177e4
LT		 2953 /* Workaround for premature desc write-backs
2954 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2955 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2956 size -= 4;
97338bde
MC		 2957 /* work-around for errata 10 and it applies
2958 * to all controllers in PCI-X mode
2959 * The fix is to make sure that the first descriptor of a
2960 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2961 */
1dc32918 2962 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2963 (size > 2015) && count == 0))
2964 size = 2015;
96838a40 2965
1da177e4
LT		 2966 /* Workaround for potential 82544 hang in PCI-X. Avoid
2967 * terminating buffers within evenly-aligned dwords. */
96838a40 2968 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2969 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2970 size > 4))
2971 size -= 4;
2972
2973 buffer_info->length = size;
2974 buffer_info->dma =
2975 pci_map_single(adapter->pdev,
2976 skb->data + offset,
2977 size,
2978 PCI_DMA_TODEVICE);
2979 buffer_info->time_stamp = jiffies;
a9ebadd6 2980 buffer_info->next_to_watch = i;
1da177e4
LT		 2981
2982 len -= size;
2983 offset += size;
2984 count++;
96838a40 2985 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2986 }
2987
96838a40 2988 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2989 struct skb_frag_struct *frag;
2990
2991 frag = &skb_shinfo(skb)->frags[f];
2992 len = frag->size;
2993 offset = frag->page_offset;
2994
96838a40 2995 while (len) {
1da177e4
LT		 2996 buffer_info = &tx_ring->buffer_info[i];
2997 size = min(len, max_per_txd);
1da177e4
LT		 2998 /* Workaround for premature desc write-backs
2999 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3000 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 3001 size -= 4;
1da177e4
LT		 3002 /* Workaround for potential 82544 hang in PCI-X.
3003 * Avoid terminating buffers within evenly-aligned
3004 * dwords. */
96838a40 3005 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3006 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3007 size > 4))
3008 size -= 4;
3009
3010 buffer_info->length = size;
3011 buffer_info->dma =
3012 pci_map_page(adapter->pdev,
3013 frag->page,
3014 offset,
3015 size,
3016 PCI_DMA_TODEVICE);
3017 buffer_info->time_stamp = jiffies;
a9ebadd6 3018 buffer_info->next_to_watch = i;
1da177e4
LT		 3019
3020 len -= size;
3021 offset += size;
3022 count++;
96838a40 3023 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3024 }
3025 }
3026
3027 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3028 tx_ring->buffer_info[i].skb = skb;
3029 tx_ring->buffer_info[first].next_to_watch = i;
3030
3031 return count;
3032}
3033
64798845
JP		 3034static void e1000_tx_queue(struct e1000_adapter *adapter,
3035 struct e1000_tx_ring *tx_ring, int tx_flags,
3036 int count)
1da177e4 3037{
1dc32918 3038 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3039 struct e1000_tx_desc *tx_desc = NULL;
3040 struct e1000_buffer *buffer_info;
406874a7 3041 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 3042 unsigned int i;
3043
96838a40 3044 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 3045 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3046 E1000_TXD_CMD_TSE;
2d7edb92
MC		 3047 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3048
96838a40 3049 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 3050 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 3051 }
3052
96838a40 3053 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 3054 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3055 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3056 }
3057
96838a40 3058 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3059 txd_lower |= E1000_TXD_CMD_VLE;
3060 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3061 }
3062
3063 i = tx_ring->next_to_use;
3064
96838a40 3065 while (count--) {
1da177e4
LT		 3066 buffer_info = &tx_ring->buffer_info[i];
3067 tx_desc = E1000_TX_DESC(*tx_ring, i);
3068 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3069 tx_desc->lower.data =
3070 cpu_to_le32(txd_lower | buffer_info->length);
3071 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3072 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3073 }
3074
3075 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3076
3077 /* Force memory writes to complete before letting h/w
3078 * know there are new descriptors to fetch. (Only
3079 * applicable for weak-ordered memory model archs,
3080 * such as IA-64). */
3081 wmb();
3082
3083 tx_ring->next_to_use = i;
1dc32918 3084 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 3085 /* we need this if more than one processor can write to our tail
3086 * at a time, it syncronizes IO on IA64/Altix systems */
3087 mmiowb();
1da177e4
LT		 3088}
3089
3090/**
3091 * 82547 workaround to avoid controller hang in half-duplex environment.
3092 * The workaround is to avoid queuing a large packet that would span
3093 * the internal Tx FIFO ring boundary by notifying the stack to resend
3094 * the packet at a later time. This gives the Tx FIFO an opportunity to
3095 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3096 * to the beginning of the Tx FIFO.
3097 **/
3098
3099#define E1000_FIFO_HDR 0x10
3100#define E1000_82547_PAD_LEN 0x3E0
3101
64798845
JP		 3102static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3103 struct sk_buff *skb)
1da177e4 3104{
406874a7
JP		 3105 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3106 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3107
9099cfb9 3108 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3109
96838a40 3110 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3111 goto no_fifo_stall_required;
3112
96838a40 3113 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3114 return 1;
3115
96838a40 3116 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3117 atomic_set(&adapter->tx_fifo_stall, 1);
3118 return 1;
3119 }
3120
3121no_fifo_stall_required:
3122 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3123 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3124 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3125 return 0;
3126}
3127
2d7edb92 3128#define MINIMUM_DHCP_PACKET_SIZE 282
64798845
JP		 3129static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3130 struct sk_buff *skb)
2d7edb92
MC		 3131{
3132 struct e1000_hw *hw = &adapter->hw;
406874a7 3133 u16 length, offset;
96838a40 3134 if (vlan_tx_tag_present(skb)) {
1dc32918
JP		 3135 if (!((vlan_tx_tag_get(skb) == hw->mng_cookie.vlan_id) &&
3136 ( hw->mng_cookie.status &
2d7edb92
MC		 3137 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3138 return 0;
3139 }
20a44028 3140 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
e982f17c 3141 struct ethhdr *eth = (struct ethhdr *)skb->data;
96838a40
JB		 3142 if ((htons(ETH_P_IP) == eth->h_proto)) {
3143 const struct iphdr *ip =
406874a7 3144 (struct iphdr *)((u8 *)skb->data+14);
96838a40
JB		 3145 if (IPPROTO_UDP == ip->protocol) {
3146 struct udphdr *udp =
406874a7 3147 (struct udphdr *)((u8 *)ip +
2d7edb92 3148 (ip->ihl << 2));
96838a40 3149 if (ntohs(udp->dest) == 67) {
406874a7 3150 offset = (u8 *)udp + 8 - skb->data;
2d7edb92
MC		 3151 length = skb->len - offset;
3152
3153 return e1000_mng_write_dhcp_info(hw,
406874a7 3154 (u8 *)udp + 8,
2d7edb92
MC		 3155 length);
3156 }
3157 }
3158 }
3159 }
3160 return 0;
3161}
3162
65c7973f
JB		 3163static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3164{
3165 struct e1000_adapter *adapter = netdev_priv(netdev);
3166 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3167
3168 netif_stop_queue(netdev);
3169 /* Herbert's original patch had:
3170 * smp_mb__after_netif_stop_queue();
3171 * but since that doesn't exist yet, just open code it. */
3172 smp_mb();
3173
3174 /* We need to check again in a case another CPU has just
3175 * made room available. */
3176 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3177 return -EBUSY;
3178
3179 /* A reprieve! */
3180 netif_start_queue(netdev);
fcfb1224 3181 ++adapter->restart_queue;
65c7973f
JB		 3182 return 0;
3183}
3184
3185static int e1000_maybe_stop_tx(struct net_device *netdev,
3186 struct e1000_tx_ring *tx_ring, int size)
3187{
3188 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3189 return 0;
3190 return __e1000_maybe_stop_tx(netdev, size);
3191}
3192
1da177e4 3193#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
64798845 3194static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1da177e4 3195{
60490fe0 3196 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3197 struct e1000_hw *hw = &adapter->hw;
581d708e 3198 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3199 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3200 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3201 unsigned int tx_flags = 0;
6d1e3aa7 3202 unsigned int len = skb->len - skb->data_len;
1da177e4 3203 unsigned long flags;
6d1e3aa7
KK		 3204 unsigned int nr_frags;
3205 unsigned int mss;
1da177e4 3206 int count = 0;
76c224bc 3207 int tso;
1da177e4 3208 unsigned int f;
1da177e4 3209
65c7973f
JB		 3210 /* This goes back to the question of how to logically map a tx queue
3211 * to a flow. Right now, performance is impacted slightly negatively
3212 * if using multiple tx queues. If the stack breaks away from a
3213 * single qdisc implementation, we can look at this again. */
581d708e 3214 tx_ring = adapter->tx_ring;
24025e4e 3215
581d708e 3216 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3217 dev_kfree_skb_any(skb);
3218 return NETDEV_TX_OK;
3219 }
3220
032fe6e9
JB		 3221 /* 82571 and newer doesn't need the workaround that limited descriptor
3222 * length to 4kB */
1dc32918 3223 if (hw->mac_type >= e1000_82571)
032fe6e9
JB		 3224 max_per_txd = 8192;
3225
7967168c 3226 mss = skb_shinfo(skb)->gso_size;
76c224bc 3227 /* The controller does a simple calculation to
1da177e4
LT		 3228 * make sure there is enough room in the FIFO before
3229 * initiating the DMA for each buffer. The calc is:
3230 * 4 = ceil(buffer len/mss). To make sure we don't
3231 * overrun the FIFO, adjust the max buffer len if mss
3232 * drops. */
96838a40 3233 if (mss) {
406874a7 3234 u8 hdr_len;
1da177e4
LT		 3235 max_per_txd = min(mss << 2, max_per_txd);
3236 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3237
90fb5135
AK		 3238 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3239 * points to just header, pull a few bytes of payload from
3240 * frags into skb->data */
ab6a5bb6 3241 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3242 if (skb->data_len && hdr_len == len) {
1dc32918 3243 switch (hw->mac_type) {
9f687888 3244 unsigned int pull_size;
683a2aa3
HX		 3245 case e1000_82544:
3246 /* Make sure we have room to chop off 4 bytes,
3247 * and that the end alignment will work out to
3248 * this hardware's requirements
3249 * NOTE: this is a TSO only workaround
3250 * if end byte alignment not correct move us
3251 * into the next dword */
27a884dc 3252 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 3253 break;
3254 /* fall through */
9f687888
JK		 3255 case e1000_82571:
3256 case e1000_82572:
3257 case e1000_82573:
cd94dd0b 3258 case e1000_ich8lan:
9f687888
JK		 3259 pull_size = min((unsigned int)4, skb->data_len);
3260 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3261 DPRINTK(DRV, ERR,
9f687888
JK		 3262 "__pskb_pull_tail failed.\n");
3263 dev_kfree_skb_any(skb);
749dfc70 3264 return NETDEV_TX_OK;
9f687888
JK		 3265 }
3266 len = skb->len - skb->data_len;
3267 break;
3268 default:
3269 /* do nothing */
3270 break;
d74bbd3b 3271 }
9a3056da 3272 }
1da177e4
LT		 3273 }
3274
9a3056da 3275 /* reserve a descriptor for the offload context */
84fa7933 3276 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3277 count++;
2648345f 3278 count++;
fd803241 3279
fd803241 3280 /* Controller Erratum workaround */
89114afd 3281 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3282 count++;
fd803241 3283
1da177e4
LT		 3284 count += TXD_USE_COUNT(len, max_txd_pwr);
3285
96838a40 3286 if (adapter->pcix_82544)
1da177e4
LT		 3287 count++;
3288
96838a40 3289 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3290 * in PCI-X mode, so add one more descriptor to the count
3291 */
1dc32918 3292 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3293 (len > 2015)))
3294 count++;
3295
1da177e4 3296 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3297 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3298 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3299 max_txd_pwr);
96838a40 3300 if (adapter->pcix_82544)
1da177e4
LT		 3301 count += nr_frags;
3302
0f15a8fa 3303
1dc32918
JP		 3304 if (hw->tx_pkt_filtering &&
3305 (hw->mac_type == e1000_82573))
2d7edb92
MC		 3306 e1000_transfer_dhcp_info(adapter, skb);
3307
f50393fe 3308 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
581d708e 3309 /* Collision - tell upper layer to requeue */
581d708e 3310 return NETDEV_TX_LOCKED;
1da177e4
LT		 3311
3312 /* need: count + 2 desc gap to keep tail from touching
3313 * head, otherwise try next time */
65c7973f 3314 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3315 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3316 return NETDEV_TX_BUSY;
3317 }
3318
1dc32918 3319 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3320 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3321 netif_stop_queue(netdev);
1314bbf3 3322 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
581d708e 3323 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3324 return NETDEV_TX_BUSY;
3325 }
3326 }
3327
96838a40 3328 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3329 tx_flags |= E1000_TX_FLAGS_VLAN;
3330 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3331 }
3332
581d708e 3333 first = tx_ring->next_to_use;
96838a40 3334
581d708e 3335 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3336 if (tso < 0) {
3337 dev_kfree_skb_any(skb);
581d708e 3338 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3339 return NETDEV_TX_OK;
3340 }
3341
fd803241
JK		 3342 if (likely(tso)) {
3343 tx_ring->last_tx_tso = 1;
1da177e4 3344 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3345 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3346 tx_flags |= E1000_TX_FLAGS_CSUM;
3347
2d7edb92 3348 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3349 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3350 * no longer assume, we must. */
60828236 3351 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3352 tx_flags |= E1000_TX_FLAGS_IPV4;
3353
581d708e
MC		 3354 e1000_tx_queue(adapter, tx_ring, tx_flags,
3355 e1000_tx_map(adapter, tx_ring, skb, first,
3356 max_per_txd, nr_frags, mss));
1da177e4
LT		 3357
3358 netdev->trans_start = jiffies;
3359
3360 /* Make sure there is space in the ring for the next send. */
65c7973f 3361 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3362
581d708e 3363 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3364 return NETDEV_TX_OK;
3365}
3366
3367/**
3368 * e1000_tx_timeout - Respond to a Tx Hang
3369 * @netdev: network interface device structure
3370 **/
3371
64798845 3372static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3373{
60490fe0 3374 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3375
3376 /* Do the reset outside of interrupt context */
87041639
JK		 3377 adapter->tx_timeout_count++;
3378 schedule_work(&adapter->reset_task);
1da177e4
LT		 3379}
3380
64798845 3381static void e1000_reset_task(struct work_struct *work)
1da177e4 3382{
65f27f38
DH		 3383 struct e1000_adapter *adapter =
3384 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3385
2db10a08 3386 e1000_reinit_locked(adapter);
1da177e4
LT		 3387}
3388
3389/**
3390 * e1000_get_stats - Get System Network Statistics
3391 * @netdev: network interface device structure
3392 *
3393 * Returns the address of the device statistics structure.
3394 * The statistics are actually updated from the timer callback.
3395 **/
3396
64798845 3397static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3398{
60490fe0 3399 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3400
6b7660cd 3401 /* only return the current stats */
1da177e4
LT		 3402 return &adapter->net_stats;
3403}
3404
3405/**
3406 * e1000_change_mtu - Change the Maximum Transfer Unit
3407 * @netdev: network interface device structure
3408 * @new_mtu: new value for maximum frame size
3409 *
3410 * Returns 0 on success, negative on failure
3411 **/
3412
64798845 3413static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3414{
60490fe0 3415 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3416 struct e1000_hw *hw = &adapter->hw;
1da177e4 3417 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
406874a7 3418 u16 eeprom_data = 0;
1da177e4 3419
96838a40
JB		 3420 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3421 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3422 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3423 return -EINVAL;
2d7edb92 3424 }
1da177e4 3425
997f5cbd 3426 /* Adapter-specific max frame size limits. */
1dc32918 3427 switch (hw->mac_type) {
9e2feace 3428 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3429 case e1000_ich8lan:
997f5cbd
JK		 3430 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3431 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3432 return -EINVAL;
2d7edb92 3433 }
997f5cbd 3434 break;
85b22eb6 3435 case e1000_82573:
249d71d6
BA		 3436 /* Jumbo Frames not supported if:
3437 * - this is not an 82573L device
3438 * - ASPM is enabled in any way (0x1A bits 3:2) */
1dc32918 3439 e1000_read_eeprom(hw, EEPROM_INIT_3GIO_3, 1,
85b22eb6 3440 &eeprom_data);
1dc32918 3441 if ((hw->device_id != E1000_DEV_ID_82573L) ||
249d71d6 3442 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3443 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3444 DPRINTK(PROBE, ERR,
3445 "Jumbo Frames not supported.\n");
3446 return -EINVAL;
3447 }
3448 break;
3449 }
249d71d6
BA		 3450 /* ERT will be enabled later to enable wire speed receives */
3451
85b22eb6 3452 /* fall through to get support */
997f5cbd
JK		 3453 case e1000_82571:
3454 case e1000_82572:
87041639 3455 case e1000_80003es2lan:
997f5cbd
JK		 3456#define MAX_STD_JUMBO_FRAME_SIZE 9234
3457 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3458 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3459 return -EINVAL;
3460 }
3461 break;
3462 default:
3463 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3464 break;
1da177e4
LT		 3465 }
3466
87f5032e 3467 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3468 * means we reserve 2 more, this pushes us to allocate from the next
3469 * larger slab size
3470 * i.e. RXBUFFER_2048 --> size-4096 slab */
3471
3472 if (max_frame <= E1000_RXBUFFER_256)
3473 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3474 else if (max_frame <= E1000_RXBUFFER_512)
3475 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3476 else if (max_frame <= E1000_RXBUFFER_1024)
3477 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3478 else if (max_frame <= E1000_RXBUFFER_2048)
3479 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3480 else if (max_frame <= E1000_RXBUFFER_4096)
3481 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3482 else if (max_frame <= E1000_RXBUFFER_8192)
3483 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3484 else if (max_frame <= E1000_RXBUFFER_16384)
3485 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3486
3487 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3488 if (!hw->tbi_compatibility_on &&
9e2feace
AK		 3489 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3490 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3491 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3492
2d7edb92 3493 netdev->mtu = new_mtu;
1dc32918 3494 hw->max_frame_size = max_frame;
2d7edb92 3495
2db10a08
AK		 3496 if (netif_running(netdev))
3497 e1000_reinit_locked(adapter);
1da177e4 3498
1da177e4
LT		 3499 return 0;
3500}
3501
3502/**
3503 * e1000_update_stats - Update the board statistics counters
3504 * @adapter: board private structure
3505 **/
3506
64798845 3507void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4
LT		 3508{
3509 struct e1000_hw *hw = &adapter->hw;
282f33c9 3510 struct pci_dev *pdev = adapter->pdev;
1da177e4 3511 unsigned long flags;
406874a7 3512 u16 phy_tmp;
1da177e4
LT		 3513
3514#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3515
282f33c9
LV		 3516 /*
3517 * Prevent stats update while adapter is being reset, or if the pci
3518 * connection is down.
3519 */
9026729b 3520 if (adapter->link_speed == 0)
282f33c9 3521 return;
81b1955e 3522 if (pci_channel_offline(pdev))
9026729b
AK		 3523 return;
3524
1da177e4
LT		 3525 spin_lock_irqsave(&adapter->stats_lock, flags);
3526
828d055f 3527 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3528 * called from the interrupt context, so they must only
3529 * be written while holding adapter->stats_lock
3530 */
3531
1dc32918
JP		 3532 adapter->stats.crcerrs += er32(CRCERRS);
3533 adapter->stats.gprc += er32(GPRC);
3534 adapter->stats.gorcl += er32(GORCL);
3535 adapter->stats.gorch += er32(GORCH);
3536 adapter->stats.bprc += er32(BPRC);
3537 adapter->stats.mprc += er32(MPRC);
3538 adapter->stats.roc += er32(ROC);
3539
3540 if (hw->mac_type != e1000_ich8lan) {
3541 adapter->stats.prc64 += er32(PRC64);
3542 adapter->stats.prc127 += er32(PRC127);
3543 adapter->stats.prc255 += er32(PRC255);
3544 adapter->stats.prc511 += er32(PRC511);
3545 adapter->stats.prc1023 += er32(PRC1023);
3546 adapter->stats.prc1522 += er32(PRC1522);
3547 }
3548
3549 adapter->stats.symerrs += er32(SYMERRS);
3550 adapter->stats.mpc += er32(MPC);
3551 adapter->stats.scc += er32(SCC);
3552 adapter->stats.ecol += er32(ECOL);
3553 adapter->stats.mcc += er32(MCC);
3554 adapter->stats.latecol += er32(LATECOL);
3555 adapter->stats.dc += er32(DC);
3556 adapter->stats.sec += er32(SEC);
3557 adapter->stats.rlec += er32(RLEC);
3558 adapter->stats.xonrxc += er32(XONRXC);
3559 adapter->stats.xontxc += er32(XONTXC);
3560 adapter->stats.xoffrxc += er32(XOFFRXC);
3561 adapter->stats.xofftxc += er32(XOFFTXC);
3562 adapter->stats.fcruc += er32(FCRUC);
3563 adapter->stats.gptc += er32(GPTC);
3564 adapter->stats.gotcl += er32(GOTCL);
3565 adapter->stats.gotch += er32(GOTCH);
3566 adapter->stats.rnbc += er32(RNBC);
3567 adapter->stats.ruc += er32(RUC);
3568 adapter->stats.rfc += er32(RFC);
3569 adapter->stats.rjc += er32(RJC);
3570 adapter->stats.torl += er32(TORL);
3571 adapter->stats.torh += er32(TORH);
3572 adapter->stats.totl += er32(TOTL);
3573 adapter->stats.toth += er32(TOTH);
3574 adapter->stats.tpr += er32(TPR);
3575
3576 if (hw->mac_type != e1000_ich8lan) {
3577 adapter->stats.ptc64 += er32(PTC64);
3578 adapter->stats.ptc127 += er32(PTC127);
3579 adapter->stats.ptc255 += er32(PTC255);
3580 adapter->stats.ptc511 += er32(PTC511);
3581 adapter->stats.ptc1023 += er32(PTC1023);
3582 adapter->stats.ptc1522 += er32(PTC1522);
3583 }
3584
3585 adapter->stats.mptc += er32(MPTC);
3586 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3587
3588 /* used for adaptive IFS */
3589
1dc32918 3590 hw->tx_packet_delta = er32(TPT);
1da177e4 3591 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3592 hw->collision_delta = er32(COLC);
1da177e4
LT		 3593 adapter->stats.colc += hw->collision_delta;
3594
96838a40 3595 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3596 adapter->stats.algnerrc += er32(ALGNERRC);
3597 adapter->stats.rxerrc += er32(RXERRC);
3598 adapter->stats.tncrs += er32(TNCRS);
3599 adapter->stats.cexterr += er32(CEXTERR);
3600 adapter->stats.tsctc += er32(TSCTC);
3601 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4 3602 }
96838a40 3603 if (hw->mac_type > e1000_82547_rev_2) {
1dc32918
JP		 3604 adapter->stats.iac += er32(IAC);
3605 adapter->stats.icrxoc += er32(ICRXOC);
3606
3607 if (hw->mac_type != e1000_ich8lan) {
3608 adapter->stats.icrxptc += er32(ICRXPTC);
3609 adapter->stats.icrxatc += er32(ICRXATC);
3610 adapter->stats.ictxptc += er32(ICTXPTC);
3611 adapter->stats.ictxatc += er32(ICTXATC);
3612 adapter->stats.ictxqec += er32(ICTXQEC);
3613 adapter->stats.ictxqmtc += er32(ICTXQMTC);
3614 adapter->stats.icrxdmtc += er32(ICRXDMTC);
cd94dd0b 3615 }
2d7edb92 3616 }
1da177e4
LT		 3617
3618 /* Fill out the OS statistics structure */
1da177e4
LT		 3619 adapter->net_stats.multicast = adapter->stats.mprc;
3620 adapter->net_stats.collisions = adapter->stats.colc;
3621
3622 /* Rx Errors */
3623
87041639
JK		 3624 /* RLEC on some newer hardware can be incorrect so build
3625 * our own version based on RUC and ROC */
1da177e4
LT		 3626 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3627 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3628 adapter->stats.ruc + adapter->stats.roc +
3629 adapter->stats.cexterr;
49559854
MW		 3630 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3631 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3632 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3633 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3634 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3635
3636 /* Tx Errors */
49559854
MW		 3637 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3638 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3639 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3640 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3641 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3642 if (hw->bad_tx_carr_stats_fd &&
167fb284
JG		 3643 adapter->link_duplex == FULL_DUPLEX) {
3644 adapter->net_stats.tx_carrier_errors = 0;
3645 adapter->stats.tncrs = 0;
3646 }
1da177e4
LT		 3647
3648 /* Tx Dropped needs to be maintained elsewhere */
3649
3650 /* Phy Stats */
96838a40
JB		 3651 if (hw->media_type == e1000_media_type_copper) {
3652 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3653 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3654 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3655 adapter->phy_stats.idle_errors += phy_tmp;
3656 }
3657
96838a40 3658 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3659 (hw->phy_type == e1000_phy_m88) &&
3660 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3661 adapter->phy_stats.receive_errors += phy_tmp;
3662 }
3663
15e376b4 3664 /* Management Stats */
1dc32918
JP		 3665 if (hw->has_smbus) {
3666 adapter->stats.mgptc += er32(MGTPTC);
3667 adapter->stats.mgprc += er32(MGTPRC);
3668 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3669 }
3670
1da177e4
LT		 3671 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3672}
9ac98284
JB		 3673
3674/**
3675 * e1000_intr_msi - Interrupt Handler
3676 * @irq: interrupt number
3677 * @data: pointer to a network interface device structure
3678 **/
3679
64798845 3680static irqreturn_t e1000_intr_msi(int irq, void *data)
9ac98284
JB		 3681{
3682 struct net_device *netdev = data;
3683 struct e1000_adapter *adapter = netdev_priv(netdev);
3684 struct e1000_hw *hw = &adapter->hw;
1dc32918 3685 u32 icr = er32(ICR);
9ac98284 3686
9150b76a
JB		 3687 /* in NAPI mode read ICR disables interrupts using IAM */
3688
b5fc8f0c
JB		 3689 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3690 hw->get_link_status = 1;
3691 /* 80003ES2LAN workaround-- For packet buffer work-around on
3692 * link down event; disable receives here in the ISR and reset
3693 * adapter in watchdog */
3694 if (netif_carrier_ok(netdev) &&
1dc32918 3695 (hw->mac_type == e1000_80003es2lan)) {
b5fc8f0c 3696 /* disable receives */
1dc32918
JP		 3697 u32 rctl = er32(RCTL);
3698 ew32(RCTL, rctl & ~E1000_RCTL_EN);
9ac98284 3699 }
b5fc8f0c
JB		 3700 /* guard against interrupt when we're going down */
3701 if (!test_bit(__E1000_DOWN, &adapter->flags))
3702 mod_timer(&adapter->watchdog_timer, jiffies + 1);
9ac98284
JB		 3703 }
3704
bea3348e 3705 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
835bb129
JB		 3706 adapter->total_tx_bytes = 0;
3707 adapter->total_tx_packets = 0;
3708 adapter->total_rx_bytes = 0;
3709 adapter->total_rx_packets = 0;
bea3348e 3710 __netif_rx_schedule(netdev, &adapter->napi);
835bb129 3711 } else
9ac98284 3712 e1000_irq_enable(adapter);
9ac98284
JB		 3713
3714 return IRQ_HANDLED;
3715}
1da177e4
LT		 3716
3717/**
3718 * e1000_intr - Interrupt Handler
3719 * @irq: interrupt number
3720 * @data: pointer to a network interface device structure
1da177e4
LT		 3721 **/
3722
64798845 3723static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3724{
3725 struct net_device *netdev = data;
60490fe0 3726 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3727 struct e1000_hw *hw = &adapter->hw;
1dc32918 3728 u32 rctl, icr = er32(ICR);
c3570acb 3729
835bb129
JB		 3730 if (unlikely(!icr))
3731 return IRQ_NONE; /* Not our interrupt */
3732
835bb129
JB		 3733 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3734 * not set, then the adapter didn't send an interrupt */
3735 if (unlikely(hw->mac_type >= e1000_82571 &&
3736 !(icr & E1000_ICR_INT_ASSERTED)))
3737 return IRQ_NONE;
3738
9150b76a
JB		 3739 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3740 * need for the IMC write */
1da177e4 3741
96838a40 3742 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3743 hw->get_link_status = 1;
87041639
JK		 3744 /* 80003ES2LAN workaround--
3745 * For packet buffer work-around on link down event;
3746 * disable receives here in the ISR and
3747 * reset adapter in watchdog
3748 */
3749 if (netif_carrier_ok(netdev) &&
1dc32918 3750 (hw->mac_type == e1000_80003es2lan)) {
87041639 3751 /* disable receives */
1dc32918
JP		 3752 rctl = er32(RCTL);
3753 ew32(RCTL, rctl & ~E1000_RCTL_EN);
87041639 3754 }
1314bbf3
AK		 3755 /* guard against interrupt when we're going down */
3756 if (!test_bit(__E1000_DOWN, &adapter->flags))
3757 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3758 }
3759
1e613fd9 3760 if (unlikely(hw->mac_type < e1000_82571)) {
835bb129 3761 /* disable interrupts, without the synchronize_irq bit */
1dc32918
JP		 3762 ew32(IMC, ~0);
3763 E1000_WRITE_FLUSH();
1e613fd9 3764 }
bea3348e 3765 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
835bb129
JB		 3766 adapter->total_tx_bytes = 0;
3767 adapter->total_tx_packets = 0;
3768 adapter->total_rx_bytes = 0;
3769 adapter->total_rx_packets = 0;
bea3348e 3770 __netif_rx_schedule(netdev, &adapter->napi);
835bb129 3771 } else
90fb5135
AK		 3772 /* this really should not happen! if it does it is basically a
3773 * bug, but not a hard error, so enable ints and continue */
581d708e 3774 e1000_irq_enable(adapter);
1da177e4 3775
1da177e4
LT		 3776 return IRQ_HANDLED;
3777}
3778
1da177e4
LT		 3779/**
3780 * e1000_clean - NAPI Rx polling callback
3781 * @adapter: board private structure
3782 **/
64798845 3783static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3784{
bea3348e
SH		 3785 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3786 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 3787 int tx_cleaned = 0, work_done = 0;
581d708e 3788
4cf1653a 3789 adapter = netdev_priv(poll_dev);
581d708e 3790
d3d9e484
AK		 3791 /* e1000_clean is called per-cpu. This lock protects
3792 * tx_ring[0] from being cleaned by multiple cpus
3793 * simultaneously. A failure obtaining the lock means
3794 * tx_ring[0] is currently being cleaned anyway. */
3795 if (spin_trylock(&adapter->tx_queue_lock)) {
d2c7ddd6
DM		 3796 tx_cleaned = e1000_clean_tx_irq(adapter,
3797 &adapter->tx_ring[0]);
d3d9e484 3798 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3799 }
3800
d3d9e484 3801 adapter->clean_rx(adapter, &adapter->rx_ring[0],
bea3348e 3802 &work_done, budget);
96838a40 3803
d2c7ddd6
DM		 3804 if (tx_cleaned)
3805 work_done = budget;
3806
53e52c72
DM		 3807 /* If budget not fully consumed, exit the polling mode */
3808 if (work_done < budget) {
835bb129
JB		 3809 if (likely(adapter->itr_setting & 3))
3810 e1000_set_itr(adapter);
bea3348e 3811 netif_rx_complete(poll_dev, napi);
1da177e4 3812 e1000_irq_enable(adapter);
1da177e4
LT		 3813 }
3814
bea3348e 3815 return work_done;
1da177e4
LT		 3816}
3817
1da177e4
LT		 3818/**
3819 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3820 * @adapter: board private structure
3821 **/
64798845
JP		 3822static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3823 struct e1000_tx_ring *tx_ring)
1da177e4 3824{
1dc32918 3825 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3826 struct net_device *netdev = adapter->netdev;
3827 struct e1000_tx_desc *tx_desc, *eop_desc;
3828 struct e1000_buffer *buffer_info;
3829 unsigned int i, eop;
2a1af5d7 3830 unsigned int count = 0;
c3033b01 3831 bool cleaned = false;
835bb129 3832 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3833
3834 i = tx_ring->next_to_clean;
3835 eop = tx_ring->buffer_info[i].next_to_watch;
3836 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3837
581d708e 3838 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
c3033b01 3839 for (cleaned = false; !cleaned; ) {
1da177e4
LT		 3840 tx_desc = E1000_TX_DESC(*tx_ring, i);
3841 buffer_info = &tx_ring->buffer_info[i];
3842 cleaned = (i == eop);
3843
835bb129 3844 if (cleaned) {
2b65326e 3845 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3846 unsigned int segs, bytecount;
3847 segs = skb_shinfo(skb)->gso_segs ?: 1;
3848 /* multiply data chunks by size of headers */
3849 bytecount = ((segs - 1) * skb_headlen(skb)) +
3850 skb->len;
2b65326e 3851 total_tx_packets += segs;
7753b171 3852 total_tx_bytes += bytecount;
835bb129 3853 }
fd803241 3854 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3855 tx_desc->upper.data = 0;
1da177e4 3856
96838a40 3857 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3858 }
581d708e 3859
1da177e4
LT		 3860 eop = tx_ring->buffer_info[i].next_to_watch;
3861 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3862#define E1000_TX_WEIGHT 64
3863 /* weight of a sort for tx, to avoid endless transmit cleanup */
c3570acb
FR		 3864 if (count++ == E1000_TX_WEIGHT)
3865 break;
1da177e4
LT		 3866 }
3867
3868 tx_ring->next_to_clean = i;
3869
77b2aad5 3870#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 3871 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3872 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3873 /* Make sure that anybody stopping the queue after this
3874 * sees the new next_to_clean.
3875 */
3876 smp_mb();
fcfb1224 3877 if (netif_queue_stopped(netdev)) {
77b2aad5 3878 netif_wake_queue(netdev);
fcfb1224
JB		 3879 ++adapter->restart_queue;
3880 }
77b2aad5 3881 }
2648345f 3882
581d708e 3883 if (adapter->detect_tx_hung) {
2648345f 3884 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3885 * check with the clearing of time_stamp and movement of i */
c3033b01 3886 adapter->detect_tx_hung = false;
392137fa
JK		 3887 if (tx_ring->buffer_info[eop].dma &&
3888 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3889 (adapter->tx_timeout_factor * HZ))
1dc32918 3890 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3891
3892 /* detected Tx unit hang */
c6963ef5 3893 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3894 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3895 " TDH <%x>\n"
3896 " TDT <%x>\n"
3897 " next_to_use <%x>\n"
3898 " next_to_clean <%x>\n"
3899 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3900 " time_stamp <%lx>\n"
3901 " next_to_watch <%x>\n"
3902 " jiffies <%lx>\n"
3903 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3904 (unsigned long)((tx_ring - adapter->tx_ring) /
3905 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3906 readl(hw->hw_addr + tx_ring->tdh),
3907 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3908 tx_ring->next_to_use,
392137fa
JK		 3909 tx_ring->next_to_clean,
3910 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3911 eop,
3912 jiffies,
3913 eop_desc->upper.fields.status);
1da177e4 3914 netif_stop_queue(netdev);
70b8f1e1 3915 }
1da177e4 3916 }
835bb129
JB		 3917 adapter->total_tx_bytes += total_tx_bytes;
3918 adapter->total_tx_packets += total_tx_packets;
ef90e4ec
AK		 3919 adapter->net_stats.tx_bytes += total_tx_bytes;
3920 adapter->net_stats.tx_packets += total_tx_packets;
1da177e4
LT		 3921 return cleaned;
3922}
3923
3924/**
3925 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3926 * @adapter: board private structure
3927 * @status_err: receive descriptor status and error fields
3928 * @csum: receive descriptor csum field
3929 * @sk_buff: socket buffer with received data
1da177e4
LT		 3930 **/
3931
64798845
JP		 3932static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3933 u32 csum, struct sk_buff *skb)
1da177e4 3934{
1dc32918 3935 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3936 u16 status = (u16)status_err;
3937 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC		 3938 skb->ip_summed = CHECKSUM_NONE;
3939
1da177e4 3940 /* 82543 or newer only */
1dc32918 3941 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3942 /* Ignore Checksum bit is set */
96838a40 3943 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3944 /* TCP/UDP checksum error bit is set */
96838a40 3945 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3946 /* let the stack verify checksum errors */
1da177e4 3947 adapter->hw_csum_err++;
2d7edb92
MC		 3948 return;
3949 }
3950 /* TCP/UDP Checksum has not been calculated */
1dc32918 3951 if (hw->mac_type <= e1000_82547_rev_2) {
96838a40 3952 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3953 return;
1da177e4 3954 } else {
96838a40 3955 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3956 return;
3957 }
3958 /* It must be a TCP or UDP packet with a valid checksum */
3959 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3960 /* TCP checksum is good */
3961 skb->ip_summed = CHECKSUM_UNNECESSARY;
1dc32918 3962 } else if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3963 /* IP fragment with UDP payload */
3964 /* Hardware complements the payload checksum, so we undo it
3965 * and then put the value in host order for further stack use.
3966 */
3e18826c
AV		 3967 __sum16 sum = (__force __sum16)htons(csum);
3968 skb->csum = csum_unfold(~sum);
84fa7933 3969 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3970 }
2d7edb92 3971 adapter->hw_csum_good++;
1da177e4
LT		 3972}
3973
3974/**
2d7edb92 3975 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3976 * @adapter: board private structure
3977 **/
64798845
JP		 3978static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3979 struct e1000_rx_ring *rx_ring,
3980 int *work_done, int work_to_do)
1da177e4 3981{
1dc32918 3982 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3983 struct net_device *netdev = adapter->netdev;
3984 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3985 struct e1000_rx_desc *rx_desc, *next_rxd;
3986 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3987 unsigned long flags;
406874a7
JP		 3988 u32 length;
3989 u8 last_byte;
1da177e4 3990 unsigned int i;
72d64a43 3991 int cleaned_count = 0;
c3033b01 3992 bool cleaned = false;
835bb129 3993 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 3994
3995 i = rx_ring->next_to_clean;
3996 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3997 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3998
b92ff8ee 3999 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4000 struct sk_buff *skb;
a292ca6e 4001 u8 status;
90fb5135 4002
96838a40 4003 if (*work_done >= work_to_do)
1da177e4
LT		 4004 break;
4005 (*work_done)++;
c3570acb 4006
a292ca6e 4007 status = rx_desc->status;
b92ff8ee 4008 skb = buffer_info->skb;
86c3d59f
JB		 4009 buffer_info->skb = NULL;
4010
30320be8
JK		 4011 prefetch(skb->data - NET_IP_ALIGN);
4012
86c3d59f
JB		 4013 if (++i == rx_ring->count) i = 0;
4014 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4015 prefetch(next_rxd);
4016
86c3d59f 4017 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4018
c3033b01 4019 cleaned = true;
72d64a43 4020 cleaned_count++;
a292ca6e
JK		 4021 pci_unmap_single(pdev,
4022 buffer_info->dma,
4023 buffer_info->length,
1da177e4
LT		 4024 PCI_DMA_FROMDEVICE);
4025
1da177e4
LT		 4026 length = le16_to_cpu(rx_desc->length);
4027
a1415ee6
JK		 4028 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4029 /* All receives must fit into a single buffer */
4030 E1000_DBG("%s: Receive packet consumed multiple"
4031 " buffers\n", netdev->name);
864c4e45 4032 /* recycle */
8fc897b0 4033 buffer_info->skb = skb;
1da177e4
LT		 4034 goto next_desc;
4035 }
4036
96838a40 4037 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 4038 last_byte = *(skb->data + length - 1);
1dc32918
JP		 4039 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4040 last_byte)) {
1da177e4 4041 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4042 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 4043 length, skb->data);
4044 spin_unlock_irqrestore(&adapter->stats_lock,
4045 flags);
4046 length--;
4047 } else {
9e2feace
AK		 4048 /* recycle */
4049 buffer_info->skb = skb;
1da177e4
LT		 4050 goto next_desc;
4051 }
1cb5821f 4052 }
1da177e4 4053
d2a1e213
JB		 4054 /* adjust length to remove Ethernet CRC, this must be
4055 * done after the TBI_ACCEPT workaround above */
4056 length -= 4;
4057
835bb129
JB		 4058 /* probably a little skewed due to removing CRC */
4059 total_rx_bytes += length;
4060 total_rx_packets++;
4061
a292ca6e
JK		 4062 /* code added for copybreak, this should improve
4063 * performance for small packets with large amounts
4064 * of reassembly being done in the stack */
1f753861 4065 if (length < copybreak) {
a292ca6e 4066 struct sk_buff *new_skb =
87f5032e 4067 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 4068 if (new_skb) {
4069 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM		 4070 skb_copy_to_linear_data_offset(new_skb,
4071 -NET_IP_ALIGN,
4072 (skb->data -
4073 NET_IP_ALIGN),
4074 (length +
4075 NET_IP_ALIGN));
a292ca6e
JK		 4076 /* save the skb in buffer_info as good */
4077 buffer_info->skb = skb;
4078 skb = new_skb;
a292ca6e 4079 }
996695de
AK		 4080 /* else just continue with the old one */
4081 }
a292ca6e 4082 /* end copybreak code */
996695de 4083 skb_put(skb, length);
1da177e4
LT		 4084
4085 /* Receive Checksum Offload */
a292ca6e 4086 e1000_rx_checksum(adapter,
406874a7
JP		 4087 (u32)(status) |
4088 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4089 le16_to_cpu(rx_desc->csum), skb);
96838a40 4090
1da177e4 4091 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 4092
96838a40 4093 if (unlikely(adapter->vlgrp &&
a292ca6e 4094 (status & E1000_RXD_STAT_VP))) {
1da177e4 4095 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
38b22195 4096 le16_to_cpu(rx_desc->special));
1da177e4
LT		 4097 } else {
4098 netif_receive_skb(skb);
4099 }
c3570acb 4100
1da177e4
LT		 4101next_desc:
4102 rx_desc->status = 0;
1da177e4 4103
72d64a43
JK		 4104 /* return some buffers to hardware, one at a time is too slow */
4105 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4106 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4107 cleaned_count = 0;
4108 }
4109
30320be8 4110 /* use prefetched values */
86c3d59f
JB		 4111 rx_desc = next_rxd;
4112 buffer_info = next_buffer;
1da177e4 4113 }
1da177e4 4114 rx_ring->next_to_clean = i;
72d64a43
JK		 4115
4116 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4117 if (cleaned_count)
4118 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4119
835bb129
JB		 4120 adapter->total_rx_packets += total_rx_packets;
4121 adapter->total_rx_bytes += total_rx_bytes;
ef90e4ec
AK		 4122 adapter->net_stats.rx_bytes += total_rx_bytes;
4123 adapter->net_stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4124 return cleaned;
4125}
4126
1da177e4 4127/**
2d7edb92 4128 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4129 * @adapter: address of board private structure
4130 **/
4131
64798845
JP		 4132static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4133 struct e1000_rx_ring *rx_ring,
4134 int cleaned_count)
1da177e4 4135{
1dc32918 4136 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4137 struct net_device *netdev = adapter->netdev;
4138 struct pci_dev *pdev = adapter->pdev;
4139 struct e1000_rx_desc *rx_desc;
4140 struct e1000_buffer *buffer_info;
4141 struct sk_buff *skb;
2648345f
MC		 4142 unsigned int i;
4143 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4144
4145 i = rx_ring->next_to_use;
4146 buffer_info = &rx_ring->buffer_info[i];
4147
a292ca6e 4148 while (cleaned_count--) {
ca6f7224
CH		 4149 skb = buffer_info->skb;
4150 if (skb) {
a292ca6e
JK		 4151 skb_trim(skb, 0);
4152 goto map_skb;
4153 }
4154
ca6f7224 4155 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4156 if (unlikely(!skb)) {
1da177e4 4157 /* Better luck next round */
72d64a43 4158 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4159 break;
4160 }
4161
2648345f 4162 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4163 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4164 struct sk_buff *oldskb = skb;
2648345f
MC		 4165 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4166 "at %p\n", bufsz, skb->data);
4167 /* Try again, without freeing the previous */
87f5032e 4168 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4169 /* Failed allocation, critical failure */
1da177e4
LT		 4170 if (!skb) {
4171 dev_kfree_skb(oldskb);
4172 break;
4173 }
2648345f 4174
1da177e4
LT		 4175 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4176 /* give up */
4177 dev_kfree_skb(skb);
4178 dev_kfree_skb(oldskb);
4179 break; /* while !buffer_info->skb */
1da177e4 4180 }
ca6f7224
CH		 4181
4182 /* Use new allocation */
4183 dev_kfree_skb(oldskb);
1da177e4 4184 }
1da177e4
LT		 4185 /* Make buffer alignment 2 beyond a 16 byte boundary
4186 * this will result in a 16 byte aligned IP header after
4187 * the 14 byte MAC header is removed
4188 */
4189 skb_reserve(skb, NET_IP_ALIGN);
4190
1da177e4
LT		 4191 buffer_info->skb = skb;
4192 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4193map_skb:
1da177e4
LT		 4194 buffer_info->dma = pci_map_single(pdev,
4195 skb->data,
4196 adapter->rx_buffer_len,
4197 PCI_DMA_FROMDEVICE);
4198
2648345f
MC		 4199 /* Fix for errata 23, can't cross 64kB boundary */
4200 if (!e1000_check_64k_bound(adapter,
4201 (void *)(unsigned long)buffer_info->dma,
4202 adapter->rx_buffer_len)) {
4203 DPRINTK(RX_ERR, ERR,
4204 "dma align check failed: %u bytes at %p\n",
4205 adapter->rx_buffer_len,
4206 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4207 dev_kfree_skb(skb);
4208 buffer_info->skb = NULL;
4209
2648345f 4210 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4211 adapter->rx_buffer_len,
4212 PCI_DMA_FROMDEVICE);
4213
4214 break; /* while !buffer_info->skb */
4215 }
1da177e4
LT		 4216 rx_desc = E1000_RX_DESC(*rx_ring, i);
4217 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4218
96838a40
JB		 4219 if (unlikely(++i == rx_ring->count))
4220 i = 0;
1da177e4
LT		 4221 buffer_info = &rx_ring->buffer_info[i];
4222 }
4223
b92ff8ee
JB		 4224 if (likely(rx_ring->next_to_use != i)) {
4225 rx_ring->next_to_use = i;
4226 if (unlikely(i-- == 0))
4227 i = (rx_ring->count - 1);
4228
4229 /* Force memory writes to complete before letting h/w
4230 * know there are new descriptors to fetch. (Only
4231 * applicable for weak-ordered memory model archs,
4232 * such as IA-64). */
4233 wmb();
1dc32918 4234 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4235 }
1da177e4
LT		 4236}
4237
4238/**
4239 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4240 * @adapter:
4241 **/
4242
64798845 4243static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4244{
1dc32918 4245 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4246 u16 phy_status;
4247 u16 phy_ctrl;
1da177e4 4248
1dc32918
JP		 4249 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4250 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4251 return;
4252
96838a40 4253 if (adapter->smartspeed == 0) {
1da177e4
LT		 4254 /* If Master/Slave config fault is asserted twice,
4255 * we assume back-to-back */
1dc32918 4256 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4257 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4258 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4259 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4260 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4261 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4262 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4263 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4264 phy_ctrl);
4265 adapter->smartspeed++;
1dc32918
JP		 4266 if (!e1000_phy_setup_autoneg(hw) &&
4267 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4268 &phy_ctrl)) {
4269 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4270 MII_CR_RESTART_AUTO_NEG);
1dc32918 4271 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4272 phy_ctrl);
4273 }
4274 }
4275 return;
96838a40 4276 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4277 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4278 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4279 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4280 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4281 if (!e1000_phy_setup_autoneg(hw) &&
4282 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4283 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4284 MII_CR_RESTART_AUTO_NEG);
1dc32918 4285 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4286 }
4287 }
4288 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4289 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4290 adapter->smartspeed = 0;
4291}
4292
4293/**
4294 * e1000_ioctl -
4295 * @netdev:
4296 * @ifreq:
4297 * @cmd:
4298 **/
4299
64798845 4300static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4301{
4302 switch (cmd) {
4303 case SIOCGMIIPHY:
4304 case SIOCGMIIREG:
4305 case SIOCSMIIREG:
4306 return e1000_mii_ioctl(netdev, ifr, cmd);
4307 default:
4308 return -EOPNOTSUPP;
4309 }
4310}
4311
4312/**
4313 * e1000_mii_ioctl -
4314 * @netdev:
4315 * @ifreq:
4316 * @cmd:
4317 **/
4318
64798845
JP		 4319static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4320 int cmd)
1da177e4 4321{
60490fe0 4322 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4323 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4324 struct mii_ioctl_data *data = if_mii(ifr);
4325 int retval;
406874a7
JP		 4326 u16 mii_reg;
4327 u16 spddplx;
97876fc6 4328 unsigned long flags;
1da177e4 4329
1dc32918 4330 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4331 return -EOPNOTSUPP;
4332
4333 switch (cmd) {
4334 case SIOCGMIIPHY:
1dc32918 4335 data->phy_id = hw->phy_addr;
1da177e4
LT		 4336 break;
4337 case SIOCGMIIREG:
96838a40 4338 if (!capable(CAP_NET_ADMIN))
1da177e4 4339 return -EPERM;
97876fc6 4340 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4341 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4342 &data->val_out)) {
4343 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4344 return -EIO;
97876fc6
MC		 4345 }
4346 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4347 break;
4348 case SIOCSMIIREG:
96838a40 4349 if (!capable(CAP_NET_ADMIN))
1da177e4 4350 return -EPERM;
96838a40 4351 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4352 return -EFAULT;
4353 mii_reg = data->val_in;
97876fc6 4354 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4355 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4356 mii_reg)) {
4357 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4358 return -EIO;
97876fc6 4359 }
f0163ac4 4360 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4361 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4362 switch (data->reg_num) {
4363 case PHY_CTRL:
96838a40 4364 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4365 break;
96838a40 4366 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4367 hw->autoneg = 1;
4368 hw->autoneg_advertised = 0x2F;
1da177e4
LT		 4369 } else {
4370 if (mii_reg & 0x40)
4371 spddplx = SPEED_1000;
4372 else if (mii_reg & 0x2000)
4373 spddplx = SPEED_100;
4374 else
4375 spddplx = SPEED_10;
4376 spddplx += (mii_reg & 0x100)
cb764326
JK		 4377 ? DUPLEX_FULL :
4378 DUPLEX_HALF;
1da177e4
LT		 4379 retval = e1000_set_spd_dplx(adapter,
4380 spddplx);
f0163ac4 4381 if (retval)
1da177e4
LT		 4382 return retval;
4383 }
2db10a08
AK		 4384 if (netif_running(adapter->netdev))
4385 e1000_reinit_locked(adapter);
4386 else
1da177e4
LT		 4387 e1000_reset(adapter);
4388 break;
4389 case M88E1000_PHY_SPEC_CTRL:
4390 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4391 if (e1000_phy_reset(hw))
1da177e4
LT		 4392 return -EIO;
4393 break;
4394 }
4395 } else {
4396 switch (data->reg_num) {
4397 case PHY_CTRL:
96838a40 4398 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4399 break;
2db10a08
AK		 4400 if (netif_running(adapter->netdev))
4401 e1000_reinit_locked(adapter);
4402 else
1da177e4
LT		 4403 e1000_reset(adapter);
4404 break;
4405 }
4406 }
4407 break;
4408 default:
4409 return -EOPNOTSUPP;
4410 }
4411 return E1000_SUCCESS;
4412}
4413
64798845 4414void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4415{
4416 struct e1000_adapter *adapter = hw->back;
2648345f 4417 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4418
96838a40 4419 if (ret_val)
2648345f 4420 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4421}
4422
64798845 4423void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4424{
4425 struct e1000_adapter *adapter = hw->back;
4426
4427 pci_clear_mwi(adapter->pdev);
4428}
4429
64798845 4430int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4431{
4432 struct e1000_adapter *adapter = hw->back;
4433 return pcix_get_mmrbc(adapter->pdev);
4434}
4435
64798845 4436void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4437{
4438 struct e1000_adapter *adapter = hw->back;
4439 pcix_set_mmrbc(adapter->pdev, mmrbc);
4440}
4441
64798845 4442s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
caeccb68
JK		 4443{
4444 struct e1000_adapter *adapter = hw->back;
406874a7 4445 u16 cap_offset;
caeccb68
JK		 4446
4447 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4448 if (!cap_offset)
4449 return -E1000_ERR_CONFIG;
4450
4451 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4452
4453 return E1000_SUCCESS;
4454}
4455
64798845 4456void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4457{
4458 outl(value, port);
4459}
4460
64798845
JP		 4461static void e1000_vlan_rx_register(struct net_device *netdev,
4462 struct vlan_group *grp)
1da177e4 4463{
60490fe0 4464 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4465 struct e1000_hw *hw = &adapter->hw;
406874a7 4466 u32 ctrl, rctl;
1da177e4 4467
9150b76a
JB		 4468 if (!test_bit(__E1000_DOWN, &adapter->flags))
4469 e1000_irq_disable(adapter);
1da177e4
LT		 4470 adapter->vlgrp = grp;
4471
96838a40 4472 if (grp) {
1da177e4 4473 /* enable VLAN tag insert/strip */
1dc32918 4474 ctrl = er32(CTRL);
1da177e4 4475 ctrl |= E1000_CTRL_VME;
1dc32918 4476 ew32(CTRL, ctrl);
1da177e4 4477
cd94dd0b 4478 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4479 /* enable VLAN receive filtering */
1dc32918 4480 rctl = er32(RCTL);
90fb5135 4481 rctl &= ~E1000_RCTL_CFIEN;
1dc32918 4482 ew32(RCTL, rctl);
90fb5135 4483 e1000_update_mng_vlan(adapter);
cd94dd0b 4484 }
1da177e4
LT		 4485 } else {
4486 /* disable VLAN tag insert/strip */
1dc32918 4487 ctrl = er32(CTRL);
1da177e4 4488 ctrl &= ~E1000_CTRL_VME;
1dc32918 4489 ew32(CTRL, ctrl);
1da177e4 4490
cd94dd0b 4491 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4492 if (adapter->mng_vlan_id !=
406874a7 4493 (u16)E1000_MNG_VLAN_NONE) {
90fb5135
AK		 4494 e1000_vlan_rx_kill_vid(netdev,
4495 adapter->mng_vlan_id);
4496 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4497 }
cd94dd0b 4498 }
1da177e4
LT		 4499 }
4500
9150b76a
JB		 4501 if (!test_bit(__E1000_DOWN, &adapter->flags))
4502 e1000_irq_enable(adapter);
1da177e4
LT		 4503}
4504
64798845 4505static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4506{
60490fe0 4507 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4508 struct e1000_hw *hw = &adapter->hw;
406874a7 4509 u32 vfta, index;
96838a40 4510
1dc32918 4511 if ((hw->mng_cookie.status &
96838a40
JB		 4512 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4513 (vid == adapter->mng_vlan_id))
2d7edb92 4514 return;
1da177e4
LT		 4515 /* add VID to filter table */
4516 index = (vid >> 5) & 0x7F;
1dc32918 4517 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4518 vfta |= (1 << (vid & 0x1F));
1dc32918 4519 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4520}
4521
64798845 4522static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4523{
60490fe0 4524 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4525 struct e1000_hw *hw = &adapter->hw;
406874a7 4526 u32 vfta, index;
1da177e4 4527
9150b76a
JB		 4528 if (!test_bit(__E1000_DOWN, &adapter->flags))
4529 e1000_irq_disable(adapter);
5c15bdec 4530 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB		 4531 if (!test_bit(__E1000_DOWN, &adapter->flags))
4532 e1000_irq_enable(adapter);
1da177e4 4533
1dc32918 4534 if ((hw->mng_cookie.status &
96838a40 4535 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4536 (vid == adapter->mng_vlan_id)) {
4537 /* release control to f/w */
4538 e1000_release_hw_control(adapter);
2d7edb92 4539 return;
ff147013
JK		 4540 }
4541
1da177e4
LT		 4542 /* remove VID from filter table */
4543 index = (vid >> 5) & 0x7F;
1dc32918 4544 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4545 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4546 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4547}
4548
64798845 4549static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT		 4550{
4551 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4552
96838a40 4553 if (adapter->vlgrp) {
406874a7 4554 u16 vid;
96838a40 4555 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4556 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 4557 continue;
4558 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4559 }
4560 }
4561}
4562
64798845 4563int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4564{
1dc32918
JP		 4565 struct e1000_hw *hw = &adapter->hw;
4566
4567 hw->autoneg = 0;
1da177e4 4568
6921368f 4569 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4570 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f
MC		 4571 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4572 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4573 return -EINVAL;
4574 }
4575
96838a40 4576 switch (spddplx) {
1da177e4 4577 case SPEED_10 + DUPLEX_HALF:
1dc32918 4578 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4579 break;
4580 case SPEED_10 + DUPLEX_FULL:
1dc32918 4581 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4582 break;
4583 case SPEED_100 + DUPLEX_HALF:
1dc32918 4584 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4585 break;
4586 case SPEED_100 + DUPLEX_FULL:
1dc32918 4587 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4588 break;
4589 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4590 hw->autoneg = 1;
4591 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4592 break;
4593 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4594 default:
2648345f 4595 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4596 return -EINVAL;
4597 }
4598 return 0;
4599}
4600
64798845 4601static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4602{
4603 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4604 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4605 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4606 u32 ctrl, ctrl_ext, rctl, status;
4607 u32 wufc = adapter->wol;
6fdfef16 4608#ifdef CONFIG_PM
240b1710 4609 int retval = 0;
6fdfef16 4610#endif
1da177e4
LT		 4611
4612 netif_device_detach(netdev);
4613
2db10a08
AK		 4614 if (netif_running(netdev)) {
4615 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4616 e1000_down(adapter);
2db10a08 4617 }
1da177e4 4618
2f82665f 4619#ifdef CONFIG_PM
1d33e9c6 4620 retval = pci_save_state(pdev);
2f82665f
JB		 4621 if (retval)
4622 return retval;
4623#endif
4624
1dc32918 4625 status = er32(STATUS);
96838a40 4626 if (status & E1000_STATUS_LU)
1da177e4
LT		 4627 wufc &= ~E1000_WUFC_LNKC;
4628
96838a40 4629 if (wufc) {
1da177e4 4630 e1000_setup_rctl(adapter);
db0ce50d 4631 e1000_set_rx_mode(netdev);
1da177e4
LT		 4632
4633 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4634 if (wufc & E1000_WUFC_MC) {
1dc32918 4635 rctl = er32(RCTL);
1da177e4 4636 rctl |= E1000_RCTL_MPE;
1dc32918 4637 ew32(RCTL, rctl);
1da177e4
LT		 4638 }
4639
1dc32918
JP		 4640 if (hw->mac_type >= e1000_82540) {
4641 ctrl = er32(CTRL);
1da177e4
LT		 4642 /* advertise wake from D3Cold */
4643 #define E1000_CTRL_ADVD3WUC 0x00100000
4644 /* phy power management enable */
4645 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4646 ctrl |= E1000_CTRL_ADVD3WUC |
4647 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4648 ew32(CTRL, ctrl);
1da177e4
LT		 4649 }
4650
1dc32918
JP		 4651 if (hw->media_type == e1000_media_type_fiber ||
4652 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4653 /* keep the laser running in D3 */
1dc32918 4654 ctrl_ext = er32(CTRL_EXT);
1da177e4 4655 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4656 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4657 }
4658
2d7edb92 4659 /* Allow time for pending master requests to run */
1dc32918 4660 e1000_disable_pciex_master(hw);
2d7edb92 4661
1dc32918
JP		 4662 ew32(WUC, E1000_WUC_PME_EN);
4663 ew32(WUFC, wufc);
d0e027db
AK		 4664 pci_enable_wake(pdev, PCI_D3hot, 1);
4665 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4 4666 } else {
1dc32918
JP		 4667 ew32(WUC, 0);
4668 ew32(WUFC, 0);
d0e027db
AK		 4669 pci_enable_wake(pdev, PCI_D3hot, 0);
4670 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4671 }
4672
0fccd0e9
JG		 4673 e1000_release_manageability(adapter);
4674
4675 /* make sure adapter isn't asleep if manageability is enabled */
4676 if (adapter->en_mng_pt) {
4677 pci_enable_wake(pdev, PCI_D3hot, 1);
4678 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4679 }
4680
1dc32918
JP		 4681 if (hw->phy_type == e1000_phy_igp_3)
4682 e1000_phy_powerdown_workaround(hw);
cd94dd0b 4683
edd106fc
AK		 4684 if (netif_running(netdev))
4685 e1000_free_irq(adapter);
4686
b55ccb35
JK		 4687 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4688 * would have already happened in close and is redundant. */
4689 e1000_release_hw_control(adapter);
2d7edb92 4690
1da177e4 4691 pci_disable_device(pdev);
240b1710 4692
d0e027db 4693 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4694
4695 return 0;
4696}
4697
2f82665f 4698#ifdef CONFIG_PM
64798845 4699static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4700{
4701 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4702 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4703 struct e1000_hw *hw = &adapter->hw;
406874a7 4704 u32 err;
1da177e4 4705
d0e027db 4706 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4707 pci_restore_state(pdev);
81250297
TI		 4708
4709 if (adapter->need_ioport)
4710 err = pci_enable_device(pdev);
4711 else
4712 err = pci_enable_device_mem(pdev);
c7be73bc 4713 if (err) {
3d1dd8cb
AK		 4714 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4715 return err;
4716 }
a4cb847d 4717 pci_set_master(pdev);
1da177e4 4718
d0e027db
AK		 4719 pci_enable_wake(pdev, PCI_D3hot, 0);
4720 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4721
c7be73bc
JP		 4722 if (netif_running(netdev)) {
4723 err = e1000_request_irq(adapter);
4724 if (err)
4725 return err;
4726 }
edd106fc
AK		 4727
4728 e1000_power_up_phy(adapter);
1da177e4 4729 e1000_reset(adapter);
1dc32918 4730 ew32(WUS, ~0);
1da177e4 4731
0fccd0e9
JG		 4732 e1000_init_manageability(adapter);
4733
96838a40 4734 if (netif_running(netdev))
1da177e4
LT		 4735 e1000_up(adapter);
4736
4737 netif_device_attach(netdev);
4738
b55ccb35
JK		 4739 /* If the controller is 82573 and f/w is AMT, do not set
4740 * DRV_LOAD until the interface is up. For all other cases,
4741 * let the f/w know that the h/w is now under the control
4742 * of the driver. */
1dc32918
JP		 4743 if (hw->mac_type != e1000_82573 ||
4744 !e1000_check_mng_mode(hw))
b55ccb35 4745 e1000_get_hw_control(adapter);
2d7edb92 4746
1da177e4
LT		 4747 return 0;
4748}
4749#endif
c653e635
AK		 4750
4751static void e1000_shutdown(struct pci_dev *pdev)
4752{
4753 e1000_suspend(pdev, PMSG_SUSPEND);
4754}
4755
1da177e4
LT		 4756#ifdef CONFIG_NET_POLL_CONTROLLER
4757/*
4758 * Polling 'interrupt' - used by things like netconsole to send skbs
4759 * without having to re-enable interrupts. It's not called while
4760 * the interrupt routine is executing.
4761 */
64798845 4762static void e1000_netpoll(struct net_device *netdev)
1da177e4 4763{
60490fe0 4764 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4765
1da177e4 4766 disable_irq(adapter->pdev->irq);
7d12e780 4767 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4768 enable_irq(adapter->pdev->irq);
4769}
4770#endif
4771
9026729b
AK		 4772/**
4773 * e1000_io_error_detected - called when PCI error is detected
4774 * @pdev: Pointer to PCI device
4775 * @state: The current pci conneection state
4776 *
4777 * This function is called after a PCI bus error affecting
4778 * this device has been detected.
4779 */
64798845
JP		 4780static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4781 pci_channel_state_t state)
9026729b
AK		 4782{
4783 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4784 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 4785
4786 netif_device_detach(netdev);
4787
4788 if (netif_running(netdev))
4789 e1000_down(adapter);
72e8d6bb 4790 pci_disable_device(pdev);
9026729b
AK		 4791
4792 /* Request a slot slot reset. */
4793 return PCI_ERS_RESULT_NEED_RESET;
4794}
4795
4796/**
4797 * e1000_io_slot_reset - called after the pci bus has been reset.
4798 * @pdev: Pointer to PCI device
4799 *
4800 * Restart the card from scratch, as if from a cold-boot. Implementation
4801 * resembles the first-half of the e1000_resume routine.
4802 */
4803static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4804{
4805 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4806 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4807 struct e1000_hw *hw = &adapter->hw;
81250297 4808 int err;
9026729b 4809
81250297
TI		 4810 if (adapter->need_ioport)
4811 err = pci_enable_device(pdev);
4812 else
4813 err = pci_enable_device_mem(pdev);
4814 if (err) {
9026729b
AK		 4815 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4816 return PCI_ERS_RESULT_DISCONNECT;
4817 }
4818 pci_set_master(pdev);
4819
dbf38c94
LV		 4820 pci_enable_wake(pdev, PCI_D3hot, 0);
4821 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4822
9026729b 4823 e1000_reset(adapter);
1dc32918 4824 ew32(WUS, ~0);
9026729b
AK		 4825
4826 return PCI_ERS_RESULT_RECOVERED;
4827}
4828
4829/**
4830 * e1000_io_resume - called when traffic can start flowing again.
4831 * @pdev: Pointer to PCI device
4832 *
4833 * This callback is called when the error recovery driver tells us that
4834 * its OK to resume normal operation. Implementation resembles the
4835 * second-half of the e1000_resume routine.
4836 */
4837static void e1000_io_resume(struct pci_dev *pdev)
4838{
4839 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4840 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4841 struct e1000_hw *hw = &adapter->hw;
0fccd0e9
JG		 4842
4843 e1000_init_manageability(adapter);
9026729b
AK		 4844
4845 if (netif_running(netdev)) {
4846 if (e1000_up(adapter)) {
4847 printk("e1000: can't bring device back up after reset\n");
4848 return;
4849 }
4850 }
4851
4852 netif_device_attach(netdev);
4853
0fccd0e9
JG		 4854 /* If the controller is 82573 and f/w is AMT, do not set
4855 * DRV_LOAD until the interface is up. For all other cases,
4856 * let the f/w know that the h/w is now under the control
4857 * of the driver. */
1dc32918
JP		 4858 if (hw->mac_type != e1000_82573 ||
4859 !e1000_check_mng_mode(hw))
0fccd0e9 4860 e1000_get_hw_control(adapter);
9026729b 4861
9026729b
AK		 4862}
4863
1da177e4 4864/* e1000_main.c */
Linux kernel - Deliverables
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