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e1000: Add support for new hardware (ESB2)
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
2648345f 4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
31/* Change Log
73629bbc
JB		 32 * 6.3.9 12/16/2005
33 * o incorporate fix for recycled skbs from IBM LTC
34 * 6.3.7 11/18/2005
35 * o Honor eeprom setting for enabling/disabling Wake On Lan
36 * 6.3.5 11/17/2005
37 * o Fix memory leak in rx ring handling for PCI Express adapters
38 * 6.3.4 11/8/05
39 * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
40 * 6.3.2 9/20/05
41 * o Render logic that sets/resets DRV_LOAD as inline functions to
42 * avoid code replication. If f/w is AMT then set DRV_LOAD only when
43 * network interface is open.
44 * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
45 * o Adjust PBA partioning for Jumbo frames using MTU size and not
46 * rx_buffer_len
47 * 6.3.1 9/19/05
48 * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
49 (e1000_clean_tx_irq)
50 * o Support for 8086:10B5 device (Quad Port)
51 * 6.2.14 9/15/05
52 * o In AMT enabled configurations, set/reset DRV_LOAD bit on interface
53 * open/close
54 * 6.2.13 9/14/05
55 * o Invoke e1000_check_mng_mode only for 8257x controllers since it
56 * accesses the FWSM that is not supported in other controllers
57 * 6.2.12 9/9/05
58 * o Add support for device id E1000_DEV_ID_82546GB_QUAD_COPPER
59 * o set RCTL:SECRC only for controllers newer than 82543.
60 * o When the n/w interface comes down reset DRV_LOAD bit to notify f/w.
61 * This code was moved from e1000_remove to e1000_close
62 * 6.2.10 9/6/05
63 * o Fix error in updating RDT in el1000_alloc_rx_buffers[_ps] -- one off.
64 * o Enable fc by default on 82573 controllers (do not read eeprom)
65 * o Fix rx_errors statistic not to include missed_packet_count
66 * o Fix rx_dropped statistic not to include missed_packet_count
67 (Padraig Brady)
68 * 6.2.9 8/30/05
69 * o Remove call to update statistics from the controller ib e1000_get_stats
70 * 6.2.8 8/30/05
71 * o Improved algorithm for rx buffer allocation/rdt update
72 * o Flow control watermarks relative to rx PBA size
73 * o Simplified 'Tx Hung' detect logic
74 * 6.2.7 8/17/05
75 * o Report rx buffer allocation failures and tx timeout counts in stats
76 * 6.2.6 8/16/05
77 * o Implement workaround for controller erratum -- linear non-tso packet
78 * following a TSO gets written back prematurely
79 * 6.2.5 8/15/05
80 * o Set netdev->tx_queue_len based on link speed/duplex settings.
81 * o Fix net_stats.rx_fifo_errors <p@draigBrady.com>
82 * o Do not power off PHY if SoL/IDER session is active
83 * 6.2.4 8/10/05
84 * o Fix loopback test setup/cleanup for 82571/3 controllers
85 * o Fix parsing of outgoing packets (e1000_transfer_dhcp_info) to treat
86 * all packets as raw
87 * o Prevent operations that will cause the PHY to be reset if SoL/IDER
88 * sessions are active and log a message
89 * 6.2.2 7/21/05
90 * o used fixed size descriptors for all MTU sizes, reduces memory load
73629bbc
JB		 91 * 6.1.2 4/13/05
92 * o Fixed ethtool diagnostics
93 * o Enabled flow control to take default eeprom settings
94 * o Added stats_lock around e1000_read_phy_reg commands to avoid concurrent
95 * calls, one from mii_ioctl and other from within update_stats while
96 * processing MIIREG ioctl.
1da177e4
LT		 97 */
98
99char e1000_driver_name[] = "e1000";
3ad2cc67 100static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 101#ifndef CONFIG_E1000_NAPI
102#define DRIVERNAPI
103#else
104#define DRIVERNAPI "-NAPI"
105#endif
c1605eb3 106#define DRV_VERSION "7.0.33-k2"DRIVERNAPI
1da177e4 107char e1000_driver_version[] = DRV_VERSION;
3ad2cc67 108static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 109
110/* e1000_pci_tbl - PCI Device ID Table
111 *
112 * Last entry must be all 0s
113 *
114 * Macro expands to...
115 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
116 */
117static struct pci_device_id e1000_pci_tbl[] = {
118 INTEL_E1000_ETHERNET_DEVICE(0x1000),
119 INTEL_E1000_ETHERNET_DEVICE(0x1001),
120 INTEL_E1000_ETHERNET_DEVICE(0x1004),
121 INTEL_E1000_ETHERNET_DEVICE(0x1008),
122 INTEL_E1000_ETHERNET_DEVICE(0x1009),
123 INTEL_E1000_ETHERNET_DEVICE(0x100C),
124 INTEL_E1000_ETHERNET_DEVICE(0x100D),
125 INTEL_E1000_ETHERNET_DEVICE(0x100E),
126 INTEL_E1000_ETHERNET_DEVICE(0x100F),
127 INTEL_E1000_ETHERNET_DEVICE(0x1010),
128 INTEL_E1000_ETHERNET_DEVICE(0x1011),
129 INTEL_E1000_ETHERNET_DEVICE(0x1012),
130 INTEL_E1000_ETHERNET_DEVICE(0x1013),
131 INTEL_E1000_ETHERNET_DEVICE(0x1014),
132 INTEL_E1000_ETHERNET_DEVICE(0x1015),
133 INTEL_E1000_ETHERNET_DEVICE(0x1016),
134 INTEL_E1000_ETHERNET_DEVICE(0x1017),
135 INTEL_E1000_ETHERNET_DEVICE(0x1018),
136 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 137 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 138 INTEL_E1000_ETHERNET_DEVICE(0x101D),
139 INTEL_E1000_ETHERNET_DEVICE(0x101E),
140 INTEL_E1000_ETHERNET_DEVICE(0x1026),
141 INTEL_E1000_ETHERNET_DEVICE(0x1027),
142 INTEL_E1000_ETHERNET_DEVICE(0x1028),
07b8fede
MC		 143 INTEL_E1000_ETHERNET_DEVICE(0x105E),
144 INTEL_E1000_ETHERNET_DEVICE(0x105F),
145 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 146 INTEL_E1000_ETHERNET_DEVICE(0x1075),
147 INTEL_E1000_ETHERNET_DEVICE(0x1076),
148 INTEL_E1000_ETHERNET_DEVICE(0x1077),
149 INTEL_E1000_ETHERNET_DEVICE(0x1078),
150 INTEL_E1000_ETHERNET_DEVICE(0x1079),
151 INTEL_E1000_ETHERNET_DEVICE(0x107A),
152 INTEL_E1000_ETHERNET_DEVICE(0x107B),
153 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 154 INTEL_E1000_ETHERNET_DEVICE(0x107D),
155 INTEL_E1000_ETHERNET_DEVICE(0x107E),
156 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 157 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 158 INTEL_E1000_ETHERNET_DEVICE(0x108B),
159 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 160 INTEL_E1000_ETHERNET_DEVICE(0x1096),
161 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 162 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 163 INTEL_E1000_ETHERNET_DEVICE(0x109A),
b7ee49db 164 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 165 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
1da177e4
LT		 166 /* required last entry */
167 {0,}
168};
169
170MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
171
172int e1000_up(struct e1000_adapter *adapter);
173void e1000_down(struct e1000_adapter *adapter);
174void e1000_reset(struct e1000_adapter *adapter);
175int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
581d708e
MC		 176int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
177int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
178void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
179void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67
AB		 180static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
181 struct e1000_tx_ring *txdr);
182static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
183 struct e1000_rx_ring *rxdr);
184static void e1000_free_tx_resources(struct e1000_adapter *adapter,
185 struct e1000_tx_ring *tx_ring);
186static void e1000_free_rx_resources(struct e1000_adapter *adapter,
187 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 188void e1000_update_stats(struct e1000_adapter *adapter);
189
190/* Local Function Prototypes */
191
192static int e1000_init_module(void);
193static void e1000_exit_module(void);
194static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
195static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 196static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 197static int e1000_sw_init(struct e1000_adapter *adapter);
198static int e1000_open(struct net_device *netdev);
199static int e1000_close(struct net_device *netdev);
200static void e1000_configure_tx(struct e1000_adapter *adapter);
201static void e1000_configure_rx(struct e1000_adapter *adapter);
202static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 203static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
204static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
205static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
206 struct e1000_tx_ring *tx_ring);
207static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
208 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 209static void e1000_set_multi(struct net_device *netdev);
210static void e1000_update_phy_info(unsigned long data);
211static void e1000_watchdog(unsigned long data);
212static void e1000_watchdog_task(struct e1000_adapter *adapter);
213static void e1000_82547_tx_fifo_stall(unsigned long data);
214static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
215static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
216static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
217static int e1000_set_mac(struct net_device *netdev, void *p);
218static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 219static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
220 struct e1000_tx_ring *tx_ring);
1da177e4 221#ifdef CONFIG_E1000_NAPI
581d708e 222static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 223static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 224 struct e1000_rx_ring *rx_ring,
1da177e4 225 int *work_done, int work_to_do);
2d7edb92 226static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 227 struct e1000_rx_ring *rx_ring,
2d7edb92 228 int *work_done, int work_to_do);
1da177e4 229#else
581d708e
MC		 230static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
231 struct e1000_rx_ring *rx_ring);
232static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
233 struct e1000_rx_ring *rx_ring);
1da177e4 234#endif
581d708e 235static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 236 struct e1000_rx_ring *rx_ring,
237 int cleaned_count);
581d708e 238static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 239 struct e1000_rx_ring *rx_ring,
240 int cleaned_count);
1da177e4
LT		 241static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
242static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
243 int cmd);
244void e1000_set_ethtool_ops(struct net_device *netdev);
245static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
246static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
247static void e1000_tx_timeout(struct net_device *dev);
248static void e1000_tx_timeout_task(struct net_device *dev);
249static void e1000_smartspeed(struct e1000_adapter *adapter);
250static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
251 struct sk_buff *skb);
252
253static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
254static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
255static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
256static void e1000_restore_vlan(struct e1000_adapter *adapter);
257
1da177e4 258#ifdef CONFIG_PM
977e74b5 259static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 260static int e1000_resume(struct pci_dev *pdev);
261#endif
262
263#ifdef CONFIG_NET_POLL_CONTROLLER
264/* for netdump / net console */
265static void e1000_netpoll (struct net_device *netdev);
266#endif
267
24025e4e 268
1da177e4
LT		 269/* Exported from other modules */
270
271extern void e1000_check_options(struct e1000_adapter *adapter);
272
273static struct pci_driver e1000_driver = {
274 .name = e1000_driver_name,
275 .id_table = e1000_pci_tbl,
276 .probe = e1000_probe,
277 .remove = __devexit_p(e1000_remove),
278 /* Power Managment Hooks */
279#ifdef CONFIG_PM
280 .suspend = e1000_suspend,
281 .resume = e1000_resume
282#endif
283};
284
285MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
286MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
287MODULE_LICENSE("GPL");
288MODULE_VERSION(DRV_VERSION);
289
290static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
291module_param(debug, int, 0);
292MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
293
294/**
295 * e1000_init_module - Driver Registration Routine
296 *
297 * e1000_init_module is the first routine called when the driver is
298 * loaded. All it does is register with the PCI subsystem.
299 **/
300
301static int __init
302e1000_init_module(void)
303{
304 int ret;
305 printk(KERN_INFO "%s - version %s\n",
306 e1000_driver_string, e1000_driver_version);
307
308 printk(KERN_INFO "%s\n", e1000_copyright);
309
310 ret = pci_module_init(&e1000_driver);
8b378def 311
1da177e4
LT		 312 return ret;
313}
314
315module_init(e1000_init_module);
316
317/**
318 * e1000_exit_module - Driver Exit Cleanup Routine
319 *
320 * e1000_exit_module is called just before the driver is removed
321 * from memory.
322 **/
323
324static void __exit
325e1000_exit_module(void)
326{
1da177e4
LT		 327 pci_unregister_driver(&e1000_driver);
328}
329
330module_exit(e1000_exit_module);
331
332/**
333 * e1000_irq_disable - Mask off interrupt generation on the NIC
334 * @adapter: board private structure
335 **/
336
337static inline void
338e1000_irq_disable(struct e1000_adapter *adapter)
339{
340 atomic_inc(&adapter->irq_sem);
341 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
342 E1000_WRITE_FLUSH(&adapter->hw);
343 synchronize_irq(adapter->pdev->irq);
344}
345
346/**
347 * e1000_irq_enable - Enable default interrupt generation settings
348 * @adapter: board private structure
349 **/
350
351static inline void
352e1000_irq_enable(struct e1000_adapter *adapter)
353{
96838a40 354 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 355 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
356 E1000_WRITE_FLUSH(&adapter->hw);
357 }
358}
3ad2cc67
AB		 359
360static void
2d7edb92
MC		 361e1000_update_mng_vlan(struct e1000_adapter *adapter)
362{
363 struct net_device *netdev = adapter->netdev;
364 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
365 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 366 if (adapter->vlgrp) {
367 if (!adapter->vlgrp->vlan_devices[vid]) {
368 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 369 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
370 e1000_vlan_rx_add_vid(netdev, vid);
371 adapter->mng_vlan_id = vid;
372 } else
373 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 374
375 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
376 (vid != old_vid) &&
2d7edb92
MC		 377 !adapter->vlgrp->vlan_devices[old_vid])
378 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 379 } else
380 adapter->mng_vlan_id = vid;
2d7edb92
MC		 381 }
382}
b55ccb35
JK		 383
384/**
385 * e1000_release_hw_control - release control of the h/w to f/w
386 * @adapter: address of board private structure
387 *
388 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
389 * For ASF and Pass Through versions of f/w this means that the
390 * driver is no longer loaded. For AMT version (only with 82573) i
391 * of the f/w this means that the netowrk i/f is closed.
392 *
393 **/
394
395static inline void
396e1000_release_hw_control(struct e1000_adapter *adapter)
397{
398 uint32_t ctrl_ext;
399 uint32_t swsm;
400
401 /* Let firmware taken over control of h/w */
402 switch (adapter->hw.mac_type) {
403 case e1000_82571:
404 case e1000_82572:
405 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
406 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
407 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
408 break;
409 case e1000_82573:
410 swsm = E1000_READ_REG(&adapter->hw, SWSM);
411 E1000_WRITE_REG(&adapter->hw, SWSM,
412 swsm & ~E1000_SWSM_DRV_LOAD);
413 default:
414 break;
415 }
416}
417
418/**
419 * e1000_get_hw_control - get control of the h/w from f/w
420 * @adapter: address of board private structure
421 *
422 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
423 * For ASF and Pass Through versions of f/w this means that
424 * the driver is loaded. For AMT version (only with 82573)
425 * of the f/w this means that the netowrk i/f is open.
426 *
427 **/
428
429static inline void
430e1000_get_hw_control(struct e1000_adapter *adapter)
431{
432 uint32_t ctrl_ext;
433 uint32_t swsm;
434 /* Let firmware know the driver has taken over */
435 switch (adapter->hw.mac_type) {
436 case e1000_82571:
437 case e1000_82572:
438 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
439 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
440 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
441 break;
442 case e1000_82573:
443 swsm = E1000_READ_REG(&adapter->hw, SWSM);
444 E1000_WRITE_REG(&adapter->hw, SWSM,
445 swsm | E1000_SWSM_DRV_LOAD);
446 break;
447 default:
448 break;
449 }
450}
451
1da177e4
LT		 452int
453e1000_up(struct e1000_adapter *adapter)
454{
455 struct net_device *netdev = adapter->netdev;
581d708e 456 int i, err;
1da177e4
LT		 457
458 /* hardware has been reset, we need to reload some things */
459
460 /* Reset the PHY if it was previously powered down */
96838a40 461 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 462 uint16_t mii_reg;
463 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
96838a40 464 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4
LT		 465 e1000_phy_reset(&adapter->hw);
466 }
467
468 e1000_set_multi(netdev);
469
470 e1000_restore_vlan(adapter);
471
472 e1000_configure_tx(adapter);
473 e1000_setup_rctl(adapter);
474 e1000_configure_rx(adapter);
72d64a43
JK		 475 /* call E1000_DESC_UNUSED which always leaves
476 * at least 1 descriptor unused to make sure
477 * next_to_use != next_to_clean */
f56799ea 478 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 479 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 480 adapter->alloc_rx_buf(adapter, ring,
481 E1000_DESC_UNUSED(ring));
f56799ea 482 }
1da177e4 483
fa4f7ef3 484#ifdef CONFIG_PCI_MSI
96838a40 485 if (adapter->hw.mac_type > e1000_82547_rev_2) {
fa4f7ef3 486 adapter->have_msi = TRUE;
96838a40 487 if ((err = pci_enable_msi(adapter->pdev))) {
fa4f7ef3
MC		 488 DPRINTK(PROBE, ERR,
489 "Unable to allocate MSI interrupt Error: %d\n", err);
490 adapter->have_msi = FALSE;
491 }
492 }
493#endif
96838a40 494 if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
1da177e4 495 SA_SHIRQ | SA_SAMPLE_RANDOM,
2648345f
MC		 496 netdev->name, netdev))) {
497 DPRINTK(PROBE, ERR,
498 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 499 return err;
2648345f 500 }
1da177e4 501
7bfa4816
JK		 502 adapter->tx_queue_len = netdev->tx_queue_len;
503
1da177e4 504 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 505
506#ifdef CONFIG_E1000_NAPI
507 netif_poll_enable(netdev);
508#endif
5de55624
MC		 509 e1000_irq_enable(adapter);
510
1da177e4
LT		 511 return 0;
512}
513
514void
515e1000_down(struct e1000_adapter *adapter)
516{
517 struct net_device *netdev = adapter->netdev;
57128197
JK		 518 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
519 e1000_check_mng_mode(&adapter->hw);
1da177e4
LT		 520
521 e1000_irq_disable(adapter);
c1605eb3 522
1da177e4 523 free_irq(adapter->pdev->irq, netdev);
fa4f7ef3 524#ifdef CONFIG_PCI_MSI
96838a40 525 if (adapter->hw.mac_type > e1000_82547_rev_2 &&
fa4f7ef3
MC		 526 adapter->have_msi == TRUE)
527 pci_disable_msi(adapter->pdev);
528#endif
1da177e4
LT		 529 del_timer_sync(&adapter->tx_fifo_stall_timer);
530 del_timer_sync(&adapter->watchdog_timer);
531 del_timer_sync(&adapter->phy_info_timer);
532
533#ifdef CONFIG_E1000_NAPI
534 netif_poll_disable(netdev);
535#endif
7bfa4816 536 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 537 adapter->link_speed = 0;
538 adapter->link_duplex = 0;
539 netif_carrier_off(netdev);
540 netif_stop_queue(netdev);
541
542 e1000_reset(adapter);
581d708e
MC		 543 e1000_clean_all_tx_rings(adapter);
544 e1000_clean_all_rx_rings(adapter);
1da177e4 545
57128197
JK		 546 /* Power down the PHY so no link is implied when interface is down *
547 * The PHY cannot be powered down if any of the following is TRUE *
548 * (a) WoL is enabled
549 * (b) AMT is active
550 * (c) SoL/IDER session is active */
551 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
2d7edb92 552 adapter->hw.media_type == e1000_media_type_copper &&
57128197
JK		 553 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
554 !mng_mode_enabled &&
555 !e1000_check_phy_reset_block(&adapter->hw)) {
1da177e4
LT		 556 uint16_t mii_reg;
557 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
558 mii_reg |= MII_CR_POWER_DOWN;
559 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
4e48a2b9 560 mdelay(1);
1da177e4
LT		 561 }
562}
563
564void
565e1000_reset(struct e1000_adapter *adapter)
566{
2d7edb92 567 uint32_t pba, manc;
1125ecbc 568 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 569
570 /* Repartition Pba for greater than 9k mtu
571 * To take effect CTRL.RST is required.
572 */
573
2d7edb92
MC		 574 switch (adapter->hw.mac_type) {
575 case e1000_82547:
0e6ef3e0 576 case e1000_82547_rev_2:
2d7edb92
MC		 577 pba = E1000_PBA_30K;
578 break;
868d5309
MC		 579 case e1000_82571:
580 case e1000_82572:
6418ecc6 581 case e1000_80003es2lan:
868d5309
MC		 582 pba = E1000_PBA_38K;
583 break;
2d7edb92
MC		 584 case e1000_82573:
585 pba = E1000_PBA_12K;
586 break;
587 default:
588 pba = E1000_PBA_48K;
589 break;
590 }
591
96838a40 592 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 593 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 594 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 595
596
96838a40 597 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 598 adapter->tx_fifo_head = 0;
599 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
600 adapter->tx_fifo_size =
601 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
602 atomic_set(&adapter->tx_fifo_stall, 0);
603 }
2d7edb92 604
1da177e4
LT		 605 E1000_WRITE_REG(&adapter->hw, PBA, pba);
606
607 /* flow control settings */
f11b7f85
JK		 608 /* Set the FC high water mark to 90% of the FIFO size.
609 * Required to clear last 3 LSB */
610 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
611
612 adapter->hw.fc_high_water = fc_high_water_mark;
613 adapter->hw.fc_low_water = fc_high_water_mark - 8;
1da177e4
LT		 614 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
615 adapter->hw.fc_send_xon = 1;
616 adapter->hw.fc = adapter->hw.original_fc;
617
2d7edb92 618 /* Allow time for pending master requests to run */
1da177e4 619 e1000_reset_hw(&adapter->hw);
96838a40 620 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 621 E1000_WRITE_REG(&adapter->hw, WUC, 0);
96838a40 622 if (e1000_init_hw(&adapter->hw))
1da177e4 623 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 624 e1000_update_mng_vlan(adapter);
1da177e4
LT		 625 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
626 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
627
628 e1000_reset_adaptive(&adapter->hw);
629 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2d7edb92
MC		 630 if (adapter->en_mng_pt) {
631 manc = E1000_READ_REG(&adapter->hw, MANC);
632 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
633 E1000_WRITE_REG(&adapter->hw, MANC, manc);
634 }
1da177e4
LT		 635}
636
637/**
638 * e1000_probe - Device Initialization Routine
639 * @pdev: PCI device information struct
640 * @ent: entry in e1000_pci_tbl
641 *
642 * Returns 0 on success, negative on failure
643 *
644 * e1000_probe initializes an adapter identified by a pci_dev structure.
645 * The OS initialization, configuring of the adapter private structure,
646 * and a hardware reset occur.
647 **/
648
649static int __devinit
650e1000_probe(struct pci_dev *pdev,
651 const struct pci_device_id *ent)
652{
653 struct net_device *netdev;
654 struct e1000_adapter *adapter;
2d7edb92 655 unsigned long mmio_start, mmio_len;
2d7edb92 656
1da177e4 657 static int cards_found = 0;
84916829 658 static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
2d7edb92 659 int i, err, pci_using_dac;
1da177e4
LT		 660 uint16_t eeprom_data;
661 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 662 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 663 return err;
664
96838a40 665 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 666 pci_using_dac = 1;
667 } else {
96838a40 668 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4
LT		 669 E1000_ERR("No usable DMA configuration, aborting\n");
670 return err;
671 }
672 pci_using_dac = 0;
673 }
674
96838a40 675 if ((err = pci_request_regions(pdev, e1000_driver_name)))
1da177e4
LT		 676 return err;
677
678 pci_set_master(pdev);
679
680 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
96838a40 681 if (!netdev) {
1da177e4
LT		 682 err = -ENOMEM;
683 goto err_alloc_etherdev;
684 }
685
686 SET_MODULE_OWNER(netdev);
687 SET_NETDEV_DEV(netdev, &pdev->dev);
688
689 pci_set_drvdata(pdev, netdev);
60490fe0 690 adapter = netdev_priv(netdev);
1da177e4
LT		 691 adapter->netdev = netdev;
692 adapter->pdev = pdev;
693 adapter->hw.back = adapter;
694 adapter->msg_enable = (1 << debug) - 1;
695
696 mmio_start = pci_resource_start(pdev, BAR_0);
697 mmio_len = pci_resource_len(pdev, BAR_0);
698
699 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
96838a40 700 if (!adapter->hw.hw_addr) {
1da177e4
LT		 701 err = -EIO;
702 goto err_ioremap;
703 }
704
96838a40
JB		 705 for (i = BAR_1; i <= BAR_5; i++) {
706 if (pci_resource_len(pdev, i) == 0)
1da177e4 707 continue;
96838a40 708 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 709 adapter->hw.io_base = pci_resource_start(pdev, i);
710 break;
711 }
712 }
713
714 netdev->open = &e1000_open;
715 netdev->stop = &e1000_close;
716 netdev->hard_start_xmit = &e1000_xmit_frame;
717 netdev->get_stats = &e1000_get_stats;
718 netdev->set_multicast_list = &e1000_set_multi;
719 netdev->set_mac_address = &e1000_set_mac;
720 netdev->change_mtu = &e1000_change_mtu;
721 netdev->do_ioctl = &e1000_ioctl;
722 e1000_set_ethtool_ops(netdev);
723 netdev->tx_timeout = &e1000_tx_timeout;
724 netdev->watchdog_timeo = 5 * HZ;
725#ifdef CONFIG_E1000_NAPI
726 netdev->poll = &e1000_clean;
727 netdev->weight = 64;
728#endif
729 netdev->vlan_rx_register = e1000_vlan_rx_register;
730 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
731 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
732#ifdef CONFIG_NET_POLL_CONTROLLER
733 netdev->poll_controller = e1000_netpoll;
734#endif
735 strcpy(netdev->name, pci_name(pdev));
736
737 netdev->mem_start = mmio_start;
738 netdev->mem_end = mmio_start + mmio_len;
739 netdev->base_addr = adapter->hw.io_base;
740
741 adapter->bd_number = cards_found;
742
743 /* setup the private structure */
744
96838a40 745 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 746 goto err_sw_init;
747
96838a40 748 if ((err = e1000_check_phy_reset_block(&adapter->hw)))
2d7edb92
MC		 749 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
750
84916829
JK		 751 /* if ksp3, indicate if it's port a being setup */
752 if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
753 e1000_ksp3_port_a == 0)
754 adapter->ksp3_port_a = 1;
755 e1000_ksp3_port_a++;
756 /* Reset for multiple KP3 adapters */
757 if (e1000_ksp3_port_a == 4)
758 e1000_ksp3_port_a = 0;
759
96838a40 760 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 761 netdev->features = NETIF_F_SG |
762 NETIF_F_HW_CSUM |
763 NETIF_F_HW_VLAN_TX |
764 NETIF_F_HW_VLAN_RX |
765 NETIF_F_HW_VLAN_FILTER;
766 }
767
768#ifdef NETIF_F_TSO
96838a40 769 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 770 (adapter->hw.mac_type != e1000_82547))
771 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 772
773#ifdef NETIF_F_TSO_IPV6
96838a40 774 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 775 netdev->features |= NETIF_F_TSO_IPV6;
776#endif
1da177e4 777#endif
96838a40 778 if (pci_using_dac)
1da177e4
LT		 779 netdev->features |= NETIF_F_HIGHDMA;
780
781 /* hard_start_xmit is safe against parallel locking */
782 netdev->features |= NETIF_F_LLTX;
783
2d7edb92
MC		 784 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
785
96838a40 786 /* before reading the EEPROM, reset the controller to
1da177e4 787 * put the device in a known good starting state */
96838a40 788
1da177e4
LT		 789 e1000_reset_hw(&adapter->hw);
790
791 /* make sure the EEPROM is good */
792
96838a40 793 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4
LT		 794 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
795 err = -EIO;
796 goto err_eeprom;
797 }
798
799 /* copy the MAC address out of the EEPROM */
800
96838a40 801 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 802 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
803 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 804 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 805
96838a40 806 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 807 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
808 err = -EIO;
809 goto err_eeprom;
810 }
811
812 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
813
814 e1000_get_bus_info(&adapter->hw);
815
816 init_timer(&adapter->tx_fifo_stall_timer);
817 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
818 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
819
820 init_timer(&adapter->watchdog_timer);
821 adapter->watchdog_timer.function = &e1000_watchdog;
822 adapter->watchdog_timer.data = (unsigned long) adapter;
823
824 INIT_WORK(&adapter->watchdog_task,
825 (void (*)(void *))e1000_watchdog_task, adapter);
826
827 init_timer(&adapter->phy_info_timer);
828 adapter->phy_info_timer.function = &e1000_update_phy_info;
829 adapter->phy_info_timer.data = (unsigned long) adapter;
830
831 INIT_WORK(&adapter->tx_timeout_task,
832 (void (*)(void *))e1000_tx_timeout_task, netdev);
833
834 /* we're going to reset, so assume we have no link for now */
835
836 netif_carrier_off(netdev);
837 netif_stop_queue(netdev);
838
839 e1000_check_options(adapter);
840
841 /* Initial Wake on LAN setting
842 * If APM wake is enabled in the EEPROM,
843 * enable the ACPI Magic Packet filter
844 */
845
96838a40 846 switch (adapter->hw.mac_type) {
1da177e4
LT		 847 case e1000_82542_rev2_0:
848 case e1000_82542_rev2_1:
849 case e1000_82543:
850 break;
851 case e1000_82544:
852 e1000_read_eeprom(&adapter->hw,
853 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
854 eeprom_apme_mask = E1000_EEPROM_82544_APM;
855 break;
856 case e1000_82546:
857 case e1000_82546_rev_3:
fd803241 858 case e1000_82571:
6418ecc6 859 case e1000_80003es2lan:
96838a40 860 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 861 e1000_read_eeprom(&adapter->hw,
862 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
863 break;
864 }
865 /* Fall Through */
866 default:
867 e1000_read_eeprom(&adapter->hw,
868 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
869 break;
870 }
96838a40 871 if (eeprom_data & eeprom_apme_mask)
1da177e4
LT		 872 adapter->wol |= E1000_WUFC_MAG;
873
fb3d47d4
JK		 874 /* print bus type/speed/width info */
875 {
876 struct e1000_hw *hw = &adapter->hw;
877 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
878 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
879 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
880 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
881 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
882 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
883 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
884 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
885 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
886 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
887 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
888 "32-bit"));
889 }
890
891 for (i = 0; i < 6; i++)
892 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
893
1da177e4
LT		 894 /* reset the hardware with the new settings */
895 e1000_reset(adapter);
896
b55ccb35
JK		 897 /* If the controller is 82573 and f/w is AMT, do not set
898 * DRV_LOAD until the interface is up. For all other cases,
899 * let the f/w know that the h/w is now under the control
900 * of the driver. */
901 if (adapter->hw.mac_type != e1000_82573 ||
902 !e1000_check_mng_mode(&adapter->hw))
903 e1000_get_hw_control(adapter);
2d7edb92 904
1da177e4 905 strcpy(netdev->name, "eth%d");
96838a40 906 if ((err = register_netdev(netdev)))
1da177e4
LT		 907 goto err_register;
908
909 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
910
911 cards_found++;
912 return 0;
913
914err_register:
915err_sw_init:
916err_eeprom:
917 iounmap(adapter->hw.hw_addr);
918err_ioremap:
919 free_netdev(netdev);
920err_alloc_etherdev:
921 pci_release_regions(pdev);
922 return err;
923}
924
925/**
926 * e1000_remove - Device Removal Routine
927 * @pdev: PCI device information struct
928 *
929 * e1000_remove is called by the PCI subsystem to alert the driver
930 * that it should release a PCI device. The could be caused by a
931 * Hot-Plug event, or because the driver is going to be removed from
932 * memory.
933 **/
934
935static void __devexit
936e1000_remove(struct pci_dev *pdev)
937{
938 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 939 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 940 uint32_t manc;
581d708e
MC		 941#ifdef CONFIG_E1000_NAPI
942 int i;
943#endif
1da177e4 944
be2b28ed
JG		 945 flush_scheduled_work();
946
96838a40 947 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 948 adapter->hw.media_type == e1000_media_type_copper) {
949 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 950 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 951 manc |= E1000_MANC_ARP_EN;
952 E1000_WRITE_REG(&adapter->hw, MANC, manc);
953 }
954 }
955
b55ccb35
JK		 956 /* Release control of h/w to f/w. If f/w is AMT enabled, this
957 * would have already happened in close and is redundant. */
958 e1000_release_hw_control(adapter);
2d7edb92 959
1da177e4 960 unregister_netdev(netdev);
581d708e 961#ifdef CONFIG_E1000_NAPI
f56799ea 962 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 963 __dev_put(&adapter->polling_netdev[i]);
964#endif
1da177e4 965
96838a40 966 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 967 e1000_phy_hw_reset(&adapter->hw);
1da177e4 968
24025e4e
MC		 969 kfree(adapter->tx_ring);
970 kfree(adapter->rx_ring);
971#ifdef CONFIG_E1000_NAPI
972 kfree(adapter->polling_netdev);
973#endif
974
1da177e4
LT		 975 iounmap(adapter->hw.hw_addr);
976 pci_release_regions(pdev);
977
978 free_netdev(netdev);
979
980 pci_disable_device(pdev);
981}
982
983/**
984 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
985 * @adapter: board private structure to initialize
986 *
987 * e1000_sw_init initializes the Adapter private data structure.
988 * Fields are initialized based on PCI device information and
989 * OS network device settings (MTU size).
990 **/
991
992static int __devinit
993e1000_sw_init(struct e1000_adapter *adapter)
994{
995 struct e1000_hw *hw = &adapter->hw;
996 struct net_device *netdev = adapter->netdev;
997 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 998#ifdef CONFIG_E1000_NAPI
999 int i;
1000#endif
1da177e4
LT		 1001
1002 /* PCI config space info */
1003
1004 hw->vendor_id = pdev->vendor;
1005 hw->device_id = pdev->device;
1006 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1007 hw->subsystem_id = pdev->subsystem_device;
1008
1009 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1010
1011 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1012
1013 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
2d7edb92 1014 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
1da177e4
LT		 1015 hw->max_frame_size = netdev->mtu +
1016 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1017 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1018
1019 /* identify the MAC */
1020
96838a40 1021 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1022 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1023 return -EIO;
1024 }
1025
1026 /* initialize eeprom parameters */
1027
96838a40 1028 if (e1000_init_eeprom_params(hw)) {
2d7edb92
MC		 1029 E1000_ERR("EEPROM initialization failed\n");
1030 return -EIO;
1031 }
1da177e4 1032
96838a40 1033 switch (hw->mac_type) {
1da177e4
LT		 1034 default:
1035 break;
1036 case e1000_82541:
1037 case e1000_82547:
1038 case e1000_82541_rev_2:
1039 case e1000_82547_rev_2:
1040 hw->phy_init_script = 1;
1041 break;
1042 }
1043
1044 e1000_set_media_type(hw);
1045
1046 hw->wait_autoneg_complete = FALSE;
1047 hw->tbi_compatibility_en = TRUE;
1048 hw->adaptive_ifs = TRUE;
1049
1050 /* Copper options */
1051
96838a40 1052 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1053 hw->mdix = AUTO_ALL_MODES;
1054 hw->disable_polarity_correction = FALSE;
1055 hw->master_slave = E1000_MASTER_SLAVE;
1056 }
1057
f56799ea
JK		 1058 adapter->num_tx_queues = 1;
1059 adapter->num_rx_queues = 1;
581d708e
MC		 1060
1061 if (e1000_alloc_queues(adapter)) {
1062 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1063 return -ENOMEM;
1064 }
1065
1066#ifdef CONFIG_E1000_NAPI
f56799ea 1067 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1068 adapter->polling_netdev[i].priv = adapter;
1069 adapter->polling_netdev[i].poll = &e1000_clean;
1070 adapter->polling_netdev[i].weight = 64;
1071 dev_hold(&adapter->polling_netdev[i]);
1072 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1073 }
7bfa4816 1074 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1075#endif
1076
1da177e4
LT		 1077 atomic_set(&adapter->irq_sem, 1);
1078 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1079
1080 return 0;
1081}
1082
581d708e
MC		 1083/**
1084 * e1000_alloc_queues - Allocate memory for all rings
1085 * @adapter: board private structure to initialize
1086 *
1087 * We allocate one ring per queue at run-time since we don't know the
1088 * number of queues at compile-time. The polling_netdev array is
1089 * intended for Multiqueue, but should work fine with a single queue.
1090 **/
1091
1092static int __devinit
1093e1000_alloc_queues(struct e1000_adapter *adapter)
1094{
1095 int size;
1096
f56799ea 1097 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1098 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1099 if (!adapter->tx_ring)
1100 return -ENOMEM;
1101 memset(adapter->tx_ring, 0, size);
1102
f56799ea 1103 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1104 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1105 if (!adapter->rx_ring) {
1106 kfree(adapter->tx_ring);
1107 return -ENOMEM;
1108 }
1109 memset(adapter->rx_ring, 0, size);
1110
1111#ifdef CONFIG_E1000_NAPI
f56799ea 1112 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1113 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1114 if (!adapter->polling_netdev) {
1115 kfree(adapter->tx_ring);
1116 kfree(adapter->rx_ring);
1117 return -ENOMEM;
1118 }
1119 memset(adapter->polling_netdev, 0, size);
1120#endif
1121
1122 return E1000_SUCCESS;
1123}
1124
1da177e4
LT		 1125/**
1126 * e1000_open - Called when a network interface is made active
1127 * @netdev: network interface device structure
1128 *
1129 * Returns 0 on success, negative value on failure
1130 *
1131 * The open entry point is called when a network interface is made
1132 * active by the system (IFF_UP). At this point all resources needed
1133 * for transmit and receive operations are allocated, the interrupt
1134 * handler is registered with the OS, the watchdog timer is started,
1135 * and the stack is notified that the interface is ready.
1136 **/
1137
1138static int
1139e1000_open(struct net_device *netdev)
1140{
60490fe0 1141 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1142 int err;
1143
1144 /* allocate transmit descriptors */
1145
581d708e 1146 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1147 goto err_setup_tx;
1148
1149 /* allocate receive descriptors */
1150
581d708e 1151 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1152 goto err_setup_rx;
1153
96838a40 1154 if ((err = e1000_up(adapter)))
1da177e4 1155 goto err_up;
2d7edb92 1156 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1157 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1158 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1159 e1000_update_mng_vlan(adapter);
1160 }
1da177e4 1161
b55ccb35
JK		 1162 /* If AMT is enabled, let the firmware know that the network
1163 * interface is now open */
1164 if (adapter->hw.mac_type == e1000_82573 &&
1165 e1000_check_mng_mode(&adapter->hw))
1166 e1000_get_hw_control(adapter);
1167
1da177e4
LT		 1168 return E1000_SUCCESS;
1169
1170err_up:
581d708e 1171 e1000_free_all_rx_resources(adapter);
1da177e4 1172err_setup_rx:
581d708e 1173 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1174err_setup_tx:
1175 e1000_reset(adapter);
1176
1177 return err;
1178}
1179
1180/**
1181 * e1000_close - Disables a network interface
1182 * @netdev: network interface device structure
1183 *
1184 * Returns 0, this is not allowed to fail
1185 *
1186 * The close entry point is called when an interface is de-activated
1187 * by the OS. The hardware is still under the drivers control, but
1188 * needs to be disabled. A global MAC reset is issued to stop the
1189 * hardware, and all transmit and receive resources are freed.
1190 **/
1191
1192static int
1193e1000_close(struct net_device *netdev)
1194{
60490fe0 1195 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1196
1197 e1000_down(adapter);
1198
581d708e
MC		 1199 e1000_free_all_tx_resources(adapter);
1200 e1000_free_all_rx_resources(adapter);
1da177e4 1201
96838a40 1202 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1203 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1204 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1205 }
b55ccb35
JK		 1206
1207 /* If AMT is enabled, let the firmware know that the network
1208 * interface is now closed */
1209 if (adapter->hw.mac_type == e1000_82573 &&
1210 e1000_check_mng_mode(&adapter->hw))
1211 e1000_release_hw_control(adapter);
1212
1da177e4
LT		 1213 return 0;
1214}
1215
1216/**
1217 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1218 * @adapter: address of board private structure
2d7edb92
MC		 1219 * @start: address of beginning of memory
1220 * @len: length of memory
1da177e4
LT		 1221 **/
1222static inline boolean_t
1223e1000_check_64k_bound(struct e1000_adapter *adapter,
1224 void *start, unsigned long len)
1225{
1226 unsigned long begin = (unsigned long) start;
1227 unsigned long end = begin + len;
1228
2648345f
MC		 1229 /* First rev 82545 and 82546 need to not allow any memory
1230 * write location to cross 64k boundary due to errata 23 */
1da177e4 1231 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1232 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1233 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1234 }
1235
1236 return TRUE;
1237}
1238
1239/**
1240 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1241 * @adapter: board private structure
581d708e 1242 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1243 *
1244 * Return 0 on success, negative on failure
1245 **/
1246
3ad2cc67 1247static int
581d708e
MC		 1248e1000_setup_tx_resources(struct e1000_adapter *adapter,
1249 struct e1000_tx_ring *txdr)
1da177e4 1250{
1da177e4
LT		 1251 struct pci_dev *pdev = adapter->pdev;
1252 int size;
1253
1254 size = sizeof(struct e1000_buffer) * txdr->count;
a7ec15da
RT		 1255
1256 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
96838a40 1257 if (!txdr->buffer_info) {
2648345f
MC		 1258 DPRINTK(PROBE, ERR,
1259 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1260 return -ENOMEM;
1261 }
1262 memset(txdr->buffer_info, 0, size);
1263
1264 /* round up to nearest 4K */
1265
1266 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1267 E1000_ROUNDUP(txdr->size, 4096);
1268
1269 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1270 if (!txdr->desc) {
1da177e4 1271setup_tx_desc_die:
1da177e4 1272 vfree(txdr->buffer_info);
2648345f
MC		 1273 DPRINTK(PROBE, ERR,
1274 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1275 return -ENOMEM;
1276 }
1277
2648345f 1278 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1279 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1280 void *olddesc = txdr->desc;
1281 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1282 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1283 "at %p\n", txdr->size, txdr->desc);
1284 /* Try again, without freeing the previous */
1da177e4 1285 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1286 /* Failed allocation, critical failure */
96838a40 1287 if (!txdr->desc) {
1da177e4
LT		 1288 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1289 goto setup_tx_desc_die;
1290 }
1291
1292 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1293 /* give up */
2648345f
MC		 1294 pci_free_consistent(pdev, txdr->size, txdr->desc,
1295 txdr->dma);
1da177e4
LT		 1296 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1297 DPRINTK(PROBE, ERR,
2648345f
MC		 1298 "Unable to allocate aligned memory "
1299 "for the transmit descriptor ring\n");
1da177e4
LT		 1300 vfree(txdr->buffer_info);
1301 return -ENOMEM;
1302 } else {
2648345f 1303 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1304 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1305 }
1306 }
1307 memset(txdr->desc, 0, txdr->size);
1308
1309 txdr->next_to_use = 0;
1310 txdr->next_to_clean = 0;
2ae76d98 1311 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1312
1313 return 0;
1314}
1315
581d708e
MC		 1316/**
1317 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1318 * (Descriptors) for all queues
1319 * @adapter: board private structure
1320 *
1321 * If this function returns with an error, then it's possible one or
1322 * more of the rings is populated (while the rest are not). It is the
1323 * callers duty to clean those orphaned rings.
1324 *
1325 * Return 0 on success, negative on failure
1326 **/
1327
1328int
1329e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1330{
1331 int i, err = 0;
1332
f56799ea 1333 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1334 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1335 if (err) {
1336 DPRINTK(PROBE, ERR,
1337 "Allocation for Tx Queue %u failed\n", i);
1338 break;
1339 }
1340 }
1341
1342 return err;
1343}
1344
1da177e4
LT		 1345/**
1346 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1347 * @adapter: board private structure
1348 *
1349 * Configure the Tx unit of the MAC after a reset.
1350 **/
1351
1352static void
1353e1000_configure_tx(struct e1000_adapter *adapter)
1354{
581d708e
MC		 1355 uint64_t tdba;
1356 struct e1000_hw *hw = &adapter->hw;
1357 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1358 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1359
1360 /* Setup the HW Tx Head and Tail descriptor pointers */
1361
f56799ea 1362 switch (adapter->num_tx_queues) {
24025e4e
MC		 1363 case 1:
1364 default:
581d708e
MC		 1365 tdba = adapter->tx_ring[0].dma;
1366 tdlen = adapter->tx_ring[0].count *
1367 sizeof(struct e1000_tx_desc);
1368 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1369 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1370 E1000_WRITE_REG(hw, TDLEN, tdlen);
1371 E1000_WRITE_REG(hw, TDH, 0);
1372 E1000_WRITE_REG(hw, TDT, 0);
1373 adapter->tx_ring[0].tdh = E1000_TDH;
1374 adapter->tx_ring[0].tdt = E1000_TDT;
24025e4e
MC		 1375 break;
1376 }
1da177e4
LT		 1377
1378 /* Set the default values for the Tx Inter Packet Gap timer */
1379
0fadb059
JK		 1380 if (hw->media_type == e1000_media_type_fiber ||
1381 hw->media_type == e1000_media_type_internal_serdes)
1382 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1383 else
1384 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1385
581d708e 1386 switch (hw->mac_type) {
1da177e4
LT		 1387 case e1000_82542_rev2_0:
1388 case e1000_82542_rev2_1:
1389 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1390 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1391 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1392 break;
1393 default:
0fadb059
JK		 1394 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1395 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1396 break;
1da177e4 1397 }
0fadb059
JK		 1398 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1399 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1400 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1401
1402 /* Set the Tx Interrupt Delay register */
1403
581d708e
MC		 1404 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1405 if (hw->mac_type >= e1000_82540)
1406 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1407
1408 /* Program the Transmit Control Register */
1409
581d708e 1410 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1411
1412 tctl &= ~E1000_TCTL_CT;
7e6c9861 1413 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1414 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1415
7e6c9861
JK		 1416#ifdef DISABLE_MULR
1417 /* disable Multiple Reads for debugging */
1418 tctl &= ~E1000_TCTL_MULR;
1419#endif
1da177e4 1420
2ae76d98
MC		 1421 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1422 tarc = E1000_READ_REG(hw, TARC0);
1423 tarc |= ((1 << 25) | (1 << 21));
1424 E1000_WRITE_REG(hw, TARC0, tarc);
1425 tarc = E1000_READ_REG(hw, TARC1);
1426 tarc |= (1 << 25);
1427 if (tctl & E1000_TCTL_MULR)
1428 tarc &= ~(1 << 28);
1429 else
1430 tarc |= (1 << 28);
1431 E1000_WRITE_REG(hw, TARC1, tarc);
1432 }
1433
581d708e 1434 e1000_config_collision_dist(hw);
1da177e4
LT		 1435
1436 /* Setup Transmit Descriptor Settings for eop descriptor */
1437 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1438 E1000_TXD_CMD_IFCS;
1439
581d708e 1440 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1441 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1442 else
1443 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1444
1445 /* Cache if we're 82544 running in PCI-X because we'll
1446 * need this to apply a workaround later in the send path. */
581d708e
MC		 1447 if (hw->mac_type == e1000_82544 &&
1448 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1449 adapter->pcix_82544 = 1;
7e6c9861
JK		 1450
1451 E1000_WRITE_REG(hw, TCTL, tctl);
1452
1da177e4
LT		 1453}
1454
1455/**
1456 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1457 * @adapter: board private structure
581d708e 1458 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1459 *
1460 * Returns 0 on success, negative on failure
1461 **/
1462
3ad2cc67 1463static int
581d708e
MC		 1464e1000_setup_rx_resources(struct e1000_adapter *adapter,
1465 struct e1000_rx_ring *rxdr)
1da177e4 1466{
1da177e4 1467 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1468 int size, desc_len;
1da177e4
LT		 1469
1470 size = sizeof(struct e1000_buffer) * rxdr->count;
a7ec15da 1471 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
581d708e 1472 if (!rxdr->buffer_info) {
2648345f
MC		 1473 DPRINTK(PROBE, ERR,
1474 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1475 return -ENOMEM;
1476 }
1477 memset(rxdr->buffer_info, 0, size);
1478
2d7edb92
MC		 1479 size = sizeof(struct e1000_ps_page) * rxdr->count;
1480 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1481 if (!rxdr->ps_page) {
2d7edb92
MC		 1482 vfree(rxdr->buffer_info);
1483 DPRINTK(PROBE, ERR,
1484 "Unable to allocate memory for the receive descriptor ring\n");
1485 return -ENOMEM;
1486 }
1487 memset(rxdr->ps_page, 0, size);
1488
1489 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1490 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1491 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1492 vfree(rxdr->buffer_info);
1493 kfree(rxdr->ps_page);
1494 DPRINTK(PROBE, ERR,
1495 "Unable to allocate memory for the receive descriptor ring\n");
1496 return -ENOMEM;
1497 }
1498 memset(rxdr->ps_page_dma, 0, size);
1499
96838a40 1500 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1501 desc_len = sizeof(struct e1000_rx_desc);
1502 else
1503 desc_len = sizeof(union e1000_rx_desc_packet_split);
1504
1da177e4
LT		 1505 /* Round up to nearest 4K */
1506
2d7edb92 1507 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1508 E1000_ROUNDUP(rxdr->size, 4096);
1509
1510 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1511
581d708e
MC		 1512 if (!rxdr->desc) {
1513 DPRINTK(PROBE, ERR,
1514 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1515setup_rx_desc_die:
1da177e4 1516 vfree(rxdr->buffer_info);
2d7edb92
MC		 1517 kfree(rxdr->ps_page);
1518 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1519 return -ENOMEM;
1520 }
1521
2648345f 1522 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1523 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1524 void *olddesc = rxdr->desc;
1525 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1526 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1527 "at %p\n", rxdr->size, rxdr->desc);
1528 /* Try again, without freeing the previous */
1da177e4 1529 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1530 /* Failed allocation, critical failure */
581d708e 1531 if (!rxdr->desc) {
1da177e4 1532 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1533 DPRINTK(PROBE, ERR,
1534 "Unable to allocate memory "
1535 "for the receive descriptor ring\n");
1da177e4
LT		 1536 goto setup_rx_desc_die;
1537 }
1538
1539 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1540 /* give up */
2648345f
MC		 1541 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1542 rxdr->dma);
1da177e4 1543 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1544 DPRINTK(PROBE, ERR,
1545 "Unable to allocate aligned memory "
1546 "for the receive descriptor ring\n");
581d708e 1547 goto setup_rx_desc_die;
1da177e4 1548 } else {
2648345f 1549 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1550 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1551 }
1552 }
1553 memset(rxdr->desc, 0, rxdr->size);
1554
1555 rxdr->next_to_clean = 0;
1556 rxdr->next_to_use = 0;
1557
1558 return 0;
1559}
1560
581d708e
MC		 1561/**
1562 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1563 * (Descriptors) for all queues
1564 * @adapter: board private structure
1565 *
1566 * If this function returns with an error, then it's possible one or
1567 * more of the rings is populated (while the rest are not). It is the
1568 * callers duty to clean those orphaned rings.
1569 *
1570 * Return 0 on success, negative on failure
1571 **/
1572
1573int
1574e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1575{
1576 int i, err = 0;
1577
f56799ea 1578 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1579 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1580 if (err) {
1581 DPRINTK(PROBE, ERR,
1582 "Allocation for Rx Queue %u failed\n", i);
1583 break;
1584 }
1585 }
1586
1587 return err;
1588}
1589
1da177e4 1590/**
2648345f 1591 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1592 * @adapter: Board private structure
1593 **/
e4c811c9
MC		 1594#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1595 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1596static void
1597e1000_setup_rctl(struct e1000_adapter *adapter)
1598{
2d7edb92
MC		 1599 uint32_t rctl, rfctl;
1600 uint32_t psrctl = 0;
35ec56bb 1601#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1602 uint32_t pages = 0;
1603#endif
1da177e4
LT		 1604
1605 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1606
1607 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1608
1609 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1610 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1611 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1612
0fadb059
JK		 1613 if (adapter->hw.mac_type > e1000_82543)
1614 rctl |= E1000_RCTL_SECRC;
1615
1616 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1617 rctl |= E1000_RCTL_SBP;
1618 else
1619 rctl &= ~E1000_RCTL_SBP;
1620
2d7edb92
MC		 1621 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1622 rctl &= ~E1000_RCTL_LPE;
1623 else
1624 rctl |= E1000_RCTL_LPE;
1625
1da177e4 1626 /* Setup buffer sizes */
96838a40 1627 if (adapter->hw.mac_type >= e1000_82571) {
2d7edb92
MC		 1628 /* We can now specify buffers in 1K increments.
1629 * BSIZE and BSEX are ignored in this case. */
1630 rctl |= adapter->rx_buffer_len << 0x11;
1631 } else {
1632 rctl &= ~E1000_RCTL_SZ_4096;
a1415ee6
JK		 1633 rctl |= E1000_RCTL_BSEX;
1634 switch (adapter->rx_buffer_len) {
1635 case E1000_RXBUFFER_2048:
1636 default:
1637 rctl |= E1000_RCTL_SZ_2048;
1638 rctl &= ~E1000_RCTL_BSEX;
1639 break;
1640 case E1000_RXBUFFER_4096:
1641 rctl |= E1000_RCTL_SZ_4096;
1642 break;
1643 case E1000_RXBUFFER_8192:
1644 rctl |= E1000_RCTL_SZ_8192;
1645 break;
1646 case E1000_RXBUFFER_16384:
1647 rctl |= E1000_RCTL_SZ_16384;
1648 break;
1649 }
2d7edb92
MC		 1650 }
1651
35ec56bb 1652#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1653 /* 82571 and greater support packet-split where the protocol
1654 * header is placed in skb->data and the packet data is
1655 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1656 * In the case of a non-split, skb->data is linearly filled,
1657 * followed by the page buffers. Therefore, skb->data is
1658 * sized to hold the largest protocol header.
1659 */
e4c811c9
MC		 1660 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1661 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1662 PAGE_SIZE <= 16384)
1663 adapter->rx_ps_pages = pages;
1664 else
1665 adapter->rx_ps_pages = 0;
2d7edb92 1666#endif
e4c811c9 1667 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1668 /* Configure extra packet-split registers */
1669 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1670 rfctl |= E1000_RFCTL_EXTEN;
1671 /* disable IPv6 packet split support */
1672 rfctl |= E1000_RFCTL_IPV6_DIS;
1673 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1674
1675 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
96838a40 1676
2d7edb92
MC		 1677 psrctl |= adapter->rx_ps_bsize0 >>
1678 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1679
1680 switch (adapter->rx_ps_pages) {
1681 case 3:
1682 psrctl |= PAGE_SIZE <<
1683 E1000_PSRCTL_BSIZE3_SHIFT;
1684 case 2:
1685 psrctl |= PAGE_SIZE <<
1686 E1000_PSRCTL_BSIZE2_SHIFT;
1687 case 1:
1688 psrctl |= PAGE_SIZE >>
1689 E1000_PSRCTL_BSIZE1_SHIFT;
1690 break;
1691 }
2d7edb92
MC		 1692
1693 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1694 }
1695
1696 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1697}
1698
1699/**
1700 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1701 * @adapter: board private structure
1702 *
1703 * Configure the Rx unit of the MAC after a reset.
1704 **/
1705
1706static void
1707e1000_configure_rx(struct e1000_adapter *adapter)
1708{
581d708e
MC		 1709 uint64_t rdba;
1710 struct e1000_hw *hw = &adapter->hw;
1711 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1712
e4c811c9 1713 if (adapter->rx_ps_pages) {
581d708e 1714 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1715 sizeof(union e1000_rx_desc_packet_split);
1716 adapter->clean_rx = e1000_clean_rx_irq_ps;
1717 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1718 } else {
581d708e
MC		 1719 rdlen = adapter->rx_ring[0].count *
1720 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1721 adapter->clean_rx = e1000_clean_rx_irq;
1722 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1723 }
1da177e4
LT		 1724
1725 /* disable receives while setting up the descriptors */
581d708e
MC		 1726 rctl = E1000_READ_REG(hw, RCTL);
1727 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1728
1729 /* set the Receive Delay Timer Register */
581d708e 1730 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1731
581d708e
MC		 1732 if (hw->mac_type >= e1000_82540) {
1733 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1734 if (adapter->itr > 1)
581d708e 1735 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1736 1000000000 / (adapter->itr * 256));
1737 }
1738
2ae76d98 1739 if (hw->mac_type >= e1000_82571) {
2ae76d98 1740 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1741 /* Reset delay timers after every interrupt */
2ae76d98 1742 ctrl_ext |= E1000_CTRL_EXT_CANC;
1e613fd9
JK		 1743#ifdef CONFIG_E1000_NAPI
1744 /* Auto-Mask interrupts upon ICR read. */
1745 ctrl_ext |= E1000_CTRL_EXT_IAME;
1746#endif
2ae76d98 1747 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1748 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1749 E1000_WRITE_FLUSH(hw);
1750 }
1751
581d708e
MC		 1752 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1753 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1754 switch (adapter->num_rx_queues) {
24025e4e
MC		 1755 case 1:
1756 default:
581d708e
MC		 1757 rdba = adapter->rx_ring[0].dma;
1758 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1759 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1760 E1000_WRITE_REG(hw, RDLEN, rdlen);
1761 E1000_WRITE_REG(hw, RDH, 0);
1762 E1000_WRITE_REG(hw, RDT, 0);
1763 adapter->rx_ring[0].rdh = E1000_RDH;
1764 adapter->rx_ring[0].rdt = E1000_RDT;
1765 break;
24025e4e
MC		 1766 }
1767
1da177e4 1768 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1769 if (hw->mac_type >= e1000_82543) {
1770 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1771 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1772 rxcsum |= E1000_RXCSUM_TUOFL;
1773
868d5309 1774 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1775 * Must be used in conjunction with packet-split. */
96838a40
JB		 1776 if ((hw->mac_type >= e1000_82571) &&
1777 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1778 rxcsum |= E1000_RXCSUM_IPPCSE;
1779 }
1780 } else {
1781 rxcsum &= ~E1000_RXCSUM_TUOFL;
1782 /* don't need to clear IPPCSE as it defaults to 0 */
1783 }
581d708e 1784 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1785 }
1786
581d708e
MC		 1787 if (hw->mac_type == e1000_82573)
1788 E1000_WRITE_REG(hw, ERT, 0x0100);
2d7edb92 1789
1da177e4 1790 /* Enable Receives */
581d708e 1791 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1792}
1793
1794/**
581d708e 1795 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1796 * @adapter: board private structure
581d708e 1797 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1798 *
1799 * Free all transmit software resources
1800 **/
1801
3ad2cc67 1802static void
581d708e
MC		 1803e1000_free_tx_resources(struct e1000_adapter *adapter,
1804 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1805{
1806 struct pci_dev *pdev = adapter->pdev;
1807
581d708e 1808 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1809
581d708e
MC		 1810 vfree(tx_ring->buffer_info);
1811 tx_ring->buffer_info = NULL;
1da177e4 1812
581d708e 1813 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1814
581d708e
MC		 1815 tx_ring->desc = NULL;
1816}
1817
1818/**
1819 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1820 * @adapter: board private structure
1821 *
1822 * Free all transmit software resources
1823 **/
1824
1825void
1826e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1827{
1828 int i;
1829
f56799ea 1830 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1831 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1832}
1833
1834static inline void
1835e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1836 struct e1000_buffer *buffer_info)
1837{
96838a40 1838 if (buffer_info->dma) {
2648345f
MC		 1839 pci_unmap_page(adapter->pdev,
1840 buffer_info->dma,
1841 buffer_info->length,
1842 PCI_DMA_TODEVICE);
1da177e4 1843 }
8241e35e 1844 if (buffer_info->skb)
1da177e4 1845 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1846 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1847}
1848
1849/**
1850 * e1000_clean_tx_ring - Free Tx Buffers
1851 * @adapter: board private structure
581d708e 1852 * @tx_ring: ring to be cleaned
1da177e4
LT		 1853 **/
1854
1855static void
581d708e
MC		 1856e1000_clean_tx_ring(struct e1000_adapter *adapter,
1857 struct e1000_tx_ring *tx_ring)
1da177e4 1858{
1da177e4
LT		 1859 struct e1000_buffer *buffer_info;
1860 unsigned long size;
1861 unsigned int i;
1862
1863 /* Free all the Tx ring sk_buffs */
1864
96838a40 1865 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1866 buffer_info = &tx_ring->buffer_info[i];
1867 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1868 }
1869
1870 size = sizeof(struct e1000_buffer) * tx_ring->count;
1871 memset(tx_ring->buffer_info, 0, size);
1872
1873 /* Zero out the descriptor ring */
1874
1875 memset(tx_ring->desc, 0, tx_ring->size);
1876
1877 tx_ring->next_to_use = 0;
1878 tx_ring->next_to_clean = 0;
fd803241 1879 tx_ring->last_tx_tso = 0;
1da177e4 1880
581d708e
MC		 1881 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1882 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1883}
1884
1885/**
1886 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1887 * @adapter: board private structure
1888 **/
1889
1890static void
1891e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1892{
1893 int i;
1894
f56799ea 1895 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1896 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1897}
1898
1899/**
1900 * e1000_free_rx_resources - Free Rx Resources
1901 * @adapter: board private structure
581d708e 1902 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1903 *
1904 * Free all receive software resources
1905 **/
1906
3ad2cc67 1907static void
581d708e
MC		 1908e1000_free_rx_resources(struct e1000_adapter *adapter,
1909 struct e1000_rx_ring *rx_ring)
1da177e4 1910{
1da177e4
LT		 1911 struct pci_dev *pdev = adapter->pdev;
1912
581d708e 1913 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1914
1915 vfree(rx_ring->buffer_info);
1916 rx_ring->buffer_info = NULL;
2d7edb92
MC		 1917 kfree(rx_ring->ps_page);
1918 rx_ring->ps_page = NULL;
1919 kfree(rx_ring->ps_page_dma);
1920 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 1921
1922 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1923
1924 rx_ring->desc = NULL;
1925}
1926
1927/**
581d708e 1928 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1929 * @adapter: board private structure
581d708e
MC		 1930 *
1931 * Free all receive software resources
1932 **/
1933
1934void
1935e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1936{
1937 int i;
1938
f56799ea 1939 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 1940 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1941}
1942
1943/**
1944 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1945 * @adapter: board private structure
1946 * @rx_ring: ring to free buffers from
1da177e4
LT		 1947 **/
1948
1949static void
581d708e
MC		 1950e1000_clean_rx_ring(struct e1000_adapter *adapter,
1951 struct e1000_rx_ring *rx_ring)
1da177e4 1952{
1da177e4 1953 struct e1000_buffer *buffer_info;
2d7edb92
MC		 1954 struct e1000_ps_page *ps_page;
1955 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 1956 struct pci_dev *pdev = adapter->pdev;
1957 unsigned long size;
2d7edb92 1958 unsigned int i, j;
1da177e4
LT		 1959
1960 /* Free all the Rx ring sk_buffs */
96838a40 1961 for (i = 0; i < rx_ring->count; i++) {
1da177e4 1962 buffer_info = &rx_ring->buffer_info[i];
96838a40 1963 if (buffer_info->skb) {
1da177e4
LT		 1964 pci_unmap_single(pdev,
1965 buffer_info->dma,
1966 buffer_info->length,
1967 PCI_DMA_FROMDEVICE);
1968
1969 dev_kfree_skb(buffer_info->skb);
1970 buffer_info->skb = NULL;
997f5cbd
JK		 1971 }
1972 ps_page = &rx_ring->ps_page[i];
1973 ps_page_dma = &rx_ring->ps_page_dma[i];
1974 for (j = 0; j < adapter->rx_ps_pages; j++) {
1975 if (!ps_page->ps_page[j]) break;
1976 pci_unmap_page(pdev,
1977 ps_page_dma->ps_page_dma[j],
1978 PAGE_SIZE, PCI_DMA_FROMDEVICE);
1979 ps_page_dma->ps_page_dma[j] = 0;
1980 put_page(ps_page->ps_page[j]);
1981 ps_page->ps_page[j] = NULL;
1da177e4
LT		 1982 }
1983 }
1984
1985 size = sizeof(struct e1000_buffer) * rx_ring->count;
1986 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 1987 size = sizeof(struct e1000_ps_page) * rx_ring->count;
1988 memset(rx_ring->ps_page, 0, size);
1989 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
1990 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 1991
1992 /* Zero out the descriptor ring */
1993
1994 memset(rx_ring->desc, 0, rx_ring->size);
1995
1996 rx_ring->next_to_clean = 0;
1997 rx_ring->next_to_use = 0;
1998
581d708e
MC		 1999 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2000 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2001}
2002
2003/**
2004 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2005 * @adapter: board private structure
2006 **/
2007
2008static void
2009e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2010{
2011 int i;
2012
f56799ea 2013 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2014 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2015}
2016
2017/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2018 * and memory write and invalidate disabled for certain operations
2019 */
2020static void
2021e1000_enter_82542_rst(struct e1000_adapter *adapter)
2022{
2023 struct net_device *netdev = adapter->netdev;
2024 uint32_t rctl;
2025
2026 e1000_pci_clear_mwi(&adapter->hw);
2027
2028 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2029 rctl |= E1000_RCTL_RST;
2030 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2031 E1000_WRITE_FLUSH(&adapter->hw);
2032 mdelay(5);
2033
96838a40 2034 if (netif_running(netdev))
581d708e 2035 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2036}
2037
2038static void
2039e1000_leave_82542_rst(struct e1000_adapter *adapter)
2040{
2041 struct net_device *netdev = adapter->netdev;
2042 uint32_t rctl;
2043
2044 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2045 rctl &= ~E1000_RCTL_RST;
2046 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2047 E1000_WRITE_FLUSH(&adapter->hw);
2048 mdelay(5);
2049
96838a40 2050 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2051 e1000_pci_set_mwi(&adapter->hw);
2052
96838a40 2053 if (netif_running(netdev)) {
72d64a43
JK		 2054 /* No need to loop, because 82542 supports only 1 queue */
2055 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2056 e1000_configure_rx(adapter);
72d64a43 2057 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2058 }
2059}
2060
2061/**
2062 * e1000_set_mac - Change the Ethernet Address of the NIC
2063 * @netdev: network interface device structure
2064 * @p: pointer to an address structure
2065 *
2066 * Returns 0 on success, negative on failure
2067 **/
2068
2069static int
2070e1000_set_mac(struct net_device *netdev, void *p)
2071{
60490fe0 2072 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2073 struct sockaddr *addr = p;
2074
96838a40 2075 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2076 return -EADDRNOTAVAIL;
2077
2078 /* 82542 2.0 needs to be in reset to write receive address registers */
2079
96838a40 2080 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2081 e1000_enter_82542_rst(adapter);
2082
2083 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2084 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2085
2086 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2087
868d5309
MC		 2088 /* With 82571 controllers, LAA may be overwritten (with the default)
2089 * due to controller reset from the other port. */
2090 if (adapter->hw.mac_type == e1000_82571) {
2091 /* activate the work around */
2092 adapter->hw.laa_is_present = 1;
2093
96838a40
JB		 2094 /* Hold a copy of the LAA in RAR[14] This is done so that
2095 * between the time RAR[0] gets clobbered and the time it
2096 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2097 * of the RARs and no incoming packets directed to this port
96838a40 2098 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2099 * RAR[14] */
96838a40 2100 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2101 E1000_RAR_ENTRIES - 1);
2102 }
2103
96838a40 2104 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2105 e1000_leave_82542_rst(adapter);
2106
2107 return 0;
2108}
2109
2110/**
2111 * e1000_set_multi - Multicast and Promiscuous mode set
2112 * @netdev: network interface device structure
2113 *
2114 * The set_multi entry point is called whenever the multicast address
2115 * list or the network interface flags are updated. This routine is
2116 * responsible for configuring the hardware for proper multicast,
2117 * promiscuous mode, and all-multi behavior.
2118 **/
2119
2120static void
2121e1000_set_multi(struct net_device *netdev)
2122{
60490fe0 2123 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2124 struct e1000_hw *hw = &adapter->hw;
2125 struct dev_mc_list *mc_ptr;
2126 uint32_t rctl;
2127 uint32_t hash_value;
868d5309 2128 int i, rar_entries = E1000_RAR_ENTRIES;
1da177e4 2129
868d5309
MC		 2130 /* reserve RAR[14] for LAA over-write work-around */
2131 if (adapter->hw.mac_type == e1000_82571)
2132 rar_entries--;
1da177e4 2133
2648345f
MC		 2134 /* Check for Promiscuous and All Multicast modes */
2135
1da177e4
LT		 2136 rctl = E1000_READ_REG(hw, RCTL);
2137
96838a40 2138 if (netdev->flags & IFF_PROMISC) {
1da177e4 2139 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2140 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2141 rctl |= E1000_RCTL_MPE;
2142 rctl &= ~E1000_RCTL_UPE;
2143 } else {
2144 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2145 }
2146
2147 E1000_WRITE_REG(hw, RCTL, rctl);
2148
2149 /* 82542 2.0 needs to be in reset to write receive address registers */
2150
96838a40 2151 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2152 e1000_enter_82542_rst(adapter);
2153
2154 /* load the first 14 multicast address into the exact filters 1-14
2155 * RAR 0 is used for the station MAC adddress
2156 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2157 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2158 */
2159 mc_ptr = netdev->mc_list;
2160
96838a40 2161 for (i = 1; i < rar_entries; i++) {
868d5309 2162 if (mc_ptr) {
1da177e4
LT		 2163 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2164 mc_ptr = mc_ptr->next;
2165 } else {
2166 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2167 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2168 }
2169 }
2170
2171 /* clear the old settings from the multicast hash table */
2172
96838a40 2173 for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
1da177e4
LT		 2174 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2175
2176 /* load any remaining addresses into the hash table */
2177
96838a40 2178 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2179 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2180 e1000_mta_set(hw, hash_value);
2181 }
2182
96838a40 2183 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2184 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2185}
2186
2187/* Need to wait a few seconds after link up to get diagnostic information from
2188 * the phy */
2189
2190static void
2191e1000_update_phy_info(unsigned long data)
2192{
2193 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2194 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2195}
2196
2197/**
2198 * e1000_82547_tx_fifo_stall - Timer Call-back
2199 * @data: pointer to adapter cast into an unsigned long
2200 **/
2201
2202static void
2203e1000_82547_tx_fifo_stall(unsigned long data)
2204{
2205 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2206 struct net_device *netdev = adapter->netdev;
2207 uint32_t tctl;
2208
96838a40
JB		 2209 if (atomic_read(&adapter->tx_fifo_stall)) {
2210 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2211 E1000_READ_REG(&adapter->hw, TDH)) &&
2212 (E1000_READ_REG(&adapter->hw, TDFT) ==
2213 E1000_READ_REG(&adapter->hw, TDFH)) &&
2214 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2215 E1000_READ_REG(&adapter->hw, TDFHS))) {
2216 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2217 E1000_WRITE_REG(&adapter->hw, TCTL,
2218 tctl & ~E1000_TCTL_EN);
2219 E1000_WRITE_REG(&adapter->hw, TDFT,
2220 adapter->tx_head_addr);
2221 E1000_WRITE_REG(&adapter->hw, TDFH,
2222 adapter->tx_head_addr);
2223 E1000_WRITE_REG(&adapter->hw, TDFTS,
2224 adapter->tx_head_addr);
2225 E1000_WRITE_REG(&adapter->hw, TDFHS,
2226 adapter->tx_head_addr);
2227 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2228 E1000_WRITE_FLUSH(&adapter->hw);
2229
2230 adapter->tx_fifo_head = 0;
2231 atomic_set(&adapter->tx_fifo_stall, 0);
2232 netif_wake_queue(netdev);
2233 } else {
2234 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2235 }
2236 }
2237}
2238
2239/**
2240 * e1000_watchdog - Timer Call-back
2241 * @data: pointer to adapter cast into an unsigned long
2242 **/
2243static void
2244e1000_watchdog(unsigned long data)
2245{
2246 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2247
2248 /* Do the rest outside of interrupt context */
2249 schedule_work(&adapter->watchdog_task);
2250}
2251
2252static void
2253e1000_watchdog_task(struct e1000_adapter *adapter)
2254{
2255 struct net_device *netdev = adapter->netdev;
545c67c0 2256 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2257 uint32_t link, tctl;
1da177e4
LT		 2258
2259 e1000_check_for_link(&adapter->hw);
2d7edb92
MC		 2260 if (adapter->hw.mac_type == e1000_82573) {
2261 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2262 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2263 e1000_update_mng_vlan(adapter);
96838a40 2264 }
1da177e4 2265
96838a40 2266 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2267 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2268 link = !adapter->hw.serdes_link_down;
2269 else
2270 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2271
96838a40
JB		 2272 if (link) {
2273 if (!netif_carrier_ok(netdev)) {
1da177e4
LT		 2274 e1000_get_speed_and_duplex(&adapter->hw,
2275 &adapter->link_speed,
2276 &adapter->link_duplex);
2277
2278 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2279 adapter->link_speed,
2280 adapter->link_duplex == FULL_DUPLEX ?
2281 "Full Duplex" : "Half Duplex");
2282
7e6c9861
JK		 2283 /* tweak tx_queue_len according to speed/duplex
2284 * and adjust the timeout factor */
66a2b0a3
JK		 2285 netdev->tx_queue_len = adapter->tx_queue_len;
2286 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2287 adapter->txb2b = 1;
2288 switch (adapter->link_speed) {
2289 case SPEED_10:
2290 adapter->txb2b = 0;
2291 netdev->tx_queue_len = 10;
2292 adapter->tx_timeout_factor = 8;
2293 break;
2294 case SPEED_100:
2295 adapter->txb2b = 0;
2296 netdev->tx_queue_len = 100;
2297 /* maybe add some timeout factor ? */
2298 break;
2299 }
2300
2301 if ((adapter->hw.mac_type == e1000_82571 ||
2302 adapter->hw.mac_type == e1000_82572) &&
2303 adapter->txb2b == 0) {
2304#define SPEED_MODE_BIT (1 << 21)
2305 uint32_t tarc0;
2306 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2307 tarc0 &= ~SPEED_MODE_BIT;
2308 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2309 }
2310
2311#ifdef NETIF_F_TSO
2312 /* disable TSO for pcie and 10/100 speeds, to avoid
2313 * some hardware issues */
2314 if (!adapter->tso_force &&
2315 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2316 switch (adapter->link_speed) {
2317 case SPEED_10:
66a2b0a3 2318 case SPEED_100:
7e6c9861
JK		 2319 DPRINTK(PROBE,INFO,
2320 "10/100 speed: disabling TSO\n");
2321 netdev->features &= ~NETIF_F_TSO;
2322 break;
2323 case SPEED_1000:
2324 netdev->features |= NETIF_F_TSO;
2325 break;
2326 default:
2327 /* oops */
66a2b0a3
JK		 2328 break;
2329 }
2330 }
7e6c9861
JK		 2331#endif
2332
2333 /* enable transmits in the hardware, need to do this
2334 * after setting TARC0 */
2335 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2336 tctl |= E1000_TCTL_EN;
2337 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2338
1da177e4
LT		 2339 netif_carrier_on(netdev);
2340 netif_wake_queue(netdev);
2341 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2342 adapter->smartspeed = 0;
2343 }
2344 } else {
96838a40 2345 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2346 adapter->link_speed = 0;
2347 adapter->link_duplex = 0;
2348 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2349 netif_carrier_off(netdev);
2350 netif_stop_queue(netdev);
2351 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2352 }
2353
2354 e1000_smartspeed(adapter);
2355 }
2356
2357 e1000_update_stats(adapter);
2358
2359 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2360 adapter->tpt_old = adapter->stats.tpt;
2361 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2362 adapter->colc_old = adapter->stats.colc;
2363
2364 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2365 adapter->gorcl_old = adapter->stats.gorcl;
2366 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2367 adapter->gotcl_old = adapter->stats.gotcl;
2368
2369 e1000_update_adaptive(&adapter->hw);
2370
f56799ea 2371 if (!netif_carrier_ok(netdev)) {
581d708e 2372 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2373 /* We've lost link, so the controller stops DMA,
2374 * but we've got queued Tx work that's never going
2375 * to get done, so reset controller to flush Tx.
2376 * (Do the reset outside of interrupt context). */
2377 schedule_work(&adapter->tx_timeout_task);
2378 }
2379 }
2380
2381 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2382 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2383 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2384 * asymmetrical Tx or Rx gets ITR=8000; everyone
2385 * else is between 2000-8000. */
2386 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2387 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2388 adapter->gotcl - adapter->gorcl :
2389 adapter->gorcl - adapter->gotcl) / 10000;
2390 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2391 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2392 }
2393
2394 /* Cause software interrupt to ensure rx ring is cleaned */
2395 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2396
2648345f 2397 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2398 adapter->detect_tx_hung = TRUE;
2399
96838a40 2400 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2401 * reset from the other port. Set the appropriate LAA in RAR[0] */
2402 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2403 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2404
1da177e4
LT		 2405 /* Reset the timer */
2406 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2407}
2408
2409#define E1000_TX_FLAGS_CSUM 0x00000001
2410#define E1000_TX_FLAGS_VLAN 0x00000002
2411#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2412#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2413#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2414#define E1000_TX_FLAGS_VLAN_SHIFT 16
2415
2416static inline int
581d708e
MC		 2417e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2418 struct sk_buff *skb)
1da177e4
LT		 2419{
2420#ifdef NETIF_F_TSO
2421 struct e1000_context_desc *context_desc;
545c67c0 2422 struct e1000_buffer *buffer_info;
1da177e4
LT		 2423 unsigned int i;
2424 uint32_t cmd_length = 0;
2d7edb92 2425 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2426 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2427 int err;
2428
96838a40 2429 if (skb_shinfo(skb)->tso_size) {
1da177e4
LT		 2430 if (skb_header_cloned(skb)) {
2431 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2432 if (err)
2433 return err;
2434 }
2435
2436 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2437 mss = skb_shinfo(skb)->tso_size;
96838a40 2438 if (skb->protocol == ntohs(ETH_P_IP)) {
2d7edb92
MC		 2439 skb->nh.iph->tot_len = 0;
2440 skb->nh.iph->check = 0;
2441 skb->h.th->check =
2442 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2443 skb->nh.iph->daddr,
2444 0,
2445 IPPROTO_TCP,
2446 0);
2447 cmd_length = E1000_TXD_CMD_IP;
2448 ipcse = skb->h.raw - skb->data - 1;
2449#ifdef NETIF_F_TSO_IPV6
96838a40 2450 } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
2d7edb92
MC		 2451 skb->nh.ipv6h->payload_len = 0;
2452 skb->h.th->check =
2453 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2454 &skb->nh.ipv6h->daddr,
2455 0,
2456 IPPROTO_TCP,
2457 0);
2458 ipcse = 0;
2459#endif
2460 }
1da177e4
LT		 2461 ipcss = skb->nh.raw - skb->data;
2462 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2463 tucss = skb->h.raw - skb->data;
2464 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2465 tucse = 0;
2466
2467 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2468 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2469
581d708e
MC		 2470 i = tx_ring->next_to_use;
2471 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2472 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2473
2474 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2475 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2476 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2477 context_desc->upper_setup.tcp_fields.tucss = tucss;
2478 context_desc->upper_setup.tcp_fields.tucso = tucso;
2479 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2480 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2481 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2482 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2483
545c67c0
JK		 2484 buffer_info->time_stamp = jiffies;
2485
581d708e
MC		 2486 if (++i == tx_ring->count) i = 0;
2487 tx_ring->next_to_use = i;
1da177e4 2488
8241e35e 2489 return TRUE;
1da177e4
LT		 2490 }
2491#endif
2492
8241e35e 2493 return FALSE;
1da177e4
LT		 2494}
2495
2496static inline boolean_t
581d708e
MC		 2497e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2498 struct sk_buff *skb)
1da177e4
LT		 2499{
2500 struct e1000_context_desc *context_desc;
545c67c0 2501 struct e1000_buffer *buffer_info;
1da177e4
LT		 2502 unsigned int i;
2503 uint8_t css;
2504
96838a40 2505 if (likely(skb->ip_summed == CHECKSUM_HW)) {
1da177e4
LT		 2506 css = skb->h.raw - skb->data;
2507
581d708e 2508 i = tx_ring->next_to_use;
545c67c0 2509 buffer_info = &tx_ring->buffer_info[i];
581d708e 2510 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2511
2512 context_desc->upper_setup.tcp_fields.tucss = css;
2513 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2514 context_desc->upper_setup.tcp_fields.tucse = 0;
2515 context_desc->tcp_seg_setup.data = 0;
2516 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2517
545c67c0
JK		 2518 buffer_info->time_stamp = jiffies;
2519
581d708e
MC		 2520 if (unlikely(++i == tx_ring->count)) i = 0;
2521 tx_ring->next_to_use = i;
1da177e4
LT		 2522
2523 return TRUE;
2524 }
2525
2526 return FALSE;
2527}
2528
2529#define E1000_MAX_TXD_PWR 12
2530#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2531
2532static inline int
581d708e
MC		 2533e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2534 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2535 unsigned int nr_frags, unsigned int mss)
1da177e4 2536{
1da177e4
LT		 2537 struct e1000_buffer *buffer_info;
2538 unsigned int len = skb->len;
2539 unsigned int offset = 0, size, count = 0, i;
2540 unsigned int f;
2541 len -= skb->data_len;
2542
2543 i = tx_ring->next_to_use;
2544
96838a40 2545 while (len) {
1da177e4
LT		 2546 buffer_info = &tx_ring->buffer_info[i];
2547 size = min(len, max_per_txd);
2548#ifdef NETIF_F_TSO
fd803241
JK		 2549 /* Workaround for Controller erratum --
2550 * descriptor for non-tso packet in a linear SKB that follows a
2551 * tso gets written back prematurely before the data is fully
2552 * DMAd to the controller */
2553 if (!skb->data_len && tx_ring->last_tx_tso &&
2554 !skb_shinfo(skb)->tso_size) {
2555 tx_ring->last_tx_tso = 0;
2556 size -= 4;
2557 }
2558
1da177e4
LT		 2559 /* Workaround for premature desc write-backs
2560 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2561 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2562 size -= 4;
2563#endif
97338bde
MC		 2564 /* work-around for errata 10 and it applies
2565 * to all controllers in PCI-X mode
2566 * The fix is to make sure that the first descriptor of a
2567 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2568 */
96838a40 2569 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2570 (size > 2015) && count == 0))
2571 size = 2015;
96838a40 2572
1da177e4
LT		 2573 /* Workaround for potential 82544 hang in PCI-X. Avoid
2574 * terminating buffers within evenly-aligned dwords. */
96838a40 2575 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2576 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2577 size > 4))
2578 size -= 4;
2579
2580 buffer_info->length = size;
2581 buffer_info->dma =
2582 pci_map_single(adapter->pdev,
2583 skb->data + offset,
2584 size,
2585 PCI_DMA_TODEVICE);
2586 buffer_info->time_stamp = jiffies;
2587
2588 len -= size;
2589 offset += size;
2590 count++;
96838a40 2591 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2592 }
2593
96838a40 2594 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2595 struct skb_frag_struct *frag;
2596
2597 frag = &skb_shinfo(skb)->frags[f];
2598 len = frag->size;
2599 offset = frag->page_offset;
2600
96838a40 2601 while (len) {
1da177e4
LT		 2602 buffer_info = &tx_ring->buffer_info[i];
2603 size = min(len, max_per_txd);
2604#ifdef NETIF_F_TSO
2605 /* Workaround for premature desc write-backs
2606 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2607 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2608 size -= 4;
2609#endif
2610 /* Workaround for potential 82544 hang in PCI-X.
2611 * Avoid terminating buffers within evenly-aligned
2612 * dwords. */
96838a40 2613 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2614 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2615 size > 4))
2616 size -= 4;
2617
2618 buffer_info->length = size;
2619 buffer_info->dma =
2620 pci_map_page(adapter->pdev,
2621 frag->page,
2622 offset,
2623 size,
2624 PCI_DMA_TODEVICE);
2625 buffer_info->time_stamp = jiffies;
2626
2627 len -= size;
2628 offset += size;
2629 count++;
96838a40 2630 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2631 }
2632 }
2633
2634 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2635 tx_ring->buffer_info[i].skb = skb;
2636 tx_ring->buffer_info[first].next_to_watch = i;
2637
2638 return count;
2639}
2640
2641static inline void
581d708e
MC		 2642e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2643 int tx_flags, int count)
1da177e4 2644{
1da177e4
LT		 2645 struct e1000_tx_desc *tx_desc = NULL;
2646 struct e1000_buffer *buffer_info;
2647 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2648 unsigned int i;
2649
96838a40 2650 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2651 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2652 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2653 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2654
96838a40 2655 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2656 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2657 }
2658
96838a40 2659 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2660 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2661 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2662 }
2663
96838a40 2664 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2665 txd_lower |= E1000_TXD_CMD_VLE;
2666 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2667 }
2668
2669 i = tx_ring->next_to_use;
2670
96838a40 2671 while (count--) {
1da177e4
LT		 2672 buffer_info = &tx_ring->buffer_info[i];
2673 tx_desc = E1000_TX_DESC(*tx_ring, i);
2674 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2675 tx_desc->lower.data =
2676 cpu_to_le32(txd_lower | buffer_info->length);
2677 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2678 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2679 }
2680
2681 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2682
2683 /* Force memory writes to complete before letting h/w
2684 * know there are new descriptors to fetch. (Only
2685 * applicable for weak-ordered memory model archs,
2686 * such as IA-64). */
2687 wmb();
2688
2689 tx_ring->next_to_use = i;
581d708e 2690 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2691}
2692
2693/**
2694 * 82547 workaround to avoid controller hang in half-duplex environment.
2695 * The workaround is to avoid queuing a large packet that would span
2696 * the internal Tx FIFO ring boundary by notifying the stack to resend
2697 * the packet at a later time. This gives the Tx FIFO an opportunity to
2698 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2699 * to the beginning of the Tx FIFO.
2700 **/
2701
2702#define E1000_FIFO_HDR 0x10
2703#define E1000_82547_PAD_LEN 0x3E0
2704
2705static inline int
2706e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2707{
2708 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2709 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2710
2711 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2712
96838a40 2713 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2714 goto no_fifo_stall_required;
2715
96838a40 2716 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2717 return 1;
2718
96838a40 2719 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2720 atomic_set(&adapter->tx_fifo_stall, 1);
2721 return 1;
2722 }
2723
2724no_fifo_stall_required:
2725 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2726 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2727 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2728 return 0;
2729}
2730
2d7edb92
MC		 2731#define MINIMUM_DHCP_PACKET_SIZE 282
2732static inline int
2733e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2734{
2735 struct e1000_hw *hw = &adapter->hw;
2736 uint16_t length, offset;
96838a40
JB		 2737 if (vlan_tx_tag_present(skb)) {
2738 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2739 ( adapter->hw.mng_cookie.status &
2740 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2741 return 0;
2742 }
20a44028 2743 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2744 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2745 if ((htons(ETH_P_IP) == eth->h_proto)) {
2746 const struct iphdr *ip =
2d7edb92 2747 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2748 if (IPPROTO_UDP == ip->protocol) {
2749 struct udphdr *udp =
2750 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2751 (ip->ihl << 2));
96838a40 2752 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2753 offset = (uint8_t *)udp + 8 - skb->data;
2754 length = skb->len - offset;
2755
2756 return e1000_mng_write_dhcp_info(hw,
96838a40 2757 (uint8_t *)udp + 8,
2d7edb92
MC		 2758 length);
2759 }
2760 }
2761 }
2762 }
2763 return 0;
2764}
2765
1da177e4
LT		 2766#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2767static int
2768e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2769{
60490fe0 2770 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2771 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2772 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2773 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2774 unsigned int tx_flags = 0;
2775 unsigned int len = skb->len;
2776 unsigned long flags;
2777 unsigned int nr_frags = 0;
2778 unsigned int mss = 0;
2779 int count = 0;
96838a40 2780 int tso;
1da177e4
LT		 2781 unsigned int f;
2782 len -= skb->data_len;
2783
581d708e 2784 tx_ring = adapter->tx_ring;
24025e4e 2785
581d708e 2786 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2787 dev_kfree_skb_any(skb);
2788 return NETDEV_TX_OK;
2789 }
2790
2791#ifdef NETIF_F_TSO
2792 mss = skb_shinfo(skb)->tso_size;
2648345f 2793 /* The controller does a simple calculation to
1da177e4
LT		 2794 * make sure there is enough room in the FIFO before
2795 * initiating the DMA for each buffer. The calc is:
2796 * 4 = ceil(buffer len/mss). To make sure we don't
2797 * overrun the FIFO, adjust the max buffer len if mss
2798 * drops. */
96838a40 2799 if (mss) {
9a3056da 2800 uint8_t hdr_len;
1da177e4
LT		 2801 max_per_txd = min(mss << 2, max_per_txd);
2802 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2803
9f687888 2804 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
9a3056da
JK		 2805 * points to just header, pull a few bytes of payload from
2806 * frags into skb->data */
2807 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 2808 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2809 switch (adapter->hw.mac_type) {
2810 unsigned int pull_size;
2811 case e1000_82571:
2812 case e1000_82572:
2813 case e1000_82573:
2814 pull_size = min((unsigned int)4, skb->data_len);
2815 if (!__pskb_pull_tail(skb, pull_size)) {
2816 printk(KERN_ERR
2817 "__pskb_pull_tail failed.\n");
2818 dev_kfree_skb_any(skb);
2819 return -EFAULT;
2820 }
2821 len = skb->len - skb->data_len;
2822 break;
2823 default:
2824 /* do nothing */
2825 break;
d74bbd3b 2826 }
9a3056da 2827 }
1da177e4
LT		 2828 }
2829
9a3056da 2830 /* reserve a descriptor for the offload context */
96838a40 2831 if ((mss) || (skb->ip_summed == CHECKSUM_HW))
1da177e4 2832 count++;
2648345f 2833 count++;
1da177e4 2834#else
96838a40 2835 if (skb->ip_summed == CHECKSUM_HW)
1da177e4
LT		 2836 count++;
2837#endif
fd803241
JK		 2838
2839#ifdef NETIF_F_TSO
2840 /* Controller Erratum workaround */
2841 if (!skb->data_len && tx_ring->last_tx_tso &&
2842 !skb_shinfo(skb)->tso_size)
2843 count++;
2844#endif
2845
1da177e4
LT		 2846 count += TXD_USE_COUNT(len, max_txd_pwr);
2847
96838a40 2848 if (adapter->pcix_82544)
1da177e4
LT		 2849 count++;
2850
96838a40 2851 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2852 * in PCI-X mode, so add one more descriptor to the count
2853 */
96838a40 2854 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2855 (len > 2015)))
2856 count++;
2857
1da177e4 2858 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2859 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2860 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2861 max_txd_pwr);
96838a40 2862 if (adapter->pcix_82544)
1da177e4
LT		 2863 count += nr_frags;
2864
96838a40 2865 if (adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2d7edb92
MC		 2866 e1000_transfer_dhcp_info(adapter, skb);
2867
581d708e
MC		 2868 local_irq_save(flags);
2869 if (!spin_trylock(&tx_ring->tx_lock)) {
2870 /* Collision - tell upper layer to requeue */
2871 local_irq_restore(flags);
2872 return NETDEV_TX_LOCKED;
2873 }
1da177e4
LT		 2874
2875 /* need: count + 2 desc gap to keep tail from touching
2876 * head, otherwise try next time */
581d708e 2877 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2878 netif_stop_queue(netdev);
581d708e 2879 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2880 return NETDEV_TX_BUSY;
2881 }
2882
96838a40
JB		 2883 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
2884 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 2885 netif_stop_queue(netdev);
2886 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2887 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2888 return NETDEV_TX_BUSY;
2889 }
2890 }
2891
96838a40 2892 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 2893 tx_flags |= E1000_TX_FLAGS_VLAN;
2894 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2895 }
2896
581d708e 2897 first = tx_ring->next_to_use;
96838a40 2898
581d708e 2899 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2900 if (tso < 0) {
2901 dev_kfree_skb_any(skb);
581d708e 2902 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2903 return NETDEV_TX_OK;
2904 }
2905
fd803241
JK		 2906 if (likely(tso)) {
2907 tx_ring->last_tx_tso = 1;
1da177e4 2908 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 2909 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 2910 tx_flags |= E1000_TX_FLAGS_CSUM;
2911
2d7edb92 2912 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 2913 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 2914 * no longer assume, we must. */
581d708e 2915 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2d7edb92
MC		 2916 tx_flags |= E1000_TX_FLAGS_IPV4;
2917
581d708e
MC		 2918 e1000_tx_queue(adapter, tx_ring, tx_flags,
2919 e1000_tx_map(adapter, tx_ring, skb, first,
2920 max_per_txd, nr_frags, mss));
1da177e4
LT		 2921
2922 netdev->trans_start = jiffies;
2923
2924 /* Make sure there is space in the ring for the next send. */
581d708e 2925 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 2926 netif_stop_queue(netdev);
2927
581d708e 2928 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2929 return NETDEV_TX_OK;
2930}
2931
2932/**
2933 * e1000_tx_timeout - Respond to a Tx Hang
2934 * @netdev: network interface device structure
2935 **/
2936
2937static void
2938e1000_tx_timeout(struct net_device *netdev)
2939{
60490fe0 2940 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2941
2942 /* Do the reset outside of interrupt context */
2943 schedule_work(&adapter->tx_timeout_task);
2944}
2945
2946static void
2947e1000_tx_timeout_task(struct net_device *netdev)
2948{
60490fe0 2949 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2950
6b7660cd 2951 adapter->tx_timeout_count++;
1da177e4
LT		 2952 e1000_down(adapter);
2953 e1000_up(adapter);
2954}
2955
2956/**
2957 * e1000_get_stats - Get System Network Statistics
2958 * @netdev: network interface device structure
2959 *
2960 * Returns the address of the device statistics structure.
2961 * The statistics are actually updated from the timer callback.
2962 **/
2963
2964static struct net_device_stats *
2965e1000_get_stats(struct net_device *netdev)
2966{
60490fe0 2967 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2968
6b7660cd 2969 /* only return the current stats */
1da177e4
LT		 2970 return &adapter->net_stats;
2971}
2972
2973/**
2974 * e1000_change_mtu - Change the Maximum Transfer Unit
2975 * @netdev: network interface device structure
2976 * @new_mtu: new value for maximum frame size
2977 *
2978 * Returns 0 on success, negative on failure
2979 **/
2980
2981static int
2982e1000_change_mtu(struct net_device *netdev, int new_mtu)
2983{
60490fe0 2984 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2985 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 2986 uint16_t eeprom_data = 0;
1da177e4 2987
96838a40
JB		 2988 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
2989 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2990 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 2991 return -EINVAL;
2d7edb92 2992 }
1da177e4 2993
997f5cbd
JK		 2994 /* Adapter-specific max frame size limits. */
2995 switch (adapter->hw.mac_type) {
2996 case e1000_82542_rev2_0:
2997 case e1000_82542_rev2_1:
997f5cbd
JK		 2998 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
2999 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3000 return -EINVAL;
2d7edb92 3001 }
997f5cbd 3002 break;
85b22eb6
JK		 3003 case e1000_82573:
3004 /* only enable jumbo frames if ASPM is disabled completely
3005 * this means both bits must be zero in 0x1A bits 3:2 */
3006 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3007 &eeprom_data);
3008 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
3009 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3010 DPRINTK(PROBE, ERR,
3011 "Jumbo Frames not supported.\n");
3012 return -EINVAL;
3013 }
3014 break;
3015 }
3016 /* fall through to get support */
997f5cbd
JK		 3017 case e1000_82571:
3018 case e1000_82572:
3019#define MAX_STD_JUMBO_FRAME_SIZE 9234
3020 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3021 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3022 return -EINVAL;
3023 }
3024 break;
3025 default:
3026 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3027 break;
1da177e4
LT		 3028 }
3029
997f5cbd 3030
997f5cbd 3031 if (adapter->hw.mac_type > e1000_82547_rev_2) {
a1415ee6 3032 adapter->rx_buffer_len = max_frame;
997f5cbd 3033 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
a1415ee6
JK		 3034 } else {
3035 if(unlikely((adapter->hw.mac_type < e1000_82543) &&
3036 (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
3037 DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
3038 "on 82542\n");
3039 return -EINVAL;
3040 } else {
3041 if(max_frame <= E1000_RXBUFFER_2048)
3042 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3043 else if(max_frame <= E1000_RXBUFFER_4096)
3044 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3045 else if(max_frame <= E1000_RXBUFFER_8192)
3046 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3047 else if(max_frame <= E1000_RXBUFFER_16384)
3048 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3049 }
3050 }
997f5cbd 3051
2d7edb92
MC		 3052 netdev->mtu = new_mtu;
3053
96838a40 3054 if (netif_running(netdev)) {
1da177e4
LT		 3055 e1000_down(adapter);
3056 e1000_up(adapter);
3057 }
3058
1da177e4
LT		 3059 adapter->hw.max_frame_size = max_frame;
3060
3061 return 0;
3062}
3063
3064/**
3065 * e1000_update_stats - Update the board statistics counters
3066 * @adapter: board private structure
3067 **/
3068
3069void
3070e1000_update_stats(struct e1000_adapter *adapter)
3071{
3072 struct e1000_hw *hw = &adapter->hw;
3073 unsigned long flags;
3074 uint16_t phy_tmp;
3075
3076#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3077
3078 spin_lock_irqsave(&adapter->stats_lock, flags);
3079
3080 /* these counters are modified from e1000_adjust_tbi_stats,
3081 * called from the interrupt context, so they must only
3082 * be written while holding adapter->stats_lock
3083 */
3084
3085 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3086 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3087 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3088 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3089 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3090 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3091 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3092 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3093 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3094 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3095 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3096 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3097 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3098
3099 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3100 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3101 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3102 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3103 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3104 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3105 adapter->stats.dc += E1000_READ_REG(hw, DC);
3106 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3107 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3108 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3109 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3110 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3111 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3112 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3113 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3114 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3115 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3116 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3117 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3118 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3119 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3120 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3121 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3122 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3123 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3124 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3125 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3126 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3127 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3128 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3129 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3130 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3131 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3132 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3133
3134 /* used for adaptive IFS */
3135
3136 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3137 adapter->stats.tpt += hw->tx_packet_delta;
3138 hw->collision_delta = E1000_READ_REG(hw, COLC);
3139 adapter->stats.colc += hw->collision_delta;
3140
96838a40 3141 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3142 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3143 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3144 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3145 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3146 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3147 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3148 }
96838a40 3149 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3150 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3151 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3152 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3153 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3154 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3155 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3156 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3157 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3158 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3159 }
1da177e4
LT		 3160
3161 /* Fill out the OS statistics structure */
3162
3163 adapter->net_stats.rx_packets = adapter->stats.gprc;
3164 adapter->net_stats.tx_packets = adapter->stats.gptc;
3165 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3166 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3167 adapter->net_stats.multicast = adapter->stats.mprc;
3168 adapter->net_stats.collisions = adapter->stats.colc;
3169
3170 /* Rx Errors */
3171
3172 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3173 adapter->stats.crcerrs + adapter->stats.algnerrc +
6b7660cd
JK		 3174 adapter->stats.rlec + adapter->stats.cexterr;
3175 adapter->net_stats.rx_dropped = 0;
1da177e4
LT		 3176 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3177 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3178 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3179 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3180
3181 /* Tx Errors */
3182
3183 adapter->net_stats.tx_errors = adapter->stats.ecol +
3184 adapter->stats.latecol;
3185 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3186 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3187 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3188
3189 /* Tx Dropped needs to be maintained elsewhere */
3190
3191 /* Phy Stats */
3192
96838a40
JB		 3193 if (hw->media_type == e1000_media_type_copper) {
3194 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3195 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3196 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3197 adapter->phy_stats.idle_errors += phy_tmp;
3198 }
3199
96838a40 3200 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3201 (hw->phy_type == e1000_phy_m88) &&
3202 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3203 adapter->phy_stats.receive_errors += phy_tmp;
3204 }
3205
3206 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3207}
3208
3209/**
3210 * e1000_intr - Interrupt Handler
3211 * @irq: interrupt number
3212 * @data: pointer to a network interface device structure
3213 * @pt_regs: CPU registers structure
3214 **/
3215
3216static irqreturn_t
3217e1000_intr(int irq, void *data, struct pt_regs *regs)
3218{
3219 struct net_device *netdev = data;
60490fe0 3220 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3221 struct e1000_hw *hw = &adapter->hw;
3222 uint32_t icr = E1000_READ_REG(hw, ICR);
1e613fd9 3223#ifndef CONFIG_E1000_NAPI
581d708e 3224 int i;
1e613fd9
JK		 3225#else
3226 /* Interrupt Auto-Mask...upon reading ICR,
3227 * interrupts are masked. No need for the
3228 * IMC write, but it does mean we should
3229 * account for it ASAP. */
3230 if (likely(hw->mac_type >= e1000_82571))
3231 atomic_inc(&adapter->irq_sem);
be2b28ed 3232#endif
1da177e4 3233
1e613fd9
JK		 3234 if (unlikely(!icr)) {
3235#ifdef CONFIG_E1000_NAPI
3236 if (hw->mac_type >= e1000_82571)
3237 e1000_irq_enable(adapter);
3238#endif
1da177e4 3239 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3240 }
1da177e4 3241
96838a40 3242 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4
LT		 3243 hw->get_link_status = 1;
3244 mod_timer(&adapter->watchdog_timer, jiffies);
3245 }
3246
3247#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3248 if (unlikely(hw->mac_type < e1000_82571)) {
3249 atomic_inc(&adapter->irq_sem);
3250 E1000_WRITE_REG(hw, IMC, ~0);
3251 E1000_WRITE_FLUSH(hw);
3252 }
581d708e
MC		 3253 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3254 __netif_rx_schedule(&adapter->polling_netdev[0]);
3255 else
3256 e1000_irq_enable(adapter);
c1605eb3 3257#else
1da177e4 3258 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3259 * Due to Hub Link bus being occupied, an interrupt
3260 * de-assertion message is not able to be sent.
3261 * When an interrupt assertion message is generated later,
3262 * two messages are re-ordered and sent out.
3263 * That causes APIC to think 82547 is in de-assertion
3264 * state, while 82547 is in assertion state, resulting
3265 * in dead lock. Writing IMC forces 82547 into
3266 * de-assertion state.
3267 */
3268 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3269 atomic_inc(&adapter->irq_sem);
2648345f 3270 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3271 }
3272
96838a40
JB		 3273 for (i = 0; i < E1000_MAX_INTR; i++)
3274 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3275 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3276 break;
3277
96838a40 3278 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3279 e1000_irq_enable(adapter);
581d708e 3280
c1605eb3 3281#endif
1da177e4
LT		 3282
3283 return IRQ_HANDLED;
3284}
3285
3286#ifdef CONFIG_E1000_NAPI
3287/**
3288 * e1000_clean - NAPI Rx polling callback
3289 * @adapter: board private structure
3290 **/
3291
3292static int
581d708e 3293e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3294{
581d708e
MC		 3295 struct e1000_adapter *adapter;
3296 int work_to_do = min(*budget, poll_dev->quota);
38bd3b26 3297 int tx_cleaned = 0, i = 0, work_done = 0;
581d708e
MC		 3298
3299 /* Must NOT use netdev_priv macro here. */
3300 adapter = poll_dev->priv;
3301
3302 /* Keep link state information with original netdev */
3303 if (!netif_carrier_ok(adapter->netdev))
3304 goto quit_polling;
2648345f 3305
581d708e
MC		 3306 while (poll_dev != &adapter->polling_netdev[i]) {
3307 i++;
f56799ea 3308 if (unlikely(i == adapter->num_rx_queues))
581d708e
MC		 3309 BUG();
3310 }
3311
8241e35e
JK		 3312 if (likely(adapter->num_tx_queues == 1)) {
3313 /* e1000_clean is called per-cpu. This lock protects
3314 * tx_ring[0] from being cleaned by multiple cpus
3315 * simultaneously. A failure obtaining the lock means
3316 * tx_ring[0] is currently being cleaned anyway. */
3317 if (spin_trylock(&adapter->tx_queue_lock)) {
3318 tx_cleaned = e1000_clean_tx_irq(adapter,
3319 &adapter->tx_ring[0]);
3320 spin_unlock(&adapter->tx_queue_lock);
3321 }
3322 } else
3323 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3324
581d708e
MC		 3325 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3326 &work_done, work_to_do);
1da177e4
LT		 3327
3328 *budget -= work_done;
581d708e 3329 poll_dev->quota -= work_done;
96838a40 3330
2b02893e 3331 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3332 if ((!tx_cleaned && (work_done == 0)) ||
581d708e
MC		 3333 !netif_running(adapter->netdev)) {
3334quit_polling:
3335 netif_rx_complete(poll_dev);
1da177e4
LT		 3336 e1000_irq_enable(adapter);
3337 return 0;
3338 }
3339
3340 return 1;
3341}
3342
3343#endif
3344/**
3345 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3346 * @adapter: board private structure
3347 **/
3348
3349static boolean_t
581d708e
MC		 3350e1000_clean_tx_irq(struct e1000_adapter *adapter,
3351 struct e1000_tx_ring *tx_ring)
1da177e4 3352{
1da177e4
LT		 3353 struct net_device *netdev = adapter->netdev;
3354 struct e1000_tx_desc *tx_desc, *eop_desc;
3355 struct e1000_buffer *buffer_info;
3356 unsigned int i, eop;
2a1af5d7
JK		 3357#ifdef CONFIG_E1000_NAPI
3358 unsigned int count = 0;
3359#endif
1da177e4
LT		 3360 boolean_t cleaned = FALSE;
3361
3362 i = tx_ring->next_to_clean;
3363 eop = tx_ring->buffer_info[i].next_to_watch;
3364 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3365
581d708e 3366 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3367 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3368 tx_desc = E1000_TX_DESC(*tx_ring, i);
3369 buffer_info = &tx_ring->buffer_info[i];
3370 cleaned = (i == eop);
3371
fd803241 3372 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3373 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3374
96838a40 3375 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3376 }
581d708e 3377
7bfa4816 3378
1da177e4
LT		 3379 eop = tx_ring->buffer_info[i].next_to_watch;
3380 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3381#ifdef CONFIG_E1000_NAPI
3382#define E1000_TX_WEIGHT 64
3383 /* weight of a sort for tx, to avoid endless transmit cleanup */
3384 if (count++ == E1000_TX_WEIGHT) break;
3385#endif
1da177e4
LT		 3386 }
3387
3388 tx_ring->next_to_clean = i;
3389
581d708e 3390 spin_lock(&tx_ring->tx_lock);
1da177e4 3391
96838a40 3392 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
1da177e4
LT		 3393 netif_carrier_ok(netdev)))
3394 netif_wake_queue(netdev);
3395
581d708e 3396 spin_unlock(&tx_ring->tx_lock);
2648345f 3397
581d708e 3398 if (adapter->detect_tx_hung) {
2648345f 3399 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3400 * check with the clearing of time_stamp and movement of i */
3401 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3402 if (tx_ring->buffer_info[eop].dma &&
3403 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3404 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3405 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3406 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3407
3408 /* detected Tx unit hang */
c6963ef5 3409 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3410 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3411 " TDH <%x>\n"
3412 " TDT <%x>\n"
3413 " next_to_use <%x>\n"
3414 " next_to_clean <%x>\n"
3415 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3416 " time_stamp <%lx>\n"
3417 " next_to_watch <%x>\n"
3418 " jiffies <%lx>\n"
3419 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3420 (unsigned long)((tx_ring - adapter->tx_ring) /
3421 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3422 readl(adapter->hw.hw_addr + tx_ring->tdh),
3423 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3424 tx_ring->next_to_use,
392137fa
JK		 3425 tx_ring->next_to_clean,
3426 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3427 eop,
3428 jiffies,
3429 eop_desc->upper.fields.status);
1da177e4 3430 netif_stop_queue(netdev);
70b8f1e1 3431 }
1da177e4 3432 }
1da177e4
LT		 3433 return cleaned;
3434}
3435
3436/**
3437 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3438 * @adapter: board private structure
3439 * @status_err: receive descriptor status and error fields
3440 * @csum: receive descriptor csum field
3441 * @sk_buff: socket buffer with received data
1da177e4
LT		 3442 **/
3443
3444static inline void
3445e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3446 uint32_t status_err, uint32_t csum,
3447 struct sk_buff *skb)
1da177e4 3448{
2d7edb92
MC		 3449 uint16_t status = (uint16_t)status_err;
3450 uint8_t errors = (uint8_t)(status_err >> 24);
3451 skb->ip_summed = CHECKSUM_NONE;
3452
1da177e4 3453 /* 82543 or newer only */
96838a40 3454 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3455 /* Ignore Checksum bit is set */
96838a40 3456 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3457 /* TCP/UDP checksum error bit is set */
96838a40 3458 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3459 /* let the stack verify checksum errors */
1da177e4 3460 adapter->hw_csum_err++;
2d7edb92
MC		 3461 return;
3462 }
3463 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3464 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3465 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3466 return;
1da177e4 3467 } else {
96838a40 3468 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3469 return;
3470 }
3471 /* It must be a TCP or UDP packet with a valid checksum */
3472 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3473 /* TCP checksum is good */
3474 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3475 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3476 /* IP fragment with UDP payload */
3477 /* Hardware complements the payload checksum, so we undo it
3478 * and then put the value in host order for further stack use.
3479 */
3480 csum = ntohl(csum ^ 0xFFFF);
3481 skb->csum = csum;
3482 skb->ip_summed = CHECKSUM_HW;
1da177e4 3483 }
2d7edb92 3484 adapter->hw_csum_good++;
1da177e4
LT		 3485}
3486
3487/**
2d7edb92 3488 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3489 * @adapter: board private structure
3490 **/
3491
3492static boolean_t
3493#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3494e1000_clean_rx_irq(struct e1000_adapter *adapter,
3495 struct e1000_rx_ring *rx_ring,
3496 int *work_done, int work_to_do)
1da177e4 3497#else
581d708e
MC		 3498e1000_clean_rx_irq(struct e1000_adapter *adapter,
3499 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3500#endif
3501{
1da177e4
LT		 3502 struct net_device *netdev = adapter->netdev;
3503 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3504 struct e1000_rx_desc *rx_desc, *next_rxd;
3505 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3506 unsigned long flags;
3507 uint32_t length;
3508 uint8_t last_byte;
3509 unsigned int i;
72d64a43 3510 int cleaned_count = 0;
a1415ee6 3511 boolean_t cleaned = FALSE;
1da177e4
LT		 3512
3513 i = rx_ring->next_to_clean;
3514 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3515 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3516
b92ff8ee 3517 while (rx_desc->status & E1000_RXD_STAT_DD) {
86c3d59f 3518 struct sk_buff *skb, *next_skb;
a292ca6e 3519 u8 status;
1da177e4 3520#ifdef CONFIG_E1000_NAPI
96838a40 3521 if (*work_done >= work_to_do)
1da177e4
LT		 3522 break;
3523 (*work_done)++;
3524#endif
a292ca6e 3525 status = rx_desc->status;
b92ff8ee 3526 skb = buffer_info->skb;
86c3d59f
JB		 3527 buffer_info->skb = NULL;
3528
3529 if (++i == rx_ring->count) i = 0;
3530 next_rxd = E1000_RX_DESC(*rx_ring, i);
3531 next_buffer = &rx_ring->buffer_info[i];
3532 next_skb = next_buffer->skb;
3533
72d64a43
JK		 3534 cleaned = TRUE;
3535 cleaned_count++;
a292ca6e
JK		 3536 pci_unmap_single(pdev,
3537 buffer_info->dma,
3538 buffer_info->length,
1da177e4
LT		 3539 PCI_DMA_FROMDEVICE);
3540
1da177e4
LT		 3541 length = le16_to_cpu(rx_desc->length);
3542
a1415ee6
JK		 3543 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3544 /* All receives must fit into a single buffer */
3545 E1000_DBG("%s: Receive packet consumed multiple"
3546 " buffers\n", netdev->name);
3547 dev_kfree_skb_irq(skb);
1da177e4
LT		 3548 goto next_desc;
3549 }
3550
96838a40 3551 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3552 last_byte = *(skb->data + length - 1);
b92ff8ee 3553 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3554 rx_desc->errors, length, last_byte)) {
3555 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3556 e1000_tbi_adjust_stats(&adapter->hw,
3557 &adapter->stats,
1da177e4
LT		 3558 length, skb->data);
3559 spin_unlock_irqrestore(&adapter->stats_lock,
3560 flags);
3561 length--;
3562 } else {
3563 dev_kfree_skb_irq(skb);
3564 goto next_desc;
3565 }
3566 }
3567
a292ca6e
JK		 3568 /* code added for copybreak, this should improve
3569 * performance for small packets with large amounts
3570 * of reassembly being done in the stack */
3571#define E1000_CB_LENGTH 256
a1415ee6 3572 if (length < E1000_CB_LENGTH) {
a292ca6e
JK		 3573 struct sk_buff *new_skb =
3574 dev_alloc_skb(length + NET_IP_ALIGN);
3575 if (new_skb) {
3576 skb_reserve(new_skb, NET_IP_ALIGN);
3577 new_skb->dev = netdev;
3578 memcpy(new_skb->data - NET_IP_ALIGN,
3579 skb->data - NET_IP_ALIGN,
3580 length + NET_IP_ALIGN);
3581 /* save the skb in buffer_info as good */
3582 buffer_info->skb = skb;
3583 skb = new_skb;
3584 skb_put(skb, length);
3585 }
a1415ee6
JK		 3586 } else
3587 skb_put(skb, length);
a292ca6e
JK		 3588
3589 /* end copybreak code */
1da177e4
LT		 3590
3591 /* Receive Checksum Offload */
a292ca6e
JK		 3592 e1000_rx_checksum(adapter,
3593 (uint32_t)(status) |
2d7edb92
MC		 3594 ((uint32_t)(rx_desc->errors) << 24),
3595 rx_desc->csum, skb);
96838a40 3596
1da177e4
LT		 3597 skb->protocol = eth_type_trans(skb, netdev);
3598#ifdef CONFIG_E1000_NAPI
96838a40 3599 if (unlikely(adapter->vlgrp &&
a292ca6e 3600 (status & E1000_RXD_STAT_VP))) {
1da177e4 3601 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3602 le16_to_cpu(rx_desc->special) &
3603 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3604 } else {
3605 netif_receive_skb(skb);
3606 }
3607#else /* CONFIG_E1000_NAPI */
96838a40 3608 if (unlikely(adapter->vlgrp &&
b92ff8ee 3609 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3610 vlan_hwaccel_rx(skb, adapter->vlgrp,
3611 le16_to_cpu(rx_desc->special) &
3612 E1000_RXD_SPC_VLAN_MASK);
3613 } else {
3614 netif_rx(skb);
3615 }
3616#endif /* CONFIG_E1000_NAPI */
3617 netdev->last_rx = jiffies;
3618
3619next_desc:
3620 rx_desc->status = 0;
1da177e4 3621
72d64a43
JK		 3622 /* return some buffers to hardware, one at a time is too slow */
3623 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3624 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3625 cleaned_count = 0;
3626 }
3627
86c3d59f
JB		 3628 rx_desc = next_rxd;
3629 buffer_info = next_buffer;
1da177e4 3630 }
1da177e4 3631 rx_ring->next_to_clean = i;
72d64a43
JK		 3632
3633 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3634 if (cleaned_count)
3635 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3636
3637 return cleaned;
3638}
3639
3640/**
3641 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3642 * @adapter: board private structure
3643 **/
3644
3645static boolean_t
3646#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3647e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3648 struct e1000_rx_ring *rx_ring,
3649 int *work_done, int work_to_do)
2d7edb92 3650#else
581d708e
MC		 3651e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3652 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3653#endif
3654{
86c3d59f 3655 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3656 struct net_device *netdev = adapter->netdev;
3657 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3658 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3659 struct e1000_ps_page *ps_page;
3660 struct e1000_ps_page_dma *ps_page_dma;
86c3d59f 3661 struct sk_buff *skb, *next_skb;
2d7edb92
MC		 3662 unsigned int i, j;
3663 uint32_t length, staterr;
72d64a43 3664 int cleaned_count = 0;
2d7edb92
MC		 3665 boolean_t cleaned = FALSE;
3666
3667 i = rx_ring->next_to_clean;
3668 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3669 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
86c3d59f 3670 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3671
96838a40 3672 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3673 ps_page = &rx_ring->ps_page[i];
3674 ps_page_dma = &rx_ring->ps_page_dma[i];
3675#ifdef CONFIG_E1000_NAPI
96838a40 3676 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3677 break;
3678 (*work_done)++;
3679#endif
86c3d59f
JB		 3680 skb = buffer_info->skb;
3681
3682 if (++i == rx_ring->count) i = 0;
3683 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
3684 next_buffer = &rx_ring->buffer_info[i];
3685 next_skb = next_buffer->skb;
3686
2d7edb92 3687 cleaned = TRUE;
72d64a43 3688 cleaned_count++;
2d7edb92
MC		 3689 pci_unmap_single(pdev, buffer_info->dma,
3690 buffer_info->length,
3691 PCI_DMA_FROMDEVICE);
3692
96838a40 3693 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3694 E1000_DBG("%s: Packet Split buffers didn't pick up"
3695 " the full packet\n", netdev->name);
3696 dev_kfree_skb_irq(skb);
3697 goto next_desc;
3698 }
1da177e4 3699
96838a40 3700 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3701 dev_kfree_skb_irq(skb);
3702 goto next_desc;
3703 }
3704
3705 length = le16_to_cpu(rx_desc->wb.middle.length0);
3706
96838a40 3707 if (unlikely(!length)) {
2d7edb92
MC		 3708 E1000_DBG("%s: Last part of the packet spanning"
3709 " multiple descriptors\n", netdev->name);
3710 dev_kfree_skb_irq(skb);
3711 goto next_desc;
3712 }
3713
3714 /* Good Receive */
3715 skb_put(skb, length);
3716
96838a40
JB		 3717 for (j = 0; j < adapter->rx_ps_pages; j++) {
3718 if (!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92
MC		 3719 break;
3720
3721 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3722 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3723 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 3724 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3725 length);
2d7edb92 3726 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 3727 skb->len += length;
3728 skb->data_len += length;
3729 }
3730
3731 e1000_rx_checksum(adapter, staterr,
3732 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3733 skb->protocol = eth_type_trans(skb, netdev);
3734
96838a40 3735 if (likely(rx_desc->wb.upper.header_status &
b92ff8ee 3736 E1000_RXDPS_HDRSTAT_HDRSP))
e4c811c9 3737 adapter->rx_hdr_split++;
2d7edb92 3738#ifdef CONFIG_E1000_NAPI
96838a40 3739 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3740 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3741 le16_to_cpu(rx_desc->wb.middle.vlan) &
3742 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3743 } else {
3744 netif_receive_skb(skb);
3745 }
3746#else /* CONFIG_E1000_NAPI */
96838a40 3747 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3748 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3749 le16_to_cpu(rx_desc->wb.middle.vlan) &
3750 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3751 } else {
3752 netif_rx(skb);
3753 }
3754#endif /* CONFIG_E1000_NAPI */
3755 netdev->last_rx = jiffies;
3756
3757next_desc:
3758 rx_desc->wb.middle.status_error &= ~0xFF;
3759 buffer_info->skb = NULL;
2d7edb92 3760
72d64a43
JK		 3761 /* return some buffers to hardware, one at a time is too slow */
3762 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3763 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3764 cleaned_count = 0;
3765 }
3766
86c3d59f
JB		 3767 rx_desc = next_rxd;
3768 buffer_info = next_buffer;
3769
683a38f3 3770 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3771 }
3772 rx_ring->next_to_clean = i;
72d64a43
JK		 3773
3774 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3775 if (cleaned_count)
3776 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3777
3778 return cleaned;
3779}
3780
3781/**
2d7edb92 3782 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3783 * @adapter: address of board private structure
3784 **/
3785
3786static void
581d708e 3787e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 3788 struct e1000_rx_ring *rx_ring,
a292ca6e 3789 int cleaned_count)
1da177e4 3790{
1da177e4
LT		 3791 struct net_device *netdev = adapter->netdev;
3792 struct pci_dev *pdev = adapter->pdev;
3793 struct e1000_rx_desc *rx_desc;
3794 struct e1000_buffer *buffer_info;
3795 struct sk_buff *skb;
2648345f
MC		 3796 unsigned int i;
3797 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3798
3799 i = rx_ring->next_to_use;
3800 buffer_info = &rx_ring->buffer_info[i];
3801
a292ca6e
JK		 3802 while (cleaned_count--) {
3803 if (!(skb = buffer_info->skb))
3804 skb = dev_alloc_skb(bufsz);
3805 else {
3806 skb_trim(skb, 0);
3807 goto map_skb;
3808 }
3809
2648345f 3810
96838a40 3811 if (unlikely(!skb)) {
1da177e4 3812 /* Better luck next round */
72d64a43 3813 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 3814 break;
3815 }
3816
2648345f 3817 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 3818 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3819 struct sk_buff *oldskb = skb;
2648345f
MC		 3820 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3821 "at %p\n", bufsz, skb->data);
3822 /* Try again, without freeing the previous */
1da177e4 3823 skb = dev_alloc_skb(bufsz);
2648345f 3824 /* Failed allocation, critical failure */
1da177e4
LT		 3825 if (!skb) {
3826 dev_kfree_skb(oldskb);
3827 break;
3828 }
2648345f 3829
1da177e4
LT		 3830 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3831 /* give up */
3832 dev_kfree_skb(skb);
3833 dev_kfree_skb(oldskb);
3834 break; /* while !buffer_info->skb */
3835 } else {
2648345f 3836 /* Use new allocation */
1da177e4
LT		 3837 dev_kfree_skb(oldskb);
3838 }
3839 }
1da177e4
LT		 3840 /* Make buffer alignment 2 beyond a 16 byte boundary
3841 * this will result in a 16 byte aligned IP header after
3842 * the 14 byte MAC header is removed
3843 */
3844 skb_reserve(skb, NET_IP_ALIGN);
3845
3846 skb->dev = netdev;
3847
3848 buffer_info->skb = skb;
3849 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 3850map_skb:
1da177e4
LT		 3851 buffer_info->dma = pci_map_single(pdev,
3852 skb->data,
3853 adapter->rx_buffer_len,
3854 PCI_DMA_FROMDEVICE);
3855
2648345f
MC		 3856 /* Fix for errata 23, can't cross 64kB boundary */
3857 if (!e1000_check_64k_bound(adapter,
3858 (void *)(unsigned long)buffer_info->dma,
3859 adapter->rx_buffer_len)) {
3860 DPRINTK(RX_ERR, ERR,
3861 "dma align check failed: %u bytes at %p\n",
3862 adapter->rx_buffer_len,
3863 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 3864 dev_kfree_skb(skb);
3865 buffer_info->skb = NULL;
3866
2648345f 3867 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 3868 adapter->rx_buffer_len,
3869 PCI_DMA_FROMDEVICE);
3870
3871 break; /* while !buffer_info->skb */
3872 }
1da177e4
LT		 3873 rx_desc = E1000_RX_DESC(*rx_ring, i);
3874 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3875
96838a40
JB		 3876 if (unlikely(++i == rx_ring->count))
3877 i = 0;
1da177e4
LT		 3878 buffer_info = &rx_ring->buffer_info[i];
3879 }
3880
b92ff8ee
JB		 3881 if (likely(rx_ring->next_to_use != i)) {
3882 rx_ring->next_to_use = i;
3883 if (unlikely(i-- == 0))
3884 i = (rx_ring->count - 1);
3885
3886 /* Force memory writes to complete before letting h/w
3887 * know there are new descriptors to fetch. (Only
3888 * applicable for weak-ordered memory model archs,
3889 * such as IA-64). */
3890 wmb();
3891 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3892 }
1da177e4
LT		 3893}
3894
2d7edb92
MC		 3895/**
3896 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3897 * @adapter: address of board private structure
3898 **/
3899
3900static void
581d708e 3901e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 3902 struct e1000_rx_ring *rx_ring,
3903 int cleaned_count)
2d7edb92 3904{
2d7edb92
MC		 3905 struct net_device *netdev = adapter->netdev;
3906 struct pci_dev *pdev = adapter->pdev;
3907 union e1000_rx_desc_packet_split *rx_desc;
3908 struct e1000_buffer *buffer_info;
3909 struct e1000_ps_page *ps_page;
3910 struct e1000_ps_page_dma *ps_page_dma;
3911 struct sk_buff *skb;
3912 unsigned int i, j;
3913
3914 i = rx_ring->next_to_use;
3915 buffer_info = &rx_ring->buffer_info[i];
3916 ps_page = &rx_ring->ps_page[i];
3917 ps_page_dma = &rx_ring->ps_page_dma[i];
3918
72d64a43 3919 while (cleaned_count--) {
2d7edb92
MC		 3920 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3921
96838a40 3922 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 3923 if (j < adapter->rx_ps_pages) {
3924 if (likely(!ps_page->ps_page[j])) {
3925 ps_page->ps_page[j] =
3926 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 3927 if (unlikely(!ps_page->ps_page[j])) {
3928 adapter->alloc_rx_buff_failed++;
e4c811c9 3929 goto no_buffers;
b92ff8ee 3930 }
e4c811c9
MC		 3931 ps_page_dma->ps_page_dma[j] =
3932 pci_map_page(pdev,
3933 ps_page->ps_page[j],
3934 0, PAGE_SIZE,
3935 PCI_DMA_FROMDEVICE);
3936 }
3937 /* Refresh the desc even if buffer_addrs didn't
96838a40 3938 * change because each write-back erases
e4c811c9
MC		 3939 * this info.
3940 */
3941 rx_desc->read.buffer_addr[j+1] =
3942 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
3943 } else
3944 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 3945 }
3946
3947 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
3948
b92ff8ee
JB		 3949 if (unlikely(!skb)) {
3950 adapter->alloc_rx_buff_failed++;
2d7edb92 3951 break;
b92ff8ee 3952 }
2d7edb92
MC		 3953
3954 /* Make buffer alignment 2 beyond a 16 byte boundary
3955 * this will result in a 16 byte aligned IP header after
3956 * the 14 byte MAC header is removed
3957 */
3958 skb_reserve(skb, NET_IP_ALIGN);
3959
3960 skb->dev = netdev;
3961
3962 buffer_info->skb = skb;
3963 buffer_info->length = adapter->rx_ps_bsize0;
3964 buffer_info->dma = pci_map_single(pdev, skb->data,
3965 adapter->rx_ps_bsize0,
3966 PCI_DMA_FROMDEVICE);
3967
3968 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
3969
96838a40 3970 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 3971 buffer_info = &rx_ring->buffer_info[i];
3972 ps_page = &rx_ring->ps_page[i];
3973 ps_page_dma = &rx_ring->ps_page_dma[i];
3974 }
3975
3976no_buffers:
b92ff8ee
JB		 3977 if (likely(rx_ring->next_to_use != i)) {
3978 rx_ring->next_to_use = i;
3979 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
3980
3981 /* Force memory writes to complete before letting h/w
3982 * know there are new descriptors to fetch. (Only
3983 * applicable for weak-ordered memory model archs,
3984 * such as IA-64). */
3985 wmb();
3986 /* Hardware increments by 16 bytes, but packet split
3987 * descriptors are 32 bytes...so we increment tail
3988 * twice as much.
3989 */
3990 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
3991 }
2d7edb92
MC		 3992}
3993
1da177e4
LT		 3994/**
3995 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
3996 * @adapter:
3997 **/
3998
3999static void
4000e1000_smartspeed(struct e1000_adapter *adapter)
4001{
4002 uint16_t phy_status;
4003 uint16_t phy_ctrl;
4004
96838a40 4005 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4006 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4007 return;
4008
96838a40 4009 if (adapter->smartspeed == 0) {
1da177e4
LT		 4010 /* If Master/Slave config fault is asserted twice,
4011 * we assume back-to-back */
4012 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4013 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4014 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4015 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4016 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4017 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4018 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4019 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4020 phy_ctrl);
4021 adapter->smartspeed++;
96838a40 4022 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4023 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4024 &phy_ctrl)) {
4025 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4026 MII_CR_RESTART_AUTO_NEG);
4027 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4028 phy_ctrl);
4029 }
4030 }
4031 return;
96838a40 4032 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4033 /* If still no link, perhaps using 2/3 pair cable */
4034 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4035 phy_ctrl |= CR_1000T_MS_ENABLE;
4036 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4037 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4038 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4039 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4040 MII_CR_RESTART_AUTO_NEG);
4041 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4042 }
4043 }
4044 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4045 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4046 adapter->smartspeed = 0;
4047}
4048
4049/**
4050 * e1000_ioctl -
4051 * @netdev:
4052 * @ifreq:
4053 * @cmd:
4054 **/
4055
4056static int
4057e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4058{
4059 switch (cmd) {
4060 case SIOCGMIIPHY:
4061 case SIOCGMIIREG:
4062 case SIOCSMIIREG:
4063 return e1000_mii_ioctl(netdev, ifr, cmd);
4064 default:
4065 return -EOPNOTSUPP;
4066 }
4067}
4068
4069/**
4070 * e1000_mii_ioctl -
4071 * @netdev:
4072 * @ifreq:
4073 * @cmd:
4074 **/
4075
4076static int
4077e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4078{
60490fe0 4079 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4080 struct mii_ioctl_data *data = if_mii(ifr);
4081 int retval;
4082 uint16_t mii_reg;
4083 uint16_t spddplx;
97876fc6 4084 unsigned long flags;
1da177e4 4085
96838a40 4086 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4087 return -EOPNOTSUPP;
4088
4089 switch (cmd) {
4090 case SIOCGMIIPHY:
4091 data->phy_id = adapter->hw.phy_addr;
4092 break;
4093 case SIOCGMIIREG:
96838a40 4094 if (!capable(CAP_NET_ADMIN))
1da177e4 4095 return -EPERM;
97876fc6 4096 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4097 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4098 &data->val_out)) {
4099 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4100 return -EIO;
97876fc6
MC		 4101 }
4102 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4103 break;
4104 case SIOCSMIIREG:
96838a40 4105 if (!capable(CAP_NET_ADMIN))
1da177e4 4106 return -EPERM;
96838a40 4107 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4108 return -EFAULT;
4109 mii_reg = data->val_in;
97876fc6 4110 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4111 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4112 mii_reg)) {
4113 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4114 return -EIO;
97876fc6 4115 }
96838a40 4116 if (adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT		 4117 switch (data->reg_num) {
4118 case PHY_CTRL:
96838a40 4119 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4120 break;
96838a40 4121 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4122 adapter->hw.autoneg = 1;
4123 adapter->hw.autoneg_advertised = 0x2F;
4124 } else {
4125 if (mii_reg & 0x40)
4126 spddplx = SPEED_1000;
4127 else if (mii_reg & 0x2000)
4128 spddplx = SPEED_100;
4129 else
4130 spddplx = SPEED_10;
4131 spddplx += (mii_reg & 0x100)
4132 ? FULL_DUPLEX :
4133 HALF_DUPLEX;
4134 retval = e1000_set_spd_dplx(adapter,
4135 spddplx);
96838a40 4136 if (retval) {
97876fc6 4137 spin_unlock_irqrestore(
96838a40 4138 &adapter->stats_lock,
97876fc6 4139 flags);
1da177e4 4140 return retval;
97876fc6 4141 }
1da177e4 4142 }
96838a40 4143 if (netif_running(adapter->netdev)) {
1da177e4
LT		 4144 e1000_down(adapter);
4145 e1000_up(adapter);
4146 } else
4147 e1000_reset(adapter);
4148 break;
4149 case M88E1000_PHY_SPEC_CTRL:
4150 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4151 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4152 spin_unlock_irqrestore(
4153 &adapter->stats_lock, flags);
1da177e4 4154 return -EIO;
97876fc6 4155 }
1da177e4
LT		 4156 break;
4157 }
4158 } else {
4159 switch (data->reg_num) {
4160 case PHY_CTRL:
96838a40 4161 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4162 break;
96838a40 4163 if (netif_running(adapter->netdev)) {
1da177e4
LT		 4164 e1000_down(adapter);
4165 e1000_up(adapter);
4166 } else
4167 e1000_reset(adapter);
4168 break;
4169 }
4170 }
97876fc6 4171 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4172 break;
4173 default:
4174 return -EOPNOTSUPP;
4175 }
4176 return E1000_SUCCESS;
4177}
4178
4179void
4180e1000_pci_set_mwi(struct e1000_hw *hw)
4181{
4182 struct e1000_adapter *adapter = hw->back;
2648345f 4183 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4184
96838a40 4185 if (ret_val)
2648345f 4186 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4187}
4188
4189void
4190e1000_pci_clear_mwi(struct e1000_hw *hw)
4191{
4192 struct e1000_adapter *adapter = hw->back;
4193
4194 pci_clear_mwi(adapter->pdev);
4195}
4196
4197void
4198e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4199{
4200 struct e1000_adapter *adapter = hw->back;
4201
4202 pci_read_config_word(adapter->pdev, reg, value);
4203}
4204
4205void
4206e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4207{
4208 struct e1000_adapter *adapter = hw->back;
4209
4210 pci_write_config_word(adapter->pdev, reg, *value);
4211}
4212
4213uint32_t
4214e1000_io_read(struct e1000_hw *hw, unsigned long port)
4215{
4216 return inl(port);
4217}
4218
4219void
4220e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4221{
4222 outl(value, port);
4223}
4224
4225static void
4226e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4227{
60490fe0 4228 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4229 uint32_t ctrl, rctl;
4230
4231 e1000_irq_disable(adapter);
4232 adapter->vlgrp = grp;
4233
96838a40 4234 if (grp) {
1da177e4
LT		 4235 /* enable VLAN tag insert/strip */
4236 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4237 ctrl |= E1000_CTRL_VME;
4238 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4239
4240 /* enable VLAN receive filtering */
4241 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4242 rctl |= E1000_RCTL_VFE;
4243 rctl &= ~E1000_RCTL_CFIEN;
4244 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4245 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4246 } else {
4247 /* disable VLAN tag insert/strip */
4248 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4249 ctrl &= ~E1000_CTRL_VME;
4250 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4251
4252 /* disable VLAN filtering */
4253 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4254 rctl &= ~E1000_RCTL_VFE;
4255 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4256 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4257 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4258 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4259 }
1da177e4
LT		 4260 }
4261
4262 e1000_irq_enable(adapter);
4263}
4264
4265static void
4266e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4267{
60490fe0 4268 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4269 uint32_t vfta, index;
96838a40
JB		 4270
4271 if ((adapter->hw.mng_cookie.status &
4272 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4273 (vid == adapter->mng_vlan_id))
2d7edb92 4274 return;
1da177e4
LT		 4275 /* add VID to filter table */
4276 index = (vid >> 5) & 0x7F;
4277 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4278 vfta |= (1 << (vid & 0x1F));
4279 e1000_write_vfta(&adapter->hw, index, vfta);
4280}
4281
4282static void
4283e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4284{
60490fe0 4285 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4286 uint32_t vfta, index;
4287
4288 e1000_irq_disable(adapter);
4289
96838a40 4290 if (adapter->vlgrp)
1da177e4
LT		 4291 adapter->vlgrp->vlan_devices[vid] = NULL;
4292
4293 e1000_irq_enable(adapter);
4294
96838a40
JB		 4295 if ((adapter->hw.mng_cookie.status &
4296 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4297 (vid == adapter->mng_vlan_id)) {
4298 /* release control to f/w */
4299 e1000_release_hw_control(adapter);
2d7edb92 4300 return;
ff147013
JK		 4301 }
4302
1da177e4
LT		 4303 /* remove VID from filter table */
4304 index = (vid >> 5) & 0x7F;
4305 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4306 vfta &= ~(1 << (vid & 0x1F));
4307 e1000_write_vfta(&adapter->hw, index, vfta);
4308}
4309
4310static void
4311e1000_restore_vlan(struct e1000_adapter *adapter)
4312{
4313 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4314
96838a40 4315 if (adapter->vlgrp) {
1da177e4 4316 uint16_t vid;
96838a40
JB		 4317 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4318 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4319 continue;
4320 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4321 }
4322 }
4323}
4324
4325int
4326e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4327{
4328 adapter->hw.autoneg = 0;
4329
6921368f 4330 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4331 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4332 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4333 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4334 return -EINVAL;
4335 }
4336
96838a40 4337 switch (spddplx) {
1da177e4
LT		 4338 case SPEED_10 + DUPLEX_HALF:
4339 adapter->hw.forced_speed_duplex = e1000_10_half;
4340 break;
4341 case SPEED_10 + DUPLEX_FULL:
4342 adapter->hw.forced_speed_duplex = e1000_10_full;
4343 break;
4344 case SPEED_100 + DUPLEX_HALF:
4345 adapter->hw.forced_speed_duplex = e1000_100_half;
4346 break;
4347 case SPEED_100 + DUPLEX_FULL:
4348 adapter->hw.forced_speed_duplex = e1000_100_full;
4349 break;
4350 case SPEED_1000 + DUPLEX_FULL:
4351 adapter->hw.autoneg = 1;
4352 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4353 break;
4354 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4355 default:
2648345f 4356 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4357 return -EINVAL;
4358 }
4359 return 0;
4360}
4361
b6a1d5f8 4362#ifdef CONFIG_PM
2f82665f
JB		 4363/* these functions save and restore 16 or 64 dwords (64-256 bytes) of config
4364 * space versus the 64 bytes that pci_[save|restore]_state handle
4365 */
4366#define PCIE_CONFIG_SPACE_LEN 256
4367#define PCI_CONFIG_SPACE_LEN 64
4368static int
4369e1000_pci_save_state(struct e1000_adapter *adapter)
4370{
4371 struct pci_dev *dev = adapter->pdev;
4372 int size;
4373 int i;
4374 if (adapter->hw.mac_type >= e1000_82571)
4375 size = PCIE_CONFIG_SPACE_LEN;
4376 else
4377 size = PCI_CONFIG_SPACE_LEN;
4378
4379 WARN_ON(adapter->config_space != NULL);
4380
4381 adapter->config_space = kmalloc(size, GFP_KERNEL);
4382 if (!adapter->config_space) {
4383 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4384 return -ENOMEM;
4385 }
4386 for (i = 0; i < (size / 4); i++)
4387 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4388 return 0;
4389}
4390
4391static void
4392e1000_pci_restore_state(struct e1000_adapter *adapter)
4393{
4394 struct pci_dev *dev = adapter->pdev;
4395 int size;
4396 int i;
4397 if (adapter->config_space == NULL)
4398 return;
4399 if (adapter->hw.mac_type >= e1000_82571)
4400 size = PCIE_CONFIG_SPACE_LEN;
4401 else
4402 size = PCI_CONFIG_SPACE_LEN;
4403 for (i = 0; i < (size / 4); i++)
4404 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4405 kfree(adapter->config_space);
4406 adapter->config_space = NULL;
4407 return;
4408}
4409#endif /* CONFIG_PM */
4410
1da177e4 4411static int
829ca9a3 4412e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4413{
4414 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4415 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4416 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4417 uint32_t wufc = adapter->wol;
240b1710 4418 int retval = 0;
1da177e4
LT		 4419
4420 netif_device_detach(netdev);
4421
96838a40 4422 if (netif_running(netdev))
1da177e4
LT		 4423 e1000_down(adapter);
4424
2f82665f
JB		 4425#ifdef CONFIG_PM
4426 /* implement our own version of pci_save_state(pdev) because pci
4427 * express adapters have larger 256 byte config spaces */
4428 retval = e1000_pci_save_state(adapter);
4429 if (retval)
4430 return retval;
4431#endif
4432
1da177e4 4433 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4434 if (status & E1000_STATUS_LU)
1da177e4
LT		 4435 wufc &= ~E1000_WUFC_LNKC;
4436
96838a40 4437 if (wufc) {
1da177e4
LT		 4438 e1000_setup_rctl(adapter);
4439 e1000_set_multi(netdev);
4440
4441 /* turn on all-multi mode if wake on multicast is enabled */
96838a40 4442 if (adapter->wol & E1000_WUFC_MC) {
1da177e4
LT		 4443 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4444 rctl |= E1000_RCTL_MPE;
4445 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4446 }
4447
96838a40 4448 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4449 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4450 /* advertise wake from D3Cold */
4451 #define E1000_CTRL_ADVD3WUC 0x00100000
4452 /* phy power management enable */
4453 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4454 ctrl |= E1000_CTRL_ADVD3WUC |
4455 E1000_CTRL_EN_PHY_PWR_MGMT;
4456 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4457 }
4458
96838a40 4459 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4460 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4461 /* keep the laser running in D3 */
4462 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4463 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4464 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4465 }
4466
2d7edb92
MC		 4467 /* Allow time for pending master requests to run */
4468 e1000_disable_pciex_master(&adapter->hw);
4469
1da177e4
LT		 4470 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4471 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
240b1710
JK		 4472 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4473 if (retval)
4474 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4475 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4476 if (retval)
4477 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4478 } else {
4479 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4480 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
240b1710
JK		 4481 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4482 if (retval)
4483 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4484 retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
4485 if (retval)
4486 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4487 }
4488
96838a40 4489 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4490 adapter->hw.media_type == e1000_media_type_copper) {
4491 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4492 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4493 manc |= E1000_MANC_ARP_EN;
4494 E1000_WRITE_REG(&adapter->hw, MANC, manc);
240b1710
JK		 4495 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4496 if (retval)
4497 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4498 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4499 if (retval)
4500 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4501 }
4502 }
4503
b55ccb35
JK		 4504 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4505 * would have already happened in close and is redundant. */
4506 e1000_release_hw_control(adapter);
2d7edb92 4507
1da177e4 4508 pci_disable_device(pdev);
240b1710
JK		 4509
4510 retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
4511 if (retval)
4512 DPRINTK(PROBE, ERR, "Error in setting power state\n");
1da177e4
LT		 4513
4514 return 0;
4515}
4516
2f82665f 4517#ifdef CONFIG_PM
1da177e4
LT		 4518static int
4519e1000_resume(struct pci_dev *pdev)
4520{
4521 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4522 struct e1000_adapter *adapter = netdev_priv(netdev);
240b1710 4523 int retval;
b55ccb35 4524 uint32_t manc, ret_val;
1da177e4 4525
240b1710
JK		 4526 retval = pci_set_power_state(pdev, PCI_D0);
4527 if (retval)
4528 DPRINTK(PROBE, ERR, "Error in setting power state\n");
2f82665f 4529 e1000_pci_restore_state(adapter);
2b02893e 4530 ret_val = pci_enable_device(pdev);
a4cb847d 4531 pci_set_master(pdev);
1da177e4 4532
240b1710
JK		 4533 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4534 if (retval)
4535 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4536 retval = pci_enable_wake(pdev, PCI_D3cold, 0);
4537 if (retval)
4538 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4539
4540 e1000_reset(adapter);
4541 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4542
96838a40 4543 if (netif_running(netdev))
1da177e4
LT		 4544 e1000_up(adapter);
4545
4546 netif_device_attach(netdev);
4547
96838a40 4548 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4549 adapter->hw.media_type == e1000_media_type_copper) {
4550 manc = E1000_READ_REG(&adapter->hw, MANC);
4551 manc &= ~(E1000_MANC_ARP_EN);
4552 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4553 }
4554
b55ccb35
JK		 4555 /* If the controller is 82573 and f/w is AMT, do not set
4556 * DRV_LOAD until the interface is up. For all other cases,
4557 * let the f/w know that the h/w is now under the control
4558 * of the driver. */
4559 if (adapter->hw.mac_type != e1000_82573 ||
4560 !e1000_check_mng_mode(&adapter->hw))
4561 e1000_get_hw_control(adapter);
2d7edb92 4562
1da177e4
LT		 4563 return 0;
4564}
4565#endif
1da177e4
LT		 4566#ifdef CONFIG_NET_POLL_CONTROLLER
4567/*
4568 * Polling 'interrupt' - used by things like netconsole to send skbs
4569 * without having to re-enable interrupts. It's not called while
4570 * the interrupt routine is executing.
4571 */
4572static void
2648345f 4573e1000_netpoll(struct net_device *netdev)
1da177e4 4574{
60490fe0 4575 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4576 disable_irq(adapter->pdev->irq);
4577 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4578 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4579#ifndef CONFIG_E1000_NAPI
4580 adapter->clean_rx(adapter, adapter->rx_ring);
4581#endif
1da177e4
LT		 4582 enable_irq(adapter->pdev->irq);
4583}
4584#endif
4585
4586/* e1000_main.c */
Linux kernel - Deliverables
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