Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
0abb6eb1 AK |
3 | Intel PRO/1000 Linux driver |
4 | Copyright(c) 1999 - 2006 Intel Corporation. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
1da177e4 | 13 | more details. |
0abb6eb1 | 14 | |
1da177e4 | 15 | You should have received a copy of the GNU General Public License along with |
0abb6eb1 AK |
16 | this program; if not, write to the Free Software Foundation, Inc., |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
1da177e4 LT |
22 | Contact Information: |
23 | Linux NICS <linux.nics@intel.com> | |
3d41e30a | 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
1da177e4 LT |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | #include "e1000.h" | |
d0bb53e1 | 30 | #include <net/ip6_checksum.h> |
1da177e4 | 31 | |
1da177e4 | 32 | char e1000_driver_name[] = "e1000"; |
3ad2cc67 | 33 | static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; |
eab2abf5 | 34 | #define DRV_VERSION "7.3.21-k6-NAPI" |
abec42a4 SH |
35 | const char e1000_driver_version[] = DRV_VERSION; |
36 | static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; | |
1da177e4 LT |
37 | |
38 | /* e1000_pci_tbl - PCI Device ID Table | |
39 | * | |
40 | * Last entry must be all 0s | |
41 | * | |
42 | * Macro expands to... | |
43 | * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)} | |
44 | */ | |
a3aa1884 | 45 | static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = { |
1da177e4 LT |
46 | INTEL_E1000_ETHERNET_DEVICE(0x1000), |
47 | INTEL_E1000_ETHERNET_DEVICE(0x1001), | |
48 | INTEL_E1000_ETHERNET_DEVICE(0x1004), | |
49 | INTEL_E1000_ETHERNET_DEVICE(0x1008), | |
50 | INTEL_E1000_ETHERNET_DEVICE(0x1009), | |
51 | INTEL_E1000_ETHERNET_DEVICE(0x100C), | |
52 | INTEL_E1000_ETHERNET_DEVICE(0x100D), | |
53 | INTEL_E1000_ETHERNET_DEVICE(0x100E), | |
54 | INTEL_E1000_ETHERNET_DEVICE(0x100F), | |
55 | INTEL_E1000_ETHERNET_DEVICE(0x1010), | |
56 | INTEL_E1000_ETHERNET_DEVICE(0x1011), | |
57 | INTEL_E1000_ETHERNET_DEVICE(0x1012), | |
58 | INTEL_E1000_ETHERNET_DEVICE(0x1013), | |
59 | INTEL_E1000_ETHERNET_DEVICE(0x1014), | |
60 | INTEL_E1000_ETHERNET_DEVICE(0x1015), | |
61 | INTEL_E1000_ETHERNET_DEVICE(0x1016), | |
62 | INTEL_E1000_ETHERNET_DEVICE(0x1017), | |
63 | INTEL_E1000_ETHERNET_DEVICE(0x1018), | |
64 | INTEL_E1000_ETHERNET_DEVICE(0x1019), | |
2648345f | 65 | INTEL_E1000_ETHERNET_DEVICE(0x101A), |
1da177e4 LT |
66 | INTEL_E1000_ETHERNET_DEVICE(0x101D), |
67 | INTEL_E1000_ETHERNET_DEVICE(0x101E), | |
68 | INTEL_E1000_ETHERNET_DEVICE(0x1026), | |
69 | INTEL_E1000_ETHERNET_DEVICE(0x1027), | |
70 | INTEL_E1000_ETHERNET_DEVICE(0x1028), | |
71 | INTEL_E1000_ETHERNET_DEVICE(0x1075), | |
72 | INTEL_E1000_ETHERNET_DEVICE(0x1076), | |
73 | INTEL_E1000_ETHERNET_DEVICE(0x1077), | |
74 | INTEL_E1000_ETHERNET_DEVICE(0x1078), | |
75 | INTEL_E1000_ETHERNET_DEVICE(0x1079), | |
76 | INTEL_E1000_ETHERNET_DEVICE(0x107A), | |
77 | INTEL_E1000_ETHERNET_DEVICE(0x107B), | |
78 | INTEL_E1000_ETHERNET_DEVICE(0x107C), | |
79 | INTEL_E1000_ETHERNET_DEVICE(0x108A), | |
b7ee49db | 80 | INTEL_E1000_ETHERNET_DEVICE(0x1099), |
b7ee49db | 81 | INTEL_E1000_ETHERNET_DEVICE(0x10B5), |
1da177e4 LT |
82 | /* required last entry */ |
83 | {0,} | |
84 | }; | |
85 | ||
86 | MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); | |
87 | ||
35574764 NN |
88 | int e1000_up(struct e1000_adapter *adapter); |
89 | void e1000_down(struct e1000_adapter *adapter); | |
90 | void e1000_reinit_locked(struct e1000_adapter *adapter); | |
91 | void e1000_reset(struct e1000_adapter *adapter); | |
406874a7 | 92 | int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx); |
35574764 NN |
93 | int e1000_setup_all_tx_resources(struct e1000_adapter *adapter); |
94 | int e1000_setup_all_rx_resources(struct e1000_adapter *adapter); | |
95 | void e1000_free_all_tx_resources(struct e1000_adapter *adapter); | |
96 | void e1000_free_all_rx_resources(struct e1000_adapter *adapter); | |
3ad2cc67 | 97 | static int e1000_setup_tx_resources(struct e1000_adapter *adapter, |
35574764 | 98 | struct e1000_tx_ring *txdr); |
3ad2cc67 | 99 | static int e1000_setup_rx_resources(struct e1000_adapter *adapter, |
35574764 | 100 | struct e1000_rx_ring *rxdr); |
3ad2cc67 | 101 | static void e1000_free_tx_resources(struct e1000_adapter *adapter, |
35574764 | 102 | struct e1000_tx_ring *tx_ring); |
3ad2cc67 | 103 | static void e1000_free_rx_resources(struct e1000_adapter *adapter, |
35574764 NN |
104 | struct e1000_rx_ring *rx_ring); |
105 | void e1000_update_stats(struct e1000_adapter *adapter); | |
1da177e4 LT |
106 | |
107 | static int e1000_init_module(void); | |
108 | static void e1000_exit_module(void); | |
109 | static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent); | |
110 | static void __devexit e1000_remove(struct pci_dev *pdev); | |
581d708e | 111 | static int e1000_alloc_queues(struct e1000_adapter *adapter); |
1da177e4 LT |
112 | static int e1000_sw_init(struct e1000_adapter *adapter); |
113 | static int e1000_open(struct net_device *netdev); | |
114 | static int e1000_close(struct net_device *netdev); | |
115 | static void e1000_configure_tx(struct e1000_adapter *adapter); | |
116 | static void e1000_configure_rx(struct e1000_adapter *adapter); | |
117 | static void e1000_setup_rctl(struct e1000_adapter *adapter); | |
581d708e MC |
118 | static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter); |
119 | static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter); | |
120 | static void e1000_clean_tx_ring(struct e1000_adapter *adapter, | |
121 | struct e1000_tx_ring *tx_ring); | |
122 | static void e1000_clean_rx_ring(struct e1000_adapter *adapter, | |
123 | struct e1000_rx_ring *rx_ring); | |
db0ce50d | 124 | static void e1000_set_rx_mode(struct net_device *netdev); |
1da177e4 | 125 | static void e1000_update_phy_info(unsigned long data); |
5cf42fcd | 126 | static void e1000_update_phy_info_task(struct work_struct *work); |
1da177e4 | 127 | static void e1000_watchdog(unsigned long data); |
1da177e4 | 128 | static void e1000_82547_tx_fifo_stall(unsigned long data); |
5cf42fcd | 129 | static void e1000_82547_tx_fifo_stall_task(struct work_struct *work); |
3b29a56d SH |
130 | static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, |
131 | struct net_device *netdev); | |
1da177e4 LT |
132 | static struct net_device_stats * e1000_get_stats(struct net_device *netdev); |
133 | static int e1000_change_mtu(struct net_device *netdev, int new_mtu); | |
134 | static int e1000_set_mac(struct net_device *netdev, void *p); | |
7d12e780 | 135 | static irqreturn_t e1000_intr(int irq, void *data); |
c3033b01 JP |
136 | static bool e1000_clean_tx_irq(struct e1000_adapter *adapter, |
137 | struct e1000_tx_ring *tx_ring); | |
bea3348e | 138 | static int e1000_clean(struct napi_struct *napi, int budget); |
c3033b01 JP |
139 | static bool e1000_clean_rx_irq(struct e1000_adapter *adapter, |
140 | struct e1000_rx_ring *rx_ring, | |
141 | int *work_done, int work_to_do); | |
edbbb3ca JB |
142 | static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter, |
143 | struct e1000_rx_ring *rx_ring, | |
144 | int *work_done, int work_to_do); | |
581d708e | 145 | static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
edbbb3ca | 146 | struct e1000_rx_ring *rx_ring, |
72d64a43 | 147 | int cleaned_count); |
edbbb3ca JB |
148 | static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter, |
149 | struct e1000_rx_ring *rx_ring, | |
150 | int cleaned_count); | |
1da177e4 LT |
151 | static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); |
152 | static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, | |
153 | int cmd); | |
1da177e4 LT |
154 | static void e1000_enter_82542_rst(struct e1000_adapter *adapter); |
155 | static void e1000_leave_82542_rst(struct e1000_adapter *adapter); | |
156 | static void e1000_tx_timeout(struct net_device *dev); | |
65f27f38 | 157 | static void e1000_reset_task(struct work_struct *work); |
1da177e4 | 158 | static void e1000_smartspeed(struct e1000_adapter *adapter); |
e619d523 AK |
159 | static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, |
160 | struct sk_buff *skb); | |
1da177e4 LT |
161 | |
162 | static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp); | |
406874a7 JP |
163 | static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid); |
164 | static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid); | |
1da177e4 LT |
165 | static void e1000_restore_vlan(struct e1000_adapter *adapter); |
166 | ||
6fdfef16 | 167 | #ifdef CONFIG_PM |
b43fcd7d | 168 | static int e1000_suspend(struct pci_dev *pdev, pm_message_t state); |
1da177e4 LT |
169 | static int e1000_resume(struct pci_dev *pdev); |
170 | #endif | |
c653e635 | 171 | static void e1000_shutdown(struct pci_dev *pdev); |
1da177e4 LT |
172 | |
173 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
174 | /* for netdump / net console */ | |
175 | static void e1000_netpoll (struct net_device *netdev); | |
176 | #endif | |
177 | ||
1f753861 JB |
178 | #define COPYBREAK_DEFAULT 256 |
179 | static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT; | |
180 | module_param(copybreak, uint, 0644); | |
181 | MODULE_PARM_DESC(copybreak, | |
182 | "Maximum size of packet that is copied to a new buffer on receive"); | |
183 | ||
9026729b AK |
184 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, |
185 | pci_channel_state_t state); | |
186 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev); | |
187 | static void e1000_io_resume(struct pci_dev *pdev); | |
188 | ||
189 | static struct pci_error_handlers e1000_err_handler = { | |
190 | .error_detected = e1000_io_error_detected, | |
191 | .slot_reset = e1000_io_slot_reset, | |
192 | .resume = e1000_io_resume, | |
193 | }; | |
24025e4e | 194 | |
1da177e4 LT |
195 | static struct pci_driver e1000_driver = { |
196 | .name = e1000_driver_name, | |
197 | .id_table = e1000_pci_tbl, | |
198 | .probe = e1000_probe, | |
199 | .remove = __devexit_p(e1000_remove), | |
c4e24f01 | 200 | #ifdef CONFIG_PM |
1da177e4 | 201 | /* Power Managment Hooks */ |
1da177e4 | 202 | .suspend = e1000_suspend, |
c653e635 | 203 | .resume = e1000_resume, |
1da177e4 | 204 | #endif |
9026729b AK |
205 | .shutdown = e1000_shutdown, |
206 | .err_handler = &e1000_err_handler | |
1da177e4 LT |
207 | }; |
208 | ||
209 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); | |
210 | MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); | |
211 | MODULE_LICENSE("GPL"); | |
212 | MODULE_VERSION(DRV_VERSION); | |
213 | ||
214 | static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE; | |
215 | module_param(debug, int, 0); | |
216 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | |
217 | ||
675ad473 ET |
218 | /** |
219 | * e1000_get_hw_dev - return device | |
220 | * used by hardware layer to print debugging information | |
221 | * | |
222 | **/ | |
223 | struct net_device *e1000_get_hw_dev(struct e1000_hw *hw) | |
224 | { | |
225 | struct e1000_adapter *adapter = hw->back; | |
226 | return adapter->netdev; | |
227 | } | |
228 | ||
1da177e4 LT |
229 | /** |
230 | * e1000_init_module - Driver Registration Routine | |
231 | * | |
232 | * e1000_init_module is the first routine called when the driver is | |
233 | * loaded. All it does is register with the PCI subsystem. | |
234 | **/ | |
235 | ||
64798845 | 236 | static int __init e1000_init_module(void) |
1da177e4 LT |
237 | { |
238 | int ret; | |
675ad473 | 239 | pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version); |
1da177e4 | 240 | |
675ad473 | 241 | pr_info("%s\n", e1000_copyright); |
1da177e4 | 242 | |
29917620 | 243 | ret = pci_register_driver(&e1000_driver); |
1f753861 JB |
244 | if (copybreak != COPYBREAK_DEFAULT) { |
245 | if (copybreak == 0) | |
675ad473 | 246 | pr_info("copybreak disabled\n"); |
1f753861 | 247 | else |
675ad473 ET |
248 | pr_info("copybreak enabled for " |
249 | "packets <= %u bytes\n", copybreak); | |
1f753861 | 250 | } |
1da177e4 LT |
251 | return ret; |
252 | } | |
253 | ||
254 | module_init(e1000_init_module); | |
255 | ||
256 | /** | |
257 | * e1000_exit_module - Driver Exit Cleanup Routine | |
258 | * | |
259 | * e1000_exit_module is called just before the driver is removed | |
260 | * from memory. | |
261 | **/ | |
262 | ||
64798845 | 263 | static void __exit e1000_exit_module(void) |
1da177e4 | 264 | { |
1da177e4 LT |
265 | pci_unregister_driver(&e1000_driver); |
266 | } | |
267 | ||
268 | module_exit(e1000_exit_module); | |
269 | ||
2db10a08 AK |
270 | static int e1000_request_irq(struct e1000_adapter *adapter) |
271 | { | |
272 | struct net_device *netdev = adapter->netdev; | |
3e18826c | 273 | irq_handler_t handler = e1000_intr; |
e94bd23f AK |
274 | int irq_flags = IRQF_SHARED; |
275 | int err; | |
2db10a08 | 276 | |
e94bd23f AK |
277 | err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name, |
278 | netdev); | |
279 | if (err) { | |
feb8f478 | 280 | e_err(probe, "Unable to allocate interrupt Error: %d\n", err); |
e94bd23f | 281 | } |
2db10a08 AK |
282 | |
283 | return err; | |
284 | } | |
285 | ||
286 | static void e1000_free_irq(struct e1000_adapter *adapter) | |
287 | { | |
288 | struct net_device *netdev = adapter->netdev; | |
289 | ||
290 | free_irq(adapter->pdev->irq, netdev); | |
2db10a08 AK |
291 | } |
292 | ||
1da177e4 LT |
293 | /** |
294 | * e1000_irq_disable - Mask off interrupt generation on the NIC | |
295 | * @adapter: board private structure | |
296 | **/ | |
297 | ||
64798845 | 298 | static void e1000_irq_disable(struct e1000_adapter *adapter) |
1da177e4 | 299 | { |
1dc32918 JP |
300 | struct e1000_hw *hw = &adapter->hw; |
301 | ||
302 | ew32(IMC, ~0); | |
303 | E1000_WRITE_FLUSH(); | |
1da177e4 LT |
304 | synchronize_irq(adapter->pdev->irq); |
305 | } | |
306 | ||
307 | /** | |
308 | * e1000_irq_enable - Enable default interrupt generation settings | |
309 | * @adapter: board private structure | |
310 | **/ | |
311 | ||
64798845 | 312 | static void e1000_irq_enable(struct e1000_adapter *adapter) |
1da177e4 | 313 | { |
1dc32918 JP |
314 | struct e1000_hw *hw = &adapter->hw; |
315 | ||
316 | ew32(IMS, IMS_ENABLE_MASK); | |
317 | E1000_WRITE_FLUSH(); | |
1da177e4 | 318 | } |
3ad2cc67 | 319 | |
64798845 | 320 | static void e1000_update_mng_vlan(struct e1000_adapter *adapter) |
2d7edb92 | 321 | { |
1dc32918 | 322 | struct e1000_hw *hw = &adapter->hw; |
2d7edb92 | 323 | struct net_device *netdev = adapter->netdev; |
1dc32918 | 324 | u16 vid = hw->mng_cookie.vlan_id; |
406874a7 | 325 | u16 old_vid = adapter->mng_vlan_id; |
96838a40 | 326 | if (adapter->vlgrp) { |
5c15bdec | 327 | if (!vlan_group_get_device(adapter->vlgrp, vid)) { |
1dc32918 | 328 | if (hw->mng_cookie.status & |
2d7edb92 MC |
329 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) { |
330 | e1000_vlan_rx_add_vid(netdev, vid); | |
331 | adapter->mng_vlan_id = vid; | |
332 | } else | |
333 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
96838a40 | 334 | |
406874a7 | 335 | if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && |
96838a40 | 336 | (vid != old_vid) && |
5c15bdec | 337 | !vlan_group_get_device(adapter->vlgrp, old_vid)) |
2d7edb92 | 338 | e1000_vlan_rx_kill_vid(netdev, old_vid); |
c5f226fe JK |
339 | } else |
340 | adapter->mng_vlan_id = vid; | |
2d7edb92 MC |
341 | } |
342 | } | |
b55ccb35 | 343 | |
64798845 | 344 | static void e1000_init_manageability(struct e1000_adapter *adapter) |
0fccd0e9 | 345 | { |
1dc32918 JP |
346 | struct e1000_hw *hw = &adapter->hw; |
347 | ||
0fccd0e9 | 348 | if (adapter->en_mng_pt) { |
1dc32918 | 349 | u32 manc = er32(MANC); |
0fccd0e9 JG |
350 | |
351 | /* disable hardware interception of ARP */ | |
352 | manc &= ~(E1000_MANC_ARP_EN); | |
353 | ||
1dc32918 | 354 | ew32(MANC, manc); |
0fccd0e9 JG |
355 | } |
356 | } | |
357 | ||
64798845 | 358 | static void e1000_release_manageability(struct e1000_adapter *adapter) |
0fccd0e9 | 359 | { |
1dc32918 JP |
360 | struct e1000_hw *hw = &adapter->hw; |
361 | ||
0fccd0e9 | 362 | if (adapter->en_mng_pt) { |
1dc32918 | 363 | u32 manc = er32(MANC); |
0fccd0e9 JG |
364 | |
365 | /* re-enable hardware interception of ARP */ | |
366 | manc |= E1000_MANC_ARP_EN; | |
367 | ||
1dc32918 | 368 | ew32(MANC, manc); |
0fccd0e9 JG |
369 | } |
370 | } | |
371 | ||
e0aac5a2 AK |
372 | /** |
373 | * e1000_configure - configure the hardware for RX and TX | |
374 | * @adapter = private board structure | |
375 | **/ | |
376 | static void e1000_configure(struct e1000_adapter *adapter) | |
1da177e4 LT |
377 | { |
378 | struct net_device *netdev = adapter->netdev; | |
2db10a08 | 379 | int i; |
1da177e4 | 380 | |
db0ce50d | 381 | e1000_set_rx_mode(netdev); |
1da177e4 LT |
382 | |
383 | e1000_restore_vlan(adapter); | |
0fccd0e9 | 384 | e1000_init_manageability(adapter); |
1da177e4 LT |
385 | |
386 | e1000_configure_tx(adapter); | |
387 | e1000_setup_rctl(adapter); | |
388 | e1000_configure_rx(adapter); | |
72d64a43 JK |
389 | /* call E1000_DESC_UNUSED which always leaves |
390 | * at least 1 descriptor unused to make sure | |
391 | * next_to_use != next_to_clean */ | |
f56799ea | 392 | for (i = 0; i < adapter->num_rx_queues; i++) { |
72d64a43 | 393 | struct e1000_rx_ring *ring = &adapter->rx_ring[i]; |
a292ca6e JK |
394 | adapter->alloc_rx_buf(adapter, ring, |
395 | E1000_DESC_UNUSED(ring)); | |
f56799ea | 396 | } |
e0aac5a2 AK |
397 | } |
398 | ||
399 | int e1000_up(struct e1000_adapter *adapter) | |
400 | { | |
1dc32918 JP |
401 | struct e1000_hw *hw = &adapter->hw; |
402 | ||
e0aac5a2 AK |
403 | /* hardware has been reset, we need to reload some things */ |
404 | e1000_configure(adapter); | |
405 | ||
406 | clear_bit(__E1000_DOWN, &adapter->flags); | |
7bfa4816 | 407 | |
bea3348e | 408 | napi_enable(&adapter->napi); |
c3570acb | 409 | |
5de55624 MC |
410 | e1000_irq_enable(adapter); |
411 | ||
4cb9be7a JB |
412 | netif_wake_queue(adapter->netdev); |
413 | ||
79f3d399 | 414 | /* fire a link change interrupt to start the watchdog */ |
1dc32918 | 415 | ew32(ICS, E1000_ICS_LSC); |
1da177e4 LT |
416 | return 0; |
417 | } | |
418 | ||
79f05bf0 AK |
419 | /** |
420 | * e1000_power_up_phy - restore link in case the phy was powered down | |
421 | * @adapter: address of board private structure | |
422 | * | |
423 | * The phy may be powered down to save power and turn off link when the | |
424 | * driver is unloaded and wake on lan is not enabled (among others) | |
425 | * *** this routine MUST be followed by a call to e1000_reset *** | |
426 | * | |
427 | **/ | |
428 | ||
d658266e | 429 | void e1000_power_up_phy(struct e1000_adapter *adapter) |
79f05bf0 | 430 | { |
1dc32918 | 431 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 432 | u16 mii_reg = 0; |
79f05bf0 AK |
433 | |
434 | /* Just clear the power down bit to wake the phy back up */ | |
1dc32918 | 435 | if (hw->media_type == e1000_media_type_copper) { |
79f05bf0 AK |
436 | /* according to the manual, the phy will retain its |
437 | * settings across a power-down/up cycle */ | |
1dc32918 | 438 | e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg); |
79f05bf0 | 439 | mii_reg &= ~MII_CR_POWER_DOWN; |
1dc32918 | 440 | e1000_write_phy_reg(hw, PHY_CTRL, mii_reg); |
79f05bf0 AK |
441 | } |
442 | } | |
443 | ||
444 | static void e1000_power_down_phy(struct e1000_adapter *adapter) | |
445 | { | |
1dc32918 JP |
446 | struct e1000_hw *hw = &adapter->hw; |
447 | ||
61c2505f | 448 | /* Power down the PHY so no link is implied when interface is down * |
c3033b01 | 449 | * The PHY cannot be powered down if any of the following is true * |
79f05bf0 AK |
450 | * (a) WoL is enabled |
451 | * (b) AMT is active | |
452 | * (c) SoL/IDER session is active */ | |
1dc32918 JP |
453 | if (!adapter->wol && hw->mac_type >= e1000_82540 && |
454 | hw->media_type == e1000_media_type_copper) { | |
406874a7 | 455 | u16 mii_reg = 0; |
61c2505f | 456 | |
1dc32918 | 457 | switch (hw->mac_type) { |
61c2505f BA |
458 | case e1000_82540: |
459 | case e1000_82545: | |
460 | case e1000_82545_rev_3: | |
461 | case e1000_82546: | |
462 | case e1000_82546_rev_3: | |
463 | case e1000_82541: | |
464 | case e1000_82541_rev_2: | |
465 | case e1000_82547: | |
466 | case e1000_82547_rev_2: | |
1dc32918 | 467 | if (er32(MANC) & E1000_MANC_SMBUS_EN) |
61c2505f BA |
468 | goto out; |
469 | break; | |
61c2505f BA |
470 | default: |
471 | goto out; | |
472 | } | |
1dc32918 | 473 | e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg); |
79f05bf0 | 474 | mii_reg |= MII_CR_POWER_DOWN; |
1dc32918 | 475 | e1000_write_phy_reg(hw, PHY_CTRL, mii_reg); |
79f05bf0 AK |
476 | mdelay(1); |
477 | } | |
61c2505f BA |
478 | out: |
479 | return; | |
79f05bf0 AK |
480 | } |
481 | ||
64798845 | 482 | void e1000_down(struct e1000_adapter *adapter) |
1da177e4 | 483 | { |
a6c42322 | 484 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 485 | struct net_device *netdev = adapter->netdev; |
a6c42322 | 486 | u32 rctl, tctl; |
1da177e4 | 487 | |
1314bbf3 AK |
488 | /* signal that we're down so the interrupt handler does not |
489 | * reschedule our watchdog timer */ | |
490 | set_bit(__E1000_DOWN, &adapter->flags); | |
491 | ||
a6c42322 JB |
492 | /* disable receives in the hardware */ |
493 | rctl = er32(RCTL); | |
494 | ew32(RCTL, rctl & ~E1000_RCTL_EN); | |
495 | /* flush and sleep below */ | |
496 | ||
51851073 | 497 | netif_tx_disable(netdev); |
a6c42322 JB |
498 | |
499 | /* disable transmits in the hardware */ | |
500 | tctl = er32(TCTL); | |
501 | tctl &= ~E1000_TCTL_EN; | |
502 | ew32(TCTL, tctl); | |
503 | /* flush both disables and wait for them to finish */ | |
504 | E1000_WRITE_FLUSH(); | |
505 | msleep(10); | |
506 | ||
bea3348e | 507 | napi_disable(&adapter->napi); |
c3570acb | 508 | |
1da177e4 | 509 | e1000_irq_disable(adapter); |
c1605eb3 | 510 | |
1da177e4 LT |
511 | del_timer_sync(&adapter->tx_fifo_stall_timer); |
512 | del_timer_sync(&adapter->watchdog_timer); | |
513 | del_timer_sync(&adapter->phy_info_timer); | |
514 | ||
1da177e4 LT |
515 | adapter->link_speed = 0; |
516 | adapter->link_duplex = 0; | |
517 | netif_carrier_off(netdev); | |
1da177e4 LT |
518 | |
519 | e1000_reset(adapter); | |
581d708e MC |
520 | e1000_clean_all_tx_rings(adapter); |
521 | e1000_clean_all_rx_rings(adapter); | |
1da177e4 | 522 | } |
1da177e4 | 523 | |
338c15e4 JB |
524 | void e1000_reinit_safe(struct e1000_adapter *adapter) |
525 | { | |
526 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) | |
527 | msleep(1); | |
528 | rtnl_lock(); | |
529 | e1000_down(adapter); | |
530 | e1000_up(adapter); | |
531 | rtnl_unlock(); | |
532 | clear_bit(__E1000_RESETTING, &adapter->flags); | |
533 | } | |
534 | ||
64798845 | 535 | void e1000_reinit_locked(struct e1000_adapter *adapter) |
2db10a08 | 536 | { |
338c15e4 JB |
537 | /* if rtnl_lock is not held the call path is bogus */ |
538 | ASSERT_RTNL(); | |
2db10a08 AK |
539 | WARN_ON(in_interrupt()); |
540 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) | |
541 | msleep(1); | |
542 | e1000_down(adapter); | |
543 | e1000_up(adapter); | |
544 | clear_bit(__E1000_RESETTING, &adapter->flags); | |
1da177e4 LT |
545 | } |
546 | ||
64798845 | 547 | void e1000_reset(struct e1000_adapter *adapter) |
1da177e4 | 548 | { |
1dc32918 | 549 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 550 | u32 pba = 0, tx_space, min_tx_space, min_rx_space; |
c3033b01 | 551 | bool legacy_pba_adjust = false; |
b7cb8c2c | 552 | u16 hwm; |
1da177e4 LT |
553 | |
554 | /* Repartition Pba for greater than 9k mtu | |
555 | * To take effect CTRL.RST is required. | |
556 | */ | |
557 | ||
1dc32918 | 558 | switch (hw->mac_type) { |
018ea44e BA |
559 | case e1000_82542_rev2_0: |
560 | case e1000_82542_rev2_1: | |
561 | case e1000_82543: | |
562 | case e1000_82544: | |
563 | case e1000_82540: | |
564 | case e1000_82541: | |
565 | case e1000_82541_rev_2: | |
c3033b01 | 566 | legacy_pba_adjust = true; |
018ea44e BA |
567 | pba = E1000_PBA_48K; |
568 | break; | |
569 | case e1000_82545: | |
570 | case e1000_82545_rev_3: | |
571 | case e1000_82546: | |
572 | case e1000_82546_rev_3: | |
573 | pba = E1000_PBA_48K; | |
574 | break; | |
2d7edb92 | 575 | case e1000_82547: |
0e6ef3e0 | 576 | case e1000_82547_rev_2: |
c3033b01 | 577 | legacy_pba_adjust = true; |
2d7edb92 MC |
578 | pba = E1000_PBA_30K; |
579 | break; | |
018ea44e BA |
580 | case e1000_undefined: |
581 | case e1000_num_macs: | |
2d7edb92 MC |
582 | break; |
583 | } | |
584 | ||
c3033b01 | 585 | if (legacy_pba_adjust) { |
b7cb8c2c | 586 | if (hw->max_frame_size > E1000_RXBUFFER_8192) |
018ea44e | 587 | pba -= 8; /* allocate more FIFO for Tx */ |
2d7edb92 | 588 | |
1dc32918 | 589 | if (hw->mac_type == e1000_82547) { |
018ea44e BA |
590 | adapter->tx_fifo_head = 0; |
591 | adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT; | |
592 | adapter->tx_fifo_size = | |
593 | (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT; | |
594 | atomic_set(&adapter->tx_fifo_stall, 0); | |
595 | } | |
b7cb8c2c | 596 | } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { |
018ea44e | 597 | /* adjust PBA for jumbo frames */ |
1dc32918 | 598 | ew32(PBA, pba); |
018ea44e BA |
599 | |
600 | /* To maintain wire speed transmits, the Tx FIFO should be | |
b7cb8c2c | 601 | * large enough to accommodate two full transmit packets, |
018ea44e | 602 | * rounded up to the next 1KB and expressed in KB. Likewise, |
b7cb8c2c | 603 | * the Rx FIFO should be large enough to accommodate at least |
018ea44e BA |
604 | * one full receive packet and is similarly rounded up and |
605 | * expressed in KB. */ | |
1dc32918 | 606 | pba = er32(PBA); |
018ea44e BA |
607 | /* upper 16 bits has Tx packet buffer allocation size in KB */ |
608 | tx_space = pba >> 16; | |
609 | /* lower 16 bits has Rx packet buffer allocation size in KB */ | |
610 | pba &= 0xffff; | |
b7cb8c2c JB |
611 | /* |
612 | * the tx fifo also stores 16 bytes of information about the tx | |
613 | * but don't include ethernet FCS because hardware appends it | |
614 | */ | |
615 | min_tx_space = (hw->max_frame_size + | |
616 | sizeof(struct e1000_tx_desc) - | |
617 | ETH_FCS_LEN) * 2; | |
9099cfb9 | 618 | min_tx_space = ALIGN(min_tx_space, 1024); |
018ea44e | 619 | min_tx_space >>= 10; |
b7cb8c2c JB |
620 | /* software strips receive CRC, so leave room for it */ |
621 | min_rx_space = hw->max_frame_size; | |
9099cfb9 | 622 | min_rx_space = ALIGN(min_rx_space, 1024); |
018ea44e BA |
623 | min_rx_space >>= 10; |
624 | ||
625 | /* If current Tx allocation is less than the min Tx FIFO size, | |
626 | * and the min Tx FIFO size is less than the current Rx FIFO | |
627 | * allocation, take space away from current Rx allocation */ | |
628 | if (tx_space < min_tx_space && | |
629 | ((min_tx_space - tx_space) < pba)) { | |
630 | pba = pba - (min_tx_space - tx_space); | |
631 | ||
632 | /* PCI/PCIx hardware has PBA alignment constraints */ | |
1dc32918 | 633 | switch (hw->mac_type) { |
018ea44e BA |
634 | case e1000_82545 ... e1000_82546_rev_3: |
635 | pba &= ~(E1000_PBA_8K - 1); | |
636 | break; | |
637 | default: | |
638 | break; | |
639 | } | |
640 | ||
641 | /* if short on rx space, rx wins and must trump tx | |
642 | * adjustment or use Early Receive if available */ | |
1532ecea JB |
643 | if (pba < min_rx_space) |
644 | pba = min_rx_space; | |
018ea44e | 645 | } |
1da177e4 | 646 | } |
2d7edb92 | 647 | |
1dc32918 | 648 | ew32(PBA, pba); |
1da177e4 | 649 | |
b7cb8c2c JB |
650 | /* |
651 | * flow control settings: | |
652 | * The high water mark must be low enough to fit one full frame | |
653 | * (or the size used for early receive) above it in the Rx FIFO. | |
654 | * Set it to the lower of: | |
655 | * - 90% of the Rx FIFO size, and | |
656 | * - the full Rx FIFO size minus the early receive size (for parts | |
657 | * with ERT support assuming ERT set to E1000_ERT_2048), or | |
658 | * - the full Rx FIFO size minus one full frame | |
659 | */ | |
660 | hwm = min(((pba << 10) * 9 / 10), | |
661 | ((pba << 10) - hw->max_frame_size)); | |
662 | ||
663 | hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */ | |
664 | hw->fc_low_water = hw->fc_high_water - 8; | |
edbbb3ca | 665 | hw->fc_pause_time = E1000_FC_PAUSE_TIME; |
1dc32918 JP |
666 | hw->fc_send_xon = 1; |
667 | hw->fc = hw->original_fc; | |
1da177e4 | 668 | |
2d7edb92 | 669 | /* Allow time for pending master requests to run */ |
1dc32918 JP |
670 | e1000_reset_hw(hw); |
671 | if (hw->mac_type >= e1000_82544) | |
672 | ew32(WUC, 0); | |
09ae3e88 | 673 | |
1dc32918 | 674 | if (e1000_init_hw(hw)) |
feb8f478 | 675 | e_dev_err("Hardware Error\n"); |
2d7edb92 | 676 | e1000_update_mng_vlan(adapter); |
3d5460a0 JB |
677 | |
678 | /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */ | |
1dc32918 | 679 | if (hw->mac_type >= e1000_82544 && |
1dc32918 JP |
680 | hw->autoneg == 1 && |
681 | hw->autoneg_advertised == ADVERTISE_1000_FULL) { | |
682 | u32 ctrl = er32(CTRL); | |
3d5460a0 JB |
683 | /* clear phy power management bit if we are in gig only mode, |
684 | * which if enabled will attempt negotiation to 100Mb, which | |
685 | * can cause a loss of link at power off or driver unload */ | |
686 | ctrl &= ~E1000_CTRL_SWDPIN3; | |
1dc32918 | 687 | ew32(CTRL, ctrl); |
3d5460a0 JB |
688 | } |
689 | ||
1da177e4 | 690 | /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ |
1dc32918 | 691 | ew32(VET, ETHERNET_IEEE_VLAN_TYPE); |
1da177e4 | 692 | |
1dc32918 JP |
693 | e1000_reset_adaptive(hw); |
694 | e1000_phy_get_info(hw, &adapter->phy_info); | |
9a53a202 | 695 | |
0fccd0e9 | 696 | e1000_release_manageability(adapter); |
1da177e4 LT |
697 | } |
698 | ||
67b3c27c AK |
699 | /** |
700 | * Dump the eeprom for users having checksum issues | |
701 | **/ | |
b4ea895d | 702 | static void e1000_dump_eeprom(struct e1000_adapter *adapter) |
67b3c27c AK |
703 | { |
704 | struct net_device *netdev = adapter->netdev; | |
705 | struct ethtool_eeprom eeprom; | |
706 | const struct ethtool_ops *ops = netdev->ethtool_ops; | |
707 | u8 *data; | |
708 | int i; | |
709 | u16 csum_old, csum_new = 0; | |
710 | ||
711 | eeprom.len = ops->get_eeprom_len(netdev); | |
712 | eeprom.offset = 0; | |
713 | ||
714 | data = kmalloc(eeprom.len, GFP_KERNEL); | |
715 | if (!data) { | |
675ad473 | 716 | pr_err("Unable to allocate memory to dump EEPROM data\n"); |
67b3c27c AK |
717 | return; |
718 | } | |
719 | ||
720 | ops->get_eeprom(netdev, &eeprom, data); | |
721 | ||
722 | csum_old = (data[EEPROM_CHECKSUM_REG * 2]) + | |
723 | (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8); | |
724 | for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2) | |
725 | csum_new += data[i] + (data[i + 1] << 8); | |
726 | csum_new = EEPROM_SUM - csum_new; | |
727 | ||
675ad473 ET |
728 | pr_err("/*********************/\n"); |
729 | pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old); | |
730 | pr_err("Calculated : 0x%04x\n", csum_new); | |
67b3c27c | 731 | |
675ad473 ET |
732 | pr_err("Offset Values\n"); |
733 | pr_err("======== ======\n"); | |
67b3c27c AK |
734 | print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0); |
735 | ||
675ad473 ET |
736 | pr_err("Include this output when contacting your support provider.\n"); |
737 | pr_err("This is not a software error! Something bad happened to\n"); | |
738 | pr_err("your hardware or EEPROM image. Ignoring this problem could\n"); | |
739 | pr_err("result in further problems, possibly loss of data,\n"); | |
740 | pr_err("corruption or system hangs!\n"); | |
741 | pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n"); | |
742 | pr_err("which is invalid and requires you to set the proper MAC\n"); | |
743 | pr_err("address manually before continuing to enable this network\n"); | |
744 | pr_err("device. Please inspect the EEPROM dump and report the\n"); | |
745 | pr_err("issue to your hardware vendor or Intel Customer Support.\n"); | |
746 | pr_err("/*********************/\n"); | |
67b3c27c AK |
747 | |
748 | kfree(data); | |
749 | } | |
750 | ||
81250297 TI |
751 | /** |
752 | * e1000_is_need_ioport - determine if an adapter needs ioport resources or not | |
753 | * @pdev: PCI device information struct | |
754 | * | |
755 | * Return true if an adapter needs ioport resources | |
756 | **/ | |
757 | static int e1000_is_need_ioport(struct pci_dev *pdev) | |
758 | { | |
759 | switch (pdev->device) { | |
760 | case E1000_DEV_ID_82540EM: | |
761 | case E1000_DEV_ID_82540EM_LOM: | |
762 | case E1000_DEV_ID_82540EP: | |
763 | case E1000_DEV_ID_82540EP_LOM: | |
764 | case E1000_DEV_ID_82540EP_LP: | |
765 | case E1000_DEV_ID_82541EI: | |
766 | case E1000_DEV_ID_82541EI_MOBILE: | |
767 | case E1000_DEV_ID_82541ER: | |
768 | case E1000_DEV_ID_82541ER_LOM: | |
769 | case E1000_DEV_ID_82541GI: | |
770 | case E1000_DEV_ID_82541GI_LF: | |
771 | case E1000_DEV_ID_82541GI_MOBILE: | |
772 | case E1000_DEV_ID_82544EI_COPPER: | |
773 | case E1000_DEV_ID_82544EI_FIBER: | |
774 | case E1000_DEV_ID_82544GC_COPPER: | |
775 | case E1000_DEV_ID_82544GC_LOM: | |
776 | case E1000_DEV_ID_82545EM_COPPER: | |
777 | case E1000_DEV_ID_82545EM_FIBER: | |
778 | case E1000_DEV_ID_82546EB_COPPER: | |
779 | case E1000_DEV_ID_82546EB_FIBER: | |
780 | case E1000_DEV_ID_82546EB_QUAD_COPPER: | |
781 | return true; | |
782 | default: | |
783 | return false; | |
784 | } | |
785 | } | |
786 | ||
0e7614bc SH |
787 | static const struct net_device_ops e1000_netdev_ops = { |
788 | .ndo_open = e1000_open, | |
789 | .ndo_stop = e1000_close, | |
00829823 | 790 | .ndo_start_xmit = e1000_xmit_frame, |
0e7614bc SH |
791 | .ndo_get_stats = e1000_get_stats, |
792 | .ndo_set_rx_mode = e1000_set_rx_mode, | |
793 | .ndo_set_mac_address = e1000_set_mac, | |
794 | .ndo_tx_timeout = e1000_tx_timeout, | |
795 | .ndo_change_mtu = e1000_change_mtu, | |
796 | .ndo_do_ioctl = e1000_ioctl, | |
797 | .ndo_validate_addr = eth_validate_addr, | |
798 | ||
799 | .ndo_vlan_rx_register = e1000_vlan_rx_register, | |
800 | .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid, | |
801 | .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid, | |
802 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
803 | .ndo_poll_controller = e1000_netpoll, | |
804 | #endif | |
805 | }; | |
806 | ||
e508be17 JB |
807 | /** |
808 | * e1000_init_hw_struct - initialize members of hw struct | |
809 | * @adapter: board private struct | |
810 | * @hw: structure used by e1000_hw.c | |
811 | * | |
812 | * Factors out initialization of the e1000_hw struct to its own function | |
813 | * that can be called very early at init (just after struct allocation). | |
814 | * Fields are initialized based on PCI device information and | |
815 | * OS network device settings (MTU size). | |
816 | * Returns negative error codes if MAC type setup fails. | |
817 | */ | |
818 | static int e1000_init_hw_struct(struct e1000_adapter *adapter, | |
819 | struct e1000_hw *hw) | |
820 | { | |
821 | struct pci_dev *pdev = adapter->pdev; | |
822 | ||
823 | /* PCI config space info */ | |
824 | hw->vendor_id = pdev->vendor; | |
825 | hw->device_id = pdev->device; | |
826 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
827 | hw->subsystem_id = pdev->subsystem_device; | |
828 | hw->revision_id = pdev->revision; | |
829 | ||
830 | pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); | |
831 | ||
832 | hw->max_frame_size = adapter->netdev->mtu + | |
833 | ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; | |
834 | hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE; | |
835 | ||
836 | /* identify the MAC */ | |
837 | if (e1000_set_mac_type(hw)) { | |
838 | e_err(probe, "Unknown MAC Type\n"); | |
839 | return -EIO; | |
840 | } | |
841 | ||
842 | switch (hw->mac_type) { | |
843 | default: | |
844 | break; | |
845 | case e1000_82541: | |
846 | case e1000_82547: | |
847 | case e1000_82541_rev_2: | |
848 | case e1000_82547_rev_2: | |
849 | hw->phy_init_script = 1; | |
850 | break; | |
851 | } | |
852 | ||
853 | e1000_set_media_type(hw); | |
854 | e1000_get_bus_info(hw); | |
855 | ||
856 | hw->wait_autoneg_complete = false; | |
857 | hw->tbi_compatibility_en = true; | |
858 | hw->adaptive_ifs = true; | |
859 | ||
860 | /* Copper options */ | |
861 | ||
862 | if (hw->media_type == e1000_media_type_copper) { | |
863 | hw->mdix = AUTO_ALL_MODES; | |
864 | hw->disable_polarity_correction = false; | |
865 | hw->master_slave = E1000_MASTER_SLAVE; | |
866 | } | |
867 | ||
868 | return 0; | |
869 | } | |
870 | ||
1da177e4 LT |
871 | /** |
872 | * e1000_probe - Device Initialization Routine | |
873 | * @pdev: PCI device information struct | |
874 | * @ent: entry in e1000_pci_tbl | |
875 | * | |
876 | * Returns 0 on success, negative on failure | |
877 | * | |
878 | * e1000_probe initializes an adapter identified by a pci_dev structure. | |
879 | * The OS initialization, configuring of the adapter private structure, | |
880 | * and a hardware reset occur. | |
881 | **/ | |
1dc32918 JP |
882 | static int __devinit e1000_probe(struct pci_dev *pdev, |
883 | const struct pci_device_id *ent) | |
1da177e4 LT |
884 | { |
885 | struct net_device *netdev; | |
886 | struct e1000_adapter *adapter; | |
1dc32918 | 887 | struct e1000_hw *hw; |
2d7edb92 | 888 | |
1da177e4 | 889 | static int cards_found = 0; |
120cd576 | 890 | static int global_quad_port_a = 0; /* global ksp3 port a indication */ |
2d7edb92 | 891 | int i, err, pci_using_dac; |
406874a7 JP |
892 | u16 eeprom_data = 0; |
893 | u16 eeprom_apme_mask = E1000_EEPROM_APME; | |
81250297 | 894 | int bars, need_ioport; |
0795af57 | 895 | |
81250297 TI |
896 | /* do not allocate ioport bars when not needed */ |
897 | need_ioport = e1000_is_need_ioport(pdev); | |
898 | if (need_ioport) { | |
899 | bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO); | |
900 | err = pci_enable_device(pdev); | |
901 | } else { | |
902 | bars = pci_select_bars(pdev, IORESOURCE_MEM); | |
4d7155b9 | 903 | err = pci_enable_device_mem(pdev); |
81250297 | 904 | } |
c7be73bc | 905 | if (err) |
1da177e4 LT |
906 | return err; |
907 | ||
81250297 | 908 | err = pci_request_selected_regions(pdev, bars, e1000_driver_name); |
c7be73bc | 909 | if (err) |
6dd62ab0 | 910 | goto err_pci_reg; |
1da177e4 LT |
911 | |
912 | pci_set_master(pdev); | |
dbb5aaeb NN |
913 | err = pci_save_state(pdev); |
914 | if (err) | |
915 | goto err_alloc_etherdev; | |
1da177e4 | 916 | |
6dd62ab0 | 917 | err = -ENOMEM; |
1da177e4 | 918 | netdev = alloc_etherdev(sizeof(struct e1000_adapter)); |
6dd62ab0 | 919 | if (!netdev) |
1da177e4 | 920 | goto err_alloc_etherdev; |
1da177e4 | 921 | |
1da177e4 LT |
922 | SET_NETDEV_DEV(netdev, &pdev->dev); |
923 | ||
924 | pci_set_drvdata(pdev, netdev); | |
60490fe0 | 925 | adapter = netdev_priv(netdev); |
1da177e4 LT |
926 | adapter->netdev = netdev; |
927 | adapter->pdev = pdev; | |
1da177e4 | 928 | adapter->msg_enable = (1 << debug) - 1; |
81250297 TI |
929 | adapter->bars = bars; |
930 | adapter->need_ioport = need_ioport; | |
1da177e4 | 931 | |
1dc32918 JP |
932 | hw = &adapter->hw; |
933 | hw->back = adapter; | |
934 | ||
6dd62ab0 | 935 | err = -EIO; |
275f165f | 936 | hw->hw_addr = pci_ioremap_bar(pdev, BAR_0); |
1dc32918 | 937 | if (!hw->hw_addr) |
1da177e4 | 938 | goto err_ioremap; |
1da177e4 | 939 | |
81250297 TI |
940 | if (adapter->need_ioport) { |
941 | for (i = BAR_1; i <= BAR_5; i++) { | |
942 | if (pci_resource_len(pdev, i) == 0) | |
943 | continue; | |
944 | if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { | |
945 | hw->io_base = pci_resource_start(pdev, i); | |
946 | break; | |
947 | } | |
1da177e4 LT |
948 | } |
949 | } | |
950 | ||
e508be17 JB |
951 | /* make ready for any if (hw->...) below */ |
952 | err = e1000_init_hw_struct(adapter, hw); | |
953 | if (err) | |
954 | goto err_sw_init; | |
955 | ||
956 | /* | |
957 | * there is a workaround being applied below that limits | |
958 | * 64-bit DMA addresses to 64-bit hardware. There are some | |
959 | * 32-bit adapters that Tx hang when given 64-bit DMA addresses | |
960 | */ | |
961 | pci_using_dac = 0; | |
962 | if ((hw->bus_type == e1000_bus_type_pcix) && | |
963 | !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) { | |
964 | /* | |
965 | * according to DMA-API-HOWTO, coherent calls will always | |
966 | * succeed if the set call did | |
967 | */ | |
968 | dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); | |
969 | pci_using_dac = 1; | |
970 | } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { | |
971 | dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); | |
972 | } else { | |
973 | pr_err("No usable DMA config, aborting\n"); | |
974 | goto err_dma; | |
975 | } | |
976 | ||
0e7614bc | 977 | netdev->netdev_ops = &e1000_netdev_ops; |
1da177e4 | 978 | e1000_set_ethtool_ops(netdev); |
1da177e4 | 979 | netdev->watchdog_timeo = 5 * HZ; |
bea3348e | 980 | netif_napi_add(netdev, &adapter->napi, e1000_clean, 64); |
0e7614bc | 981 | |
0eb5a34c | 982 | strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); |
1da177e4 | 983 | |
1da177e4 LT |
984 | adapter->bd_number = cards_found; |
985 | ||
986 | /* setup the private structure */ | |
987 | ||
c7be73bc JP |
988 | err = e1000_sw_init(adapter); |
989 | if (err) | |
1da177e4 LT |
990 | goto err_sw_init; |
991 | ||
6dd62ab0 | 992 | err = -EIO; |
2d7edb92 | 993 | |
1dc32918 | 994 | if (hw->mac_type >= e1000_82543) { |
1da177e4 LT |
995 | netdev->features = NETIF_F_SG | |
996 | NETIF_F_HW_CSUM | | |
997 | NETIF_F_HW_VLAN_TX | | |
998 | NETIF_F_HW_VLAN_RX | | |
999 | NETIF_F_HW_VLAN_FILTER; | |
1000 | } | |
1001 | ||
1dc32918 JP |
1002 | if ((hw->mac_type >= e1000_82544) && |
1003 | (hw->mac_type != e1000_82547)) | |
1da177e4 | 1004 | netdev->features |= NETIF_F_TSO; |
2d7edb92 | 1005 | |
7b872a55 | 1006 | if (pci_using_dac) { |
1da177e4 | 1007 | netdev->features |= NETIF_F_HIGHDMA; |
7b872a55 YZ |
1008 | netdev->vlan_features |= NETIF_F_HIGHDMA; |
1009 | } | |
1da177e4 | 1010 | |
20501a69 | 1011 | netdev->vlan_features |= NETIF_F_TSO; |
20501a69 PM |
1012 | netdev->vlan_features |= NETIF_F_HW_CSUM; |
1013 | netdev->vlan_features |= NETIF_F_SG; | |
1014 | ||
1dc32918 | 1015 | adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw); |
2d7edb92 | 1016 | |
cd94dd0b | 1017 | /* initialize eeprom parameters */ |
1dc32918 | 1018 | if (e1000_init_eeprom_params(hw)) { |
feb8f478 | 1019 | e_err(probe, "EEPROM initialization failed\n"); |
6dd62ab0 | 1020 | goto err_eeprom; |
cd94dd0b AK |
1021 | } |
1022 | ||
96838a40 | 1023 | /* before reading the EEPROM, reset the controller to |
1da177e4 | 1024 | * put the device in a known good starting state */ |
96838a40 | 1025 | |
1dc32918 | 1026 | e1000_reset_hw(hw); |
1da177e4 LT |
1027 | |
1028 | /* make sure the EEPROM is good */ | |
1dc32918 | 1029 | if (e1000_validate_eeprom_checksum(hw) < 0) { |
feb8f478 | 1030 | e_err(probe, "The EEPROM Checksum Is Not Valid\n"); |
67b3c27c AK |
1031 | e1000_dump_eeprom(adapter); |
1032 | /* | |
1033 | * set MAC address to all zeroes to invalidate and temporary | |
1034 | * disable this device for the user. This blocks regular | |
1035 | * traffic while still permitting ethtool ioctls from reaching | |
1036 | * the hardware as well as allowing the user to run the | |
1037 | * interface after manually setting a hw addr using | |
1038 | * `ip set address` | |
1039 | */ | |
1dc32918 | 1040 | memset(hw->mac_addr, 0, netdev->addr_len); |
67b3c27c AK |
1041 | } else { |
1042 | /* copy the MAC address out of the EEPROM */ | |
1dc32918 | 1043 | if (e1000_read_mac_addr(hw)) |
feb8f478 | 1044 | e_err(probe, "EEPROM Read Error\n"); |
1da177e4 | 1045 | } |
67b3c27c | 1046 | /* don't block initalization here due to bad MAC address */ |
1dc32918 JP |
1047 | memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len); |
1048 | memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len); | |
1da177e4 | 1049 | |
67b3c27c | 1050 | if (!is_valid_ether_addr(netdev->perm_addr)) |
feb8f478 | 1051 | e_err(probe, "Invalid MAC Address\n"); |
1da177e4 | 1052 | |
1da177e4 | 1053 | init_timer(&adapter->tx_fifo_stall_timer); |
c061b18d | 1054 | adapter->tx_fifo_stall_timer.function = e1000_82547_tx_fifo_stall; |
e982f17c | 1055 | adapter->tx_fifo_stall_timer.data = (unsigned long)adapter; |
1da177e4 LT |
1056 | |
1057 | init_timer(&adapter->watchdog_timer); | |
c061b18d | 1058 | adapter->watchdog_timer.function = e1000_watchdog; |
1da177e4 LT |
1059 | adapter->watchdog_timer.data = (unsigned long) adapter; |
1060 | ||
1da177e4 | 1061 | init_timer(&adapter->phy_info_timer); |
c061b18d | 1062 | adapter->phy_info_timer.function = e1000_update_phy_info; |
e982f17c | 1063 | adapter->phy_info_timer.data = (unsigned long)adapter; |
1da177e4 | 1064 | |
5cf42fcd | 1065 | INIT_WORK(&adapter->fifo_stall_task, e1000_82547_tx_fifo_stall_task); |
65f27f38 | 1066 | INIT_WORK(&adapter->reset_task, e1000_reset_task); |
5cf42fcd | 1067 | INIT_WORK(&adapter->phy_info_task, e1000_update_phy_info_task); |
1da177e4 | 1068 | |
1da177e4 LT |
1069 | e1000_check_options(adapter); |
1070 | ||
1071 | /* Initial Wake on LAN setting | |
1072 | * If APM wake is enabled in the EEPROM, | |
1073 | * enable the ACPI Magic Packet filter | |
1074 | */ | |
1075 | ||
1dc32918 | 1076 | switch (hw->mac_type) { |
1da177e4 LT |
1077 | case e1000_82542_rev2_0: |
1078 | case e1000_82542_rev2_1: | |
1079 | case e1000_82543: | |
1080 | break; | |
1081 | case e1000_82544: | |
1dc32918 | 1082 | e1000_read_eeprom(hw, |
1da177e4 LT |
1083 | EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data); |
1084 | eeprom_apme_mask = E1000_EEPROM_82544_APM; | |
1085 | break; | |
1086 | case e1000_82546: | |
1087 | case e1000_82546_rev_3: | |
1dc32918 JP |
1088 | if (er32(STATUS) & E1000_STATUS_FUNC_1){ |
1089 | e1000_read_eeprom(hw, | |
1da177e4 LT |
1090 | EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); |
1091 | break; | |
1092 | } | |
1093 | /* Fall Through */ | |
1094 | default: | |
1dc32918 | 1095 | e1000_read_eeprom(hw, |
1da177e4 LT |
1096 | EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); |
1097 | break; | |
1098 | } | |
96838a40 | 1099 | if (eeprom_data & eeprom_apme_mask) |
120cd576 JB |
1100 | adapter->eeprom_wol |= E1000_WUFC_MAG; |
1101 | ||
1102 | /* now that we have the eeprom settings, apply the special cases | |
1103 | * where the eeprom may be wrong or the board simply won't support | |
1104 | * wake on lan on a particular port */ | |
1105 | switch (pdev->device) { | |
1106 | case E1000_DEV_ID_82546GB_PCIE: | |
1107 | adapter->eeprom_wol = 0; | |
1108 | break; | |
1109 | case E1000_DEV_ID_82546EB_FIBER: | |
1110 | case E1000_DEV_ID_82546GB_FIBER: | |
120cd576 JB |
1111 | /* Wake events only supported on port A for dual fiber |
1112 | * regardless of eeprom setting */ | |
1dc32918 | 1113 | if (er32(STATUS) & E1000_STATUS_FUNC_1) |
120cd576 JB |
1114 | adapter->eeprom_wol = 0; |
1115 | break; | |
1116 | case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: | |
1117 | /* if quad port adapter, disable WoL on all but port A */ | |
1118 | if (global_quad_port_a != 0) | |
1119 | adapter->eeprom_wol = 0; | |
1120 | else | |
1121 | adapter->quad_port_a = 1; | |
1122 | /* Reset for multiple quad port adapters */ | |
1123 | if (++global_quad_port_a == 4) | |
1124 | global_quad_port_a = 0; | |
1125 | break; | |
1126 | } | |
1127 | ||
1128 | /* initialize the wol settings based on the eeprom settings */ | |
1129 | adapter->wol = adapter->eeprom_wol; | |
de126489 | 1130 | device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); |
1da177e4 | 1131 | |
675ad473 ET |
1132 | /* reset the hardware with the new settings */ |
1133 | e1000_reset(adapter); | |
1134 | ||
1135 | strcpy(netdev->name, "eth%d"); | |
1136 | err = register_netdev(netdev); | |
1137 | if (err) | |
1138 | goto err_register; | |
1139 | ||
fb3d47d4 | 1140 | /* print bus type/speed/width info */ |
feb8f478 | 1141 | e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n", |
7837e58c JP |
1142 | ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""), |
1143 | ((hw->bus_speed == e1000_bus_speed_133) ? 133 : | |
1144 | (hw->bus_speed == e1000_bus_speed_120) ? 120 : | |
1145 | (hw->bus_speed == e1000_bus_speed_100) ? 100 : | |
1146 | (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33), | |
1147 | ((hw->bus_width == e1000_bus_width_64) ? 64 : 32), | |
1148 | netdev->dev_addr); | |
1314bbf3 | 1149 | |
eb62efd2 JB |
1150 | /* carrier off reporting is important to ethtool even BEFORE open */ |
1151 | netif_carrier_off(netdev); | |
1152 | ||
feb8f478 | 1153 | e_info(probe, "Intel(R) PRO/1000 Network Connection\n"); |
1da177e4 LT |
1154 | |
1155 | cards_found++; | |
1156 | return 0; | |
1157 | ||
1158 | err_register: | |
6dd62ab0 | 1159 | err_eeprom: |
1532ecea | 1160 | e1000_phy_hw_reset(hw); |
6dd62ab0 | 1161 | |
1dc32918 JP |
1162 | if (hw->flash_address) |
1163 | iounmap(hw->flash_address); | |
6dd62ab0 VA |
1164 | kfree(adapter->tx_ring); |
1165 | kfree(adapter->rx_ring); | |
e508be17 | 1166 | err_dma: |
1da177e4 | 1167 | err_sw_init: |
1dc32918 | 1168 | iounmap(hw->hw_addr); |
1da177e4 LT |
1169 | err_ioremap: |
1170 | free_netdev(netdev); | |
1171 | err_alloc_etherdev: | |
81250297 | 1172 | pci_release_selected_regions(pdev, bars); |
6dd62ab0 | 1173 | err_pci_reg: |
6dd62ab0 | 1174 | pci_disable_device(pdev); |
1da177e4 LT |
1175 | return err; |
1176 | } | |
1177 | ||
1178 | /** | |
1179 | * e1000_remove - Device Removal Routine | |
1180 | * @pdev: PCI device information struct | |
1181 | * | |
1182 | * e1000_remove is called by the PCI subsystem to alert the driver | |
1183 | * that it should release a PCI device. The could be caused by a | |
1184 | * Hot-Plug event, or because the driver is going to be removed from | |
1185 | * memory. | |
1186 | **/ | |
1187 | ||
64798845 | 1188 | static void __devexit e1000_remove(struct pci_dev *pdev) |
1da177e4 LT |
1189 | { |
1190 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 1191 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 1192 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 1193 | |
baa34745 JB |
1194 | set_bit(__E1000_DOWN, &adapter->flags); |
1195 | del_timer_sync(&adapter->tx_fifo_stall_timer); | |
1196 | del_timer_sync(&adapter->watchdog_timer); | |
1197 | del_timer_sync(&adapter->phy_info_timer); | |
1198 | ||
28e53bdd | 1199 | cancel_work_sync(&adapter->reset_task); |
be2b28ed | 1200 | |
0fccd0e9 | 1201 | e1000_release_manageability(adapter); |
1da177e4 | 1202 | |
bea3348e SH |
1203 | unregister_netdev(netdev); |
1204 | ||
1532ecea | 1205 | e1000_phy_hw_reset(hw); |
1da177e4 | 1206 | |
24025e4e MC |
1207 | kfree(adapter->tx_ring); |
1208 | kfree(adapter->rx_ring); | |
24025e4e | 1209 | |
1dc32918 JP |
1210 | iounmap(hw->hw_addr); |
1211 | if (hw->flash_address) | |
1212 | iounmap(hw->flash_address); | |
81250297 | 1213 | pci_release_selected_regions(pdev, adapter->bars); |
1da177e4 LT |
1214 | |
1215 | free_netdev(netdev); | |
1216 | ||
1217 | pci_disable_device(pdev); | |
1218 | } | |
1219 | ||
1220 | /** | |
1221 | * e1000_sw_init - Initialize general software structures (struct e1000_adapter) | |
1222 | * @adapter: board private structure to initialize | |
1223 | * | |
1224 | * e1000_sw_init initializes the Adapter private data structure. | |
e508be17 | 1225 | * e1000_init_hw_struct MUST be called before this function |
1da177e4 LT |
1226 | **/ |
1227 | ||
64798845 | 1228 | static int __devinit e1000_sw_init(struct e1000_adapter *adapter) |
1da177e4 | 1229 | { |
eb0f8054 | 1230 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; |
1da177e4 | 1231 | |
f56799ea JK |
1232 | adapter->num_tx_queues = 1; |
1233 | adapter->num_rx_queues = 1; | |
581d708e MC |
1234 | |
1235 | if (e1000_alloc_queues(adapter)) { | |
feb8f478 | 1236 | e_err(probe, "Unable to allocate memory for queues\n"); |
581d708e MC |
1237 | return -ENOMEM; |
1238 | } | |
1239 | ||
47313054 | 1240 | /* Explicitly disable IRQ since the NIC can be in any state. */ |
47313054 HX |
1241 | e1000_irq_disable(adapter); |
1242 | ||
1da177e4 | 1243 | spin_lock_init(&adapter->stats_lock); |
1da177e4 | 1244 | |
1314bbf3 AK |
1245 | set_bit(__E1000_DOWN, &adapter->flags); |
1246 | ||
1da177e4 LT |
1247 | return 0; |
1248 | } | |
1249 | ||
581d708e MC |
1250 | /** |
1251 | * e1000_alloc_queues - Allocate memory for all rings | |
1252 | * @adapter: board private structure to initialize | |
1253 | * | |
1254 | * We allocate one ring per queue at run-time since we don't know the | |
3e1d7cd2 | 1255 | * number of queues at compile-time. |
581d708e MC |
1256 | **/ |
1257 | ||
64798845 | 1258 | static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter) |
581d708e | 1259 | { |
1c7e5b12 YB |
1260 | adapter->tx_ring = kcalloc(adapter->num_tx_queues, |
1261 | sizeof(struct e1000_tx_ring), GFP_KERNEL); | |
581d708e MC |
1262 | if (!adapter->tx_ring) |
1263 | return -ENOMEM; | |
581d708e | 1264 | |
1c7e5b12 YB |
1265 | adapter->rx_ring = kcalloc(adapter->num_rx_queues, |
1266 | sizeof(struct e1000_rx_ring), GFP_KERNEL); | |
581d708e MC |
1267 | if (!adapter->rx_ring) { |
1268 | kfree(adapter->tx_ring); | |
1269 | return -ENOMEM; | |
1270 | } | |
581d708e | 1271 | |
581d708e MC |
1272 | return E1000_SUCCESS; |
1273 | } | |
1274 | ||
1da177e4 LT |
1275 | /** |
1276 | * e1000_open - Called when a network interface is made active | |
1277 | * @netdev: network interface device structure | |
1278 | * | |
1279 | * Returns 0 on success, negative value on failure | |
1280 | * | |
1281 | * The open entry point is called when a network interface is made | |
1282 | * active by the system (IFF_UP). At this point all resources needed | |
1283 | * for transmit and receive operations are allocated, the interrupt | |
1284 | * handler is registered with the OS, the watchdog timer is started, | |
1285 | * and the stack is notified that the interface is ready. | |
1286 | **/ | |
1287 | ||
64798845 | 1288 | static int e1000_open(struct net_device *netdev) |
1da177e4 | 1289 | { |
60490fe0 | 1290 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 1291 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
1292 | int err; |
1293 | ||
2db10a08 | 1294 | /* disallow open during test */ |
1314bbf3 | 1295 | if (test_bit(__E1000_TESTING, &adapter->flags)) |
2db10a08 AK |
1296 | return -EBUSY; |
1297 | ||
eb62efd2 JB |
1298 | netif_carrier_off(netdev); |
1299 | ||
1da177e4 | 1300 | /* allocate transmit descriptors */ |
e0aac5a2 AK |
1301 | err = e1000_setup_all_tx_resources(adapter); |
1302 | if (err) | |
1da177e4 LT |
1303 | goto err_setup_tx; |
1304 | ||
1305 | /* allocate receive descriptors */ | |
e0aac5a2 | 1306 | err = e1000_setup_all_rx_resources(adapter); |
b5bf28cd | 1307 | if (err) |
e0aac5a2 | 1308 | goto err_setup_rx; |
b5bf28cd | 1309 | |
79f05bf0 AK |
1310 | e1000_power_up_phy(adapter); |
1311 | ||
2d7edb92 | 1312 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; |
1dc32918 | 1313 | if ((hw->mng_cookie.status & |
2d7edb92 MC |
1314 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { |
1315 | e1000_update_mng_vlan(adapter); | |
1316 | } | |
1da177e4 | 1317 | |
e0aac5a2 AK |
1318 | /* before we allocate an interrupt, we must be ready to handle it. |
1319 | * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt | |
1320 | * as soon as we call pci_request_irq, so we have to setup our | |
1321 | * clean_rx handler before we do so. */ | |
1322 | e1000_configure(adapter); | |
1323 | ||
1324 | err = e1000_request_irq(adapter); | |
1325 | if (err) | |
1326 | goto err_req_irq; | |
1327 | ||
1328 | /* From here on the code is the same as e1000_up() */ | |
1329 | clear_bit(__E1000_DOWN, &adapter->flags); | |
1330 | ||
bea3348e | 1331 | napi_enable(&adapter->napi); |
47313054 | 1332 | |
e0aac5a2 AK |
1333 | e1000_irq_enable(adapter); |
1334 | ||
076152d5 BH |
1335 | netif_start_queue(netdev); |
1336 | ||
e0aac5a2 | 1337 | /* fire a link status change interrupt to start the watchdog */ |
1dc32918 | 1338 | ew32(ICS, E1000_ICS_LSC); |
e0aac5a2 | 1339 | |
1da177e4 LT |
1340 | return E1000_SUCCESS; |
1341 | ||
b5bf28cd | 1342 | err_req_irq: |
e0aac5a2 | 1343 | e1000_power_down_phy(adapter); |
581d708e | 1344 | e1000_free_all_rx_resources(adapter); |
1da177e4 | 1345 | err_setup_rx: |
581d708e | 1346 | e1000_free_all_tx_resources(adapter); |
1da177e4 LT |
1347 | err_setup_tx: |
1348 | e1000_reset(adapter); | |
1349 | ||
1350 | return err; | |
1351 | } | |
1352 | ||
1353 | /** | |
1354 | * e1000_close - Disables a network interface | |
1355 | * @netdev: network interface device structure | |
1356 | * | |
1357 | * Returns 0, this is not allowed to fail | |
1358 | * | |
1359 | * The close entry point is called when an interface is de-activated | |
1360 | * by the OS. The hardware is still under the drivers control, but | |
1361 | * needs to be disabled. A global MAC reset is issued to stop the | |
1362 | * hardware, and all transmit and receive resources are freed. | |
1363 | **/ | |
1364 | ||
64798845 | 1365 | static int e1000_close(struct net_device *netdev) |
1da177e4 | 1366 | { |
60490fe0 | 1367 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 1368 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 1369 | |
2db10a08 | 1370 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); |
1da177e4 | 1371 | e1000_down(adapter); |
79f05bf0 | 1372 | e1000_power_down_phy(adapter); |
2db10a08 | 1373 | e1000_free_irq(adapter); |
1da177e4 | 1374 | |
581d708e MC |
1375 | e1000_free_all_tx_resources(adapter); |
1376 | e1000_free_all_rx_resources(adapter); | |
1da177e4 | 1377 | |
4666560a BA |
1378 | /* kill manageability vlan ID if supported, but not if a vlan with |
1379 | * the same ID is registered on the host OS (let 8021q kill it) */ | |
1dc32918 | 1380 | if ((hw->mng_cookie.status & |
4666560a BA |
1381 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && |
1382 | !(adapter->vlgrp && | |
5c15bdec | 1383 | vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) { |
2d7edb92 MC |
1384 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); |
1385 | } | |
b55ccb35 | 1386 | |
1da177e4 LT |
1387 | return 0; |
1388 | } | |
1389 | ||
1390 | /** | |
1391 | * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary | |
1392 | * @adapter: address of board private structure | |
2d7edb92 MC |
1393 | * @start: address of beginning of memory |
1394 | * @len: length of memory | |
1da177e4 | 1395 | **/ |
64798845 JP |
1396 | static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start, |
1397 | unsigned long len) | |
1da177e4 | 1398 | { |
1dc32918 | 1399 | struct e1000_hw *hw = &adapter->hw; |
e982f17c | 1400 | unsigned long begin = (unsigned long)start; |
1da177e4 LT |
1401 | unsigned long end = begin + len; |
1402 | ||
2648345f MC |
1403 | /* First rev 82545 and 82546 need to not allow any memory |
1404 | * write location to cross 64k boundary due to errata 23 */ | |
1dc32918 JP |
1405 | if (hw->mac_type == e1000_82545 || |
1406 | hw->mac_type == e1000_82546) { | |
c3033b01 | 1407 | return ((begin ^ (end - 1)) >> 16) != 0 ? false : true; |
1da177e4 LT |
1408 | } |
1409 | ||
c3033b01 | 1410 | return true; |
1da177e4 LT |
1411 | } |
1412 | ||
1413 | /** | |
1414 | * e1000_setup_tx_resources - allocate Tx resources (Descriptors) | |
1415 | * @adapter: board private structure | |
581d708e | 1416 | * @txdr: tx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1417 | * |
1418 | * Return 0 on success, negative on failure | |
1419 | **/ | |
1420 | ||
64798845 JP |
1421 | static int e1000_setup_tx_resources(struct e1000_adapter *adapter, |
1422 | struct e1000_tx_ring *txdr) | |
1da177e4 | 1423 | { |
1da177e4 LT |
1424 | struct pci_dev *pdev = adapter->pdev; |
1425 | int size; | |
1426 | ||
1427 | size = sizeof(struct e1000_buffer) * txdr->count; | |
cd94dd0b | 1428 | txdr->buffer_info = vmalloc(size); |
96838a40 | 1429 | if (!txdr->buffer_info) { |
feb8f478 ET |
1430 | e_err(probe, "Unable to allocate memory for the Tx descriptor " |
1431 | "ring\n"); | |
1da177e4 LT |
1432 | return -ENOMEM; |
1433 | } | |
1434 | memset(txdr->buffer_info, 0, size); | |
1435 | ||
1436 | /* round up to nearest 4K */ | |
1437 | ||
1438 | txdr->size = txdr->count * sizeof(struct e1000_tx_desc); | |
9099cfb9 | 1439 | txdr->size = ALIGN(txdr->size, 4096); |
1da177e4 | 1440 | |
b16f53be NN |
1441 | txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma, |
1442 | GFP_KERNEL); | |
96838a40 | 1443 | if (!txdr->desc) { |
1da177e4 | 1444 | setup_tx_desc_die: |
1da177e4 | 1445 | vfree(txdr->buffer_info); |
feb8f478 ET |
1446 | e_err(probe, "Unable to allocate memory for the Tx descriptor " |
1447 | "ring\n"); | |
1da177e4 LT |
1448 | return -ENOMEM; |
1449 | } | |
1450 | ||
2648345f | 1451 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1452 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { |
1453 | void *olddesc = txdr->desc; | |
1454 | dma_addr_t olddma = txdr->dma; | |
feb8f478 | 1455 | e_err(tx_err, "txdr align check failed: %u bytes at %p\n", |
675ad473 | 1456 | txdr->size, txdr->desc); |
2648345f | 1457 | /* Try again, without freeing the previous */ |
b16f53be NN |
1458 | txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, |
1459 | &txdr->dma, GFP_KERNEL); | |
2648345f | 1460 | /* Failed allocation, critical failure */ |
96838a40 | 1461 | if (!txdr->desc) { |
b16f53be NN |
1462 | dma_free_coherent(&pdev->dev, txdr->size, olddesc, |
1463 | olddma); | |
1da177e4 LT |
1464 | goto setup_tx_desc_die; |
1465 | } | |
1466 | ||
1467 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { | |
1468 | /* give up */ | |
b16f53be NN |
1469 | dma_free_coherent(&pdev->dev, txdr->size, txdr->desc, |
1470 | txdr->dma); | |
1471 | dma_free_coherent(&pdev->dev, txdr->size, olddesc, | |
1472 | olddma); | |
feb8f478 | 1473 | e_err(probe, "Unable to allocate aligned memory " |
675ad473 | 1474 | "for the transmit descriptor ring\n"); |
1da177e4 LT |
1475 | vfree(txdr->buffer_info); |
1476 | return -ENOMEM; | |
1477 | } else { | |
2648345f | 1478 | /* Free old allocation, new allocation was successful */ |
b16f53be NN |
1479 | dma_free_coherent(&pdev->dev, txdr->size, olddesc, |
1480 | olddma); | |
1da177e4 LT |
1481 | } |
1482 | } | |
1483 | memset(txdr->desc, 0, txdr->size); | |
1484 | ||
1485 | txdr->next_to_use = 0; | |
1486 | txdr->next_to_clean = 0; | |
1487 | ||
1488 | return 0; | |
1489 | } | |
1490 | ||
581d708e MC |
1491 | /** |
1492 | * e1000_setup_all_tx_resources - wrapper to allocate Tx resources | |
1493 | * (Descriptors) for all queues | |
1494 | * @adapter: board private structure | |
1495 | * | |
581d708e MC |
1496 | * Return 0 on success, negative on failure |
1497 | **/ | |
1498 | ||
64798845 | 1499 | int e1000_setup_all_tx_resources(struct e1000_adapter *adapter) |
581d708e MC |
1500 | { |
1501 | int i, err = 0; | |
1502 | ||
f56799ea | 1503 | for (i = 0; i < adapter->num_tx_queues; i++) { |
581d708e MC |
1504 | err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]); |
1505 | if (err) { | |
feb8f478 | 1506 | e_err(probe, "Allocation for Tx Queue %u failed\n", i); |
3fbbc72e VA |
1507 | for (i-- ; i >= 0; i--) |
1508 | e1000_free_tx_resources(adapter, | |
1509 | &adapter->tx_ring[i]); | |
581d708e MC |
1510 | break; |
1511 | } | |
1512 | } | |
1513 | ||
1514 | return err; | |
1515 | } | |
1516 | ||
1da177e4 LT |
1517 | /** |
1518 | * e1000_configure_tx - Configure 8254x Transmit Unit after Reset | |
1519 | * @adapter: board private structure | |
1520 | * | |
1521 | * Configure the Tx unit of the MAC after a reset. | |
1522 | **/ | |
1523 | ||
64798845 | 1524 | static void e1000_configure_tx(struct e1000_adapter *adapter) |
1da177e4 | 1525 | { |
406874a7 | 1526 | u64 tdba; |
581d708e | 1527 | struct e1000_hw *hw = &adapter->hw; |
1532ecea | 1528 | u32 tdlen, tctl, tipg; |
406874a7 | 1529 | u32 ipgr1, ipgr2; |
1da177e4 LT |
1530 | |
1531 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
1532 | ||
f56799ea | 1533 | switch (adapter->num_tx_queues) { |
24025e4e MC |
1534 | case 1: |
1535 | default: | |
581d708e MC |
1536 | tdba = adapter->tx_ring[0].dma; |
1537 | tdlen = adapter->tx_ring[0].count * | |
1538 | sizeof(struct e1000_tx_desc); | |
1dc32918 JP |
1539 | ew32(TDLEN, tdlen); |
1540 | ew32(TDBAH, (tdba >> 32)); | |
1541 | ew32(TDBAL, (tdba & 0x00000000ffffffffULL)); | |
1542 | ew32(TDT, 0); | |
1543 | ew32(TDH, 0); | |
6a951698 AK |
1544 | adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH); |
1545 | adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT); | |
24025e4e MC |
1546 | break; |
1547 | } | |
1da177e4 LT |
1548 | |
1549 | /* Set the default values for the Tx Inter Packet Gap timer */ | |
1532ecea | 1550 | if ((hw->media_type == e1000_media_type_fiber || |
d89b6c67 | 1551 | hw->media_type == e1000_media_type_internal_serdes)) |
0fadb059 JK |
1552 | tipg = DEFAULT_82543_TIPG_IPGT_FIBER; |
1553 | else | |
1554 | tipg = DEFAULT_82543_TIPG_IPGT_COPPER; | |
1555 | ||
581d708e | 1556 | switch (hw->mac_type) { |
1da177e4 LT |
1557 | case e1000_82542_rev2_0: |
1558 | case e1000_82542_rev2_1: | |
1559 | tipg = DEFAULT_82542_TIPG_IPGT; | |
0fadb059 JK |
1560 | ipgr1 = DEFAULT_82542_TIPG_IPGR1; |
1561 | ipgr2 = DEFAULT_82542_TIPG_IPGR2; | |
1da177e4 LT |
1562 | break; |
1563 | default: | |
0fadb059 JK |
1564 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; |
1565 | ipgr2 = DEFAULT_82543_TIPG_IPGR2; | |
1566 | break; | |
1da177e4 | 1567 | } |
0fadb059 JK |
1568 | tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT; |
1569 | tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT; | |
1dc32918 | 1570 | ew32(TIPG, tipg); |
1da177e4 LT |
1571 | |
1572 | /* Set the Tx Interrupt Delay register */ | |
1573 | ||
1dc32918 | 1574 | ew32(TIDV, adapter->tx_int_delay); |
581d708e | 1575 | if (hw->mac_type >= e1000_82540) |
1dc32918 | 1576 | ew32(TADV, adapter->tx_abs_int_delay); |
1da177e4 LT |
1577 | |
1578 | /* Program the Transmit Control Register */ | |
1579 | ||
1dc32918 | 1580 | tctl = er32(TCTL); |
1da177e4 | 1581 | tctl &= ~E1000_TCTL_CT; |
7e6c9861 | 1582 | tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | |
1da177e4 LT |
1583 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); |
1584 | ||
581d708e | 1585 | e1000_config_collision_dist(hw); |
1da177e4 LT |
1586 | |
1587 | /* Setup Transmit Descriptor Settings for eop descriptor */ | |
6a042dab JB |
1588 | adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; |
1589 | ||
1590 | /* only set IDE if we are delaying interrupts using the timers */ | |
1591 | if (adapter->tx_int_delay) | |
1592 | adapter->txd_cmd |= E1000_TXD_CMD_IDE; | |
1da177e4 | 1593 | |
581d708e | 1594 | if (hw->mac_type < e1000_82543) |
1da177e4 LT |
1595 | adapter->txd_cmd |= E1000_TXD_CMD_RPS; |
1596 | else | |
1597 | adapter->txd_cmd |= E1000_TXD_CMD_RS; | |
1598 | ||
1599 | /* Cache if we're 82544 running in PCI-X because we'll | |
1600 | * need this to apply a workaround later in the send path. */ | |
581d708e MC |
1601 | if (hw->mac_type == e1000_82544 && |
1602 | hw->bus_type == e1000_bus_type_pcix) | |
1da177e4 | 1603 | adapter->pcix_82544 = 1; |
7e6c9861 | 1604 | |
1dc32918 | 1605 | ew32(TCTL, tctl); |
7e6c9861 | 1606 | |
1da177e4 LT |
1607 | } |
1608 | ||
1609 | /** | |
1610 | * e1000_setup_rx_resources - allocate Rx resources (Descriptors) | |
1611 | * @adapter: board private structure | |
581d708e | 1612 | * @rxdr: rx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1613 | * |
1614 | * Returns 0 on success, negative on failure | |
1615 | **/ | |
1616 | ||
64798845 JP |
1617 | static int e1000_setup_rx_resources(struct e1000_adapter *adapter, |
1618 | struct e1000_rx_ring *rxdr) | |
1da177e4 | 1619 | { |
1da177e4 | 1620 | struct pci_dev *pdev = adapter->pdev; |
2d7edb92 | 1621 | int size, desc_len; |
1da177e4 LT |
1622 | |
1623 | size = sizeof(struct e1000_buffer) * rxdr->count; | |
cd94dd0b | 1624 | rxdr->buffer_info = vmalloc(size); |
581d708e | 1625 | if (!rxdr->buffer_info) { |
feb8f478 ET |
1626 | e_err(probe, "Unable to allocate memory for the Rx descriptor " |
1627 | "ring\n"); | |
1da177e4 LT |
1628 | return -ENOMEM; |
1629 | } | |
1630 | memset(rxdr->buffer_info, 0, size); | |
1631 | ||
1532ecea | 1632 | desc_len = sizeof(struct e1000_rx_desc); |
2d7edb92 | 1633 | |
1da177e4 LT |
1634 | /* Round up to nearest 4K */ |
1635 | ||
2d7edb92 | 1636 | rxdr->size = rxdr->count * desc_len; |
9099cfb9 | 1637 | rxdr->size = ALIGN(rxdr->size, 4096); |
1da177e4 | 1638 | |
b16f53be NN |
1639 | rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma, |
1640 | GFP_KERNEL); | |
1da177e4 | 1641 | |
581d708e | 1642 | if (!rxdr->desc) { |
feb8f478 ET |
1643 | e_err(probe, "Unable to allocate memory for the Rx descriptor " |
1644 | "ring\n"); | |
1da177e4 | 1645 | setup_rx_desc_die: |
1da177e4 LT |
1646 | vfree(rxdr->buffer_info); |
1647 | return -ENOMEM; | |
1648 | } | |
1649 | ||
2648345f | 1650 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1651 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { |
1652 | void *olddesc = rxdr->desc; | |
1653 | dma_addr_t olddma = rxdr->dma; | |
feb8f478 | 1654 | e_err(rx_err, "rxdr align check failed: %u bytes at %p\n", |
675ad473 | 1655 | rxdr->size, rxdr->desc); |
2648345f | 1656 | /* Try again, without freeing the previous */ |
b16f53be NN |
1657 | rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, |
1658 | &rxdr->dma, GFP_KERNEL); | |
2648345f | 1659 | /* Failed allocation, critical failure */ |
581d708e | 1660 | if (!rxdr->desc) { |
b16f53be NN |
1661 | dma_free_coherent(&pdev->dev, rxdr->size, olddesc, |
1662 | olddma); | |
feb8f478 ET |
1663 | e_err(probe, "Unable to allocate memory for the Rx " |
1664 | "descriptor ring\n"); | |
1da177e4 LT |
1665 | goto setup_rx_desc_die; |
1666 | } | |
1667 | ||
1668 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { | |
1669 | /* give up */ | |
b16f53be NN |
1670 | dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc, |
1671 | rxdr->dma); | |
1672 | dma_free_coherent(&pdev->dev, rxdr->size, olddesc, | |
1673 | olddma); | |
feb8f478 ET |
1674 | e_err(probe, "Unable to allocate aligned memory for " |
1675 | "the Rx descriptor ring\n"); | |
581d708e | 1676 | goto setup_rx_desc_die; |
1da177e4 | 1677 | } else { |
2648345f | 1678 | /* Free old allocation, new allocation was successful */ |
b16f53be NN |
1679 | dma_free_coherent(&pdev->dev, rxdr->size, olddesc, |
1680 | olddma); | |
1da177e4 LT |
1681 | } |
1682 | } | |
1683 | memset(rxdr->desc, 0, rxdr->size); | |
1684 | ||
1685 | rxdr->next_to_clean = 0; | |
1686 | rxdr->next_to_use = 0; | |
edbbb3ca | 1687 | rxdr->rx_skb_top = NULL; |
1da177e4 LT |
1688 | |
1689 | return 0; | |
1690 | } | |
1691 | ||
581d708e MC |
1692 | /** |
1693 | * e1000_setup_all_rx_resources - wrapper to allocate Rx resources | |
1694 | * (Descriptors) for all queues | |
1695 | * @adapter: board private structure | |
1696 | * | |
581d708e MC |
1697 | * Return 0 on success, negative on failure |
1698 | **/ | |
1699 | ||
64798845 | 1700 | int e1000_setup_all_rx_resources(struct e1000_adapter *adapter) |
581d708e MC |
1701 | { |
1702 | int i, err = 0; | |
1703 | ||
f56799ea | 1704 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
1705 | err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]); |
1706 | if (err) { | |
feb8f478 | 1707 | e_err(probe, "Allocation for Rx Queue %u failed\n", i); |
3fbbc72e VA |
1708 | for (i-- ; i >= 0; i--) |
1709 | e1000_free_rx_resources(adapter, | |
1710 | &adapter->rx_ring[i]); | |
581d708e MC |
1711 | break; |
1712 | } | |
1713 | } | |
1714 | ||
1715 | return err; | |
1716 | } | |
1717 | ||
1da177e4 | 1718 | /** |
2648345f | 1719 | * e1000_setup_rctl - configure the receive control registers |
1da177e4 LT |
1720 | * @adapter: Board private structure |
1721 | **/ | |
64798845 | 1722 | static void e1000_setup_rctl(struct e1000_adapter *adapter) |
1da177e4 | 1723 | { |
1dc32918 | 1724 | struct e1000_hw *hw = &adapter->hw; |
630b25cd | 1725 | u32 rctl; |
1da177e4 | 1726 | |
1dc32918 | 1727 | rctl = er32(RCTL); |
1da177e4 LT |
1728 | |
1729 | rctl &= ~(3 << E1000_RCTL_MO_SHIFT); | |
1730 | ||
1731 | rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | | |
1732 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | |
1dc32918 | 1733 | (hw->mc_filter_type << E1000_RCTL_MO_SHIFT); |
1da177e4 | 1734 | |
1dc32918 | 1735 | if (hw->tbi_compatibility_on == 1) |
1da177e4 LT |
1736 | rctl |= E1000_RCTL_SBP; |
1737 | else | |
1738 | rctl &= ~E1000_RCTL_SBP; | |
1739 | ||
2d7edb92 MC |
1740 | if (adapter->netdev->mtu <= ETH_DATA_LEN) |
1741 | rctl &= ~E1000_RCTL_LPE; | |
1742 | else | |
1743 | rctl |= E1000_RCTL_LPE; | |
1744 | ||
1da177e4 | 1745 | /* Setup buffer sizes */ |
9e2feace AK |
1746 | rctl &= ~E1000_RCTL_SZ_4096; |
1747 | rctl |= E1000_RCTL_BSEX; | |
1748 | switch (adapter->rx_buffer_len) { | |
a1415ee6 JK |
1749 | case E1000_RXBUFFER_2048: |
1750 | default: | |
1751 | rctl |= E1000_RCTL_SZ_2048; | |
1752 | rctl &= ~E1000_RCTL_BSEX; | |
1753 | break; | |
1754 | case E1000_RXBUFFER_4096: | |
1755 | rctl |= E1000_RCTL_SZ_4096; | |
1756 | break; | |
1757 | case E1000_RXBUFFER_8192: | |
1758 | rctl |= E1000_RCTL_SZ_8192; | |
1759 | break; | |
1760 | case E1000_RXBUFFER_16384: | |
1761 | rctl |= E1000_RCTL_SZ_16384; | |
1762 | break; | |
2d7edb92 MC |
1763 | } |
1764 | ||
1dc32918 | 1765 | ew32(RCTL, rctl); |
1da177e4 LT |
1766 | } |
1767 | ||
1768 | /** | |
1769 | * e1000_configure_rx - Configure 8254x Receive Unit after Reset | |
1770 | * @adapter: board private structure | |
1771 | * | |
1772 | * Configure the Rx unit of the MAC after a reset. | |
1773 | **/ | |
1774 | ||
64798845 | 1775 | static void e1000_configure_rx(struct e1000_adapter *adapter) |
1da177e4 | 1776 | { |
406874a7 | 1777 | u64 rdba; |
581d708e | 1778 | struct e1000_hw *hw = &adapter->hw; |
1532ecea | 1779 | u32 rdlen, rctl, rxcsum; |
2d7edb92 | 1780 | |
edbbb3ca JB |
1781 | if (adapter->netdev->mtu > ETH_DATA_LEN) { |
1782 | rdlen = adapter->rx_ring[0].count * | |
1783 | sizeof(struct e1000_rx_desc); | |
1784 | adapter->clean_rx = e1000_clean_jumbo_rx_irq; | |
1785 | adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; | |
1786 | } else { | |
1787 | rdlen = adapter->rx_ring[0].count * | |
1788 | sizeof(struct e1000_rx_desc); | |
1789 | adapter->clean_rx = e1000_clean_rx_irq; | |
1790 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers; | |
1791 | } | |
1da177e4 LT |
1792 | |
1793 | /* disable receives while setting up the descriptors */ | |
1dc32918 JP |
1794 | rctl = er32(RCTL); |
1795 | ew32(RCTL, rctl & ~E1000_RCTL_EN); | |
1da177e4 LT |
1796 | |
1797 | /* set the Receive Delay Timer Register */ | |
1dc32918 | 1798 | ew32(RDTR, adapter->rx_int_delay); |
1da177e4 | 1799 | |
581d708e | 1800 | if (hw->mac_type >= e1000_82540) { |
1dc32918 | 1801 | ew32(RADV, adapter->rx_abs_int_delay); |
835bb129 | 1802 | if (adapter->itr_setting != 0) |
1dc32918 | 1803 | ew32(ITR, 1000000000 / (adapter->itr * 256)); |
1da177e4 LT |
1804 | } |
1805 | ||
581d708e MC |
1806 | /* Setup the HW Rx Head and Tail Descriptor Pointers and |
1807 | * the Base and Length of the Rx Descriptor Ring */ | |
f56799ea | 1808 | switch (adapter->num_rx_queues) { |
24025e4e MC |
1809 | case 1: |
1810 | default: | |
581d708e | 1811 | rdba = adapter->rx_ring[0].dma; |
1dc32918 JP |
1812 | ew32(RDLEN, rdlen); |
1813 | ew32(RDBAH, (rdba >> 32)); | |
1814 | ew32(RDBAL, (rdba & 0x00000000ffffffffULL)); | |
1815 | ew32(RDT, 0); | |
1816 | ew32(RDH, 0); | |
6a951698 AK |
1817 | adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH); |
1818 | adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT); | |
581d708e | 1819 | break; |
24025e4e MC |
1820 | } |
1821 | ||
1da177e4 | 1822 | /* Enable 82543 Receive Checksum Offload for TCP and UDP */ |
581d708e | 1823 | if (hw->mac_type >= e1000_82543) { |
1dc32918 | 1824 | rxcsum = er32(RXCSUM); |
630b25cd | 1825 | if (adapter->rx_csum) |
2d7edb92 | 1826 | rxcsum |= E1000_RXCSUM_TUOFL; |
630b25cd | 1827 | else |
2d7edb92 | 1828 | /* don't need to clear IPPCSE as it defaults to 0 */ |
630b25cd | 1829 | rxcsum &= ~E1000_RXCSUM_TUOFL; |
1dc32918 | 1830 | ew32(RXCSUM, rxcsum); |
1da177e4 LT |
1831 | } |
1832 | ||
1833 | /* Enable Receives */ | |
1dc32918 | 1834 | ew32(RCTL, rctl); |
1da177e4 LT |
1835 | } |
1836 | ||
1837 | /** | |
581d708e | 1838 | * e1000_free_tx_resources - Free Tx Resources per Queue |
1da177e4 | 1839 | * @adapter: board private structure |
581d708e | 1840 | * @tx_ring: Tx descriptor ring for a specific queue |
1da177e4 LT |
1841 | * |
1842 | * Free all transmit software resources | |
1843 | **/ | |
1844 | ||
64798845 JP |
1845 | static void e1000_free_tx_resources(struct e1000_adapter *adapter, |
1846 | struct e1000_tx_ring *tx_ring) | |
1da177e4 LT |
1847 | { |
1848 | struct pci_dev *pdev = adapter->pdev; | |
1849 | ||
581d708e | 1850 | e1000_clean_tx_ring(adapter, tx_ring); |
1da177e4 | 1851 | |
581d708e MC |
1852 | vfree(tx_ring->buffer_info); |
1853 | tx_ring->buffer_info = NULL; | |
1da177e4 | 1854 | |
b16f53be NN |
1855 | dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, |
1856 | tx_ring->dma); | |
1da177e4 | 1857 | |
581d708e MC |
1858 | tx_ring->desc = NULL; |
1859 | } | |
1860 | ||
1861 | /** | |
1862 | * e1000_free_all_tx_resources - Free Tx Resources for All Queues | |
1863 | * @adapter: board private structure | |
1864 | * | |
1865 | * Free all transmit software resources | |
1866 | **/ | |
1867 | ||
64798845 | 1868 | void e1000_free_all_tx_resources(struct e1000_adapter *adapter) |
581d708e MC |
1869 | { |
1870 | int i; | |
1871 | ||
f56799ea | 1872 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 1873 | e1000_free_tx_resources(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
1874 | } |
1875 | ||
64798845 JP |
1876 | static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter, |
1877 | struct e1000_buffer *buffer_info) | |
1da177e4 | 1878 | { |
602c0554 AD |
1879 | if (buffer_info->dma) { |
1880 | if (buffer_info->mapped_as_page) | |
b16f53be NN |
1881 | dma_unmap_page(&adapter->pdev->dev, buffer_info->dma, |
1882 | buffer_info->length, DMA_TO_DEVICE); | |
602c0554 | 1883 | else |
b16f53be | 1884 | dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, |
602c0554 | 1885 | buffer_info->length, |
b16f53be | 1886 | DMA_TO_DEVICE); |
602c0554 AD |
1887 | buffer_info->dma = 0; |
1888 | } | |
a9ebadd6 | 1889 | if (buffer_info->skb) { |
1da177e4 | 1890 | dev_kfree_skb_any(buffer_info->skb); |
a9ebadd6 JB |
1891 | buffer_info->skb = NULL; |
1892 | } | |
37e73df8 | 1893 | buffer_info->time_stamp = 0; |
a9ebadd6 | 1894 | /* buffer_info must be completely set up in the transmit path */ |
1da177e4 LT |
1895 | } |
1896 | ||
1897 | /** | |
1898 | * e1000_clean_tx_ring - Free Tx Buffers | |
1899 | * @adapter: board private structure | |
581d708e | 1900 | * @tx_ring: ring to be cleaned |
1da177e4 LT |
1901 | **/ |
1902 | ||
64798845 JP |
1903 | static void e1000_clean_tx_ring(struct e1000_adapter *adapter, |
1904 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 1905 | { |
1dc32918 | 1906 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
1907 | struct e1000_buffer *buffer_info; |
1908 | unsigned long size; | |
1909 | unsigned int i; | |
1910 | ||
1911 | /* Free all the Tx ring sk_buffs */ | |
1912 | ||
96838a40 | 1913 | for (i = 0; i < tx_ring->count; i++) { |
1da177e4 LT |
1914 | buffer_info = &tx_ring->buffer_info[i]; |
1915 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); | |
1916 | } | |
1917 | ||
1918 | size = sizeof(struct e1000_buffer) * tx_ring->count; | |
1919 | memset(tx_ring->buffer_info, 0, size); | |
1920 | ||
1921 | /* Zero out the descriptor ring */ | |
1922 | ||
1923 | memset(tx_ring->desc, 0, tx_ring->size); | |
1924 | ||
1925 | tx_ring->next_to_use = 0; | |
1926 | tx_ring->next_to_clean = 0; | |
fd803241 | 1927 | tx_ring->last_tx_tso = 0; |
1da177e4 | 1928 | |
1dc32918 JP |
1929 | writel(0, hw->hw_addr + tx_ring->tdh); |
1930 | writel(0, hw->hw_addr + tx_ring->tdt); | |
581d708e MC |
1931 | } |
1932 | ||
1933 | /** | |
1934 | * e1000_clean_all_tx_rings - Free Tx Buffers for all queues | |
1935 | * @adapter: board private structure | |
1936 | **/ | |
1937 | ||
64798845 | 1938 | static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter) |
581d708e MC |
1939 | { |
1940 | int i; | |
1941 | ||
f56799ea | 1942 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 1943 | e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
1944 | } |
1945 | ||
1946 | /** | |
1947 | * e1000_free_rx_resources - Free Rx Resources | |
1948 | * @adapter: board private structure | |
581d708e | 1949 | * @rx_ring: ring to clean the resources from |
1da177e4 LT |
1950 | * |
1951 | * Free all receive software resources | |
1952 | **/ | |
1953 | ||
64798845 JP |
1954 | static void e1000_free_rx_resources(struct e1000_adapter *adapter, |
1955 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 1956 | { |
1da177e4 LT |
1957 | struct pci_dev *pdev = adapter->pdev; |
1958 | ||
581d708e | 1959 | e1000_clean_rx_ring(adapter, rx_ring); |
1da177e4 LT |
1960 | |
1961 | vfree(rx_ring->buffer_info); | |
1962 | rx_ring->buffer_info = NULL; | |
1963 | ||
b16f53be NN |
1964 | dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, |
1965 | rx_ring->dma); | |
1da177e4 LT |
1966 | |
1967 | rx_ring->desc = NULL; | |
1968 | } | |
1969 | ||
1970 | /** | |
581d708e | 1971 | * e1000_free_all_rx_resources - Free Rx Resources for All Queues |
1da177e4 | 1972 | * @adapter: board private structure |
581d708e MC |
1973 | * |
1974 | * Free all receive software resources | |
1975 | **/ | |
1976 | ||
64798845 | 1977 | void e1000_free_all_rx_resources(struct e1000_adapter *adapter) |
581d708e MC |
1978 | { |
1979 | int i; | |
1980 | ||
f56799ea | 1981 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e MC |
1982 | e1000_free_rx_resources(adapter, &adapter->rx_ring[i]); |
1983 | } | |
1984 | ||
1985 | /** | |
1986 | * e1000_clean_rx_ring - Free Rx Buffers per Queue | |
1987 | * @adapter: board private structure | |
1988 | * @rx_ring: ring to free buffers from | |
1da177e4 LT |
1989 | **/ |
1990 | ||
64798845 JP |
1991 | static void e1000_clean_rx_ring(struct e1000_adapter *adapter, |
1992 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 1993 | { |
1dc32918 | 1994 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
1995 | struct e1000_buffer *buffer_info; |
1996 | struct pci_dev *pdev = adapter->pdev; | |
1997 | unsigned long size; | |
630b25cd | 1998 | unsigned int i; |
1da177e4 LT |
1999 | |
2000 | /* Free all the Rx ring sk_buffs */ | |
96838a40 | 2001 | for (i = 0; i < rx_ring->count; i++) { |
1da177e4 | 2002 | buffer_info = &rx_ring->buffer_info[i]; |
edbbb3ca JB |
2003 | if (buffer_info->dma && |
2004 | adapter->clean_rx == e1000_clean_rx_irq) { | |
b16f53be | 2005 | dma_unmap_single(&pdev->dev, buffer_info->dma, |
edbbb3ca | 2006 | buffer_info->length, |
b16f53be | 2007 | DMA_FROM_DEVICE); |
edbbb3ca JB |
2008 | } else if (buffer_info->dma && |
2009 | adapter->clean_rx == e1000_clean_jumbo_rx_irq) { | |
b16f53be NN |
2010 | dma_unmap_page(&pdev->dev, buffer_info->dma, |
2011 | buffer_info->length, | |
2012 | DMA_FROM_DEVICE); | |
679be3ba | 2013 | } |
1da177e4 | 2014 | |
679be3ba | 2015 | buffer_info->dma = 0; |
edbbb3ca JB |
2016 | if (buffer_info->page) { |
2017 | put_page(buffer_info->page); | |
2018 | buffer_info->page = NULL; | |
2019 | } | |
679be3ba | 2020 | if (buffer_info->skb) { |
1da177e4 LT |
2021 | dev_kfree_skb(buffer_info->skb); |
2022 | buffer_info->skb = NULL; | |
997f5cbd | 2023 | } |
1da177e4 LT |
2024 | } |
2025 | ||
edbbb3ca JB |
2026 | /* there also may be some cached data from a chained receive */ |
2027 | if (rx_ring->rx_skb_top) { | |
2028 | dev_kfree_skb(rx_ring->rx_skb_top); | |
2029 | rx_ring->rx_skb_top = NULL; | |
2030 | } | |
2031 | ||
1da177e4 LT |
2032 | size = sizeof(struct e1000_buffer) * rx_ring->count; |
2033 | memset(rx_ring->buffer_info, 0, size); | |
2034 | ||
2035 | /* Zero out the descriptor ring */ | |
1da177e4 LT |
2036 | memset(rx_ring->desc, 0, rx_ring->size); |
2037 | ||
2038 | rx_ring->next_to_clean = 0; | |
2039 | rx_ring->next_to_use = 0; | |
2040 | ||
1dc32918 JP |
2041 | writel(0, hw->hw_addr + rx_ring->rdh); |
2042 | writel(0, hw->hw_addr + rx_ring->rdt); | |
581d708e MC |
2043 | } |
2044 | ||
2045 | /** | |
2046 | * e1000_clean_all_rx_rings - Free Rx Buffers for all queues | |
2047 | * @adapter: board private structure | |
2048 | **/ | |
2049 | ||
64798845 | 2050 | static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter) |
581d708e MC |
2051 | { |
2052 | int i; | |
2053 | ||
f56799ea | 2054 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e | 2055 | e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]); |
1da177e4 LT |
2056 | } |
2057 | ||
2058 | /* The 82542 2.0 (revision 2) needs to have the receive unit in reset | |
2059 | * and memory write and invalidate disabled for certain operations | |
2060 | */ | |
64798845 | 2061 | static void e1000_enter_82542_rst(struct e1000_adapter *adapter) |
1da177e4 | 2062 | { |
1dc32918 | 2063 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 2064 | struct net_device *netdev = adapter->netdev; |
406874a7 | 2065 | u32 rctl; |
1da177e4 | 2066 | |
1dc32918 | 2067 | e1000_pci_clear_mwi(hw); |
1da177e4 | 2068 | |
1dc32918 | 2069 | rctl = er32(RCTL); |
1da177e4 | 2070 | rctl |= E1000_RCTL_RST; |
1dc32918 JP |
2071 | ew32(RCTL, rctl); |
2072 | E1000_WRITE_FLUSH(); | |
1da177e4 LT |
2073 | mdelay(5); |
2074 | ||
96838a40 | 2075 | if (netif_running(netdev)) |
581d708e | 2076 | e1000_clean_all_rx_rings(adapter); |
1da177e4 LT |
2077 | } |
2078 | ||
64798845 | 2079 | static void e1000_leave_82542_rst(struct e1000_adapter *adapter) |
1da177e4 | 2080 | { |
1dc32918 | 2081 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 2082 | struct net_device *netdev = adapter->netdev; |
406874a7 | 2083 | u32 rctl; |
1da177e4 | 2084 | |
1dc32918 | 2085 | rctl = er32(RCTL); |
1da177e4 | 2086 | rctl &= ~E1000_RCTL_RST; |
1dc32918 JP |
2087 | ew32(RCTL, rctl); |
2088 | E1000_WRITE_FLUSH(); | |
1da177e4 LT |
2089 | mdelay(5); |
2090 | ||
1dc32918 JP |
2091 | if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE) |
2092 | e1000_pci_set_mwi(hw); | |
1da177e4 | 2093 | |
96838a40 | 2094 | if (netif_running(netdev)) { |
72d64a43 JK |
2095 | /* No need to loop, because 82542 supports only 1 queue */ |
2096 | struct e1000_rx_ring *ring = &adapter->rx_ring[0]; | |
7c4d3367 | 2097 | e1000_configure_rx(adapter); |
72d64a43 | 2098 | adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring)); |
1da177e4 LT |
2099 | } |
2100 | } | |
2101 | ||
2102 | /** | |
2103 | * e1000_set_mac - Change the Ethernet Address of the NIC | |
2104 | * @netdev: network interface device structure | |
2105 | * @p: pointer to an address structure | |
2106 | * | |
2107 | * Returns 0 on success, negative on failure | |
2108 | **/ | |
2109 | ||
64798845 | 2110 | static int e1000_set_mac(struct net_device *netdev, void *p) |
1da177e4 | 2111 | { |
60490fe0 | 2112 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 2113 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
2114 | struct sockaddr *addr = p; |
2115 | ||
96838a40 | 2116 | if (!is_valid_ether_addr(addr->sa_data)) |
1da177e4 LT |
2117 | return -EADDRNOTAVAIL; |
2118 | ||
2119 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2120 | ||
1dc32918 | 2121 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2122 | e1000_enter_82542_rst(adapter); |
2123 | ||
2124 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
1dc32918 | 2125 | memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len); |
1da177e4 | 2126 | |
1dc32918 | 2127 | e1000_rar_set(hw, hw->mac_addr, 0); |
1da177e4 | 2128 | |
1dc32918 | 2129 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2130 | e1000_leave_82542_rst(adapter); |
2131 | ||
2132 | return 0; | |
2133 | } | |
2134 | ||
2135 | /** | |
db0ce50d | 2136 | * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set |
1da177e4 LT |
2137 | * @netdev: network interface device structure |
2138 | * | |
db0ce50d PM |
2139 | * The set_rx_mode entry point is called whenever the unicast or multicast |
2140 | * address lists or the network interface flags are updated. This routine is | |
2141 | * responsible for configuring the hardware for proper unicast, multicast, | |
1da177e4 LT |
2142 | * promiscuous mode, and all-multi behavior. |
2143 | **/ | |
2144 | ||
64798845 | 2145 | static void e1000_set_rx_mode(struct net_device *netdev) |
1da177e4 | 2146 | { |
60490fe0 | 2147 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 2148 | struct e1000_hw *hw = &adapter->hw; |
ccffad25 JP |
2149 | struct netdev_hw_addr *ha; |
2150 | bool use_uc = false; | |
406874a7 JP |
2151 | u32 rctl; |
2152 | u32 hash_value; | |
868d5309 | 2153 | int i, rar_entries = E1000_RAR_ENTRIES; |
1532ecea | 2154 | int mta_reg_count = E1000_NUM_MTA_REGISTERS; |
81c52285 JB |
2155 | u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC); |
2156 | ||
2157 | if (!mcarray) { | |
feb8f478 | 2158 | e_err(probe, "memory allocation failed\n"); |
81c52285 JB |
2159 | return; |
2160 | } | |
cd94dd0b | 2161 | |
2648345f MC |
2162 | /* Check for Promiscuous and All Multicast modes */ |
2163 | ||
1dc32918 | 2164 | rctl = er32(RCTL); |
1da177e4 | 2165 | |
96838a40 | 2166 | if (netdev->flags & IFF_PROMISC) { |
1da177e4 | 2167 | rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); |
746b9f02 | 2168 | rctl &= ~E1000_RCTL_VFE; |
1da177e4 | 2169 | } else { |
1532ecea | 2170 | if (netdev->flags & IFF_ALLMULTI) |
746b9f02 | 2171 | rctl |= E1000_RCTL_MPE; |
1532ecea | 2172 | else |
746b9f02 | 2173 | rctl &= ~E1000_RCTL_MPE; |
1532ecea JB |
2174 | /* Enable VLAN filter if there is a VLAN */ |
2175 | if (adapter->vlgrp) | |
2176 | rctl |= E1000_RCTL_VFE; | |
db0ce50d PM |
2177 | } |
2178 | ||
32e7bfc4 | 2179 | if (netdev_uc_count(netdev) > rar_entries - 1) { |
db0ce50d PM |
2180 | rctl |= E1000_RCTL_UPE; |
2181 | } else if (!(netdev->flags & IFF_PROMISC)) { | |
2182 | rctl &= ~E1000_RCTL_UPE; | |
ccffad25 | 2183 | use_uc = true; |
1da177e4 LT |
2184 | } |
2185 | ||
1dc32918 | 2186 | ew32(RCTL, rctl); |
1da177e4 LT |
2187 | |
2188 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2189 | ||
96838a40 | 2190 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2191 | e1000_enter_82542_rst(adapter); |
2192 | ||
db0ce50d PM |
2193 | /* load the first 14 addresses into the exact filters 1-14. Unicast |
2194 | * addresses take precedence to avoid disabling unicast filtering | |
2195 | * when possible. | |
2196 | * | |
1da177e4 LT |
2197 | * RAR 0 is used for the station MAC adddress |
2198 | * if there are not 14 addresses, go ahead and clear the filters | |
2199 | */ | |
ccffad25 JP |
2200 | i = 1; |
2201 | if (use_uc) | |
32e7bfc4 | 2202 | netdev_for_each_uc_addr(ha, netdev) { |
ccffad25 JP |
2203 | if (i == rar_entries) |
2204 | break; | |
2205 | e1000_rar_set(hw, ha->addr, i++); | |
2206 | } | |
2207 | ||
22bedad3 | 2208 | netdev_for_each_mc_addr(ha, netdev) { |
7a81e9f3 JP |
2209 | if (i == rar_entries) { |
2210 | /* load any remaining addresses into the hash table */ | |
2211 | u32 hash_reg, hash_bit, mta; | |
22bedad3 | 2212 | hash_value = e1000_hash_mc_addr(hw, ha->addr); |
7a81e9f3 JP |
2213 | hash_reg = (hash_value >> 5) & 0x7F; |
2214 | hash_bit = hash_value & 0x1F; | |
2215 | mta = (1 << hash_bit); | |
2216 | mcarray[hash_reg] |= mta; | |
10886af5 | 2217 | } else { |
22bedad3 | 2218 | e1000_rar_set(hw, ha->addr, i++); |
1da177e4 LT |
2219 | } |
2220 | } | |
2221 | ||
7a81e9f3 JP |
2222 | for (; i < rar_entries; i++) { |
2223 | E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0); | |
2224 | E1000_WRITE_FLUSH(); | |
2225 | E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0); | |
2226 | E1000_WRITE_FLUSH(); | |
1da177e4 LT |
2227 | } |
2228 | ||
81c52285 JB |
2229 | /* write the hash table completely, write from bottom to avoid |
2230 | * both stupid write combining chipsets, and flushing each write */ | |
2231 | for (i = mta_reg_count - 1; i >= 0 ; i--) { | |
2232 | /* | |
2233 | * If we are on an 82544 has an errata where writing odd | |
2234 | * offsets overwrites the previous even offset, but writing | |
2235 | * backwards over the range solves the issue by always | |
2236 | * writing the odd offset first | |
2237 | */ | |
2238 | E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]); | |
2239 | } | |
2240 | E1000_WRITE_FLUSH(); | |
2241 | ||
96838a40 | 2242 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 | 2243 | e1000_leave_82542_rst(adapter); |
81c52285 JB |
2244 | |
2245 | kfree(mcarray); | |
1da177e4 LT |
2246 | } |
2247 | ||
2248 | /* Need to wait a few seconds after link up to get diagnostic information from | |
2249 | * the phy */ | |
2250 | ||
64798845 | 2251 | static void e1000_update_phy_info(unsigned long data) |
1da177e4 | 2252 | { |
e982f17c | 2253 | struct e1000_adapter *adapter = (struct e1000_adapter *)data; |
5cf42fcd JB |
2254 | schedule_work(&adapter->phy_info_task); |
2255 | } | |
2256 | ||
2257 | static void e1000_update_phy_info_task(struct work_struct *work) | |
2258 | { | |
2259 | struct e1000_adapter *adapter = container_of(work, | |
2260 | struct e1000_adapter, | |
2261 | phy_info_task); | |
1dc32918 | 2262 | struct e1000_hw *hw = &adapter->hw; |
338c15e4 JB |
2263 | |
2264 | rtnl_lock(); | |
1dc32918 | 2265 | e1000_phy_get_info(hw, &adapter->phy_info); |
338c15e4 | 2266 | rtnl_unlock(); |
1da177e4 LT |
2267 | } |
2268 | ||
2269 | /** | |
2270 | * e1000_82547_tx_fifo_stall - Timer Call-back | |
2271 | * @data: pointer to adapter cast into an unsigned long | |
2272 | **/ | |
64798845 | 2273 | static void e1000_82547_tx_fifo_stall(unsigned long data) |
1da177e4 | 2274 | { |
e982f17c | 2275 | struct e1000_adapter *adapter = (struct e1000_adapter *)data; |
5cf42fcd JB |
2276 | schedule_work(&adapter->fifo_stall_task); |
2277 | } | |
2278 | ||
2279 | /** | |
2280 | * e1000_82547_tx_fifo_stall_task - task to complete work | |
2281 | * @work: work struct contained inside adapter struct | |
2282 | **/ | |
2283 | static void e1000_82547_tx_fifo_stall_task(struct work_struct *work) | |
2284 | { | |
2285 | struct e1000_adapter *adapter = container_of(work, | |
2286 | struct e1000_adapter, | |
2287 | fifo_stall_task); | |
1dc32918 | 2288 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 2289 | struct net_device *netdev = adapter->netdev; |
406874a7 | 2290 | u32 tctl; |
1da177e4 | 2291 | |
338c15e4 | 2292 | rtnl_lock(); |
96838a40 | 2293 | if (atomic_read(&adapter->tx_fifo_stall)) { |
1dc32918 JP |
2294 | if ((er32(TDT) == er32(TDH)) && |
2295 | (er32(TDFT) == er32(TDFH)) && | |
2296 | (er32(TDFTS) == er32(TDFHS))) { | |
2297 | tctl = er32(TCTL); | |
2298 | ew32(TCTL, tctl & ~E1000_TCTL_EN); | |
2299 | ew32(TDFT, adapter->tx_head_addr); | |
2300 | ew32(TDFH, adapter->tx_head_addr); | |
2301 | ew32(TDFTS, adapter->tx_head_addr); | |
2302 | ew32(TDFHS, adapter->tx_head_addr); | |
2303 | ew32(TCTL, tctl); | |
2304 | E1000_WRITE_FLUSH(); | |
1da177e4 LT |
2305 | |
2306 | adapter->tx_fifo_head = 0; | |
2307 | atomic_set(&adapter->tx_fifo_stall, 0); | |
2308 | netif_wake_queue(netdev); | |
baa34745 | 2309 | } else if (!test_bit(__E1000_DOWN, &adapter->flags)) { |
1da177e4 LT |
2310 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); |
2311 | } | |
2312 | } | |
338c15e4 | 2313 | rtnl_unlock(); |
1da177e4 LT |
2314 | } |
2315 | ||
b548192a | 2316 | bool e1000_has_link(struct e1000_adapter *adapter) |
be0f0719 JB |
2317 | { |
2318 | struct e1000_hw *hw = &adapter->hw; | |
2319 | bool link_active = false; | |
be0f0719 JB |
2320 | |
2321 | /* get_link_status is set on LSC (link status) interrupt or | |
2322 | * rx sequence error interrupt. get_link_status will stay | |
2323 | * false until the e1000_check_for_link establishes link | |
2324 | * for copper adapters ONLY | |
2325 | */ | |
2326 | switch (hw->media_type) { | |
2327 | case e1000_media_type_copper: | |
2328 | if (hw->get_link_status) { | |
120a5d0d | 2329 | e1000_check_for_link(hw); |
be0f0719 JB |
2330 | link_active = !hw->get_link_status; |
2331 | } else { | |
2332 | link_active = true; | |
2333 | } | |
2334 | break; | |
2335 | case e1000_media_type_fiber: | |
120a5d0d | 2336 | e1000_check_for_link(hw); |
be0f0719 JB |
2337 | link_active = !!(er32(STATUS) & E1000_STATUS_LU); |
2338 | break; | |
2339 | case e1000_media_type_internal_serdes: | |
120a5d0d | 2340 | e1000_check_for_link(hw); |
be0f0719 JB |
2341 | link_active = hw->serdes_has_link; |
2342 | break; | |
2343 | default: | |
2344 | break; | |
2345 | } | |
2346 | ||
2347 | return link_active; | |
2348 | } | |
2349 | ||
1da177e4 LT |
2350 | /** |
2351 | * e1000_watchdog - Timer Call-back | |
2352 | * @data: pointer to adapter cast into an unsigned long | |
2353 | **/ | |
64798845 | 2354 | static void e1000_watchdog(unsigned long data) |
1da177e4 | 2355 | { |
e982f17c | 2356 | struct e1000_adapter *adapter = (struct e1000_adapter *)data; |
1dc32918 | 2357 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 2358 | struct net_device *netdev = adapter->netdev; |
545c67c0 | 2359 | struct e1000_tx_ring *txdr = adapter->tx_ring; |
406874a7 | 2360 | u32 link, tctl; |
90fb5135 | 2361 | |
be0f0719 JB |
2362 | link = e1000_has_link(adapter); |
2363 | if ((netif_carrier_ok(netdev)) && link) | |
2364 | goto link_up; | |
1da177e4 | 2365 | |
96838a40 JB |
2366 | if (link) { |
2367 | if (!netif_carrier_ok(netdev)) { | |
406874a7 | 2368 | u32 ctrl; |
c3033b01 | 2369 | bool txb2b = true; |
be0f0719 | 2370 | /* update snapshot of PHY registers on LSC */ |
1dc32918 | 2371 | e1000_get_speed_and_duplex(hw, |
1da177e4 LT |
2372 | &adapter->link_speed, |
2373 | &adapter->link_duplex); | |
2374 | ||
1dc32918 | 2375 | ctrl = er32(CTRL); |
675ad473 ET |
2376 | pr_info("%s NIC Link is Up %d Mbps %s, " |
2377 | "Flow Control: %s\n", | |
2378 | netdev->name, | |
2379 | adapter->link_speed, | |
2380 | adapter->link_duplex == FULL_DUPLEX ? | |
2381 | "Full Duplex" : "Half Duplex", | |
2382 | ((ctrl & E1000_CTRL_TFCE) && (ctrl & | |
2383 | E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl & | |
2384 | E1000_CTRL_RFCE) ? "RX" : ((ctrl & | |
2385 | E1000_CTRL_TFCE) ? "TX" : "None"))); | |
1da177e4 | 2386 | |
39ca5f03 | 2387 | /* adjust timeout factor according to speed/duplex */ |
66a2b0a3 | 2388 | adapter->tx_timeout_factor = 1; |
7e6c9861 JK |
2389 | switch (adapter->link_speed) { |
2390 | case SPEED_10: | |
c3033b01 | 2391 | txb2b = false; |
be0f0719 | 2392 | adapter->tx_timeout_factor = 16; |
7e6c9861 JK |
2393 | break; |
2394 | case SPEED_100: | |
c3033b01 | 2395 | txb2b = false; |
7e6c9861 JK |
2396 | /* maybe add some timeout factor ? */ |
2397 | break; | |
2398 | } | |
2399 | ||
1532ecea | 2400 | /* enable transmits in the hardware */ |
1dc32918 | 2401 | tctl = er32(TCTL); |
7e6c9861 | 2402 | tctl |= E1000_TCTL_EN; |
1dc32918 | 2403 | ew32(TCTL, tctl); |
66a2b0a3 | 2404 | |
1da177e4 | 2405 | netif_carrier_on(netdev); |
baa34745 JB |
2406 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
2407 | mod_timer(&adapter->phy_info_timer, | |
2408 | round_jiffies(jiffies + 2 * HZ)); | |
1da177e4 LT |
2409 | adapter->smartspeed = 0; |
2410 | } | |
2411 | } else { | |
96838a40 | 2412 | if (netif_carrier_ok(netdev)) { |
1da177e4 LT |
2413 | adapter->link_speed = 0; |
2414 | adapter->link_duplex = 0; | |
675ad473 ET |
2415 | pr_info("%s NIC Link is Down\n", |
2416 | netdev->name); | |
1da177e4 | 2417 | netif_carrier_off(netdev); |
baa34745 JB |
2418 | |
2419 | if (!test_bit(__E1000_DOWN, &adapter->flags)) | |
2420 | mod_timer(&adapter->phy_info_timer, | |
2421 | round_jiffies(jiffies + 2 * HZ)); | |
1da177e4 LT |
2422 | } |
2423 | ||
2424 | e1000_smartspeed(adapter); | |
2425 | } | |
2426 | ||
be0f0719 | 2427 | link_up: |
1da177e4 LT |
2428 | e1000_update_stats(adapter); |
2429 | ||
1dc32918 | 2430 | hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; |
1da177e4 | 2431 | adapter->tpt_old = adapter->stats.tpt; |
1dc32918 | 2432 | hw->collision_delta = adapter->stats.colc - adapter->colc_old; |
1da177e4 LT |
2433 | adapter->colc_old = adapter->stats.colc; |
2434 | ||
2435 | adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old; | |
2436 | adapter->gorcl_old = adapter->stats.gorcl; | |
2437 | adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old; | |
2438 | adapter->gotcl_old = adapter->stats.gotcl; | |
2439 | ||
1dc32918 | 2440 | e1000_update_adaptive(hw); |
1da177e4 | 2441 | |
f56799ea | 2442 | if (!netif_carrier_ok(netdev)) { |
581d708e | 2443 | if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) { |
1da177e4 LT |
2444 | /* We've lost link, so the controller stops DMA, |
2445 | * but we've got queued Tx work that's never going | |
2446 | * to get done, so reset controller to flush Tx. | |
2447 | * (Do the reset outside of interrupt context). */ | |
87041639 JK |
2448 | adapter->tx_timeout_count++; |
2449 | schedule_work(&adapter->reset_task); | |
c2d5ab49 JB |
2450 | /* return immediately since reset is imminent */ |
2451 | return; | |
1da177e4 LT |
2452 | } |
2453 | } | |
2454 | ||
eab2abf5 JB |
2455 | /* Simple mode for Interrupt Throttle Rate (ITR) */ |
2456 | if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) { | |
2457 | /* | |
2458 | * Symmetric Tx/Rx gets a reduced ITR=2000; | |
2459 | * Total asymmetrical Tx or Rx gets ITR=8000; | |
2460 | * everyone else is between 2000-8000. | |
2461 | */ | |
2462 | u32 goc = (adapter->gotcl + adapter->gorcl) / 10000; | |
2463 | u32 dif = (adapter->gotcl > adapter->gorcl ? | |
2464 | adapter->gotcl - adapter->gorcl : | |
2465 | adapter->gorcl - adapter->gotcl) / 10000; | |
2466 | u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; | |
2467 | ||
2468 | ew32(ITR, 1000000000 / (itr * 256)); | |
2469 | } | |
2470 | ||
1da177e4 | 2471 | /* Cause software interrupt to ensure rx ring is cleaned */ |
1dc32918 | 2472 | ew32(ICS, E1000_ICS_RXDMT0); |
1da177e4 | 2473 | |
2648345f | 2474 | /* Force detection of hung controller every watchdog period */ |
c3033b01 | 2475 | adapter->detect_tx_hung = true; |
1da177e4 LT |
2476 | |
2477 | /* Reset the timer */ | |
baa34745 JB |
2478 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
2479 | mod_timer(&adapter->watchdog_timer, | |
2480 | round_jiffies(jiffies + 2 * HZ)); | |
1da177e4 LT |
2481 | } |
2482 | ||
835bb129 JB |
2483 | enum latency_range { |
2484 | lowest_latency = 0, | |
2485 | low_latency = 1, | |
2486 | bulk_latency = 2, | |
2487 | latency_invalid = 255 | |
2488 | }; | |
2489 | ||
2490 | /** | |
2491 | * e1000_update_itr - update the dynamic ITR value based on statistics | |
8fce4731 JB |
2492 | * @adapter: pointer to adapter |
2493 | * @itr_setting: current adapter->itr | |
2494 | * @packets: the number of packets during this measurement interval | |
2495 | * @bytes: the number of bytes during this measurement interval | |
2496 | * | |
835bb129 JB |
2497 | * Stores a new ITR value based on packets and byte |
2498 | * counts during the last interrupt. The advantage of per interrupt | |
2499 | * computation is faster updates and more accurate ITR for the current | |
2500 | * traffic pattern. Constants in this function were computed | |
2501 | * based on theoretical maximum wire speed and thresholds were set based | |
2502 | * on testing data as well as attempting to minimize response time | |
2503 | * while increasing bulk throughput. | |
2504 | * this functionality is controlled by the InterruptThrottleRate module | |
2505 | * parameter (see e1000_param.c) | |
835bb129 JB |
2506 | **/ |
2507 | static unsigned int e1000_update_itr(struct e1000_adapter *adapter, | |
64798845 | 2508 | u16 itr_setting, int packets, int bytes) |
835bb129 JB |
2509 | { |
2510 | unsigned int retval = itr_setting; | |
2511 | struct e1000_hw *hw = &adapter->hw; | |
2512 | ||
2513 | if (unlikely(hw->mac_type < e1000_82540)) | |
2514 | goto update_itr_done; | |
2515 | ||
2516 | if (packets == 0) | |
2517 | goto update_itr_done; | |
2518 | ||
835bb129 JB |
2519 | switch (itr_setting) { |
2520 | case lowest_latency: | |
2b65326e JB |
2521 | /* jumbo frames get bulk treatment*/ |
2522 | if (bytes/packets > 8000) | |
2523 | retval = bulk_latency; | |
2524 | else if ((packets < 5) && (bytes > 512)) | |
835bb129 JB |
2525 | retval = low_latency; |
2526 | break; | |
2527 | case low_latency: /* 50 usec aka 20000 ints/s */ | |
2528 | if (bytes > 10000) { | |
2b65326e JB |
2529 | /* jumbo frames need bulk latency setting */ |
2530 | if (bytes/packets > 8000) | |
2531 | retval = bulk_latency; | |
2532 | else if ((packets < 10) || ((bytes/packets) > 1200)) | |
835bb129 JB |
2533 | retval = bulk_latency; |
2534 | else if ((packets > 35)) | |
2535 | retval = lowest_latency; | |
2b65326e JB |
2536 | } else if (bytes/packets > 2000) |
2537 | retval = bulk_latency; | |
2538 | else if (packets <= 2 && bytes < 512) | |
835bb129 JB |
2539 | retval = lowest_latency; |
2540 | break; | |
2541 | case bulk_latency: /* 250 usec aka 4000 ints/s */ | |
2542 | if (bytes > 25000) { | |
2543 | if (packets > 35) | |
2544 | retval = low_latency; | |
2b65326e JB |
2545 | } else if (bytes < 6000) { |
2546 | retval = low_latency; | |
835bb129 JB |
2547 | } |
2548 | break; | |
2549 | } | |
2550 | ||
2551 | update_itr_done: | |
2552 | return retval; | |
2553 | } | |
2554 | ||
2555 | static void e1000_set_itr(struct e1000_adapter *adapter) | |
2556 | { | |
2557 | struct e1000_hw *hw = &adapter->hw; | |
406874a7 JP |
2558 | u16 current_itr; |
2559 | u32 new_itr = adapter->itr; | |
835bb129 JB |
2560 | |
2561 | if (unlikely(hw->mac_type < e1000_82540)) | |
2562 | return; | |
2563 | ||
2564 | /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ | |
2565 | if (unlikely(adapter->link_speed != SPEED_1000)) { | |
2566 | current_itr = 0; | |
2567 | new_itr = 4000; | |
2568 | goto set_itr_now; | |
2569 | } | |
2570 | ||
2571 | adapter->tx_itr = e1000_update_itr(adapter, | |
2572 | adapter->tx_itr, | |
2573 | adapter->total_tx_packets, | |
2574 | adapter->total_tx_bytes); | |
2b65326e JB |
2575 | /* conservative mode (itr 3) eliminates the lowest_latency setting */ |
2576 | if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) | |
2577 | adapter->tx_itr = low_latency; | |
2578 | ||
835bb129 JB |
2579 | adapter->rx_itr = e1000_update_itr(adapter, |
2580 | adapter->rx_itr, | |
2581 | adapter->total_rx_packets, | |
2582 | adapter->total_rx_bytes); | |
2b65326e JB |
2583 | /* conservative mode (itr 3) eliminates the lowest_latency setting */ |
2584 | if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) | |
2585 | adapter->rx_itr = low_latency; | |
835bb129 JB |
2586 | |
2587 | current_itr = max(adapter->rx_itr, adapter->tx_itr); | |
2588 | ||
835bb129 JB |
2589 | switch (current_itr) { |
2590 | /* counts and packets in update_itr are dependent on these numbers */ | |
2591 | case lowest_latency: | |
2592 | new_itr = 70000; | |
2593 | break; | |
2594 | case low_latency: | |
2595 | new_itr = 20000; /* aka hwitr = ~200 */ | |
2596 | break; | |
2597 | case bulk_latency: | |
2598 | new_itr = 4000; | |
2599 | break; | |
2600 | default: | |
2601 | break; | |
2602 | } | |
2603 | ||
2604 | set_itr_now: | |
2605 | if (new_itr != adapter->itr) { | |
2606 | /* this attempts to bias the interrupt rate towards Bulk | |
2607 | * by adding intermediate steps when interrupt rate is | |
2608 | * increasing */ | |
2609 | new_itr = new_itr > adapter->itr ? | |
2610 | min(adapter->itr + (new_itr >> 2), new_itr) : | |
2611 | new_itr; | |
2612 | adapter->itr = new_itr; | |
1dc32918 | 2613 | ew32(ITR, 1000000000 / (new_itr * 256)); |
835bb129 | 2614 | } |
835bb129 JB |
2615 | } |
2616 | ||
1da177e4 LT |
2617 | #define E1000_TX_FLAGS_CSUM 0x00000001 |
2618 | #define E1000_TX_FLAGS_VLAN 0x00000002 | |
2619 | #define E1000_TX_FLAGS_TSO 0x00000004 | |
2d7edb92 | 2620 | #define E1000_TX_FLAGS_IPV4 0x00000008 |
1da177e4 LT |
2621 | #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 |
2622 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 | |
2623 | ||
64798845 JP |
2624 | static int e1000_tso(struct e1000_adapter *adapter, |
2625 | struct e1000_tx_ring *tx_ring, struct sk_buff *skb) | |
1da177e4 | 2626 | { |
1da177e4 | 2627 | struct e1000_context_desc *context_desc; |
545c67c0 | 2628 | struct e1000_buffer *buffer_info; |
1da177e4 | 2629 | unsigned int i; |
406874a7 JP |
2630 | u32 cmd_length = 0; |
2631 | u16 ipcse = 0, tucse, mss; | |
2632 | u8 ipcss, ipcso, tucss, tucso, hdr_len; | |
1da177e4 LT |
2633 | int err; |
2634 | ||
89114afd | 2635 | if (skb_is_gso(skb)) { |
1da177e4 LT |
2636 | if (skb_header_cloned(skb)) { |
2637 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); | |
2638 | if (err) | |
2639 | return err; | |
2640 | } | |
2641 | ||
ab6a5bb6 | 2642 | hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); |
7967168c | 2643 | mss = skb_shinfo(skb)->gso_size; |
60828236 | 2644 | if (skb->protocol == htons(ETH_P_IP)) { |
eddc9ec5 ACM |
2645 | struct iphdr *iph = ip_hdr(skb); |
2646 | iph->tot_len = 0; | |
2647 | iph->check = 0; | |
aa8223c7 ACM |
2648 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, |
2649 | iph->daddr, 0, | |
2650 | IPPROTO_TCP, | |
2651 | 0); | |
2d7edb92 | 2652 | cmd_length = E1000_TXD_CMD_IP; |
ea2ae17d | 2653 | ipcse = skb_transport_offset(skb) - 1; |
e15fdd03 | 2654 | } else if (skb->protocol == htons(ETH_P_IPV6)) { |
0660e03f | 2655 | ipv6_hdr(skb)->payload_len = 0; |
aa8223c7 | 2656 | tcp_hdr(skb)->check = |
0660e03f ACM |
2657 | ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, |
2658 | &ipv6_hdr(skb)->daddr, | |
2659 | 0, IPPROTO_TCP, 0); | |
2d7edb92 | 2660 | ipcse = 0; |
2d7edb92 | 2661 | } |
bbe735e4 | 2662 | ipcss = skb_network_offset(skb); |
eddc9ec5 | 2663 | ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data; |
ea2ae17d | 2664 | tucss = skb_transport_offset(skb); |
aa8223c7 | 2665 | tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data; |
1da177e4 LT |
2666 | tucse = 0; |
2667 | ||
2668 | cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | | |
2d7edb92 | 2669 | E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); |
1da177e4 | 2670 | |
581d708e MC |
2671 | i = tx_ring->next_to_use; |
2672 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); | |
545c67c0 | 2673 | buffer_info = &tx_ring->buffer_info[i]; |
1da177e4 LT |
2674 | |
2675 | context_desc->lower_setup.ip_fields.ipcss = ipcss; | |
2676 | context_desc->lower_setup.ip_fields.ipcso = ipcso; | |
2677 | context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); | |
2678 | context_desc->upper_setup.tcp_fields.tucss = tucss; | |
2679 | context_desc->upper_setup.tcp_fields.tucso = tucso; | |
2680 | context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); | |
2681 | context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); | |
2682 | context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; | |
2683 | context_desc->cmd_and_length = cpu_to_le32(cmd_length); | |
2684 | ||
545c67c0 | 2685 | buffer_info->time_stamp = jiffies; |
a9ebadd6 | 2686 | buffer_info->next_to_watch = i; |
545c67c0 | 2687 | |
581d708e MC |
2688 | if (++i == tx_ring->count) i = 0; |
2689 | tx_ring->next_to_use = i; | |
1da177e4 | 2690 | |
c3033b01 | 2691 | return true; |
1da177e4 | 2692 | } |
c3033b01 | 2693 | return false; |
1da177e4 LT |
2694 | } |
2695 | ||
64798845 JP |
2696 | static bool e1000_tx_csum(struct e1000_adapter *adapter, |
2697 | struct e1000_tx_ring *tx_ring, struct sk_buff *skb) | |
1da177e4 LT |
2698 | { |
2699 | struct e1000_context_desc *context_desc; | |
545c67c0 | 2700 | struct e1000_buffer *buffer_info; |
1da177e4 | 2701 | unsigned int i; |
406874a7 | 2702 | u8 css; |
3ed30676 | 2703 | u32 cmd_len = E1000_TXD_CMD_DEXT; |
1da177e4 | 2704 | |
3ed30676 DG |
2705 | if (skb->ip_summed != CHECKSUM_PARTIAL) |
2706 | return false; | |
1da177e4 | 2707 | |
3ed30676 | 2708 | switch (skb->protocol) { |
09640e63 | 2709 | case cpu_to_be16(ETH_P_IP): |
3ed30676 DG |
2710 | if (ip_hdr(skb)->protocol == IPPROTO_TCP) |
2711 | cmd_len |= E1000_TXD_CMD_TCP; | |
2712 | break; | |
09640e63 | 2713 | case cpu_to_be16(ETH_P_IPV6): |
3ed30676 DG |
2714 | /* XXX not handling all IPV6 headers */ |
2715 | if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) | |
2716 | cmd_len |= E1000_TXD_CMD_TCP; | |
2717 | break; | |
2718 | default: | |
2719 | if (unlikely(net_ratelimit())) | |
feb8f478 ET |
2720 | e_warn(drv, "checksum_partial proto=%x!\n", |
2721 | skb->protocol); | |
3ed30676 DG |
2722 | break; |
2723 | } | |
1da177e4 | 2724 | |
3ed30676 | 2725 | css = skb_transport_offset(skb); |
1da177e4 | 2726 | |
3ed30676 DG |
2727 | i = tx_ring->next_to_use; |
2728 | buffer_info = &tx_ring->buffer_info[i]; | |
2729 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); | |
545c67c0 | 2730 | |
3ed30676 DG |
2731 | context_desc->lower_setup.ip_config = 0; |
2732 | context_desc->upper_setup.tcp_fields.tucss = css; | |
2733 | context_desc->upper_setup.tcp_fields.tucso = | |
2734 | css + skb->csum_offset; | |
2735 | context_desc->upper_setup.tcp_fields.tucse = 0; | |
2736 | context_desc->tcp_seg_setup.data = 0; | |
2737 | context_desc->cmd_and_length = cpu_to_le32(cmd_len); | |
1da177e4 | 2738 | |
3ed30676 DG |
2739 | buffer_info->time_stamp = jiffies; |
2740 | buffer_info->next_to_watch = i; | |
1da177e4 | 2741 | |
3ed30676 DG |
2742 | if (unlikely(++i == tx_ring->count)) i = 0; |
2743 | tx_ring->next_to_use = i; | |
2744 | ||
2745 | return true; | |
1da177e4 LT |
2746 | } |
2747 | ||
2748 | #define E1000_MAX_TXD_PWR 12 | |
2749 | #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR) | |
2750 | ||
64798845 JP |
2751 | static int e1000_tx_map(struct e1000_adapter *adapter, |
2752 | struct e1000_tx_ring *tx_ring, | |
2753 | struct sk_buff *skb, unsigned int first, | |
2754 | unsigned int max_per_txd, unsigned int nr_frags, | |
2755 | unsigned int mss) | |
1da177e4 | 2756 | { |
1dc32918 | 2757 | struct e1000_hw *hw = &adapter->hw; |
602c0554 | 2758 | struct pci_dev *pdev = adapter->pdev; |
37e73df8 | 2759 | struct e1000_buffer *buffer_info; |
d20b606c | 2760 | unsigned int len = skb_headlen(skb); |
602c0554 | 2761 | unsigned int offset = 0, size, count = 0, i; |
1da177e4 | 2762 | unsigned int f; |
1da177e4 LT |
2763 | |
2764 | i = tx_ring->next_to_use; | |
2765 | ||
96838a40 | 2766 | while (len) { |
37e73df8 | 2767 | buffer_info = &tx_ring->buffer_info[i]; |
1da177e4 | 2768 | size = min(len, max_per_txd); |
fd803241 JK |
2769 | /* Workaround for Controller erratum -- |
2770 | * descriptor for non-tso packet in a linear SKB that follows a | |
2771 | * tso gets written back prematurely before the data is fully | |
0f15a8fa | 2772 | * DMA'd to the controller */ |
fd803241 | 2773 | if (!skb->data_len && tx_ring->last_tx_tso && |
89114afd | 2774 | !skb_is_gso(skb)) { |
fd803241 JK |
2775 | tx_ring->last_tx_tso = 0; |
2776 | size -= 4; | |
2777 | } | |
2778 | ||
1da177e4 LT |
2779 | /* Workaround for premature desc write-backs |
2780 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 2781 | if (unlikely(mss && !nr_frags && size == len && size > 8)) |
1da177e4 | 2782 | size -= 4; |
97338bde MC |
2783 | /* work-around for errata 10 and it applies |
2784 | * to all controllers in PCI-X mode | |
2785 | * The fix is to make sure that the first descriptor of a | |
2786 | * packet is smaller than 2048 - 16 - 16 (or 2016) bytes | |
2787 | */ | |
1dc32918 | 2788 | if (unlikely((hw->bus_type == e1000_bus_type_pcix) && |
97338bde MC |
2789 | (size > 2015) && count == 0)) |
2790 | size = 2015; | |
96838a40 | 2791 | |
1da177e4 LT |
2792 | /* Workaround for potential 82544 hang in PCI-X. Avoid |
2793 | * terminating buffers within evenly-aligned dwords. */ | |
96838a40 | 2794 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
2795 | !((unsigned long)(skb->data + offset + size - 1) & 4) && |
2796 | size > 4)) | |
2797 | size -= 4; | |
2798 | ||
2799 | buffer_info->length = size; | |
cdd7549e | 2800 | /* set time_stamp *before* dma to help avoid a possible race */ |
1da177e4 | 2801 | buffer_info->time_stamp = jiffies; |
602c0554 | 2802 | buffer_info->mapped_as_page = false; |
b16f53be NN |
2803 | buffer_info->dma = dma_map_single(&pdev->dev, |
2804 | skb->data + offset, | |
2805 | size, DMA_TO_DEVICE); | |
2806 | if (dma_mapping_error(&pdev->dev, buffer_info->dma)) | |
602c0554 | 2807 | goto dma_error; |
a9ebadd6 | 2808 | buffer_info->next_to_watch = i; |
1da177e4 LT |
2809 | |
2810 | len -= size; | |
2811 | offset += size; | |
2812 | count++; | |
37e73df8 AD |
2813 | if (len) { |
2814 | i++; | |
2815 | if (unlikely(i == tx_ring->count)) | |
2816 | i = 0; | |
2817 | } | |
1da177e4 LT |
2818 | } |
2819 | ||
96838a40 | 2820 | for (f = 0; f < nr_frags; f++) { |
1da177e4 LT |
2821 | struct skb_frag_struct *frag; |
2822 | ||
2823 | frag = &skb_shinfo(skb)->frags[f]; | |
2824 | len = frag->size; | |
602c0554 | 2825 | offset = frag->page_offset; |
1da177e4 | 2826 | |
96838a40 | 2827 | while (len) { |
37e73df8 AD |
2828 | i++; |
2829 | if (unlikely(i == tx_ring->count)) | |
2830 | i = 0; | |
2831 | ||
1da177e4 LT |
2832 | buffer_info = &tx_ring->buffer_info[i]; |
2833 | size = min(len, max_per_txd); | |
1da177e4 LT |
2834 | /* Workaround for premature desc write-backs |
2835 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 2836 | if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8)) |
1da177e4 | 2837 | size -= 4; |
1da177e4 LT |
2838 | /* Workaround for potential 82544 hang in PCI-X. |
2839 | * Avoid terminating buffers within evenly-aligned | |
2840 | * dwords. */ | |
96838a40 | 2841 | if (unlikely(adapter->pcix_82544 && |
8fce4731 JB |
2842 | !((unsigned long)(page_to_phys(frag->page) + offset |
2843 | + size - 1) & 4) && | |
2844 | size > 4)) | |
1da177e4 LT |
2845 | size -= 4; |
2846 | ||
2847 | buffer_info->length = size; | |
1da177e4 | 2848 | buffer_info->time_stamp = jiffies; |
602c0554 | 2849 | buffer_info->mapped_as_page = true; |
b16f53be | 2850 | buffer_info->dma = dma_map_page(&pdev->dev, frag->page, |
602c0554 | 2851 | offset, size, |
b16f53be NN |
2852 | DMA_TO_DEVICE); |
2853 | if (dma_mapping_error(&pdev->dev, buffer_info->dma)) | |
602c0554 | 2854 | goto dma_error; |
a9ebadd6 | 2855 | buffer_info->next_to_watch = i; |
1da177e4 LT |
2856 | |
2857 | len -= size; | |
2858 | offset += size; | |
2859 | count++; | |
1da177e4 LT |
2860 | } |
2861 | } | |
2862 | ||
1da177e4 LT |
2863 | tx_ring->buffer_info[i].skb = skb; |
2864 | tx_ring->buffer_info[first].next_to_watch = i; | |
2865 | ||
2866 | return count; | |
602c0554 AD |
2867 | |
2868 | dma_error: | |
2869 | dev_err(&pdev->dev, "TX DMA map failed\n"); | |
2870 | buffer_info->dma = 0; | |
c1fa347f | 2871 | if (count) |
602c0554 | 2872 | count--; |
c1fa347f RK |
2873 | |
2874 | while (count--) { | |
2875 | if (i==0) | |
602c0554 | 2876 | i += tx_ring->count; |
c1fa347f | 2877 | i--; |
602c0554 AD |
2878 | buffer_info = &tx_ring->buffer_info[i]; |
2879 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); | |
2880 | } | |
2881 | ||
2882 | return 0; | |
1da177e4 LT |
2883 | } |
2884 | ||
64798845 JP |
2885 | static void e1000_tx_queue(struct e1000_adapter *adapter, |
2886 | struct e1000_tx_ring *tx_ring, int tx_flags, | |
2887 | int count) | |
1da177e4 | 2888 | { |
1dc32918 | 2889 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
2890 | struct e1000_tx_desc *tx_desc = NULL; |
2891 | struct e1000_buffer *buffer_info; | |
406874a7 | 2892 | u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; |
1da177e4 LT |
2893 | unsigned int i; |
2894 | ||
96838a40 | 2895 | if (likely(tx_flags & E1000_TX_FLAGS_TSO)) { |
1da177e4 LT |
2896 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | |
2897 | E1000_TXD_CMD_TSE; | |
2d7edb92 MC |
2898 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; |
2899 | ||
96838a40 | 2900 | if (likely(tx_flags & E1000_TX_FLAGS_IPV4)) |
2d7edb92 | 2901 | txd_upper |= E1000_TXD_POPTS_IXSM << 8; |
1da177e4 LT |
2902 | } |
2903 | ||
96838a40 | 2904 | if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) { |
1da177e4 LT |
2905 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; |
2906 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; | |
2907 | } | |
2908 | ||
96838a40 | 2909 | if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) { |
1da177e4 LT |
2910 | txd_lower |= E1000_TXD_CMD_VLE; |
2911 | txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); | |
2912 | } | |
2913 | ||
2914 | i = tx_ring->next_to_use; | |
2915 | ||
96838a40 | 2916 | while (count--) { |
1da177e4 LT |
2917 | buffer_info = &tx_ring->buffer_info[i]; |
2918 | tx_desc = E1000_TX_DESC(*tx_ring, i); | |
2919 | tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
2920 | tx_desc->lower.data = | |
2921 | cpu_to_le32(txd_lower | buffer_info->length); | |
2922 | tx_desc->upper.data = cpu_to_le32(txd_upper); | |
96838a40 | 2923 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2924 | } |
2925 | ||
2926 | tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); | |
2927 | ||
2928 | /* Force memory writes to complete before letting h/w | |
2929 | * know there are new descriptors to fetch. (Only | |
2930 | * applicable for weak-ordered memory model archs, | |
2931 | * such as IA-64). */ | |
2932 | wmb(); | |
2933 | ||
2934 | tx_ring->next_to_use = i; | |
1dc32918 | 2935 | writel(i, hw->hw_addr + tx_ring->tdt); |
2ce9047f JB |
2936 | /* we need this if more than one processor can write to our tail |
2937 | * at a time, it syncronizes IO on IA64/Altix systems */ | |
2938 | mmiowb(); | |
1da177e4 LT |
2939 | } |
2940 | ||
2941 | /** | |
2942 | * 82547 workaround to avoid controller hang in half-duplex environment. | |
2943 | * The workaround is to avoid queuing a large packet that would span | |
2944 | * the internal Tx FIFO ring boundary by notifying the stack to resend | |
2945 | * the packet at a later time. This gives the Tx FIFO an opportunity to | |
2946 | * flush all packets. When that occurs, we reset the Tx FIFO pointers | |
2947 | * to the beginning of the Tx FIFO. | |
2948 | **/ | |
2949 | ||
2950 | #define E1000_FIFO_HDR 0x10 | |
2951 | #define E1000_82547_PAD_LEN 0x3E0 | |
2952 | ||
64798845 JP |
2953 | static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, |
2954 | struct sk_buff *skb) | |
1da177e4 | 2955 | { |
406874a7 JP |
2956 | u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; |
2957 | u32 skb_fifo_len = skb->len + E1000_FIFO_HDR; | |
1da177e4 | 2958 | |
9099cfb9 | 2959 | skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR); |
1da177e4 | 2960 | |
96838a40 | 2961 | if (adapter->link_duplex != HALF_DUPLEX) |
1da177e4 LT |
2962 | goto no_fifo_stall_required; |
2963 | ||
96838a40 | 2964 | if (atomic_read(&adapter->tx_fifo_stall)) |
1da177e4 LT |
2965 | return 1; |
2966 | ||
96838a40 | 2967 | if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) { |
1da177e4 LT |
2968 | atomic_set(&adapter->tx_fifo_stall, 1); |
2969 | return 1; | |
2970 | } | |
2971 | ||
2972 | no_fifo_stall_required: | |
2973 | adapter->tx_fifo_head += skb_fifo_len; | |
96838a40 | 2974 | if (adapter->tx_fifo_head >= adapter->tx_fifo_size) |
1da177e4 LT |
2975 | adapter->tx_fifo_head -= adapter->tx_fifo_size; |
2976 | return 0; | |
2977 | } | |
2978 | ||
65c7973f JB |
2979 | static int __e1000_maybe_stop_tx(struct net_device *netdev, int size) |
2980 | { | |
2981 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
2982 | struct e1000_tx_ring *tx_ring = adapter->tx_ring; | |
2983 | ||
2984 | netif_stop_queue(netdev); | |
2985 | /* Herbert's original patch had: | |
2986 | * smp_mb__after_netif_stop_queue(); | |
2987 | * but since that doesn't exist yet, just open code it. */ | |
2988 | smp_mb(); | |
2989 | ||
2990 | /* We need to check again in a case another CPU has just | |
2991 | * made room available. */ | |
2992 | if (likely(E1000_DESC_UNUSED(tx_ring) < size)) | |
2993 | return -EBUSY; | |
2994 | ||
2995 | /* A reprieve! */ | |
2996 | netif_start_queue(netdev); | |
fcfb1224 | 2997 | ++adapter->restart_queue; |
65c7973f JB |
2998 | return 0; |
2999 | } | |
3000 | ||
3001 | static int e1000_maybe_stop_tx(struct net_device *netdev, | |
3002 | struct e1000_tx_ring *tx_ring, int size) | |
3003 | { | |
3004 | if (likely(E1000_DESC_UNUSED(tx_ring) >= size)) | |
3005 | return 0; | |
3006 | return __e1000_maybe_stop_tx(netdev, size); | |
3007 | } | |
3008 | ||
1da177e4 | 3009 | #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) |
3b29a56d SH |
3010 | static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, |
3011 | struct net_device *netdev) | |
1da177e4 | 3012 | { |
60490fe0 | 3013 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 3014 | struct e1000_hw *hw = &adapter->hw; |
581d708e | 3015 | struct e1000_tx_ring *tx_ring; |
1da177e4 LT |
3016 | unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD; |
3017 | unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; | |
3018 | unsigned int tx_flags = 0; | |
e743d313 | 3019 | unsigned int len = skb_headlen(skb); |
6d1e3aa7 KK |
3020 | unsigned int nr_frags; |
3021 | unsigned int mss; | |
1da177e4 | 3022 | int count = 0; |
76c224bc | 3023 | int tso; |
1da177e4 | 3024 | unsigned int f; |
1da177e4 | 3025 | |
65c7973f JB |
3026 | /* This goes back to the question of how to logically map a tx queue |
3027 | * to a flow. Right now, performance is impacted slightly negatively | |
3028 | * if using multiple tx queues. If the stack breaks away from a | |
3029 | * single qdisc implementation, we can look at this again. */ | |
581d708e | 3030 | tx_ring = adapter->tx_ring; |
24025e4e | 3031 | |
581d708e | 3032 | if (unlikely(skb->len <= 0)) { |
1da177e4 LT |
3033 | dev_kfree_skb_any(skb); |
3034 | return NETDEV_TX_OK; | |
3035 | } | |
3036 | ||
7967168c | 3037 | mss = skb_shinfo(skb)->gso_size; |
76c224bc | 3038 | /* The controller does a simple calculation to |
1da177e4 LT |
3039 | * make sure there is enough room in the FIFO before |
3040 | * initiating the DMA for each buffer. The calc is: | |
3041 | * 4 = ceil(buffer len/mss). To make sure we don't | |
3042 | * overrun the FIFO, adjust the max buffer len if mss | |
3043 | * drops. */ | |
96838a40 | 3044 | if (mss) { |
406874a7 | 3045 | u8 hdr_len; |
1da177e4 LT |
3046 | max_per_txd = min(mss << 2, max_per_txd); |
3047 | max_txd_pwr = fls(max_per_txd) - 1; | |
9a3056da | 3048 | |
ab6a5bb6 | 3049 | hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); |
6d1e3aa7 | 3050 | if (skb->data_len && hdr_len == len) { |
1dc32918 | 3051 | switch (hw->mac_type) { |
9f687888 | 3052 | unsigned int pull_size; |
683a2aa3 HX |
3053 | case e1000_82544: |
3054 | /* Make sure we have room to chop off 4 bytes, | |
3055 | * and that the end alignment will work out to | |
3056 | * this hardware's requirements | |
3057 | * NOTE: this is a TSO only workaround | |
3058 | * if end byte alignment not correct move us | |
3059 | * into the next dword */ | |
27a884dc | 3060 | if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4) |
683a2aa3 HX |
3061 | break; |
3062 | /* fall through */ | |
9f687888 JK |
3063 | pull_size = min((unsigned int)4, skb->data_len); |
3064 | if (!__pskb_pull_tail(skb, pull_size)) { | |
feb8f478 ET |
3065 | e_err(drv, "__pskb_pull_tail " |
3066 | "failed.\n"); | |
9f687888 | 3067 | dev_kfree_skb_any(skb); |
749dfc70 | 3068 | return NETDEV_TX_OK; |
9f687888 | 3069 | } |
e743d313 | 3070 | len = skb_headlen(skb); |
9f687888 JK |
3071 | break; |
3072 | default: | |
3073 | /* do nothing */ | |
3074 | break; | |
d74bbd3b | 3075 | } |
9a3056da | 3076 | } |
1da177e4 LT |
3077 | } |
3078 | ||
9a3056da | 3079 | /* reserve a descriptor for the offload context */ |
84fa7933 | 3080 | if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) |
1da177e4 | 3081 | count++; |
2648345f | 3082 | count++; |
fd803241 | 3083 | |
fd803241 | 3084 | /* Controller Erratum workaround */ |
89114afd | 3085 | if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb)) |
fd803241 | 3086 | count++; |
fd803241 | 3087 | |
1da177e4 LT |
3088 | count += TXD_USE_COUNT(len, max_txd_pwr); |
3089 | ||
96838a40 | 3090 | if (adapter->pcix_82544) |
1da177e4 LT |
3091 | count++; |
3092 | ||
96838a40 | 3093 | /* work-around for errata 10 and it applies to all controllers |
97338bde MC |
3094 | * in PCI-X mode, so add one more descriptor to the count |
3095 | */ | |
1dc32918 | 3096 | if (unlikely((hw->bus_type == e1000_bus_type_pcix) && |
97338bde MC |
3097 | (len > 2015))) |
3098 | count++; | |
3099 | ||
1da177e4 | 3100 | nr_frags = skb_shinfo(skb)->nr_frags; |
96838a40 | 3101 | for (f = 0; f < nr_frags; f++) |
1da177e4 LT |
3102 | count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size, |
3103 | max_txd_pwr); | |
96838a40 | 3104 | if (adapter->pcix_82544) |
1da177e4 LT |
3105 | count += nr_frags; |
3106 | ||
1da177e4 LT |
3107 | /* need: count + 2 desc gap to keep tail from touching |
3108 | * head, otherwise try next time */ | |
8017943e | 3109 | if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) |
1da177e4 | 3110 | return NETDEV_TX_BUSY; |
1da177e4 | 3111 | |
1dc32918 | 3112 | if (unlikely(hw->mac_type == e1000_82547)) { |
96838a40 | 3113 | if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) { |
1da177e4 | 3114 | netif_stop_queue(netdev); |
baa34745 JB |
3115 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
3116 | mod_timer(&adapter->tx_fifo_stall_timer, | |
3117 | jiffies + 1); | |
1da177e4 LT |
3118 | return NETDEV_TX_BUSY; |
3119 | } | |
3120 | } | |
3121 | ||
96838a40 | 3122 | if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) { |
1da177e4 LT |
3123 | tx_flags |= E1000_TX_FLAGS_VLAN; |
3124 | tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); | |
3125 | } | |
3126 | ||
581d708e | 3127 | first = tx_ring->next_to_use; |
96838a40 | 3128 | |
581d708e | 3129 | tso = e1000_tso(adapter, tx_ring, skb); |
1da177e4 LT |
3130 | if (tso < 0) { |
3131 | dev_kfree_skb_any(skb); | |
3132 | return NETDEV_TX_OK; | |
3133 | } | |
3134 | ||
fd803241 | 3135 | if (likely(tso)) { |
8fce4731 JB |
3136 | if (likely(hw->mac_type != e1000_82544)) |
3137 | tx_ring->last_tx_tso = 1; | |
1da177e4 | 3138 | tx_flags |= E1000_TX_FLAGS_TSO; |
fd803241 | 3139 | } else if (likely(e1000_tx_csum(adapter, tx_ring, skb))) |
1da177e4 LT |
3140 | tx_flags |= E1000_TX_FLAGS_CSUM; |
3141 | ||
60828236 | 3142 | if (likely(skb->protocol == htons(ETH_P_IP))) |
2d7edb92 MC |
3143 | tx_flags |= E1000_TX_FLAGS_IPV4; |
3144 | ||
37e73df8 AD |
3145 | count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd, |
3146 | nr_frags, mss); | |
1da177e4 | 3147 | |
37e73df8 AD |
3148 | if (count) { |
3149 | e1000_tx_queue(adapter, tx_ring, tx_flags, count); | |
37e73df8 AD |
3150 | /* Make sure there is space in the ring for the next send. */ |
3151 | e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2); | |
1da177e4 | 3152 | |
37e73df8 AD |
3153 | } else { |
3154 | dev_kfree_skb_any(skb); | |
3155 | tx_ring->buffer_info[first].time_stamp = 0; | |
3156 | tx_ring->next_to_use = first; | |
3157 | } | |
1da177e4 | 3158 | |
1da177e4 LT |
3159 | return NETDEV_TX_OK; |
3160 | } | |
3161 | ||
3162 | /** | |
3163 | * e1000_tx_timeout - Respond to a Tx Hang | |
3164 | * @netdev: network interface device structure | |
3165 | **/ | |
3166 | ||
64798845 | 3167 | static void e1000_tx_timeout(struct net_device *netdev) |
1da177e4 | 3168 | { |
60490fe0 | 3169 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
3170 | |
3171 | /* Do the reset outside of interrupt context */ | |
87041639 JK |
3172 | adapter->tx_timeout_count++; |
3173 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
3174 | } |
3175 | ||
64798845 | 3176 | static void e1000_reset_task(struct work_struct *work) |
1da177e4 | 3177 | { |
65f27f38 DH |
3178 | struct e1000_adapter *adapter = |
3179 | container_of(work, struct e1000_adapter, reset_task); | |
1da177e4 | 3180 | |
338c15e4 | 3181 | e1000_reinit_safe(adapter); |
1da177e4 LT |
3182 | } |
3183 | ||
3184 | /** | |
3185 | * e1000_get_stats - Get System Network Statistics | |
3186 | * @netdev: network interface device structure | |
3187 | * | |
3188 | * Returns the address of the device statistics structure. | |
3189 | * The statistics are actually updated from the timer callback. | |
3190 | **/ | |
3191 | ||
64798845 | 3192 | static struct net_device_stats *e1000_get_stats(struct net_device *netdev) |
1da177e4 | 3193 | { |
6b7660cd | 3194 | /* only return the current stats */ |
5fe31def | 3195 | return &netdev->stats; |
1da177e4 LT |
3196 | } |
3197 | ||
3198 | /** | |
3199 | * e1000_change_mtu - Change the Maximum Transfer Unit | |
3200 | * @netdev: network interface device structure | |
3201 | * @new_mtu: new value for maximum frame size | |
3202 | * | |
3203 | * Returns 0 on success, negative on failure | |
3204 | **/ | |
3205 | ||
64798845 | 3206 | static int e1000_change_mtu(struct net_device *netdev, int new_mtu) |
1da177e4 | 3207 | { |
60490fe0 | 3208 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 3209 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
3210 | int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; |
3211 | ||
96838a40 JB |
3212 | if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) || |
3213 | (max_frame > MAX_JUMBO_FRAME_SIZE)) { | |
feb8f478 | 3214 | e_err(probe, "Invalid MTU setting\n"); |
1da177e4 | 3215 | return -EINVAL; |
2d7edb92 | 3216 | } |
1da177e4 | 3217 | |
997f5cbd | 3218 | /* Adapter-specific max frame size limits. */ |
1dc32918 | 3219 | switch (hw->mac_type) { |
9e2feace | 3220 | case e1000_undefined ... e1000_82542_rev2_1: |
b7cb8c2c | 3221 | if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) { |
feb8f478 | 3222 | e_err(probe, "Jumbo Frames not supported.\n"); |
2d7edb92 | 3223 | return -EINVAL; |
2d7edb92 | 3224 | } |
997f5cbd | 3225 | break; |
997f5cbd JK |
3226 | default: |
3227 | /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */ | |
3228 | break; | |
1da177e4 LT |
3229 | } |
3230 | ||
3d6114e7 JB |
3231 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) |
3232 | msleep(1); | |
3233 | /* e1000_down has a dependency on max_frame_size */ | |
3234 | hw->max_frame_size = max_frame; | |
3235 | if (netif_running(netdev)) | |
3236 | e1000_down(adapter); | |
3237 | ||
87f5032e | 3238 | /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN |
9e2feace | 3239 | * means we reserve 2 more, this pushes us to allocate from the next |
edbbb3ca JB |
3240 | * larger slab size. |
3241 | * i.e. RXBUFFER_2048 --> size-4096 slab | |
3242 | * however with the new *_jumbo_rx* routines, jumbo receives will use | |
3243 | * fragmented skbs */ | |
9e2feace | 3244 | |
9926146b | 3245 | if (max_frame <= E1000_RXBUFFER_2048) |
9e2feace | 3246 | adapter->rx_buffer_len = E1000_RXBUFFER_2048; |
edbbb3ca JB |
3247 | else |
3248 | #if (PAGE_SIZE >= E1000_RXBUFFER_16384) | |
9e2feace | 3249 | adapter->rx_buffer_len = E1000_RXBUFFER_16384; |
edbbb3ca JB |
3250 | #elif (PAGE_SIZE >= E1000_RXBUFFER_4096) |
3251 | adapter->rx_buffer_len = PAGE_SIZE; | |
3252 | #endif | |
9e2feace AK |
3253 | |
3254 | /* adjust allocation if LPE protects us, and we aren't using SBP */ | |
1dc32918 | 3255 | if (!hw->tbi_compatibility_on && |
b7cb8c2c | 3256 | ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) || |
9e2feace AK |
3257 | (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))) |
3258 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; | |
997f5cbd | 3259 | |
675ad473 ET |
3260 | pr_info("%s changing MTU from %d to %d\n", |
3261 | netdev->name, netdev->mtu, new_mtu); | |
2d7edb92 MC |
3262 | netdev->mtu = new_mtu; |
3263 | ||
2db10a08 | 3264 | if (netif_running(netdev)) |
3d6114e7 JB |
3265 | e1000_up(adapter); |
3266 | else | |
3267 | e1000_reset(adapter); | |
3268 | ||
3269 | clear_bit(__E1000_RESETTING, &adapter->flags); | |
1da177e4 | 3270 | |
1da177e4 LT |
3271 | return 0; |
3272 | } | |
3273 | ||
3274 | /** | |
3275 | * e1000_update_stats - Update the board statistics counters | |
3276 | * @adapter: board private structure | |
3277 | **/ | |
3278 | ||
64798845 | 3279 | void e1000_update_stats(struct e1000_adapter *adapter) |
1da177e4 | 3280 | { |
5fe31def | 3281 | struct net_device *netdev = adapter->netdev; |
1da177e4 | 3282 | struct e1000_hw *hw = &adapter->hw; |
282f33c9 | 3283 | struct pci_dev *pdev = adapter->pdev; |
1da177e4 | 3284 | unsigned long flags; |
406874a7 | 3285 | u16 phy_tmp; |
1da177e4 LT |
3286 | |
3287 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF | |
3288 | ||
282f33c9 LV |
3289 | /* |
3290 | * Prevent stats update while adapter is being reset, or if the pci | |
3291 | * connection is down. | |
3292 | */ | |
9026729b | 3293 | if (adapter->link_speed == 0) |
282f33c9 | 3294 | return; |
81b1955e | 3295 | if (pci_channel_offline(pdev)) |
9026729b AK |
3296 | return; |
3297 | ||
1da177e4 LT |
3298 | spin_lock_irqsave(&adapter->stats_lock, flags); |
3299 | ||
828d055f | 3300 | /* these counters are modified from e1000_tbi_adjust_stats, |
1da177e4 LT |
3301 | * called from the interrupt context, so they must only |
3302 | * be written while holding adapter->stats_lock | |
3303 | */ | |
3304 | ||
1dc32918 JP |
3305 | adapter->stats.crcerrs += er32(CRCERRS); |
3306 | adapter->stats.gprc += er32(GPRC); | |
3307 | adapter->stats.gorcl += er32(GORCL); | |
3308 | adapter->stats.gorch += er32(GORCH); | |
3309 | adapter->stats.bprc += er32(BPRC); | |
3310 | adapter->stats.mprc += er32(MPRC); | |
3311 | adapter->stats.roc += er32(ROC); | |
3312 | ||
1532ecea JB |
3313 | adapter->stats.prc64 += er32(PRC64); |
3314 | adapter->stats.prc127 += er32(PRC127); | |
3315 | adapter->stats.prc255 += er32(PRC255); | |
3316 | adapter->stats.prc511 += er32(PRC511); | |
3317 | adapter->stats.prc1023 += er32(PRC1023); | |
3318 | adapter->stats.prc1522 += er32(PRC1522); | |
1dc32918 JP |
3319 | |
3320 | adapter->stats.symerrs += er32(SYMERRS); | |
3321 | adapter->stats.mpc += er32(MPC); | |
3322 | adapter->stats.scc += er32(SCC); | |
3323 | adapter->stats.ecol += er32(ECOL); | |
3324 | adapter->stats.mcc += er32(MCC); | |
3325 | adapter->stats.latecol += er32(LATECOL); | |
3326 | adapter->stats.dc += er32(DC); | |
3327 | adapter->stats.sec += er32(SEC); | |
3328 | adapter->stats.rlec += er32(RLEC); | |
3329 | adapter->stats.xonrxc += er32(XONRXC); | |
3330 | adapter->stats.xontxc += er32(XONTXC); | |
3331 | adapter->stats.xoffrxc += er32(XOFFRXC); | |
3332 | adapter->stats.xofftxc += er32(XOFFTXC); | |
3333 | adapter->stats.fcruc += er32(FCRUC); | |
3334 | adapter->stats.gptc += er32(GPTC); | |
3335 | adapter->stats.gotcl += er32(GOTCL); | |
3336 | adapter->stats.gotch += er32(GOTCH); | |
3337 | adapter->stats.rnbc += er32(RNBC); | |
3338 | adapter->stats.ruc += er32(RUC); | |
3339 | adapter->stats.rfc += er32(RFC); | |
3340 | adapter->stats.rjc += er32(RJC); | |
3341 | adapter->stats.torl += er32(TORL); | |
3342 | adapter->stats.torh += er32(TORH); | |
3343 | adapter->stats.totl += er32(TOTL); | |
3344 | adapter->stats.toth += er32(TOTH); | |
3345 | adapter->stats.tpr += er32(TPR); | |
3346 | ||
1532ecea JB |
3347 | adapter->stats.ptc64 += er32(PTC64); |
3348 | adapter->stats.ptc127 += er32(PTC127); | |
3349 | adapter->stats.ptc255 += er32(PTC255); | |
3350 | adapter->stats.ptc511 += er32(PTC511); | |
3351 | adapter->stats.ptc1023 += er32(PTC1023); | |
3352 | adapter->stats.ptc1522 += er32(PTC1522); | |
1dc32918 JP |
3353 | |
3354 | adapter->stats.mptc += er32(MPTC); | |
3355 | adapter->stats.bptc += er32(BPTC); | |
1da177e4 LT |
3356 | |
3357 | /* used for adaptive IFS */ | |
3358 | ||
1dc32918 | 3359 | hw->tx_packet_delta = er32(TPT); |
1da177e4 | 3360 | adapter->stats.tpt += hw->tx_packet_delta; |
1dc32918 | 3361 | hw->collision_delta = er32(COLC); |
1da177e4 LT |
3362 | adapter->stats.colc += hw->collision_delta; |
3363 | ||
96838a40 | 3364 | if (hw->mac_type >= e1000_82543) { |
1dc32918 JP |
3365 | adapter->stats.algnerrc += er32(ALGNERRC); |
3366 | adapter->stats.rxerrc += er32(RXERRC); | |
3367 | adapter->stats.tncrs += er32(TNCRS); | |
3368 | adapter->stats.cexterr += er32(CEXTERR); | |
3369 | adapter->stats.tsctc += er32(TSCTC); | |
3370 | adapter->stats.tsctfc += er32(TSCTFC); | |
1da177e4 LT |
3371 | } |
3372 | ||
3373 | /* Fill out the OS statistics structure */ | |
5fe31def AK |
3374 | netdev->stats.multicast = adapter->stats.mprc; |
3375 | netdev->stats.collisions = adapter->stats.colc; | |
1da177e4 LT |
3376 | |
3377 | /* Rx Errors */ | |
3378 | ||
87041639 JK |
3379 | /* RLEC on some newer hardware can be incorrect so build |
3380 | * our own version based on RUC and ROC */ | |
5fe31def | 3381 | netdev->stats.rx_errors = adapter->stats.rxerrc + |
1da177e4 | 3382 | adapter->stats.crcerrs + adapter->stats.algnerrc + |
87041639 JK |
3383 | adapter->stats.ruc + adapter->stats.roc + |
3384 | adapter->stats.cexterr; | |
49559854 | 3385 | adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc; |
5fe31def AK |
3386 | netdev->stats.rx_length_errors = adapter->stats.rlerrc; |
3387 | netdev->stats.rx_crc_errors = adapter->stats.crcerrs; | |
3388 | netdev->stats.rx_frame_errors = adapter->stats.algnerrc; | |
3389 | netdev->stats.rx_missed_errors = adapter->stats.mpc; | |
1da177e4 LT |
3390 | |
3391 | /* Tx Errors */ | |
49559854 | 3392 | adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol; |
5fe31def AK |
3393 | netdev->stats.tx_errors = adapter->stats.txerrc; |
3394 | netdev->stats.tx_aborted_errors = adapter->stats.ecol; | |
3395 | netdev->stats.tx_window_errors = adapter->stats.latecol; | |
3396 | netdev->stats.tx_carrier_errors = adapter->stats.tncrs; | |
1dc32918 | 3397 | if (hw->bad_tx_carr_stats_fd && |
167fb284 | 3398 | adapter->link_duplex == FULL_DUPLEX) { |
5fe31def | 3399 | netdev->stats.tx_carrier_errors = 0; |
167fb284 JG |
3400 | adapter->stats.tncrs = 0; |
3401 | } | |
1da177e4 LT |
3402 | |
3403 | /* Tx Dropped needs to be maintained elsewhere */ | |
3404 | ||
3405 | /* Phy Stats */ | |
96838a40 JB |
3406 | if (hw->media_type == e1000_media_type_copper) { |
3407 | if ((adapter->link_speed == SPEED_1000) && | |
1da177e4 LT |
3408 | (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) { |
3409 | phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK; | |
3410 | adapter->phy_stats.idle_errors += phy_tmp; | |
3411 | } | |
3412 | ||
96838a40 | 3413 | if ((hw->mac_type <= e1000_82546) && |
1da177e4 LT |
3414 | (hw->phy_type == e1000_phy_m88) && |
3415 | !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp)) | |
3416 | adapter->phy_stats.receive_errors += phy_tmp; | |
3417 | } | |
3418 | ||
15e376b4 | 3419 | /* Management Stats */ |
1dc32918 JP |
3420 | if (hw->has_smbus) { |
3421 | adapter->stats.mgptc += er32(MGTPTC); | |
3422 | adapter->stats.mgprc += er32(MGTPRC); | |
3423 | adapter->stats.mgpdc += er32(MGTPDC); | |
15e376b4 JG |
3424 | } |
3425 | ||
1da177e4 LT |
3426 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
3427 | } | |
9ac98284 | 3428 | |
1da177e4 LT |
3429 | /** |
3430 | * e1000_intr - Interrupt Handler | |
3431 | * @irq: interrupt number | |
3432 | * @data: pointer to a network interface device structure | |
1da177e4 LT |
3433 | **/ |
3434 | ||
64798845 | 3435 | static irqreturn_t e1000_intr(int irq, void *data) |
1da177e4 LT |
3436 | { |
3437 | struct net_device *netdev = data; | |
60490fe0 | 3438 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3439 | struct e1000_hw *hw = &adapter->hw; |
1532ecea | 3440 | u32 icr = er32(ICR); |
c3570acb | 3441 | |
e151a60a | 3442 | if (unlikely((!icr) || test_bit(__E1000_DOWN, &adapter->flags))) |
835bb129 JB |
3443 | return IRQ_NONE; /* Not our interrupt */ |
3444 | ||
96838a40 | 3445 | if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { |
1da177e4 | 3446 | hw->get_link_status = 1; |
1314bbf3 AK |
3447 | /* guard against interrupt when we're going down */ |
3448 | if (!test_bit(__E1000_DOWN, &adapter->flags)) | |
3449 | mod_timer(&adapter->watchdog_timer, jiffies + 1); | |
1da177e4 LT |
3450 | } |
3451 | ||
1532ecea JB |
3452 | /* disable interrupts, without the synchronize_irq bit */ |
3453 | ew32(IMC, ~0); | |
3454 | E1000_WRITE_FLUSH(); | |
3455 | ||
288379f0 | 3456 | if (likely(napi_schedule_prep(&adapter->napi))) { |
835bb129 JB |
3457 | adapter->total_tx_bytes = 0; |
3458 | adapter->total_tx_packets = 0; | |
3459 | adapter->total_rx_bytes = 0; | |
3460 | adapter->total_rx_packets = 0; | |
288379f0 | 3461 | __napi_schedule(&adapter->napi); |
a6c42322 | 3462 | } else { |
90fb5135 AK |
3463 | /* this really should not happen! if it does it is basically a |
3464 | * bug, but not a hard error, so enable ints and continue */ | |
a6c42322 JB |
3465 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
3466 | e1000_irq_enable(adapter); | |
3467 | } | |
1da177e4 | 3468 | |
1da177e4 LT |
3469 | return IRQ_HANDLED; |
3470 | } | |
3471 | ||
1da177e4 LT |
3472 | /** |
3473 | * e1000_clean - NAPI Rx polling callback | |
3474 | * @adapter: board private structure | |
3475 | **/ | |
64798845 | 3476 | static int e1000_clean(struct napi_struct *napi, int budget) |
1da177e4 | 3477 | { |
bea3348e | 3478 | struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi); |
650b5a5c | 3479 | int tx_clean_complete = 0, work_done = 0; |
581d708e | 3480 | |
650b5a5c | 3481 | tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]); |
581d708e | 3482 | |
650b5a5c | 3483 | adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget); |
581d708e | 3484 | |
650b5a5c | 3485 | if (!tx_clean_complete) |
d2c7ddd6 DM |
3486 | work_done = budget; |
3487 | ||
53e52c72 DM |
3488 | /* If budget not fully consumed, exit the polling mode */ |
3489 | if (work_done < budget) { | |
835bb129 JB |
3490 | if (likely(adapter->itr_setting & 3)) |
3491 | e1000_set_itr(adapter); | |
288379f0 | 3492 | napi_complete(napi); |
a6c42322 JB |
3493 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
3494 | e1000_irq_enable(adapter); | |
1da177e4 LT |
3495 | } |
3496 | ||
bea3348e | 3497 | return work_done; |
1da177e4 LT |
3498 | } |
3499 | ||
1da177e4 LT |
3500 | /** |
3501 | * e1000_clean_tx_irq - Reclaim resources after transmit completes | |
3502 | * @adapter: board private structure | |
3503 | **/ | |
64798845 JP |
3504 | static bool e1000_clean_tx_irq(struct e1000_adapter *adapter, |
3505 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 3506 | { |
1dc32918 | 3507 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
3508 | struct net_device *netdev = adapter->netdev; |
3509 | struct e1000_tx_desc *tx_desc, *eop_desc; | |
3510 | struct e1000_buffer *buffer_info; | |
3511 | unsigned int i, eop; | |
2a1af5d7 | 3512 | unsigned int count = 0; |
835bb129 | 3513 | unsigned int total_tx_bytes=0, total_tx_packets=0; |
1da177e4 LT |
3514 | |
3515 | i = tx_ring->next_to_clean; | |
3516 | eop = tx_ring->buffer_info[i].next_to_watch; | |
3517 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
3518 | ||
ccfb342c AD |
3519 | while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && |
3520 | (count < tx_ring->count)) { | |
843f4267 | 3521 | bool cleaned = false; |
2d0bb1c1 | 3522 | rmb(); /* read buffer_info after eop_desc */ |
843f4267 | 3523 | for ( ; !cleaned; count++) { |
1da177e4 LT |
3524 | tx_desc = E1000_TX_DESC(*tx_ring, i); |
3525 | buffer_info = &tx_ring->buffer_info[i]; | |
3526 | cleaned = (i == eop); | |
3527 | ||
835bb129 | 3528 | if (cleaned) { |
2b65326e | 3529 | struct sk_buff *skb = buffer_info->skb; |
7753b171 JB |
3530 | unsigned int segs, bytecount; |
3531 | segs = skb_shinfo(skb)->gso_segs ?: 1; | |
3532 | /* multiply data chunks by size of headers */ | |
3533 | bytecount = ((segs - 1) * skb_headlen(skb)) + | |
3534 | skb->len; | |
2b65326e | 3535 | total_tx_packets += segs; |
7753b171 | 3536 | total_tx_bytes += bytecount; |
835bb129 | 3537 | } |
fd803241 | 3538 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); |
a9ebadd6 | 3539 | tx_desc->upper.data = 0; |
1da177e4 | 3540 | |
96838a40 | 3541 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 | 3542 | } |
581d708e | 3543 | |
1da177e4 LT |
3544 | eop = tx_ring->buffer_info[i].next_to_watch; |
3545 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
3546 | } | |
3547 | ||
3548 | tx_ring->next_to_clean = i; | |
3549 | ||
77b2aad5 | 3550 | #define TX_WAKE_THRESHOLD 32 |
843f4267 | 3551 | if (unlikely(count && netif_carrier_ok(netdev) && |
65c7973f JB |
3552 | E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) { |
3553 | /* Make sure that anybody stopping the queue after this | |
3554 | * sees the new next_to_clean. | |
3555 | */ | |
3556 | smp_mb(); | |
cdd7549e JB |
3557 | |
3558 | if (netif_queue_stopped(netdev) && | |
3559 | !(test_bit(__E1000_DOWN, &adapter->flags))) { | |
77b2aad5 | 3560 | netif_wake_queue(netdev); |
fcfb1224 JB |
3561 | ++adapter->restart_queue; |
3562 | } | |
77b2aad5 | 3563 | } |
2648345f | 3564 | |
581d708e | 3565 | if (adapter->detect_tx_hung) { |
2648345f | 3566 | /* Detect a transmit hang in hardware, this serializes the |
1da177e4 | 3567 | * check with the clearing of time_stamp and movement of i */ |
c3033b01 | 3568 | adapter->detect_tx_hung = false; |
cdd7549e JB |
3569 | if (tx_ring->buffer_info[eop].time_stamp && |
3570 | time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + | |
8e95a202 JP |
3571 | (adapter->tx_timeout_factor * HZ)) && |
3572 | !(er32(STATUS) & E1000_STATUS_TXOFF)) { | |
70b8f1e1 MC |
3573 | |
3574 | /* detected Tx unit hang */ | |
feb8f478 | 3575 | e_err(drv, "Detected Tx Unit Hang\n" |
675ad473 ET |
3576 | " Tx Queue <%lu>\n" |
3577 | " TDH <%x>\n" | |
3578 | " TDT <%x>\n" | |
3579 | " next_to_use <%x>\n" | |
3580 | " next_to_clean <%x>\n" | |
3581 | "buffer_info[next_to_clean]\n" | |
3582 | " time_stamp <%lx>\n" | |
3583 | " next_to_watch <%x>\n" | |
3584 | " jiffies <%lx>\n" | |
3585 | " next_to_watch.status <%x>\n", | |
7bfa4816 JK |
3586 | (unsigned long)((tx_ring - adapter->tx_ring) / |
3587 | sizeof(struct e1000_tx_ring)), | |
1dc32918 JP |
3588 | readl(hw->hw_addr + tx_ring->tdh), |
3589 | readl(hw->hw_addr + tx_ring->tdt), | |
70b8f1e1 | 3590 | tx_ring->next_to_use, |
392137fa | 3591 | tx_ring->next_to_clean, |
cdd7549e | 3592 | tx_ring->buffer_info[eop].time_stamp, |
70b8f1e1 MC |
3593 | eop, |
3594 | jiffies, | |
3595 | eop_desc->upper.fields.status); | |
1da177e4 | 3596 | netif_stop_queue(netdev); |
70b8f1e1 | 3597 | } |
1da177e4 | 3598 | } |
835bb129 JB |
3599 | adapter->total_tx_bytes += total_tx_bytes; |
3600 | adapter->total_tx_packets += total_tx_packets; | |
5fe31def AK |
3601 | netdev->stats.tx_bytes += total_tx_bytes; |
3602 | netdev->stats.tx_packets += total_tx_packets; | |
807540ba | 3603 | return count < tx_ring->count; |
1da177e4 LT |
3604 | } |
3605 | ||
3606 | /** | |
3607 | * e1000_rx_checksum - Receive Checksum Offload for 82543 | |
2d7edb92 MC |
3608 | * @adapter: board private structure |
3609 | * @status_err: receive descriptor status and error fields | |
3610 | * @csum: receive descriptor csum field | |
3611 | * @sk_buff: socket buffer with received data | |
1da177e4 LT |
3612 | **/ |
3613 | ||
64798845 JP |
3614 | static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, |
3615 | u32 csum, struct sk_buff *skb) | |
1da177e4 | 3616 | { |
1dc32918 | 3617 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
3618 | u16 status = (u16)status_err; |
3619 | u8 errors = (u8)(status_err >> 24); | |
bc8acf2c ED |
3620 | |
3621 | skb_checksum_none_assert(skb); | |
2d7edb92 | 3622 | |
1da177e4 | 3623 | /* 82543 or newer only */ |
1dc32918 | 3624 | if (unlikely(hw->mac_type < e1000_82543)) return; |
1da177e4 | 3625 | /* Ignore Checksum bit is set */ |
96838a40 | 3626 | if (unlikely(status & E1000_RXD_STAT_IXSM)) return; |
2d7edb92 | 3627 | /* TCP/UDP checksum error bit is set */ |
96838a40 | 3628 | if (unlikely(errors & E1000_RXD_ERR_TCPE)) { |
1da177e4 | 3629 | /* let the stack verify checksum errors */ |
1da177e4 | 3630 | adapter->hw_csum_err++; |
2d7edb92 MC |
3631 | return; |
3632 | } | |
3633 | /* TCP/UDP Checksum has not been calculated */ | |
1532ecea JB |
3634 | if (!(status & E1000_RXD_STAT_TCPCS)) |
3635 | return; | |
3636 | ||
2d7edb92 MC |
3637 | /* It must be a TCP or UDP packet with a valid checksum */ |
3638 | if (likely(status & E1000_RXD_STAT_TCPCS)) { | |
1da177e4 LT |
3639 | /* TCP checksum is good */ |
3640 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
1da177e4 | 3641 | } |
2d7edb92 | 3642 | adapter->hw_csum_good++; |
1da177e4 LT |
3643 | } |
3644 | ||
edbbb3ca JB |
3645 | /** |
3646 | * e1000_consume_page - helper function | |
3647 | **/ | |
3648 | static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb, | |
3649 | u16 length) | |
3650 | { | |
3651 | bi->page = NULL; | |
3652 | skb->len += length; | |
3653 | skb->data_len += length; | |
3654 | skb->truesize += length; | |
3655 | } | |
3656 | ||
3657 | /** | |
3658 | * e1000_receive_skb - helper function to handle rx indications | |
3659 | * @adapter: board private structure | |
3660 | * @status: descriptor status field as written by hardware | |
3661 | * @vlan: descriptor vlan field as written by hardware (no le/be conversion) | |
3662 | * @skb: pointer to sk_buff to be indicated to stack | |
3663 | */ | |
3664 | static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status, | |
3665 | __le16 vlan, struct sk_buff *skb) | |
3666 | { | |
6a08d194 JB |
3667 | skb->protocol = eth_type_trans(skb, adapter->netdev); |
3668 | ||
3669 | if ((unlikely(adapter->vlgrp && (status & E1000_RXD_STAT_VP)))) | |
3670 | vlan_gro_receive(&adapter->napi, adapter->vlgrp, | |
3671 | le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK, | |
3672 | skb); | |
3673 | else | |
3674 | napi_gro_receive(&adapter->napi, skb); | |
edbbb3ca JB |
3675 | } |
3676 | ||
3677 | /** | |
3678 | * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy | |
3679 | * @adapter: board private structure | |
3680 | * @rx_ring: ring to clean | |
3681 | * @work_done: amount of napi work completed this call | |
3682 | * @work_to_do: max amount of work allowed for this call to do | |
3683 | * | |
3684 | * the return value indicates whether actual cleaning was done, there | |
3685 | * is no guarantee that everything was cleaned | |
3686 | */ | |
3687 | static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter, | |
3688 | struct e1000_rx_ring *rx_ring, | |
3689 | int *work_done, int work_to_do) | |
3690 | { | |
3691 | struct e1000_hw *hw = &adapter->hw; | |
3692 | struct net_device *netdev = adapter->netdev; | |
3693 | struct pci_dev *pdev = adapter->pdev; | |
3694 | struct e1000_rx_desc *rx_desc, *next_rxd; | |
3695 | struct e1000_buffer *buffer_info, *next_buffer; | |
3696 | unsigned long irq_flags; | |
3697 | u32 length; | |
3698 | unsigned int i; | |
3699 | int cleaned_count = 0; | |
3700 | bool cleaned = false; | |
3701 | unsigned int total_rx_bytes=0, total_rx_packets=0; | |
3702 | ||
3703 | i = rx_ring->next_to_clean; | |
3704 | rx_desc = E1000_RX_DESC(*rx_ring, i); | |
3705 | buffer_info = &rx_ring->buffer_info[i]; | |
3706 | ||
3707 | while (rx_desc->status & E1000_RXD_STAT_DD) { | |
3708 | struct sk_buff *skb; | |
3709 | u8 status; | |
3710 | ||
3711 | if (*work_done >= work_to_do) | |
3712 | break; | |
3713 | (*work_done)++; | |
2d0bb1c1 | 3714 | rmb(); /* read descriptor and rx_buffer_info after status DD */ |
edbbb3ca JB |
3715 | |
3716 | status = rx_desc->status; | |
3717 | skb = buffer_info->skb; | |
3718 | buffer_info->skb = NULL; | |
3719 | ||
3720 | if (++i == rx_ring->count) i = 0; | |
3721 | next_rxd = E1000_RX_DESC(*rx_ring, i); | |
3722 | prefetch(next_rxd); | |
3723 | ||
3724 | next_buffer = &rx_ring->buffer_info[i]; | |
3725 | ||
3726 | cleaned = true; | |
3727 | cleaned_count++; | |
b16f53be NN |
3728 | dma_unmap_page(&pdev->dev, buffer_info->dma, |
3729 | buffer_info->length, DMA_FROM_DEVICE); | |
edbbb3ca JB |
3730 | buffer_info->dma = 0; |
3731 | ||
3732 | length = le16_to_cpu(rx_desc->length); | |
3733 | ||
3734 | /* errors is only valid for DD + EOP descriptors */ | |
3735 | if (unlikely((status & E1000_RXD_STAT_EOP) && | |
3736 | (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) { | |
3737 | u8 last_byte = *(skb->data + length - 1); | |
3738 | if (TBI_ACCEPT(hw, status, rx_desc->errors, length, | |
3739 | last_byte)) { | |
3740 | spin_lock_irqsave(&adapter->stats_lock, | |
3741 | irq_flags); | |
3742 | e1000_tbi_adjust_stats(hw, &adapter->stats, | |
3743 | length, skb->data); | |
3744 | spin_unlock_irqrestore(&adapter->stats_lock, | |
3745 | irq_flags); | |
3746 | length--; | |
3747 | } else { | |
3748 | /* recycle both page and skb */ | |
3749 | buffer_info->skb = skb; | |
3750 | /* an error means any chain goes out the window | |
3751 | * too */ | |
3752 | if (rx_ring->rx_skb_top) | |
3753 | dev_kfree_skb(rx_ring->rx_skb_top); | |
3754 | rx_ring->rx_skb_top = NULL; | |
3755 | goto next_desc; | |
3756 | } | |
3757 | } | |
3758 | ||
3759 | #define rxtop rx_ring->rx_skb_top | |
3760 | if (!(status & E1000_RXD_STAT_EOP)) { | |
3761 | /* this descriptor is only the beginning (or middle) */ | |
3762 | if (!rxtop) { | |
3763 | /* this is the beginning of a chain */ | |
3764 | rxtop = skb; | |
3765 | skb_fill_page_desc(rxtop, 0, buffer_info->page, | |
3766 | 0, length); | |
3767 | } else { | |
3768 | /* this is the middle of a chain */ | |
3769 | skb_fill_page_desc(rxtop, | |
3770 | skb_shinfo(rxtop)->nr_frags, | |
3771 | buffer_info->page, 0, length); | |
3772 | /* re-use the skb, only consumed the page */ | |
3773 | buffer_info->skb = skb; | |
3774 | } | |
3775 | e1000_consume_page(buffer_info, rxtop, length); | |
3776 | goto next_desc; | |
3777 | } else { | |
3778 | if (rxtop) { | |
3779 | /* end of the chain */ | |
3780 | skb_fill_page_desc(rxtop, | |
3781 | skb_shinfo(rxtop)->nr_frags, | |
3782 | buffer_info->page, 0, length); | |
3783 | /* re-use the current skb, we only consumed the | |
3784 | * page */ | |
3785 | buffer_info->skb = skb; | |
3786 | skb = rxtop; | |
3787 | rxtop = NULL; | |
3788 | e1000_consume_page(buffer_info, skb, length); | |
3789 | } else { | |
3790 | /* no chain, got EOP, this buf is the packet | |
3791 | * copybreak to save the put_page/alloc_page */ | |
3792 | if (length <= copybreak && | |
3793 | skb_tailroom(skb) >= length) { | |
3794 | u8 *vaddr; | |
3795 | vaddr = kmap_atomic(buffer_info->page, | |
3796 | KM_SKB_DATA_SOFTIRQ); | |
3797 | memcpy(skb_tail_pointer(skb), vaddr, length); | |
3798 | kunmap_atomic(vaddr, | |
3799 | KM_SKB_DATA_SOFTIRQ); | |
3800 | /* re-use the page, so don't erase | |
3801 | * buffer_info->page */ | |
3802 | skb_put(skb, length); | |
3803 | } else { | |
3804 | skb_fill_page_desc(skb, 0, | |
3805 | buffer_info->page, 0, | |
3806 | length); | |
3807 | e1000_consume_page(buffer_info, skb, | |
3808 | length); | |
3809 | } | |
3810 | } | |
3811 | } | |
3812 | ||
3813 | /* Receive Checksum Offload XXX recompute due to CRC strip? */ | |
3814 | e1000_rx_checksum(adapter, | |
3815 | (u32)(status) | | |
3816 | ((u32)(rx_desc->errors) << 24), | |
3817 | le16_to_cpu(rx_desc->csum), skb); | |
3818 | ||
3819 | pskb_trim(skb, skb->len - 4); | |
3820 | ||
3821 | /* probably a little skewed due to removing CRC */ | |
3822 | total_rx_bytes += skb->len; | |
3823 | total_rx_packets++; | |
3824 | ||
3825 | /* eth type trans needs skb->data to point to something */ | |
3826 | if (!pskb_may_pull(skb, ETH_HLEN)) { | |
feb8f478 | 3827 | e_err(drv, "pskb_may_pull failed.\n"); |
edbbb3ca JB |
3828 | dev_kfree_skb(skb); |
3829 | goto next_desc; | |
3830 | } | |
3831 | ||
edbbb3ca JB |
3832 | e1000_receive_skb(adapter, status, rx_desc->special, skb); |
3833 | ||
3834 | next_desc: | |
3835 | rx_desc->status = 0; | |
3836 | ||
3837 | /* return some buffers to hardware, one at a time is too slow */ | |
3838 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
3839 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
3840 | cleaned_count = 0; | |
3841 | } | |
3842 | ||
3843 | /* use prefetched values */ | |
3844 | rx_desc = next_rxd; | |
3845 | buffer_info = next_buffer; | |
3846 | } | |
3847 | rx_ring->next_to_clean = i; | |
3848 | ||
3849 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
3850 | if (cleaned_count) | |
3851 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
3852 | ||
3853 | adapter->total_rx_packets += total_rx_packets; | |
3854 | adapter->total_rx_bytes += total_rx_bytes; | |
5fe31def AK |
3855 | netdev->stats.rx_bytes += total_rx_bytes; |
3856 | netdev->stats.rx_packets += total_rx_packets; | |
edbbb3ca JB |
3857 | return cleaned; |
3858 | } | |
3859 | ||
57bf6eef JP |
3860 | /* |
3861 | * this should improve performance for small packets with large amounts | |
3862 | * of reassembly being done in the stack | |
3863 | */ | |
3864 | static void e1000_check_copybreak(struct net_device *netdev, | |
3865 | struct e1000_buffer *buffer_info, | |
3866 | u32 length, struct sk_buff **skb) | |
3867 | { | |
3868 | struct sk_buff *new_skb; | |
3869 | ||
3870 | if (length > copybreak) | |
3871 | return; | |
3872 | ||
3873 | new_skb = netdev_alloc_skb_ip_align(netdev, length); | |
3874 | if (!new_skb) | |
3875 | return; | |
3876 | ||
3877 | skb_copy_to_linear_data_offset(new_skb, -NET_IP_ALIGN, | |
3878 | (*skb)->data - NET_IP_ALIGN, | |
3879 | length + NET_IP_ALIGN); | |
3880 | /* save the skb in buffer_info as good */ | |
3881 | buffer_info->skb = *skb; | |
3882 | *skb = new_skb; | |
3883 | } | |
3884 | ||
1da177e4 | 3885 | /** |
2d7edb92 | 3886 | * e1000_clean_rx_irq - Send received data up the network stack; legacy |
1da177e4 | 3887 | * @adapter: board private structure |
edbbb3ca JB |
3888 | * @rx_ring: ring to clean |
3889 | * @work_done: amount of napi work completed this call | |
3890 | * @work_to_do: max amount of work allowed for this call to do | |
3891 | */ | |
64798845 JP |
3892 | static bool e1000_clean_rx_irq(struct e1000_adapter *adapter, |
3893 | struct e1000_rx_ring *rx_ring, | |
3894 | int *work_done, int work_to_do) | |
1da177e4 | 3895 | { |
1dc32918 | 3896 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
3897 | struct net_device *netdev = adapter->netdev; |
3898 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f JB |
3899 | struct e1000_rx_desc *rx_desc, *next_rxd; |
3900 | struct e1000_buffer *buffer_info, *next_buffer; | |
1da177e4 | 3901 | unsigned long flags; |
406874a7 | 3902 | u32 length; |
1da177e4 | 3903 | unsigned int i; |
72d64a43 | 3904 | int cleaned_count = 0; |
c3033b01 | 3905 | bool cleaned = false; |
835bb129 | 3906 | unsigned int total_rx_bytes=0, total_rx_packets=0; |
1da177e4 LT |
3907 | |
3908 | i = rx_ring->next_to_clean; | |
3909 | rx_desc = E1000_RX_DESC(*rx_ring, i); | |
b92ff8ee | 3910 | buffer_info = &rx_ring->buffer_info[i]; |
1da177e4 | 3911 | |
b92ff8ee | 3912 | while (rx_desc->status & E1000_RXD_STAT_DD) { |
24f476ee | 3913 | struct sk_buff *skb; |
a292ca6e | 3914 | u8 status; |
90fb5135 | 3915 | |
96838a40 | 3916 | if (*work_done >= work_to_do) |
1da177e4 LT |
3917 | break; |
3918 | (*work_done)++; | |
2d0bb1c1 | 3919 | rmb(); /* read descriptor and rx_buffer_info after status DD */ |
c3570acb | 3920 | |
a292ca6e | 3921 | status = rx_desc->status; |
b92ff8ee | 3922 | skb = buffer_info->skb; |
86c3d59f JB |
3923 | buffer_info->skb = NULL; |
3924 | ||
30320be8 JK |
3925 | prefetch(skb->data - NET_IP_ALIGN); |
3926 | ||
86c3d59f JB |
3927 | if (++i == rx_ring->count) i = 0; |
3928 | next_rxd = E1000_RX_DESC(*rx_ring, i); | |
30320be8 JK |
3929 | prefetch(next_rxd); |
3930 | ||
86c3d59f | 3931 | next_buffer = &rx_ring->buffer_info[i]; |
86c3d59f | 3932 | |
c3033b01 | 3933 | cleaned = true; |
72d64a43 | 3934 | cleaned_count++; |
b16f53be NN |
3935 | dma_unmap_single(&pdev->dev, buffer_info->dma, |
3936 | buffer_info->length, DMA_FROM_DEVICE); | |
679be3ba | 3937 | buffer_info->dma = 0; |
1da177e4 | 3938 | |
1da177e4 | 3939 | length = le16_to_cpu(rx_desc->length); |
ea30e119 | 3940 | /* !EOP means multiple descriptors were used to store a single |
40a14dea JB |
3941 | * packet, if thats the case we need to toss it. In fact, we |
3942 | * to toss every packet with the EOP bit clear and the next | |
3943 | * frame that _does_ have the EOP bit set, as it is by | |
3944 | * definition only a frame fragment | |
3945 | */ | |
3946 | if (unlikely(!(status & E1000_RXD_STAT_EOP))) | |
3947 | adapter->discarding = true; | |
3948 | ||
3949 | if (adapter->discarding) { | |
a1415ee6 | 3950 | /* All receives must fit into a single buffer */ |
feb8f478 | 3951 | e_dbg("Receive packet consumed multiple buffers\n"); |
864c4e45 | 3952 | /* recycle */ |
8fc897b0 | 3953 | buffer_info->skb = skb; |
40a14dea JB |
3954 | if (status & E1000_RXD_STAT_EOP) |
3955 | adapter->discarding = false; | |
1da177e4 LT |
3956 | goto next_desc; |
3957 | } | |
3958 | ||
96838a40 | 3959 | if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) { |
edbbb3ca | 3960 | u8 last_byte = *(skb->data + length - 1); |
1dc32918 JP |
3961 | if (TBI_ACCEPT(hw, status, rx_desc->errors, length, |
3962 | last_byte)) { | |
1da177e4 | 3963 | spin_lock_irqsave(&adapter->stats_lock, flags); |
1dc32918 | 3964 | e1000_tbi_adjust_stats(hw, &adapter->stats, |
1da177e4 LT |
3965 | length, skb->data); |
3966 | spin_unlock_irqrestore(&adapter->stats_lock, | |
3967 | flags); | |
3968 | length--; | |
3969 | } else { | |
9e2feace AK |
3970 | /* recycle */ |
3971 | buffer_info->skb = skb; | |
1da177e4 LT |
3972 | goto next_desc; |
3973 | } | |
1cb5821f | 3974 | } |
1da177e4 | 3975 | |
d2a1e213 JB |
3976 | /* adjust length to remove Ethernet CRC, this must be |
3977 | * done after the TBI_ACCEPT workaround above */ | |
3978 | length -= 4; | |
3979 | ||
835bb129 JB |
3980 | /* probably a little skewed due to removing CRC */ |
3981 | total_rx_bytes += length; | |
3982 | total_rx_packets++; | |
3983 | ||
57bf6eef JP |
3984 | e1000_check_copybreak(netdev, buffer_info, length, &skb); |
3985 | ||
996695de | 3986 | skb_put(skb, length); |
1da177e4 LT |
3987 | |
3988 | /* Receive Checksum Offload */ | |
a292ca6e | 3989 | e1000_rx_checksum(adapter, |
406874a7 JP |
3990 | (u32)(status) | |
3991 | ((u32)(rx_desc->errors) << 24), | |
c3d7a3a4 | 3992 | le16_to_cpu(rx_desc->csum), skb); |
96838a40 | 3993 | |
edbbb3ca | 3994 | e1000_receive_skb(adapter, status, rx_desc->special, skb); |
c3570acb | 3995 | |
1da177e4 LT |
3996 | next_desc: |
3997 | rx_desc->status = 0; | |
1da177e4 | 3998 | |
72d64a43 JK |
3999 | /* return some buffers to hardware, one at a time is too slow */ |
4000 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
4001 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
4002 | cleaned_count = 0; | |
4003 | } | |
4004 | ||
30320be8 | 4005 | /* use prefetched values */ |
86c3d59f JB |
4006 | rx_desc = next_rxd; |
4007 | buffer_info = next_buffer; | |
1da177e4 | 4008 | } |
1da177e4 | 4009 | rx_ring->next_to_clean = i; |
72d64a43 JK |
4010 | |
4011 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
4012 | if (cleaned_count) | |
4013 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
2d7edb92 | 4014 | |
835bb129 JB |
4015 | adapter->total_rx_packets += total_rx_packets; |
4016 | adapter->total_rx_bytes += total_rx_bytes; | |
5fe31def AK |
4017 | netdev->stats.rx_bytes += total_rx_bytes; |
4018 | netdev->stats.rx_packets += total_rx_packets; | |
2d7edb92 MC |
4019 | return cleaned; |
4020 | } | |
4021 | ||
edbbb3ca JB |
4022 | /** |
4023 | * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers | |
4024 | * @adapter: address of board private structure | |
4025 | * @rx_ring: pointer to receive ring structure | |
4026 | * @cleaned_count: number of buffers to allocate this pass | |
4027 | **/ | |
4028 | ||
4029 | static void | |
4030 | e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter, | |
4031 | struct e1000_rx_ring *rx_ring, int cleaned_count) | |
4032 | { | |
4033 | struct net_device *netdev = adapter->netdev; | |
4034 | struct pci_dev *pdev = adapter->pdev; | |
4035 | struct e1000_rx_desc *rx_desc; | |
4036 | struct e1000_buffer *buffer_info; | |
4037 | struct sk_buff *skb; | |
4038 | unsigned int i; | |
89d71a66 | 4039 | unsigned int bufsz = 256 - 16 /*for skb_reserve */ ; |
edbbb3ca JB |
4040 | |
4041 | i = rx_ring->next_to_use; | |
4042 | buffer_info = &rx_ring->buffer_info[i]; | |
4043 | ||
4044 | while (cleaned_count--) { | |
4045 | skb = buffer_info->skb; | |
4046 | if (skb) { | |
4047 | skb_trim(skb, 0); | |
4048 | goto check_page; | |
4049 | } | |
4050 | ||
89d71a66 | 4051 | skb = netdev_alloc_skb_ip_align(netdev, bufsz); |
edbbb3ca JB |
4052 | if (unlikely(!skb)) { |
4053 | /* Better luck next round */ | |
4054 | adapter->alloc_rx_buff_failed++; | |
4055 | break; | |
4056 | } | |
4057 | ||
4058 | /* Fix for errata 23, can't cross 64kB boundary */ | |
4059 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { | |
4060 | struct sk_buff *oldskb = skb; | |
feb8f478 ET |
4061 | e_err(rx_err, "skb align check failed: %u bytes at " |
4062 | "%p\n", bufsz, skb->data); | |
edbbb3ca | 4063 | /* Try again, without freeing the previous */ |
89d71a66 | 4064 | skb = netdev_alloc_skb_ip_align(netdev, bufsz); |
edbbb3ca JB |
4065 | /* Failed allocation, critical failure */ |
4066 | if (!skb) { | |
4067 | dev_kfree_skb(oldskb); | |
4068 | adapter->alloc_rx_buff_failed++; | |
4069 | break; | |
4070 | } | |
4071 | ||
4072 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { | |
4073 | /* give up */ | |
4074 | dev_kfree_skb(skb); | |
4075 | dev_kfree_skb(oldskb); | |
4076 | break; /* while (cleaned_count--) */ | |
4077 | } | |
4078 | ||
4079 | /* Use new allocation */ | |
4080 | dev_kfree_skb(oldskb); | |
4081 | } | |
edbbb3ca JB |
4082 | buffer_info->skb = skb; |
4083 | buffer_info->length = adapter->rx_buffer_len; | |
4084 | check_page: | |
4085 | /* allocate a new page if necessary */ | |
4086 | if (!buffer_info->page) { | |
4087 | buffer_info->page = alloc_page(GFP_ATOMIC); | |
4088 | if (unlikely(!buffer_info->page)) { | |
4089 | adapter->alloc_rx_buff_failed++; | |
4090 | break; | |
4091 | } | |
4092 | } | |
4093 | ||
b5abb028 | 4094 | if (!buffer_info->dma) { |
b16f53be | 4095 | buffer_info->dma = dma_map_page(&pdev->dev, |
edbbb3ca | 4096 | buffer_info->page, 0, |
b16f53be NN |
4097 | buffer_info->length, |
4098 | DMA_FROM_DEVICE); | |
4099 | if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { | |
b5abb028 AB |
4100 | put_page(buffer_info->page); |
4101 | dev_kfree_skb(skb); | |
4102 | buffer_info->page = NULL; | |
4103 | buffer_info->skb = NULL; | |
4104 | buffer_info->dma = 0; | |
4105 | adapter->alloc_rx_buff_failed++; | |
4106 | break; /* while !buffer_info->skb */ | |
4107 | } | |
4108 | } | |
edbbb3ca JB |
4109 | |
4110 | rx_desc = E1000_RX_DESC(*rx_ring, i); | |
4111 | rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
4112 | ||
4113 | if (unlikely(++i == rx_ring->count)) | |
4114 | i = 0; | |
4115 | buffer_info = &rx_ring->buffer_info[i]; | |
4116 | } | |
4117 | ||
4118 | if (likely(rx_ring->next_to_use != i)) { | |
4119 | rx_ring->next_to_use = i; | |
4120 | if (unlikely(i-- == 0)) | |
4121 | i = (rx_ring->count - 1); | |
4122 | ||
4123 | /* Force memory writes to complete before letting h/w | |
4124 | * know there are new descriptors to fetch. (Only | |
4125 | * applicable for weak-ordered memory model archs, | |
4126 | * such as IA-64). */ | |
4127 | wmb(); | |
4128 | writel(i, adapter->hw.hw_addr + rx_ring->rdt); | |
4129 | } | |
4130 | } | |
4131 | ||
1da177e4 | 4132 | /** |
2d7edb92 | 4133 | * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended |
1da177e4 LT |
4134 | * @adapter: address of board private structure |
4135 | **/ | |
4136 | ||
64798845 JP |
4137 | static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
4138 | struct e1000_rx_ring *rx_ring, | |
4139 | int cleaned_count) | |
1da177e4 | 4140 | { |
1dc32918 | 4141 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
4142 | struct net_device *netdev = adapter->netdev; |
4143 | struct pci_dev *pdev = adapter->pdev; | |
4144 | struct e1000_rx_desc *rx_desc; | |
4145 | struct e1000_buffer *buffer_info; | |
4146 | struct sk_buff *skb; | |
2648345f | 4147 | unsigned int i; |
89d71a66 | 4148 | unsigned int bufsz = adapter->rx_buffer_len; |
1da177e4 LT |
4149 | |
4150 | i = rx_ring->next_to_use; | |
4151 | buffer_info = &rx_ring->buffer_info[i]; | |
4152 | ||
a292ca6e | 4153 | while (cleaned_count--) { |
ca6f7224 CH |
4154 | skb = buffer_info->skb; |
4155 | if (skb) { | |
a292ca6e JK |
4156 | skb_trim(skb, 0); |
4157 | goto map_skb; | |
4158 | } | |
4159 | ||
89d71a66 | 4160 | skb = netdev_alloc_skb_ip_align(netdev, bufsz); |
96838a40 | 4161 | if (unlikely(!skb)) { |
1da177e4 | 4162 | /* Better luck next round */ |
72d64a43 | 4163 | adapter->alloc_rx_buff_failed++; |
1da177e4 LT |
4164 | break; |
4165 | } | |
4166 | ||
2648345f | 4167 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
4168 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
4169 | struct sk_buff *oldskb = skb; | |
feb8f478 ET |
4170 | e_err(rx_err, "skb align check failed: %u bytes at " |
4171 | "%p\n", bufsz, skb->data); | |
2648345f | 4172 | /* Try again, without freeing the previous */ |
89d71a66 | 4173 | skb = netdev_alloc_skb_ip_align(netdev, bufsz); |
2648345f | 4174 | /* Failed allocation, critical failure */ |
1da177e4 LT |
4175 | if (!skb) { |
4176 | dev_kfree_skb(oldskb); | |
edbbb3ca | 4177 | adapter->alloc_rx_buff_failed++; |
1da177e4 LT |
4178 | break; |
4179 | } | |
2648345f | 4180 | |
1da177e4 LT |
4181 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
4182 | /* give up */ | |
4183 | dev_kfree_skb(skb); | |
4184 | dev_kfree_skb(oldskb); | |
edbbb3ca | 4185 | adapter->alloc_rx_buff_failed++; |
1da177e4 | 4186 | break; /* while !buffer_info->skb */ |
1da177e4 | 4187 | } |
ca6f7224 CH |
4188 | |
4189 | /* Use new allocation */ | |
4190 | dev_kfree_skb(oldskb); | |
1da177e4 | 4191 | } |
1da177e4 LT |
4192 | buffer_info->skb = skb; |
4193 | buffer_info->length = adapter->rx_buffer_len; | |
a292ca6e | 4194 | map_skb: |
b16f53be | 4195 | buffer_info->dma = dma_map_single(&pdev->dev, |
1da177e4 | 4196 | skb->data, |
edbbb3ca | 4197 | buffer_info->length, |
b16f53be NN |
4198 | DMA_FROM_DEVICE); |
4199 | if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { | |
b5abb028 AB |
4200 | dev_kfree_skb(skb); |
4201 | buffer_info->skb = NULL; | |
4202 | buffer_info->dma = 0; | |
4203 | adapter->alloc_rx_buff_failed++; | |
4204 | break; /* while !buffer_info->skb */ | |
4205 | } | |
1da177e4 | 4206 | |
edbbb3ca JB |
4207 | /* |
4208 | * XXX if it was allocated cleanly it will never map to a | |
4209 | * boundary crossing | |
4210 | */ | |
4211 | ||
2648345f MC |
4212 | /* Fix for errata 23, can't cross 64kB boundary */ |
4213 | if (!e1000_check_64k_bound(adapter, | |
4214 | (void *)(unsigned long)buffer_info->dma, | |
4215 | adapter->rx_buffer_len)) { | |
feb8f478 ET |
4216 | e_err(rx_err, "dma align check failed: %u bytes at " |
4217 | "%p\n", adapter->rx_buffer_len, | |
675ad473 | 4218 | (void *)(unsigned long)buffer_info->dma); |
1da177e4 LT |
4219 | dev_kfree_skb(skb); |
4220 | buffer_info->skb = NULL; | |
4221 | ||
b16f53be | 4222 | dma_unmap_single(&pdev->dev, buffer_info->dma, |
1da177e4 | 4223 | adapter->rx_buffer_len, |
b16f53be | 4224 | DMA_FROM_DEVICE); |
679be3ba | 4225 | buffer_info->dma = 0; |
1da177e4 | 4226 | |
edbbb3ca | 4227 | adapter->alloc_rx_buff_failed++; |
1da177e4 LT |
4228 | break; /* while !buffer_info->skb */ |
4229 | } | |
1da177e4 LT |
4230 | rx_desc = E1000_RX_DESC(*rx_ring, i); |
4231 | rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
4232 | ||
96838a40 JB |
4233 | if (unlikely(++i == rx_ring->count)) |
4234 | i = 0; | |
1da177e4 LT |
4235 | buffer_info = &rx_ring->buffer_info[i]; |
4236 | } | |
4237 | ||
b92ff8ee JB |
4238 | if (likely(rx_ring->next_to_use != i)) { |
4239 | rx_ring->next_to_use = i; | |
4240 | if (unlikely(i-- == 0)) | |
4241 | i = (rx_ring->count - 1); | |
4242 | ||
4243 | /* Force memory writes to complete before letting h/w | |
4244 | * know there are new descriptors to fetch. (Only | |
4245 | * applicable for weak-ordered memory model archs, | |
4246 | * such as IA-64). */ | |
4247 | wmb(); | |
1dc32918 | 4248 | writel(i, hw->hw_addr + rx_ring->rdt); |
b92ff8ee | 4249 | } |
1da177e4 LT |
4250 | } |
4251 | ||
4252 | /** | |
4253 | * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers. | |
4254 | * @adapter: | |
4255 | **/ | |
4256 | ||
64798845 | 4257 | static void e1000_smartspeed(struct e1000_adapter *adapter) |
1da177e4 | 4258 | { |
1dc32918 | 4259 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
4260 | u16 phy_status; |
4261 | u16 phy_ctrl; | |
1da177e4 | 4262 | |
1dc32918 JP |
4263 | if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg || |
4264 | !(hw->autoneg_advertised & ADVERTISE_1000_FULL)) | |
1da177e4 LT |
4265 | return; |
4266 | ||
96838a40 | 4267 | if (adapter->smartspeed == 0) { |
1da177e4 LT |
4268 | /* If Master/Slave config fault is asserted twice, |
4269 | * we assume back-to-back */ | |
1dc32918 | 4270 | e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status); |
96838a40 | 4271 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1dc32918 | 4272 | e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status); |
96838a40 | 4273 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1dc32918 | 4274 | e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl); |
96838a40 | 4275 | if (phy_ctrl & CR_1000T_MS_ENABLE) { |
1da177e4 | 4276 | phy_ctrl &= ~CR_1000T_MS_ENABLE; |
1dc32918 | 4277 | e1000_write_phy_reg(hw, PHY_1000T_CTRL, |
1da177e4 LT |
4278 | phy_ctrl); |
4279 | adapter->smartspeed++; | |
1dc32918 JP |
4280 | if (!e1000_phy_setup_autoneg(hw) && |
4281 | !e1000_read_phy_reg(hw, PHY_CTRL, | |
1da177e4 LT |
4282 | &phy_ctrl)) { |
4283 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
4284 | MII_CR_RESTART_AUTO_NEG); | |
1dc32918 | 4285 | e1000_write_phy_reg(hw, PHY_CTRL, |
1da177e4 LT |
4286 | phy_ctrl); |
4287 | } | |
4288 | } | |
4289 | return; | |
96838a40 | 4290 | } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) { |
1da177e4 | 4291 | /* If still no link, perhaps using 2/3 pair cable */ |
1dc32918 | 4292 | e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl); |
1da177e4 | 4293 | phy_ctrl |= CR_1000T_MS_ENABLE; |
1dc32918 JP |
4294 | e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl); |
4295 | if (!e1000_phy_setup_autoneg(hw) && | |
4296 | !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) { | |
1da177e4 LT |
4297 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | |
4298 | MII_CR_RESTART_AUTO_NEG); | |
1dc32918 | 4299 | e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl); |
1da177e4 LT |
4300 | } |
4301 | } | |
4302 | /* Restart process after E1000_SMARTSPEED_MAX iterations */ | |
96838a40 | 4303 | if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX) |
1da177e4 LT |
4304 | adapter->smartspeed = 0; |
4305 | } | |
4306 | ||
4307 | /** | |
4308 | * e1000_ioctl - | |
4309 | * @netdev: | |
4310 | * @ifreq: | |
4311 | * @cmd: | |
4312 | **/ | |
4313 | ||
64798845 | 4314 | static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) |
1da177e4 LT |
4315 | { |
4316 | switch (cmd) { | |
4317 | case SIOCGMIIPHY: | |
4318 | case SIOCGMIIREG: | |
4319 | case SIOCSMIIREG: | |
4320 | return e1000_mii_ioctl(netdev, ifr, cmd); | |
4321 | default: | |
4322 | return -EOPNOTSUPP; | |
4323 | } | |
4324 | } | |
4325 | ||
4326 | /** | |
4327 | * e1000_mii_ioctl - | |
4328 | * @netdev: | |
4329 | * @ifreq: | |
4330 | * @cmd: | |
4331 | **/ | |
4332 | ||
64798845 JP |
4333 | static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, |
4334 | int cmd) | |
1da177e4 | 4335 | { |
60490fe0 | 4336 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 4337 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
4338 | struct mii_ioctl_data *data = if_mii(ifr); |
4339 | int retval; | |
406874a7 JP |
4340 | u16 mii_reg; |
4341 | u16 spddplx; | |
97876fc6 | 4342 | unsigned long flags; |
1da177e4 | 4343 | |
1dc32918 | 4344 | if (hw->media_type != e1000_media_type_copper) |
1da177e4 LT |
4345 | return -EOPNOTSUPP; |
4346 | ||
4347 | switch (cmd) { | |
4348 | case SIOCGMIIPHY: | |
1dc32918 | 4349 | data->phy_id = hw->phy_addr; |
1da177e4 LT |
4350 | break; |
4351 | case SIOCGMIIREG: | |
97876fc6 | 4352 | spin_lock_irqsave(&adapter->stats_lock, flags); |
1dc32918 | 4353 | if (e1000_read_phy_reg(hw, data->reg_num & 0x1F, |
97876fc6 MC |
4354 | &data->val_out)) { |
4355 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4356 | return -EIO; |
97876fc6 MC |
4357 | } |
4358 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 LT |
4359 | break; |
4360 | case SIOCSMIIREG: | |
96838a40 | 4361 | if (data->reg_num & ~(0x1F)) |
1da177e4 LT |
4362 | return -EFAULT; |
4363 | mii_reg = data->val_in; | |
97876fc6 | 4364 | spin_lock_irqsave(&adapter->stats_lock, flags); |
1dc32918 | 4365 | if (e1000_write_phy_reg(hw, data->reg_num, |
97876fc6 MC |
4366 | mii_reg)) { |
4367 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4368 | return -EIO; |
97876fc6 | 4369 | } |
f0163ac4 | 4370 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
1dc32918 | 4371 | if (hw->media_type == e1000_media_type_copper) { |
1da177e4 LT |
4372 | switch (data->reg_num) { |
4373 | case PHY_CTRL: | |
96838a40 | 4374 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4375 | break; |
96838a40 | 4376 | if (mii_reg & MII_CR_AUTO_NEG_EN) { |
1dc32918 JP |
4377 | hw->autoneg = 1; |
4378 | hw->autoneg_advertised = 0x2F; | |
1da177e4 LT |
4379 | } else { |
4380 | if (mii_reg & 0x40) | |
4381 | spddplx = SPEED_1000; | |
4382 | else if (mii_reg & 0x2000) | |
4383 | spddplx = SPEED_100; | |
4384 | else | |
4385 | spddplx = SPEED_10; | |
4386 | spddplx += (mii_reg & 0x100) | |
cb764326 JK |
4387 | ? DUPLEX_FULL : |
4388 | DUPLEX_HALF; | |
1da177e4 LT |
4389 | retval = e1000_set_spd_dplx(adapter, |
4390 | spddplx); | |
f0163ac4 | 4391 | if (retval) |
1da177e4 LT |
4392 | return retval; |
4393 | } | |
2db10a08 AK |
4394 | if (netif_running(adapter->netdev)) |
4395 | e1000_reinit_locked(adapter); | |
4396 | else | |
1da177e4 LT |
4397 | e1000_reset(adapter); |
4398 | break; | |
4399 | case M88E1000_PHY_SPEC_CTRL: | |
4400 | case M88E1000_EXT_PHY_SPEC_CTRL: | |
1dc32918 | 4401 | if (e1000_phy_reset(hw)) |
1da177e4 LT |
4402 | return -EIO; |
4403 | break; | |
4404 | } | |
4405 | } else { | |
4406 | switch (data->reg_num) { | |
4407 | case PHY_CTRL: | |
96838a40 | 4408 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4409 | break; |
2db10a08 AK |
4410 | if (netif_running(adapter->netdev)) |
4411 | e1000_reinit_locked(adapter); | |
4412 | else | |
1da177e4 LT |
4413 | e1000_reset(adapter); |
4414 | break; | |
4415 | } | |
4416 | } | |
4417 | break; | |
4418 | default: | |
4419 | return -EOPNOTSUPP; | |
4420 | } | |
4421 | return E1000_SUCCESS; | |
4422 | } | |
4423 | ||
64798845 | 4424 | void e1000_pci_set_mwi(struct e1000_hw *hw) |
1da177e4 LT |
4425 | { |
4426 | struct e1000_adapter *adapter = hw->back; | |
2648345f | 4427 | int ret_val = pci_set_mwi(adapter->pdev); |
1da177e4 | 4428 | |
96838a40 | 4429 | if (ret_val) |
feb8f478 | 4430 | e_err(probe, "Error in setting MWI\n"); |
1da177e4 LT |
4431 | } |
4432 | ||
64798845 | 4433 | void e1000_pci_clear_mwi(struct e1000_hw *hw) |
1da177e4 LT |
4434 | { |
4435 | struct e1000_adapter *adapter = hw->back; | |
4436 | ||
4437 | pci_clear_mwi(adapter->pdev); | |
4438 | } | |
4439 | ||
64798845 | 4440 | int e1000_pcix_get_mmrbc(struct e1000_hw *hw) |
007755eb PO |
4441 | { |
4442 | struct e1000_adapter *adapter = hw->back; | |
4443 | return pcix_get_mmrbc(adapter->pdev); | |
4444 | } | |
4445 | ||
64798845 | 4446 | void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc) |
007755eb PO |
4447 | { |
4448 | struct e1000_adapter *adapter = hw->back; | |
4449 | pcix_set_mmrbc(adapter->pdev, mmrbc); | |
4450 | } | |
4451 | ||
64798845 | 4452 | void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value) |
1da177e4 LT |
4453 | { |
4454 | outl(value, port); | |
4455 | } | |
4456 | ||
64798845 JP |
4457 | static void e1000_vlan_rx_register(struct net_device *netdev, |
4458 | struct vlan_group *grp) | |
1da177e4 | 4459 | { |
60490fe0 | 4460 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 4461 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 4462 | u32 ctrl, rctl; |
1da177e4 | 4463 | |
9150b76a JB |
4464 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
4465 | e1000_irq_disable(adapter); | |
1da177e4 LT |
4466 | adapter->vlgrp = grp; |
4467 | ||
96838a40 | 4468 | if (grp) { |
1da177e4 | 4469 | /* enable VLAN tag insert/strip */ |
1dc32918 | 4470 | ctrl = er32(CTRL); |
1da177e4 | 4471 | ctrl |= E1000_CTRL_VME; |
1dc32918 | 4472 | ew32(CTRL, ctrl); |
1da177e4 | 4473 | |
1532ecea JB |
4474 | /* enable VLAN receive filtering */ |
4475 | rctl = er32(RCTL); | |
4476 | rctl &= ~E1000_RCTL_CFIEN; | |
4477 | if (!(netdev->flags & IFF_PROMISC)) | |
4478 | rctl |= E1000_RCTL_VFE; | |
4479 | ew32(RCTL, rctl); | |
4480 | e1000_update_mng_vlan(adapter); | |
1da177e4 LT |
4481 | } else { |
4482 | /* disable VLAN tag insert/strip */ | |
1dc32918 | 4483 | ctrl = er32(CTRL); |
1da177e4 | 4484 | ctrl &= ~E1000_CTRL_VME; |
1dc32918 | 4485 | ew32(CTRL, ctrl); |
1da177e4 | 4486 | |
1532ecea JB |
4487 | /* disable VLAN receive filtering */ |
4488 | rctl = er32(RCTL); | |
4489 | rctl &= ~E1000_RCTL_VFE; | |
4490 | ew32(RCTL, rctl); | |
fd38d7a0 | 4491 | |
1532ecea | 4492 | if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) { |
120a5d0d | 4493 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); |
1532ecea | 4494 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; |
cd94dd0b | 4495 | } |
1da177e4 LT |
4496 | } |
4497 | ||
9150b76a JB |
4498 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
4499 | e1000_irq_enable(adapter); | |
1da177e4 LT |
4500 | } |
4501 | ||
64798845 | 4502 | static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid) |
1da177e4 | 4503 | { |
60490fe0 | 4504 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 4505 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 4506 | u32 vfta, index; |
96838a40 | 4507 | |
1dc32918 | 4508 | if ((hw->mng_cookie.status & |
96838a40 JB |
4509 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && |
4510 | (vid == adapter->mng_vlan_id)) | |
2d7edb92 | 4511 | return; |
1da177e4 LT |
4512 | /* add VID to filter table */ |
4513 | index = (vid >> 5) & 0x7F; | |
1dc32918 | 4514 | vfta = E1000_READ_REG_ARRAY(hw, VFTA, index); |
1da177e4 | 4515 | vfta |= (1 << (vid & 0x1F)); |
1dc32918 | 4516 | e1000_write_vfta(hw, index, vfta); |
1da177e4 LT |
4517 | } |
4518 | ||
64798845 | 4519 | static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) |
1da177e4 | 4520 | { |
60490fe0 | 4521 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 4522 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 4523 | u32 vfta, index; |
1da177e4 | 4524 | |
9150b76a JB |
4525 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
4526 | e1000_irq_disable(adapter); | |
5c15bdec | 4527 | vlan_group_set_device(adapter->vlgrp, vid, NULL); |
9150b76a JB |
4528 | if (!test_bit(__E1000_DOWN, &adapter->flags)) |
4529 | e1000_irq_enable(adapter); | |
1da177e4 LT |
4530 | |
4531 | /* remove VID from filter table */ | |
4532 | index = (vid >> 5) & 0x7F; | |
1dc32918 | 4533 | vfta = E1000_READ_REG_ARRAY(hw, VFTA, index); |
1da177e4 | 4534 | vfta &= ~(1 << (vid & 0x1F)); |
1dc32918 | 4535 | e1000_write_vfta(hw, index, vfta); |
1da177e4 LT |
4536 | } |
4537 | ||
64798845 | 4538 | static void e1000_restore_vlan(struct e1000_adapter *adapter) |
1da177e4 LT |
4539 | { |
4540 | e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp); | |
4541 | ||
96838a40 | 4542 | if (adapter->vlgrp) { |
406874a7 | 4543 | u16 vid; |
96838a40 | 4544 | for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { |
5c15bdec | 4545 | if (!vlan_group_get_device(adapter->vlgrp, vid)) |
1da177e4 LT |
4546 | continue; |
4547 | e1000_vlan_rx_add_vid(adapter->netdev, vid); | |
4548 | } | |
4549 | } | |
4550 | } | |
4551 | ||
64798845 | 4552 | int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx) |
1da177e4 | 4553 | { |
1dc32918 JP |
4554 | struct e1000_hw *hw = &adapter->hw; |
4555 | ||
4556 | hw->autoneg = 0; | |
1da177e4 | 4557 | |
6921368f | 4558 | /* Fiber NICs only allow 1000 gbps Full duplex */ |
1dc32918 | 4559 | if ((hw->media_type == e1000_media_type_fiber) && |
6921368f | 4560 | spddplx != (SPEED_1000 + DUPLEX_FULL)) { |
feb8f478 | 4561 | e_err(probe, "Unsupported Speed/Duplex configuration\n"); |
6921368f MC |
4562 | return -EINVAL; |
4563 | } | |
4564 | ||
96838a40 | 4565 | switch (spddplx) { |
1da177e4 | 4566 | case SPEED_10 + DUPLEX_HALF: |
1dc32918 | 4567 | hw->forced_speed_duplex = e1000_10_half; |
1da177e4 LT |
4568 | break; |
4569 | case SPEED_10 + DUPLEX_FULL: | |
1dc32918 | 4570 | hw->forced_speed_duplex = e1000_10_full; |
1da177e4 LT |
4571 | break; |
4572 | case SPEED_100 + DUPLEX_HALF: | |
1dc32918 | 4573 | hw->forced_speed_duplex = e1000_100_half; |
1da177e4 LT |
4574 | break; |
4575 | case SPEED_100 + DUPLEX_FULL: | |
1dc32918 | 4576 | hw->forced_speed_duplex = e1000_100_full; |
1da177e4 LT |
4577 | break; |
4578 | case SPEED_1000 + DUPLEX_FULL: | |
1dc32918 JP |
4579 | hw->autoneg = 1; |
4580 | hw->autoneg_advertised = ADVERTISE_1000_FULL; | |
1da177e4 LT |
4581 | break; |
4582 | case SPEED_1000 + DUPLEX_HALF: /* not supported */ | |
4583 | default: | |
feb8f478 | 4584 | e_err(probe, "Unsupported Speed/Duplex configuration\n"); |
1da177e4 LT |
4585 | return -EINVAL; |
4586 | } | |
4587 | return 0; | |
4588 | } | |
4589 | ||
b43fcd7d | 4590 | static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake) |
1da177e4 LT |
4591 | { |
4592 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 4593 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 4594 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
4595 | u32 ctrl, ctrl_ext, rctl, status; |
4596 | u32 wufc = adapter->wol; | |
6fdfef16 | 4597 | #ifdef CONFIG_PM |
240b1710 | 4598 | int retval = 0; |
6fdfef16 | 4599 | #endif |
1da177e4 LT |
4600 | |
4601 | netif_device_detach(netdev); | |
4602 | ||
2db10a08 AK |
4603 | if (netif_running(netdev)) { |
4604 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); | |
1da177e4 | 4605 | e1000_down(adapter); |
2db10a08 | 4606 | } |
1da177e4 | 4607 | |
2f82665f | 4608 | #ifdef CONFIG_PM |
1d33e9c6 | 4609 | retval = pci_save_state(pdev); |
2f82665f JB |
4610 | if (retval) |
4611 | return retval; | |
4612 | #endif | |
4613 | ||
1dc32918 | 4614 | status = er32(STATUS); |
96838a40 | 4615 | if (status & E1000_STATUS_LU) |
1da177e4 LT |
4616 | wufc &= ~E1000_WUFC_LNKC; |
4617 | ||
96838a40 | 4618 | if (wufc) { |
1da177e4 | 4619 | e1000_setup_rctl(adapter); |
db0ce50d | 4620 | e1000_set_rx_mode(netdev); |
1da177e4 LT |
4621 | |
4622 | /* turn on all-multi mode if wake on multicast is enabled */ | |
120cd576 | 4623 | if (wufc & E1000_WUFC_MC) { |
1dc32918 | 4624 | rctl = er32(RCTL); |
1da177e4 | 4625 | rctl |= E1000_RCTL_MPE; |
1dc32918 | 4626 | ew32(RCTL, rctl); |
1da177e4 LT |
4627 | } |
4628 | ||
1dc32918 JP |
4629 | if (hw->mac_type >= e1000_82540) { |
4630 | ctrl = er32(CTRL); | |
1da177e4 LT |
4631 | /* advertise wake from D3Cold */ |
4632 | #define E1000_CTRL_ADVD3WUC 0x00100000 | |
4633 | /* phy power management enable */ | |
4634 | #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 | |
4635 | ctrl |= E1000_CTRL_ADVD3WUC | | |
4636 | E1000_CTRL_EN_PHY_PWR_MGMT; | |
1dc32918 | 4637 | ew32(CTRL, ctrl); |
1da177e4 LT |
4638 | } |
4639 | ||
1dc32918 | 4640 | if (hw->media_type == e1000_media_type_fiber || |
1532ecea | 4641 | hw->media_type == e1000_media_type_internal_serdes) { |
1da177e4 | 4642 | /* keep the laser running in D3 */ |
1dc32918 | 4643 | ctrl_ext = er32(CTRL_EXT); |
1da177e4 | 4644 | ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA; |
1dc32918 | 4645 | ew32(CTRL_EXT, ctrl_ext); |
1da177e4 LT |
4646 | } |
4647 | ||
1dc32918 JP |
4648 | ew32(WUC, E1000_WUC_PME_EN); |
4649 | ew32(WUFC, wufc); | |
1da177e4 | 4650 | } else { |
1dc32918 JP |
4651 | ew32(WUC, 0); |
4652 | ew32(WUFC, 0); | |
1da177e4 LT |
4653 | } |
4654 | ||
0fccd0e9 JG |
4655 | e1000_release_manageability(adapter); |
4656 | ||
b43fcd7d RW |
4657 | *enable_wake = !!wufc; |
4658 | ||
0fccd0e9 | 4659 | /* make sure adapter isn't asleep if manageability is enabled */ |
b43fcd7d RW |
4660 | if (adapter->en_mng_pt) |
4661 | *enable_wake = true; | |
1da177e4 | 4662 | |
edd106fc AK |
4663 | if (netif_running(netdev)) |
4664 | e1000_free_irq(adapter); | |
4665 | ||
1da177e4 | 4666 | pci_disable_device(pdev); |
240b1710 | 4667 | |
1da177e4 LT |
4668 | return 0; |
4669 | } | |
4670 | ||
2f82665f | 4671 | #ifdef CONFIG_PM |
b43fcd7d RW |
4672 | static int e1000_suspend(struct pci_dev *pdev, pm_message_t state) |
4673 | { | |
4674 | int retval; | |
4675 | bool wake; | |
4676 | ||
4677 | retval = __e1000_shutdown(pdev, &wake); | |
4678 | if (retval) | |
4679 | return retval; | |
4680 | ||
4681 | if (wake) { | |
4682 | pci_prepare_to_sleep(pdev); | |
4683 | } else { | |
4684 | pci_wake_from_d3(pdev, false); | |
4685 | pci_set_power_state(pdev, PCI_D3hot); | |
4686 | } | |
4687 | ||
4688 | return 0; | |
4689 | } | |
4690 | ||
64798845 | 4691 | static int e1000_resume(struct pci_dev *pdev) |
1da177e4 LT |
4692 | { |
4693 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 4694 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 4695 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 4696 | u32 err; |
1da177e4 | 4697 | |
d0e027db | 4698 | pci_set_power_state(pdev, PCI_D0); |
1d33e9c6 | 4699 | pci_restore_state(pdev); |
dbb5aaeb | 4700 | pci_save_state(pdev); |
81250297 TI |
4701 | |
4702 | if (adapter->need_ioport) | |
4703 | err = pci_enable_device(pdev); | |
4704 | else | |
4705 | err = pci_enable_device_mem(pdev); | |
c7be73bc | 4706 | if (err) { |
675ad473 | 4707 | pr_err("Cannot enable PCI device from suspend\n"); |
3d1dd8cb AK |
4708 | return err; |
4709 | } | |
a4cb847d | 4710 | pci_set_master(pdev); |
1da177e4 | 4711 | |
d0e027db AK |
4712 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4713 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 | 4714 | |
c7be73bc JP |
4715 | if (netif_running(netdev)) { |
4716 | err = e1000_request_irq(adapter); | |
4717 | if (err) | |
4718 | return err; | |
4719 | } | |
edd106fc AK |
4720 | |
4721 | e1000_power_up_phy(adapter); | |
1da177e4 | 4722 | e1000_reset(adapter); |
1dc32918 | 4723 | ew32(WUS, ~0); |
1da177e4 | 4724 | |
0fccd0e9 JG |
4725 | e1000_init_manageability(adapter); |
4726 | ||
96838a40 | 4727 | if (netif_running(netdev)) |
1da177e4 LT |
4728 | e1000_up(adapter); |
4729 | ||
4730 | netif_device_attach(netdev); | |
4731 | ||
1da177e4 LT |
4732 | return 0; |
4733 | } | |
4734 | #endif | |
c653e635 AK |
4735 | |
4736 | static void e1000_shutdown(struct pci_dev *pdev) | |
4737 | { | |
b43fcd7d RW |
4738 | bool wake; |
4739 | ||
4740 | __e1000_shutdown(pdev, &wake); | |
4741 | ||
4742 | if (system_state == SYSTEM_POWER_OFF) { | |
4743 | pci_wake_from_d3(pdev, wake); | |
4744 | pci_set_power_state(pdev, PCI_D3hot); | |
4745 | } | |
c653e635 AK |
4746 | } |
4747 | ||
1da177e4 LT |
4748 | #ifdef CONFIG_NET_POLL_CONTROLLER |
4749 | /* | |
4750 | * Polling 'interrupt' - used by things like netconsole to send skbs | |
4751 | * without having to re-enable interrupts. It's not called while | |
4752 | * the interrupt routine is executing. | |
4753 | */ | |
64798845 | 4754 | static void e1000_netpoll(struct net_device *netdev) |
1da177e4 | 4755 | { |
60490fe0 | 4756 | struct e1000_adapter *adapter = netdev_priv(netdev); |
d3d9e484 | 4757 | |
1da177e4 | 4758 | disable_irq(adapter->pdev->irq); |
7d12e780 | 4759 | e1000_intr(adapter->pdev->irq, netdev); |
1da177e4 LT |
4760 | enable_irq(adapter->pdev->irq); |
4761 | } | |
4762 | #endif | |
4763 | ||
9026729b AK |
4764 | /** |
4765 | * e1000_io_error_detected - called when PCI error is detected | |
4766 | * @pdev: Pointer to PCI device | |
120a5d0d | 4767 | * @state: The current pci connection state |
9026729b AK |
4768 | * |
4769 | * This function is called after a PCI bus error affecting | |
4770 | * this device has been detected. | |
4771 | */ | |
64798845 JP |
4772 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, |
4773 | pci_channel_state_t state) | |
9026729b AK |
4774 | { |
4775 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4cf1653a | 4776 | struct e1000_adapter *adapter = netdev_priv(netdev); |
9026729b AK |
4777 | |
4778 | netif_device_detach(netdev); | |
4779 | ||
eab63302 AD |
4780 | if (state == pci_channel_io_perm_failure) |
4781 | return PCI_ERS_RESULT_DISCONNECT; | |
4782 | ||
9026729b AK |
4783 | if (netif_running(netdev)) |
4784 | e1000_down(adapter); | |
72e8d6bb | 4785 | pci_disable_device(pdev); |
9026729b AK |
4786 | |
4787 | /* Request a slot slot reset. */ | |
4788 | return PCI_ERS_RESULT_NEED_RESET; | |
4789 | } | |
4790 | ||
4791 | /** | |
4792 | * e1000_io_slot_reset - called after the pci bus has been reset. | |
4793 | * @pdev: Pointer to PCI device | |
4794 | * | |
4795 | * Restart the card from scratch, as if from a cold-boot. Implementation | |
4796 | * resembles the first-half of the e1000_resume routine. | |
4797 | */ | |
4798 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) | |
4799 | { | |
4800 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4cf1653a | 4801 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 4802 | struct e1000_hw *hw = &adapter->hw; |
81250297 | 4803 | int err; |
9026729b | 4804 | |
81250297 TI |
4805 | if (adapter->need_ioport) |
4806 | err = pci_enable_device(pdev); | |
4807 | else | |
4808 | err = pci_enable_device_mem(pdev); | |
4809 | if (err) { | |
675ad473 | 4810 | pr_err("Cannot re-enable PCI device after reset.\n"); |
9026729b AK |
4811 | return PCI_ERS_RESULT_DISCONNECT; |
4812 | } | |
4813 | pci_set_master(pdev); | |
4814 | ||
dbf38c94 LV |
4815 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4816 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
9026729b | 4817 | |
9026729b | 4818 | e1000_reset(adapter); |
1dc32918 | 4819 | ew32(WUS, ~0); |
9026729b AK |
4820 | |
4821 | return PCI_ERS_RESULT_RECOVERED; | |
4822 | } | |
4823 | ||
4824 | /** | |
4825 | * e1000_io_resume - called when traffic can start flowing again. | |
4826 | * @pdev: Pointer to PCI device | |
4827 | * | |
4828 | * This callback is called when the error recovery driver tells us that | |
4829 | * its OK to resume normal operation. Implementation resembles the | |
4830 | * second-half of the e1000_resume routine. | |
4831 | */ | |
4832 | static void e1000_io_resume(struct pci_dev *pdev) | |
4833 | { | |
4834 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4cf1653a | 4835 | struct e1000_adapter *adapter = netdev_priv(netdev); |
0fccd0e9 JG |
4836 | |
4837 | e1000_init_manageability(adapter); | |
9026729b AK |
4838 | |
4839 | if (netif_running(netdev)) { | |
4840 | if (e1000_up(adapter)) { | |
675ad473 | 4841 | pr_info("can't bring device back up after reset\n"); |
9026729b AK |
4842 | return; |
4843 | } | |
4844 | } | |
4845 | ||
4846 | netif_device_attach(netdev); | |
9026729b AK |
4847 | } |
4848 | ||
1da177e4 | 4849 | /* e1000_main.c */ |