projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
cxgb2: convert to net_device_ops
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
c3570acb 34#define DRV_VERSION "7.3.20-k3-NAPI"
abec42a4
SH		 35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
45static struct pci_device_id e1000_pci_tbl[] = {
46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN		 88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN		 93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT		 125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4
LT		 127static void e1000_82547_tx_fifo_stall(unsigned long data);
128static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
129static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
130static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
131static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 132static irqreturn_t e1000_intr(int irq, void *data);
9ac98284 133static irqreturn_t e1000_intr_msi(int irq, void *data);
c3033b01
JP		 134static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
bea3348e 136static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 137static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
581d708e 140static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 141 struct e1000_rx_ring *rx_ring,
142 int cleaned_count);
1da177e4
LT		 143static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
144static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
145 int cmd);
1da177e4
LT		 146static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
147static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
148static void e1000_tx_timeout(struct net_device *dev);
65f27f38 149static void e1000_reset_task(struct work_struct *work);
1da177e4 150static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 151static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
152 struct sk_buff *skb);
1da177e4
LT		 153
154static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP		 155static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
156static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 157static void e1000_restore_vlan(struct e1000_adapter *adapter);
158
977e74b5 159static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 160#ifdef CONFIG_PM
1da177e4
LT		 161static int e1000_resume(struct pci_dev *pdev);
162#endif
c653e635 163static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 164
165#ifdef CONFIG_NET_POLL_CONTROLLER
166/* for netdump / net console */
167static void e1000_netpoll (struct net_device *netdev);
168#endif
169
1f753861
JB		 170#define COPYBREAK_DEFAULT 256
171static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
172module_param(copybreak, uint, 0644);
173MODULE_PARM_DESC(copybreak,
174 "Maximum size of packet that is copied to a new buffer on receive");
175
9026729b
AK		 176static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
177 pci_channel_state_t state);
178static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
179static void e1000_io_resume(struct pci_dev *pdev);
180
181static struct pci_error_handlers e1000_err_handler = {
182 .error_detected = e1000_io_error_detected,
183 .slot_reset = e1000_io_slot_reset,
184 .resume = e1000_io_resume,
185};
24025e4e 186
1da177e4
LT		 187static struct pci_driver e1000_driver = {
188 .name = e1000_driver_name,
189 .id_table = e1000_pci_tbl,
190 .probe = e1000_probe,
191 .remove = __devexit_p(e1000_remove),
c4e24f01 192#ifdef CONFIG_PM
1da177e4 193 /* Power Managment Hooks */
1da177e4 194 .suspend = e1000_suspend,
c653e635 195 .resume = e1000_resume,
1da177e4 196#endif
9026729b
AK		 197 .shutdown = e1000_shutdown,
198 .err_handler = &e1000_err_handler
1da177e4
LT		 199};
200
201MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
202MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
203MODULE_LICENSE("GPL");
204MODULE_VERSION(DRV_VERSION);
205
206static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
207module_param(debug, int, 0);
208MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
209
210/**
211 * e1000_init_module - Driver Registration Routine
212 *
213 * e1000_init_module is the first routine called when the driver is
214 * loaded. All it does is register with the PCI subsystem.
215 **/
216
64798845 217static int __init e1000_init_module(void)
1da177e4
LT		 218{
219 int ret;
220 printk(KERN_INFO "%s - version %s\n",
221 e1000_driver_string, e1000_driver_version);
222
223 printk(KERN_INFO "%s\n", e1000_copyright);
224
29917620 225 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 226 if (copybreak != COPYBREAK_DEFAULT) {
227 if (copybreak == 0)
228 printk(KERN_INFO "e1000: copybreak disabled\n");
229 else
230 printk(KERN_INFO "e1000: copybreak enabled for "
231 "packets <= %u bytes\n", copybreak);
232 }
1da177e4
LT		 233 return ret;
234}
235
236module_init(e1000_init_module);
237
238/**
239 * e1000_exit_module - Driver Exit Cleanup Routine
240 *
241 * e1000_exit_module is called just before the driver is removed
242 * from memory.
243 **/
244
64798845 245static void __exit e1000_exit_module(void)
1da177e4 246{
1da177e4
LT		 247 pci_unregister_driver(&e1000_driver);
248}
249
250module_exit(e1000_exit_module);
251
2db10a08
AK		 252static int e1000_request_irq(struct e1000_adapter *adapter)
253{
1dc32918 254 struct e1000_hw *hw = &adapter->hw;
2db10a08 255 struct net_device *netdev = adapter->netdev;
3e18826c 256 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 257 int irq_flags = IRQF_SHARED;
258 int err;
2db10a08 259
1dc32918 260 if (hw->mac_type >= e1000_82571) {
e94bd23f
AK		 261 adapter->have_msi = !pci_enable_msi(adapter->pdev);
262 if (adapter->have_msi) {
3e18826c 263 handler = e1000_intr_msi;
e94bd23f 264 irq_flags = 0;
2db10a08
AK		 265 }
266 }
e94bd23f
AK		 267
268 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
269 netdev);
270 if (err) {
271 if (adapter->have_msi)
272 pci_disable_msi(adapter->pdev);
2db10a08
AK		 273 DPRINTK(PROBE, ERR,
274 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 275 }
2db10a08
AK		 276
277 return err;
278}
279
280static void e1000_free_irq(struct e1000_adapter *adapter)
281{
282 struct net_device *netdev = adapter->netdev;
283
284 free_irq(adapter->pdev->irq, netdev);
285
2db10a08
AK		 286 if (adapter->have_msi)
287 pci_disable_msi(adapter->pdev);
2db10a08
AK		 288}
289
1da177e4
LT		 290/**
291 * e1000_irq_disable - Mask off interrupt generation on the NIC
292 * @adapter: board private structure
293 **/
294
64798845 295static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 296{
1dc32918
JP		 297 struct e1000_hw *hw = &adapter->hw;
298
299 ew32(IMC, ~0);
300 E1000_WRITE_FLUSH();
1da177e4
LT		 301 synchronize_irq(adapter->pdev->irq);
302}
303
304/**
305 * e1000_irq_enable - Enable default interrupt generation settings
306 * @adapter: board private structure
307 **/
308
64798845 309static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 310{
1dc32918
JP		 311 struct e1000_hw *hw = &adapter->hw;
312
313 ew32(IMS, IMS_ENABLE_MASK);
314 E1000_WRITE_FLUSH();
1da177e4 315}
3ad2cc67 316
64798845 317static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 318{
1dc32918 319 struct e1000_hw *hw = &adapter->hw;
2d7edb92 320 struct net_device *netdev = adapter->netdev;
1dc32918 321 u16 vid = hw->mng_cookie.vlan_id;
406874a7 322 u16 old_vid = adapter->mng_vlan_id;
96838a40 323 if (adapter->vlgrp) {
5c15bdec 324 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 325 if (hw->mng_cookie.status &
2d7edb92
MC		 326 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
327 e1000_vlan_rx_add_vid(netdev, vid);
328 adapter->mng_vlan_id = vid;
329 } else
330 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 331
406874a7 332 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 333 (vid != old_vid) &&
5c15bdec 334 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 335 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 336 } else
337 adapter->mng_vlan_id = vid;
2d7edb92
MC		 338 }
339}
b55ccb35
JK		 340
341/**
342 * e1000_release_hw_control - release control of the h/w to f/w
343 * @adapter: address of board private structure
344 *
345 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
346 * For ASF and Pass Through versions of f/w this means that the
347 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 348 * of the f/w this means that the network i/f is closed.
76c224bc 349 *
b55ccb35
JK		 350 **/
351
64798845 352static void e1000_release_hw_control(struct e1000_adapter *adapter)
b55ccb35 353{
406874a7
JP		 354 u32 ctrl_ext;
355 u32 swsm;
1dc32918 356 struct e1000_hw *hw = &adapter->hw;
b55ccb35
JK		 357
358 /* Let firmware taken over control of h/w */
1dc32918 359 switch (hw->mac_type) {
b55ccb35 360 case e1000_82573:
1dc32918
JP		 361 swsm = er32(SWSM);
362 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
31d76442
BA		 363 break;
364 case e1000_82571:
365 case e1000_82572:
366 case e1000_80003es2lan:
cd94dd0b 367 case e1000_ich8lan:
1dc32918
JP		 368 ctrl_ext = er32(CTRL_EXT);
369 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 370 break;
b55ccb35
JK		 371 default:
372 break;
373 }
374}
375
376/**
377 * e1000_get_hw_control - get control of the h/w from f/w
378 * @adapter: address of board private structure
379 *
380 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 381 * For ASF and Pass Through versions of f/w this means that
382 * the driver is loaded. For AMT version (only with 82573)
90fb5135 383 * of the f/w this means that the network i/f is open.
76c224bc 384 *
b55ccb35
JK		 385 **/
386
64798845 387static void e1000_get_hw_control(struct e1000_adapter *adapter)
b55ccb35 388{
406874a7
JP		 389 u32 ctrl_ext;
390 u32 swsm;
1dc32918 391 struct e1000_hw *hw = &adapter->hw;
90fb5135 392
b55ccb35 393 /* Let firmware know the driver has taken over */
1dc32918 394 switch (hw->mac_type) {
b55ccb35 395 case e1000_82573:
1dc32918
JP		 396 swsm = er32(SWSM);
397 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
b55ccb35 398 break;
31d76442
BA		 399 case e1000_82571:
400 case e1000_82572:
401 case e1000_80003es2lan:
cd94dd0b 402 case e1000_ich8lan:
1dc32918
JP		 403 ctrl_ext = er32(CTRL_EXT);
404 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 405 break;
b55ccb35
JK		 406 default:
407 break;
408 }
409}
410
64798845 411static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 412{
1dc32918
JP		 413 struct e1000_hw *hw = &adapter->hw;
414
0fccd0e9 415 if (adapter->en_mng_pt) {
1dc32918 416 u32 manc = er32(MANC);
0fccd0e9
JG		 417
418 /* disable hardware interception of ARP */
419 manc &= ~(E1000_MANC_ARP_EN);
420
421 /* enable receiving management packets to the host */
422 /* this will probably generate destination unreachable messages
423 * from the host OS, but the packets will be handled on SMBUS */
1dc32918
JP		 424 if (hw->has_manc2h) {
425 u32 manc2h = er32(MANC2H);
0fccd0e9
JG		 426
427 manc |= E1000_MANC_EN_MNG2HOST;
428#define E1000_MNG2HOST_PORT_623 (1 << 5)
429#define E1000_MNG2HOST_PORT_664 (1 << 6)
430 manc2h |= E1000_MNG2HOST_PORT_623;
431 manc2h |= E1000_MNG2HOST_PORT_664;
1dc32918 432 ew32(MANC2H, manc2h);
0fccd0e9
JG		 433 }
434
1dc32918 435 ew32(MANC, manc);
0fccd0e9
JG		 436 }
437}
438
64798845 439static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 440{
1dc32918
JP		 441 struct e1000_hw *hw = &adapter->hw;
442
0fccd0e9 443 if (adapter->en_mng_pt) {
1dc32918 444 u32 manc = er32(MANC);
0fccd0e9
JG		 445
446 /* re-enable hardware interception of ARP */
447 manc |= E1000_MANC_ARP_EN;
448
1dc32918 449 if (hw->has_manc2h)
0fccd0e9
JG		 450 manc &= ~E1000_MANC_EN_MNG2HOST;
451
452 /* don't explicitly have to mess with MANC2H since
453 * MANC has an enable disable that gates MANC2H */
454
1dc32918 455 ew32(MANC, manc);
0fccd0e9
JG		 456 }
457}
458
e0aac5a2
AK		 459/**
460 * e1000_configure - configure the hardware for RX and TX
461 * @adapter = private board structure
462 **/
463static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 464{
465 struct net_device *netdev = adapter->netdev;
2db10a08 466 int i;
1da177e4 467
db0ce50d 468 e1000_set_rx_mode(netdev);
1da177e4
LT		 469
470 e1000_restore_vlan(adapter);
0fccd0e9 471 e1000_init_manageability(adapter);
1da177e4
LT		 472
473 e1000_configure_tx(adapter);
474 e1000_setup_rctl(adapter);
475 e1000_configure_rx(adapter);
72d64a43
JK		 476 /* call E1000_DESC_UNUSED which always leaves
477 * at least 1 descriptor unused to make sure
478 * next_to_use != next_to_clean */
f56799ea 479 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 480 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 481 adapter->alloc_rx_buf(adapter, ring,
482 E1000_DESC_UNUSED(ring));
f56799ea 483 }
1da177e4 484
7bfa4816 485 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 486}
487
488int e1000_up(struct e1000_adapter *adapter)
489{
1dc32918
JP		 490 struct e1000_hw *hw = &adapter->hw;
491
e0aac5a2
AK		 492 /* hardware has been reset, we need to reload some things */
493 e1000_configure(adapter);
494
495 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 496
bea3348e 497 napi_enable(&adapter->napi);
c3570acb 498
5de55624
MC		 499 e1000_irq_enable(adapter);
500
79f3d399 501 /* fire a link change interrupt to start the watchdog */
1dc32918 502 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 503 return 0;
504}
505
79f05bf0
AK		 506/**
507 * e1000_power_up_phy - restore link in case the phy was powered down
508 * @adapter: address of board private structure
509 *
510 * The phy may be powered down to save power and turn off link when the
511 * driver is unloaded and wake on lan is not enabled (among others)
512 * *** this routine MUST be followed by a call to e1000_reset ***
513 *
514 **/
515
d658266e 516void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 517{
1dc32918 518 struct e1000_hw *hw = &adapter->hw;
406874a7 519 u16 mii_reg = 0;
79f05bf0
AK		 520
521 /* Just clear the power down bit to wake the phy back up */
1dc32918 522 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 523 /* according to the manual, the phy will retain its
524 * settings across a power-down/up cycle */
1dc32918 525 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 526 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 527 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 528 }
529}
530
531static void e1000_power_down_phy(struct e1000_adapter *adapter)
532{
1dc32918
JP		 533 struct e1000_hw *hw = &adapter->hw;
534
61c2505f 535 /* Power down the PHY so no link is implied when interface is down *
c3033b01 536 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 537 * (a) WoL is enabled
538 * (b) AMT is active
539 * (c) SoL/IDER session is active */
1dc32918
JP		 540 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
541 hw->media_type == e1000_media_type_copper) {
406874a7 542 u16 mii_reg = 0;
61c2505f 543
1dc32918 544 switch (hw->mac_type) {
61c2505f
BA		 545 case e1000_82540:
546 case e1000_82545:
547 case e1000_82545_rev_3:
548 case e1000_82546:
549 case e1000_82546_rev_3:
550 case e1000_82541:
551 case e1000_82541_rev_2:
552 case e1000_82547:
553 case e1000_82547_rev_2:
1dc32918 554 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 555 goto out;
556 break;
557 case e1000_82571:
558 case e1000_82572:
559 case e1000_82573:
560 case e1000_80003es2lan:
561 case e1000_ich8lan:
1dc32918
JP		 562 if (e1000_check_mng_mode(hw) ||
563 e1000_check_phy_reset_block(hw))
61c2505f
BA		 564 goto out;
565 break;
566 default:
567 goto out;
568 }
1dc32918 569 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 570 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 571 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 572 mdelay(1);
573 }
61c2505f
BA		 574out:
575 return;
79f05bf0
AK		 576}
577
64798845 578void e1000_down(struct e1000_adapter *adapter)
1da177e4
LT		 579{
580 struct net_device *netdev = adapter->netdev;
581
1314bbf3
AK		 582 /* signal that we're down so the interrupt handler does not
583 * reschedule our watchdog timer */
584 set_bit(__E1000_DOWN, &adapter->flags);
585
bea3348e 586 napi_disable(&adapter->napi);
c3570acb 587
1da177e4 588 e1000_irq_disable(adapter);
c1605eb3 589
1da177e4
LT		 590 del_timer_sync(&adapter->tx_fifo_stall_timer);
591 del_timer_sync(&adapter->watchdog_timer);
592 del_timer_sync(&adapter->phy_info_timer);
593
7bfa4816 594 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 595 adapter->link_speed = 0;
596 adapter->link_duplex = 0;
597 netif_carrier_off(netdev);
598 netif_stop_queue(netdev);
599
600 e1000_reset(adapter);
581d708e
MC		 601 e1000_clean_all_tx_rings(adapter);
602 e1000_clean_all_rx_rings(adapter);
1da177e4 603}
1da177e4 604
64798845 605void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 606{
607 WARN_ON(in_interrupt());
608 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
609 msleep(1);
610 e1000_down(adapter);
611 e1000_up(adapter);
612 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 613}
614
64798845 615void e1000_reset(struct e1000_adapter *adapter)
1da177e4 616{
1dc32918 617 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 618 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
619 u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
c3033b01 620 bool legacy_pba_adjust = false;
1da177e4
LT		 621
622 /* Repartition Pba for greater than 9k mtu
623 * To take effect CTRL.RST is required.
624 */
625
1dc32918 626 switch (hw->mac_type) {
018ea44e
BA		 627 case e1000_82542_rev2_0:
628 case e1000_82542_rev2_1:
629 case e1000_82543:
630 case e1000_82544:
631 case e1000_82540:
632 case e1000_82541:
633 case e1000_82541_rev_2:
c3033b01 634 legacy_pba_adjust = true;
018ea44e
BA		 635 pba = E1000_PBA_48K;
636 break;
637 case e1000_82545:
638 case e1000_82545_rev_3:
639 case e1000_82546:
640 case e1000_82546_rev_3:
641 pba = E1000_PBA_48K;
642 break;
2d7edb92 643 case e1000_82547:
0e6ef3e0 644 case e1000_82547_rev_2:
c3033b01 645 legacy_pba_adjust = true;
2d7edb92
MC		 646 pba = E1000_PBA_30K;
647 break;
868d5309
MC		 648 case e1000_82571:
649 case e1000_82572:
6418ecc6 650 case e1000_80003es2lan:
868d5309
MC		 651 pba = E1000_PBA_38K;
652 break;
2d7edb92 653 case e1000_82573:
018ea44e 654 pba = E1000_PBA_20K;
2d7edb92 655 break;
cd94dd0b
AK		 656 case e1000_ich8lan:
657 pba = E1000_PBA_8K;
018ea44e
BA		 658 case e1000_undefined:
659 case e1000_num_macs:
2d7edb92
MC		 660 break;
661 }
662
c3033b01 663 if (legacy_pba_adjust) {
018ea44e
BA		 664 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
665 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 666
1dc32918 667 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 668 adapter->tx_fifo_head = 0;
669 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
670 adapter->tx_fifo_size =
671 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
672 atomic_set(&adapter->tx_fifo_stall, 0);
673 }
1dc32918 674 } else if (hw->max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
018ea44e 675 /* adjust PBA for jumbo frames */
1dc32918 676 ew32(PBA, pba);
018ea44e
BA		 677
678 /* To maintain wire speed transmits, the Tx FIFO should be
679 * large enough to accomodate two full transmit packets,
680 * rounded up to the next 1KB and expressed in KB. Likewise,
681 * the Rx FIFO should be large enough to accomodate at least
682 * one full receive packet and is similarly rounded up and
683 * expressed in KB. */
1dc32918 684 pba = er32(PBA);
018ea44e
BA		 685 /* upper 16 bits has Tx packet buffer allocation size in KB */
686 tx_space = pba >> 16;
687 /* lower 16 bits has Rx packet buffer allocation size in KB */
688 pba &= 0xffff;
689 /* don't include ethernet FCS because hardware appends/strips */
690 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
691 VLAN_TAG_SIZE;
692 min_tx_space = min_rx_space;
693 min_tx_space *= 2;
9099cfb9 694 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 695 min_tx_space >>= 10;
9099cfb9 696 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 697 min_rx_space >>= 10;
698
699 /* If current Tx allocation is less than the min Tx FIFO size,
700 * and the min Tx FIFO size is less than the current Rx FIFO
701 * allocation, take space away from current Rx allocation */
702 if (tx_space < min_tx_space &&
703 ((min_tx_space - tx_space) < pba)) {
704 pba = pba - (min_tx_space - tx_space);
705
706 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 707 switch (hw->mac_type) {
018ea44e
BA		 708 case e1000_82545 ... e1000_82546_rev_3:
709 pba &= ~(E1000_PBA_8K - 1);
710 break;
711 default:
712 break;
713 }
714
715 /* if short on rx space, rx wins and must trump tx
716 * adjustment or use Early Receive if available */
717 if (pba < min_rx_space) {
1dc32918 718 switch (hw->mac_type) {
018ea44e
BA		 719 case e1000_82573:
720 /* ERT enabled in e1000_configure_rx */
721 break;
722 default:
723 pba = min_rx_space;
724 break;
725 }
726 }
727 }
1da177e4 728 }
2d7edb92 729
1dc32918 730 ew32(PBA, pba);
1da177e4
LT		 731
732 /* flow control settings */
f11b7f85
JK		 733 /* Set the FC high water mark to 90% of the FIFO size.
734 * Required to clear last 3 LSB */
735 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 736 /* We can't use 90% on small FIFOs because the remainder
737 * would be less than 1 full frame. In this case, we size
738 * it to allow at least a full frame above the high water
739 * mark. */
740 if (pba < E1000_PBA_16K)
741 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85 742
1dc32918
JP		 743 hw->fc_high_water = fc_high_water_mark;
744 hw->fc_low_water = fc_high_water_mark - 8;
745 if (hw->mac_type == e1000_80003es2lan)
746 hw->fc_pause_time = 0xFFFF;
87041639 747 else
1dc32918
JP		 748 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
749 hw->fc_send_xon = 1;
750 hw->fc = hw->original_fc;
1da177e4 751
2d7edb92 752 /* Allow time for pending master requests to run */
1dc32918
JP		 753 e1000_reset_hw(hw);
754 if (hw->mac_type >= e1000_82544)
755 ew32(WUC, 0);
09ae3e88 756
1dc32918 757 if (e1000_init_hw(hw))
1da177e4 758 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 759 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 760
761 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918
JP		 762 if (hw->mac_type >= e1000_82544 &&
763 hw->mac_type <= e1000_82547_rev_2 &&
764 hw->autoneg == 1 &&
765 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
766 u32 ctrl = er32(CTRL);
3d5460a0
JB		 767 /* clear phy power management bit if we are in gig only mode,
768 * which if enabled will attempt negotiation to 100Mb, which
769 * can cause a loss of link at power off or driver unload */
770 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 771 ew32(CTRL, ctrl);
3d5460a0
JB		 772 }
773
1da177e4 774 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 775 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 776
1dc32918
JP		 777 e1000_reset_adaptive(hw);
778 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202
AK		 779
780 if (!adapter->smart_power_down &&
1dc32918
JP		 781 (hw->mac_type == e1000_82571 ||
782 hw->mac_type == e1000_82572)) {
406874a7 783 u16 phy_data = 0;
9a53a202
AK		 784 /* speed up time to link by disabling smart power down, ignore
785 * the return value of this function because there is nothing
786 * different we would do if it failed */
1dc32918 787 e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 788 &phy_data);
789 phy_data &= ~IGP02E1000_PM_SPD;
1dc32918 790 e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 791 phy_data);
792 }
793
0fccd0e9 794 e1000_release_manageability(adapter);
1da177e4
LT		 795}
796
67b3c27c
AK		 797/**
798 * Dump the eeprom for users having checksum issues
799 **/
b4ea895d 800static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 801{
802 struct net_device *netdev = adapter->netdev;
803 struct ethtool_eeprom eeprom;
804 const struct ethtool_ops *ops = netdev->ethtool_ops;
805 u8 *data;
806 int i;
807 u16 csum_old, csum_new = 0;
808
809 eeprom.len = ops->get_eeprom_len(netdev);
810 eeprom.offset = 0;
811
812 data = kmalloc(eeprom.len, GFP_KERNEL);
813 if (!data) {
814 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
815 " data\n");
816 return;
817 }
818
819 ops->get_eeprom(netdev, &eeprom, data);
820
821 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
822 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
823 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
824 csum_new += data[i] + (data[i + 1] << 8);
825 csum_new = EEPROM_SUM - csum_new;
826
827 printk(KERN_ERR "/*********************/\n");
828 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
829 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
830
831 printk(KERN_ERR "Offset Values\n");
832 printk(KERN_ERR "======== ======\n");
833 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
834
835 printk(KERN_ERR "Include this output when contacting your support "
836 "provider.\n");
837 printk(KERN_ERR "This is not a software error! Something bad "
838 "happened to your hardware or\n");
839 printk(KERN_ERR "EEPROM image. Ignoring this "
840 "problem could result in further problems,\n");
841 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
842 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
843 "which is invalid\n");
844 printk(KERN_ERR "and requires you to set the proper MAC "
845 "address manually before continuing\n");
846 printk(KERN_ERR "to enable this network device.\n");
847 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
848 "to your hardware vendor\n");
63cd31f6 849 printk(KERN_ERR "or Intel Customer Support.\n");
67b3c27c
AK		 850 printk(KERN_ERR "/*********************/\n");
851
852 kfree(data);
853}
854
81250297
TI		 855/**
856 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
857 * @pdev: PCI device information struct
858 *
859 * Return true if an adapter needs ioport resources
860 **/
861static int e1000_is_need_ioport(struct pci_dev *pdev)
862{
863 switch (pdev->device) {
864 case E1000_DEV_ID_82540EM:
865 case E1000_DEV_ID_82540EM_LOM:
866 case E1000_DEV_ID_82540EP:
867 case E1000_DEV_ID_82540EP_LOM:
868 case E1000_DEV_ID_82540EP_LP:
869 case E1000_DEV_ID_82541EI:
870 case E1000_DEV_ID_82541EI_MOBILE:
871 case E1000_DEV_ID_82541ER:
872 case E1000_DEV_ID_82541ER_LOM:
873 case E1000_DEV_ID_82541GI:
874 case E1000_DEV_ID_82541GI_LF:
875 case E1000_DEV_ID_82541GI_MOBILE:
876 case E1000_DEV_ID_82544EI_COPPER:
877 case E1000_DEV_ID_82544EI_FIBER:
878 case E1000_DEV_ID_82544GC_COPPER:
879 case E1000_DEV_ID_82544GC_LOM:
880 case E1000_DEV_ID_82545EM_COPPER:
881 case E1000_DEV_ID_82545EM_FIBER:
882 case E1000_DEV_ID_82546EB_COPPER:
883 case E1000_DEV_ID_82546EB_FIBER:
884 case E1000_DEV_ID_82546EB_QUAD_COPPER:
885 return true;
886 default:
887 return false;
888 }
889}
890
1da177e4
LT		 891/**
892 * e1000_probe - Device Initialization Routine
893 * @pdev: PCI device information struct
894 * @ent: entry in e1000_pci_tbl
895 *
896 * Returns 0 on success, negative on failure
897 *
898 * e1000_probe initializes an adapter identified by a pci_dev structure.
899 * The OS initialization, configuring of the adapter private structure,
900 * and a hardware reset occur.
901 **/
1dc32918
JP		 902static int __devinit e1000_probe(struct pci_dev *pdev,
903 const struct pci_device_id *ent)
1da177e4
LT		 904{
905 struct net_device *netdev;
906 struct e1000_adapter *adapter;
1dc32918 907 struct e1000_hw *hw;
2d7edb92 908
1da177e4 909 static int cards_found = 0;
120cd576 910 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 911 int i, err, pci_using_dac;
406874a7
JP		 912 u16 eeprom_data = 0;
913 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 914 int bars, need_ioport;
0795af57 915
81250297
TI		 916 /* do not allocate ioport bars when not needed */
917 need_ioport = e1000_is_need_ioport(pdev);
918 if (need_ioport) {
919 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
920 err = pci_enable_device(pdev);
921 } else {
922 bars = pci_select_bars(pdev, IORESOURCE_MEM);
923 err = pci_enable_device(pdev);
924 }
c7be73bc 925 if (err)
1da177e4
LT		 926 return err;
927
c7be73bc
JP		 928 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
929 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
1da177e4
LT		 930 pci_using_dac = 1;
931 } else {
c7be73bc
JP		 932 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
933 if (err) {
934 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
935 if (err) {
936 E1000_ERR("No usable DMA configuration, "
937 "aborting\n");
938 goto err_dma;
939 }
1da177e4
LT		 940 }
941 pci_using_dac = 0;
942 }
943
81250297 944 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 945 if (err)
6dd62ab0 946 goto err_pci_reg;
1da177e4
LT		 947
948 pci_set_master(pdev);
949
6dd62ab0 950 err = -ENOMEM;
1da177e4 951 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 952 if (!netdev)
1da177e4 953 goto err_alloc_etherdev;
1da177e4 954
1da177e4
LT		 955 SET_NETDEV_DEV(netdev, &pdev->dev);
956
957 pci_set_drvdata(pdev, netdev);
60490fe0 958 adapter = netdev_priv(netdev);
1da177e4
LT		 959 adapter->netdev = netdev;
960 adapter->pdev = pdev;
1da177e4 961 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 962 adapter->bars = bars;
963 adapter->need_ioport = need_ioport;
1da177e4 964
1dc32918
JP		 965 hw = &adapter->hw;
966 hw->back = adapter;
967
6dd62ab0 968 err = -EIO;
275f165f 969 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 970 if (!hw->hw_addr)
1da177e4 971 goto err_ioremap;
1da177e4 972
81250297
TI		 973 if (adapter->need_ioport) {
974 for (i = BAR_1; i <= BAR_5; i++) {
975 if (pci_resource_len(pdev, i) == 0)
976 continue;
977 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
978 hw->io_base = pci_resource_start(pdev, i);
979 break;
980 }
1da177e4
LT		 981 }
982 }
983
984 netdev->open = &e1000_open;
985 netdev->stop = &e1000_close;
986 netdev->hard_start_xmit = &e1000_xmit_frame;
987 netdev->get_stats = &e1000_get_stats;
db0ce50d 988 netdev->set_rx_mode = &e1000_set_rx_mode;
1da177e4
LT		 989 netdev->set_mac_address = &e1000_set_mac;
990 netdev->change_mtu = &e1000_change_mtu;
991 netdev->do_ioctl = &e1000_ioctl;
992 e1000_set_ethtool_ops(netdev);
993 netdev->tx_timeout = &e1000_tx_timeout;
994 netdev->watchdog_timeo = 5 * HZ;
bea3348e 995 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
1da177e4
LT		 996 netdev->vlan_rx_register = e1000_vlan_rx_register;
997 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
998 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
999#ifdef CONFIG_NET_POLL_CONTROLLER
1000 netdev->poll_controller = e1000_netpoll;
1001#endif
0eb5a34c 1002 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1003
1da177e4
LT		 1004 adapter->bd_number = cards_found;
1005
1006 /* setup the private structure */
1007
c7be73bc
JP		 1008 err = e1000_sw_init(adapter);
1009 if (err)
1da177e4
LT		 1010 goto err_sw_init;
1011
6dd62ab0 1012 err = -EIO;
cd94dd0b
AK		 1013 /* Flash BAR mapping must happen after e1000_sw_init
1014 * because it depends on mac_type */
1dc32918 1015 if ((hw->mac_type == e1000_ich8lan) &&
cd94dd0b 1016 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
275f165f 1017 hw->flash_address = pci_ioremap_bar(pdev, 1);
1dc32918 1018 if (!hw->flash_address)
cd94dd0b 1019 goto err_flashmap;
cd94dd0b
AK		 1020 }
1021
1dc32918 1022 if (e1000_check_phy_reset_block(hw))
2d7edb92
MC		 1023 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1024
1dc32918 1025 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 1026 netdev->features = NETIF_F_SG |
1027 NETIF_F_HW_CSUM |
1028 NETIF_F_HW_VLAN_TX |
1029 NETIF_F_HW_VLAN_RX |
1030 NETIF_F_HW_VLAN_FILTER;
1dc32918 1031 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 1032 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 1033 }
1034
1dc32918
JP		 1035 if ((hw->mac_type >= e1000_82544) &&
1036 (hw->mac_type != e1000_82547))
1da177e4 1037 netdev->features |= NETIF_F_TSO;
2d7edb92 1038
1dc32918 1039 if (hw->mac_type > e1000_82547_rev_2)
87ca4e5b 1040 netdev->features |= NETIF_F_TSO6;
96838a40 1041 if (pci_using_dac)
1da177e4
LT		 1042 netdev->features |= NETIF_F_HIGHDMA;
1043
76c224bc
AK		 1044 netdev->features |= NETIF_F_LLTX;
1045
20501a69
PM		 1046 netdev->vlan_features |= NETIF_F_TSO;
1047 netdev->vlan_features |= NETIF_F_TSO6;
1048 netdev->vlan_features |= NETIF_F_HW_CSUM;
1049 netdev->vlan_features |= NETIF_F_SG;
1050
1dc32918 1051 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1052
cd94dd0b 1053 /* initialize eeprom parameters */
1dc32918 1054 if (e1000_init_eeprom_params(hw)) {
cd94dd0b 1055 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 1056 goto err_eeprom;
cd94dd0b
AK		 1057 }
1058
96838a40 1059 /* before reading the EEPROM, reset the controller to
1da177e4 1060 * put the device in a known good starting state */
96838a40 1061
1dc32918 1062 e1000_reset_hw(hw);
1da177e4
LT		 1063
1064 /* make sure the EEPROM is good */
1dc32918 1065 if (e1000_validate_eeprom_checksum(hw) < 0) {
1da177e4 1066 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 1067 e1000_dump_eeprom(adapter);
1068 /*
1069 * set MAC address to all zeroes to invalidate and temporary
1070 * disable this device for the user. This blocks regular
1071 * traffic while still permitting ethtool ioctls from reaching
1072 * the hardware as well as allowing the user to run the
1073 * interface after manually setting a hw addr using
1074 * `ip set address`
1075 */
1dc32918 1076 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1077 } else {
1078 /* copy the MAC address out of the EEPROM */
1dc32918 1079 if (e1000_read_mac_addr(hw))
67b3c27c 1080 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1da177e4 1081 }
67b3c27c 1082 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 1083 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1084 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1085
67b3c27c 1086 if (!is_valid_ether_addr(netdev->perm_addr))
1da177e4 1087 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4 1088
1dc32918 1089 e1000_get_bus_info(hw);
1da177e4
LT		 1090
1091 init_timer(&adapter->tx_fifo_stall_timer);
1092 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
e982f17c 1093 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 1094
1095 init_timer(&adapter->watchdog_timer);
1096 adapter->watchdog_timer.function = &e1000_watchdog;
1097 adapter->watchdog_timer.data = (unsigned long) adapter;
1098
1da177e4
LT		 1099 init_timer(&adapter->phy_info_timer);
1100 adapter->phy_info_timer.function = &e1000_update_phy_info;
e982f17c 1101 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 1102
65f27f38 1103 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1104
1da177e4
LT		 1105 e1000_check_options(adapter);
1106
1107 /* Initial Wake on LAN setting
1108 * If APM wake is enabled in the EEPROM,
1109 * enable the ACPI Magic Packet filter
1110 */
1111
1dc32918 1112 switch (hw->mac_type) {
1da177e4
LT		 1113 case e1000_82542_rev2_0:
1114 case e1000_82542_rev2_1:
1115 case e1000_82543:
1116 break;
1117 case e1000_82544:
1dc32918 1118 e1000_read_eeprom(hw,
1da177e4
LT		 1119 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1120 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1121 break;
cd94dd0b 1122 case e1000_ich8lan:
1dc32918 1123 e1000_read_eeprom(hw,
cd94dd0b
AK		 1124 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1125 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1126 break;
1da177e4
LT		 1127 case e1000_82546:
1128 case e1000_82546_rev_3:
fd803241 1129 case e1000_82571:
6418ecc6 1130 case e1000_80003es2lan:
1dc32918
JP		 1131 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1132 e1000_read_eeprom(hw,
1da177e4
LT		 1133 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1134 break;
1135 }
1136 /* Fall Through */
1137 default:
1dc32918 1138 e1000_read_eeprom(hw,
1da177e4
LT		 1139 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1140 break;
1141 }
96838a40 1142 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1143 adapter->eeprom_wol |= E1000_WUFC_MAG;
1144
1145 /* now that we have the eeprom settings, apply the special cases
1146 * where the eeprom may be wrong or the board simply won't support
1147 * wake on lan on a particular port */
1148 switch (pdev->device) {
1149 case E1000_DEV_ID_82546GB_PCIE:
1150 adapter->eeprom_wol = 0;
1151 break;
1152 case E1000_DEV_ID_82546EB_FIBER:
1153 case E1000_DEV_ID_82546GB_FIBER:
1154 case E1000_DEV_ID_82571EB_FIBER:
1155 /* Wake events only supported on port A for dual fiber
1156 * regardless of eeprom setting */
1dc32918 1157 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1158 adapter->eeprom_wol = 0;
1159 break;
1160 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 1161 case E1000_DEV_ID_82571EB_QUAD_COPPER:
ce57a02c 1162 case E1000_DEV_ID_82571EB_QUAD_FIBER:
fc2307d0 1163 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
f4ec7f98 1164 case E1000_DEV_ID_82571PT_QUAD_COPPER:
120cd576
JB		 1165 /* if quad port adapter, disable WoL on all but port A */
1166 if (global_quad_port_a != 0)
1167 adapter->eeprom_wol = 0;
1168 else
1169 adapter->quad_port_a = 1;
1170 /* Reset for multiple quad port adapters */
1171 if (++global_quad_port_a == 4)
1172 global_quad_port_a = 0;
1173 break;
1174 }
1175
1176 /* initialize the wol settings based on the eeprom settings */
1177 adapter->wol = adapter->eeprom_wol;
de126489 1178 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1179
fb3d47d4 1180 /* print bus type/speed/width info */
fb3d47d4
JK		 1181 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1182 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1183 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1184 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1185 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1186 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1187 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1188 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1189 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1190 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1191 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1192 "32-bit"));
fb3d47d4 1193
e174961c 1194 printk("%pM\n", netdev->dev_addr);
fb3d47d4 1195
1dc32918 1196 if (hw->bus_type == e1000_bus_type_pci_express) {
14782ca8
AK		 1197 DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no "
1198 "longer be supported by this driver in the future.\n",
1199 pdev->vendor, pdev->device);
1200 DPRINTK(PROBE, WARNING, "please use the \"e1000e\" "
1201 "driver instead.\n");
1202 }
1203
1da177e4
LT		 1204 /* reset the hardware with the new settings */
1205 e1000_reset(adapter);
1206
b55ccb35
JK		 1207 /* If the controller is 82573 and f/w is AMT, do not set
1208 * DRV_LOAD until the interface is up. For all other cases,
1209 * let the f/w know that the h/w is now under the control
1210 * of the driver. */
1dc32918
JP		 1211 if (hw->mac_type != e1000_82573 ||
1212 !e1000_check_mng_mode(hw))
b55ccb35 1213 e1000_get_hw_control(adapter);
2d7edb92 1214
1314bbf3
AK		 1215 /* tell the stack to leave us alone until e1000_open() is called */
1216 netif_carrier_off(netdev);
1217 netif_stop_queue(netdev);
416b5d10
AK		 1218
1219 strcpy(netdev->name, "eth%d");
c7be73bc
JP		 1220 err = register_netdev(netdev);
1221 if (err)
416b5d10 1222 goto err_register;
1314bbf3 1223
1da177e4
LT		 1224 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1225
1226 cards_found++;
1227 return 0;
1228
1229err_register:
6dd62ab0
VA		 1230 e1000_release_hw_control(adapter);
1231err_eeprom:
1dc32918
JP		 1232 if (!e1000_check_phy_reset_block(hw))
1233 e1000_phy_hw_reset(hw);
6dd62ab0 1234
1dc32918
JP		 1235 if (hw->flash_address)
1236 iounmap(hw->flash_address);
cd94dd0b 1237err_flashmap:
6dd62ab0
VA		 1238 for (i = 0; i < adapter->num_rx_queues; i++)
1239 dev_put(&adapter->polling_netdev[i]);
6dd62ab0
VA		 1240
1241 kfree(adapter->tx_ring);
1242 kfree(adapter->rx_ring);
6dd62ab0 1243 kfree(adapter->polling_netdev);
1da177e4 1244err_sw_init:
1dc32918 1245 iounmap(hw->hw_addr);
1da177e4
LT		 1246err_ioremap:
1247 free_netdev(netdev);
1248err_alloc_etherdev:
81250297 1249 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA		 1250err_pci_reg:
1251err_dma:
1252 pci_disable_device(pdev);
1da177e4
LT		 1253 return err;
1254}
1255
1256/**
1257 * e1000_remove - Device Removal Routine
1258 * @pdev: PCI device information struct
1259 *
1260 * e1000_remove is called by the PCI subsystem to alert the driver
1261 * that it should release a PCI device. The could be caused by a
1262 * Hot-Plug event, or because the driver is going to be removed from
1263 * memory.
1264 **/
1265
64798845 1266static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1267{
1268 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1269 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1270 struct e1000_hw *hw = &adapter->hw;
581d708e 1271 int i;
1da177e4 1272
28e53bdd 1273 cancel_work_sync(&adapter->reset_task);
be2b28ed 1274
0fccd0e9 1275 e1000_release_manageability(adapter);
1da177e4 1276
b55ccb35
JK		 1277 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1278 * would have already happened in close and is redundant. */
1279 e1000_release_hw_control(adapter);
2d7edb92 1280
f56799ea 1281 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1282 dev_put(&adapter->polling_netdev[i]);
1da177e4 1283
bea3348e
SH		 1284 unregister_netdev(netdev);
1285
1dc32918
JP		 1286 if (!e1000_check_phy_reset_block(hw))
1287 e1000_phy_hw_reset(hw);
1da177e4 1288
24025e4e
MC		 1289 kfree(adapter->tx_ring);
1290 kfree(adapter->rx_ring);
24025e4e 1291 kfree(adapter->polling_netdev);
24025e4e 1292
1dc32918
JP		 1293 iounmap(hw->hw_addr);
1294 if (hw->flash_address)
1295 iounmap(hw->flash_address);
81250297 1296 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1297
1298 free_netdev(netdev);
1299
1300 pci_disable_device(pdev);
1301}
1302
1303/**
1304 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1305 * @adapter: board private structure to initialize
1306 *
1307 * e1000_sw_init initializes the Adapter private data structure.
1308 * Fields are initialized based on PCI device information and
1309 * OS network device settings (MTU size).
1310 **/
1311
64798845 1312static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT		 1313{
1314 struct e1000_hw *hw = &adapter->hw;
1315 struct net_device *netdev = adapter->netdev;
1316 struct pci_dev *pdev = adapter->pdev;
581d708e 1317 int i;
1da177e4
LT		 1318
1319 /* PCI config space info */
1320
1321 hw->vendor_id = pdev->vendor;
1322 hw->device_id = pdev->device;
1323 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1324 hw->subsystem_id = pdev->subsystem_device;
44c10138 1325 hw->revision_id = pdev->revision;
1da177e4
LT		 1326
1327 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1328
eb0f8054 1329 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT		 1330 hw->max_frame_size = netdev->mtu +
1331 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1332 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1333
1334 /* identify the MAC */
1335
96838a40 1336 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1337 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1338 return -EIO;
1339 }
1340
96838a40 1341 switch (hw->mac_type) {
1da177e4
LT		 1342 default:
1343 break;
1344 case e1000_82541:
1345 case e1000_82547:
1346 case e1000_82541_rev_2:
1347 case e1000_82547_rev_2:
1348 hw->phy_init_script = 1;
1349 break;
1350 }
1351
1352 e1000_set_media_type(hw);
1353
c3033b01
JP		 1354 hw->wait_autoneg_complete = false;
1355 hw->tbi_compatibility_en = true;
1356 hw->adaptive_ifs = true;
1da177e4
LT		 1357
1358 /* Copper options */
1359
96838a40 1360 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1361 hw->mdix = AUTO_ALL_MODES;
c3033b01 1362 hw->disable_polarity_correction = false;
1da177e4
LT		 1363 hw->master_slave = E1000_MASTER_SLAVE;
1364 }
1365
f56799ea
JK		 1366 adapter->num_tx_queues = 1;
1367 adapter->num_rx_queues = 1;
581d708e
MC		 1368
1369 if (e1000_alloc_queues(adapter)) {
1370 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1371 return -ENOMEM;
1372 }
1373
f56799ea 1374 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e 1375 adapter->polling_netdev[i].priv = adapter;
581d708e
MC		 1376 dev_hold(&adapter->polling_netdev[i]);
1377 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1378 }
7bfa4816 1379 spin_lock_init(&adapter->tx_queue_lock);
24025e4e 1380
47313054 1381 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1382 e1000_irq_disable(adapter);
1383
1da177e4 1384 spin_lock_init(&adapter->stats_lock);
1da177e4 1385
1314bbf3
AK		 1386 set_bit(__E1000_DOWN, &adapter->flags);
1387
1da177e4
LT		 1388 return 0;
1389}
1390
581d708e
MC		 1391/**
1392 * e1000_alloc_queues - Allocate memory for all rings
1393 * @adapter: board private structure to initialize
1394 *
1395 * We allocate one ring per queue at run-time since we don't know the
1396 * number of queues at compile-time. The polling_netdev array is
1397 * intended for Multiqueue, but should work fine with a single queue.
1398 **/
1399
64798845 1400static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1401{
1c7e5b12
YB		 1402 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1403 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1404 if (!adapter->tx_ring)
1405 return -ENOMEM;
581d708e 1406
1c7e5b12
YB		 1407 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1408 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1409 if (!adapter->rx_ring) {
1410 kfree(adapter->tx_ring);
1411 return -ENOMEM;
1412 }
581d708e 1413
1c7e5b12
YB		 1414 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1415 sizeof(struct net_device),
1416 GFP_KERNEL);
581d708e
MC		 1417 if (!adapter->polling_netdev) {
1418 kfree(adapter->tx_ring);
1419 kfree(adapter->rx_ring);
1420 return -ENOMEM;
1421 }
581d708e
MC		 1422
1423 return E1000_SUCCESS;
1424}
1425
1da177e4
LT		 1426/**
1427 * e1000_open - Called when a network interface is made active
1428 * @netdev: network interface device structure
1429 *
1430 * Returns 0 on success, negative value on failure
1431 *
1432 * The open entry point is called when a network interface is made
1433 * active by the system (IFF_UP). At this point all resources needed
1434 * for transmit and receive operations are allocated, the interrupt
1435 * handler is registered with the OS, the watchdog timer is started,
1436 * and the stack is notified that the interface is ready.
1437 **/
1438
64798845 1439static int e1000_open(struct net_device *netdev)
1da177e4 1440{
60490fe0 1441 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1442 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1443 int err;
1444
2db10a08 1445 /* disallow open during test */
1314bbf3 1446 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1447 return -EBUSY;
1448
1da177e4 1449 /* allocate transmit descriptors */
e0aac5a2
AK		 1450 err = e1000_setup_all_tx_resources(adapter);
1451 if (err)
1da177e4
LT		 1452 goto err_setup_tx;
1453
1454 /* allocate receive descriptors */
e0aac5a2 1455 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1456 if (err)
e0aac5a2 1457 goto err_setup_rx;
b5bf28cd 1458
79f05bf0
AK		 1459 e1000_power_up_phy(adapter);
1460
2d7edb92 1461 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1462 if ((hw->mng_cookie.status &
2d7edb92
MC		 1463 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1464 e1000_update_mng_vlan(adapter);
1465 }
1da177e4 1466
b55ccb35
JK		 1467 /* If AMT is enabled, let the firmware know that the network
1468 * interface is now open */
1dc32918
JP		 1469 if (hw->mac_type == e1000_82573 &&
1470 e1000_check_mng_mode(hw))
b55ccb35
JK		 1471 e1000_get_hw_control(adapter);
1472
e0aac5a2
AK		 1473 /* before we allocate an interrupt, we must be ready to handle it.
1474 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1475 * as soon as we call pci_request_irq, so we have to setup our
1476 * clean_rx handler before we do so. */
1477 e1000_configure(adapter);
1478
1479 err = e1000_request_irq(adapter);
1480 if (err)
1481 goto err_req_irq;
1482
1483 /* From here on the code is the same as e1000_up() */
1484 clear_bit(__E1000_DOWN, &adapter->flags);
1485
bea3348e 1486 napi_enable(&adapter->napi);
47313054 1487
e0aac5a2
AK		 1488 e1000_irq_enable(adapter);
1489
076152d5
BH		 1490 netif_start_queue(netdev);
1491
e0aac5a2 1492 /* fire a link status change interrupt to start the watchdog */
1dc32918 1493 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1494
1da177e4
LT		 1495 return E1000_SUCCESS;
1496
b5bf28cd 1497err_req_irq:
e0aac5a2
AK		 1498 e1000_release_hw_control(adapter);
1499 e1000_power_down_phy(adapter);
581d708e 1500 e1000_free_all_rx_resources(adapter);
1da177e4 1501err_setup_rx:
581d708e 1502 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1503err_setup_tx:
1504 e1000_reset(adapter);
1505
1506 return err;
1507}
1508
1509/**
1510 * e1000_close - Disables a network interface
1511 * @netdev: network interface device structure
1512 *
1513 * Returns 0, this is not allowed to fail
1514 *
1515 * The close entry point is called when an interface is de-activated
1516 * by the OS. The hardware is still under the drivers control, but
1517 * needs to be disabled. A global MAC reset is issued to stop the
1518 * hardware, and all transmit and receive resources are freed.
1519 **/
1520
64798845 1521static int e1000_close(struct net_device *netdev)
1da177e4 1522{
60490fe0 1523 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1524 struct e1000_hw *hw = &adapter->hw;
1da177e4 1525
2db10a08 1526 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1527 e1000_down(adapter);
79f05bf0 1528 e1000_power_down_phy(adapter);
2db10a08 1529 e1000_free_irq(adapter);
1da177e4 1530
581d708e
MC		 1531 e1000_free_all_tx_resources(adapter);
1532 e1000_free_all_rx_resources(adapter);
1da177e4 1533
4666560a
BA		 1534 /* kill manageability vlan ID if supported, but not if a vlan with
1535 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1536 if ((hw->mng_cookie.status &
4666560a
BA		 1537 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1538 !(adapter->vlgrp &&
5c15bdec 1539 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1540 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1541 }
b55ccb35
JK		 1542
1543 /* If AMT is enabled, let the firmware know that the network
1544 * interface is now closed */
1dc32918
JP		 1545 if (hw->mac_type == e1000_82573 &&
1546 e1000_check_mng_mode(hw))
b55ccb35
JK		 1547 e1000_release_hw_control(adapter);
1548
1da177e4
LT		 1549 return 0;
1550}
1551
1552/**
1553 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1554 * @adapter: address of board private structure
2d7edb92
MC		 1555 * @start: address of beginning of memory
1556 * @len: length of memory
1da177e4 1557 **/
64798845
JP		 1558static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1559 unsigned long len)
1da177e4 1560{
1dc32918 1561 struct e1000_hw *hw = &adapter->hw;
e982f17c 1562 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1563 unsigned long end = begin + len;
1564
2648345f
MC		 1565 /* First rev 82545 and 82546 need to not allow any memory
1566 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP		 1567 if (hw->mac_type == e1000_82545 ||
1568 hw->mac_type == e1000_82546) {
c3033b01 1569 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1570 }
1571
c3033b01 1572 return true;
1da177e4
LT		 1573}
1574
1575/**
1576 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1577 * @adapter: board private structure
581d708e 1578 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1579 *
1580 * Return 0 on success, negative on failure
1581 **/
1582
64798845
JP		 1583static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1584 struct e1000_tx_ring *txdr)
1da177e4 1585{
1da177e4
LT		 1586 struct pci_dev *pdev = adapter->pdev;
1587 int size;
1588
1589 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1590 txdr->buffer_info = vmalloc(size);
96838a40 1591 if (!txdr->buffer_info) {
2648345f
MC		 1592 DPRINTK(PROBE, ERR,
1593 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1594 return -ENOMEM;
1595 }
1596 memset(txdr->buffer_info, 0, size);
1597
1598 /* round up to nearest 4K */
1599
1600 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1601 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1602
1603 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1604 if (!txdr->desc) {
1da177e4 1605setup_tx_desc_die:
1da177e4 1606 vfree(txdr->buffer_info);
2648345f
MC		 1607 DPRINTK(PROBE, ERR,
1608 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1609 return -ENOMEM;
1610 }
1611
2648345f 1612 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1613 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1614 void *olddesc = txdr->desc;
1615 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1616 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1617 "at %p\n", txdr->size, txdr->desc);
1618 /* Try again, without freeing the previous */
1da177e4 1619 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1620 /* Failed allocation, critical failure */
96838a40 1621 if (!txdr->desc) {
1da177e4
LT		 1622 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1623 goto setup_tx_desc_die;
1624 }
1625
1626 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1627 /* give up */
2648345f
MC		 1628 pci_free_consistent(pdev, txdr->size, txdr->desc,
1629 txdr->dma);
1da177e4
LT		 1630 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1631 DPRINTK(PROBE, ERR,
2648345f
MC		 1632 "Unable to allocate aligned memory "
1633 "for the transmit descriptor ring\n");
1da177e4
LT		 1634 vfree(txdr->buffer_info);
1635 return -ENOMEM;
1636 } else {
2648345f 1637 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1638 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1639 }
1640 }
1641 memset(txdr->desc, 0, txdr->size);
1642
1643 txdr->next_to_use = 0;
1644 txdr->next_to_clean = 0;
2ae76d98 1645 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1646
1647 return 0;
1648}
1649
581d708e
MC		 1650/**
1651 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1652 * (Descriptors) for all queues
1653 * @adapter: board private structure
1654 *
581d708e
MC		 1655 * Return 0 on success, negative on failure
1656 **/
1657
64798845 1658int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1659{
1660 int i, err = 0;
1661
f56799ea 1662 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1663 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1664 if (err) {
1665 DPRINTK(PROBE, ERR,
1666 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1667 for (i-- ; i >= 0; i--)
1668 e1000_free_tx_resources(adapter,
1669 &adapter->tx_ring[i]);
581d708e
MC		 1670 break;
1671 }
1672 }
1673
1674 return err;
1675}
1676
1da177e4
LT		 1677/**
1678 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1679 * @adapter: board private structure
1680 *
1681 * Configure the Tx unit of the MAC after a reset.
1682 **/
1683
64798845 1684static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1685{
406874a7 1686 u64 tdba;
581d708e 1687 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1688 u32 tdlen, tctl, tipg, tarc;
1689 u32 ipgr1, ipgr2;
1da177e4
LT		 1690
1691 /* Setup the HW Tx Head and Tail descriptor pointers */
1692
f56799ea 1693 switch (adapter->num_tx_queues) {
24025e4e
MC		 1694 case 1:
1695 default:
581d708e
MC		 1696 tdba = adapter->tx_ring[0].dma;
1697 tdlen = adapter->tx_ring[0].count *
1698 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1699 ew32(TDLEN, tdlen);
1700 ew32(TDBAH, (tdba >> 32));
1701 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1702 ew32(TDT, 0);
1703 ew32(TDH, 0);
6a951698
AK		 1704 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1705 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1706 break;
1707 }
1da177e4
LT		 1708
1709 /* Set the default values for the Tx Inter Packet Gap timer */
1dc32918 1710 if (hw->mac_type <= e1000_82547_rev_2 &&
d89b6c67
JB		 1711 (hw->media_type == e1000_media_type_fiber ||
1712 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1713 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1714 else
1715 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1716
581d708e 1717 switch (hw->mac_type) {
1da177e4
LT		 1718 case e1000_82542_rev2_0:
1719 case e1000_82542_rev2_1:
1720 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1721 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1722 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1723 break;
87041639
JK		 1724 case e1000_80003es2lan:
1725 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1726 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1727 break;
1da177e4 1728 default:
0fadb059
JK		 1729 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1730 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1731 break;
1da177e4 1732 }
0fadb059
JK		 1733 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1734 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1735 ew32(TIPG, tipg);
1da177e4
LT		 1736
1737 /* Set the Tx Interrupt Delay register */
1738
1dc32918 1739 ew32(TIDV, adapter->tx_int_delay);
581d708e 1740 if (hw->mac_type >= e1000_82540)
1dc32918 1741 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1742
1743 /* Program the Transmit Control Register */
1744
1dc32918 1745 tctl = er32(TCTL);
1da177e4 1746 tctl &= ~E1000_TCTL_CT;
7e6c9861 1747 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1748 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1749
2ae76d98 1750 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1dc32918 1751 tarc = er32(TARC0);
90fb5135
AK		 1752 /* set the speed mode bit, we'll clear it if we're not at
1753 * gigabit link later */
09ae3e88 1754 tarc |= (1 << 21);
1dc32918 1755 ew32(TARC0, tarc);
87041639 1756 } else if (hw->mac_type == e1000_80003es2lan) {
1dc32918 1757 tarc = er32(TARC0);
87041639 1758 tarc |= 1;
1dc32918
JP		 1759 ew32(TARC0, tarc);
1760 tarc = er32(TARC1);
87041639 1761 tarc |= 1;
1dc32918 1762 ew32(TARC1, tarc);
2ae76d98
MC		 1763 }
1764
581d708e 1765 e1000_config_collision_dist(hw);
1da177e4
LT		 1766
1767 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1768 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1769
1770 /* only set IDE if we are delaying interrupts using the timers */
1771 if (adapter->tx_int_delay)
1772 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1773
581d708e 1774 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1775 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1776 else
1777 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1778
1779 /* Cache if we're 82544 running in PCI-X because we'll
1780 * need this to apply a workaround later in the send path. */
581d708e
MC		 1781 if (hw->mac_type == e1000_82544 &&
1782 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1783 adapter->pcix_82544 = 1;
7e6c9861 1784
1dc32918 1785 ew32(TCTL, tctl);
7e6c9861 1786
1da177e4
LT		 1787}
1788
1789/**
1790 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1791 * @adapter: board private structure
581d708e 1792 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1793 *
1794 * Returns 0 on success, negative on failure
1795 **/
1796
64798845
JP		 1797static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1798 struct e1000_rx_ring *rxdr)
1da177e4 1799{
1dc32918 1800 struct e1000_hw *hw = &adapter->hw;
1da177e4 1801 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1802 int size, desc_len;
1da177e4
LT		 1803
1804 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1805 rxdr->buffer_info = vmalloc(size);
581d708e 1806 if (!rxdr->buffer_info) {
2648345f
MC		 1807 DPRINTK(PROBE, ERR,
1808 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1809 return -ENOMEM;
1810 }
1811 memset(rxdr->buffer_info, 0, size);
1812
1dc32918 1813 if (hw->mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1814 desc_len = sizeof(struct e1000_rx_desc);
1815 else
1816 desc_len = sizeof(union e1000_rx_desc_packet_split);
1817
1da177e4
LT		 1818 /* Round up to nearest 4K */
1819
2d7edb92 1820 rxdr->size = rxdr->count * desc_len;
9099cfb9 1821 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1822
1823 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1824
581d708e
MC		 1825 if (!rxdr->desc) {
1826 DPRINTK(PROBE, ERR,
1827 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1828setup_rx_desc_die:
1da177e4
LT		 1829 vfree(rxdr->buffer_info);
1830 return -ENOMEM;
1831 }
1832
2648345f 1833 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1834 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1835 void *olddesc = rxdr->desc;
1836 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1837 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1838 "at %p\n", rxdr->size, rxdr->desc);
1839 /* Try again, without freeing the previous */
1da177e4 1840 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1841 /* Failed allocation, critical failure */
581d708e 1842 if (!rxdr->desc) {
1da177e4 1843 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1844 DPRINTK(PROBE, ERR,
1845 "Unable to allocate memory "
1846 "for the receive descriptor ring\n");
1da177e4
LT		 1847 goto setup_rx_desc_die;
1848 }
1849
1850 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1851 /* give up */
2648345f
MC		 1852 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1853 rxdr->dma);
1da177e4 1854 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1855 DPRINTK(PROBE, ERR,
1856 "Unable to allocate aligned memory "
1857 "for the receive descriptor ring\n");
581d708e 1858 goto setup_rx_desc_die;
1da177e4 1859 } else {
2648345f 1860 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1861 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1862 }
1863 }
1864 memset(rxdr->desc, 0, rxdr->size);
1865
1866 rxdr->next_to_clean = 0;
1867 rxdr->next_to_use = 0;
1868
1869 return 0;
1870}
1871
581d708e
MC		 1872/**
1873 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1874 * (Descriptors) for all queues
1875 * @adapter: board private structure
1876 *
581d708e
MC		 1877 * Return 0 on success, negative on failure
1878 **/
1879
64798845 1880int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1881{
1882 int i, err = 0;
1883
f56799ea 1884 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1885 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1886 if (err) {
1887 DPRINTK(PROBE, ERR,
1888 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1889 for (i-- ; i >= 0; i--)
1890 e1000_free_rx_resources(adapter,
1891 &adapter->rx_ring[i]);
581d708e
MC		 1892 break;
1893 }
1894 }
1895
1896 return err;
1897}
1898
1da177e4 1899/**
2648345f 1900 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1901 * @adapter: Board private structure
1902 **/
e4c811c9
MC		 1903#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1904 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
64798845 1905static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1906{
1dc32918 1907 struct e1000_hw *hw = &adapter->hw;
630b25cd 1908 u32 rctl;
1da177e4 1909
1dc32918 1910 rctl = er32(RCTL);
1da177e4
LT		 1911
1912 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1913
1914 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1915 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1916 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1917
1dc32918 1918 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1919 rctl |= E1000_RCTL_SBP;
1920 else
1921 rctl &= ~E1000_RCTL_SBP;
1922
2d7edb92
MC		 1923 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1924 rctl &= ~E1000_RCTL_LPE;
1925 else
1926 rctl |= E1000_RCTL_LPE;
1927
1da177e4 1928 /* Setup buffer sizes */
9e2feace
AK		 1929 rctl &= ~E1000_RCTL_SZ_4096;
1930 rctl |= E1000_RCTL_BSEX;
1931 switch (adapter->rx_buffer_len) {
1932 case E1000_RXBUFFER_256:
1933 rctl |= E1000_RCTL_SZ_256;
1934 rctl &= ~E1000_RCTL_BSEX;
1935 break;
1936 case E1000_RXBUFFER_512:
1937 rctl |= E1000_RCTL_SZ_512;
1938 rctl &= ~E1000_RCTL_BSEX;
1939 break;
1940 case E1000_RXBUFFER_1024:
1941 rctl |= E1000_RCTL_SZ_1024;
1942 rctl &= ~E1000_RCTL_BSEX;
1943 break;
a1415ee6
JK		 1944 case E1000_RXBUFFER_2048:
1945 default:
1946 rctl |= E1000_RCTL_SZ_2048;
1947 rctl &= ~E1000_RCTL_BSEX;
1948 break;
1949 case E1000_RXBUFFER_4096:
1950 rctl |= E1000_RCTL_SZ_4096;
1951 break;
1952 case E1000_RXBUFFER_8192:
1953 rctl |= E1000_RCTL_SZ_8192;
1954 break;
1955 case E1000_RXBUFFER_16384:
1956 rctl |= E1000_RCTL_SZ_16384;
1957 break;
2d7edb92
MC		 1958 }
1959
1dc32918 1960 ew32(RCTL, rctl);
1da177e4
LT		 1961}
1962
1963/**
1964 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1965 * @adapter: board private structure
1966 *
1967 * Configure the Rx unit of the MAC after a reset.
1968 **/
1969
64798845 1970static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1971{
406874a7 1972 u64 rdba;
581d708e 1973 struct e1000_hw *hw = &adapter->hw;
406874a7 1974 u32 rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1975
630b25cd
BJ		 1976 rdlen = adapter->rx_ring[0].count *
1977 sizeof(struct e1000_rx_desc);
1978 adapter->clean_rx = e1000_clean_rx_irq;
1979 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1da177e4
LT		 1980
1981 /* disable receives while setting up the descriptors */
1dc32918
JP		 1982 rctl = er32(RCTL);
1983 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1984
1985 /* set the Receive Delay Timer Register */
1dc32918 1986 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1987
581d708e 1988 if (hw->mac_type >= e1000_82540) {
1dc32918 1989 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1990 if (adapter->itr_setting != 0)
1dc32918 1991 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1992 }
1993
2ae76d98 1994 if (hw->mac_type >= e1000_82571) {
1dc32918 1995 ctrl_ext = er32(CTRL_EXT);
1e613fd9 1996 /* Reset delay timers after every interrupt */
6fc7a7ec 1997 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
835bb129 1998 /* Auto-Mask interrupts upon ICR access */
1e613fd9 1999 ctrl_ext |= E1000_CTRL_EXT_IAME;
1dc32918 2000 ew32(IAM, 0xffffffff);
1dc32918
JP		 2001 ew32(CTRL_EXT, ctrl_ext);
2002 E1000_WRITE_FLUSH();
2ae76d98
MC		 2003 }
2004
581d708e
MC		 2005 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2006 * the Base and Length of the Rx Descriptor Ring */
f56799ea 2007 switch (adapter->num_rx_queues) {
24025e4e
MC		 2008 case 1:
2009 default:
581d708e 2010 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 2011 ew32(RDLEN, rdlen);
2012 ew32(RDBAH, (rdba >> 32));
2013 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
2014 ew32(RDT, 0);
2015 ew32(RDH, 0);
6a951698
AK		 2016 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2017 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 2018 break;
24025e4e
MC		 2019 }
2020
1da177e4 2021 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 2022 if (hw->mac_type >= e1000_82543) {
1dc32918 2023 rxcsum = er32(RXCSUM);
630b25cd 2024 if (adapter->rx_csum)
2d7edb92 2025 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 2026 else
2d7edb92 2027 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 2028 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 2029 ew32(RXCSUM, rxcsum);
1da177e4
LT		 2030 }
2031
2032 /* Enable Receives */
1dc32918 2033 ew32(RCTL, rctl);
1da177e4
LT		 2034}
2035
2036/**
581d708e 2037 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 2038 * @adapter: board private structure
581d708e 2039 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 2040 *
2041 * Free all transmit software resources
2042 **/
2043
64798845
JP		 2044static void e1000_free_tx_resources(struct e1000_adapter *adapter,
2045 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 2046{
2047 struct pci_dev *pdev = adapter->pdev;
2048
581d708e 2049 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 2050
581d708e
MC		 2051 vfree(tx_ring->buffer_info);
2052 tx_ring->buffer_info = NULL;
1da177e4 2053
581d708e 2054 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 2055
581d708e
MC		 2056 tx_ring->desc = NULL;
2057}
2058
2059/**
2060 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2061 * @adapter: board private structure
2062 *
2063 * Free all transmit software resources
2064 **/
2065
64798845 2066void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2067{
2068 int i;
2069
f56799ea 2070 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2071 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2072}
2073
64798845
JP		 2074static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2075 struct e1000_buffer *buffer_info)
1da177e4 2076{
96838a40 2077 if (buffer_info->dma) {
2648345f
MC		 2078 pci_unmap_page(adapter->pdev,
2079 buffer_info->dma,
2080 buffer_info->length,
2081 PCI_DMA_TODEVICE);
a9ebadd6 2082 buffer_info->dma = 0;
1da177e4 2083 }
a9ebadd6 2084 if (buffer_info->skb) {
1da177e4 2085 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 2086 buffer_info->skb = NULL;
2087 }
2088 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 2089}
2090
2091/**
2092 * e1000_clean_tx_ring - Free Tx Buffers
2093 * @adapter: board private structure
581d708e 2094 * @tx_ring: ring to be cleaned
1da177e4
LT		 2095 **/
2096
64798845
JP		 2097static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
2098 struct e1000_tx_ring *tx_ring)
1da177e4 2099{
1dc32918 2100 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2101 struct e1000_buffer *buffer_info;
2102 unsigned long size;
2103 unsigned int i;
2104
2105 /* Free all the Tx ring sk_buffs */
2106
96838a40 2107 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2108 buffer_info = &tx_ring->buffer_info[i];
2109 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2110 }
2111
2112 size = sizeof(struct e1000_buffer) * tx_ring->count;
2113 memset(tx_ring->buffer_info, 0, size);
2114
2115 /* Zero out the descriptor ring */
2116
2117 memset(tx_ring->desc, 0, tx_ring->size);
2118
2119 tx_ring->next_to_use = 0;
2120 tx_ring->next_to_clean = 0;
fd803241 2121 tx_ring->last_tx_tso = 0;
1da177e4 2122
1dc32918
JP		 2123 writel(0, hw->hw_addr + tx_ring->tdh);
2124 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2125}
2126
2127/**
2128 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2129 * @adapter: board private structure
2130 **/
2131
64798845 2132static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2133{
2134 int i;
2135
f56799ea 2136 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2137 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2138}
2139
2140/**
2141 * e1000_free_rx_resources - Free Rx Resources
2142 * @adapter: board private structure
581d708e 2143 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2144 *
2145 * Free all receive software resources
2146 **/
2147
64798845
JP		 2148static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2149 struct e1000_rx_ring *rx_ring)
1da177e4 2150{
1da177e4
LT		 2151 struct pci_dev *pdev = adapter->pdev;
2152
581d708e 2153 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2154
2155 vfree(rx_ring->buffer_info);
2156 rx_ring->buffer_info = NULL;
2157
2158 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2159
2160 rx_ring->desc = NULL;
2161}
2162
2163/**
581d708e 2164 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2165 * @adapter: board private structure
581d708e
MC		 2166 *
2167 * Free all receive software resources
2168 **/
2169
64798845 2170void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2171{
2172 int i;
2173
f56799ea 2174 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2175 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2176}
2177
2178/**
2179 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2180 * @adapter: board private structure
2181 * @rx_ring: ring to free buffers from
1da177e4
LT		 2182 **/
2183
64798845
JP		 2184static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2185 struct e1000_rx_ring *rx_ring)
1da177e4 2186{
1dc32918 2187 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2188 struct e1000_buffer *buffer_info;
2189 struct pci_dev *pdev = adapter->pdev;
2190 unsigned long size;
630b25cd 2191 unsigned int i;
1da177e4
LT		 2192
2193 /* Free all the Rx ring sk_buffs */
96838a40 2194 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2195 buffer_info = &rx_ring->buffer_info[i];
96838a40 2196 if (buffer_info->skb) {
1da177e4
LT		 2197 pci_unmap_single(pdev,
2198 buffer_info->dma,
2199 buffer_info->length,
2200 PCI_DMA_FROMDEVICE);
2201
2202 dev_kfree_skb(buffer_info->skb);
2203 buffer_info->skb = NULL;
997f5cbd 2204 }
1da177e4
LT		 2205 }
2206
2207 size = sizeof(struct e1000_buffer) * rx_ring->count;
2208 memset(rx_ring->buffer_info, 0, size);
2209
2210 /* Zero out the descriptor ring */
2211
2212 memset(rx_ring->desc, 0, rx_ring->size);
2213
2214 rx_ring->next_to_clean = 0;
2215 rx_ring->next_to_use = 0;
2216
1dc32918
JP		 2217 writel(0, hw->hw_addr + rx_ring->rdh);
2218 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2219}
2220
2221/**
2222 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2223 * @adapter: board private structure
2224 **/
2225
64798845 2226static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2227{
2228 int i;
2229
f56799ea 2230 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2231 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2232}
2233
2234/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2235 * and memory write and invalidate disabled for certain operations
2236 */
64798845 2237static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2238{
1dc32918 2239 struct e1000_hw *hw = &adapter->hw;
1da177e4 2240 struct net_device *netdev = adapter->netdev;
406874a7 2241 u32 rctl;
1da177e4 2242
1dc32918 2243 e1000_pci_clear_mwi(hw);
1da177e4 2244
1dc32918 2245 rctl = er32(RCTL);
1da177e4 2246 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2247 ew32(RCTL, rctl);
2248 E1000_WRITE_FLUSH();
1da177e4
LT		 2249 mdelay(5);
2250
96838a40 2251 if (netif_running(netdev))
581d708e 2252 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2253}
2254
64798845 2255static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2256{
1dc32918 2257 struct e1000_hw *hw = &adapter->hw;
1da177e4 2258 struct net_device *netdev = adapter->netdev;
406874a7 2259 u32 rctl;
1da177e4 2260
1dc32918 2261 rctl = er32(RCTL);
1da177e4 2262 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2263 ew32(RCTL, rctl);
2264 E1000_WRITE_FLUSH();
1da177e4
LT		 2265 mdelay(5);
2266
1dc32918
JP		 2267 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2268 e1000_pci_set_mwi(hw);
1da177e4 2269
96838a40 2270 if (netif_running(netdev)) {
72d64a43
JK		 2271 /* No need to loop, because 82542 supports only 1 queue */
2272 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2273 e1000_configure_rx(adapter);
72d64a43 2274 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2275 }
2276}
2277
2278/**
2279 * e1000_set_mac - Change the Ethernet Address of the NIC
2280 * @netdev: network interface device structure
2281 * @p: pointer to an address structure
2282 *
2283 * Returns 0 on success, negative on failure
2284 **/
2285
64798845 2286static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2287{
60490fe0 2288 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2289 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2290 struct sockaddr *addr = p;
2291
96838a40 2292 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2293 return -EADDRNOTAVAIL;
2294
2295 /* 82542 2.0 needs to be in reset to write receive address registers */
2296
1dc32918 2297 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2298 e1000_enter_82542_rst(adapter);
2299
2300 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2301 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2302
1dc32918 2303 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2304
868d5309
MC		 2305 /* With 82571 controllers, LAA may be overwritten (with the default)
2306 * due to controller reset from the other port. */
1dc32918 2307 if (hw->mac_type == e1000_82571) {
868d5309 2308 /* activate the work around */
1dc32918 2309 hw->laa_is_present = 1;
868d5309 2310
96838a40
JB		 2311 /* Hold a copy of the LAA in RAR[14] This is done so that
2312 * between the time RAR[0] gets clobbered and the time it
2313 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2314 * of the RARs and no incoming packets directed to this port
96838a40 2315 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2316 * RAR[14] */
1dc32918 2317 e1000_rar_set(hw, hw->mac_addr,
868d5309
MC		 2318 E1000_RAR_ENTRIES - 1);
2319 }
2320
1dc32918 2321 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2322 e1000_leave_82542_rst(adapter);
2323
2324 return 0;
2325}
2326
2327/**
db0ce50d 2328 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2329 * @netdev: network interface device structure
2330 *
db0ce50d
PM		 2331 * The set_rx_mode entry point is called whenever the unicast or multicast
2332 * address lists or the network interface flags are updated. This routine is
2333 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2334 * promiscuous mode, and all-multi behavior.
2335 **/
2336
64798845 2337static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2338{
60490fe0 2339 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2340 struct e1000_hw *hw = &adapter->hw;
db0ce50d
PM		 2341 struct dev_addr_list *uc_ptr;
2342 struct dev_addr_list *mc_ptr;
406874a7
JP		 2343 u32 rctl;
2344 u32 hash_value;
868d5309 2345 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2346 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2347 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2348 E1000_NUM_MTA_REGISTERS;
2349
1dc32918 2350 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 2351 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2352
868d5309 2353 /* reserve RAR[14] for LAA over-write work-around */
1dc32918 2354 if (hw->mac_type == e1000_82571)
868d5309 2355 rar_entries--;
1da177e4 2356
2648345f
MC		 2357 /* Check for Promiscuous and All Multicast modes */
2358
1dc32918 2359 rctl = er32(RCTL);
1da177e4 2360
96838a40 2361 if (netdev->flags & IFF_PROMISC) {
1da177e4 2362 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2363 rctl &= ~E1000_RCTL_VFE;
1da177e4 2364 } else {
746b9f02
PM		 2365 if (netdev->flags & IFF_ALLMULTI) {
2366 rctl |= E1000_RCTL_MPE;
2367 } else {
2368 rctl &= ~E1000_RCTL_MPE;
2369 }
78ed11a5 2370 if (adapter->hw.mac_type != e1000_ich8lan)
746b9f02 2371 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2372 }
2373
2374 uc_ptr = NULL;
2375 if (netdev->uc_count > rar_entries - 1) {
2376 rctl |= E1000_RCTL_UPE;
2377 } else if (!(netdev->flags & IFF_PROMISC)) {
2378 rctl &= ~E1000_RCTL_UPE;
2379 uc_ptr = netdev->uc_list;
1da177e4
LT		 2380 }
2381
1dc32918 2382 ew32(RCTL, rctl);
1da177e4
LT		 2383
2384 /* 82542 2.0 needs to be in reset to write receive address registers */
2385
96838a40 2386 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2387 e1000_enter_82542_rst(adapter);
2388
db0ce50d
PM		 2389 /* load the first 14 addresses into the exact filters 1-14. Unicast
2390 * addresses take precedence to avoid disabling unicast filtering
2391 * when possible.
2392 *
1da177e4
LT		 2393 * RAR 0 is used for the station MAC adddress
2394 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2395 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2396 */
2397 mc_ptr = netdev->mc_list;
2398
96838a40 2399 for (i = 1; i < rar_entries; i++) {
db0ce50d
PM		 2400 if (uc_ptr) {
2401 e1000_rar_set(hw, uc_ptr->da_addr, i);
2402 uc_ptr = uc_ptr->next;
2403 } else if (mc_ptr) {
2404 e1000_rar_set(hw, mc_ptr->da_addr, i);
1da177e4
LT		 2405 mc_ptr = mc_ptr->next;
2406 } else {
2407 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
1dc32918 2408 E1000_WRITE_FLUSH();
1da177e4 2409 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
1dc32918 2410 E1000_WRITE_FLUSH();
1da177e4
LT		 2411 }
2412 }
db0ce50d 2413 WARN_ON(uc_ptr != NULL);
1da177e4
LT		 2414
2415 /* clear the old settings from the multicast hash table */
2416
cd94dd0b 2417 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2418 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
1dc32918 2419 E1000_WRITE_FLUSH();
4ca213a6 2420 }
1da177e4
LT		 2421
2422 /* load any remaining addresses into the hash table */
2423
96838a40 2424 for (; mc_ptr; mc_ptr = mc_ptr->next) {
db0ce50d 2425 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
1da177e4
LT		 2426 e1000_mta_set(hw, hash_value);
2427 }
2428
96838a40 2429 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2430 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2431}
2432
2433/* Need to wait a few seconds after link up to get diagnostic information from
2434 * the phy */
2435
64798845 2436static void e1000_update_phy_info(unsigned long data)
1da177e4 2437{
e982f17c 2438 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP		 2439 struct e1000_hw *hw = &adapter->hw;
2440 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT		 2441}
2442
2443/**
2444 * e1000_82547_tx_fifo_stall - Timer Call-back
2445 * @data: pointer to adapter cast into an unsigned long
2446 **/
2447
64798845 2448static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2449{
e982f17c 2450 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2451 struct e1000_hw *hw = &adapter->hw;
1da177e4 2452 struct net_device *netdev = adapter->netdev;
406874a7 2453 u32 tctl;
1da177e4 2454
96838a40 2455 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2456 if ((er32(TDT) == er32(TDH)) &&
2457 (er32(TDFT) == er32(TDFH)) &&
2458 (er32(TDFTS) == er32(TDFHS))) {
2459 tctl = er32(TCTL);
2460 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2461 ew32(TDFT, adapter->tx_head_addr);
2462 ew32(TDFH, adapter->tx_head_addr);
2463 ew32(TDFTS, adapter->tx_head_addr);
2464 ew32(TDFHS, adapter->tx_head_addr);
2465 ew32(TCTL, tctl);
2466 E1000_WRITE_FLUSH();
1da177e4
LT		 2467
2468 adapter->tx_fifo_head = 0;
2469 atomic_set(&adapter->tx_fifo_stall, 0);
2470 netif_wake_queue(netdev);
2471 } else {
2472 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2473 }
2474 }
2475}
2476
2477/**
2478 * e1000_watchdog - Timer Call-back
2479 * @data: pointer to adapter cast into an unsigned long
2480 **/
64798845 2481static void e1000_watchdog(unsigned long data)
1da177e4 2482{
e982f17c 2483 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2484 struct e1000_hw *hw = &adapter->hw;
1da177e4 2485 struct net_device *netdev = adapter->netdev;
545c67c0 2486 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7
JP		 2487 u32 link, tctl;
2488 s32 ret_val;
cd94dd0b 2489
1dc32918 2490 ret_val = e1000_check_for_link(hw);
cd94dd0b 2491 if ((ret_val == E1000_ERR_PHY) &&
1dc32918
JP		 2492 (hw->phy_type == e1000_phy_igp_3) &&
2493 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
cd94dd0b
AK		 2494 /* See e1000_kumeran_lock_loss_workaround() */
2495 DPRINTK(LINK, INFO,
2496 "Gigabit has been disabled, downgrading speed\n");
2497 }
90fb5135 2498
1dc32918
JP		 2499 if (hw->mac_type == e1000_82573) {
2500 e1000_enable_tx_pkt_filtering(hw);
2501 if (adapter->mng_vlan_id != hw->mng_cookie.vlan_id)
2d7edb92 2502 e1000_update_mng_vlan(adapter);
96838a40 2503 }
1da177e4 2504
1dc32918
JP		 2505 if ((hw->media_type == e1000_media_type_internal_serdes) &&
2506 !(er32(TXCW) & E1000_TXCW_ANE))
2507 link = !hw->serdes_link_down;
1da177e4 2508 else
1dc32918 2509 link = er32(STATUS) & E1000_STATUS_LU;
1da177e4 2510
96838a40
JB		 2511 if (link) {
2512 if (!netif_carrier_ok(netdev)) {
406874a7 2513 u32 ctrl;
c3033b01 2514 bool txb2b = true;
1dc32918 2515 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2516 &adapter->link_speed,
2517 &adapter->link_duplex);
2518
1dc32918 2519 ctrl = er32(CTRL);
9669f53b
AK		 2520 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2521 "Flow Control: %s\n",
2522 adapter->link_speed,
2523 adapter->link_duplex == FULL_DUPLEX ?
2524 "Full Duplex" : "Half Duplex",
2525 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2526 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2527 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2528 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2529
7e6c9861
JK		 2530 /* tweak tx_queue_len according to speed/duplex
2531 * and adjust the timeout factor */
66a2b0a3
JK		 2532 netdev->tx_queue_len = adapter->tx_queue_len;
2533 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2534 switch (adapter->link_speed) {
2535 case SPEED_10:
c3033b01 2536 txb2b = false;
7e6c9861
JK		 2537 netdev->tx_queue_len = 10;
2538 adapter->tx_timeout_factor = 8;
2539 break;
2540 case SPEED_100:
c3033b01 2541 txb2b = false;
7e6c9861
JK		 2542 netdev->tx_queue_len = 100;
2543 /* maybe add some timeout factor ? */
2544 break;
2545 }
2546
1dc32918
JP		 2547 if ((hw->mac_type == e1000_82571 ||
2548 hw->mac_type == e1000_82572) &&
c3033b01 2549 !txb2b) {
406874a7 2550 u32 tarc0;
1dc32918 2551 tarc0 = er32(TARC0);
90fb5135 2552 tarc0 &= ~(1 << 21);
1dc32918 2553 ew32(TARC0, tarc0);
7e6c9861 2554 }
90fb5135 2555
7e6c9861
JK		 2556 /* disable TSO for pcie and 10/100 speeds, to avoid
2557 * some hardware issues */
2558 if (!adapter->tso_force &&
1dc32918 2559 hw->bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2560 switch (adapter->link_speed) {
2561 case SPEED_10:
66a2b0a3 2562 case SPEED_100:
7e6c9861
JK		 2563 DPRINTK(PROBE,INFO,
2564 "10/100 speed: disabling TSO\n");
2565 netdev->features &= ~NETIF_F_TSO;
87ca4e5b 2566 netdev->features &= ~NETIF_F_TSO6;
7e6c9861
JK		 2567 break;
2568 case SPEED_1000:
2569 netdev->features |= NETIF_F_TSO;
87ca4e5b 2570 netdev->features |= NETIF_F_TSO6;
7e6c9861
JK		 2571 break;
2572 default:
2573 /* oops */
66a2b0a3
JK		 2574 break;
2575 }
2576 }
7e6c9861
JK		 2577
2578 /* enable transmits in the hardware, need to do this
2579 * after setting TARC0 */
1dc32918 2580 tctl = er32(TCTL);
7e6c9861 2581 tctl |= E1000_TCTL_EN;
1dc32918 2582 ew32(TCTL, tctl);
66a2b0a3 2583
1da177e4
LT		 2584 netif_carrier_on(netdev);
2585 netif_wake_queue(netdev);
56e1393f 2586 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4 2587 adapter->smartspeed = 0;
bb8e3311
JG		 2588 } else {
2589 /* make sure the receive unit is started */
1dc32918
JP		 2590 if (hw->rx_needs_kicking) {
2591 u32 rctl = er32(RCTL);
2592 ew32(RCTL, rctl | E1000_RCTL_EN);
bb8e3311 2593 }
1da177e4
LT		 2594 }
2595 } else {
96838a40 2596 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2597 adapter->link_speed = 0;
2598 adapter->link_duplex = 0;
2599 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2600 netif_carrier_off(netdev);
2601 netif_stop_queue(netdev);
56e1393f 2602 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
87041639
JK		 2603
2604 /* 80003ES2LAN workaround--
2605 * For packet buffer work-around on link down event;
2606 * disable receives in the ISR and
2607 * reset device here in the watchdog
2608 */
1dc32918 2609 if (hw->mac_type == e1000_80003es2lan)
87041639
JK		 2610 /* reset device */
2611 schedule_work(&adapter->reset_task);
1da177e4
LT		 2612 }
2613
2614 e1000_smartspeed(adapter);
2615 }
2616
2617 e1000_update_stats(adapter);
2618
1dc32918 2619 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2620 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2621 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2622 adapter->colc_old = adapter->stats.colc;
2623
2624 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2625 adapter->gorcl_old = adapter->stats.gorcl;
2626 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2627 adapter->gotcl_old = adapter->stats.gotcl;
2628
1dc32918 2629 e1000_update_adaptive(hw);
1da177e4 2630
f56799ea 2631 if (!netif_carrier_ok(netdev)) {
581d708e 2632 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2633 /* We've lost link, so the controller stops DMA,
2634 * but we've got queued Tx work that's never going
2635 * to get done, so reset controller to flush Tx.
2636 * (Do the reset outside of interrupt context). */
87041639
JK		 2637 adapter->tx_timeout_count++;
2638 schedule_work(&adapter->reset_task);
1da177e4
LT		 2639 }
2640 }
2641
1da177e4 2642 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2643 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2644
2648345f 2645 /* Force detection of hung controller every watchdog period */
c3033b01 2646 adapter->detect_tx_hung = true;
1da177e4 2647
96838a40 2648 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309 2649 * reset from the other port. Set the appropriate LAA in RAR[0] */
1dc32918
JP		 2650 if (hw->mac_type == e1000_82571 && hw->laa_is_present)
2651 e1000_rar_set(hw, hw->mac_addr, 0);
868d5309 2652
1da177e4 2653 /* Reset the timer */
56e1393f 2654 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2655}
2656
835bb129
JB		 2657enum latency_range {
2658 lowest_latency = 0,
2659 low_latency = 1,
2660 bulk_latency = 2,
2661 latency_invalid = 255
2662};
2663
2664/**
2665 * e1000_update_itr - update the dynamic ITR value based on statistics
2666 * Stores a new ITR value based on packets and byte
2667 * counts during the last interrupt. The advantage of per interrupt
2668 * computation is faster updates and more accurate ITR for the current
2669 * traffic pattern. Constants in this function were computed
2670 * based on theoretical maximum wire speed and thresholds were set based
2671 * on testing data as well as attempting to minimize response time
2672 * while increasing bulk throughput.
2673 * this functionality is controlled by the InterruptThrottleRate module
2674 * parameter (see e1000_param.c)
2675 * @adapter: pointer to adapter
2676 * @itr_setting: current adapter->itr
2677 * @packets: the number of packets during this measurement interval
2678 * @bytes: the number of bytes during this measurement interval
2679 **/
2680static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2681 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2682{
2683 unsigned int retval = itr_setting;
2684 struct e1000_hw *hw = &adapter->hw;
2685
2686 if (unlikely(hw->mac_type < e1000_82540))
2687 goto update_itr_done;
2688
2689 if (packets == 0)
2690 goto update_itr_done;
2691
835bb129
JB		 2692 switch (itr_setting) {
2693 case lowest_latency:
2b65326e
JB		 2694 /* jumbo frames get bulk treatment*/
2695 if (bytes/packets > 8000)
2696 retval = bulk_latency;
2697 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2698 retval = low_latency;
2699 break;
2700 case low_latency: /* 50 usec aka 20000 ints/s */
2701 if (bytes > 10000) {
2b65326e
JB		 2702 /* jumbo frames need bulk latency setting */
2703 if (bytes/packets > 8000)
2704 retval = bulk_latency;
2705 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2706 retval = bulk_latency;
2707 else if ((packets > 35))
2708 retval = lowest_latency;
2b65326e
JB		 2709 } else if (bytes/packets > 2000)
2710 retval = bulk_latency;
2711 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2712 retval = lowest_latency;
2713 break;
2714 case bulk_latency: /* 250 usec aka 4000 ints/s */
2715 if (bytes > 25000) {
2716 if (packets > 35)
2717 retval = low_latency;
2b65326e
JB		 2718 } else if (bytes < 6000) {
2719 retval = low_latency;
835bb129
JB		 2720 }
2721 break;
2722 }
2723
2724update_itr_done:
2725 return retval;
2726}
2727
2728static void e1000_set_itr(struct e1000_adapter *adapter)
2729{
2730 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2731 u16 current_itr;
2732 u32 new_itr = adapter->itr;
835bb129
JB		 2733
2734 if (unlikely(hw->mac_type < e1000_82540))
2735 return;
2736
2737 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2738 if (unlikely(adapter->link_speed != SPEED_1000)) {
2739 current_itr = 0;
2740 new_itr = 4000;
2741 goto set_itr_now;
2742 }
2743
2744 adapter->tx_itr = e1000_update_itr(adapter,
2745 adapter->tx_itr,
2746 adapter->total_tx_packets,
2747 adapter->total_tx_bytes);
2b65326e
JB		 2748 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2749 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2750 adapter->tx_itr = low_latency;
2751
835bb129
JB		 2752 adapter->rx_itr = e1000_update_itr(adapter,
2753 adapter->rx_itr,
2754 adapter->total_rx_packets,
2755 adapter->total_rx_bytes);
2b65326e
JB		 2756 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2757 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2758 adapter->rx_itr = low_latency;
835bb129
JB		 2759
2760 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2761
835bb129
JB		 2762 switch (current_itr) {
2763 /* counts and packets in update_itr are dependent on these numbers */
2764 case lowest_latency:
2765 new_itr = 70000;
2766 break;
2767 case low_latency:
2768 new_itr = 20000; /* aka hwitr = ~200 */
2769 break;
2770 case bulk_latency:
2771 new_itr = 4000;
2772 break;
2773 default:
2774 break;
2775 }
2776
2777set_itr_now:
2778 if (new_itr != adapter->itr) {
2779 /* this attempts to bias the interrupt rate towards Bulk
2780 * by adding intermediate steps when interrupt rate is
2781 * increasing */
2782 new_itr = new_itr > adapter->itr ?
2783 min(adapter->itr + (new_itr >> 2), new_itr) :
2784 new_itr;
2785 adapter->itr = new_itr;
1dc32918 2786 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129
JB		 2787 }
2788
2789 return;
2790}
2791
1da177e4
LT		 2792#define E1000_TX_FLAGS_CSUM 0x00000001
2793#define E1000_TX_FLAGS_VLAN 0x00000002
2794#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2795#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2796#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2797#define E1000_TX_FLAGS_VLAN_SHIFT 16
2798
64798845
JP		 2799static int e1000_tso(struct e1000_adapter *adapter,
2800 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2801{
1da177e4 2802 struct e1000_context_desc *context_desc;
545c67c0 2803 struct e1000_buffer *buffer_info;
1da177e4 2804 unsigned int i;
406874a7
JP		 2805 u32 cmd_length = 0;
2806 u16 ipcse = 0, tucse, mss;
2807 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2808 int err;
2809
89114afd 2810 if (skb_is_gso(skb)) {
1da177e4
LT		 2811 if (skb_header_cloned(skb)) {
2812 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2813 if (err)
2814 return err;
2815 }
2816
ab6a5bb6 2817 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2818 mss = skb_shinfo(skb)->gso_size;
60828236 2819 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2820 struct iphdr *iph = ip_hdr(skb);
2821 iph->tot_len = 0;
2822 iph->check = 0;
aa8223c7
ACM		 2823 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2824 iph->daddr, 0,
2825 IPPROTO_TCP,
2826 0);
2d7edb92 2827 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2828 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2829 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2830 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2831 tcp_hdr(skb)->check =
0660e03f
ACM		 2832 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2833 &ipv6_hdr(skb)->daddr,
2834 0, IPPROTO_TCP, 0);
2d7edb92 2835 ipcse = 0;
2d7edb92 2836 }
bbe735e4 2837 ipcss = skb_network_offset(skb);
eddc9ec5 2838 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2839 tucss = skb_transport_offset(skb);
aa8223c7 2840 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2841 tucse = 0;
2842
2843 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2844 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2845
581d708e
MC		 2846 i = tx_ring->next_to_use;
2847 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2848 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2849
2850 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2851 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2852 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2853 context_desc->upper_setup.tcp_fields.tucss = tucss;
2854 context_desc->upper_setup.tcp_fields.tucso = tucso;
2855 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2856 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2857 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2858 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2859
545c67c0 2860 buffer_info->time_stamp = jiffies;
a9ebadd6 2861 buffer_info->next_to_watch = i;
545c67c0 2862
581d708e
MC		 2863 if (++i == tx_ring->count) i = 0;
2864 tx_ring->next_to_use = i;
1da177e4 2865
c3033b01 2866 return true;
1da177e4 2867 }
c3033b01 2868 return false;
1da177e4
LT		 2869}
2870
64798845
JP		 2871static bool e1000_tx_csum(struct e1000_adapter *adapter,
2872 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2873{
2874 struct e1000_context_desc *context_desc;
545c67c0 2875 struct e1000_buffer *buffer_info;
1da177e4 2876 unsigned int i;
406874a7 2877 u8 css;
3ed30676 2878 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2879
3ed30676
DG		 2880 if (skb->ip_summed != CHECKSUM_PARTIAL)
2881 return false;
1da177e4 2882
3ed30676
DG		 2883 switch (skb->protocol) {
2884 case __constant_htons(ETH_P_IP):
2885 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2886 cmd_len |= E1000_TXD_CMD_TCP;
2887 break;
2888 case __constant_htons(ETH_P_IPV6):
2889 /* XXX not handling all IPV6 headers */
2890 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2891 cmd_len |= E1000_TXD_CMD_TCP;
2892 break;
2893 default:
2894 if (unlikely(net_ratelimit()))
2895 DPRINTK(DRV, WARNING,
2896 "checksum_partial proto=%x!\n", skb->protocol);
2897 break;
2898 }
1da177e4 2899
3ed30676 2900 css = skb_transport_offset(skb);
1da177e4 2901
3ed30676
DG		 2902 i = tx_ring->next_to_use;
2903 buffer_info = &tx_ring->buffer_info[i];
2904 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2905
3ed30676
DG		 2906 context_desc->lower_setup.ip_config = 0;
2907 context_desc->upper_setup.tcp_fields.tucss = css;
2908 context_desc->upper_setup.tcp_fields.tucso =
2909 css + skb->csum_offset;
2910 context_desc->upper_setup.tcp_fields.tucse = 0;
2911 context_desc->tcp_seg_setup.data = 0;
2912 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2913
3ed30676
DG		 2914 buffer_info->time_stamp = jiffies;
2915 buffer_info->next_to_watch = i;
1da177e4 2916
3ed30676
DG		 2917 if (unlikely(++i == tx_ring->count)) i = 0;
2918 tx_ring->next_to_use = i;
2919
2920 return true;
1da177e4
LT		 2921}
2922
2923#define E1000_MAX_TXD_PWR 12
2924#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2925
64798845
JP		 2926static int e1000_tx_map(struct e1000_adapter *adapter,
2927 struct e1000_tx_ring *tx_ring,
2928 struct sk_buff *skb, unsigned int first,
2929 unsigned int max_per_txd, unsigned int nr_frags,
2930 unsigned int mss)
1da177e4 2931{
1dc32918 2932 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2933 struct e1000_buffer *buffer_info;
2934 unsigned int len = skb->len;
2935 unsigned int offset = 0, size, count = 0, i;
2936 unsigned int f;
2937 len -= skb->data_len;
2938
2939 i = tx_ring->next_to_use;
2940
96838a40 2941 while (len) {
1da177e4
LT		 2942 buffer_info = &tx_ring->buffer_info[i];
2943 size = min(len, max_per_txd);
fd803241
JK		 2944 /* Workaround for Controller erratum --
2945 * descriptor for non-tso packet in a linear SKB that follows a
2946 * tso gets written back prematurely before the data is fully
0f15a8fa 2947 * DMA'd to the controller */
fd803241 2948 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2949 !skb_is_gso(skb)) {
fd803241
JK		 2950 tx_ring->last_tx_tso = 0;
2951 size -= 4;
2952 }
2953
1da177e4
LT		 2954 /* Workaround for premature desc write-backs
2955 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2956 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2957 size -= 4;
97338bde
MC		 2958 /* work-around for errata 10 and it applies
2959 * to all controllers in PCI-X mode
2960 * The fix is to make sure that the first descriptor of a
2961 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2962 */
1dc32918 2963 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2964 (size > 2015) && count == 0))
2965 size = 2015;
96838a40 2966
1da177e4
LT		 2967 /* Workaround for potential 82544 hang in PCI-X. Avoid
2968 * terminating buffers within evenly-aligned dwords. */
96838a40 2969 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2970 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2971 size > 4))
2972 size -= 4;
2973
2974 buffer_info->length = size;
2975 buffer_info->dma =
2976 pci_map_single(adapter->pdev,
2977 skb->data + offset,
2978 size,
2979 PCI_DMA_TODEVICE);
2980 buffer_info->time_stamp = jiffies;
a9ebadd6 2981 buffer_info->next_to_watch = i;
1da177e4
LT		 2982
2983 len -= size;
2984 offset += size;
2985 count++;
96838a40 2986 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2987 }
2988
96838a40 2989 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2990 struct skb_frag_struct *frag;
2991
2992 frag = &skb_shinfo(skb)->frags[f];
2993 len = frag->size;
2994 offset = frag->page_offset;
2995
96838a40 2996 while (len) {
1da177e4
LT		 2997 buffer_info = &tx_ring->buffer_info[i];
2998 size = min(len, max_per_txd);
1da177e4
LT		 2999 /* Workaround for premature desc write-backs
3000 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3001 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 3002 size -= 4;
1da177e4
LT		 3003 /* Workaround for potential 82544 hang in PCI-X.
3004 * Avoid terminating buffers within evenly-aligned
3005 * dwords. */
96838a40 3006 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3007 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3008 size > 4))
3009 size -= 4;
3010
3011 buffer_info->length = size;
3012 buffer_info->dma =
3013 pci_map_page(adapter->pdev,
3014 frag->page,
3015 offset,
3016 size,
3017 PCI_DMA_TODEVICE);
3018 buffer_info->time_stamp = jiffies;
a9ebadd6 3019 buffer_info->next_to_watch = i;
1da177e4
LT		 3020
3021 len -= size;
3022 offset += size;
3023 count++;
96838a40 3024 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3025 }
3026 }
3027
3028 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3029 tx_ring->buffer_info[i].skb = skb;
3030 tx_ring->buffer_info[first].next_to_watch = i;
3031
3032 return count;
3033}
3034
64798845
JP		 3035static void e1000_tx_queue(struct e1000_adapter *adapter,
3036 struct e1000_tx_ring *tx_ring, int tx_flags,
3037 int count)
1da177e4 3038{
1dc32918 3039 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3040 struct e1000_tx_desc *tx_desc = NULL;
3041 struct e1000_buffer *buffer_info;
406874a7 3042 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 3043 unsigned int i;
3044
96838a40 3045 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 3046 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3047 E1000_TXD_CMD_TSE;
2d7edb92
MC		 3048 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3049
96838a40 3050 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 3051 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 3052 }
3053
96838a40 3054 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 3055 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3056 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3057 }
3058
96838a40 3059 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3060 txd_lower |= E1000_TXD_CMD_VLE;
3061 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3062 }
3063
3064 i = tx_ring->next_to_use;
3065
96838a40 3066 while (count--) {
1da177e4
LT		 3067 buffer_info = &tx_ring->buffer_info[i];
3068 tx_desc = E1000_TX_DESC(*tx_ring, i);
3069 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3070 tx_desc->lower.data =
3071 cpu_to_le32(txd_lower | buffer_info->length);
3072 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3073 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3074 }
3075
3076 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3077
3078 /* Force memory writes to complete before letting h/w
3079 * know there are new descriptors to fetch. (Only
3080 * applicable for weak-ordered memory model archs,
3081 * such as IA-64). */
3082 wmb();
3083
3084 tx_ring->next_to_use = i;
1dc32918 3085 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 3086 /* we need this if more than one processor can write to our tail
3087 * at a time, it syncronizes IO on IA64/Altix systems */
3088 mmiowb();
1da177e4
LT		 3089}
3090
3091/**
3092 * 82547 workaround to avoid controller hang in half-duplex environment.
3093 * The workaround is to avoid queuing a large packet that would span
3094 * the internal Tx FIFO ring boundary by notifying the stack to resend
3095 * the packet at a later time. This gives the Tx FIFO an opportunity to
3096 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3097 * to the beginning of the Tx FIFO.
3098 **/
3099
3100#define E1000_FIFO_HDR 0x10
3101#define E1000_82547_PAD_LEN 0x3E0
3102
64798845
JP		 3103static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3104 struct sk_buff *skb)
1da177e4 3105{
406874a7
JP		 3106 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3107 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3108
9099cfb9 3109 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3110
96838a40 3111 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3112 goto no_fifo_stall_required;
3113
96838a40 3114 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3115 return 1;
3116
96838a40 3117 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3118 atomic_set(&adapter->tx_fifo_stall, 1);
3119 return 1;
3120 }
3121
3122no_fifo_stall_required:
3123 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3124 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3125 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3126 return 0;
3127}
3128
2d7edb92 3129#define MINIMUM_DHCP_PACKET_SIZE 282
64798845
JP		 3130static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3131 struct sk_buff *skb)
2d7edb92
MC		 3132{
3133 struct e1000_hw *hw = &adapter->hw;
406874a7 3134 u16 length, offset;
96838a40 3135 if (vlan_tx_tag_present(skb)) {
1dc32918
JP		 3136 if (!((vlan_tx_tag_get(skb) == hw->mng_cookie.vlan_id) &&
3137 ( hw->mng_cookie.status &
2d7edb92
MC		 3138 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3139 return 0;
3140 }
20a44028 3141 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
e982f17c 3142 struct ethhdr *eth = (struct ethhdr *)skb->data;
96838a40
JB		 3143 if ((htons(ETH_P_IP) == eth->h_proto)) {
3144 const struct iphdr *ip =
406874a7 3145 (struct iphdr *)((u8 *)skb->data+14);
96838a40
JB		 3146 if (IPPROTO_UDP == ip->protocol) {
3147 struct udphdr *udp =
406874a7 3148 (struct udphdr *)((u8 *)ip +
2d7edb92 3149 (ip->ihl << 2));
96838a40 3150 if (ntohs(udp->dest) == 67) {
406874a7 3151 offset = (u8 *)udp + 8 - skb->data;
2d7edb92
MC		 3152 length = skb->len - offset;
3153
3154 return e1000_mng_write_dhcp_info(hw,
406874a7 3155 (u8 *)udp + 8,
2d7edb92
MC		 3156 length);
3157 }
3158 }
3159 }
3160 }
3161 return 0;
3162}
3163
65c7973f
JB		 3164static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3165{
3166 struct e1000_adapter *adapter = netdev_priv(netdev);
3167 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3168
3169 netif_stop_queue(netdev);
3170 /* Herbert's original patch had:
3171 * smp_mb__after_netif_stop_queue();
3172 * but since that doesn't exist yet, just open code it. */
3173 smp_mb();
3174
3175 /* We need to check again in a case another CPU has just
3176 * made room available. */
3177 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3178 return -EBUSY;
3179
3180 /* A reprieve! */
3181 netif_start_queue(netdev);
fcfb1224 3182 ++adapter->restart_queue;
65c7973f
JB		 3183 return 0;
3184}
3185
3186static int e1000_maybe_stop_tx(struct net_device *netdev,
3187 struct e1000_tx_ring *tx_ring, int size)
3188{
3189 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3190 return 0;
3191 return __e1000_maybe_stop_tx(netdev, size);
3192}
3193
1da177e4 3194#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
64798845 3195static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1da177e4 3196{
60490fe0 3197 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3198 struct e1000_hw *hw = &adapter->hw;
581d708e 3199 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3200 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3201 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3202 unsigned int tx_flags = 0;
6d1e3aa7 3203 unsigned int len = skb->len - skb->data_len;
1da177e4 3204 unsigned long flags;
6d1e3aa7
KK		 3205 unsigned int nr_frags;
3206 unsigned int mss;
1da177e4 3207 int count = 0;
76c224bc 3208 int tso;
1da177e4 3209 unsigned int f;
1da177e4 3210
65c7973f
JB		 3211 /* This goes back to the question of how to logically map a tx queue
3212 * to a flow. Right now, performance is impacted slightly negatively
3213 * if using multiple tx queues. If the stack breaks away from a
3214 * single qdisc implementation, we can look at this again. */
581d708e 3215 tx_ring = adapter->tx_ring;
24025e4e 3216
581d708e 3217 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3218 dev_kfree_skb_any(skb);
3219 return NETDEV_TX_OK;
3220 }
3221
032fe6e9
JB		 3222 /* 82571 and newer doesn't need the workaround that limited descriptor
3223 * length to 4kB */
1dc32918 3224 if (hw->mac_type >= e1000_82571)
032fe6e9
JB		 3225 max_per_txd = 8192;
3226
7967168c 3227 mss = skb_shinfo(skb)->gso_size;
76c224bc 3228 /* The controller does a simple calculation to
1da177e4
LT		 3229 * make sure there is enough room in the FIFO before
3230 * initiating the DMA for each buffer. The calc is:
3231 * 4 = ceil(buffer len/mss). To make sure we don't
3232 * overrun the FIFO, adjust the max buffer len if mss
3233 * drops. */
96838a40 3234 if (mss) {
406874a7 3235 u8 hdr_len;
1da177e4
LT		 3236 max_per_txd = min(mss << 2, max_per_txd);
3237 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3238
90fb5135
AK		 3239 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3240 * points to just header, pull a few bytes of payload from
3241 * frags into skb->data */
ab6a5bb6 3242 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3243 if (skb->data_len && hdr_len == len) {
1dc32918 3244 switch (hw->mac_type) {
9f687888 3245 unsigned int pull_size;
683a2aa3
HX		 3246 case e1000_82544:
3247 /* Make sure we have room to chop off 4 bytes,
3248 * and that the end alignment will work out to
3249 * this hardware's requirements
3250 * NOTE: this is a TSO only workaround
3251 * if end byte alignment not correct move us
3252 * into the next dword */
27a884dc 3253 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 3254 break;
3255 /* fall through */
9f687888
JK		 3256 case e1000_82571:
3257 case e1000_82572:
3258 case e1000_82573:
cd94dd0b 3259 case e1000_ich8lan:
9f687888
JK		 3260 pull_size = min((unsigned int)4, skb->data_len);
3261 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3262 DPRINTK(DRV, ERR,
9f687888
JK		 3263 "__pskb_pull_tail failed.\n");
3264 dev_kfree_skb_any(skb);
749dfc70 3265 return NETDEV_TX_OK;
9f687888
JK		 3266 }
3267 len = skb->len - skb->data_len;
3268 break;
3269 default:
3270 /* do nothing */
3271 break;
d74bbd3b 3272 }
9a3056da 3273 }
1da177e4
LT		 3274 }
3275
9a3056da 3276 /* reserve a descriptor for the offload context */
84fa7933 3277 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3278 count++;
2648345f 3279 count++;
fd803241 3280
fd803241 3281 /* Controller Erratum workaround */
89114afd 3282 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3283 count++;
fd803241 3284
1da177e4
LT		 3285 count += TXD_USE_COUNT(len, max_txd_pwr);
3286
96838a40 3287 if (adapter->pcix_82544)
1da177e4
LT		 3288 count++;
3289
96838a40 3290 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3291 * in PCI-X mode, so add one more descriptor to the count
3292 */
1dc32918 3293 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3294 (len > 2015)))
3295 count++;
3296
1da177e4 3297 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3298 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3299 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3300 max_txd_pwr);
96838a40 3301 if (adapter->pcix_82544)
1da177e4
LT		 3302 count += nr_frags;
3303
0f15a8fa 3304
1dc32918
JP		 3305 if (hw->tx_pkt_filtering &&
3306 (hw->mac_type == e1000_82573))
2d7edb92
MC		 3307 e1000_transfer_dhcp_info(adapter, skb);
3308
f50393fe 3309 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
581d708e 3310 /* Collision - tell upper layer to requeue */
581d708e 3311 return NETDEV_TX_LOCKED;
1da177e4
LT		 3312
3313 /* need: count + 2 desc gap to keep tail from touching
3314 * head, otherwise try next time */
65c7973f 3315 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3316 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3317 return NETDEV_TX_BUSY;
3318 }
3319
1dc32918 3320 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3321 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3322 netif_stop_queue(netdev);
1314bbf3 3323 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
581d708e 3324 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3325 return NETDEV_TX_BUSY;
3326 }
3327 }
3328
96838a40 3329 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3330 tx_flags |= E1000_TX_FLAGS_VLAN;
3331 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3332 }
3333
581d708e 3334 first = tx_ring->next_to_use;
96838a40 3335
581d708e 3336 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3337 if (tso < 0) {
3338 dev_kfree_skb_any(skb);
581d708e 3339 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3340 return NETDEV_TX_OK;
3341 }
3342
fd803241
JK		 3343 if (likely(tso)) {
3344 tx_ring->last_tx_tso = 1;
1da177e4 3345 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3346 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3347 tx_flags |= E1000_TX_FLAGS_CSUM;
3348
2d7edb92 3349 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3350 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3351 * no longer assume, we must. */
60828236 3352 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3353 tx_flags |= E1000_TX_FLAGS_IPV4;
3354
581d708e
MC		 3355 e1000_tx_queue(adapter, tx_ring, tx_flags,
3356 e1000_tx_map(adapter, tx_ring, skb, first,
3357 max_per_txd, nr_frags, mss));
1da177e4
LT		 3358
3359 netdev->trans_start = jiffies;
3360
3361 /* Make sure there is space in the ring for the next send. */
65c7973f 3362 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3363
581d708e 3364 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3365 return NETDEV_TX_OK;
3366}
3367
3368/**
3369 * e1000_tx_timeout - Respond to a Tx Hang
3370 * @netdev: network interface device structure
3371 **/
3372
64798845 3373static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3374{
60490fe0 3375 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3376
3377 /* Do the reset outside of interrupt context */
87041639
JK		 3378 adapter->tx_timeout_count++;
3379 schedule_work(&adapter->reset_task);
1da177e4
LT		 3380}
3381
64798845 3382static void e1000_reset_task(struct work_struct *work)
1da177e4 3383{
65f27f38
DH		 3384 struct e1000_adapter *adapter =
3385 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3386
2db10a08 3387 e1000_reinit_locked(adapter);
1da177e4
LT		 3388}
3389
3390/**
3391 * e1000_get_stats - Get System Network Statistics
3392 * @netdev: network interface device structure
3393 *
3394 * Returns the address of the device statistics structure.
3395 * The statistics are actually updated from the timer callback.
3396 **/
3397
64798845 3398static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3399{
60490fe0 3400 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3401
6b7660cd 3402 /* only return the current stats */
1da177e4
LT		 3403 return &adapter->net_stats;
3404}
3405
3406/**
3407 * e1000_change_mtu - Change the Maximum Transfer Unit
3408 * @netdev: network interface device structure
3409 * @new_mtu: new value for maximum frame size
3410 *
3411 * Returns 0 on success, negative on failure
3412 **/
3413
64798845 3414static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3415{
60490fe0 3416 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3417 struct e1000_hw *hw = &adapter->hw;
1da177e4 3418 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
406874a7 3419 u16 eeprom_data = 0;
1da177e4 3420
96838a40
JB		 3421 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3422 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3423 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3424 return -EINVAL;
2d7edb92 3425 }
1da177e4 3426
997f5cbd 3427 /* Adapter-specific max frame size limits. */
1dc32918 3428 switch (hw->mac_type) {
9e2feace 3429 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3430 case e1000_ich8lan:
997f5cbd
JK		 3431 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3432 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3433 return -EINVAL;
2d7edb92 3434 }
997f5cbd 3435 break;
85b22eb6 3436 case e1000_82573:
249d71d6
BA		 3437 /* Jumbo Frames not supported if:
3438 * - this is not an 82573L device
3439 * - ASPM is enabled in any way (0x1A bits 3:2) */
1dc32918 3440 e1000_read_eeprom(hw, EEPROM_INIT_3GIO_3, 1,
85b22eb6 3441 &eeprom_data);
1dc32918 3442 if ((hw->device_id != E1000_DEV_ID_82573L) ||
249d71d6 3443 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3444 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3445 DPRINTK(PROBE, ERR,
3446 "Jumbo Frames not supported.\n");
3447 return -EINVAL;
3448 }
3449 break;
3450 }
249d71d6
BA		 3451 /* ERT will be enabled later to enable wire speed receives */
3452
85b22eb6 3453 /* fall through to get support */
997f5cbd
JK		 3454 case e1000_82571:
3455 case e1000_82572:
87041639 3456 case e1000_80003es2lan:
997f5cbd
JK		 3457#define MAX_STD_JUMBO_FRAME_SIZE 9234
3458 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3459 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3460 return -EINVAL;
3461 }
3462 break;
3463 default:
3464 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3465 break;
1da177e4
LT		 3466 }
3467
87f5032e 3468 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3469 * means we reserve 2 more, this pushes us to allocate from the next
3470 * larger slab size
3471 * i.e. RXBUFFER_2048 --> size-4096 slab */
3472
3473 if (max_frame <= E1000_RXBUFFER_256)
3474 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3475 else if (max_frame <= E1000_RXBUFFER_512)
3476 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3477 else if (max_frame <= E1000_RXBUFFER_1024)
3478 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3479 else if (max_frame <= E1000_RXBUFFER_2048)
3480 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3481 else if (max_frame <= E1000_RXBUFFER_4096)
3482 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3483 else if (max_frame <= E1000_RXBUFFER_8192)
3484 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3485 else if (max_frame <= E1000_RXBUFFER_16384)
3486 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3487
3488 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3489 if (!hw->tbi_compatibility_on &&
9e2feace
AK		 3490 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3491 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3492 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3493
2d7edb92 3494 netdev->mtu = new_mtu;
1dc32918 3495 hw->max_frame_size = max_frame;
2d7edb92 3496
2db10a08
AK		 3497 if (netif_running(netdev))
3498 e1000_reinit_locked(adapter);
1da177e4 3499
1da177e4
LT		 3500 return 0;
3501}
3502
3503/**
3504 * e1000_update_stats - Update the board statistics counters
3505 * @adapter: board private structure
3506 **/
3507
64798845 3508void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4
LT		 3509{
3510 struct e1000_hw *hw = &adapter->hw;
282f33c9 3511 struct pci_dev *pdev = adapter->pdev;
1da177e4 3512 unsigned long flags;
406874a7 3513 u16 phy_tmp;
1da177e4
LT		 3514
3515#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3516
282f33c9
LV		 3517 /*
3518 * Prevent stats update while adapter is being reset, or if the pci
3519 * connection is down.
3520 */
9026729b 3521 if (adapter->link_speed == 0)
282f33c9 3522 return;
81b1955e 3523 if (pci_channel_offline(pdev))
9026729b
AK		 3524 return;
3525
1da177e4
LT		 3526 spin_lock_irqsave(&adapter->stats_lock, flags);
3527
828d055f 3528 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3529 * called from the interrupt context, so they must only
3530 * be written while holding adapter->stats_lock
3531 */
3532
1dc32918
JP		 3533 adapter->stats.crcerrs += er32(CRCERRS);
3534 adapter->stats.gprc += er32(GPRC);
3535 adapter->stats.gorcl += er32(GORCL);
3536 adapter->stats.gorch += er32(GORCH);
3537 adapter->stats.bprc += er32(BPRC);
3538 adapter->stats.mprc += er32(MPRC);
3539 adapter->stats.roc += er32(ROC);
3540
3541 if (hw->mac_type != e1000_ich8lan) {
3542 adapter->stats.prc64 += er32(PRC64);
3543 adapter->stats.prc127 += er32(PRC127);
3544 adapter->stats.prc255 += er32(PRC255);
3545 adapter->stats.prc511 += er32(PRC511);
3546 adapter->stats.prc1023 += er32(PRC1023);
3547 adapter->stats.prc1522 += er32(PRC1522);
3548 }
3549
3550 adapter->stats.symerrs += er32(SYMERRS);
3551 adapter->stats.mpc += er32(MPC);
3552 adapter->stats.scc += er32(SCC);
3553 adapter->stats.ecol += er32(ECOL);
3554 adapter->stats.mcc += er32(MCC);
3555 adapter->stats.latecol += er32(LATECOL);
3556 adapter->stats.dc += er32(DC);
3557 adapter->stats.sec += er32(SEC);
3558 adapter->stats.rlec += er32(RLEC);
3559 adapter->stats.xonrxc += er32(XONRXC);
3560 adapter->stats.xontxc += er32(XONTXC);
3561 adapter->stats.xoffrxc += er32(XOFFRXC);
3562 adapter->stats.xofftxc += er32(XOFFTXC);
3563 adapter->stats.fcruc += er32(FCRUC);
3564 adapter->stats.gptc += er32(GPTC);
3565 adapter->stats.gotcl += er32(GOTCL);
3566 adapter->stats.gotch += er32(GOTCH);
3567 adapter->stats.rnbc += er32(RNBC);
3568 adapter->stats.ruc += er32(RUC);
3569 adapter->stats.rfc += er32(RFC);
3570 adapter->stats.rjc += er32(RJC);
3571 adapter->stats.torl += er32(TORL);
3572 adapter->stats.torh += er32(TORH);
3573 adapter->stats.totl += er32(TOTL);
3574 adapter->stats.toth += er32(TOTH);
3575 adapter->stats.tpr += er32(TPR);
3576
3577 if (hw->mac_type != e1000_ich8lan) {
3578 adapter->stats.ptc64 += er32(PTC64);
3579 adapter->stats.ptc127 += er32(PTC127);
3580 adapter->stats.ptc255 += er32(PTC255);
3581 adapter->stats.ptc511 += er32(PTC511);
3582 adapter->stats.ptc1023 += er32(PTC1023);
3583 adapter->stats.ptc1522 += er32(PTC1522);
3584 }
3585
3586 adapter->stats.mptc += er32(MPTC);
3587 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3588
3589 /* used for adaptive IFS */
3590
1dc32918 3591 hw->tx_packet_delta = er32(TPT);
1da177e4 3592 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3593 hw->collision_delta = er32(COLC);
1da177e4
LT		 3594 adapter->stats.colc += hw->collision_delta;
3595
96838a40 3596 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3597 adapter->stats.algnerrc += er32(ALGNERRC);
3598 adapter->stats.rxerrc += er32(RXERRC);
3599 adapter->stats.tncrs += er32(TNCRS);
3600 adapter->stats.cexterr += er32(CEXTERR);
3601 adapter->stats.tsctc += er32(TSCTC);
3602 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4 3603 }
96838a40 3604 if (hw->mac_type > e1000_82547_rev_2) {
1dc32918
JP		 3605 adapter->stats.iac += er32(IAC);
3606 adapter->stats.icrxoc += er32(ICRXOC);
3607
3608 if (hw->mac_type != e1000_ich8lan) {
3609 adapter->stats.icrxptc += er32(ICRXPTC);
3610 adapter->stats.icrxatc += er32(ICRXATC);
3611 adapter->stats.ictxptc += er32(ICTXPTC);
3612 adapter->stats.ictxatc += er32(ICTXATC);
3613 adapter->stats.ictxqec += er32(ICTXQEC);
3614 adapter->stats.ictxqmtc += er32(ICTXQMTC);
3615 adapter->stats.icrxdmtc += er32(ICRXDMTC);
cd94dd0b 3616 }
2d7edb92 3617 }
1da177e4
LT		 3618
3619 /* Fill out the OS statistics structure */
1da177e4
LT		 3620 adapter->net_stats.multicast = adapter->stats.mprc;
3621 adapter->net_stats.collisions = adapter->stats.colc;
3622
3623 /* Rx Errors */
3624
87041639
JK		 3625 /* RLEC on some newer hardware can be incorrect so build
3626 * our own version based on RUC and ROC */
1da177e4
LT		 3627 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3628 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3629 adapter->stats.ruc + adapter->stats.roc +
3630 adapter->stats.cexterr;
49559854
MW		 3631 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3632 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3633 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3634 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3635 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3636
3637 /* Tx Errors */
49559854
MW		 3638 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3639 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3640 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3641 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3642 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3643 if (hw->bad_tx_carr_stats_fd &&
167fb284
JG		 3644 adapter->link_duplex == FULL_DUPLEX) {
3645 adapter->net_stats.tx_carrier_errors = 0;
3646 adapter->stats.tncrs = 0;
3647 }
1da177e4
LT		 3648
3649 /* Tx Dropped needs to be maintained elsewhere */
3650
3651 /* Phy Stats */
96838a40
JB		 3652 if (hw->media_type == e1000_media_type_copper) {
3653 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3654 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3655 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3656 adapter->phy_stats.idle_errors += phy_tmp;
3657 }
3658
96838a40 3659 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3660 (hw->phy_type == e1000_phy_m88) &&
3661 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3662 adapter->phy_stats.receive_errors += phy_tmp;
3663 }
3664
15e376b4 3665 /* Management Stats */
1dc32918
JP		 3666 if (hw->has_smbus) {
3667 adapter->stats.mgptc += er32(MGTPTC);
3668 adapter->stats.mgprc += er32(MGTPRC);
3669 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3670 }
3671
1da177e4
LT		 3672 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3673}
9ac98284
JB		 3674
3675/**
3676 * e1000_intr_msi - Interrupt Handler
3677 * @irq: interrupt number
3678 * @data: pointer to a network interface device structure
3679 **/
3680
64798845 3681static irqreturn_t e1000_intr_msi(int irq, void *data)
9ac98284
JB		 3682{
3683 struct net_device *netdev = data;
3684 struct e1000_adapter *adapter = netdev_priv(netdev);
3685 struct e1000_hw *hw = &adapter->hw;
1dc32918 3686 u32 icr = er32(ICR);
9ac98284 3687
9150b76a
JB		 3688 /* in NAPI mode read ICR disables interrupts using IAM */
3689
b5fc8f0c
JB		 3690 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3691 hw->get_link_status = 1;
3692 /* 80003ES2LAN workaround-- For packet buffer work-around on
3693 * link down event; disable receives here in the ISR and reset
3694 * adapter in watchdog */
3695 if (netif_carrier_ok(netdev) &&
1dc32918 3696 (hw->mac_type == e1000_80003es2lan)) {
b5fc8f0c 3697 /* disable receives */
1dc32918
JP		 3698 u32 rctl = er32(RCTL);
3699 ew32(RCTL, rctl & ~E1000_RCTL_EN);
9ac98284 3700 }
b5fc8f0c
JB		 3701 /* guard against interrupt when we're going down */
3702 if (!test_bit(__E1000_DOWN, &adapter->flags))
3703 mod_timer(&adapter->watchdog_timer, jiffies + 1);
9ac98284
JB		 3704 }
3705
bea3348e 3706 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
835bb129
JB		 3707 adapter->total_tx_bytes = 0;
3708 adapter->total_tx_packets = 0;
3709 adapter->total_rx_bytes = 0;
3710 adapter->total_rx_packets = 0;
bea3348e 3711 __netif_rx_schedule(netdev, &adapter->napi);
835bb129 3712 } else
9ac98284 3713 e1000_irq_enable(adapter);
9ac98284
JB		 3714
3715 return IRQ_HANDLED;
3716}
1da177e4
LT		 3717
3718/**
3719 * e1000_intr - Interrupt Handler
3720 * @irq: interrupt number
3721 * @data: pointer to a network interface device structure
1da177e4
LT		 3722 **/
3723
64798845 3724static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3725{
3726 struct net_device *netdev = data;
60490fe0 3727 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3728 struct e1000_hw *hw = &adapter->hw;
1dc32918 3729 u32 rctl, icr = er32(ICR);
c3570acb 3730
835bb129
JB		 3731 if (unlikely(!icr))
3732 return IRQ_NONE; /* Not our interrupt */
3733
835bb129
JB		 3734 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3735 * not set, then the adapter didn't send an interrupt */
3736 if (unlikely(hw->mac_type >= e1000_82571 &&
3737 !(icr & E1000_ICR_INT_ASSERTED)))
3738 return IRQ_NONE;
3739
9150b76a
JB		 3740 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3741 * need for the IMC write */
1da177e4 3742
96838a40 3743 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3744 hw->get_link_status = 1;
87041639
JK		 3745 /* 80003ES2LAN workaround--
3746 * For packet buffer work-around on link down event;
3747 * disable receives here in the ISR and
3748 * reset adapter in watchdog
3749 */
3750 if (netif_carrier_ok(netdev) &&
1dc32918 3751 (hw->mac_type == e1000_80003es2lan)) {
87041639 3752 /* disable receives */
1dc32918
JP		 3753 rctl = er32(RCTL);
3754 ew32(RCTL, rctl & ~E1000_RCTL_EN);
87041639 3755 }
1314bbf3
AK		 3756 /* guard against interrupt when we're going down */
3757 if (!test_bit(__E1000_DOWN, &adapter->flags))
3758 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3759 }
3760
1e613fd9 3761 if (unlikely(hw->mac_type < e1000_82571)) {
835bb129 3762 /* disable interrupts, without the synchronize_irq bit */
1dc32918
JP		 3763 ew32(IMC, ~0);
3764 E1000_WRITE_FLUSH();
1e613fd9 3765 }
bea3348e 3766 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
835bb129
JB		 3767 adapter->total_tx_bytes = 0;
3768 adapter->total_tx_packets = 0;
3769 adapter->total_rx_bytes = 0;
3770 adapter->total_rx_packets = 0;
bea3348e 3771 __netif_rx_schedule(netdev, &adapter->napi);
835bb129 3772 } else
90fb5135
AK		 3773 /* this really should not happen! if it does it is basically a
3774 * bug, but not a hard error, so enable ints and continue */
581d708e 3775 e1000_irq_enable(adapter);
1da177e4 3776
1da177e4
LT		 3777 return IRQ_HANDLED;
3778}
3779
1da177e4
LT		 3780/**
3781 * e1000_clean - NAPI Rx polling callback
3782 * @adapter: board private structure
3783 **/
64798845 3784static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3785{
bea3348e
SH		 3786 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3787 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 3788 int tx_cleaned = 0, work_done = 0;
581d708e 3789
4cf1653a 3790 adapter = netdev_priv(poll_dev);
581d708e 3791
d3d9e484
AK		 3792 /* e1000_clean is called per-cpu. This lock protects
3793 * tx_ring[0] from being cleaned by multiple cpus
3794 * simultaneously. A failure obtaining the lock means
3795 * tx_ring[0] is currently being cleaned anyway. */
3796 if (spin_trylock(&adapter->tx_queue_lock)) {
d2c7ddd6
DM		 3797 tx_cleaned = e1000_clean_tx_irq(adapter,
3798 &adapter->tx_ring[0]);
d3d9e484 3799 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3800 }
3801
d3d9e484 3802 adapter->clean_rx(adapter, &adapter->rx_ring[0],
bea3348e 3803 &work_done, budget);
96838a40 3804
d2c7ddd6
DM		 3805 if (tx_cleaned)
3806 work_done = budget;
3807
53e52c72
DM		 3808 /* If budget not fully consumed, exit the polling mode */
3809 if (work_done < budget) {
835bb129
JB		 3810 if (likely(adapter->itr_setting & 3))
3811 e1000_set_itr(adapter);
bea3348e 3812 netif_rx_complete(poll_dev, napi);
1da177e4 3813 e1000_irq_enable(adapter);
1da177e4
LT		 3814 }
3815
bea3348e 3816 return work_done;
1da177e4
LT		 3817}
3818
1da177e4
LT		 3819/**
3820 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3821 * @adapter: board private structure
3822 **/
64798845
JP		 3823static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3824 struct e1000_tx_ring *tx_ring)
1da177e4 3825{
1dc32918 3826 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3827 struct net_device *netdev = adapter->netdev;
3828 struct e1000_tx_desc *tx_desc, *eop_desc;
3829 struct e1000_buffer *buffer_info;
3830 unsigned int i, eop;
2a1af5d7 3831 unsigned int count = 0;
c3033b01 3832 bool cleaned = false;
835bb129 3833 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3834
3835 i = tx_ring->next_to_clean;
3836 eop = tx_ring->buffer_info[i].next_to_watch;
3837 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3838
581d708e 3839 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
c3033b01 3840 for (cleaned = false; !cleaned; ) {
1da177e4
LT		 3841 tx_desc = E1000_TX_DESC(*tx_ring, i);
3842 buffer_info = &tx_ring->buffer_info[i];
3843 cleaned = (i == eop);
3844
835bb129 3845 if (cleaned) {
2b65326e 3846 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3847 unsigned int segs, bytecount;
3848 segs = skb_shinfo(skb)->gso_segs ?: 1;
3849 /* multiply data chunks by size of headers */
3850 bytecount = ((segs - 1) * skb_headlen(skb)) +
3851 skb->len;
2b65326e 3852 total_tx_packets += segs;
7753b171 3853 total_tx_bytes += bytecount;
835bb129 3854 }
fd803241 3855 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3856 tx_desc->upper.data = 0;
1da177e4 3857
96838a40 3858 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3859 }
581d708e 3860
1da177e4
LT		 3861 eop = tx_ring->buffer_info[i].next_to_watch;
3862 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3863#define E1000_TX_WEIGHT 64
3864 /* weight of a sort for tx, to avoid endless transmit cleanup */
c3570acb
FR		 3865 if (count++ == E1000_TX_WEIGHT)
3866 break;
1da177e4
LT		 3867 }
3868
3869 tx_ring->next_to_clean = i;
3870
77b2aad5 3871#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 3872 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3873 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3874 /* Make sure that anybody stopping the queue after this
3875 * sees the new next_to_clean.
3876 */
3877 smp_mb();
fcfb1224 3878 if (netif_queue_stopped(netdev)) {
77b2aad5 3879 netif_wake_queue(netdev);
fcfb1224
JB		 3880 ++adapter->restart_queue;
3881 }
77b2aad5 3882 }
2648345f 3883
581d708e 3884 if (adapter->detect_tx_hung) {
2648345f 3885 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3886 * check with the clearing of time_stamp and movement of i */
c3033b01 3887 adapter->detect_tx_hung = false;
392137fa
JK		 3888 if (tx_ring->buffer_info[eop].dma &&
3889 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3890 (adapter->tx_timeout_factor * HZ))
1dc32918 3891 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3892
3893 /* detected Tx unit hang */
c6963ef5 3894 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3895 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3896 " TDH <%x>\n"
3897 " TDT <%x>\n"
3898 " next_to_use <%x>\n"
3899 " next_to_clean <%x>\n"
3900 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3901 " time_stamp <%lx>\n"
3902 " next_to_watch <%x>\n"
3903 " jiffies <%lx>\n"
3904 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3905 (unsigned long)((tx_ring - adapter->tx_ring) /
3906 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3907 readl(hw->hw_addr + tx_ring->tdh),
3908 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3909 tx_ring->next_to_use,
392137fa
JK		 3910 tx_ring->next_to_clean,
3911 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3912 eop,
3913 jiffies,
3914 eop_desc->upper.fields.status);
1da177e4 3915 netif_stop_queue(netdev);
70b8f1e1 3916 }
1da177e4 3917 }
835bb129
JB		 3918 adapter->total_tx_bytes += total_tx_bytes;
3919 adapter->total_tx_packets += total_tx_packets;
ef90e4ec
AK		 3920 adapter->net_stats.tx_bytes += total_tx_bytes;
3921 adapter->net_stats.tx_packets += total_tx_packets;
1da177e4
LT		 3922 return cleaned;
3923}
3924
3925/**
3926 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3927 * @adapter: board private structure
3928 * @status_err: receive descriptor status and error fields
3929 * @csum: receive descriptor csum field
3930 * @sk_buff: socket buffer with received data
1da177e4
LT		 3931 **/
3932
64798845
JP		 3933static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3934 u32 csum, struct sk_buff *skb)
1da177e4 3935{
1dc32918 3936 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3937 u16 status = (u16)status_err;
3938 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC		 3939 skb->ip_summed = CHECKSUM_NONE;
3940
1da177e4 3941 /* 82543 or newer only */
1dc32918 3942 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3943 /* Ignore Checksum bit is set */
96838a40 3944 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3945 /* TCP/UDP checksum error bit is set */
96838a40 3946 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3947 /* let the stack verify checksum errors */
1da177e4 3948 adapter->hw_csum_err++;
2d7edb92
MC		 3949 return;
3950 }
3951 /* TCP/UDP Checksum has not been calculated */
1dc32918 3952 if (hw->mac_type <= e1000_82547_rev_2) {
96838a40 3953 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3954 return;
1da177e4 3955 } else {
96838a40 3956 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3957 return;
3958 }
3959 /* It must be a TCP or UDP packet with a valid checksum */
3960 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3961 /* TCP checksum is good */
3962 skb->ip_summed = CHECKSUM_UNNECESSARY;
1dc32918 3963 } else if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3964 /* IP fragment with UDP payload */
3965 /* Hardware complements the payload checksum, so we undo it
3966 * and then put the value in host order for further stack use.
3967 */
3e18826c
AV		 3968 __sum16 sum = (__force __sum16)htons(csum);
3969 skb->csum = csum_unfold(~sum);
84fa7933 3970 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3971 }
2d7edb92 3972 adapter->hw_csum_good++;
1da177e4
LT		 3973}
3974
3975/**
2d7edb92 3976 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3977 * @adapter: board private structure
3978 **/
64798845
JP		 3979static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3980 struct e1000_rx_ring *rx_ring,
3981 int *work_done, int work_to_do)
1da177e4 3982{
1dc32918 3983 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3984 struct net_device *netdev = adapter->netdev;
3985 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3986 struct e1000_rx_desc *rx_desc, *next_rxd;
3987 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3988 unsigned long flags;
406874a7
JP		 3989 u32 length;
3990 u8 last_byte;
1da177e4 3991 unsigned int i;
72d64a43 3992 int cleaned_count = 0;
c3033b01 3993 bool cleaned = false;
835bb129 3994 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 3995
3996 i = rx_ring->next_to_clean;
3997 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3998 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3999
b92ff8ee 4000 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4001 struct sk_buff *skb;
a292ca6e 4002 u8 status;
90fb5135 4003
96838a40 4004 if (*work_done >= work_to_do)
1da177e4
LT		 4005 break;
4006 (*work_done)++;
c3570acb 4007
a292ca6e 4008 status = rx_desc->status;
b92ff8ee 4009 skb = buffer_info->skb;
86c3d59f
JB		 4010 buffer_info->skb = NULL;
4011
30320be8
JK		 4012 prefetch(skb->data - NET_IP_ALIGN);
4013
86c3d59f
JB		 4014 if (++i == rx_ring->count) i = 0;
4015 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4016 prefetch(next_rxd);
4017
86c3d59f 4018 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4019
c3033b01 4020 cleaned = true;
72d64a43 4021 cleaned_count++;
a292ca6e
JK		 4022 pci_unmap_single(pdev,
4023 buffer_info->dma,
4024 buffer_info->length,
1da177e4
LT		 4025 PCI_DMA_FROMDEVICE);
4026
1da177e4
LT		 4027 length = le16_to_cpu(rx_desc->length);
4028
a1415ee6
JK		 4029 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4030 /* All receives must fit into a single buffer */
4031 E1000_DBG("%s: Receive packet consumed multiple"
4032 " buffers\n", netdev->name);
864c4e45 4033 /* recycle */
8fc897b0 4034 buffer_info->skb = skb;
1da177e4
LT		 4035 goto next_desc;
4036 }
4037
96838a40 4038 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 4039 last_byte = *(skb->data + length - 1);
1dc32918
JP		 4040 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4041 last_byte)) {
1da177e4 4042 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4043 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 4044 length, skb->data);
4045 spin_unlock_irqrestore(&adapter->stats_lock,
4046 flags);
4047 length--;
4048 } else {
9e2feace
AK		 4049 /* recycle */
4050 buffer_info->skb = skb;
1da177e4
LT		 4051 goto next_desc;
4052 }
1cb5821f 4053 }
1da177e4 4054
d2a1e213
JB		 4055 /* adjust length to remove Ethernet CRC, this must be
4056 * done after the TBI_ACCEPT workaround above */
4057 length -= 4;
4058
835bb129
JB		 4059 /* probably a little skewed due to removing CRC */
4060 total_rx_bytes += length;
4061 total_rx_packets++;
4062
a292ca6e
JK		 4063 /* code added for copybreak, this should improve
4064 * performance for small packets with large amounts
4065 * of reassembly being done in the stack */
1f753861 4066 if (length < copybreak) {
a292ca6e 4067 struct sk_buff *new_skb =
87f5032e 4068 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 4069 if (new_skb) {
4070 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM		 4071 skb_copy_to_linear_data_offset(new_skb,
4072 -NET_IP_ALIGN,
4073 (skb->data -
4074 NET_IP_ALIGN),
4075 (length +
4076 NET_IP_ALIGN));
a292ca6e
JK		 4077 /* save the skb in buffer_info as good */
4078 buffer_info->skb = skb;
4079 skb = new_skb;
a292ca6e 4080 }
996695de
AK		 4081 /* else just continue with the old one */
4082 }
a292ca6e 4083 /* end copybreak code */
996695de 4084 skb_put(skb, length);
1da177e4
LT		 4085
4086 /* Receive Checksum Offload */
a292ca6e 4087 e1000_rx_checksum(adapter,
406874a7
JP		 4088 (u32)(status) |
4089 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4090 le16_to_cpu(rx_desc->csum), skb);
96838a40 4091
1da177e4 4092 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 4093
96838a40 4094 if (unlikely(adapter->vlgrp &&
a292ca6e 4095 (status & E1000_RXD_STAT_VP))) {
1da177e4 4096 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
38b22195 4097 le16_to_cpu(rx_desc->special));
1da177e4
LT		 4098 } else {
4099 netif_receive_skb(skb);
4100 }
c3570acb 4101
1da177e4
LT		 4102next_desc:
4103 rx_desc->status = 0;
1da177e4 4104
72d64a43
JK		 4105 /* return some buffers to hardware, one at a time is too slow */
4106 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4107 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4108 cleaned_count = 0;
4109 }
4110
30320be8 4111 /* use prefetched values */
86c3d59f
JB		 4112 rx_desc = next_rxd;
4113 buffer_info = next_buffer;
1da177e4 4114 }
1da177e4 4115 rx_ring->next_to_clean = i;
72d64a43
JK		 4116
4117 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4118 if (cleaned_count)
4119 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4120
835bb129
JB		 4121 adapter->total_rx_packets += total_rx_packets;
4122 adapter->total_rx_bytes += total_rx_bytes;
ef90e4ec
AK		 4123 adapter->net_stats.rx_bytes += total_rx_bytes;
4124 adapter->net_stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4125 return cleaned;
4126}
4127
1da177e4 4128/**
2d7edb92 4129 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4130 * @adapter: address of board private structure
4131 **/
4132
64798845
JP		 4133static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4134 struct e1000_rx_ring *rx_ring,
4135 int cleaned_count)
1da177e4 4136{
1dc32918 4137 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4138 struct net_device *netdev = adapter->netdev;
4139 struct pci_dev *pdev = adapter->pdev;
4140 struct e1000_rx_desc *rx_desc;
4141 struct e1000_buffer *buffer_info;
4142 struct sk_buff *skb;
2648345f
MC		 4143 unsigned int i;
4144 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4145
4146 i = rx_ring->next_to_use;
4147 buffer_info = &rx_ring->buffer_info[i];
4148
a292ca6e 4149 while (cleaned_count--) {
ca6f7224
CH		 4150 skb = buffer_info->skb;
4151 if (skb) {
a292ca6e
JK		 4152 skb_trim(skb, 0);
4153 goto map_skb;
4154 }
4155
ca6f7224 4156 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4157 if (unlikely(!skb)) {
1da177e4 4158 /* Better luck next round */
72d64a43 4159 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4160 break;
4161 }
4162
2648345f 4163 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4164 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4165 struct sk_buff *oldskb = skb;
2648345f
MC		 4166 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4167 "at %p\n", bufsz, skb->data);
4168 /* Try again, without freeing the previous */
87f5032e 4169 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4170 /* Failed allocation, critical failure */
1da177e4
LT		 4171 if (!skb) {
4172 dev_kfree_skb(oldskb);
4173 break;
4174 }
2648345f 4175
1da177e4
LT		 4176 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4177 /* give up */
4178 dev_kfree_skb(skb);
4179 dev_kfree_skb(oldskb);
4180 break; /* while !buffer_info->skb */
1da177e4 4181 }
ca6f7224
CH		 4182
4183 /* Use new allocation */
4184 dev_kfree_skb(oldskb);
1da177e4 4185 }
1da177e4
LT		 4186 /* Make buffer alignment 2 beyond a 16 byte boundary
4187 * this will result in a 16 byte aligned IP header after
4188 * the 14 byte MAC header is removed
4189 */
4190 skb_reserve(skb, NET_IP_ALIGN);
4191
1da177e4
LT		 4192 buffer_info->skb = skb;
4193 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4194map_skb:
1da177e4
LT		 4195 buffer_info->dma = pci_map_single(pdev,
4196 skb->data,
4197 adapter->rx_buffer_len,
4198 PCI_DMA_FROMDEVICE);
4199
2648345f
MC		 4200 /* Fix for errata 23, can't cross 64kB boundary */
4201 if (!e1000_check_64k_bound(adapter,
4202 (void *)(unsigned long)buffer_info->dma,
4203 adapter->rx_buffer_len)) {
4204 DPRINTK(RX_ERR, ERR,
4205 "dma align check failed: %u bytes at %p\n",
4206 adapter->rx_buffer_len,
4207 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4208 dev_kfree_skb(skb);
4209 buffer_info->skb = NULL;
4210
2648345f 4211 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4212 adapter->rx_buffer_len,
4213 PCI_DMA_FROMDEVICE);
4214
4215 break; /* while !buffer_info->skb */
4216 }
1da177e4
LT		 4217 rx_desc = E1000_RX_DESC(*rx_ring, i);
4218 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4219
96838a40
JB		 4220 if (unlikely(++i == rx_ring->count))
4221 i = 0;
1da177e4
LT		 4222 buffer_info = &rx_ring->buffer_info[i];
4223 }
4224
b92ff8ee
JB		 4225 if (likely(rx_ring->next_to_use != i)) {
4226 rx_ring->next_to_use = i;
4227 if (unlikely(i-- == 0))
4228 i = (rx_ring->count - 1);
4229
4230 /* Force memory writes to complete before letting h/w
4231 * know there are new descriptors to fetch. (Only
4232 * applicable for weak-ordered memory model archs,
4233 * such as IA-64). */
4234 wmb();
1dc32918 4235 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4236 }
1da177e4
LT		 4237}
4238
4239/**
4240 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4241 * @adapter:
4242 **/
4243
64798845 4244static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4245{
1dc32918 4246 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4247 u16 phy_status;
4248 u16 phy_ctrl;
1da177e4 4249
1dc32918
JP		 4250 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4251 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4252 return;
4253
96838a40 4254 if (adapter->smartspeed == 0) {
1da177e4
LT		 4255 /* If Master/Slave config fault is asserted twice,
4256 * we assume back-to-back */
1dc32918 4257 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4258 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4259 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4260 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4261 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4262 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4263 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4264 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4265 phy_ctrl);
4266 adapter->smartspeed++;
1dc32918
JP		 4267 if (!e1000_phy_setup_autoneg(hw) &&
4268 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4269 &phy_ctrl)) {
4270 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4271 MII_CR_RESTART_AUTO_NEG);
1dc32918 4272 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4273 phy_ctrl);
4274 }
4275 }
4276 return;
96838a40 4277 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4278 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4279 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4280 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4281 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4282 if (!e1000_phy_setup_autoneg(hw) &&
4283 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4284 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4285 MII_CR_RESTART_AUTO_NEG);
1dc32918 4286 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4287 }
4288 }
4289 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4290 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4291 adapter->smartspeed = 0;
4292}
4293
4294/**
4295 * e1000_ioctl -
4296 * @netdev:
4297 * @ifreq:
4298 * @cmd:
4299 **/
4300
64798845 4301static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4302{
4303 switch (cmd) {
4304 case SIOCGMIIPHY:
4305 case SIOCGMIIREG:
4306 case SIOCSMIIREG:
4307 return e1000_mii_ioctl(netdev, ifr, cmd);
4308 default:
4309 return -EOPNOTSUPP;
4310 }
4311}
4312
4313/**
4314 * e1000_mii_ioctl -
4315 * @netdev:
4316 * @ifreq:
4317 * @cmd:
4318 **/
4319
64798845
JP		 4320static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4321 int cmd)
1da177e4 4322{
60490fe0 4323 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4324 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4325 struct mii_ioctl_data *data = if_mii(ifr);
4326 int retval;
406874a7
JP		 4327 u16 mii_reg;
4328 u16 spddplx;
97876fc6 4329 unsigned long flags;
1da177e4 4330
1dc32918 4331 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4332 return -EOPNOTSUPP;
4333
4334 switch (cmd) {
4335 case SIOCGMIIPHY:
1dc32918 4336 data->phy_id = hw->phy_addr;
1da177e4
LT		 4337 break;
4338 case SIOCGMIIREG:
96838a40 4339 if (!capable(CAP_NET_ADMIN))
1da177e4 4340 return -EPERM;
97876fc6 4341 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4342 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4343 &data->val_out)) {
4344 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4345 return -EIO;
97876fc6
MC		 4346 }
4347 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4348 break;
4349 case SIOCSMIIREG:
96838a40 4350 if (!capable(CAP_NET_ADMIN))
1da177e4 4351 return -EPERM;
96838a40 4352 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4353 return -EFAULT;
4354 mii_reg = data->val_in;
97876fc6 4355 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4356 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4357 mii_reg)) {
4358 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4359 return -EIO;
97876fc6 4360 }
f0163ac4 4361 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4362 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4363 switch (data->reg_num) {
4364 case PHY_CTRL:
96838a40 4365 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4366 break;
96838a40 4367 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4368 hw->autoneg = 1;
4369 hw->autoneg_advertised = 0x2F;
1da177e4
LT		 4370 } else {
4371 if (mii_reg & 0x40)
4372 spddplx = SPEED_1000;
4373 else if (mii_reg & 0x2000)
4374 spddplx = SPEED_100;
4375 else
4376 spddplx = SPEED_10;
4377 spddplx += (mii_reg & 0x100)
cb764326
JK		 4378 ? DUPLEX_FULL :
4379 DUPLEX_HALF;
1da177e4
LT		 4380 retval = e1000_set_spd_dplx(adapter,
4381 spddplx);
f0163ac4 4382 if (retval)
1da177e4
LT		 4383 return retval;
4384 }
2db10a08
AK		 4385 if (netif_running(adapter->netdev))
4386 e1000_reinit_locked(adapter);
4387 else
1da177e4
LT		 4388 e1000_reset(adapter);
4389 break;
4390 case M88E1000_PHY_SPEC_CTRL:
4391 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4392 if (e1000_phy_reset(hw))
1da177e4
LT		 4393 return -EIO;
4394 break;
4395 }
4396 } else {
4397 switch (data->reg_num) {
4398 case PHY_CTRL:
96838a40 4399 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4400 break;
2db10a08
AK		 4401 if (netif_running(adapter->netdev))
4402 e1000_reinit_locked(adapter);
4403 else
1da177e4
LT		 4404 e1000_reset(adapter);
4405 break;
4406 }
4407 }
4408 break;
4409 default:
4410 return -EOPNOTSUPP;
4411 }
4412 return E1000_SUCCESS;
4413}
4414
64798845 4415void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4416{
4417 struct e1000_adapter *adapter = hw->back;
2648345f 4418 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4419
96838a40 4420 if (ret_val)
2648345f 4421 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4422}
4423
64798845 4424void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4425{
4426 struct e1000_adapter *adapter = hw->back;
4427
4428 pci_clear_mwi(adapter->pdev);
4429}
4430
64798845 4431int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4432{
4433 struct e1000_adapter *adapter = hw->back;
4434 return pcix_get_mmrbc(adapter->pdev);
4435}
4436
64798845 4437void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4438{
4439 struct e1000_adapter *adapter = hw->back;
4440 pcix_set_mmrbc(adapter->pdev, mmrbc);
4441}
4442
64798845 4443s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
caeccb68
JK		 4444{
4445 struct e1000_adapter *adapter = hw->back;
406874a7 4446 u16 cap_offset;
caeccb68
JK		 4447
4448 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4449 if (!cap_offset)
4450 return -E1000_ERR_CONFIG;
4451
4452 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4453
4454 return E1000_SUCCESS;
4455}
4456
64798845 4457void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4458{
4459 outl(value, port);
4460}
4461
64798845
JP		 4462static void e1000_vlan_rx_register(struct net_device *netdev,
4463 struct vlan_group *grp)
1da177e4 4464{
60490fe0 4465 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4466 struct e1000_hw *hw = &adapter->hw;
406874a7 4467 u32 ctrl, rctl;
1da177e4 4468
9150b76a
JB		 4469 if (!test_bit(__E1000_DOWN, &adapter->flags))
4470 e1000_irq_disable(adapter);
1da177e4
LT		 4471 adapter->vlgrp = grp;
4472
96838a40 4473 if (grp) {
1da177e4 4474 /* enable VLAN tag insert/strip */
1dc32918 4475 ctrl = er32(CTRL);
1da177e4 4476 ctrl |= E1000_CTRL_VME;
1dc32918 4477 ew32(CTRL, ctrl);
1da177e4 4478
cd94dd0b 4479 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4480 /* enable VLAN receive filtering */
1dc32918 4481 rctl = er32(RCTL);
90fb5135 4482 rctl &= ~E1000_RCTL_CFIEN;
1dc32918 4483 ew32(RCTL, rctl);
90fb5135 4484 e1000_update_mng_vlan(adapter);
cd94dd0b 4485 }
1da177e4
LT		 4486 } else {
4487 /* disable VLAN tag insert/strip */
1dc32918 4488 ctrl = er32(CTRL);
1da177e4 4489 ctrl &= ~E1000_CTRL_VME;
1dc32918 4490 ew32(CTRL, ctrl);
1da177e4 4491
cd94dd0b 4492 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4493 if (adapter->mng_vlan_id !=
406874a7 4494 (u16)E1000_MNG_VLAN_NONE) {
90fb5135
AK		 4495 e1000_vlan_rx_kill_vid(netdev,
4496 adapter->mng_vlan_id);
4497 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4498 }
cd94dd0b 4499 }
1da177e4
LT		 4500 }
4501
9150b76a
JB		 4502 if (!test_bit(__E1000_DOWN, &adapter->flags))
4503 e1000_irq_enable(adapter);
1da177e4
LT		 4504}
4505
64798845 4506static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4507{
60490fe0 4508 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4509 struct e1000_hw *hw = &adapter->hw;
406874a7 4510 u32 vfta, index;
96838a40 4511
1dc32918 4512 if ((hw->mng_cookie.status &
96838a40
JB		 4513 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4514 (vid == adapter->mng_vlan_id))
2d7edb92 4515 return;
1da177e4
LT		 4516 /* add VID to filter table */
4517 index = (vid >> 5) & 0x7F;
1dc32918 4518 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4519 vfta |= (1 << (vid & 0x1F));
1dc32918 4520 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4521}
4522
64798845 4523static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4524{
60490fe0 4525 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4526 struct e1000_hw *hw = &adapter->hw;
406874a7 4527 u32 vfta, index;
1da177e4 4528
9150b76a
JB		 4529 if (!test_bit(__E1000_DOWN, &adapter->flags))
4530 e1000_irq_disable(adapter);
5c15bdec 4531 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB		 4532 if (!test_bit(__E1000_DOWN, &adapter->flags))
4533 e1000_irq_enable(adapter);
1da177e4 4534
1dc32918 4535 if ((hw->mng_cookie.status &
96838a40 4536 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4537 (vid == adapter->mng_vlan_id)) {
4538 /* release control to f/w */
4539 e1000_release_hw_control(adapter);
2d7edb92 4540 return;
ff147013
JK		 4541 }
4542
1da177e4
LT		 4543 /* remove VID from filter table */
4544 index = (vid >> 5) & 0x7F;
1dc32918 4545 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4546 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4547 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4548}
4549
64798845 4550static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT		 4551{
4552 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4553
96838a40 4554 if (adapter->vlgrp) {
406874a7 4555 u16 vid;
96838a40 4556 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4557 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 4558 continue;
4559 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4560 }
4561 }
4562}
4563
64798845 4564int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4565{
1dc32918
JP		 4566 struct e1000_hw *hw = &adapter->hw;
4567
4568 hw->autoneg = 0;
1da177e4 4569
6921368f 4570 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4571 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f
MC		 4572 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4573 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4574 return -EINVAL;
4575 }
4576
96838a40 4577 switch (spddplx) {
1da177e4 4578 case SPEED_10 + DUPLEX_HALF:
1dc32918 4579 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4580 break;
4581 case SPEED_10 + DUPLEX_FULL:
1dc32918 4582 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4583 break;
4584 case SPEED_100 + DUPLEX_HALF:
1dc32918 4585 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4586 break;
4587 case SPEED_100 + DUPLEX_FULL:
1dc32918 4588 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4589 break;
4590 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4591 hw->autoneg = 1;
4592 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4593 break;
4594 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4595 default:
2648345f 4596 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4597 return -EINVAL;
4598 }
4599 return 0;
4600}
4601
64798845 4602static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4603{
4604 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4605 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4606 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4607 u32 ctrl, ctrl_ext, rctl, status;
4608 u32 wufc = adapter->wol;
6fdfef16 4609#ifdef CONFIG_PM
240b1710 4610 int retval = 0;
6fdfef16 4611#endif
1da177e4
LT		 4612
4613 netif_device_detach(netdev);
4614
2db10a08
AK		 4615 if (netif_running(netdev)) {
4616 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4617 e1000_down(adapter);
2db10a08 4618 }
1da177e4 4619
2f82665f 4620#ifdef CONFIG_PM
1d33e9c6 4621 retval = pci_save_state(pdev);
2f82665f
JB		 4622 if (retval)
4623 return retval;
4624#endif
4625
1dc32918 4626 status = er32(STATUS);
96838a40 4627 if (status & E1000_STATUS_LU)
1da177e4
LT		 4628 wufc &= ~E1000_WUFC_LNKC;
4629
96838a40 4630 if (wufc) {
1da177e4 4631 e1000_setup_rctl(adapter);
db0ce50d 4632 e1000_set_rx_mode(netdev);
1da177e4
LT		 4633
4634 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4635 if (wufc & E1000_WUFC_MC) {
1dc32918 4636 rctl = er32(RCTL);
1da177e4 4637 rctl |= E1000_RCTL_MPE;
1dc32918 4638 ew32(RCTL, rctl);
1da177e4
LT		 4639 }
4640
1dc32918
JP		 4641 if (hw->mac_type >= e1000_82540) {
4642 ctrl = er32(CTRL);
1da177e4
LT		 4643 /* advertise wake from D3Cold */
4644 #define E1000_CTRL_ADVD3WUC 0x00100000
4645 /* phy power management enable */
4646 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4647 ctrl |= E1000_CTRL_ADVD3WUC |
4648 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4649 ew32(CTRL, ctrl);
1da177e4
LT		 4650 }
4651
1dc32918
JP		 4652 if (hw->media_type == e1000_media_type_fiber ||
4653 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4654 /* keep the laser running in D3 */
1dc32918 4655 ctrl_ext = er32(CTRL_EXT);
1da177e4 4656 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4657 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4658 }
4659
2d7edb92 4660 /* Allow time for pending master requests to run */
1dc32918 4661 e1000_disable_pciex_master(hw);
2d7edb92 4662
1dc32918
JP		 4663 ew32(WUC, E1000_WUC_PME_EN);
4664 ew32(WUFC, wufc);
d0e027db
AK		 4665 pci_enable_wake(pdev, PCI_D3hot, 1);
4666 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4 4667 } else {
1dc32918
JP		 4668 ew32(WUC, 0);
4669 ew32(WUFC, 0);
d0e027db
AK		 4670 pci_enable_wake(pdev, PCI_D3hot, 0);
4671 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4672 }
4673
0fccd0e9
JG		 4674 e1000_release_manageability(adapter);
4675
4676 /* make sure adapter isn't asleep if manageability is enabled */
4677 if (adapter->en_mng_pt) {
4678 pci_enable_wake(pdev, PCI_D3hot, 1);
4679 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4680 }
4681
1dc32918
JP		 4682 if (hw->phy_type == e1000_phy_igp_3)
4683 e1000_phy_powerdown_workaround(hw);
cd94dd0b 4684
edd106fc
AK		 4685 if (netif_running(netdev))
4686 e1000_free_irq(adapter);
4687
b55ccb35
JK		 4688 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4689 * would have already happened in close and is redundant. */
4690 e1000_release_hw_control(adapter);
2d7edb92 4691
1da177e4 4692 pci_disable_device(pdev);
240b1710 4693
d0e027db 4694 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4695
4696 return 0;
4697}
4698
2f82665f 4699#ifdef CONFIG_PM
64798845 4700static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4701{
4702 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4703 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4704 struct e1000_hw *hw = &adapter->hw;
406874a7 4705 u32 err;
1da177e4 4706
d0e027db 4707 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4708 pci_restore_state(pdev);
81250297
TI		 4709
4710 if (adapter->need_ioport)
4711 err = pci_enable_device(pdev);
4712 else
4713 err = pci_enable_device_mem(pdev);
c7be73bc 4714 if (err) {
3d1dd8cb
AK		 4715 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4716 return err;
4717 }
a4cb847d 4718 pci_set_master(pdev);
1da177e4 4719
d0e027db
AK		 4720 pci_enable_wake(pdev, PCI_D3hot, 0);
4721 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4722
c7be73bc
JP		 4723 if (netif_running(netdev)) {
4724 err = e1000_request_irq(adapter);
4725 if (err)
4726 return err;
4727 }
edd106fc
AK		 4728
4729 e1000_power_up_phy(adapter);
1da177e4 4730 e1000_reset(adapter);
1dc32918 4731 ew32(WUS, ~0);
1da177e4 4732
0fccd0e9
JG		 4733 e1000_init_manageability(adapter);
4734
96838a40 4735 if (netif_running(netdev))
1da177e4
LT		 4736 e1000_up(adapter);
4737
4738 netif_device_attach(netdev);
4739
b55ccb35
JK		 4740 /* If the controller is 82573 and f/w is AMT, do not set
4741 * DRV_LOAD until the interface is up. For all other cases,
4742 * let the f/w know that the h/w is now under the control
4743 * of the driver. */
1dc32918
JP		 4744 if (hw->mac_type != e1000_82573 ||
4745 !e1000_check_mng_mode(hw))
b55ccb35 4746 e1000_get_hw_control(adapter);
2d7edb92 4747
1da177e4
LT		 4748 return 0;
4749}
4750#endif
c653e635
AK		 4751
4752static void e1000_shutdown(struct pci_dev *pdev)
4753{
4754 e1000_suspend(pdev, PMSG_SUSPEND);
4755}
4756
1da177e4
LT		 4757#ifdef CONFIG_NET_POLL_CONTROLLER
4758/*
4759 * Polling 'interrupt' - used by things like netconsole to send skbs
4760 * without having to re-enable interrupts. It's not called while
4761 * the interrupt routine is executing.
4762 */
64798845 4763static void e1000_netpoll(struct net_device *netdev)
1da177e4 4764{
60490fe0 4765 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4766
1da177e4 4767 disable_irq(adapter->pdev->irq);
7d12e780 4768 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4769 enable_irq(adapter->pdev->irq);
4770}
4771#endif
4772
9026729b
AK		 4773/**
4774 * e1000_io_error_detected - called when PCI error is detected
4775 * @pdev: Pointer to PCI device
4776 * @state: The current pci conneection state
4777 *
4778 * This function is called after a PCI bus error affecting
4779 * this device has been detected.
4780 */
64798845
JP		 4781static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4782 pci_channel_state_t state)
9026729b
AK		 4783{
4784 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4785 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 4786
4787 netif_device_detach(netdev);
4788
4789 if (netif_running(netdev))
4790 e1000_down(adapter);
72e8d6bb 4791 pci_disable_device(pdev);
9026729b
AK		 4792
4793 /* Request a slot slot reset. */
4794 return PCI_ERS_RESULT_NEED_RESET;
4795}
4796
4797/**
4798 * e1000_io_slot_reset - called after the pci bus has been reset.
4799 * @pdev: Pointer to PCI device
4800 *
4801 * Restart the card from scratch, as if from a cold-boot. Implementation
4802 * resembles the first-half of the e1000_resume routine.
4803 */
4804static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4805{
4806 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4807 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4808 struct e1000_hw *hw = &adapter->hw;
81250297 4809 int err;
9026729b 4810
81250297
TI		 4811 if (adapter->need_ioport)
4812 err = pci_enable_device(pdev);
4813 else
4814 err = pci_enable_device_mem(pdev);
4815 if (err) {
9026729b
AK		 4816 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4817 return PCI_ERS_RESULT_DISCONNECT;
4818 }
4819 pci_set_master(pdev);
4820
dbf38c94
LV		 4821 pci_enable_wake(pdev, PCI_D3hot, 0);
4822 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4823
9026729b 4824 e1000_reset(adapter);
1dc32918 4825 ew32(WUS, ~0);
9026729b
AK		 4826
4827 return PCI_ERS_RESULT_RECOVERED;
4828}
4829
4830/**
4831 * e1000_io_resume - called when traffic can start flowing again.
4832 * @pdev: Pointer to PCI device
4833 *
4834 * This callback is called when the error recovery driver tells us that
4835 * its OK to resume normal operation. Implementation resembles the
4836 * second-half of the e1000_resume routine.
4837 */
4838static void e1000_io_resume(struct pci_dev *pdev)
4839{
4840 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4841 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4842 struct e1000_hw *hw = &adapter->hw;
0fccd0e9
JG		 4843
4844 e1000_init_manageability(adapter);
9026729b
AK		 4845
4846 if (netif_running(netdev)) {
4847 if (e1000_up(adapter)) {
4848 printk("e1000: can't bring device back up after reset\n");
4849 return;
4850 }
4851 }
4852
4853 netif_device_attach(netdev);
4854
0fccd0e9
JG		 4855 /* If the controller is 82573 and f/w is AMT, do not set
4856 * DRV_LOAD until the interface is up. For all other cases,
4857 * let the f/w know that the h/w is now under the control
4858 * of the driver. */
1dc32918
JP		 4859 if (hw->mac_type != e1000_82573 ||
4860 !e1000_check_mng_mode(hw))
0fccd0e9 4861 e1000_get_hw_control(adapter);
9026729b 4862
9026729b
AK		 4863}
4864
1da177e4 4865/* e1000_main.c */
Linux kernel - Deliverables
This page took 1.013777 seconds and 5 git commands to generate.