projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
e1000e: don't generate bad checksums for tcp packets with 0 csum
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
c3570acb 34#define DRV_VERSION "7.3.20-k3-NAPI"
abec42a4
SH		 35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
45static struct pci_device_id e1000_pci_tbl[] = {
46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN		 88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN		 93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT		 125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4
LT		 127static void e1000_82547_tx_fifo_stall(unsigned long data);
128static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
129static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
130static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
131static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 132static irqreturn_t e1000_intr(int irq, void *data);
9ac98284 133static irqreturn_t e1000_intr_msi(int irq, void *data);
c3033b01
JP		 134static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
bea3348e 136static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 137static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
581d708e 140static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 141 struct e1000_rx_ring *rx_ring,
142 int cleaned_count);
1da177e4
LT		 143static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
144static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
145 int cmd);
1da177e4
LT		 146static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
147static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
148static void e1000_tx_timeout(struct net_device *dev);
65f27f38 149static void e1000_reset_task(struct work_struct *work);
1da177e4 150static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 151static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
152 struct sk_buff *skb);
1da177e4
LT		 153
154static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP		 155static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
156static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 157static void e1000_restore_vlan(struct e1000_adapter *adapter);
158
977e74b5 159static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 160#ifdef CONFIG_PM
1da177e4
LT		 161static int e1000_resume(struct pci_dev *pdev);
162#endif
c653e635 163static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 164
165#ifdef CONFIG_NET_POLL_CONTROLLER
166/* for netdump / net console */
167static void e1000_netpoll (struct net_device *netdev);
168#endif
169
1f753861
JB		 170#define COPYBREAK_DEFAULT 256
171static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
172module_param(copybreak, uint, 0644);
173MODULE_PARM_DESC(copybreak,
174 "Maximum size of packet that is copied to a new buffer on receive");
175
9026729b
AK		 176static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
177 pci_channel_state_t state);
178static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
179static void e1000_io_resume(struct pci_dev *pdev);
180
181static struct pci_error_handlers e1000_err_handler = {
182 .error_detected = e1000_io_error_detected,
183 .slot_reset = e1000_io_slot_reset,
184 .resume = e1000_io_resume,
185};
24025e4e 186
1da177e4
LT		 187static struct pci_driver e1000_driver = {
188 .name = e1000_driver_name,
189 .id_table = e1000_pci_tbl,
190 .probe = e1000_probe,
191 .remove = __devexit_p(e1000_remove),
c4e24f01 192#ifdef CONFIG_PM
1da177e4 193 /* Power Managment Hooks */
1da177e4 194 .suspend = e1000_suspend,
c653e635 195 .resume = e1000_resume,
1da177e4 196#endif
9026729b
AK		 197 .shutdown = e1000_shutdown,
198 .err_handler = &e1000_err_handler
1da177e4
LT		 199};
200
201MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
202MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
203MODULE_LICENSE("GPL");
204MODULE_VERSION(DRV_VERSION);
205
206static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
207module_param(debug, int, 0);
208MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
209
210/**
211 * e1000_init_module - Driver Registration Routine
212 *
213 * e1000_init_module is the first routine called when the driver is
214 * loaded. All it does is register with the PCI subsystem.
215 **/
216
64798845 217static int __init e1000_init_module(void)
1da177e4
LT		 218{
219 int ret;
220 printk(KERN_INFO "%s - version %s\n",
221 e1000_driver_string, e1000_driver_version);
222
223 printk(KERN_INFO "%s\n", e1000_copyright);
224
29917620 225 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 226 if (copybreak != COPYBREAK_DEFAULT) {
227 if (copybreak == 0)
228 printk(KERN_INFO "e1000: copybreak disabled\n");
229 else
230 printk(KERN_INFO "e1000: copybreak enabled for "
231 "packets <= %u bytes\n", copybreak);
232 }
1da177e4
LT		 233 return ret;
234}
235
236module_init(e1000_init_module);
237
238/**
239 * e1000_exit_module - Driver Exit Cleanup Routine
240 *
241 * e1000_exit_module is called just before the driver is removed
242 * from memory.
243 **/
244
64798845 245static void __exit e1000_exit_module(void)
1da177e4 246{
1da177e4
LT		 247 pci_unregister_driver(&e1000_driver);
248}
249
250module_exit(e1000_exit_module);
251
2db10a08
AK		 252static int e1000_request_irq(struct e1000_adapter *adapter)
253{
1dc32918 254 struct e1000_hw *hw = &adapter->hw;
2db10a08 255 struct net_device *netdev = adapter->netdev;
3e18826c 256 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 257 int irq_flags = IRQF_SHARED;
258 int err;
2db10a08 259
1dc32918 260 if (hw->mac_type >= e1000_82571) {
e94bd23f
AK		 261 adapter->have_msi = !pci_enable_msi(adapter->pdev);
262 if (adapter->have_msi) {
3e18826c 263 handler = e1000_intr_msi;
e94bd23f 264 irq_flags = 0;
2db10a08
AK		 265 }
266 }
e94bd23f
AK		 267
268 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
269 netdev);
270 if (err) {
271 if (adapter->have_msi)
272 pci_disable_msi(adapter->pdev);
2db10a08
AK		 273 DPRINTK(PROBE, ERR,
274 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 275 }
2db10a08
AK		 276
277 return err;
278}
279
280static void e1000_free_irq(struct e1000_adapter *adapter)
281{
282 struct net_device *netdev = adapter->netdev;
283
284 free_irq(adapter->pdev->irq, netdev);
285
2db10a08
AK		 286 if (adapter->have_msi)
287 pci_disable_msi(adapter->pdev);
2db10a08
AK		 288}
289
1da177e4
LT		 290/**
291 * e1000_irq_disable - Mask off interrupt generation on the NIC
292 * @adapter: board private structure
293 **/
294
64798845 295static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 296{
1dc32918
JP		 297 struct e1000_hw *hw = &adapter->hw;
298
299 ew32(IMC, ~0);
300 E1000_WRITE_FLUSH();
1da177e4
LT		 301 synchronize_irq(adapter->pdev->irq);
302}
303
304/**
305 * e1000_irq_enable - Enable default interrupt generation settings
306 * @adapter: board private structure
307 **/
308
64798845 309static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 310{
1dc32918
JP		 311 struct e1000_hw *hw = &adapter->hw;
312
313 ew32(IMS, IMS_ENABLE_MASK);
314 E1000_WRITE_FLUSH();
1da177e4 315}
3ad2cc67 316
64798845 317static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 318{
1dc32918 319 struct e1000_hw *hw = &adapter->hw;
2d7edb92 320 struct net_device *netdev = adapter->netdev;
1dc32918 321 u16 vid = hw->mng_cookie.vlan_id;
406874a7 322 u16 old_vid = adapter->mng_vlan_id;
96838a40 323 if (adapter->vlgrp) {
5c15bdec 324 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 325 if (hw->mng_cookie.status &
2d7edb92
MC		 326 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
327 e1000_vlan_rx_add_vid(netdev, vid);
328 adapter->mng_vlan_id = vid;
329 } else
330 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 331
406874a7 332 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 333 (vid != old_vid) &&
5c15bdec 334 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 335 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 336 } else
337 adapter->mng_vlan_id = vid;
2d7edb92
MC		 338 }
339}
b55ccb35
JK		 340
341/**
342 * e1000_release_hw_control - release control of the h/w to f/w
343 * @adapter: address of board private structure
344 *
345 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
346 * For ASF and Pass Through versions of f/w this means that the
347 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 348 * of the f/w this means that the network i/f is closed.
76c224bc 349 *
b55ccb35
JK		 350 **/
351
64798845 352static void e1000_release_hw_control(struct e1000_adapter *adapter)
b55ccb35 353{
406874a7
JP		 354 u32 ctrl_ext;
355 u32 swsm;
1dc32918 356 struct e1000_hw *hw = &adapter->hw;
b55ccb35
JK		 357
358 /* Let firmware taken over control of h/w */
1dc32918 359 switch (hw->mac_type) {
b55ccb35 360 case e1000_82573:
1dc32918
JP		 361 swsm = er32(SWSM);
362 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
31d76442
BA		 363 break;
364 case e1000_82571:
365 case e1000_82572:
366 case e1000_80003es2lan:
cd94dd0b 367 case e1000_ich8lan:
1dc32918
JP		 368 ctrl_ext = er32(CTRL_EXT);
369 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 370 break;
b55ccb35
JK		 371 default:
372 break;
373 }
374}
375
376/**
377 * e1000_get_hw_control - get control of the h/w from f/w
378 * @adapter: address of board private structure
379 *
380 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 381 * For ASF and Pass Through versions of f/w this means that
382 * the driver is loaded. For AMT version (only with 82573)
90fb5135 383 * of the f/w this means that the network i/f is open.
76c224bc 384 *
b55ccb35
JK		 385 **/
386
64798845 387static void e1000_get_hw_control(struct e1000_adapter *adapter)
b55ccb35 388{
406874a7
JP		 389 u32 ctrl_ext;
390 u32 swsm;
1dc32918 391 struct e1000_hw *hw = &adapter->hw;
90fb5135 392
b55ccb35 393 /* Let firmware know the driver has taken over */
1dc32918 394 switch (hw->mac_type) {
b55ccb35 395 case e1000_82573:
1dc32918
JP		 396 swsm = er32(SWSM);
397 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
b55ccb35 398 break;
31d76442
BA		 399 case e1000_82571:
400 case e1000_82572:
401 case e1000_80003es2lan:
cd94dd0b 402 case e1000_ich8lan:
1dc32918
JP		 403 ctrl_ext = er32(CTRL_EXT);
404 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 405 break;
b55ccb35
JK		 406 default:
407 break;
408 }
409}
410
64798845 411static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 412{
1dc32918
JP		 413 struct e1000_hw *hw = &adapter->hw;
414
0fccd0e9 415 if (adapter->en_mng_pt) {
1dc32918 416 u32 manc = er32(MANC);
0fccd0e9
JG		 417
418 /* disable hardware interception of ARP */
419 manc &= ~(E1000_MANC_ARP_EN);
420
421 /* enable receiving management packets to the host */
422 /* this will probably generate destination unreachable messages
423 * from the host OS, but the packets will be handled on SMBUS */
1dc32918
JP		 424 if (hw->has_manc2h) {
425 u32 manc2h = er32(MANC2H);
0fccd0e9
JG		 426
427 manc |= E1000_MANC_EN_MNG2HOST;
428#define E1000_MNG2HOST_PORT_623 (1 << 5)
429#define E1000_MNG2HOST_PORT_664 (1 << 6)
430 manc2h |= E1000_MNG2HOST_PORT_623;
431 manc2h |= E1000_MNG2HOST_PORT_664;
1dc32918 432 ew32(MANC2H, manc2h);
0fccd0e9
JG		 433 }
434
1dc32918 435 ew32(MANC, manc);
0fccd0e9
JG		 436 }
437}
438
64798845 439static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 440{
1dc32918
JP		 441 struct e1000_hw *hw = &adapter->hw;
442
0fccd0e9 443 if (adapter->en_mng_pt) {
1dc32918 444 u32 manc = er32(MANC);
0fccd0e9
JG		 445
446 /* re-enable hardware interception of ARP */
447 manc |= E1000_MANC_ARP_EN;
448
1dc32918 449 if (hw->has_manc2h)
0fccd0e9
JG		 450 manc &= ~E1000_MANC_EN_MNG2HOST;
451
452 /* don't explicitly have to mess with MANC2H since
453 * MANC has an enable disable that gates MANC2H */
454
1dc32918 455 ew32(MANC, manc);
0fccd0e9
JG		 456 }
457}
458
e0aac5a2
AK		 459/**
460 * e1000_configure - configure the hardware for RX and TX
461 * @adapter = private board structure
462 **/
463static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 464{
465 struct net_device *netdev = adapter->netdev;
2db10a08 466 int i;
1da177e4 467
db0ce50d 468 e1000_set_rx_mode(netdev);
1da177e4
LT		 469
470 e1000_restore_vlan(adapter);
0fccd0e9 471 e1000_init_manageability(adapter);
1da177e4
LT		 472
473 e1000_configure_tx(adapter);
474 e1000_setup_rctl(adapter);
475 e1000_configure_rx(adapter);
72d64a43
JK		 476 /* call E1000_DESC_UNUSED which always leaves
477 * at least 1 descriptor unused to make sure
478 * next_to_use != next_to_clean */
f56799ea 479 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 480 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 481 adapter->alloc_rx_buf(adapter, ring,
482 E1000_DESC_UNUSED(ring));
f56799ea 483 }
1da177e4 484
7bfa4816 485 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 486}
487
488int e1000_up(struct e1000_adapter *adapter)
489{
1dc32918
JP		 490 struct e1000_hw *hw = &adapter->hw;
491
e0aac5a2
AK		 492 /* hardware has been reset, we need to reload some things */
493 e1000_configure(adapter);
494
495 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 496
bea3348e 497 napi_enable(&adapter->napi);
c3570acb 498
5de55624
MC		 499 e1000_irq_enable(adapter);
500
79f3d399 501 /* fire a link change interrupt to start the watchdog */
1dc32918 502 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 503 return 0;
504}
505
79f05bf0
AK		 506/**
507 * e1000_power_up_phy - restore link in case the phy was powered down
508 * @adapter: address of board private structure
509 *
510 * The phy may be powered down to save power and turn off link when the
511 * driver is unloaded and wake on lan is not enabled (among others)
512 * *** this routine MUST be followed by a call to e1000_reset ***
513 *
514 **/
515
d658266e 516void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 517{
1dc32918 518 struct e1000_hw *hw = &adapter->hw;
406874a7 519 u16 mii_reg = 0;
79f05bf0
AK		 520
521 /* Just clear the power down bit to wake the phy back up */
1dc32918 522 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 523 /* according to the manual, the phy will retain its
524 * settings across a power-down/up cycle */
1dc32918 525 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 526 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 527 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 528 }
529}
530
531static void e1000_power_down_phy(struct e1000_adapter *adapter)
532{
1dc32918
JP		 533 struct e1000_hw *hw = &adapter->hw;
534
61c2505f 535 /* Power down the PHY so no link is implied when interface is down *
c3033b01 536 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 537 * (a) WoL is enabled
538 * (b) AMT is active
539 * (c) SoL/IDER session is active */
1dc32918
JP		 540 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
541 hw->media_type == e1000_media_type_copper) {
406874a7 542 u16 mii_reg = 0;
61c2505f 543
1dc32918 544 switch (hw->mac_type) {
61c2505f
BA		 545 case e1000_82540:
546 case e1000_82545:
547 case e1000_82545_rev_3:
548 case e1000_82546:
549 case e1000_82546_rev_3:
550 case e1000_82541:
551 case e1000_82541_rev_2:
552 case e1000_82547:
553 case e1000_82547_rev_2:
1dc32918 554 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 555 goto out;
556 break;
557 case e1000_82571:
558 case e1000_82572:
559 case e1000_82573:
560 case e1000_80003es2lan:
561 case e1000_ich8lan:
1dc32918
JP		 562 if (e1000_check_mng_mode(hw) ||
563 e1000_check_phy_reset_block(hw))
61c2505f
BA		 564 goto out;
565 break;
566 default:
567 goto out;
568 }
1dc32918 569 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 570 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 571 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 572 mdelay(1);
573 }
61c2505f
BA		 574out:
575 return;
79f05bf0
AK		 576}
577
64798845 578void e1000_down(struct e1000_adapter *adapter)
1da177e4
LT		 579{
580 struct net_device *netdev = adapter->netdev;
581
1314bbf3
AK		 582 /* signal that we're down so the interrupt handler does not
583 * reschedule our watchdog timer */
584 set_bit(__E1000_DOWN, &adapter->flags);
585
bea3348e 586 napi_disable(&adapter->napi);
c3570acb 587
1da177e4 588 e1000_irq_disable(adapter);
c1605eb3 589
1da177e4
LT		 590 del_timer_sync(&adapter->tx_fifo_stall_timer);
591 del_timer_sync(&adapter->watchdog_timer);
592 del_timer_sync(&adapter->phy_info_timer);
593
7bfa4816 594 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 595 adapter->link_speed = 0;
596 adapter->link_duplex = 0;
597 netif_carrier_off(netdev);
598 netif_stop_queue(netdev);
599
600 e1000_reset(adapter);
581d708e
MC		 601 e1000_clean_all_tx_rings(adapter);
602 e1000_clean_all_rx_rings(adapter);
1da177e4 603}
1da177e4 604
64798845 605void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 606{
607 WARN_ON(in_interrupt());
608 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
609 msleep(1);
610 e1000_down(adapter);
611 e1000_up(adapter);
612 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 613}
614
64798845 615void e1000_reset(struct e1000_adapter *adapter)
1da177e4 616{
1dc32918 617 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 618 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
619 u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
c3033b01 620 bool legacy_pba_adjust = false;
1da177e4
LT		 621
622 /* Repartition Pba for greater than 9k mtu
623 * To take effect CTRL.RST is required.
624 */
625
1dc32918 626 switch (hw->mac_type) {
018ea44e
BA		 627 case e1000_82542_rev2_0:
628 case e1000_82542_rev2_1:
629 case e1000_82543:
630 case e1000_82544:
631 case e1000_82540:
632 case e1000_82541:
633 case e1000_82541_rev_2:
c3033b01 634 legacy_pba_adjust = true;
018ea44e
BA		 635 pba = E1000_PBA_48K;
636 break;
637 case e1000_82545:
638 case e1000_82545_rev_3:
639 case e1000_82546:
640 case e1000_82546_rev_3:
641 pba = E1000_PBA_48K;
642 break;
2d7edb92 643 case e1000_82547:
0e6ef3e0 644 case e1000_82547_rev_2:
c3033b01 645 legacy_pba_adjust = true;
2d7edb92
MC		 646 pba = E1000_PBA_30K;
647 break;
868d5309
MC		 648 case e1000_82571:
649 case e1000_82572:
6418ecc6 650 case e1000_80003es2lan:
868d5309
MC		 651 pba = E1000_PBA_38K;
652 break;
2d7edb92 653 case e1000_82573:
018ea44e 654 pba = E1000_PBA_20K;
2d7edb92 655 break;
cd94dd0b
AK		 656 case e1000_ich8lan:
657 pba = E1000_PBA_8K;
018ea44e
BA		 658 case e1000_undefined:
659 case e1000_num_macs:
2d7edb92
MC		 660 break;
661 }
662
c3033b01 663 if (legacy_pba_adjust) {
018ea44e
BA		 664 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
665 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 666
1dc32918 667 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 668 adapter->tx_fifo_head = 0;
669 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
670 adapter->tx_fifo_size =
671 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
672 atomic_set(&adapter->tx_fifo_stall, 0);
673 }
1dc32918 674 } else if (hw->max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
018ea44e 675 /* adjust PBA for jumbo frames */
1dc32918 676 ew32(PBA, pba);
018ea44e
BA		 677
678 /* To maintain wire speed transmits, the Tx FIFO should be
679 * large enough to accomodate two full transmit packets,
680 * rounded up to the next 1KB and expressed in KB. Likewise,
681 * the Rx FIFO should be large enough to accomodate at least
682 * one full receive packet and is similarly rounded up and
683 * expressed in KB. */
1dc32918 684 pba = er32(PBA);
018ea44e
BA		 685 /* upper 16 bits has Tx packet buffer allocation size in KB */
686 tx_space = pba >> 16;
687 /* lower 16 bits has Rx packet buffer allocation size in KB */
688 pba &= 0xffff;
689 /* don't include ethernet FCS because hardware appends/strips */
690 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
691 VLAN_TAG_SIZE;
692 min_tx_space = min_rx_space;
693 min_tx_space *= 2;
9099cfb9 694 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 695 min_tx_space >>= 10;
9099cfb9 696 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 697 min_rx_space >>= 10;
698
699 /* If current Tx allocation is less than the min Tx FIFO size,
700 * and the min Tx FIFO size is less than the current Rx FIFO
701 * allocation, take space away from current Rx allocation */
702 if (tx_space < min_tx_space &&
703 ((min_tx_space - tx_space) < pba)) {
704 pba = pba - (min_tx_space - tx_space);
705
706 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 707 switch (hw->mac_type) {
018ea44e
BA		 708 case e1000_82545 ... e1000_82546_rev_3:
709 pba &= ~(E1000_PBA_8K - 1);
710 break;
711 default:
712 break;
713 }
714
715 /* if short on rx space, rx wins and must trump tx
716 * adjustment or use Early Receive if available */
717 if (pba < min_rx_space) {
1dc32918 718 switch (hw->mac_type) {
018ea44e
BA		 719 case e1000_82573:
720 /* ERT enabled in e1000_configure_rx */
721 break;
722 default:
723 pba = min_rx_space;
724 break;
725 }
726 }
727 }
1da177e4 728 }
2d7edb92 729
1dc32918 730 ew32(PBA, pba);
1da177e4
LT		 731
732 /* flow control settings */
f11b7f85
JK		 733 /* Set the FC high water mark to 90% of the FIFO size.
734 * Required to clear last 3 LSB */
735 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 736 /* We can't use 90% on small FIFOs because the remainder
737 * would be less than 1 full frame. In this case, we size
738 * it to allow at least a full frame above the high water
739 * mark. */
740 if (pba < E1000_PBA_16K)
741 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85 742
1dc32918
JP		 743 hw->fc_high_water = fc_high_water_mark;
744 hw->fc_low_water = fc_high_water_mark - 8;
745 if (hw->mac_type == e1000_80003es2lan)
746 hw->fc_pause_time = 0xFFFF;
87041639 747 else
1dc32918
JP		 748 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
749 hw->fc_send_xon = 1;
750 hw->fc = hw->original_fc;
1da177e4 751
2d7edb92 752 /* Allow time for pending master requests to run */
1dc32918
JP		 753 e1000_reset_hw(hw);
754 if (hw->mac_type >= e1000_82544)
755 ew32(WUC, 0);
09ae3e88 756
1dc32918 757 if (e1000_init_hw(hw))
1da177e4 758 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 759 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 760
761 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918
JP		 762 if (hw->mac_type >= e1000_82544 &&
763 hw->mac_type <= e1000_82547_rev_2 &&
764 hw->autoneg == 1 &&
765 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
766 u32 ctrl = er32(CTRL);
3d5460a0
JB		 767 /* clear phy power management bit if we are in gig only mode,
768 * which if enabled will attempt negotiation to 100Mb, which
769 * can cause a loss of link at power off or driver unload */
770 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 771 ew32(CTRL, ctrl);
3d5460a0
JB		 772 }
773
1da177e4 774 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 775 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 776
1dc32918
JP		 777 e1000_reset_adaptive(hw);
778 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202
AK		 779
780 if (!adapter->smart_power_down &&
1dc32918
JP		 781 (hw->mac_type == e1000_82571 ||
782 hw->mac_type == e1000_82572)) {
406874a7 783 u16 phy_data = 0;
9a53a202
AK		 784 /* speed up time to link by disabling smart power down, ignore
785 * the return value of this function because there is nothing
786 * different we would do if it failed */
1dc32918 787 e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 788 &phy_data);
789 phy_data &= ~IGP02E1000_PM_SPD;
1dc32918 790 e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 791 phy_data);
792 }
793
0fccd0e9 794 e1000_release_manageability(adapter);
1da177e4
LT		 795}
796
67b3c27c
AK		 797/**
798 * Dump the eeprom for users having checksum issues
799 **/
b4ea895d 800static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 801{
802 struct net_device *netdev = adapter->netdev;
803 struct ethtool_eeprom eeprom;
804 const struct ethtool_ops *ops = netdev->ethtool_ops;
805 u8 *data;
806 int i;
807 u16 csum_old, csum_new = 0;
808
809 eeprom.len = ops->get_eeprom_len(netdev);
810 eeprom.offset = 0;
811
812 data = kmalloc(eeprom.len, GFP_KERNEL);
813 if (!data) {
814 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
815 " data\n");
816 return;
817 }
818
819 ops->get_eeprom(netdev, &eeprom, data);
820
821 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
822 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
823 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
824 csum_new += data[i] + (data[i + 1] << 8);
825 csum_new = EEPROM_SUM - csum_new;
826
827 printk(KERN_ERR "/*********************/\n");
828 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
829 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
830
831 printk(KERN_ERR "Offset Values\n");
832 printk(KERN_ERR "======== ======\n");
833 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
834
835 printk(KERN_ERR "Include this output when contacting your support "
836 "provider.\n");
837 printk(KERN_ERR "This is not a software error! Something bad "
838 "happened to your hardware or\n");
839 printk(KERN_ERR "EEPROM image. Ignoring this "
840 "problem could result in further problems,\n");
841 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
842 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
843 "which is invalid\n");
844 printk(KERN_ERR "and requires you to set the proper MAC "
845 "address manually before continuing\n");
846 printk(KERN_ERR "to enable this network device.\n");
847 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
848 "to your hardware vendor\n");
63cd31f6 849 printk(KERN_ERR "or Intel Customer Support.\n");
67b3c27c
AK		 850 printk(KERN_ERR "/*********************/\n");
851
852 kfree(data);
853}
854
81250297
TI		 855/**
856 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
857 * @pdev: PCI device information struct
858 *
859 * Return true if an adapter needs ioport resources
860 **/
861static int e1000_is_need_ioport(struct pci_dev *pdev)
862{
863 switch (pdev->device) {
864 case E1000_DEV_ID_82540EM:
865 case E1000_DEV_ID_82540EM_LOM:
866 case E1000_DEV_ID_82540EP:
867 case E1000_DEV_ID_82540EP_LOM:
868 case E1000_DEV_ID_82540EP_LP:
869 case E1000_DEV_ID_82541EI:
870 case E1000_DEV_ID_82541EI_MOBILE:
871 case E1000_DEV_ID_82541ER:
872 case E1000_DEV_ID_82541ER_LOM:
873 case E1000_DEV_ID_82541GI:
874 case E1000_DEV_ID_82541GI_LF:
875 case E1000_DEV_ID_82541GI_MOBILE:
876 case E1000_DEV_ID_82544EI_COPPER:
877 case E1000_DEV_ID_82544EI_FIBER:
878 case E1000_DEV_ID_82544GC_COPPER:
879 case E1000_DEV_ID_82544GC_LOM:
880 case E1000_DEV_ID_82545EM_COPPER:
881 case E1000_DEV_ID_82545EM_FIBER:
882 case E1000_DEV_ID_82546EB_COPPER:
883 case E1000_DEV_ID_82546EB_FIBER:
884 case E1000_DEV_ID_82546EB_QUAD_COPPER:
885 return true;
886 default:
887 return false;
888 }
889}
890
1da177e4
LT		 891/**
892 * e1000_probe - Device Initialization Routine
893 * @pdev: PCI device information struct
894 * @ent: entry in e1000_pci_tbl
895 *
896 * Returns 0 on success, negative on failure
897 *
898 * e1000_probe initializes an adapter identified by a pci_dev structure.
899 * The OS initialization, configuring of the adapter private structure,
900 * and a hardware reset occur.
901 **/
1dc32918
JP		 902static int __devinit e1000_probe(struct pci_dev *pdev,
903 const struct pci_device_id *ent)
1da177e4
LT		 904{
905 struct net_device *netdev;
906 struct e1000_adapter *adapter;
1dc32918 907 struct e1000_hw *hw;
2d7edb92 908
1da177e4 909 static int cards_found = 0;
120cd576 910 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 911 int i, err, pci_using_dac;
406874a7
JP		 912 u16 eeprom_data = 0;
913 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 914 int bars, need_ioport;
0795af57
JP		 915 DECLARE_MAC_BUF(mac);
916
81250297
TI		 917 /* do not allocate ioport bars when not needed */
918 need_ioport = e1000_is_need_ioport(pdev);
919 if (need_ioport) {
920 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
921 err = pci_enable_device(pdev);
922 } else {
923 bars = pci_select_bars(pdev, IORESOURCE_MEM);
924 err = pci_enable_device(pdev);
925 }
c7be73bc 926 if (err)
1da177e4
LT		 927 return err;
928
c7be73bc
JP		 929 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
930 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
1da177e4
LT		 931 pci_using_dac = 1;
932 } else {
c7be73bc
JP		 933 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
934 if (err) {
935 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
936 if (err) {
937 E1000_ERR("No usable DMA configuration, "
938 "aborting\n");
939 goto err_dma;
940 }
1da177e4
LT		 941 }
942 pci_using_dac = 0;
943 }
944
81250297 945 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 946 if (err)
6dd62ab0 947 goto err_pci_reg;
1da177e4
LT		 948
949 pci_set_master(pdev);
950
6dd62ab0 951 err = -ENOMEM;
1da177e4 952 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 953 if (!netdev)
1da177e4 954 goto err_alloc_etherdev;
1da177e4 955
1da177e4
LT		 956 SET_NETDEV_DEV(netdev, &pdev->dev);
957
958 pci_set_drvdata(pdev, netdev);
60490fe0 959 adapter = netdev_priv(netdev);
1da177e4
LT		 960 adapter->netdev = netdev;
961 adapter->pdev = pdev;
1da177e4 962 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 963 adapter->bars = bars;
964 adapter->need_ioport = need_ioport;
1da177e4 965
1dc32918
JP		 966 hw = &adapter->hw;
967 hw->back = adapter;
968
6dd62ab0 969 err = -EIO;
1dc32918
JP		 970 hw->hw_addr = ioremap(pci_resource_start(pdev, BAR_0),
971 pci_resource_len(pdev, BAR_0));
972 if (!hw->hw_addr)
1da177e4 973 goto err_ioremap;
1da177e4 974
81250297
TI		 975 if (adapter->need_ioport) {
976 for (i = BAR_1; i <= BAR_5; i++) {
977 if (pci_resource_len(pdev, i) == 0)
978 continue;
979 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
980 hw->io_base = pci_resource_start(pdev, i);
981 break;
982 }
1da177e4
LT		 983 }
984 }
985
986 netdev->open = &e1000_open;
987 netdev->stop = &e1000_close;
988 netdev->hard_start_xmit = &e1000_xmit_frame;
989 netdev->get_stats = &e1000_get_stats;
db0ce50d 990 netdev->set_rx_mode = &e1000_set_rx_mode;
1da177e4
LT		 991 netdev->set_mac_address = &e1000_set_mac;
992 netdev->change_mtu = &e1000_change_mtu;
993 netdev->do_ioctl = &e1000_ioctl;
994 e1000_set_ethtool_ops(netdev);
995 netdev->tx_timeout = &e1000_tx_timeout;
996 netdev->watchdog_timeo = 5 * HZ;
bea3348e 997 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
1da177e4
LT		 998 netdev->vlan_rx_register = e1000_vlan_rx_register;
999 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
1000 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
1001#ifdef CONFIG_NET_POLL_CONTROLLER
1002 netdev->poll_controller = e1000_netpoll;
1003#endif
0eb5a34c 1004 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1005
1da177e4
LT		 1006 adapter->bd_number = cards_found;
1007
1008 /* setup the private structure */
1009
c7be73bc
JP		 1010 err = e1000_sw_init(adapter);
1011 if (err)
1da177e4
LT		 1012 goto err_sw_init;
1013
6dd62ab0 1014 err = -EIO;
cd94dd0b
AK		 1015 /* Flash BAR mapping must happen after e1000_sw_init
1016 * because it depends on mac_type */
1dc32918 1017 if ((hw->mac_type == e1000_ich8lan) &&
cd94dd0b 1018 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1dc32918 1019 hw->flash_address =
3c34ac36
BH		 1020 ioremap(pci_resource_start(pdev, 1),
1021 pci_resource_len(pdev, 1));
1dc32918 1022 if (!hw->flash_address)
cd94dd0b 1023 goto err_flashmap;
cd94dd0b
AK		 1024 }
1025
1dc32918 1026 if (e1000_check_phy_reset_block(hw))
2d7edb92
MC		 1027 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1028
1dc32918 1029 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 1030 netdev->features = NETIF_F_SG |
1031 NETIF_F_HW_CSUM |
1032 NETIF_F_HW_VLAN_TX |
1033 NETIF_F_HW_VLAN_RX |
1034 NETIF_F_HW_VLAN_FILTER;
1dc32918 1035 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 1036 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 1037 }
1038
1dc32918
JP		 1039 if ((hw->mac_type >= e1000_82544) &&
1040 (hw->mac_type != e1000_82547))
1da177e4 1041 netdev->features |= NETIF_F_TSO;
2d7edb92 1042
1dc32918 1043 if (hw->mac_type > e1000_82547_rev_2)
87ca4e5b 1044 netdev->features |= NETIF_F_TSO6;
96838a40 1045 if (pci_using_dac)
1da177e4
LT		 1046 netdev->features |= NETIF_F_HIGHDMA;
1047
76c224bc
AK		 1048 netdev->features |= NETIF_F_LLTX;
1049
1dc32918 1050 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1051
cd94dd0b 1052 /* initialize eeprom parameters */
1dc32918 1053 if (e1000_init_eeprom_params(hw)) {
cd94dd0b 1054 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 1055 goto err_eeprom;
cd94dd0b
AK		 1056 }
1057
96838a40 1058 /* before reading the EEPROM, reset the controller to
1da177e4 1059 * put the device in a known good starting state */
96838a40 1060
1dc32918 1061 e1000_reset_hw(hw);
1da177e4
LT		 1062
1063 /* make sure the EEPROM is good */
1dc32918 1064 if (e1000_validate_eeprom_checksum(hw) < 0) {
1da177e4 1065 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 1066 e1000_dump_eeprom(adapter);
1067 /*
1068 * set MAC address to all zeroes to invalidate and temporary
1069 * disable this device for the user. This blocks regular
1070 * traffic while still permitting ethtool ioctls from reaching
1071 * the hardware as well as allowing the user to run the
1072 * interface after manually setting a hw addr using
1073 * `ip set address`
1074 */
1dc32918 1075 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1076 } else {
1077 /* copy the MAC address out of the EEPROM */
1dc32918 1078 if (e1000_read_mac_addr(hw))
67b3c27c 1079 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1da177e4 1080 }
67b3c27c 1081 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 1082 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1083 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1084
67b3c27c 1085 if (!is_valid_ether_addr(netdev->perm_addr))
1da177e4 1086 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4 1087
1dc32918 1088 e1000_get_bus_info(hw);
1da177e4
LT		 1089
1090 init_timer(&adapter->tx_fifo_stall_timer);
1091 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
e982f17c 1092 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 1093
1094 init_timer(&adapter->watchdog_timer);
1095 adapter->watchdog_timer.function = &e1000_watchdog;
1096 adapter->watchdog_timer.data = (unsigned long) adapter;
1097
1da177e4
LT		 1098 init_timer(&adapter->phy_info_timer);
1099 adapter->phy_info_timer.function = &e1000_update_phy_info;
e982f17c 1100 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 1101
65f27f38 1102 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1103
1da177e4
LT		 1104 e1000_check_options(adapter);
1105
1106 /* Initial Wake on LAN setting
1107 * If APM wake is enabled in the EEPROM,
1108 * enable the ACPI Magic Packet filter
1109 */
1110
1dc32918 1111 switch (hw->mac_type) {
1da177e4
LT		 1112 case e1000_82542_rev2_0:
1113 case e1000_82542_rev2_1:
1114 case e1000_82543:
1115 break;
1116 case e1000_82544:
1dc32918 1117 e1000_read_eeprom(hw,
1da177e4
LT		 1118 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1119 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1120 break;
cd94dd0b 1121 case e1000_ich8lan:
1dc32918 1122 e1000_read_eeprom(hw,
cd94dd0b
AK		 1123 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1124 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1125 break;
1da177e4
LT		 1126 case e1000_82546:
1127 case e1000_82546_rev_3:
fd803241 1128 case e1000_82571:
6418ecc6 1129 case e1000_80003es2lan:
1dc32918
JP		 1130 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1131 e1000_read_eeprom(hw,
1da177e4
LT		 1132 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1133 break;
1134 }
1135 /* Fall Through */
1136 default:
1dc32918 1137 e1000_read_eeprom(hw,
1da177e4
LT		 1138 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1139 break;
1140 }
96838a40 1141 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1142 adapter->eeprom_wol |= E1000_WUFC_MAG;
1143
1144 /* now that we have the eeprom settings, apply the special cases
1145 * where the eeprom may be wrong or the board simply won't support
1146 * wake on lan on a particular port */
1147 switch (pdev->device) {
1148 case E1000_DEV_ID_82546GB_PCIE:
1149 adapter->eeprom_wol = 0;
1150 break;
1151 case E1000_DEV_ID_82546EB_FIBER:
1152 case E1000_DEV_ID_82546GB_FIBER:
1153 case E1000_DEV_ID_82571EB_FIBER:
1154 /* Wake events only supported on port A for dual fiber
1155 * regardless of eeprom setting */
1dc32918 1156 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1157 adapter->eeprom_wol = 0;
1158 break;
1159 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 1160 case E1000_DEV_ID_82571EB_QUAD_COPPER:
ce57a02c 1161 case E1000_DEV_ID_82571EB_QUAD_FIBER:
fc2307d0 1162 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
f4ec7f98 1163 case E1000_DEV_ID_82571PT_QUAD_COPPER:
120cd576
JB		 1164 /* if quad port adapter, disable WoL on all but port A */
1165 if (global_quad_port_a != 0)
1166 adapter->eeprom_wol = 0;
1167 else
1168 adapter->quad_port_a = 1;
1169 /* Reset for multiple quad port adapters */
1170 if (++global_quad_port_a == 4)
1171 global_quad_port_a = 0;
1172 break;
1173 }
1174
1175 /* initialize the wol settings based on the eeprom settings */
1176 adapter->wol = adapter->eeprom_wol;
1da177e4 1177
fb3d47d4 1178 /* print bus type/speed/width info */
fb3d47d4
JK		 1179 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1180 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1181 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1182 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1183 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1184 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1185 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1186 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1187 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1188 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1189 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1190 "32-bit"));
fb3d47d4 1191
0795af57 1192 printk("%s\n", print_mac(mac, netdev->dev_addr));
fb3d47d4 1193
1dc32918 1194 if (hw->bus_type == e1000_bus_type_pci_express) {
14782ca8
AK		 1195 DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no "
1196 "longer be supported by this driver in the future.\n",
1197 pdev->vendor, pdev->device);
1198 DPRINTK(PROBE, WARNING, "please use the \"e1000e\" "
1199 "driver instead.\n");
1200 }
1201
1da177e4
LT		 1202 /* reset the hardware with the new settings */
1203 e1000_reset(adapter);
1204
b55ccb35
JK		 1205 /* If the controller is 82573 and f/w is AMT, do not set
1206 * DRV_LOAD until the interface is up. For all other cases,
1207 * let the f/w know that the h/w is now under the control
1208 * of the driver. */
1dc32918
JP		 1209 if (hw->mac_type != e1000_82573 ||
1210 !e1000_check_mng_mode(hw))
b55ccb35 1211 e1000_get_hw_control(adapter);
2d7edb92 1212
1314bbf3
AK		 1213 /* tell the stack to leave us alone until e1000_open() is called */
1214 netif_carrier_off(netdev);
1215 netif_stop_queue(netdev);
416b5d10
AK		 1216
1217 strcpy(netdev->name, "eth%d");
c7be73bc
JP		 1218 err = register_netdev(netdev);
1219 if (err)
416b5d10 1220 goto err_register;
1314bbf3 1221
1da177e4
LT		 1222 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1223
1224 cards_found++;
1225 return 0;
1226
1227err_register:
6dd62ab0
VA		 1228 e1000_release_hw_control(adapter);
1229err_eeprom:
1dc32918
JP		 1230 if (!e1000_check_phy_reset_block(hw))
1231 e1000_phy_hw_reset(hw);
6dd62ab0 1232
1dc32918
JP		 1233 if (hw->flash_address)
1234 iounmap(hw->flash_address);
cd94dd0b 1235err_flashmap:
6dd62ab0
VA		 1236 for (i = 0; i < adapter->num_rx_queues; i++)
1237 dev_put(&adapter->polling_netdev[i]);
6dd62ab0
VA		 1238
1239 kfree(adapter->tx_ring);
1240 kfree(adapter->rx_ring);
6dd62ab0 1241 kfree(adapter->polling_netdev);
1da177e4 1242err_sw_init:
1dc32918 1243 iounmap(hw->hw_addr);
1da177e4
LT		 1244err_ioremap:
1245 free_netdev(netdev);
1246err_alloc_etherdev:
81250297 1247 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA		 1248err_pci_reg:
1249err_dma:
1250 pci_disable_device(pdev);
1da177e4
LT		 1251 return err;
1252}
1253
1254/**
1255 * e1000_remove - Device Removal Routine
1256 * @pdev: PCI device information struct
1257 *
1258 * e1000_remove is called by the PCI subsystem to alert the driver
1259 * that it should release a PCI device. The could be caused by a
1260 * Hot-Plug event, or because the driver is going to be removed from
1261 * memory.
1262 **/
1263
64798845 1264static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1265{
1266 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1267 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1268 struct e1000_hw *hw = &adapter->hw;
581d708e 1269 int i;
1da177e4 1270
28e53bdd 1271 cancel_work_sync(&adapter->reset_task);
be2b28ed 1272
0fccd0e9 1273 e1000_release_manageability(adapter);
1da177e4 1274
b55ccb35
JK		 1275 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1276 * would have already happened in close and is redundant. */
1277 e1000_release_hw_control(adapter);
2d7edb92 1278
f56799ea 1279 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1280 dev_put(&adapter->polling_netdev[i]);
1da177e4 1281
bea3348e
SH		 1282 unregister_netdev(netdev);
1283
1dc32918
JP		 1284 if (!e1000_check_phy_reset_block(hw))
1285 e1000_phy_hw_reset(hw);
1da177e4 1286
24025e4e
MC		 1287 kfree(adapter->tx_ring);
1288 kfree(adapter->rx_ring);
24025e4e 1289 kfree(adapter->polling_netdev);
24025e4e 1290
1dc32918
JP		 1291 iounmap(hw->hw_addr);
1292 if (hw->flash_address)
1293 iounmap(hw->flash_address);
81250297 1294 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1295
1296 free_netdev(netdev);
1297
1298 pci_disable_device(pdev);
1299}
1300
1301/**
1302 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1303 * @adapter: board private structure to initialize
1304 *
1305 * e1000_sw_init initializes the Adapter private data structure.
1306 * Fields are initialized based on PCI device information and
1307 * OS network device settings (MTU size).
1308 **/
1309
64798845 1310static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT		 1311{
1312 struct e1000_hw *hw = &adapter->hw;
1313 struct net_device *netdev = adapter->netdev;
1314 struct pci_dev *pdev = adapter->pdev;
581d708e 1315 int i;
1da177e4
LT		 1316
1317 /* PCI config space info */
1318
1319 hw->vendor_id = pdev->vendor;
1320 hw->device_id = pdev->device;
1321 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1322 hw->subsystem_id = pdev->subsystem_device;
44c10138 1323 hw->revision_id = pdev->revision;
1da177e4
LT		 1324
1325 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1326
eb0f8054 1327 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT		 1328 hw->max_frame_size = netdev->mtu +
1329 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1330 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1331
1332 /* identify the MAC */
1333
96838a40 1334 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1335 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1336 return -EIO;
1337 }
1338
96838a40 1339 switch (hw->mac_type) {
1da177e4
LT		 1340 default:
1341 break;
1342 case e1000_82541:
1343 case e1000_82547:
1344 case e1000_82541_rev_2:
1345 case e1000_82547_rev_2:
1346 hw->phy_init_script = 1;
1347 break;
1348 }
1349
1350 e1000_set_media_type(hw);
1351
c3033b01
JP		 1352 hw->wait_autoneg_complete = false;
1353 hw->tbi_compatibility_en = true;
1354 hw->adaptive_ifs = true;
1da177e4
LT		 1355
1356 /* Copper options */
1357
96838a40 1358 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1359 hw->mdix = AUTO_ALL_MODES;
c3033b01 1360 hw->disable_polarity_correction = false;
1da177e4
LT		 1361 hw->master_slave = E1000_MASTER_SLAVE;
1362 }
1363
f56799ea
JK		 1364 adapter->num_tx_queues = 1;
1365 adapter->num_rx_queues = 1;
581d708e
MC		 1366
1367 if (e1000_alloc_queues(adapter)) {
1368 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1369 return -ENOMEM;
1370 }
1371
f56799ea 1372 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e 1373 adapter->polling_netdev[i].priv = adapter;
581d708e
MC		 1374 dev_hold(&adapter->polling_netdev[i]);
1375 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1376 }
7bfa4816 1377 spin_lock_init(&adapter->tx_queue_lock);
24025e4e 1378
47313054 1379 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1380 e1000_irq_disable(adapter);
1381
1da177e4 1382 spin_lock_init(&adapter->stats_lock);
1da177e4 1383
1314bbf3
AK		 1384 set_bit(__E1000_DOWN, &adapter->flags);
1385
1da177e4
LT		 1386 return 0;
1387}
1388
581d708e
MC		 1389/**
1390 * e1000_alloc_queues - Allocate memory for all rings
1391 * @adapter: board private structure to initialize
1392 *
1393 * We allocate one ring per queue at run-time since we don't know the
1394 * number of queues at compile-time. The polling_netdev array is
1395 * intended for Multiqueue, but should work fine with a single queue.
1396 **/
1397
64798845 1398static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1399{
1c7e5b12
YB		 1400 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1401 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1402 if (!adapter->tx_ring)
1403 return -ENOMEM;
581d708e 1404
1c7e5b12
YB		 1405 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1406 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1407 if (!adapter->rx_ring) {
1408 kfree(adapter->tx_ring);
1409 return -ENOMEM;
1410 }
581d708e 1411
1c7e5b12
YB		 1412 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1413 sizeof(struct net_device),
1414 GFP_KERNEL);
581d708e
MC		 1415 if (!adapter->polling_netdev) {
1416 kfree(adapter->tx_ring);
1417 kfree(adapter->rx_ring);
1418 return -ENOMEM;
1419 }
581d708e
MC		 1420
1421 return E1000_SUCCESS;
1422}
1423
1da177e4
LT		 1424/**
1425 * e1000_open - Called when a network interface is made active
1426 * @netdev: network interface device structure
1427 *
1428 * Returns 0 on success, negative value on failure
1429 *
1430 * The open entry point is called when a network interface is made
1431 * active by the system (IFF_UP). At this point all resources needed
1432 * for transmit and receive operations are allocated, the interrupt
1433 * handler is registered with the OS, the watchdog timer is started,
1434 * and the stack is notified that the interface is ready.
1435 **/
1436
64798845 1437static int e1000_open(struct net_device *netdev)
1da177e4 1438{
60490fe0 1439 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1440 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1441 int err;
1442
2db10a08 1443 /* disallow open during test */
1314bbf3 1444 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1445 return -EBUSY;
1446
1da177e4 1447 /* allocate transmit descriptors */
e0aac5a2
AK		 1448 err = e1000_setup_all_tx_resources(adapter);
1449 if (err)
1da177e4
LT		 1450 goto err_setup_tx;
1451
1452 /* allocate receive descriptors */
e0aac5a2 1453 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1454 if (err)
e0aac5a2 1455 goto err_setup_rx;
b5bf28cd 1456
79f05bf0
AK		 1457 e1000_power_up_phy(adapter);
1458
2d7edb92 1459 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1460 if ((hw->mng_cookie.status &
2d7edb92
MC		 1461 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1462 e1000_update_mng_vlan(adapter);
1463 }
1da177e4 1464
b55ccb35
JK		 1465 /* If AMT is enabled, let the firmware know that the network
1466 * interface is now open */
1dc32918
JP		 1467 if (hw->mac_type == e1000_82573 &&
1468 e1000_check_mng_mode(hw))
b55ccb35
JK		 1469 e1000_get_hw_control(adapter);
1470
e0aac5a2
AK		 1471 /* before we allocate an interrupt, we must be ready to handle it.
1472 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1473 * as soon as we call pci_request_irq, so we have to setup our
1474 * clean_rx handler before we do so. */
1475 e1000_configure(adapter);
1476
1477 err = e1000_request_irq(adapter);
1478 if (err)
1479 goto err_req_irq;
1480
1481 /* From here on the code is the same as e1000_up() */
1482 clear_bit(__E1000_DOWN, &adapter->flags);
1483
bea3348e 1484 napi_enable(&adapter->napi);
47313054 1485
e0aac5a2
AK		 1486 e1000_irq_enable(adapter);
1487
076152d5
BH		 1488 netif_start_queue(netdev);
1489
e0aac5a2 1490 /* fire a link status change interrupt to start the watchdog */
1dc32918 1491 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1492
1da177e4
LT		 1493 return E1000_SUCCESS;
1494
b5bf28cd 1495err_req_irq:
e0aac5a2
AK		 1496 e1000_release_hw_control(adapter);
1497 e1000_power_down_phy(adapter);
581d708e 1498 e1000_free_all_rx_resources(adapter);
1da177e4 1499err_setup_rx:
581d708e 1500 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1501err_setup_tx:
1502 e1000_reset(adapter);
1503
1504 return err;
1505}
1506
1507/**
1508 * e1000_close - Disables a network interface
1509 * @netdev: network interface device structure
1510 *
1511 * Returns 0, this is not allowed to fail
1512 *
1513 * The close entry point is called when an interface is de-activated
1514 * by the OS. The hardware is still under the drivers control, but
1515 * needs to be disabled. A global MAC reset is issued to stop the
1516 * hardware, and all transmit and receive resources are freed.
1517 **/
1518
64798845 1519static int e1000_close(struct net_device *netdev)
1da177e4 1520{
60490fe0 1521 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1522 struct e1000_hw *hw = &adapter->hw;
1da177e4 1523
2db10a08 1524 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1525 e1000_down(adapter);
79f05bf0 1526 e1000_power_down_phy(adapter);
2db10a08 1527 e1000_free_irq(adapter);
1da177e4 1528
581d708e
MC		 1529 e1000_free_all_tx_resources(adapter);
1530 e1000_free_all_rx_resources(adapter);
1da177e4 1531
4666560a
BA		 1532 /* kill manageability vlan ID if supported, but not if a vlan with
1533 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1534 if ((hw->mng_cookie.status &
4666560a
BA		 1535 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1536 !(adapter->vlgrp &&
5c15bdec 1537 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1538 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1539 }
b55ccb35
JK		 1540
1541 /* If AMT is enabled, let the firmware know that the network
1542 * interface is now closed */
1dc32918
JP		 1543 if (hw->mac_type == e1000_82573 &&
1544 e1000_check_mng_mode(hw))
b55ccb35
JK		 1545 e1000_release_hw_control(adapter);
1546
1da177e4
LT		 1547 return 0;
1548}
1549
1550/**
1551 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1552 * @adapter: address of board private structure
2d7edb92
MC		 1553 * @start: address of beginning of memory
1554 * @len: length of memory
1da177e4 1555 **/
64798845
JP		 1556static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1557 unsigned long len)
1da177e4 1558{
1dc32918 1559 struct e1000_hw *hw = &adapter->hw;
e982f17c 1560 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1561 unsigned long end = begin + len;
1562
2648345f
MC		 1563 /* First rev 82545 and 82546 need to not allow any memory
1564 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP		 1565 if (hw->mac_type == e1000_82545 ||
1566 hw->mac_type == e1000_82546) {
c3033b01 1567 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1568 }
1569
c3033b01 1570 return true;
1da177e4
LT		 1571}
1572
1573/**
1574 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1575 * @adapter: board private structure
581d708e 1576 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1577 *
1578 * Return 0 on success, negative on failure
1579 **/
1580
64798845
JP		 1581static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1582 struct e1000_tx_ring *txdr)
1da177e4 1583{
1da177e4
LT		 1584 struct pci_dev *pdev = adapter->pdev;
1585 int size;
1586
1587 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1588 txdr->buffer_info = vmalloc(size);
96838a40 1589 if (!txdr->buffer_info) {
2648345f
MC		 1590 DPRINTK(PROBE, ERR,
1591 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1592 return -ENOMEM;
1593 }
1594 memset(txdr->buffer_info, 0, size);
1595
1596 /* round up to nearest 4K */
1597
1598 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1599 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1600
1601 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1602 if (!txdr->desc) {
1da177e4 1603setup_tx_desc_die:
1da177e4 1604 vfree(txdr->buffer_info);
2648345f
MC		 1605 DPRINTK(PROBE, ERR,
1606 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1607 return -ENOMEM;
1608 }
1609
2648345f 1610 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1611 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1612 void *olddesc = txdr->desc;
1613 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1614 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1615 "at %p\n", txdr->size, txdr->desc);
1616 /* Try again, without freeing the previous */
1da177e4 1617 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1618 /* Failed allocation, critical failure */
96838a40 1619 if (!txdr->desc) {
1da177e4
LT		 1620 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1621 goto setup_tx_desc_die;
1622 }
1623
1624 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1625 /* give up */
2648345f
MC		 1626 pci_free_consistent(pdev, txdr->size, txdr->desc,
1627 txdr->dma);
1da177e4
LT		 1628 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1629 DPRINTK(PROBE, ERR,
2648345f
MC		 1630 "Unable to allocate aligned memory "
1631 "for the transmit descriptor ring\n");
1da177e4
LT		 1632 vfree(txdr->buffer_info);
1633 return -ENOMEM;
1634 } else {
2648345f 1635 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1636 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1637 }
1638 }
1639 memset(txdr->desc, 0, txdr->size);
1640
1641 txdr->next_to_use = 0;
1642 txdr->next_to_clean = 0;
2ae76d98 1643 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1644
1645 return 0;
1646}
1647
581d708e
MC		 1648/**
1649 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1650 * (Descriptors) for all queues
1651 * @adapter: board private structure
1652 *
581d708e
MC		 1653 * Return 0 on success, negative on failure
1654 **/
1655
64798845 1656int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1657{
1658 int i, err = 0;
1659
f56799ea 1660 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1661 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1662 if (err) {
1663 DPRINTK(PROBE, ERR,
1664 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1665 for (i-- ; i >= 0; i--)
1666 e1000_free_tx_resources(adapter,
1667 &adapter->tx_ring[i]);
581d708e
MC		 1668 break;
1669 }
1670 }
1671
1672 return err;
1673}
1674
1da177e4
LT		 1675/**
1676 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1677 * @adapter: board private structure
1678 *
1679 * Configure the Tx unit of the MAC after a reset.
1680 **/
1681
64798845 1682static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1683{
406874a7 1684 u64 tdba;
581d708e 1685 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1686 u32 tdlen, tctl, tipg, tarc;
1687 u32 ipgr1, ipgr2;
1da177e4
LT		 1688
1689 /* Setup the HW Tx Head and Tail descriptor pointers */
1690
f56799ea 1691 switch (adapter->num_tx_queues) {
24025e4e
MC		 1692 case 1:
1693 default:
581d708e
MC		 1694 tdba = adapter->tx_ring[0].dma;
1695 tdlen = adapter->tx_ring[0].count *
1696 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1697 ew32(TDLEN, tdlen);
1698 ew32(TDBAH, (tdba >> 32));
1699 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1700 ew32(TDT, 0);
1701 ew32(TDH, 0);
6a951698
AK		 1702 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1703 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1704 break;
1705 }
1da177e4
LT		 1706
1707 /* Set the default values for the Tx Inter Packet Gap timer */
1dc32918 1708 if (hw->mac_type <= e1000_82547_rev_2 &&
d89b6c67
JB		 1709 (hw->media_type == e1000_media_type_fiber ||
1710 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1711 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1712 else
1713 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1714
581d708e 1715 switch (hw->mac_type) {
1da177e4
LT		 1716 case e1000_82542_rev2_0:
1717 case e1000_82542_rev2_1:
1718 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1719 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1720 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1721 break;
87041639
JK		 1722 case e1000_80003es2lan:
1723 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1724 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1725 break;
1da177e4 1726 default:
0fadb059
JK		 1727 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1728 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1729 break;
1da177e4 1730 }
0fadb059
JK		 1731 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1732 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1733 ew32(TIPG, tipg);
1da177e4
LT		 1734
1735 /* Set the Tx Interrupt Delay register */
1736
1dc32918 1737 ew32(TIDV, adapter->tx_int_delay);
581d708e 1738 if (hw->mac_type >= e1000_82540)
1dc32918 1739 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1740
1741 /* Program the Transmit Control Register */
1742
1dc32918 1743 tctl = er32(TCTL);
1da177e4 1744 tctl &= ~E1000_TCTL_CT;
7e6c9861 1745 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1746 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1747
2ae76d98 1748 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1dc32918 1749 tarc = er32(TARC0);
90fb5135
AK		 1750 /* set the speed mode bit, we'll clear it if we're not at
1751 * gigabit link later */
09ae3e88 1752 tarc |= (1 << 21);
1dc32918 1753 ew32(TARC0, tarc);
87041639 1754 } else if (hw->mac_type == e1000_80003es2lan) {
1dc32918 1755 tarc = er32(TARC0);
87041639 1756 tarc |= 1;
1dc32918
JP		 1757 ew32(TARC0, tarc);
1758 tarc = er32(TARC1);
87041639 1759 tarc |= 1;
1dc32918 1760 ew32(TARC1, tarc);
2ae76d98
MC		 1761 }
1762
581d708e 1763 e1000_config_collision_dist(hw);
1da177e4
LT		 1764
1765 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1766 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1767
1768 /* only set IDE if we are delaying interrupts using the timers */
1769 if (adapter->tx_int_delay)
1770 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1771
581d708e 1772 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1773 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1774 else
1775 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1776
1777 /* Cache if we're 82544 running in PCI-X because we'll
1778 * need this to apply a workaround later in the send path. */
581d708e
MC		 1779 if (hw->mac_type == e1000_82544 &&
1780 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1781 adapter->pcix_82544 = 1;
7e6c9861 1782
1dc32918 1783 ew32(TCTL, tctl);
7e6c9861 1784
1da177e4
LT		 1785}
1786
1787/**
1788 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1789 * @adapter: board private structure
581d708e 1790 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1791 *
1792 * Returns 0 on success, negative on failure
1793 **/
1794
64798845
JP		 1795static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1796 struct e1000_rx_ring *rxdr)
1da177e4 1797{
1dc32918 1798 struct e1000_hw *hw = &adapter->hw;
1da177e4 1799 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1800 int size, desc_len;
1da177e4
LT		 1801
1802 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1803 rxdr->buffer_info = vmalloc(size);
581d708e 1804 if (!rxdr->buffer_info) {
2648345f
MC		 1805 DPRINTK(PROBE, ERR,
1806 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1807 return -ENOMEM;
1808 }
1809 memset(rxdr->buffer_info, 0, size);
1810
1dc32918 1811 if (hw->mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1812 desc_len = sizeof(struct e1000_rx_desc);
1813 else
1814 desc_len = sizeof(union e1000_rx_desc_packet_split);
1815
1da177e4
LT		 1816 /* Round up to nearest 4K */
1817
2d7edb92 1818 rxdr->size = rxdr->count * desc_len;
9099cfb9 1819 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1820
1821 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1822
581d708e
MC		 1823 if (!rxdr->desc) {
1824 DPRINTK(PROBE, ERR,
1825 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1826setup_rx_desc_die:
1da177e4
LT		 1827 vfree(rxdr->buffer_info);
1828 return -ENOMEM;
1829 }
1830
2648345f 1831 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1832 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1833 void *olddesc = rxdr->desc;
1834 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1835 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1836 "at %p\n", rxdr->size, rxdr->desc);
1837 /* Try again, without freeing the previous */
1da177e4 1838 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1839 /* Failed allocation, critical failure */
581d708e 1840 if (!rxdr->desc) {
1da177e4 1841 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1842 DPRINTK(PROBE, ERR,
1843 "Unable to allocate memory "
1844 "for the receive descriptor ring\n");
1da177e4
LT		 1845 goto setup_rx_desc_die;
1846 }
1847
1848 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1849 /* give up */
2648345f
MC		 1850 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1851 rxdr->dma);
1da177e4 1852 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1853 DPRINTK(PROBE, ERR,
1854 "Unable to allocate aligned memory "
1855 "for the receive descriptor ring\n");
581d708e 1856 goto setup_rx_desc_die;
1da177e4 1857 } else {
2648345f 1858 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1859 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1860 }
1861 }
1862 memset(rxdr->desc, 0, rxdr->size);
1863
1864 rxdr->next_to_clean = 0;
1865 rxdr->next_to_use = 0;
1866
1867 return 0;
1868}
1869
581d708e
MC		 1870/**
1871 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1872 * (Descriptors) for all queues
1873 * @adapter: board private structure
1874 *
581d708e
MC		 1875 * Return 0 on success, negative on failure
1876 **/
1877
64798845 1878int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1879{
1880 int i, err = 0;
1881
f56799ea 1882 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1883 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1884 if (err) {
1885 DPRINTK(PROBE, ERR,
1886 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1887 for (i-- ; i >= 0; i--)
1888 e1000_free_rx_resources(adapter,
1889 &adapter->rx_ring[i]);
581d708e
MC		 1890 break;
1891 }
1892 }
1893
1894 return err;
1895}
1896
1da177e4 1897/**
2648345f 1898 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1899 * @adapter: Board private structure
1900 **/
e4c811c9
MC		 1901#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1902 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
64798845 1903static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1904{
1dc32918 1905 struct e1000_hw *hw = &adapter->hw;
630b25cd 1906 u32 rctl;
1da177e4 1907
1dc32918 1908 rctl = er32(RCTL);
1da177e4
LT		 1909
1910 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1911
1912 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1913 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1914 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1915
1dc32918 1916 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1917 rctl |= E1000_RCTL_SBP;
1918 else
1919 rctl &= ~E1000_RCTL_SBP;
1920
2d7edb92
MC		 1921 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1922 rctl &= ~E1000_RCTL_LPE;
1923 else
1924 rctl |= E1000_RCTL_LPE;
1925
1da177e4 1926 /* Setup buffer sizes */
9e2feace
AK		 1927 rctl &= ~E1000_RCTL_SZ_4096;
1928 rctl |= E1000_RCTL_BSEX;
1929 switch (adapter->rx_buffer_len) {
1930 case E1000_RXBUFFER_256:
1931 rctl |= E1000_RCTL_SZ_256;
1932 rctl &= ~E1000_RCTL_BSEX;
1933 break;
1934 case E1000_RXBUFFER_512:
1935 rctl |= E1000_RCTL_SZ_512;
1936 rctl &= ~E1000_RCTL_BSEX;
1937 break;
1938 case E1000_RXBUFFER_1024:
1939 rctl |= E1000_RCTL_SZ_1024;
1940 rctl &= ~E1000_RCTL_BSEX;
1941 break;
a1415ee6
JK		 1942 case E1000_RXBUFFER_2048:
1943 default:
1944 rctl |= E1000_RCTL_SZ_2048;
1945 rctl &= ~E1000_RCTL_BSEX;
1946 break;
1947 case E1000_RXBUFFER_4096:
1948 rctl |= E1000_RCTL_SZ_4096;
1949 break;
1950 case E1000_RXBUFFER_8192:
1951 rctl |= E1000_RCTL_SZ_8192;
1952 break;
1953 case E1000_RXBUFFER_16384:
1954 rctl |= E1000_RCTL_SZ_16384;
1955 break;
2d7edb92
MC		 1956 }
1957
1dc32918 1958 ew32(RCTL, rctl);
1da177e4
LT		 1959}
1960
1961/**
1962 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1963 * @adapter: board private structure
1964 *
1965 * Configure the Rx unit of the MAC after a reset.
1966 **/
1967
64798845 1968static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1969{
406874a7 1970 u64 rdba;
581d708e 1971 struct e1000_hw *hw = &adapter->hw;
406874a7 1972 u32 rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1973
630b25cd
BJ		 1974 rdlen = adapter->rx_ring[0].count *
1975 sizeof(struct e1000_rx_desc);
1976 adapter->clean_rx = e1000_clean_rx_irq;
1977 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1da177e4
LT		 1978
1979 /* disable receives while setting up the descriptors */
1dc32918
JP		 1980 rctl = er32(RCTL);
1981 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1982
1983 /* set the Receive Delay Timer Register */
1dc32918 1984 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1985
581d708e 1986 if (hw->mac_type >= e1000_82540) {
1dc32918 1987 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1988 if (adapter->itr_setting != 0)
1dc32918 1989 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1990 }
1991
2ae76d98 1992 if (hw->mac_type >= e1000_82571) {
1dc32918 1993 ctrl_ext = er32(CTRL_EXT);
1e613fd9 1994 /* Reset delay timers after every interrupt */
6fc7a7ec 1995 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
835bb129 1996 /* Auto-Mask interrupts upon ICR access */
1e613fd9 1997 ctrl_ext |= E1000_CTRL_EXT_IAME;
1dc32918 1998 ew32(IAM, 0xffffffff);
1dc32918
JP		 1999 ew32(CTRL_EXT, ctrl_ext);
2000 E1000_WRITE_FLUSH();
2ae76d98
MC		 2001 }
2002
581d708e
MC		 2003 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2004 * the Base and Length of the Rx Descriptor Ring */
f56799ea 2005 switch (adapter->num_rx_queues) {
24025e4e
MC		 2006 case 1:
2007 default:
581d708e 2008 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 2009 ew32(RDLEN, rdlen);
2010 ew32(RDBAH, (rdba >> 32));
2011 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
2012 ew32(RDT, 0);
2013 ew32(RDH, 0);
6a951698
AK		 2014 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2015 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 2016 break;
24025e4e
MC		 2017 }
2018
1da177e4 2019 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 2020 if (hw->mac_type >= e1000_82543) {
1dc32918 2021 rxcsum = er32(RXCSUM);
630b25cd 2022 if (adapter->rx_csum)
2d7edb92 2023 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 2024 else
2d7edb92 2025 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 2026 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 2027 ew32(RXCSUM, rxcsum);
1da177e4
LT		 2028 }
2029
2030 /* Enable Receives */
1dc32918 2031 ew32(RCTL, rctl);
1da177e4
LT		 2032}
2033
2034/**
581d708e 2035 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 2036 * @adapter: board private structure
581d708e 2037 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 2038 *
2039 * Free all transmit software resources
2040 **/
2041
64798845
JP		 2042static void e1000_free_tx_resources(struct e1000_adapter *adapter,
2043 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 2044{
2045 struct pci_dev *pdev = adapter->pdev;
2046
581d708e 2047 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 2048
581d708e
MC		 2049 vfree(tx_ring->buffer_info);
2050 tx_ring->buffer_info = NULL;
1da177e4 2051
581d708e 2052 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 2053
581d708e
MC		 2054 tx_ring->desc = NULL;
2055}
2056
2057/**
2058 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2059 * @adapter: board private structure
2060 *
2061 * Free all transmit software resources
2062 **/
2063
64798845 2064void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2065{
2066 int i;
2067
f56799ea 2068 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2069 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2070}
2071
64798845
JP		 2072static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2073 struct e1000_buffer *buffer_info)
1da177e4 2074{
96838a40 2075 if (buffer_info->dma) {
2648345f
MC		 2076 pci_unmap_page(adapter->pdev,
2077 buffer_info->dma,
2078 buffer_info->length,
2079 PCI_DMA_TODEVICE);
a9ebadd6 2080 buffer_info->dma = 0;
1da177e4 2081 }
a9ebadd6 2082 if (buffer_info->skb) {
1da177e4 2083 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 2084 buffer_info->skb = NULL;
2085 }
2086 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 2087}
2088
2089/**
2090 * e1000_clean_tx_ring - Free Tx Buffers
2091 * @adapter: board private structure
581d708e 2092 * @tx_ring: ring to be cleaned
1da177e4
LT		 2093 **/
2094
64798845
JP		 2095static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
2096 struct e1000_tx_ring *tx_ring)
1da177e4 2097{
1dc32918 2098 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2099 struct e1000_buffer *buffer_info;
2100 unsigned long size;
2101 unsigned int i;
2102
2103 /* Free all the Tx ring sk_buffs */
2104
96838a40 2105 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2106 buffer_info = &tx_ring->buffer_info[i];
2107 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2108 }
2109
2110 size = sizeof(struct e1000_buffer) * tx_ring->count;
2111 memset(tx_ring->buffer_info, 0, size);
2112
2113 /* Zero out the descriptor ring */
2114
2115 memset(tx_ring->desc, 0, tx_ring->size);
2116
2117 tx_ring->next_to_use = 0;
2118 tx_ring->next_to_clean = 0;
fd803241 2119 tx_ring->last_tx_tso = 0;
1da177e4 2120
1dc32918
JP		 2121 writel(0, hw->hw_addr + tx_ring->tdh);
2122 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2123}
2124
2125/**
2126 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2127 * @adapter: board private structure
2128 **/
2129
64798845 2130static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2131{
2132 int i;
2133
f56799ea 2134 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2135 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2136}
2137
2138/**
2139 * e1000_free_rx_resources - Free Rx Resources
2140 * @adapter: board private structure
581d708e 2141 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2142 *
2143 * Free all receive software resources
2144 **/
2145
64798845
JP		 2146static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2147 struct e1000_rx_ring *rx_ring)
1da177e4 2148{
1da177e4
LT		 2149 struct pci_dev *pdev = adapter->pdev;
2150
581d708e 2151 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2152
2153 vfree(rx_ring->buffer_info);
2154 rx_ring->buffer_info = NULL;
2155
2156 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2157
2158 rx_ring->desc = NULL;
2159}
2160
2161/**
581d708e 2162 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2163 * @adapter: board private structure
581d708e
MC		 2164 *
2165 * Free all receive software resources
2166 **/
2167
64798845 2168void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2169{
2170 int i;
2171
f56799ea 2172 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2173 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2174}
2175
2176/**
2177 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2178 * @adapter: board private structure
2179 * @rx_ring: ring to free buffers from
1da177e4
LT		 2180 **/
2181
64798845
JP		 2182static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2183 struct e1000_rx_ring *rx_ring)
1da177e4 2184{
1dc32918 2185 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2186 struct e1000_buffer *buffer_info;
2187 struct pci_dev *pdev = adapter->pdev;
2188 unsigned long size;
630b25cd 2189 unsigned int i;
1da177e4
LT		 2190
2191 /* Free all the Rx ring sk_buffs */
96838a40 2192 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2193 buffer_info = &rx_ring->buffer_info[i];
96838a40 2194 if (buffer_info->skb) {
1da177e4
LT		 2195 pci_unmap_single(pdev,
2196 buffer_info->dma,
2197 buffer_info->length,
2198 PCI_DMA_FROMDEVICE);
2199
2200 dev_kfree_skb(buffer_info->skb);
2201 buffer_info->skb = NULL;
997f5cbd 2202 }
1da177e4
LT		 2203 }
2204
2205 size = sizeof(struct e1000_buffer) * rx_ring->count;
2206 memset(rx_ring->buffer_info, 0, size);
2207
2208 /* Zero out the descriptor ring */
2209
2210 memset(rx_ring->desc, 0, rx_ring->size);
2211
2212 rx_ring->next_to_clean = 0;
2213 rx_ring->next_to_use = 0;
2214
1dc32918
JP		 2215 writel(0, hw->hw_addr + rx_ring->rdh);
2216 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2217}
2218
2219/**
2220 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2221 * @adapter: board private structure
2222 **/
2223
64798845 2224static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2225{
2226 int i;
2227
f56799ea 2228 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2229 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2230}
2231
2232/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2233 * and memory write and invalidate disabled for certain operations
2234 */
64798845 2235static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2236{
1dc32918 2237 struct e1000_hw *hw = &adapter->hw;
1da177e4 2238 struct net_device *netdev = adapter->netdev;
406874a7 2239 u32 rctl;
1da177e4 2240
1dc32918 2241 e1000_pci_clear_mwi(hw);
1da177e4 2242
1dc32918 2243 rctl = er32(RCTL);
1da177e4 2244 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2245 ew32(RCTL, rctl);
2246 E1000_WRITE_FLUSH();
1da177e4
LT		 2247 mdelay(5);
2248
96838a40 2249 if (netif_running(netdev))
581d708e 2250 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2251}
2252
64798845 2253static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2254{
1dc32918 2255 struct e1000_hw *hw = &adapter->hw;
1da177e4 2256 struct net_device *netdev = adapter->netdev;
406874a7 2257 u32 rctl;
1da177e4 2258
1dc32918 2259 rctl = er32(RCTL);
1da177e4 2260 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2261 ew32(RCTL, rctl);
2262 E1000_WRITE_FLUSH();
1da177e4
LT		 2263 mdelay(5);
2264
1dc32918
JP		 2265 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2266 e1000_pci_set_mwi(hw);
1da177e4 2267
96838a40 2268 if (netif_running(netdev)) {
72d64a43
JK		 2269 /* No need to loop, because 82542 supports only 1 queue */
2270 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2271 e1000_configure_rx(adapter);
72d64a43 2272 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2273 }
2274}
2275
2276/**
2277 * e1000_set_mac - Change the Ethernet Address of the NIC
2278 * @netdev: network interface device structure
2279 * @p: pointer to an address structure
2280 *
2281 * Returns 0 on success, negative on failure
2282 **/
2283
64798845 2284static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2285{
60490fe0 2286 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2287 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2288 struct sockaddr *addr = p;
2289
96838a40 2290 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2291 return -EADDRNOTAVAIL;
2292
2293 /* 82542 2.0 needs to be in reset to write receive address registers */
2294
1dc32918 2295 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2296 e1000_enter_82542_rst(adapter);
2297
2298 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2299 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2300
1dc32918 2301 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2302
868d5309
MC		 2303 /* With 82571 controllers, LAA may be overwritten (with the default)
2304 * due to controller reset from the other port. */
1dc32918 2305 if (hw->mac_type == e1000_82571) {
868d5309 2306 /* activate the work around */
1dc32918 2307 hw->laa_is_present = 1;
868d5309 2308
96838a40
JB		 2309 /* Hold a copy of the LAA in RAR[14] This is done so that
2310 * between the time RAR[0] gets clobbered and the time it
2311 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2312 * of the RARs and no incoming packets directed to this port
96838a40 2313 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2314 * RAR[14] */
1dc32918 2315 e1000_rar_set(hw, hw->mac_addr,
868d5309
MC		 2316 E1000_RAR_ENTRIES - 1);
2317 }
2318
1dc32918 2319 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2320 e1000_leave_82542_rst(adapter);
2321
2322 return 0;
2323}
2324
2325/**
db0ce50d 2326 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2327 * @netdev: network interface device structure
2328 *
db0ce50d
PM		 2329 * The set_rx_mode entry point is called whenever the unicast or multicast
2330 * address lists or the network interface flags are updated. This routine is
2331 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2332 * promiscuous mode, and all-multi behavior.
2333 **/
2334
64798845 2335static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2336{
60490fe0 2337 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2338 struct e1000_hw *hw = &adapter->hw;
db0ce50d
PM		 2339 struct dev_addr_list *uc_ptr;
2340 struct dev_addr_list *mc_ptr;
406874a7
JP		 2341 u32 rctl;
2342 u32 hash_value;
868d5309 2343 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2344 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2345 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2346 E1000_NUM_MTA_REGISTERS;
2347
1dc32918 2348 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 2349 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2350
868d5309 2351 /* reserve RAR[14] for LAA over-write work-around */
1dc32918 2352 if (hw->mac_type == e1000_82571)
868d5309 2353 rar_entries--;
1da177e4 2354
2648345f
MC		 2355 /* Check for Promiscuous and All Multicast modes */
2356
1dc32918 2357 rctl = er32(RCTL);
1da177e4 2358
96838a40 2359 if (netdev->flags & IFF_PROMISC) {
1da177e4 2360 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2361 rctl &= ~E1000_RCTL_VFE;
1da177e4 2362 } else {
746b9f02
PM		 2363 if (netdev->flags & IFF_ALLMULTI) {
2364 rctl |= E1000_RCTL_MPE;
2365 } else {
2366 rctl &= ~E1000_RCTL_MPE;
2367 }
78ed11a5 2368 if (adapter->hw.mac_type != e1000_ich8lan)
746b9f02 2369 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2370 }
2371
2372 uc_ptr = NULL;
2373 if (netdev->uc_count > rar_entries - 1) {
2374 rctl |= E1000_RCTL_UPE;
2375 } else if (!(netdev->flags & IFF_PROMISC)) {
2376 rctl &= ~E1000_RCTL_UPE;
2377 uc_ptr = netdev->uc_list;
1da177e4
LT		 2378 }
2379
1dc32918 2380 ew32(RCTL, rctl);
1da177e4
LT		 2381
2382 /* 82542 2.0 needs to be in reset to write receive address registers */
2383
96838a40 2384 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2385 e1000_enter_82542_rst(adapter);
2386
db0ce50d
PM		 2387 /* load the first 14 addresses into the exact filters 1-14. Unicast
2388 * addresses take precedence to avoid disabling unicast filtering
2389 * when possible.
2390 *
1da177e4
LT		 2391 * RAR 0 is used for the station MAC adddress
2392 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2393 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2394 */
2395 mc_ptr = netdev->mc_list;
2396
96838a40 2397 for (i = 1; i < rar_entries; i++) {
db0ce50d
PM		 2398 if (uc_ptr) {
2399 e1000_rar_set(hw, uc_ptr->da_addr, i);
2400 uc_ptr = uc_ptr->next;
2401 } else if (mc_ptr) {
2402 e1000_rar_set(hw, mc_ptr->da_addr, i);
1da177e4
LT		 2403 mc_ptr = mc_ptr->next;
2404 } else {
2405 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
1dc32918 2406 E1000_WRITE_FLUSH();
1da177e4 2407 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
1dc32918 2408 E1000_WRITE_FLUSH();
1da177e4
LT		 2409 }
2410 }
db0ce50d 2411 WARN_ON(uc_ptr != NULL);
1da177e4
LT		 2412
2413 /* clear the old settings from the multicast hash table */
2414
cd94dd0b 2415 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2416 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
1dc32918 2417 E1000_WRITE_FLUSH();
4ca213a6 2418 }
1da177e4
LT		 2419
2420 /* load any remaining addresses into the hash table */
2421
96838a40 2422 for (; mc_ptr; mc_ptr = mc_ptr->next) {
db0ce50d 2423 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
1da177e4
LT		 2424 e1000_mta_set(hw, hash_value);
2425 }
2426
96838a40 2427 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2428 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2429}
2430
2431/* Need to wait a few seconds after link up to get diagnostic information from
2432 * the phy */
2433
64798845 2434static void e1000_update_phy_info(unsigned long data)
1da177e4 2435{
e982f17c 2436 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP		 2437 struct e1000_hw *hw = &adapter->hw;
2438 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT		 2439}
2440
2441/**
2442 * e1000_82547_tx_fifo_stall - Timer Call-back
2443 * @data: pointer to adapter cast into an unsigned long
2444 **/
2445
64798845 2446static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2447{
e982f17c 2448 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2449 struct e1000_hw *hw = &adapter->hw;
1da177e4 2450 struct net_device *netdev = adapter->netdev;
406874a7 2451 u32 tctl;
1da177e4 2452
96838a40 2453 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2454 if ((er32(TDT) == er32(TDH)) &&
2455 (er32(TDFT) == er32(TDFH)) &&
2456 (er32(TDFTS) == er32(TDFHS))) {
2457 tctl = er32(TCTL);
2458 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2459 ew32(TDFT, adapter->tx_head_addr);
2460 ew32(TDFH, adapter->tx_head_addr);
2461 ew32(TDFTS, adapter->tx_head_addr);
2462 ew32(TDFHS, adapter->tx_head_addr);
2463 ew32(TCTL, tctl);
2464 E1000_WRITE_FLUSH();
1da177e4
LT		 2465
2466 adapter->tx_fifo_head = 0;
2467 atomic_set(&adapter->tx_fifo_stall, 0);
2468 netif_wake_queue(netdev);
2469 } else {
2470 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2471 }
2472 }
2473}
2474
2475/**
2476 * e1000_watchdog - Timer Call-back
2477 * @data: pointer to adapter cast into an unsigned long
2478 **/
64798845 2479static void e1000_watchdog(unsigned long data)
1da177e4 2480{
e982f17c 2481 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2482 struct e1000_hw *hw = &adapter->hw;
1da177e4 2483 struct net_device *netdev = adapter->netdev;
545c67c0 2484 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7
JP		 2485 u32 link, tctl;
2486 s32 ret_val;
cd94dd0b 2487
1dc32918 2488 ret_val = e1000_check_for_link(hw);
cd94dd0b 2489 if ((ret_val == E1000_ERR_PHY) &&
1dc32918
JP		 2490 (hw->phy_type == e1000_phy_igp_3) &&
2491 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
cd94dd0b
AK		 2492 /* See e1000_kumeran_lock_loss_workaround() */
2493 DPRINTK(LINK, INFO,
2494 "Gigabit has been disabled, downgrading speed\n");
2495 }
90fb5135 2496
1dc32918
JP		 2497 if (hw->mac_type == e1000_82573) {
2498 e1000_enable_tx_pkt_filtering(hw);
2499 if (adapter->mng_vlan_id != hw->mng_cookie.vlan_id)
2d7edb92 2500 e1000_update_mng_vlan(adapter);
96838a40 2501 }
1da177e4 2502
1dc32918
JP		 2503 if ((hw->media_type == e1000_media_type_internal_serdes) &&
2504 !(er32(TXCW) & E1000_TXCW_ANE))
2505 link = !hw->serdes_link_down;
1da177e4 2506 else
1dc32918 2507 link = er32(STATUS) & E1000_STATUS_LU;
1da177e4 2508
96838a40
JB		 2509 if (link) {
2510 if (!netif_carrier_ok(netdev)) {
406874a7 2511 u32 ctrl;
c3033b01 2512 bool txb2b = true;
1dc32918 2513 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2514 &adapter->link_speed,
2515 &adapter->link_duplex);
2516
1dc32918 2517 ctrl = er32(CTRL);
9669f53b
AK		 2518 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2519 "Flow Control: %s\n",
2520 adapter->link_speed,
2521 adapter->link_duplex == FULL_DUPLEX ?
2522 "Full Duplex" : "Half Duplex",
2523 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2524 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2525 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2526 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2527
7e6c9861
JK		 2528 /* tweak tx_queue_len according to speed/duplex
2529 * and adjust the timeout factor */
66a2b0a3
JK		 2530 netdev->tx_queue_len = adapter->tx_queue_len;
2531 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2532 switch (adapter->link_speed) {
2533 case SPEED_10:
c3033b01 2534 txb2b = false;
7e6c9861
JK		 2535 netdev->tx_queue_len = 10;
2536 adapter->tx_timeout_factor = 8;
2537 break;
2538 case SPEED_100:
c3033b01 2539 txb2b = false;
7e6c9861
JK		 2540 netdev->tx_queue_len = 100;
2541 /* maybe add some timeout factor ? */
2542 break;
2543 }
2544
1dc32918
JP		 2545 if ((hw->mac_type == e1000_82571 ||
2546 hw->mac_type == e1000_82572) &&
c3033b01 2547 !txb2b) {
406874a7 2548 u32 tarc0;
1dc32918 2549 tarc0 = er32(TARC0);
90fb5135 2550 tarc0 &= ~(1 << 21);
1dc32918 2551 ew32(TARC0, tarc0);
7e6c9861 2552 }
90fb5135 2553
7e6c9861
JK		 2554 /* disable TSO for pcie and 10/100 speeds, to avoid
2555 * some hardware issues */
2556 if (!adapter->tso_force &&
1dc32918 2557 hw->bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2558 switch (adapter->link_speed) {
2559 case SPEED_10:
66a2b0a3 2560 case SPEED_100:
7e6c9861
JK		 2561 DPRINTK(PROBE,INFO,
2562 "10/100 speed: disabling TSO\n");
2563 netdev->features &= ~NETIF_F_TSO;
87ca4e5b 2564 netdev->features &= ~NETIF_F_TSO6;
7e6c9861
JK		 2565 break;
2566 case SPEED_1000:
2567 netdev->features |= NETIF_F_TSO;
87ca4e5b 2568 netdev->features |= NETIF_F_TSO6;
7e6c9861
JK		 2569 break;
2570 default:
2571 /* oops */
66a2b0a3
JK		 2572 break;
2573 }
2574 }
7e6c9861
JK		 2575
2576 /* enable transmits in the hardware, need to do this
2577 * after setting TARC0 */
1dc32918 2578 tctl = er32(TCTL);
7e6c9861 2579 tctl |= E1000_TCTL_EN;
1dc32918 2580 ew32(TCTL, tctl);
66a2b0a3 2581
1da177e4
LT		 2582 netif_carrier_on(netdev);
2583 netif_wake_queue(netdev);
56e1393f 2584 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4 2585 adapter->smartspeed = 0;
bb8e3311
JG		 2586 } else {
2587 /* make sure the receive unit is started */
1dc32918
JP		 2588 if (hw->rx_needs_kicking) {
2589 u32 rctl = er32(RCTL);
2590 ew32(RCTL, rctl | E1000_RCTL_EN);
bb8e3311 2591 }
1da177e4
LT		 2592 }
2593 } else {
96838a40 2594 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2595 adapter->link_speed = 0;
2596 adapter->link_duplex = 0;
2597 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2598 netif_carrier_off(netdev);
2599 netif_stop_queue(netdev);
56e1393f 2600 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
87041639
JK		 2601
2602 /* 80003ES2LAN workaround--
2603 * For packet buffer work-around on link down event;
2604 * disable receives in the ISR and
2605 * reset device here in the watchdog
2606 */
1dc32918 2607 if (hw->mac_type == e1000_80003es2lan)
87041639
JK		 2608 /* reset device */
2609 schedule_work(&adapter->reset_task);
1da177e4
LT		 2610 }
2611
2612 e1000_smartspeed(adapter);
2613 }
2614
2615 e1000_update_stats(adapter);
2616
1dc32918 2617 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2618 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2619 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2620 adapter->colc_old = adapter->stats.colc;
2621
2622 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2623 adapter->gorcl_old = adapter->stats.gorcl;
2624 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2625 adapter->gotcl_old = adapter->stats.gotcl;
2626
1dc32918 2627 e1000_update_adaptive(hw);
1da177e4 2628
f56799ea 2629 if (!netif_carrier_ok(netdev)) {
581d708e 2630 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2631 /* We've lost link, so the controller stops DMA,
2632 * but we've got queued Tx work that's never going
2633 * to get done, so reset controller to flush Tx.
2634 * (Do the reset outside of interrupt context). */
87041639
JK		 2635 adapter->tx_timeout_count++;
2636 schedule_work(&adapter->reset_task);
1da177e4
LT		 2637 }
2638 }
2639
1da177e4 2640 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2641 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2642
2648345f 2643 /* Force detection of hung controller every watchdog period */
c3033b01 2644 adapter->detect_tx_hung = true;
1da177e4 2645
96838a40 2646 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309 2647 * reset from the other port. Set the appropriate LAA in RAR[0] */
1dc32918
JP		 2648 if (hw->mac_type == e1000_82571 && hw->laa_is_present)
2649 e1000_rar_set(hw, hw->mac_addr, 0);
868d5309 2650
1da177e4 2651 /* Reset the timer */
56e1393f 2652 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2653}
2654
835bb129
JB		 2655enum latency_range {
2656 lowest_latency = 0,
2657 low_latency = 1,
2658 bulk_latency = 2,
2659 latency_invalid = 255
2660};
2661
2662/**
2663 * e1000_update_itr - update the dynamic ITR value based on statistics
2664 * Stores a new ITR value based on packets and byte
2665 * counts during the last interrupt. The advantage of per interrupt
2666 * computation is faster updates and more accurate ITR for the current
2667 * traffic pattern. Constants in this function were computed
2668 * based on theoretical maximum wire speed and thresholds were set based
2669 * on testing data as well as attempting to minimize response time
2670 * while increasing bulk throughput.
2671 * this functionality is controlled by the InterruptThrottleRate module
2672 * parameter (see e1000_param.c)
2673 * @adapter: pointer to adapter
2674 * @itr_setting: current adapter->itr
2675 * @packets: the number of packets during this measurement interval
2676 * @bytes: the number of bytes during this measurement interval
2677 **/
2678static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2679 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2680{
2681 unsigned int retval = itr_setting;
2682 struct e1000_hw *hw = &adapter->hw;
2683
2684 if (unlikely(hw->mac_type < e1000_82540))
2685 goto update_itr_done;
2686
2687 if (packets == 0)
2688 goto update_itr_done;
2689
835bb129
JB		 2690 switch (itr_setting) {
2691 case lowest_latency:
2b65326e
JB		 2692 /* jumbo frames get bulk treatment*/
2693 if (bytes/packets > 8000)
2694 retval = bulk_latency;
2695 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2696 retval = low_latency;
2697 break;
2698 case low_latency: /* 50 usec aka 20000 ints/s */
2699 if (bytes > 10000) {
2b65326e
JB		 2700 /* jumbo frames need bulk latency setting */
2701 if (bytes/packets > 8000)
2702 retval = bulk_latency;
2703 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2704 retval = bulk_latency;
2705 else if ((packets > 35))
2706 retval = lowest_latency;
2b65326e
JB		 2707 } else if (bytes/packets > 2000)
2708 retval = bulk_latency;
2709 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2710 retval = lowest_latency;
2711 break;
2712 case bulk_latency: /* 250 usec aka 4000 ints/s */
2713 if (bytes > 25000) {
2714 if (packets > 35)
2715 retval = low_latency;
2b65326e
JB		 2716 } else if (bytes < 6000) {
2717 retval = low_latency;
835bb129
JB		 2718 }
2719 break;
2720 }
2721
2722update_itr_done:
2723 return retval;
2724}
2725
2726static void e1000_set_itr(struct e1000_adapter *adapter)
2727{
2728 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2729 u16 current_itr;
2730 u32 new_itr = adapter->itr;
835bb129
JB		 2731
2732 if (unlikely(hw->mac_type < e1000_82540))
2733 return;
2734
2735 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2736 if (unlikely(adapter->link_speed != SPEED_1000)) {
2737 current_itr = 0;
2738 new_itr = 4000;
2739 goto set_itr_now;
2740 }
2741
2742 adapter->tx_itr = e1000_update_itr(adapter,
2743 adapter->tx_itr,
2744 adapter->total_tx_packets,
2745 adapter->total_tx_bytes);
2b65326e
JB		 2746 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2747 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2748 adapter->tx_itr = low_latency;
2749
835bb129
JB		 2750 adapter->rx_itr = e1000_update_itr(adapter,
2751 adapter->rx_itr,
2752 adapter->total_rx_packets,
2753 adapter->total_rx_bytes);
2b65326e
JB		 2754 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2755 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2756 adapter->rx_itr = low_latency;
835bb129
JB		 2757
2758 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2759
835bb129
JB		 2760 switch (current_itr) {
2761 /* counts and packets in update_itr are dependent on these numbers */
2762 case lowest_latency:
2763 new_itr = 70000;
2764 break;
2765 case low_latency:
2766 new_itr = 20000; /* aka hwitr = ~200 */
2767 break;
2768 case bulk_latency:
2769 new_itr = 4000;
2770 break;
2771 default:
2772 break;
2773 }
2774
2775set_itr_now:
2776 if (new_itr != adapter->itr) {
2777 /* this attempts to bias the interrupt rate towards Bulk
2778 * by adding intermediate steps when interrupt rate is
2779 * increasing */
2780 new_itr = new_itr > adapter->itr ?
2781 min(adapter->itr + (new_itr >> 2), new_itr) :
2782 new_itr;
2783 adapter->itr = new_itr;
1dc32918 2784 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129
JB		 2785 }
2786
2787 return;
2788}
2789
1da177e4
LT		 2790#define E1000_TX_FLAGS_CSUM 0x00000001
2791#define E1000_TX_FLAGS_VLAN 0x00000002
2792#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2793#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2794#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2795#define E1000_TX_FLAGS_VLAN_SHIFT 16
2796
64798845
JP		 2797static int e1000_tso(struct e1000_adapter *adapter,
2798 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2799{
1da177e4 2800 struct e1000_context_desc *context_desc;
545c67c0 2801 struct e1000_buffer *buffer_info;
1da177e4 2802 unsigned int i;
406874a7
JP		 2803 u32 cmd_length = 0;
2804 u16 ipcse = 0, tucse, mss;
2805 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2806 int err;
2807
89114afd 2808 if (skb_is_gso(skb)) {
1da177e4
LT		 2809 if (skb_header_cloned(skb)) {
2810 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2811 if (err)
2812 return err;
2813 }
2814
ab6a5bb6 2815 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2816 mss = skb_shinfo(skb)->gso_size;
60828236 2817 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2818 struct iphdr *iph = ip_hdr(skb);
2819 iph->tot_len = 0;
2820 iph->check = 0;
aa8223c7
ACM		 2821 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2822 iph->daddr, 0,
2823 IPPROTO_TCP,
2824 0);
2d7edb92 2825 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2826 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2827 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2828 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2829 tcp_hdr(skb)->check =
0660e03f
ACM		 2830 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2831 &ipv6_hdr(skb)->daddr,
2832 0, IPPROTO_TCP, 0);
2d7edb92 2833 ipcse = 0;
2d7edb92 2834 }
bbe735e4 2835 ipcss = skb_network_offset(skb);
eddc9ec5 2836 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2837 tucss = skb_transport_offset(skb);
aa8223c7 2838 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2839 tucse = 0;
2840
2841 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2842 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2843
581d708e
MC		 2844 i = tx_ring->next_to_use;
2845 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2846 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2847
2848 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2849 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2850 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2851 context_desc->upper_setup.tcp_fields.tucss = tucss;
2852 context_desc->upper_setup.tcp_fields.tucso = tucso;
2853 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2854 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2855 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2856 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2857
545c67c0 2858 buffer_info->time_stamp = jiffies;
a9ebadd6 2859 buffer_info->next_to_watch = i;
545c67c0 2860
581d708e
MC		 2861 if (++i == tx_ring->count) i = 0;
2862 tx_ring->next_to_use = i;
1da177e4 2863
c3033b01 2864 return true;
1da177e4 2865 }
c3033b01 2866 return false;
1da177e4
LT		 2867}
2868
64798845
JP		 2869static bool e1000_tx_csum(struct e1000_adapter *adapter,
2870 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2871{
2872 struct e1000_context_desc *context_desc;
545c67c0 2873 struct e1000_buffer *buffer_info;
1da177e4 2874 unsigned int i;
406874a7 2875 u8 css;
1da177e4 2876
84fa7933 2877 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
ea2ae17d 2878 css = skb_transport_offset(skb);
1da177e4 2879
581d708e 2880 i = tx_ring->next_to_use;
545c67c0 2881 buffer_info = &tx_ring->buffer_info[i];
581d708e 2882 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4 2883
f6c57baf 2884 context_desc->lower_setup.ip_config = 0;
1da177e4 2885 context_desc->upper_setup.tcp_fields.tucss = css;
628592cc
HX		 2886 context_desc->upper_setup.tcp_fields.tucso =
2887 css + skb->csum_offset;
1da177e4
LT		 2888 context_desc->upper_setup.tcp_fields.tucse = 0;
2889 context_desc->tcp_seg_setup.data = 0;
2890 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2891
545c67c0 2892 buffer_info->time_stamp = jiffies;
a9ebadd6 2893 buffer_info->next_to_watch = i;
545c67c0 2894
581d708e
MC		 2895 if (unlikely(++i == tx_ring->count)) i = 0;
2896 tx_ring->next_to_use = i;
1da177e4 2897
c3033b01 2898 return true;
1da177e4
LT		 2899 }
2900
c3033b01 2901 return false;
1da177e4
LT		 2902}
2903
2904#define E1000_MAX_TXD_PWR 12
2905#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2906
64798845
JP		 2907static int e1000_tx_map(struct e1000_adapter *adapter,
2908 struct e1000_tx_ring *tx_ring,
2909 struct sk_buff *skb, unsigned int first,
2910 unsigned int max_per_txd, unsigned int nr_frags,
2911 unsigned int mss)
1da177e4 2912{
1dc32918 2913 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2914 struct e1000_buffer *buffer_info;
2915 unsigned int len = skb->len;
2916 unsigned int offset = 0, size, count = 0, i;
2917 unsigned int f;
2918 len -= skb->data_len;
2919
2920 i = tx_ring->next_to_use;
2921
96838a40 2922 while (len) {
1da177e4
LT		 2923 buffer_info = &tx_ring->buffer_info[i];
2924 size = min(len, max_per_txd);
fd803241
JK		 2925 /* Workaround for Controller erratum --
2926 * descriptor for non-tso packet in a linear SKB that follows a
2927 * tso gets written back prematurely before the data is fully
0f15a8fa 2928 * DMA'd to the controller */
fd803241 2929 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2930 !skb_is_gso(skb)) {
fd803241
JK		 2931 tx_ring->last_tx_tso = 0;
2932 size -= 4;
2933 }
2934
1da177e4
LT		 2935 /* Workaround for premature desc write-backs
2936 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2937 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2938 size -= 4;
97338bde
MC		 2939 /* work-around for errata 10 and it applies
2940 * to all controllers in PCI-X mode
2941 * The fix is to make sure that the first descriptor of a
2942 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2943 */
1dc32918 2944 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2945 (size > 2015) && count == 0))
2946 size = 2015;
96838a40 2947
1da177e4
LT		 2948 /* Workaround for potential 82544 hang in PCI-X. Avoid
2949 * terminating buffers within evenly-aligned dwords. */
96838a40 2950 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2951 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2952 size > 4))
2953 size -= 4;
2954
2955 buffer_info->length = size;
2956 buffer_info->dma =
2957 pci_map_single(adapter->pdev,
2958 skb->data + offset,
2959 size,
2960 PCI_DMA_TODEVICE);
2961 buffer_info->time_stamp = jiffies;
a9ebadd6 2962 buffer_info->next_to_watch = i;
1da177e4
LT		 2963
2964 len -= size;
2965 offset += size;
2966 count++;
96838a40 2967 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2968 }
2969
96838a40 2970 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2971 struct skb_frag_struct *frag;
2972
2973 frag = &skb_shinfo(skb)->frags[f];
2974 len = frag->size;
2975 offset = frag->page_offset;
2976
96838a40 2977 while (len) {
1da177e4
LT		 2978 buffer_info = &tx_ring->buffer_info[i];
2979 size = min(len, max_per_txd);
1da177e4
LT		 2980 /* Workaround for premature desc write-backs
2981 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2982 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 2983 size -= 4;
1da177e4
LT		 2984 /* Workaround for potential 82544 hang in PCI-X.
2985 * Avoid terminating buffers within evenly-aligned
2986 * dwords. */
96838a40 2987 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2988 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2989 size > 4))
2990 size -= 4;
2991
2992 buffer_info->length = size;
2993 buffer_info->dma =
2994 pci_map_page(adapter->pdev,
2995 frag->page,
2996 offset,
2997 size,
2998 PCI_DMA_TODEVICE);
2999 buffer_info->time_stamp = jiffies;
a9ebadd6 3000 buffer_info->next_to_watch = i;
1da177e4
LT		 3001
3002 len -= size;
3003 offset += size;
3004 count++;
96838a40 3005 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3006 }
3007 }
3008
3009 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3010 tx_ring->buffer_info[i].skb = skb;
3011 tx_ring->buffer_info[first].next_to_watch = i;
3012
3013 return count;
3014}
3015
64798845
JP		 3016static void e1000_tx_queue(struct e1000_adapter *adapter,
3017 struct e1000_tx_ring *tx_ring, int tx_flags,
3018 int count)
1da177e4 3019{
1dc32918 3020 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3021 struct e1000_tx_desc *tx_desc = NULL;
3022 struct e1000_buffer *buffer_info;
406874a7 3023 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 3024 unsigned int i;
3025
96838a40 3026 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 3027 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3028 E1000_TXD_CMD_TSE;
2d7edb92
MC		 3029 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3030
96838a40 3031 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 3032 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 3033 }
3034
96838a40 3035 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 3036 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3037 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3038 }
3039
96838a40 3040 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3041 txd_lower |= E1000_TXD_CMD_VLE;
3042 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3043 }
3044
3045 i = tx_ring->next_to_use;
3046
96838a40 3047 while (count--) {
1da177e4
LT		 3048 buffer_info = &tx_ring->buffer_info[i];
3049 tx_desc = E1000_TX_DESC(*tx_ring, i);
3050 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3051 tx_desc->lower.data =
3052 cpu_to_le32(txd_lower | buffer_info->length);
3053 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3054 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3055 }
3056
3057 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3058
3059 /* Force memory writes to complete before letting h/w
3060 * know there are new descriptors to fetch. (Only
3061 * applicable for weak-ordered memory model archs,
3062 * such as IA-64). */
3063 wmb();
3064
3065 tx_ring->next_to_use = i;
1dc32918 3066 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 3067 /* we need this if more than one processor can write to our tail
3068 * at a time, it syncronizes IO on IA64/Altix systems */
3069 mmiowb();
1da177e4
LT		 3070}
3071
3072/**
3073 * 82547 workaround to avoid controller hang in half-duplex environment.
3074 * The workaround is to avoid queuing a large packet that would span
3075 * the internal Tx FIFO ring boundary by notifying the stack to resend
3076 * the packet at a later time. This gives the Tx FIFO an opportunity to
3077 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3078 * to the beginning of the Tx FIFO.
3079 **/
3080
3081#define E1000_FIFO_HDR 0x10
3082#define E1000_82547_PAD_LEN 0x3E0
3083
64798845
JP		 3084static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3085 struct sk_buff *skb)
1da177e4 3086{
406874a7
JP		 3087 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3088 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3089
9099cfb9 3090 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3091
96838a40 3092 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3093 goto no_fifo_stall_required;
3094
96838a40 3095 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3096 return 1;
3097
96838a40 3098 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3099 atomic_set(&adapter->tx_fifo_stall, 1);
3100 return 1;
3101 }
3102
3103no_fifo_stall_required:
3104 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3105 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3106 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3107 return 0;
3108}
3109
2d7edb92 3110#define MINIMUM_DHCP_PACKET_SIZE 282
64798845
JP		 3111static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3112 struct sk_buff *skb)
2d7edb92
MC		 3113{
3114 struct e1000_hw *hw = &adapter->hw;
406874a7 3115 u16 length, offset;
96838a40 3116 if (vlan_tx_tag_present(skb)) {
1dc32918
JP		 3117 if (!((vlan_tx_tag_get(skb) == hw->mng_cookie.vlan_id) &&
3118 ( hw->mng_cookie.status &
2d7edb92
MC		 3119 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3120 return 0;
3121 }
20a44028 3122 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
e982f17c 3123 struct ethhdr *eth = (struct ethhdr *)skb->data;
96838a40
JB		 3124 if ((htons(ETH_P_IP) == eth->h_proto)) {
3125 const struct iphdr *ip =
406874a7 3126 (struct iphdr *)((u8 *)skb->data+14);
96838a40
JB		 3127 if (IPPROTO_UDP == ip->protocol) {
3128 struct udphdr *udp =
406874a7 3129 (struct udphdr *)((u8 *)ip +
2d7edb92 3130 (ip->ihl << 2));
96838a40 3131 if (ntohs(udp->dest) == 67) {
406874a7 3132 offset = (u8 *)udp + 8 - skb->data;
2d7edb92
MC		 3133 length = skb->len - offset;
3134
3135 return e1000_mng_write_dhcp_info(hw,
406874a7 3136 (u8 *)udp + 8,
2d7edb92
MC		 3137 length);
3138 }
3139 }
3140 }
3141 }
3142 return 0;
3143}
3144
65c7973f
JB		 3145static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3146{
3147 struct e1000_adapter *adapter = netdev_priv(netdev);
3148 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3149
3150 netif_stop_queue(netdev);
3151 /* Herbert's original patch had:
3152 * smp_mb__after_netif_stop_queue();
3153 * but since that doesn't exist yet, just open code it. */
3154 smp_mb();
3155
3156 /* We need to check again in a case another CPU has just
3157 * made room available. */
3158 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3159 return -EBUSY;
3160
3161 /* A reprieve! */
3162 netif_start_queue(netdev);
fcfb1224 3163 ++adapter->restart_queue;
65c7973f
JB		 3164 return 0;
3165}
3166
3167static int e1000_maybe_stop_tx(struct net_device *netdev,
3168 struct e1000_tx_ring *tx_ring, int size)
3169{
3170 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3171 return 0;
3172 return __e1000_maybe_stop_tx(netdev, size);
3173}
3174
1da177e4 3175#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
64798845 3176static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1da177e4 3177{
60490fe0 3178 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3179 struct e1000_hw *hw = &adapter->hw;
581d708e 3180 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3181 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3182 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3183 unsigned int tx_flags = 0;
6d1e3aa7 3184 unsigned int len = skb->len - skb->data_len;
1da177e4 3185 unsigned long flags;
6d1e3aa7
KK		 3186 unsigned int nr_frags;
3187 unsigned int mss;
1da177e4 3188 int count = 0;
76c224bc 3189 int tso;
1da177e4 3190 unsigned int f;
1da177e4 3191
65c7973f
JB		 3192 /* This goes back to the question of how to logically map a tx queue
3193 * to a flow. Right now, performance is impacted slightly negatively
3194 * if using multiple tx queues. If the stack breaks away from a
3195 * single qdisc implementation, we can look at this again. */
581d708e 3196 tx_ring = adapter->tx_ring;
24025e4e 3197
581d708e 3198 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3199 dev_kfree_skb_any(skb);
3200 return NETDEV_TX_OK;
3201 }
3202
032fe6e9
JB		 3203 /* 82571 and newer doesn't need the workaround that limited descriptor
3204 * length to 4kB */
1dc32918 3205 if (hw->mac_type >= e1000_82571)
032fe6e9
JB		 3206 max_per_txd = 8192;
3207
7967168c 3208 mss = skb_shinfo(skb)->gso_size;
76c224bc 3209 /* The controller does a simple calculation to
1da177e4
LT		 3210 * make sure there is enough room in the FIFO before
3211 * initiating the DMA for each buffer. The calc is:
3212 * 4 = ceil(buffer len/mss). To make sure we don't
3213 * overrun the FIFO, adjust the max buffer len if mss
3214 * drops. */
96838a40 3215 if (mss) {
406874a7 3216 u8 hdr_len;
1da177e4
LT		 3217 max_per_txd = min(mss << 2, max_per_txd);
3218 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3219
90fb5135
AK		 3220 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3221 * points to just header, pull a few bytes of payload from
3222 * frags into skb->data */
ab6a5bb6 3223 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3224 if (skb->data_len && hdr_len == len) {
1dc32918 3225 switch (hw->mac_type) {
9f687888 3226 unsigned int pull_size;
683a2aa3
HX		 3227 case e1000_82544:
3228 /* Make sure we have room to chop off 4 bytes,
3229 * and that the end alignment will work out to
3230 * this hardware's requirements
3231 * NOTE: this is a TSO only workaround
3232 * if end byte alignment not correct move us
3233 * into the next dword */
27a884dc 3234 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 3235 break;
3236 /* fall through */
9f687888
JK		 3237 case e1000_82571:
3238 case e1000_82572:
3239 case e1000_82573:
cd94dd0b 3240 case e1000_ich8lan:
9f687888
JK		 3241 pull_size = min((unsigned int)4, skb->data_len);
3242 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3243 DPRINTK(DRV, ERR,
9f687888
JK		 3244 "__pskb_pull_tail failed.\n");
3245 dev_kfree_skb_any(skb);
749dfc70 3246 return NETDEV_TX_OK;
9f687888
JK		 3247 }
3248 len = skb->len - skb->data_len;
3249 break;
3250 default:
3251 /* do nothing */
3252 break;
d74bbd3b 3253 }
9a3056da 3254 }
1da177e4
LT		 3255 }
3256
9a3056da 3257 /* reserve a descriptor for the offload context */
84fa7933 3258 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3259 count++;
2648345f 3260 count++;
fd803241 3261
fd803241 3262 /* Controller Erratum workaround */
89114afd 3263 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3264 count++;
fd803241 3265
1da177e4
LT		 3266 count += TXD_USE_COUNT(len, max_txd_pwr);
3267
96838a40 3268 if (adapter->pcix_82544)
1da177e4
LT		 3269 count++;
3270
96838a40 3271 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3272 * in PCI-X mode, so add one more descriptor to the count
3273 */
1dc32918 3274 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3275 (len > 2015)))
3276 count++;
3277
1da177e4 3278 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3279 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3280 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3281 max_txd_pwr);
96838a40 3282 if (adapter->pcix_82544)
1da177e4
LT		 3283 count += nr_frags;
3284
0f15a8fa 3285
1dc32918
JP		 3286 if (hw->tx_pkt_filtering &&
3287 (hw->mac_type == e1000_82573))
2d7edb92
MC		 3288 e1000_transfer_dhcp_info(adapter, skb);
3289
f50393fe 3290 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
581d708e 3291 /* Collision - tell upper layer to requeue */
581d708e 3292 return NETDEV_TX_LOCKED;
1da177e4
LT		 3293
3294 /* need: count + 2 desc gap to keep tail from touching
3295 * head, otherwise try next time */
65c7973f 3296 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3297 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3298 return NETDEV_TX_BUSY;
3299 }
3300
1dc32918 3301 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3302 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3303 netif_stop_queue(netdev);
1314bbf3 3304 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
581d708e 3305 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3306 return NETDEV_TX_BUSY;
3307 }
3308 }
3309
96838a40 3310 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3311 tx_flags |= E1000_TX_FLAGS_VLAN;
3312 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3313 }
3314
581d708e 3315 first = tx_ring->next_to_use;
96838a40 3316
581d708e 3317 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3318 if (tso < 0) {
3319 dev_kfree_skb_any(skb);
581d708e 3320 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3321 return NETDEV_TX_OK;
3322 }
3323
fd803241
JK		 3324 if (likely(tso)) {
3325 tx_ring->last_tx_tso = 1;
1da177e4 3326 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3327 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3328 tx_flags |= E1000_TX_FLAGS_CSUM;
3329
2d7edb92 3330 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3331 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3332 * no longer assume, we must. */
60828236 3333 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3334 tx_flags |= E1000_TX_FLAGS_IPV4;
3335
581d708e
MC		 3336 e1000_tx_queue(adapter, tx_ring, tx_flags,
3337 e1000_tx_map(adapter, tx_ring, skb, first,
3338 max_per_txd, nr_frags, mss));
1da177e4
LT		 3339
3340 netdev->trans_start = jiffies;
3341
3342 /* Make sure there is space in the ring for the next send. */
65c7973f 3343 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3344
581d708e 3345 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3346 return NETDEV_TX_OK;
3347}
3348
3349/**
3350 * e1000_tx_timeout - Respond to a Tx Hang
3351 * @netdev: network interface device structure
3352 **/
3353
64798845 3354static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3355{
60490fe0 3356 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3357
3358 /* Do the reset outside of interrupt context */
87041639
JK		 3359 adapter->tx_timeout_count++;
3360 schedule_work(&adapter->reset_task);
1da177e4
LT		 3361}
3362
64798845 3363static void e1000_reset_task(struct work_struct *work)
1da177e4 3364{
65f27f38
DH		 3365 struct e1000_adapter *adapter =
3366 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3367
2db10a08 3368 e1000_reinit_locked(adapter);
1da177e4
LT		 3369}
3370
3371/**
3372 * e1000_get_stats - Get System Network Statistics
3373 * @netdev: network interface device structure
3374 *
3375 * Returns the address of the device statistics structure.
3376 * The statistics are actually updated from the timer callback.
3377 **/
3378
64798845 3379static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3380{
60490fe0 3381 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3382
6b7660cd 3383 /* only return the current stats */
1da177e4
LT		 3384 return &adapter->net_stats;
3385}
3386
3387/**
3388 * e1000_change_mtu - Change the Maximum Transfer Unit
3389 * @netdev: network interface device structure
3390 * @new_mtu: new value for maximum frame size
3391 *
3392 * Returns 0 on success, negative on failure
3393 **/
3394
64798845 3395static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3396{
60490fe0 3397 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3398 struct e1000_hw *hw = &adapter->hw;
1da177e4 3399 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
406874a7 3400 u16 eeprom_data = 0;
1da177e4 3401
96838a40
JB		 3402 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3403 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3404 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3405 return -EINVAL;
2d7edb92 3406 }
1da177e4 3407
997f5cbd 3408 /* Adapter-specific max frame size limits. */
1dc32918 3409 switch (hw->mac_type) {
9e2feace 3410 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3411 case e1000_ich8lan:
997f5cbd
JK		 3412 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3413 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3414 return -EINVAL;
2d7edb92 3415 }
997f5cbd 3416 break;
85b22eb6 3417 case e1000_82573:
249d71d6
BA		 3418 /* Jumbo Frames not supported if:
3419 * - this is not an 82573L device
3420 * - ASPM is enabled in any way (0x1A bits 3:2) */
1dc32918 3421 e1000_read_eeprom(hw, EEPROM_INIT_3GIO_3, 1,
85b22eb6 3422 &eeprom_data);
1dc32918 3423 if ((hw->device_id != E1000_DEV_ID_82573L) ||
249d71d6 3424 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3425 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3426 DPRINTK(PROBE, ERR,
3427 "Jumbo Frames not supported.\n");
3428 return -EINVAL;
3429 }
3430 break;
3431 }
249d71d6
BA		 3432 /* ERT will be enabled later to enable wire speed receives */
3433
85b22eb6 3434 /* fall through to get support */
997f5cbd
JK		 3435 case e1000_82571:
3436 case e1000_82572:
87041639 3437 case e1000_80003es2lan:
997f5cbd
JK		 3438#define MAX_STD_JUMBO_FRAME_SIZE 9234
3439 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3440 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3441 return -EINVAL;
3442 }
3443 break;
3444 default:
3445 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3446 break;
1da177e4
LT		 3447 }
3448
87f5032e 3449 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3450 * means we reserve 2 more, this pushes us to allocate from the next
3451 * larger slab size
3452 * i.e. RXBUFFER_2048 --> size-4096 slab */
3453
3454 if (max_frame <= E1000_RXBUFFER_256)
3455 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3456 else if (max_frame <= E1000_RXBUFFER_512)
3457 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3458 else if (max_frame <= E1000_RXBUFFER_1024)
3459 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3460 else if (max_frame <= E1000_RXBUFFER_2048)
3461 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3462 else if (max_frame <= E1000_RXBUFFER_4096)
3463 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3464 else if (max_frame <= E1000_RXBUFFER_8192)
3465 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3466 else if (max_frame <= E1000_RXBUFFER_16384)
3467 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3468
3469 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3470 if (!hw->tbi_compatibility_on &&
9e2feace
AK		 3471 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3472 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3473 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3474
2d7edb92 3475 netdev->mtu = new_mtu;
1dc32918 3476 hw->max_frame_size = max_frame;
2d7edb92 3477
2db10a08
AK		 3478 if (netif_running(netdev))
3479 e1000_reinit_locked(adapter);
1da177e4 3480
1da177e4
LT		 3481 return 0;
3482}
3483
3484/**
3485 * e1000_update_stats - Update the board statistics counters
3486 * @adapter: board private structure
3487 **/
3488
64798845 3489void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4
LT		 3490{
3491 struct e1000_hw *hw = &adapter->hw;
282f33c9 3492 struct pci_dev *pdev = adapter->pdev;
1da177e4 3493 unsigned long flags;
406874a7 3494 u16 phy_tmp;
1da177e4
LT		 3495
3496#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3497
282f33c9
LV		 3498 /*
3499 * Prevent stats update while adapter is being reset, or if the pci
3500 * connection is down.
3501 */
9026729b 3502 if (adapter->link_speed == 0)
282f33c9 3503 return;
81b1955e 3504 if (pci_channel_offline(pdev))
9026729b
AK		 3505 return;
3506
1da177e4
LT		 3507 spin_lock_irqsave(&adapter->stats_lock, flags);
3508
828d055f 3509 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3510 * called from the interrupt context, so they must only
3511 * be written while holding adapter->stats_lock
3512 */
3513
1dc32918
JP		 3514 adapter->stats.crcerrs += er32(CRCERRS);
3515 adapter->stats.gprc += er32(GPRC);
3516 adapter->stats.gorcl += er32(GORCL);
3517 adapter->stats.gorch += er32(GORCH);
3518 adapter->stats.bprc += er32(BPRC);
3519 adapter->stats.mprc += er32(MPRC);
3520 adapter->stats.roc += er32(ROC);
3521
3522 if (hw->mac_type != e1000_ich8lan) {
3523 adapter->stats.prc64 += er32(PRC64);
3524 adapter->stats.prc127 += er32(PRC127);
3525 adapter->stats.prc255 += er32(PRC255);
3526 adapter->stats.prc511 += er32(PRC511);
3527 adapter->stats.prc1023 += er32(PRC1023);
3528 adapter->stats.prc1522 += er32(PRC1522);
3529 }
3530
3531 adapter->stats.symerrs += er32(SYMERRS);
3532 adapter->stats.mpc += er32(MPC);
3533 adapter->stats.scc += er32(SCC);
3534 adapter->stats.ecol += er32(ECOL);
3535 adapter->stats.mcc += er32(MCC);
3536 adapter->stats.latecol += er32(LATECOL);
3537 adapter->stats.dc += er32(DC);
3538 adapter->stats.sec += er32(SEC);
3539 adapter->stats.rlec += er32(RLEC);
3540 adapter->stats.xonrxc += er32(XONRXC);
3541 adapter->stats.xontxc += er32(XONTXC);
3542 adapter->stats.xoffrxc += er32(XOFFRXC);
3543 adapter->stats.xofftxc += er32(XOFFTXC);
3544 adapter->stats.fcruc += er32(FCRUC);
3545 adapter->stats.gptc += er32(GPTC);
3546 adapter->stats.gotcl += er32(GOTCL);
3547 adapter->stats.gotch += er32(GOTCH);
3548 adapter->stats.rnbc += er32(RNBC);
3549 adapter->stats.ruc += er32(RUC);
3550 adapter->stats.rfc += er32(RFC);
3551 adapter->stats.rjc += er32(RJC);
3552 adapter->stats.torl += er32(TORL);
3553 adapter->stats.torh += er32(TORH);
3554 adapter->stats.totl += er32(TOTL);
3555 adapter->stats.toth += er32(TOTH);
3556 adapter->stats.tpr += er32(TPR);
3557
3558 if (hw->mac_type != e1000_ich8lan) {
3559 adapter->stats.ptc64 += er32(PTC64);
3560 adapter->stats.ptc127 += er32(PTC127);
3561 adapter->stats.ptc255 += er32(PTC255);
3562 adapter->stats.ptc511 += er32(PTC511);
3563 adapter->stats.ptc1023 += er32(PTC1023);
3564 adapter->stats.ptc1522 += er32(PTC1522);
3565 }
3566
3567 adapter->stats.mptc += er32(MPTC);
3568 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3569
3570 /* used for adaptive IFS */
3571
1dc32918 3572 hw->tx_packet_delta = er32(TPT);
1da177e4 3573 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3574 hw->collision_delta = er32(COLC);
1da177e4
LT		 3575 adapter->stats.colc += hw->collision_delta;
3576
96838a40 3577 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3578 adapter->stats.algnerrc += er32(ALGNERRC);
3579 adapter->stats.rxerrc += er32(RXERRC);
3580 adapter->stats.tncrs += er32(TNCRS);
3581 adapter->stats.cexterr += er32(CEXTERR);
3582 adapter->stats.tsctc += er32(TSCTC);
3583 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4 3584 }
96838a40 3585 if (hw->mac_type > e1000_82547_rev_2) {
1dc32918
JP		 3586 adapter->stats.iac += er32(IAC);
3587 adapter->stats.icrxoc += er32(ICRXOC);
3588
3589 if (hw->mac_type != e1000_ich8lan) {
3590 adapter->stats.icrxptc += er32(ICRXPTC);
3591 adapter->stats.icrxatc += er32(ICRXATC);
3592 adapter->stats.ictxptc += er32(ICTXPTC);
3593 adapter->stats.ictxatc += er32(ICTXATC);
3594 adapter->stats.ictxqec += er32(ICTXQEC);
3595 adapter->stats.ictxqmtc += er32(ICTXQMTC);
3596 adapter->stats.icrxdmtc += er32(ICRXDMTC);
cd94dd0b 3597 }
2d7edb92 3598 }
1da177e4
LT		 3599
3600 /* Fill out the OS statistics structure */
1da177e4
LT		 3601 adapter->net_stats.multicast = adapter->stats.mprc;
3602 adapter->net_stats.collisions = adapter->stats.colc;
3603
3604 /* Rx Errors */
3605
87041639
JK		 3606 /* RLEC on some newer hardware can be incorrect so build
3607 * our own version based on RUC and ROC */
1da177e4
LT		 3608 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3609 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3610 adapter->stats.ruc + adapter->stats.roc +
3611 adapter->stats.cexterr;
49559854
MW		 3612 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3613 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3614 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3615 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3616 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3617
3618 /* Tx Errors */
49559854
MW		 3619 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3620 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3621 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3622 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3623 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3624 if (hw->bad_tx_carr_stats_fd &&
167fb284
JG		 3625 adapter->link_duplex == FULL_DUPLEX) {
3626 adapter->net_stats.tx_carrier_errors = 0;
3627 adapter->stats.tncrs = 0;
3628 }
1da177e4
LT		 3629
3630 /* Tx Dropped needs to be maintained elsewhere */
3631
3632 /* Phy Stats */
96838a40
JB		 3633 if (hw->media_type == e1000_media_type_copper) {
3634 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3635 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3636 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3637 adapter->phy_stats.idle_errors += phy_tmp;
3638 }
3639
96838a40 3640 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3641 (hw->phy_type == e1000_phy_m88) &&
3642 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3643 adapter->phy_stats.receive_errors += phy_tmp;
3644 }
3645
15e376b4 3646 /* Management Stats */
1dc32918
JP		 3647 if (hw->has_smbus) {
3648 adapter->stats.mgptc += er32(MGTPTC);
3649 adapter->stats.mgprc += er32(MGTPRC);
3650 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3651 }
3652
1da177e4
LT		 3653 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3654}
9ac98284
JB		 3655
3656/**
3657 * e1000_intr_msi - Interrupt Handler
3658 * @irq: interrupt number
3659 * @data: pointer to a network interface device structure
3660 **/
3661
64798845 3662static irqreturn_t e1000_intr_msi(int irq, void *data)
9ac98284
JB		 3663{
3664 struct net_device *netdev = data;
3665 struct e1000_adapter *adapter = netdev_priv(netdev);
3666 struct e1000_hw *hw = &adapter->hw;
1dc32918 3667 u32 icr = er32(ICR);
9ac98284 3668
9150b76a
JB		 3669 /* in NAPI mode read ICR disables interrupts using IAM */
3670
b5fc8f0c
JB		 3671 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3672 hw->get_link_status = 1;
3673 /* 80003ES2LAN workaround-- For packet buffer work-around on
3674 * link down event; disable receives here in the ISR and reset
3675 * adapter in watchdog */
3676 if (netif_carrier_ok(netdev) &&
1dc32918 3677 (hw->mac_type == e1000_80003es2lan)) {
b5fc8f0c 3678 /* disable receives */
1dc32918
JP		 3679 u32 rctl = er32(RCTL);
3680 ew32(RCTL, rctl & ~E1000_RCTL_EN);
9ac98284 3681 }
b5fc8f0c
JB		 3682 /* guard against interrupt when we're going down */
3683 if (!test_bit(__E1000_DOWN, &adapter->flags))
3684 mod_timer(&adapter->watchdog_timer, jiffies + 1);
9ac98284
JB		 3685 }
3686
bea3348e 3687 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
835bb129
JB		 3688 adapter->total_tx_bytes = 0;
3689 adapter->total_tx_packets = 0;
3690 adapter->total_rx_bytes = 0;
3691 adapter->total_rx_packets = 0;
bea3348e 3692 __netif_rx_schedule(netdev, &adapter->napi);
835bb129 3693 } else
9ac98284 3694 e1000_irq_enable(adapter);
9ac98284
JB		 3695
3696 return IRQ_HANDLED;
3697}
1da177e4
LT		 3698
3699/**
3700 * e1000_intr - Interrupt Handler
3701 * @irq: interrupt number
3702 * @data: pointer to a network interface device structure
1da177e4
LT		 3703 **/
3704
64798845 3705static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3706{
3707 struct net_device *netdev = data;
60490fe0 3708 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3709 struct e1000_hw *hw = &adapter->hw;
1dc32918 3710 u32 rctl, icr = er32(ICR);
c3570acb 3711
835bb129
JB		 3712 if (unlikely(!icr))
3713 return IRQ_NONE; /* Not our interrupt */
3714
835bb129
JB		 3715 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3716 * not set, then the adapter didn't send an interrupt */
3717 if (unlikely(hw->mac_type >= e1000_82571 &&
3718 !(icr & E1000_ICR_INT_ASSERTED)))
3719 return IRQ_NONE;
3720
9150b76a
JB		 3721 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3722 * need for the IMC write */
1da177e4 3723
96838a40 3724 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3725 hw->get_link_status = 1;
87041639
JK		 3726 /* 80003ES2LAN workaround--
3727 * For packet buffer work-around on link down event;
3728 * disable receives here in the ISR and
3729 * reset adapter in watchdog
3730 */
3731 if (netif_carrier_ok(netdev) &&
1dc32918 3732 (hw->mac_type == e1000_80003es2lan)) {
87041639 3733 /* disable receives */
1dc32918
JP		 3734 rctl = er32(RCTL);
3735 ew32(RCTL, rctl & ~E1000_RCTL_EN);
87041639 3736 }
1314bbf3
AK		 3737 /* guard against interrupt when we're going down */
3738 if (!test_bit(__E1000_DOWN, &adapter->flags))
3739 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3740 }
3741
1e613fd9 3742 if (unlikely(hw->mac_type < e1000_82571)) {
835bb129 3743 /* disable interrupts, without the synchronize_irq bit */
1dc32918
JP		 3744 ew32(IMC, ~0);
3745 E1000_WRITE_FLUSH();
1e613fd9 3746 }
bea3348e 3747 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
835bb129
JB		 3748 adapter->total_tx_bytes = 0;
3749 adapter->total_tx_packets = 0;
3750 adapter->total_rx_bytes = 0;
3751 adapter->total_rx_packets = 0;
bea3348e 3752 __netif_rx_schedule(netdev, &adapter->napi);
835bb129 3753 } else
90fb5135
AK		 3754 /* this really should not happen! if it does it is basically a
3755 * bug, but not a hard error, so enable ints and continue */
581d708e 3756 e1000_irq_enable(adapter);
1da177e4 3757
1da177e4
LT		 3758 return IRQ_HANDLED;
3759}
3760
1da177e4
LT		 3761/**
3762 * e1000_clean - NAPI Rx polling callback
3763 * @adapter: board private structure
3764 **/
64798845 3765static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3766{
bea3348e
SH		 3767 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3768 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 3769 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3770
3771 /* Must NOT use netdev_priv macro here. */
3772 adapter = poll_dev->priv;
3773
d3d9e484
AK		 3774 /* e1000_clean is called per-cpu. This lock protects
3775 * tx_ring[0] from being cleaned by multiple cpus
3776 * simultaneously. A failure obtaining the lock means
3777 * tx_ring[0] is currently being cleaned anyway. */
3778 if (spin_trylock(&adapter->tx_queue_lock)) {
d2c7ddd6
DM		 3779 tx_cleaned = e1000_clean_tx_irq(adapter,
3780 &adapter->tx_ring[0]);
d3d9e484 3781 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3782 }
3783
d3d9e484 3784 adapter->clean_rx(adapter, &adapter->rx_ring[0],
bea3348e 3785 &work_done, budget);
96838a40 3786
d2c7ddd6
DM		 3787 if (tx_cleaned)
3788 work_done = budget;
3789
53e52c72
DM		 3790 /* If budget not fully consumed, exit the polling mode */
3791 if (work_done < budget) {
835bb129
JB		 3792 if (likely(adapter->itr_setting & 3))
3793 e1000_set_itr(adapter);
bea3348e 3794 netif_rx_complete(poll_dev, napi);
1da177e4 3795 e1000_irq_enable(adapter);
1da177e4
LT		 3796 }
3797
bea3348e 3798 return work_done;
1da177e4
LT		 3799}
3800
1da177e4
LT		 3801/**
3802 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3803 * @adapter: board private structure
3804 **/
64798845
JP		 3805static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3806 struct e1000_tx_ring *tx_ring)
1da177e4 3807{
1dc32918 3808 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3809 struct net_device *netdev = adapter->netdev;
3810 struct e1000_tx_desc *tx_desc, *eop_desc;
3811 struct e1000_buffer *buffer_info;
3812 unsigned int i, eop;
2a1af5d7 3813 unsigned int count = 0;
c3033b01 3814 bool cleaned = false;
835bb129 3815 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3816
3817 i = tx_ring->next_to_clean;
3818 eop = tx_ring->buffer_info[i].next_to_watch;
3819 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3820
581d708e 3821 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
c3033b01 3822 for (cleaned = false; !cleaned; ) {
1da177e4
LT		 3823 tx_desc = E1000_TX_DESC(*tx_ring, i);
3824 buffer_info = &tx_ring->buffer_info[i];
3825 cleaned = (i == eop);
3826
835bb129 3827 if (cleaned) {
2b65326e 3828 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3829 unsigned int segs, bytecount;
3830 segs = skb_shinfo(skb)->gso_segs ?: 1;
3831 /* multiply data chunks by size of headers */
3832 bytecount = ((segs - 1) * skb_headlen(skb)) +
3833 skb->len;
2b65326e 3834 total_tx_packets += segs;
7753b171 3835 total_tx_bytes += bytecount;
835bb129 3836 }
fd803241 3837 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3838 tx_desc->upper.data = 0;
1da177e4 3839
96838a40 3840 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3841 }
581d708e 3842
1da177e4
LT		 3843 eop = tx_ring->buffer_info[i].next_to_watch;
3844 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3845#define E1000_TX_WEIGHT 64
3846 /* weight of a sort for tx, to avoid endless transmit cleanup */
c3570acb
FR		 3847 if (count++ == E1000_TX_WEIGHT)
3848 break;
1da177e4
LT		 3849 }
3850
3851 tx_ring->next_to_clean = i;
3852
77b2aad5 3853#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 3854 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3855 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3856 /* Make sure that anybody stopping the queue after this
3857 * sees the new next_to_clean.
3858 */
3859 smp_mb();
fcfb1224 3860 if (netif_queue_stopped(netdev)) {
77b2aad5 3861 netif_wake_queue(netdev);
fcfb1224
JB		 3862 ++adapter->restart_queue;
3863 }
77b2aad5 3864 }
2648345f 3865
581d708e 3866 if (adapter->detect_tx_hung) {
2648345f 3867 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3868 * check with the clearing of time_stamp and movement of i */
c3033b01 3869 adapter->detect_tx_hung = false;
392137fa
JK		 3870 if (tx_ring->buffer_info[eop].dma &&
3871 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3872 (adapter->tx_timeout_factor * HZ))
1dc32918 3873 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3874
3875 /* detected Tx unit hang */
c6963ef5 3876 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3877 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3878 " TDH <%x>\n"
3879 " TDT <%x>\n"
3880 " next_to_use <%x>\n"
3881 " next_to_clean <%x>\n"
3882 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3883 " time_stamp <%lx>\n"
3884 " next_to_watch <%x>\n"
3885 " jiffies <%lx>\n"
3886 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3887 (unsigned long)((tx_ring - adapter->tx_ring) /
3888 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3889 readl(hw->hw_addr + tx_ring->tdh),
3890 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3891 tx_ring->next_to_use,
392137fa
JK		 3892 tx_ring->next_to_clean,
3893 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3894 eop,
3895 jiffies,
3896 eop_desc->upper.fields.status);
1da177e4 3897 netif_stop_queue(netdev);
70b8f1e1 3898 }
1da177e4 3899 }
835bb129
JB		 3900 adapter->total_tx_bytes += total_tx_bytes;
3901 adapter->total_tx_packets += total_tx_packets;
ef90e4ec
AK		 3902 adapter->net_stats.tx_bytes += total_tx_bytes;
3903 adapter->net_stats.tx_packets += total_tx_packets;
1da177e4
LT		 3904 return cleaned;
3905}
3906
3907/**
3908 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3909 * @adapter: board private structure
3910 * @status_err: receive descriptor status and error fields
3911 * @csum: receive descriptor csum field
3912 * @sk_buff: socket buffer with received data
1da177e4
LT		 3913 **/
3914
64798845
JP		 3915static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3916 u32 csum, struct sk_buff *skb)
1da177e4 3917{
1dc32918 3918 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3919 u16 status = (u16)status_err;
3920 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC		 3921 skb->ip_summed = CHECKSUM_NONE;
3922
1da177e4 3923 /* 82543 or newer only */
1dc32918 3924 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3925 /* Ignore Checksum bit is set */
96838a40 3926 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3927 /* TCP/UDP checksum error bit is set */
96838a40 3928 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3929 /* let the stack verify checksum errors */
1da177e4 3930 adapter->hw_csum_err++;
2d7edb92
MC		 3931 return;
3932 }
3933 /* TCP/UDP Checksum has not been calculated */
1dc32918 3934 if (hw->mac_type <= e1000_82547_rev_2) {
96838a40 3935 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3936 return;
1da177e4 3937 } else {
96838a40 3938 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3939 return;
3940 }
3941 /* It must be a TCP or UDP packet with a valid checksum */
3942 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3943 /* TCP checksum is good */
3944 skb->ip_summed = CHECKSUM_UNNECESSARY;
1dc32918 3945 } else if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3946 /* IP fragment with UDP payload */
3947 /* Hardware complements the payload checksum, so we undo it
3948 * and then put the value in host order for further stack use.
3949 */
3e18826c
AV		 3950 __sum16 sum = (__force __sum16)htons(csum);
3951 skb->csum = csum_unfold(~sum);
84fa7933 3952 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3953 }
2d7edb92 3954 adapter->hw_csum_good++;
1da177e4
LT		 3955}
3956
3957/**
2d7edb92 3958 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3959 * @adapter: board private structure
3960 **/
64798845
JP		 3961static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3962 struct e1000_rx_ring *rx_ring,
3963 int *work_done, int work_to_do)
1da177e4 3964{
1dc32918 3965 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3966 struct net_device *netdev = adapter->netdev;
3967 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3968 struct e1000_rx_desc *rx_desc, *next_rxd;
3969 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3970 unsigned long flags;
406874a7
JP		 3971 u32 length;
3972 u8 last_byte;
1da177e4 3973 unsigned int i;
72d64a43 3974 int cleaned_count = 0;
c3033b01 3975 bool cleaned = false;
835bb129 3976 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 3977
3978 i = rx_ring->next_to_clean;
3979 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3980 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3981
b92ff8ee 3982 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3983 struct sk_buff *skb;
a292ca6e 3984 u8 status;
90fb5135 3985
96838a40 3986 if (*work_done >= work_to_do)
1da177e4
LT		 3987 break;
3988 (*work_done)++;
c3570acb 3989
a292ca6e 3990 status = rx_desc->status;
b92ff8ee 3991 skb = buffer_info->skb;
86c3d59f
JB		 3992 buffer_info->skb = NULL;
3993
30320be8
JK		 3994 prefetch(skb->data - NET_IP_ALIGN);
3995
86c3d59f
JB		 3996 if (++i == rx_ring->count) i = 0;
3997 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3998 prefetch(next_rxd);
3999
86c3d59f 4000 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4001
c3033b01 4002 cleaned = true;
72d64a43 4003 cleaned_count++;
a292ca6e
JK		 4004 pci_unmap_single(pdev,
4005 buffer_info->dma,
4006 buffer_info->length,
1da177e4
LT		 4007 PCI_DMA_FROMDEVICE);
4008
1da177e4
LT		 4009 length = le16_to_cpu(rx_desc->length);
4010
a1415ee6
JK		 4011 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4012 /* All receives must fit into a single buffer */
4013 E1000_DBG("%s: Receive packet consumed multiple"
4014 " buffers\n", netdev->name);
864c4e45 4015 /* recycle */
8fc897b0 4016 buffer_info->skb = skb;
1da177e4
LT		 4017 goto next_desc;
4018 }
4019
96838a40 4020 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 4021 last_byte = *(skb->data + length - 1);
1dc32918
JP		 4022 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4023 last_byte)) {
1da177e4 4024 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4025 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 4026 length, skb->data);
4027 spin_unlock_irqrestore(&adapter->stats_lock,
4028 flags);
4029 length--;
4030 } else {
9e2feace
AK		 4031 /* recycle */
4032 buffer_info->skb = skb;
1da177e4
LT		 4033 goto next_desc;
4034 }
1cb5821f 4035 }
1da177e4 4036
d2a1e213
JB		 4037 /* adjust length to remove Ethernet CRC, this must be
4038 * done after the TBI_ACCEPT workaround above */
4039 length -= 4;
4040
835bb129
JB		 4041 /* probably a little skewed due to removing CRC */
4042 total_rx_bytes += length;
4043 total_rx_packets++;
4044
a292ca6e
JK		 4045 /* code added for copybreak, this should improve
4046 * performance for small packets with large amounts
4047 * of reassembly being done in the stack */
1f753861 4048 if (length < copybreak) {
a292ca6e 4049 struct sk_buff *new_skb =
87f5032e 4050 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 4051 if (new_skb) {
4052 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM		 4053 skb_copy_to_linear_data_offset(new_skb,
4054 -NET_IP_ALIGN,
4055 (skb->data -
4056 NET_IP_ALIGN),
4057 (length +
4058 NET_IP_ALIGN));
a292ca6e
JK		 4059 /* save the skb in buffer_info as good */
4060 buffer_info->skb = skb;
4061 skb = new_skb;
a292ca6e 4062 }
996695de
AK		 4063 /* else just continue with the old one */
4064 }
a292ca6e 4065 /* end copybreak code */
996695de 4066 skb_put(skb, length);
1da177e4
LT		 4067
4068 /* Receive Checksum Offload */
a292ca6e 4069 e1000_rx_checksum(adapter,
406874a7
JP		 4070 (u32)(status) |
4071 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4072 le16_to_cpu(rx_desc->csum), skb);
96838a40 4073
1da177e4 4074 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 4075
96838a40 4076 if (unlikely(adapter->vlgrp &&
a292ca6e 4077 (status & E1000_RXD_STAT_VP))) {
1da177e4 4078 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
38b22195 4079 le16_to_cpu(rx_desc->special));
1da177e4
LT		 4080 } else {
4081 netif_receive_skb(skb);
4082 }
c3570acb 4083
1da177e4
LT		 4084 netdev->last_rx = jiffies;
4085
4086next_desc:
4087 rx_desc->status = 0;
1da177e4 4088
72d64a43
JK		 4089 /* return some buffers to hardware, one at a time is too slow */
4090 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4091 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4092 cleaned_count = 0;
4093 }
4094
30320be8 4095 /* use prefetched values */
86c3d59f
JB		 4096 rx_desc = next_rxd;
4097 buffer_info = next_buffer;
1da177e4 4098 }
1da177e4 4099 rx_ring->next_to_clean = i;
72d64a43
JK		 4100
4101 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4102 if (cleaned_count)
4103 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4104
835bb129
JB		 4105 adapter->total_rx_packets += total_rx_packets;
4106 adapter->total_rx_bytes += total_rx_bytes;
ef90e4ec
AK		 4107 adapter->net_stats.rx_bytes += total_rx_bytes;
4108 adapter->net_stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4109 return cleaned;
4110}
4111
1da177e4 4112/**
2d7edb92 4113 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4114 * @adapter: address of board private structure
4115 **/
4116
64798845
JP		 4117static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4118 struct e1000_rx_ring *rx_ring,
4119 int cleaned_count)
1da177e4 4120{
1dc32918 4121 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4122 struct net_device *netdev = adapter->netdev;
4123 struct pci_dev *pdev = adapter->pdev;
4124 struct e1000_rx_desc *rx_desc;
4125 struct e1000_buffer *buffer_info;
4126 struct sk_buff *skb;
2648345f
MC		 4127 unsigned int i;
4128 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4129
4130 i = rx_ring->next_to_use;
4131 buffer_info = &rx_ring->buffer_info[i];
4132
a292ca6e 4133 while (cleaned_count--) {
ca6f7224
CH		 4134 skb = buffer_info->skb;
4135 if (skb) {
a292ca6e
JK		 4136 skb_trim(skb, 0);
4137 goto map_skb;
4138 }
4139
ca6f7224 4140 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4141 if (unlikely(!skb)) {
1da177e4 4142 /* Better luck next round */
72d64a43 4143 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4144 break;
4145 }
4146
2648345f 4147 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4148 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4149 struct sk_buff *oldskb = skb;
2648345f
MC		 4150 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4151 "at %p\n", bufsz, skb->data);
4152 /* Try again, without freeing the previous */
87f5032e 4153 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4154 /* Failed allocation, critical failure */
1da177e4
LT		 4155 if (!skb) {
4156 dev_kfree_skb(oldskb);
4157 break;
4158 }
2648345f 4159
1da177e4
LT		 4160 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4161 /* give up */
4162 dev_kfree_skb(skb);
4163 dev_kfree_skb(oldskb);
4164 break; /* while !buffer_info->skb */
1da177e4 4165 }
ca6f7224
CH		 4166
4167 /* Use new allocation */
4168 dev_kfree_skb(oldskb);
1da177e4 4169 }
1da177e4
LT		 4170 /* Make buffer alignment 2 beyond a 16 byte boundary
4171 * this will result in a 16 byte aligned IP header after
4172 * the 14 byte MAC header is removed
4173 */
4174 skb_reserve(skb, NET_IP_ALIGN);
4175
1da177e4
LT		 4176 buffer_info->skb = skb;
4177 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4178map_skb:
1da177e4
LT		 4179 buffer_info->dma = pci_map_single(pdev,
4180 skb->data,
4181 adapter->rx_buffer_len,
4182 PCI_DMA_FROMDEVICE);
4183
2648345f
MC		 4184 /* Fix for errata 23, can't cross 64kB boundary */
4185 if (!e1000_check_64k_bound(adapter,
4186 (void *)(unsigned long)buffer_info->dma,
4187 adapter->rx_buffer_len)) {
4188 DPRINTK(RX_ERR, ERR,
4189 "dma align check failed: %u bytes at %p\n",
4190 adapter->rx_buffer_len,
4191 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4192 dev_kfree_skb(skb);
4193 buffer_info->skb = NULL;
4194
2648345f 4195 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4196 adapter->rx_buffer_len,
4197 PCI_DMA_FROMDEVICE);
4198
4199 break; /* while !buffer_info->skb */
4200 }
1da177e4
LT		 4201 rx_desc = E1000_RX_DESC(*rx_ring, i);
4202 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4203
96838a40
JB		 4204 if (unlikely(++i == rx_ring->count))
4205 i = 0;
1da177e4
LT		 4206 buffer_info = &rx_ring->buffer_info[i];
4207 }
4208
b92ff8ee
JB		 4209 if (likely(rx_ring->next_to_use != i)) {
4210 rx_ring->next_to_use = i;
4211 if (unlikely(i-- == 0))
4212 i = (rx_ring->count - 1);
4213
4214 /* Force memory writes to complete before letting h/w
4215 * know there are new descriptors to fetch. (Only
4216 * applicable for weak-ordered memory model archs,
4217 * such as IA-64). */
4218 wmb();
1dc32918 4219 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4220 }
1da177e4
LT		 4221}
4222
4223/**
4224 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4225 * @adapter:
4226 **/
4227
64798845 4228static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4229{
1dc32918 4230 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4231 u16 phy_status;
4232 u16 phy_ctrl;
1da177e4 4233
1dc32918
JP		 4234 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4235 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4236 return;
4237
96838a40 4238 if (adapter->smartspeed == 0) {
1da177e4
LT		 4239 /* If Master/Slave config fault is asserted twice,
4240 * we assume back-to-back */
1dc32918 4241 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4242 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4243 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4244 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4245 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4246 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4247 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4248 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4249 phy_ctrl);
4250 adapter->smartspeed++;
1dc32918
JP		 4251 if (!e1000_phy_setup_autoneg(hw) &&
4252 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4253 &phy_ctrl)) {
4254 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4255 MII_CR_RESTART_AUTO_NEG);
1dc32918 4256 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4257 phy_ctrl);
4258 }
4259 }
4260 return;
96838a40 4261 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4262 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4263 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4264 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4265 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4266 if (!e1000_phy_setup_autoneg(hw) &&
4267 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4268 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4269 MII_CR_RESTART_AUTO_NEG);
1dc32918 4270 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4271 }
4272 }
4273 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4274 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4275 adapter->smartspeed = 0;
4276}
4277
4278/**
4279 * e1000_ioctl -
4280 * @netdev:
4281 * @ifreq:
4282 * @cmd:
4283 **/
4284
64798845 4285static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4286{
4287 switch (cmd) {
4288 case SIOCGMIIPHY:
4289 case SIOCGMIIREG:
4290 case SIOCSMIIREG:
4291 return e1000_mii_ioctl(netdev, ifr, cmd);
4292 default:
4293 return -EOPNOTSUPP;
4294 }
4295}
4296
4297/**
4298 * e1000_mii_ioctl -
4299 * @netdev:
4300 * @ifreq:
4301 * @cmd:
4302 **/
4303
64798845
JP		 4304static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4305 int cmd)
1da177e4 4306{
60490fe0 4307 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4308 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4309 struct mii_ioctl_data *data = if_mii(ifr);
4310 int retval;
406874a7
JP		 4311 u16 mii_reg;
4312 u16 spddplx;
97876fc6 4313 unsigned long flags;
1da177e4 4314
1dc32918 4315 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4316 return -EOPNOTSUPP;
4317
4318 switch (cmd) {
4319 case SIOCGMIIPHY:
1dc32918 4320 data->phy_id = hw->phy_addr;
1da177e4
LT		 4321 break;
4322 case SIOCGMIIREG:
96838a40 4323 if (!capable(CAP_NET_ADMIN))
1da177e4 4324 return -EPERM;
97876fc6 4325 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4326 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4327 &data->val_out)) {
4328 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4329 return -EIO;
97876fc6
MC		 4330 }
4331 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4332 break;
4333 case SIOCSMIIREG:
96838a40 4334 if (!capable(CAP_NET_ADMIN))
1da177e4 4335 return -EPERM;
96838a40 4336 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4337 return -EFAULT;
4338 mii_reg = data->val_in;
97876fc6 4339 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4340 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4341 mii_reg)) {
4342 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4343 return -EIO;
97876fc6 4344 }
f0163ac4 4345 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4346 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4347 switch (data->reg_num) {
4348 case PHY_CTRL:
96838a40 4349 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4350 break;
96838a40 4351 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4352 hw->autoneg = 1;
4353 hw->autoneg_advertised = 0x2F;
1da177e4
LT		 4354 } else {
4355 if (mii_reg & 0x40)
4356 spddplx = SPEED_1000;
4357 else if (mii_reg & 0x2000)
4358 spddplx = SPEED_100;
4359 else
4360 spddplx = SPEED_10;
4361 spddplx += (mii_reg & 0x100)
cb764326
JK		 4362 ? DUPLEX_FULL :
4363 DUPLEX_HALF;
1da177e4
LT		 4364 retval = e1000_set_spd_dplx(adapter,
4365 spddplx);
f0163ac4 4366 if (retval)
1da177e4
LT		 4367 return retval;
4368 }
2db10a08
AK		 4369 if (netif_running(adapter->netdev))
4370 e1000_reinit_locked(adapter);
4371 else
1da177e4
LT		 4372 e1000_reset(adapter);
4373 break;
4374 case M88E1000_PHY_SPEC_CTRL:
4375 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4376 if (e1000_phy_reset(hw))
1da177e4
LT		 4377 return -EIO;
4378 break;
4379 }
4380 } else {
4381 switch (data->reg_num) {
4382 case PHY_CTRL:
96838a40 4383 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4384 break;
2db10a08
AK		 4385 if (netif_running(adapter->netdev))
4386 e1000_reinit_locked(adapter);
4387 else
1da177e4
LT		 4388 e1000_reset(adapter);
4389 break;
4390 }
4391 }
4392 break;
4393 default:
4394 return -EOPNOTSUPP;
4395 }
4396 return E1000_SUCCESS;
4397}
4398
64798845 4399void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4400{
4401 struct e1000_adapter *adapter = hw->back;
2648345f 4402 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4403
96838a40 4404 if (ret_val)
2648345f 4405 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4406}
4407
64798845 4408void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4409{
4410 struct e1000_adapter *adapter = hw->back;
4411
4412 pci_clear_mwi(adapter->pdev);
4413}
4414
64798845 4415int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4416{
4417 struct e1000_adapter *adapter = hw->back;
4418 return pcix_get_mmrbc(adapter->pdev);
4419}
4420
64798845 4421void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4422{
4423 struct e1000_adapter *adapter = hw->back;
4424 pcix_set_mmrbc(adapter->pdev, mmrbc);
4425}
4426
64798845 4427s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
caeccb68
JK		 4428{
4429 struct e1000_adapter *adapter = hw->back;
406874a7 4430 u16 cap_offset;
caeccb68
JK		 4431
4432 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4433 if (!cap_offset)
4434 return -E1000_ERR_CONFIG;
4435
4436 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4437
4438 return E1000_SUCCESS;
4439}
4440
64798845 4441void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4442{
4443 outl(value, port);
4444}
4445
64798845
JP		 4446static void e1000_vlan_rx_register(struct net_device *netdev,
4447 struct vlan_group *grp)
1da177e4 4448{
60490fe0 4449 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4450 struct e1000_hw *hw = &adapter->hw;
406874a7 4451 u32 ctrl, rctl;
1da177e4 4452
9150b76a
JB		 4453 if (!test_bit(__E1000_DOWN, &adapter->flags))
4454 e1000_irq_disable(adapter);
1da177e4
LT		 4455 adapter->vlgrp = grp;
4456
96838a40 4457 if (grp) {
1da177e4 4458 /* enable VLAN tag insert/strip */
1dc32918 4459 ctrl = er32(CTRL);
1da177e4 4460 ctrl |= E1000_CTRL_VME;
1dc32918 4461 ew32(CTRL, ctrl);
1da177e4 4462
cd94dd0b 4463 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4464 /* enable VLAN receive filtering */
1dc32918 4465 rctl = er32(RCTL);
90fb5135 4466 rctl &= ~E1000_RCTL_CFIEN;
1dc32918 4467 ew32(RCTL, rctl);
90fb5135 4468 e1000_update_mng_vlan(adapter);
cd94dd0b 4469 }
1da177e4
LT		 4470 } else {
4471 /* disable VLAN tag insert/strip */
1dc32918 4472 ctrl = er32(CTRL);
1da177e4 4473 ctrl &= ~E1000_CTRL_VME;
1dc32918 4474 ew32(CTRL, ctrl);
1da177e4 4475
cd94dd0b 4476 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4477 if (adapter->mng_vlan_id !=
406874a7 4478 (u16)E1000_MNG_VLAN_NONE) {
90fb5135
AK		 4479 e1000_vlan_rx_kill_vid(netdev,
4480 adapter->mng_vlan_id);
4481 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4482 }
cd94dd0b 4483 }
1da177e4
LT		 4484 }
4485
9150b76a
JB		 4486 if (!test_bit(__E1000_DOWN, &adapter->flags))
4487 e1000_irq_enable(adapter);
1da177e4
LT		 4488}
4489
64798845 4490static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4491{
60490fe0 4492 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4493 struct e1000_hw *hw = &adapter->hw;
406874a7 4494 u32 vfta, index;
96838a40 4495
1dc32918 4496 if ((hw->mng_cookie.status &
96838a40
JB		 4497 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4498 (vid == adapter->mng_vlan_id))
2d7edb92 4499 return;
1da177e4
LT		 4500 /* add VID to filter table */
4501 index = (vid >> 5) & 0x7F;
1dc32918 4502 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4503 vfta |= (1 << (vid & 0x1F));
1dc32918 4504 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4505}
4506
64798845 4507static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4508{
60490fe0 4509 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4510 struct e1000_hw *hw = &adapter->hw;
406874a7 4511 u32 vfta, index;
1da177e4 4512
9150b76a
JB		 4513 if (!test_bit(__E1000_DOWN, &adapter->flags))
4514 e1000_irq_disable(adapter);
5c15bdec 4515 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB		 4516 if (!test_bit(__E1000_DOWN, &adapter->flags))
4517 e1000_irq_enable(adapter);
1da177e4 4518
1dc32918 4519 if ((hw->mng_cookie.status &
96838a40 4520 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4521 (vid == adapter->mng_vlan_id)) {
4522 /* release control to f/w */
4523 e1000_release_hw_control(adapter);
2d7edb92 4524 return;
ff147013
JK		 4525 }
4526
1da177e4
LT		 4527 /* remove VID from filter table */
4528 index = (vid >> 5) & 0x7F;
1dc32918 4529 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4530 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4531 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4532}
4533
64798845 4534static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT		 4535{
4536 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4537
96838a40 4538 if (adapter->vlgrp) {
406874a7 4539 u16 vid;
96838a40 4540 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4541 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 4542 continue;
4543 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4544 }
4545 }
4546}
4547
64798845 4548int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4549{
1dc32918
JP		 4550 struct e1000_hw *hw = &adapter->hw;
4551
4552 hw->autoneg = 0;
1da177e4 4553
6921368f 4554 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4555 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f
MC		 4556 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4557 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4558 return -EINVAL;
4559 }
4560
96838a40 4561 switch (spddplx) {
1da177e4 4562 case SPEED_10 + DUPLEX_HALF:
1dc32918 4563 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4564 break;
4565 case SPEED_10 + DUPLEX_FULL:
1dc32918 4566 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4567 break;
4568 case SPEED_100 + DUPLEX_HALF:
1dc32918 4569 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4570 break;
4571 case SPEED_100 + DUPLEX_FULL:
1dc32918 4572 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4573 break;
4574 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4575 hw->autoneg = 1;
4576 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4577 break;
4578 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4579 default:
2648345f 4580 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4581 return -EINVAL;
4582 }
4583 return 0;
4584}
4585
64798845 4586static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4587{
4588 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4589 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4590 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4591 u32 ctrl, ctrl_ext, rctl, status;
4592 u32 wufc = adapter->wol;
6fdfef16 4593#ifdef CONFIG_PM
240b1710 4594 int retval = 0;
6fdfef16 4595#endif
1da177e4
LT		 4596
4597 netif_device_detach(netdev);
4598
2db10a08
AK		 4599 if (netif_running(netdev)) {
4600 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4601 e1000_down(adapter);
2db10a08 4602 }
1da177e4 4603
2f82665f 4604#ifdef CONFIG_PM
1d33e9c6 4605 retval = pci_save_state(pdev);
2f82665f
JB		 4606 if (retval)
4607 return retval;
4608#endif
4609
1dc32918 4610 status = er32(STATUS);
96838a40 4611 if (status & E1000_STATUS_LU)
1da177e4
LT		 4612 wufc &= ~E1000_WUFC_LNKC;
4613
96838a40 4614 if (wufc) {
1da177e4 4615 e1000_setup_rctl(adapter);
db0ce50d 4616 e1000_set_rx_mode(netdev);
1da177e4
LT		 4617
4618 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4619 if (wufc & E1000_WUFC_MC) {
1dc32918 4620 rctl = er32(RCTL);
1da177e4 4621 rctl |= E1000_RCTL_MPE;
1dc32918 4622 ew32(RCTL, rctl);
1da177e4
LT		 4623 }
4624
1dc32918
JP		 4625 if (hw->mac_type >= e1000_82540) {
4626 ctrl = er32(CTRL);
1da177e4
LT		 4627 /* advertise wake from D3Cold */
4628 #define E1000_CTRL_ADVD3WUC 0x00100000
4629 /* phy power management enable */
4630 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4631 ctrl |= E1000_CTRL_ADVD3WUC |
4632 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4633 ew32(CTRL, ctrl);
1da177e4
LT		 4634 }
4635
1dc32918
JP		 4636 if (hw->media_type == e1000_media_type_fiber ||
4637 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4638 /* keep the laser running in D3 */
1dc32918 4639 ctrl_ext = er32(CTRL_EXT);
1da177e4 4640 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4641 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4642 }
4643
2d7edb92 4644 /* Allow time for pending master requests to run */
1dc32918 4645 e1000_disable_pciex_master(hw);
2d7edb92 4646
1dc32918
JP		 4647 ew32(WUC, E1000_WUC_PME_EN);
4648 ew32(WUFC, wufc);
d0e027db
AK		 4649 pci_enable_wake(pdev, PCI_D3hot, 1);
4650 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4 4651 } else {
1dc32918
JP		 4652 ew32(WUC, 0);
4653 ew32(WUFC, 0);
d0e027db
AK		 4654 pci_enable_wake(pdev, PCI_D3hot, 0);
4655 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4656 }
4657
0fccd0e9
JG		 4658 e1000_release_manageability(adapter);
4659
4660 /* make sure adapter isn't asleep if manageability is enabled */
4661 if (adapter->en_mng_pt) {
4662 pci_enable_wake(pdev, PCI_D3hot, 1);
4663 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4664 }
4665
1dc32918
JP		 4666 if (hw->phy_type == e1000_phy_igp_3)
4667 e1000_phy_powerdown_workaround(hw);
cd94dd0b 4668
edd106fc
AK		 4669 if (netif_running(netdev))
4670 e1000_free_irq(adapter);
4671
b55ccb35
JK		 4672 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4673 * would have already happened in close and is redundant. */
4674 e1000_release_hw_control(adapter);
2d7edb92 4675
1da177e4 4676 pci_disable_device(pdev);
240b1710 4677
d0e027db 4678 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4679
4680 return 0;
4681}
4682
2f82665f 4683#ifdef CONFIG_PM
64798845 4684static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4685{
4686 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4687 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4688 struct e1000_hw *hw = &adapter->hw;
406874a7 4689 u32 err;
1da177e4 4690
d0e027db 4691 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4692 pci_restore_state(pdev);
81250297
TI		 4693
4694 if (adapter->need_ioport)
4695 err = pci_enable_device(pdev);
4696 else
4697 err = pci_enable_device_mem(pdev);
c7be73bc 4698 if (err) {
3d1dd8cb
AK		 4699 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4700 return err;
4701 }
a4cb847d 4702 pci_set_master(pdev);
1da177e4 4703
d0e027db
AK		 4704 pci_enable_wake(pdev, PCI_D3hot, 0);
4705 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4706
c7be73bc
JP		 4707 if (netif_running(netdev)) {
4708 err = e1000_request_irq(adapter);
4709 if (err)
4710 return err;
4711 }
edd106fc
AK		 4712
4713 e1000_power_up_phy(adapter);
1da177e4 4714 e1000_reset(adapter);
1dc32918 4715 ew32(WUS, ~0);
1da177e4 4716
0fccd0e9
JG		 4717 e1000_init_manageability(adapter);
4718
96838a40 4719 if (netif_running(netdev))
1da177e4
LT		 4720 e1000_up(adapter);
4721
4722 netif_device_attach(netdev);
4723
b55ccb35
JK		 4724 /* If the controller is 82573 and f/w is AMT, do not set
4725 * DRV_LOAD until the interface is up. For all other cases,
4726 * let the f/w know that the h/w is now under the control
4727 * of the driver. */
1dc32918
JP		 4728 if (hw->mac_type != e1000_82573 ||
4729 !e1000_check_mng_mode(hw))
b55ccb35 4730 e1000_get_hw_control(adapter);
2d7edb92 4731
1da177e4
LT		 4732 return 0;
4733}
4734#endif
c653e635
AK		 4735
4736static void e1000_shutdown(struct pci_dev *pdev)
4737{
4738 e1000_suspend(pdev, PMSG_SUSPEND);
4739}
4740
1da177e4
LT		 4741#ifdef CONFIG_NET_POLL_CONTROLLER
4742/*
4743 * Polling 'interrupt' - used by things like netconsole to send skbs
4744 * without having to re-enable interrupts. It's not called while
4745 * the interrupt routine is executing.
4746 */
64798845 4747static void e1000_netpoll(struct net_device *netdev)
1da177e4 4748{
60490fe0 4749 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4750
1da177e4 4751 disable_irq(adapter->pdev->irq);
7d12e780 4752 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4753 enable_irq(adapter->pdev->irq);
4754}
4755#endif
4756
9026729b
AK		 4757/**
4758 * e1000_io_error_detected - called when PCI error is detected
4759 * @pdev: Pointer to PCI device
4760 * @state: The current pci conneection state
4761 *
4762 * This function is called after a PCI bus error affecting
4763 * this device has been detected.
4764 */
64798845
JP		 4765static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4766 pci_channel_state_t state)
9026729b
AK		 4767{
4768 struct net_device *netdev = pci_get_drvdata(pdev);
4769 struct e1000_adapter *adapter = netdev->priv;
4770
4771 netif_device_detach(netdev);
4772
4773 if (netif_running(netdev))
4774 e1000_down(adapter);
72e8d6bb 4775 pci_disable_device(pdev);
9026729b
AK		 4776
4777 /* Request a slot slot reset. */
4778 return PCI_ERS_RESULT_NEED_RESET;
4779}
4780
4781/**
4782 * e1000_io_slot_reset - called after the pci bus has been reset.
4783 * @pdev: Pointer to PCI device
4784 *
4785 * Restart the card from scratch, as if from a cold-boot. Implementation
4786 * resembles the first-half of the e1000_resume routine.
4787 */
4788static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4789{
4790 struct net_device *netdev = pci_get_drvdata(pdev);
4791 struct e1000_adapter *adapter = netdev->priv;
1dc32918 4792 struct e1000_hw *hw = &adapter->hw;
81250297 4793 int err;
9026729b 4794
81250297
TI		 4795 if (adapter->need_ioport)
4796 err = pci_enable_device(pdev);
4797 else
4798 err = pci_enable_device_mem(pdev);
4799 if (err) {
9026729b
AK		 4800 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4801 return PCI_ERS_RESULT_DISCONNECT;
4802 }
4803 pci_set_master(pdev);
4804
dbf38c94
LV		 4805 pci_enable_wake(pdev, PCI_D3hot, 0);
4806 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4807
9026729b 4808 e1000_reset(adapter);
1dc32918 4809 ew32(WUS, ~0);
9026729b
AK		 4810
4811 return PCI_ERS_RESULT_RECOVERED;
4812}
4813
4814/**
4815 * e1000_io_resume - called when traffic can start flowing again.
4816 * @pdev: Pointer to PCI device
4817 *
4818 * This callback is called when the error recovery driver tells us that
4819 * its OK to resume normal operation. Implementation resembles the
4820 * second-half of the e1000_resume routine.
4821 */
4822static void e1000_io_resume(struct pci_dev *pdev)
4823{
4824 struct net_device *netdev = pci_get_drvdata(pdev);
4825 struct e1000_adapter *adapter = netdev->priv;
1dc32918 4826 struct e1000_hw *hw = &adapter->hw;
0fccd0e9
JG		 4827
4828 e1000_init_manageability(adapter);
9026729b
AK		 4829
4830 if (netif_running(netdev)) {
4831 if (e1000_up(adapter)) {
4832 printk("e1000: can't bring device back up after reset\n");
4833 return;
4834 }
4835 }
4836
4837 netif_device_attach(netdev);
4838
0fccd0e9
JG		 4839 /* If the controller is 82573 and f/w is AMT, do not set
4840 * DRV_LOAD until the interface is up. For all other cases,
4841 * let the f/w know that the h/w is now under the control
4842 * of the driver. */
1dc32918
JP		 4843 if (hw->mac_type != e1000_82573 ||
4844 !e1000_check_mng_mode(hw))
0fccd0e9 4845 e1000_get_hw_control(adapter);
9026729b 4846
9026729b
AK		 4847}
4848
1da177e4 4849/* e1000_main.c */
Linux kernel - Deliverables
This page took 0.935702 seconds and 5 git commands to generate.