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e1000: FIX: be ready for incoming irq at pci_request_irq
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 34#ifndef CONFIG_E1000_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
7e721579 39#define DRV_VERSION "7.3.20-k2"DRIVERNAPI
1da177e4 40char e1000_driver_version[] = DRV_VERSION;
3d41e30a 41static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 42
43/* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
ae2c3860
AK		 76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
07b8fede
MC		 81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
5881cde8 102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
b7ee49db 103 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 104 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
ae2c3860
AK		 105 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
fc2307d0
AK		 107 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
108 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
1da177e4
LT		 110 /* required last entry */
111 {0,}
112};
113
114MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
115
35574764
NN		 116int e1000_up(struct e1000_adapter *adapter);
117void e1000_down(struct e1000_adapter *adapter);
118void e1000_reinit_locked(struct e1000_adapter *adapter);
119void e1000_reset(struct e1000_adapter *adapter);
120int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
121int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
122int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
123void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
124void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 125static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 126 struct e1000_tx_ring *txdr);
3ad2cc67 127static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 128 struct e1000_rx_ring *rxdr);
3ad2cc67 129static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 130 struct e1000_tx_ring *tx_ring);
3ad2cc67 131static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 132 struct e1000_rx_ring *rx_ring);
133void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 134
135static int e1000_init_module(void);
136static void e1000_exit_module(void);
137static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
138static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 139static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 140static int e1000_sw_init(struct e1000_adapter *adapter);
141static int e1000_open(struct net_device *netdev);
142static int e1000_close(struct net_device *netdev);
143static void e1000_configure_tx(struct e1000_adapter *adapter);
144static void e1000_configure_rx(struct e1000_adapter *adapter);
145static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 146static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
147static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
148static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
149 struct e1000_tx_ring *tx_ring);
150static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 152static void e1000_set_multi(struct net_device *netdev);
153static void e1000_update_phy_info(unsigned long data);
154static void e1000_watchdog(unsigned long data);
1da177e4
LT		 155static void e1000_82547_tx_fifo_stall(unsigned long data);
156static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
157static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
158static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
159static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 160static irqreturn_t e1000_intr(int irq, void *data);
9ac98284
JB		 161#ifdef CONFIG_PCI_MSI
162static irqreturn_t e1000_intr_msi(int irq, void *data);
163#endif
581d708e
MC		 164static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
165 struct e1000_tx_ring *tx_ring);
1da177e4 166#ifdef CONFIG_E1000_NAPI
581d708e 167static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 168static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 169 struct e1000_rx_ring *rx_ring,
1da177e4 170 int *work_done, int work_to_do);
2d7edb92 171static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 172 struct e1000_rx_ring *rx_ring,
2d7edb92 173 int *work_done, int work_to_do);
1da177e4 174#else
581d708e
MC		 175static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring);
177static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
178 struct e1000_rx_ring *rx_ring);
1da177e4 179#endif
581d708e 180static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 181 struct e1000_rx_ring *rx_ring,
182 int cleaned_count);
581d708e 183static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 184 struct e1000_rx_ring *rx_ring,
185 int cleaned_count);
1da177e4
LT		 186static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
187static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
188 int cmd);
35574764 189void e1000_set_ethtool_ops(struct net_device *netdev);
1da177e4
LT		 190static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
191static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
192static void e1000_tx_timeout(struct net_device *dev);
65f27f38 193static void e1000_reset_task(struct work_struct *work);
1da177e4 194static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 195static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
196 struct sk_buff *skb);
1da177e4
LT		 197
198static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
199static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
200static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
201static void e1000_restore_vlan(struct e1000_adapter *adapter);
202
977e74b5 203static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 204#ifdef CONFIG_PM
1da177e4
LT		 205static int e1000_resume(struct pci_dev *pdev);
206#endif
c653e635 207static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 208
209#ifdef CONFIG_NET_POLL_CONTROLLER
210/* for netdump / net console */
211static void e1000_netpoll (struct net_device *netdev);
212#endif
213
35574764
NN		 214extern void e1000_check_options(struct e1000_adapter *adapter);
215
1f753861
JB		 216#define COPYBREAK_DEFAULT 256
217static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
218module_param(copybreak, uint, 0644);
219MODULE_PARM_DESC(copybreak,
220 "Maximum size of packet that is copied to a new buffer on receive");
221
9026729b
AK		 222static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
223 pci_channel_state_t state);
224static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
225static void e1000_io_resume(struct pci_dev *pdev);
226
227static struct pci_error_handlers e1000_err_handler = {
228 .error_detected = e1000_io_error_detected,
229 .slot_reset = e1000_io_slot_reset,
230 .resume = e1000_io_resume,
231};
24025e4e 232
1da177e4
LT		 233static struct pci_driver e1000_driver = {
234 .name = e1000_driver_name,
235 .id_table = e1000_pci_tbl,
236 .probe = e1000_probe,
237 .remove = __devexit_p(e1000_remove),
c4e24f01 238#ifdef CONFIG_PM
1da177e4 239 /* Power Managment Hooks */
1da177e4 240 .suspend = e1000_suspend,
c653e635 241 .resume = e1000_resume,
1da177e4 242#endif
9026729b
AK		 243 .shutdown = e1000_shutdown,
244 .err_handler = &e1000_err_handler
1da177e4
LT		 245};
246
247MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
248MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
249MODULE_LICENSE("GPL");
250MODULE_VERSION(DRV_VERSION);
251
252static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
253module_param(debug, int, 0);
254MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
255
256/**
257 * e1000_init_module - Driver Registration Routine
258 *
259 * e1000_init_module is the first routine called when the driver is
260 * loaded. All it does is register with the PCI subsystem.
261 **/
262
263static int __init
264e1000_init_module(void)
265{
266 int ret;
267 printk(KERN_INFO "%s - version %s\n",
268 e1000_driver_string, e1000_driver_version);
269
270 printk(KERN_INFO "%s\n", e1000_copyright);
271
29917620 272 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 273 if (copybreak != COPYBREAK_DEFAULT) {
274 if (copybreak == 0)
275 printk(KERN_INFO "e1000: copybreak disabled\n");
276 else
277 printk(KERN_INFO "e1000: copybreak enabled for "
278 "packets <= %u bytes\n", copybreak);
279 }
1da177e4
LT		 280 return ret;
281}
282
283module_init(e1000_init_module);
284
285/**
286 * e1000_exit_module - Driver Exit Cleanup Routine
287 *
288 * e1000_exit_module is called just before the driver is removed
289 * from memory.
290 **/
291
292static void __exit
293e1000_exit_module(void)
294{
1da177e4
LT		 295 pci_unregister_driver(&e1000_driver);
296}
297
298module_exit(e1000_exit_module);
299
2db10a08
AK		 300static int e1000_request_irq(struct e1000_adapter *adapter)
301{
302 struct net_device *netdev = adapter->netdev;
303 int flags, err = 0;
304
c0bc8721 305 flags = IRQF_SHARED;
2db10a08 306#ifdef CONFIG_PCI_MSI
9ac98284 307 if (adapter->hw.mac_type >= e1000_82571) {
2db10a08
AK		 308 adapter->have_msi = TRUE;
309 if ((err = pci_enable_msi(adapter->pdev))) {
310 DPRINTK(PROBE, ERR,
311 "Unable to allocate MSI interrupt Error: %d\n", err);
312 adapter->have_msi = FALSE;
313 }
314 }
9ac98284 315 if (adapter->have_msi) {
61ef5c00 316 flags &= ~IRQF_SHARED;
9ac98284
JB		 317 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, flags,
318 netdev->name, netdev);
319 if (err)
320 DPRINTK(PROBE, ERR,
321 "Unable to allocate interrupt Error: %d\n", err);
322 } else
2db10a08
AK		 323#endif
324 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
325 netdev->name, netdev)))
326 DPRINTK(PROBE, ERR,
327 "Unable to allocate interrupt Error: %d\n", err);
328
329 return err;
330}
331
332static void e1000_free_irq(struct e1000_adapter *adapter)
333{
334 struct net_device *netdev = adapter->netdev;
335
336 free_irq(adapter->pdev->irq, netdev);
337
338#ifdef CONFIG_PCI_MSI
339 if (adapter->have_msi)
340 pci_disable_msi(adapter->pdev);
341#endif
342}
343
1da177e4
LT		 344/**
345 * e1000_irq_disable - Mask off interrupt generation on the NIC
346 * @adapter: board private structure
347 **/
348
e619d523 349static void
1da177e4
LT		 350e1000_irq_disable(struct e1000_adapter *adapter)
351{
352 atomic_inc(&adapter->irq_sem);
353 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
354 E1000_WRITE_FLUSH(&adapter->hw);
355 synchronize_irq(adapter->pdev->irq);
356}
357
358/**
359 * e1000_irq_enable - Enable default interrupt generation settings
360 * @adapter: board private structure
361 **/
362
e619d523 363static void
1da177e4
LT		 364e1000_irq_enable(struct e1000_adapter *adapter)
365{
96838a40 366 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 367 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
368 E1000_WRITE_FLUSH(&adapter->hw);
369 }
370}
3ad2cc67
AB		 371
372static void
2d7edb92
MC		 373e1000_update_mng_vlan(struct e1000_adapter *adapter)
374{
375 struct net_device *netdev = adapter->netdev;
376 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
377 uint16_t old_vid = adapter->mng_vlan_id;
96838a40 378 if (adapter->vlgrp) {
5c15bdec 379 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
96838a40 380 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 381 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
382 e1000_vlan_rx_add_vid(netdev, vid);
383 adapter->mng_vlan_id = vid;
384 } else
385 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 386
387 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
388 (vid != old_vid) &&
5c15bdec 389 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 390 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 391 } else
392 adapter->mng_vlan_id = vid;
2d7edb92
MC		 393 }
394}
b55ccb35
JK		 395
396/**
397 * e1000_release_hw_control - release control of the h/w to f/w
398 * @adapter: address of board private structure
399 *
400 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
401 * For ASF and Pass Through versions of f/w this means that the
402 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 403 * of the f/w this means that the network i/f is closed.
76c224bc 404 *
b55ccb35
JK		 405 **/
406
e619d523 407static void
b55ccb35
JK		 408e1000_release_hw_control(struct e1000_adapter *adapter)
409{
410 uint32_t ctrl_ext;
411 uint32_t swsm;
cd94dd0b 412 uint32_t extcnf;
b55ccb35
JK		 413
414 /* Let firmware taken over control of h/w */
415 switch (adapter->hw.mac_type) {
416 case e1000_82571:
417 case e1000_82572:
4cc15f54 418 case e1000_80003es2lan:
b55ccb35
JK		 419 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
420 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
421 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
422 break;
423 case e1000_82573:
424 swsm = E1000_READ_REG(&adapter->hw, SWSM);
425 E1000_WRITE_REG(&adapter->hw, SWSM,
426 swsm & ~E1000_SWSM_DRV_LOAD);
cd94dd0b
AK		 427 case e1000_ich8lan:
428 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
429 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
430 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
431 break;
b55ccb35
JK		 432 default:
433 break;
434 }
435}
436
437/**
438 * e1000_get_hw_control - get control of the h/w from f/w
439 * @adapter: address of board private structure
440 *
441 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 442 * For ASF and Pass Through versions of f/w this means that
443 * the driver is loaded. For AMT version (only with 82573)
90fb5135 444 * of the f/w this means that the network i/f is open.
76c224bc 445 *
b55ccb35
JK		 446 **/
447
e619d523 448static void
b55ccb35
JK		 449e1000_get_hw_control(struct e1000_adapter *adapter)
450{
451 uint32_t ctrl_ext;
452 uint32_t swsm;
cd94dd0b 453 uint32_t extcnf;
90fb5135 454
b55ccb35
JK		 455 /* Let firmware know the driver has taken over */
456 switch (adapter->hw.mac_type) {
457 case e1000_82571:
458 case e1000_82572:
4cc15f54 459 case e1000_80003es2lan:
b55ccb35
JK		 460 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
461 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
462 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
463 break;
464 case e1000_82573:
465 swsm = E1000_READ_REG(&adapter->hw, SWSM);
466 E1000_WRITE_REG(&adapter->hw, SWSM,
467 swsm | E1000_SWSM_DRV_LOAD);
468 break;
cd94dd0b
AK		 469 case e1000_ich8lan:
470 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
471 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
472 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
473 break;
b55ccb35
JK		 474 default:
475 break;
476 }
477}
478
0fccd0e9
JG		 479static void
480e1000_init_manageability(struct e1000_adapter *adapter)
481{
482 if (adapter->en_mng_pt) {
483 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
484
485 /* disable hardware interception of ARP */
486 manc &= ~(E1000_MANC_ARP_EN);
487
488 /* enable receiving management packets to the host */
489 /* this will probably generate destination unreachable messages
490 * from the host OS, but the packets will be handled on SMBUS */
491 if (adapter->hw.has_manc2h) {
492 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
493
494 manc |= E1000_MANC_EN_MNG2HOST;
495#define E1000_MNG2HOST_PORT_623 (1 << 5)
496#define E1000_MNG2HOST_PORT_664 (1 << 6)
497 manc2h |= E1000_MNG2HOST_PORT_623;
498 manc2h |= E1000_MNG2HOST_PORT_664;
499 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
500 }
501
502 E1000_WRITE_REG(&adapter->hw, MANC, manc);
503 }
504}
505
506static void
507e1000_release_manageability(struct e1000_adapter *adapter)
508{
509 if (adapter->en_mng_pt) {
510 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
511
512 /* re-enable hardware interception of ARP */
513 manc |= E1000_MANC_ARP_EN;
514
515 if (adapter->hw.has_manc2h)
516 manc &= ~E1000_MANC_EN_MNG2HOST;
517
518 /* don't explicitly have to mess with MANC2H since
519 * MANC has an enable disable that gates MANC2H */
520
521 E1000_WRITE_REG(&adapter->hw, MANC, manc);
522 }
523}
524
e0aac5a2
AK		 525/**
526 * e1000_configure - configure the hardware for RX and TX
527 * @adapter = private board structure
528 **/
529static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 530{
531 struct net_device *netdev = adapter->netdev;
2db10a08 532 int i;
1da177e4 533
1da177e4
LT		 534 e1000_set_multi(netdev);
535
536 e1000_restore_vlan(adapter);
0fccd0e9 537 e1000_init_manageability(adapter);
1da177e4
LT		 538
539 e1000_configure_tx(adapter);
540 e1000_setup_rctl(adapter);
541 e1000_configure_rx(adapter);
72d64a43
JK		 542 /* call E1000_DESC_UNUSED which always leaves
543 * at least 1 descriptor unused to make sure
544 * next_to_use != next_to_clean */
f56799ea 545 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 546 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 547 adapter->alloc_rx_buf(adapter, ring,
548 E1000_DESC_UNUSED(ring));
f56799ea 549 }
1da177e4 550
7bfa4816 551 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 552}
553
554int e1000_up(struct e1000_adapter *adapter)
555{
556 /* hardware has been reset, we need to reload some things */
557 e1000_configure(adapter);
558
559 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 560
1da177e4 561#ifdef CONFIG_E1000_NAPI
e0aac5a2 562 netif_poll_enable(adapter->netdev);
1da177e4 563#endif
5de55624
MC		 564 e1000_irq_enable(adapter);
565
79f3d399
JB		 566 /* fire a link change interrupt to start the watchdog */
567 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1da177e4
LT		 568 return 0;
569}
570
79f05bf0
AK		 571/**
572 * e1000_power_up_phy - restore link in case the phy was powered down
573 * @adapter: address of board private structure
574 *
575 * The phy may be powered down to save power and turn off link when the
576 * driver is unloaded and wake on lan is not enabled (among others)
577 * *** this routine MUST be followed by a call to e1000_reset ***
578 *
579 **/
580
d658266e 581void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0
AK		 582{
583 uint16_t mii_reg = 0;
584
585 /* Just clear the power down bit to wake the phy back up */
586 if (adapter->hw.media_type == e1000_media_type_copper) {
587 /* according to the manual, the phy will retain its
588 * settings across a power-down/up cycle */
589 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
590 mii_reg &= ~MII_CR_POWER_DOWN;
591 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
592 }
593}
594
595static void e1000_power_down_phy(struct e1000_adapter *adapter)
596{
61c2505f
BA		 597 /* Power down the PHY so no link is implied when interface is down *
598 * The PHY cannot be powered down if any of the following is TRUE *
79f05bf0
AK		 599 * (a) WoL is enabled
600 * (b) AMT is active
601 * (c) SoL/IDER session is active */
602 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
61c2505f 603 adapter->hw.media_type == e1000_media_type_copper) {
79f05bf0 604 uint16_t mii_reg = 0;
61c2505f
BA		 605
606 switch (adapter->hw.mac_type) {
607 case e1000_82540:
608 case e1000_82545:
609 case e1000_82545_rev_3:
610 case e1000_82546:
611 case e1000_82546_rev_3:
612 case e1000_82541:
613 case e1000_82541_rev_2:
614 case e1000_82547:
615 case e1000_82547_rev_2:
616 if (E1000_READ_REG(&adapter->hw, MANC) &
617 E1000_MANC_SMBUS_EN)
618 goto out;
619 break;
620 case e1000_82571:
621 case e1000_82572:
622 case e1000_82573:
623 case e1000_80003es2lan:
624 case e1000_ich8lan:
625 if (e1000_check_mng_mode(&adapter->hw) ||
626 e1000_check_phy_reset_block(&adapter->hw))
627 goto out;
628 break;
629 default:
630 goto out;
631 }
79f05bf0
AK		 632 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
633 mii_reg |= MII_CR_POWER_DOWN;
634 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
635 mdelay(1);
636 }
61c2505f
BA		 637out:
638 return;
79f05bf0
AK		 639}
640
1da177e4
LT		 641void
642e1000_down(struct e1000_adapter *adapter)
643{
644 struct net_device *netdev = adapter->netdev;
645
1314bbf3
AK		 646 /* signal that we're down so the interrupt handler does not
647 * reschedule our watchdog timer */
648 set_bit(__E1000_DOWN, &adapter->flags);
649
e0aac5a2
AK		 650#ifdef CONFIG_E1000_NAPI
651 netif_poll_disable(netdev);
652#endif
1da177e4 653 e1000_irq_disable(adapter);
c1605eb3 654
1da177e4
LT		 655 del_timer_sync(&adapter->tx_fifo_stall_timer);
656 del_timer_sync(&adapter->watchdog_timer);
657 del_timer_sync(&adapter->phy_info_timer);
658
7bfa4816 659 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 660 adapter->link_speed = 0;
661 adapter->link_duplex = 0;
662 netif_carrier_off(netdev);
663 netif_stop_queue(netdev);
664
665 e1000_reset(adapter);
581d708e
MC		 666 e1000_clean_all_tx_rings(adapter);
667 e1000_clean_all_rx_rings(adapter);
1da177e4 668}
1da177e4 669
2db10a08
AK		 670void
671e1000_reinit_locked(struct e1000_adapter *adapter)
672{
673 WARN_ON(in_interrupt());
674 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
675 msleep(1);
676 e1000_down(adapter);
677 e1000_up(adapter);
678 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 679}
680
681void
682e1000_reset(struct e1000_adapter *adapter)
683{
018ea44e 684 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
1125ecbc 685 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
018ea44e 686 boolean_t legacy_pba_adjust = FALSE;
1da177e4
LT		 687
688 /* Repartition Pba for greater than 9k mtu
689 * To take effect CTRL.RST is required.
690 */
691
2d7edb92 692 switch (adapter->hw.mac_type) {
018ea44e
BA		 693 case e1000_82542_rev2_0:
694 case e1000_82542_rev2_1:
695 case e1000_82543:
696 case e1000_82544:
697 case e1000_82540:
698 case e1000_82541:
699 case e1000_82541_rev_2:
700 legacy_pba_adjust = TRUE;
701 pba = E1000_PBA_48K;
702 break;
703 case e1000_82545:
704 case e1000_82545_rev_3:
705 case e1000_82546:
706 case e1000_82546_rev_3:
707 pba = E1000_PBA_48K;
708 break;
2d7edb92 709 case e1000_82547:
0e6ef3e0 710 case e1000_82547_rev_2:
018ea44e 711 legacy_pba_adjust = TRUE;
2d7edb92
MC		 712 pba = E1000_PBA_30K;
713 break;
868d5309
MC		 714 case e1000_82571:
715 case e1000_82572:
6418ecc6 716 case e1000_80003es2lan:
868d5309
MC		 717 pba = E1000_PBA_38K;
718 break;
2d7edb92 719 case e1000_82573:
018ea44e 720 pba = E1000_PBA_20K;
2d7edb92 721 break;
cd94dd0b
AK		 722 case e1000_ich8lan:
723 pba = E1000_PBA_8K;
018ea44e
BA		 724 case e1000_undefined:
725 case e1000_num_macs:
2d7edb92
MC		 726 break;
727 }
728
018ea44e
BA		 729 if (legacy_pba_adjust == TRUE) {
730 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
731 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 732
018ea44e
BA		 733 if (adapter->hw.mac_type == e1000_82547) {
734 adapter->tx_fifo_head = 0;
735 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
736 adapter->tx_fifo_size =
737 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
738 atomic_set(&adapter->tx_fifo_stall, 0);
739 }
740 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
741 /* adjust PBA for jumbo frames */
742 E1000_WRITE_REG(&adapter->hw, PBA, pba);
743
744 /* To maintain wire speed transmits, the Tx FIFO should be
745 * large enough to accomodate two full transmit packets,
746 * rounded up to the next 1KB and expressed in KB. Likewise,
747 * the Rx FIFO should be large enough to accomodate at least
748 * one full receive packet and is similarly rounded up and
749 * expressed in KB. */
750 pba = E1000_READ_REG(&adapter->hw, PBA);
751 /* upper 16 bits has Tx packet buffer allocation size in KB */
752 tx_space = pba >> 16;
753 /* lower 16 bits has Rx packet buffer allocation size in KB */
754 pba &= 0xffff;
755 /* don't include ethernet FCS because hardware appends/strips */
756 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
757 VLAN_TAG_SIZE;
758 min_tx_space = min_rx_space;
759 min_tx_space *= 2;
760 E1000_ROUNDUP(min_tx_space, 1024);
761 min_tx_space >>= 10;
762 E1000_ROUNDUP(min_rx_space, 1024);
763 min_rx_space >>= 10;
764
765 /* If current Tx allocation is less than the min Tx FIFO size,
766 * and the min Tx FIFO size is less than the current Rx FIFO
767 * allocation, take space away from current Rx allocation */
768 if (tx_space < min_tx_space &&
769 ((min_tx_space - tx_space) < pba)) {
770 pba = pba - (min_tx_space - tx_space);
771
772 /* PCI/PCIx hardware has PBA alignment constraints */
773 switch (adapter->hw.mac_type) {
774 case e1000_82545 ... e1000_82546_rev_3:
775 pba &= ~(E1000_PBA_8K - 1);
776 break;
777 default:
778 break;
779 }
780
781 /* if short on rx space, rx wins and must trump tx
782 * adjustment or use Early Receive if available */
783 if (pba < min_rx_space) {
784 switch (adapter->hw.mac_type) {
785 case e1000_82573:
786 /* ERT enabled in e1000_configure_rx */
787 break;
788 default:
789 pba = min_rx_space;
790 break;
791 }
792 }
793 }
1da177e4 794 }
2d7edb92 795
1da177e4
LT		 796 E1000_WRITE_REG(&adapter->hw, PBA, pba);
797
798 /* flow control settings */
f11b7f85
JK		 799 /* Set the FC high water mark to 90% of the FIFO size.
800 * Required to clear last 3 LSB */
801 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 802 /* We can't use 90% on small FIFOs because the remainder
803 * would be less than 1 full frame. In this case, we size
804 * it to allow at least a full frame above the high water
805 * mark. */
806 if (pba < E1000_PBA_16K)
807 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85
JK		 808
809 adapter->hw.fc_high_water = fc_high_water_mark;
810 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 811 if (adapter->hw.mac_type == e1000_80003es2lan)
812 adapter->hw.fc_pause_time = 0xFFFF;
813 else
814 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 815 adapter->hw.fc_send_xon = 1;
816 adapter->hw.fc = adapter->hw.original_fc;
817
2d7edb92 818 /* Allow time for pending master requests to run */
1da177e4 819 e1000_reset_hw(&adapter->hw);
96838a40 820 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 821 E1000_WRITE_REG(&adapter->hw, WUC, 0);
09ae3e88 822
96838a40 823 if (e1000_init_hw(&adapter->hw))
1da177e4 824 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 825 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 826
827 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
828 if (adapter->hw.mac_type >= e1000_82544 &&
829 adapter->hw.mac_type <= e1000_82547_rev_2 &&
830 adapter->hw.autoneg == 1 &&
831 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
832 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
833 /* clear phy power management bit if we are in gig only mode,
834 * which if enabled will attempt negotiation to 100Mb, which
835 * can cause a loss of link at power off or driver unload */
836 ctrl &= ~E1000_CTRL_SWDPIN3;
837 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
838 }
839
1da177e4
LT		 840 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
841 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
842
843 e1000_reset_adaptive(&adapter->hw);
844 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 845
846 if (!adapter->smart_power_down &&
847 (adapter->hw.mac_type == e1000_82571 ||
848 adapter->hw.mac_type == e1000_82572)) {
849 uint16_t phy_data = 0;
850 /* speed up time to link by disabling smart power down, ignore
851 * the return value of this function because there is nothing
852 * different we would do if it failed */
853 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
854 &phy_data);
855 phy_data &= ~IGP02E1000_PM_SPD;
856 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
857 phy_data);
858 }
859
0fccd0e9 860 e1000_release_manageability(adapter);
1da177e4
LT		 861}
862
863/**
864 * e1000_probe - Device Initialization Routine
865 * @pdev: PCI device information struct
866 * @ent: entry in e1000_pci_tbl
867 *
868 * Returns 0 on success, negative on failure
869 *
870 * e1000_probe initializes an adapter identified by a pci_dev structure.
871 * The OS initialization, configuring of the adapter private structure,
872 * and a hardware reset occur.
873 **/
874
875static int __devinit
876e1000_probe(struct pci_dev *pdev,
877 const struct pci_device_id *ent)
878{
879 struct net_device *netdev;
880 struct e1000_adapter *adapter;
2d7edb92 881 unsigned long mmio_start, mmio_len;
cd94dd0b 882 unsigned long flash_start, flash_len;
2d7edb92 883
1da177e4 884 static int cards_found = 0;
120cd576 885 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 886 int i, err, pci_using_dac;
120cd576 887 uint16_t eeprom_data = 0;
1da177e4 888 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 889 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 890 return err;
891
cd94dd0b
AK		 892 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
893 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 894 pci_using_dac = 1;
895 } else {
cd94dd0b
AK		 896 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
897 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 898 E1000_ERR("No usable DMA configuration, aborting\n");
6dd62ab0 899 goto err_dma;
1da177e4
LT		 900 }
901 pci_using_dac = 0;
902 }
903
96838a40 904 if ((err = pci_request_regions(pdev, e1000_driver_name)))
6dd62ab0 905 goto err_pci_reg;
1da177e4
LT		 906
907 pci_set_master(pdev);
908
6dd62ab0 909 err = -ENOMEM;
1da177e4 910 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 911 if (!netdev)
1da177e4 912 goto err_alloc_etherdev;
1da177e4
LT		 913
914 SET_MODULE_OWNER(netdev);
915 SET_NETDEV_DEV(netdev, &pdev->dev);
916
917 pci_set_drvdata(pdev, netdev);
60490fe0 918 adapter = netdev_priv(netdev);
1da177e4
LT		 919 adapter->netdev = netdev;
920 adapter->pdev = pdev;
921 adapter->hw.back = adapter;
922 adapter->msg_enable = (1 << debug) - 1;
923
924 mmio_start = pci_resource_start(pdev, BAR_0);
925 mmio_len = pci_resource_len(pdev, BAR_0);
926
6dd62ab0 927 err = -EIO;
1da177e4 928 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6dd62ab0 929 if (!adapter->hw.hw_addr)
1da177e4 930 goto err_ioremap;
1da177e4 931
96838a40
JB		 932 for (i = BAR_1; i <= BAR_5; i++) {
933 if (pci_resource_len(pdev, i) == 0)
1da177e4 934 continue;
96838a40 935 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 936 adapter->hw.io_base = pci_resource_start(pdev, i);
937 break;
938 }
939 }
940
941 netdev->open = &e1000_open;
942 netdev->stop = &e1000_close;
943 netdev->hard_start_xmit = &e1000_xmit_frame;
944 netdev->get_stats = &e1000_get_stats;
945 netdev->set_multicast_list = &e1000_set_multi;
946 netdev->set_mac_address = &e1000_set_mac;
947 netdev->change_mtu = &e1000_change_mtu;
948 netdev->do_ioctl = &e1000_ioctl;
949 e1000_set_ethtool_ops(netdev);
950 netdev->tx_timeout = &e1000_tx_timeout;
951 netdev->watchdog_timeo = 5 * HZ;
952#ifdef CONFIG_E1000_NAPI
953 netdev->poll = &e1000_clean;
954 netdev->weight = 64;
955#endif
956 netdev->vlan_rx_register = e1000_vlan_rx_register;
957 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
958 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
959#ifdef CONFIG_NET_POLL_CONTROLLER
960 netdev->poll_controller = e1000_netpoll;
961#endif
0eb5a34c 962 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT		 963
964 netdev->mem_start = mmio_start;
965 netdev->mem_end = mmio_start + mmio_len;
966 netdev->base_addr = adapter->hw.io_base;
967
968 adapter->bd_number = cards_found;
969
970 /* setup the private structure */
971
96838a40 972 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 973 goto err_sw_init;
974
6dd62ab0 975 err = -EIO;
cd94dd0b
AK		 976 /* Flash BAR mapping must happen after e1000_sw_init
977 * because it depends on mac_type */
978 if ((adapter->hw.mac_type == e1000_ich8lan) &&
979 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
980 flash_start = pci_resource_start(pdev, 1);
981 flash_len = pci_resource_len(pdev, 1);
982 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6dd62ab0 983 if (!adapter->hw.flash_address)
cd94dd0b 984 goto err_flashmap;
cd94dd0b
AK		 985 }
986
6dd62ab0 987 if (e1000_check_phy_reset_block(&adapter->hw))
2d7edb92
MC		 988 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
989
96838a40 990 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 991 netdev->features = NETIF_F_SG |
992 NETIF_F_HW_CSUM |
993 NETIF_F_HW_VLAN_TX |
994 NETIF_F_HW_VLAN_RX |
995 NETIF_F_HW_VLAN_FILTER;
cd94dd0b
AK		 996 if (adapter->hw.mac_type == e1000_ich8lan)
997 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 998 }
999
96838a40 1000 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 1001 (adapter->hw.mac_type != e1000_82547))
1002 netdev->features |= NETIF_F_TSO;
2d7edb92 1003
96838a40 1004 if (adapter->hw.mac_type > e1000_82547_rev_2)
87ca4e5b 1005 netdev->features |= NETIF_F_TSO6;
96838a40 1006 if (pci_using_dac)
1da177e4
LT		 1007 netdev->features |= NETIF_F_HIGHDMA;
1008
76c224bc
AK		 1009 netdev->features |= NETIF_F_LLTX;
1010
2d7edb92
MC		 1011 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
1012
cd94dd0b
AK		 1013 /* initialize eeprom parameters */
1014
1015 if (e1000_init_eeprom_params(&adapter->hw)) {
1016 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 1017 goto err_eeprom;
cd94dd0b
AK		 1018 }
1019
96838a40 1020 /* before reading the EEPROM, reset the controller to
1da177e4 1021 * put the device in a known good starting state */
96838a40 1022
1da177e4
LT		 1023 e1000_reset_hw(&adapter->hw);
1024
1025 /* make sure the EEPROM is good */
1026
96838a40 1027 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4 1028 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 1029 goto err_eeprom;
1030 }
1031
1032 /* copy the MAC address out of the EEPROM */
1033
96838a40 1034 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 1035 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1036 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 1037 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 1038
96838a40 1039 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4 1040 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 1041 goto err_eeprom;
1042 }
1043
1da177e4
LT		 1044 e1000_get_bus_info(&adapter->hw);
1045
1046 init_timer(&adapter->tx_fifo_stall_timer);
1047 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1048 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1049
1050 init_timer(&adapter->watchdog_timer);
1051 adapter->watchdog_timer.function = &e1000_watchdog;
1052 adapter->watchdog_timer.data = (unsigned long) adapter;
1053
1da177e4
LT		 1054 init_timer(&adapter->phy_info_timer);
1055 adapter->phy_info_timer.function = &e1000_update_phy_info;
1056 adapter->phy_info_timer.data = (unsigned long) adapter;
1057
65f27f38 1058 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1059
1da177e4
LT		 1060 e1000_check_options(adapter);
1061
1062 /* Initial Wake on LAN setting
1063 * If APM wake is enabled in the EEPROM,
1064 * enable the ACPI Magic Packet filter
1065 */
1066
96838a40 1067 switch (adapter->hw.mac_type) {
1da177e4
LT		 1068 case e1000_82542_rev2_0:
1069 case e1000_82542_rev2_1:
1070 case e1000_82543:
1071 break;
1072 case e1000_82544:
1073 e1000_read_eeprom(&adapter->hw,
1074 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1075 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1076 break;
cd94dd0b
AK		 1077 case e1000_ich8lan:
1078 e1000_read_eeprom(&adapter->hw,
1079 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1080 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1081 break;
1da177e4
LT		 1082 case e1000_82546:
1083 case e1000_82546_rev_3:
fd803241 1084 case e1000_82571:
6418ecc6 1085 case e1000_80003es2lan:
96838a40 1086 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 1087 e1000_read_eeprom(&adapter->hw,
1088 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1089 break;
1090 }
1091 /* Fall Through */
1092 default:
1093 e1000_read_eeprom(&adapter->hw,
1094 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1095 break;
1096 }
96838a40 1097 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1098 adapter->eeprom_wol |= E1000_WUFC_MAG;
1099
1100 /* now that we have the eeprom settings, apply the special cases
1101 * where the eeprom may be wrong or the board simply won't support
1102 * wake on lan on a particular port */
1103 switch (pdev->device) {
1104 case E1000_DEV_ID_82546GB_PCIE:
1105 adapter->eeprom_wol = 0;
1106 break;
1107 case E1000_DEV_ID_82546EB_FIBER:
1108 case E1000_DEV_ID_82546GB_FIBER:
1109 case E1000_DEV_ID_82571EB_FIBER:
1110 /* Wake events only supported on port A for dual fiber
1111 * regardless of eeprom setting */
1112 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1113 adapter->eeprom_wol = 0;
1114 break;
1115 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 1116 case E1000_DEV_ID_82571EB_QUAD_COPPER:
fc2307d0 1117 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
120cd576
JB		 1118 /* if quad port adapter, disable WoL on all but port A */
1119 if (global_quad_port_a != 0)
1120 adapter->eeprom_wol = 0;
1121 else
1122 adapter->quad_port_a = 1;
1123 /* Reset for multiple quad port adapters */
1124 if (++global_quad_port_a == 4)
1125 global_quad_port_a = 0;
1126 break;
1127 }
1128
1129 /* initialize the wol settings based on the eeprom settings */
1130 adapter->wol = adapter->eeprom_wol;
1da177e4 1131
fb3d47d4
JK		 1132 /* print bus type/speed/width info */
1133 {
1134 struct e1000_hw *hw = &adapter->hw;
1135 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1136 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1137 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1138 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1139 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1140 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1141 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1142 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1143 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1144 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1145 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1146 "32-bit"));
1147 }
1148
1149 for (i = 0; i < 6; i++)
1150 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1151
1da177e4
LT		 1152 /* reset the hardware with the new settings */
1153 e1000_reset(adapter);
1154
b55ccb35
JK		 1155 /* If the controller is 82573 and f/w is AMT, do not set
1156 * DRV_LOAD until the interface is up. For all other cases,
1157 * let the f/w know that the h/w is now under the control
1158 * of the driver. */
1159 if (adapter->hw.mac_type != e1000_82573 ||
1160 !e1000_check_mng_mode(&adapter->hw))
1161 e1000_get_hw_control(adapter);
2d7edb92 1162
1da177e4 1163 strcpy(netdev->name, "eth%d");
96838a40 1164 if ((err = register_netdev(netdev)))
1da177e4
LT		 1165 goto err_register;
1166
1314bbf3
AK		 1167 /* tell the stack to leave us alone until e1000_open() is called */
1168 netif_carrier_off(netdev);
1169 netif_stop_queue(netdev);
1170
1da177e4
LT		 1171 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1172
1173 cards_found++;
1174 return 0;
1175
1176err_register:
6dd62ab0
VA		 1177 e1000_release_hw_control(adapter);
1178err_eeprom:
1179 if (!e1000_check_phy_reset_block(&adapter->hw))
1180 e1000_phy_hw_reset(&adapter->hw);
1181
cd94dd0b
AK		 1182 if (adapter->hw.flash_address)
1183 iounmap(adapter->hw.flash_address);
1184err_flashmap:
6dd62ab0
VA		 1185#ifdef CONFIG_E1000_NAPI
1186 for (i = 0; i < adapter->num_rx_queues; i++)
1187 dev_put(&adapter->polling_netdev[i]);
1188#endif
1189
1190 kfree(adapter->tx_ring);
1191 kfree(adapter->rx_ring);
1192#ifdef CONFIG_E1000_NAPI
1193 kfree(adapter->polling_netdev);
1194#endif
1da177e4 1195err_sw_init:
1da177e4
LT		 1196 iounmap(adapter->hw.hw_addr);
1197err_ioremap:
1198 free_netdev(netdev);
1199err_alloc_etherdev:
1200 pci_release_regions(pdev);
6dd62ab0
VA		 1201err_pci_reg:
1202err_dma:
1203 pci_disable_device(pdev);
1da177e4
LT		 1204 return err;
1205}
1206
1207/**
1208 * e1000_remove - Device Removal Routine
1209 * @pdev: PCI device information struct
1210 *
1211 * e1000_remove is called by the PCI subsystem to alert the driver
1212 * that it should release a PCI device. The could be caused by a
1213 * Hot-Plug event, or because the driver is going to be removed from
1214 * memory.
1215 **/
1216
1217static void __devexit
1218e1000_remove(struct pci_dev *pdev)
1219{
1220 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1221 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e
MC		 1222#ifdef CONFIG_E1000_NAPI
1223 int i;
1224#endif
1da177e4 1225
be2b28ed
JG		 1226 flush_scheduled_work();
1227
0fccd0e9 1228 e1000_release_manageability(adapter);
1da177e4 1229
b55ccb35
JK		 1230 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1231 * would have already happened in close and is redundant. */
1232 e1000_release_hw_control(adapter);
2d7edb92 1233
1da177e4 1234 unregister_netdev(netdev);
581d708e 1235#ifdef CONFIG_E1000_NAPI
f56799ea 1236 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1237 dev_put(&adapter->polling_netdev[i]);
581d708e 1238#endif
1da177e4 1239
96838a40 1240 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 1241 e1000_phy_hw_reset(&adapter->hw);
1da177e4 1242
24025e4e
MC		 1243 kfree(adapter->tx_ring);
1244 kfree(adapter->rx_ring);
1245#ifdef CONFIG_E1000_NAPI
1246 kfree(adapter->polling_netdev);
1247#endif
1248
1da177e4 1249 iounmap(adapter->hw.hw_addr);
cd94dd0b
AK		 1250 if (adapter->hw.flash_address)
1251 iounmap(adapter->hw.flash_address);
1da177e4
LT		 1252 pci_release_regions(pdev);
1253
1254 free_netdev(netdev);
1255
1256 pci_disable_device(pdev);
1257}
1258
1259/**
1260 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1261 * @adapter: board private structure to initialize
1262 *
1263 * e1000_sw_init initializes the Adapter private data structure.
1264 * Fields are initialized based on PCI device information and
1265 * OS network device settings (MTU size).
1266 **/
1267
1268static int __devinit
1269e1000_sw_init(struct e1000_adapter *adapter)
1270{
1271 struct e1000_hw *hw = &adapter->hw;
1272 struct net_device *netdev = adapter->netdev;
1273 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1274#ifdef CONFIG_E1000_NAPI
1275 int i;
1276#endif
1da177e4
LT		 1277
1278 /* PCI config space info */
1279
1280 hw->vendor_id = pdev->vendor;
1281 hw->device_id = pdev->device;
1282 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1283 hw->subsystem_id = pdev->subsystem_device;
1284
1285 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1286
1287 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1288
eb0f8054 1289 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
9e2feace 1290 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1291 hw->max_frame_size = netdev->mtu +
1292 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1293 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1294
1295 /* identify the MAC */
1296
96838a40 1297 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1298 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1299 return -EIO;
1300 }
1301
96838a40 1302 switch (hw->mac_type) {
1da177e4
LT		 1303 default:
1304 break;
1305 case e1000_82541:
1306 case e1000_82547:
1307 case e1000_82541_rev_2:
1308 case e1000_82547_rev_2:
1309 hw->phy_init_script = 1;
1310 break;
1311 }
1312
1313 e1000_set_media_type(hw);
1314
1315 hw->wait_autoneg_complete = FALSE;
1316 hw->tbi_compatibility_en = TRUE;
1317 hw->adaptive_ifs = TRUE;
1318
1319 /* Copper options */
1320
96838a40 1321 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1322 hw->mdix = AUTO_ALL_MODES;
1323 hw->disable_polarity_correction = FALSE;
1324 hw->master_slave = E1000_MASTER_SLAVE;
1325 }
1326
f56799ea
JK		 1327 adapter->num_tx_queues = 1;
1328 adapter->num_rx_queues = 1;
581d708e
MC		 1329
1330 if (e1000_alloc_queues(adapter)) {
1331 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1332 return -ENOMEM;
1333 }
1334
1335#ifdef CONFIG_E1000_NAPI
f56799ea 1336 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1337 adapter->polling_netdev[i].priv = adapter;
1338 adapter->polling_netdev[i].poll = &e1000_clean;
1339 adapter->polling_netdev[i].weight = 64;
1340 dev_hold(&adapter->polling_netdev[i]);
1341 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1342 }
7bfa4816 1343 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1344#endif
1345
1da177e4
LT		 1346 atomic_set(&adapter->irq_sem, 1);
1347 spin_lock_init(&adapter->stats_lock);
1da177e4 1348
1314bbf3
AK		 1349 set_bit(__E1000_DOWN, &adapter->flags);
1350
1da177e4
LT		 1351 return 0;
1352}
1353
581d708e
MC		 1354/**
1355 * e1000_alloc_queues - Allocate memory for all rings
1356 * @adapter: board private structure to initialize
1357 *
1358 * We allocate one ring per queue at run-time since we don't know the
1359 * number of queues at compile-time. The polling_netdev array is
1360 * intended for Multiqueue, but should work fine with a single queue.
1361 **/
1362
1363static int __devinit
1364e1000_alloc_queues(struct e1000_adapter *adapter)
1365{
1366 int size;
1367
f56799ea 1368 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1369 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1370 if (!adapter->tx_ring)
1371 return -ENOMEM;
1372 memset(adapter->tx_ring, 0, size);
1373
f56799ea 1374 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1375 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1376 if (!adapter->rx_ring) {
1377 kfree(adapter->tx_ring);
1378 return -ENOMEM;
1379 }
1380 memset(adapter->rx_ring, 0, size);
1381
1382#ifdef CONFIG_E1000_NAPI
f56799ea 1383 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1384 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1385 if (!adapter->polling_netdev) {
1386 kfree(adapter->tx_ring);
1387 kfree(adapter->rx_ring);
1388 return -ENOMEM;
1389 }
1390 memset(adapter->polling_netdev, 0, size);
1391#endif
1392
1393 return E1000_SUCCESS;
1394}
1395
1da177e4
LT		 1396/**
1397 * e1000_open - Called when a network interface is made active
1398 * @netdev: network interface device structure
1399 *
1400 * Returns 0 on success, negative value on failure
1401 *
1402 * The open entry point is called when a network interface is made
1403 * active by the system (IFF_UP). At this point all resources needed
1404 * for transmit and receive operations are allocated, the interrupt
1405 * handler is registered with the OS, the watchdog timer is started,
1406 * and the stack is notified that the interface is ready.
1407 **/
1408
1409static int
1410e1000_open(struct net_device *netdev)
1411{
60490fe0 1412 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1413 int err;
1414
2db10a08 1415 /* disallow open during test */
1314bbf3 1416 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1417 return -EBUSY;
1418
1da177e4 1419 /* allocate transmit descriptors */
e0aac5a2
AK		 1420 err = e1000_setup_all_tx_resources(adapter);
1421 if (err)
1da177e4
LT		 1422 goto err_setup_tx;
1423
1424 /* allocate receive descriptors */
e0aac5a2 1425 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1426 if (err)
e0aac5a2 1427 goto err_setup_rx;
b5bf28cd 1428
79f05bf0
AK		 1429 e1000_power_up_phy(adapter);
1430
2d7edb92 1431 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1432 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1433 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1434 e1000_update_mng_vlan(adapter);
1435 }
1da177e4 1436
b55ccb35
JK		 1437 /* If AMT is enabled, let the firmware know that the network
1438 * interface is now open */
1439 if (adapter->hw.mac_type == e1000_82573 &&
1440 e1000_check_mng_mode(&adapter->hw))
1441 e1000_get_hw_control(adapter);
1442
e0aac5a2
AK		 1443 /* before we allocate an interrupt, we must be ready to handle it.
1444 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1445 * as soon as we call pci_request_irq, so we have to setup our
1446 * clean_rx handler before we do so. */
1447 e1000_configure(adapter);
1448
1449 err = e1000_request_irq(adapter);
1450 if (err)
1451 goto err_req_irq;
1452
1453 /* From here on the code is the same as e1000_up() */
1454 clear_bit(__E1000_DOWN, &adapter->flags);
1455
1456#ifdef CONFIG_E1000_NAPI
1457 netif_poll_enable(netdev);
1458#endif
1459
1460 e1000_irq_enable(adapter);
1461
1462 /* fire a link status change interrupt to start the watchdog */
1463 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1464
1da177e4
LT		 1465 return E1000_SUCCESS;
1466
b5bf28cd 1467err_req_irq:
e0aac5a2
AK		 1468 e1000_release_hw_control(adapter);
1469 e1000_power_down_phy(adapter);
581d708e 1470 e1000_free_all_rx_resources(adapter);
1da177e4 1471err_setup_rx:
581d708e 1472 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1473err_setup_tx:
1474 e1000_reset(adapter);
1475
1476 return err;
1477}
1478
1479/**
1480 * e1000_close - Disables a network interface
1481 * @netdev: network interface device structure
1482 *
1483 * Returns 0, this is not allowed to fail
1484 *
1485 * The close entry point is called when an interface is de-activated
1486 * by the OS. The hardware is still under the drivers control, but
1487 * needs to be disabled. A global MAC reset is issued to stop the
1488 * hardware, and all transmit and receive resources are freed.
1489 **/
1490
1491static int
1492e1000_close(struct net_device *netdev)
1493{
60490fe0 1494 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1495
2db10a08 1496 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1497 e1000_down(adapter);
79f05bf0 1498 e1000_power_down_phy(adapter);
2db10a08 1499 e1000_free_irq(adapter);
1da177e4 1500
581d708e
MC		 1501 e1000_free_all_tx_resources(adapter);
1502 e1000_free_all_rx_resources(adapter);
1da177e4 1503
4666560a
BA		 1504 /* kill manageability vlan ID if supported, but not if a vlan with
1505 * the same ID is registered on the host OS (let 8021q kill it) */
96838a40 1506 if ((adapter->hw.mng_cookie.status &
4666560a
BA		 1507 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1508 !(adapter->vlgrp &&
5c15bdec 1509 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1510 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1511 }
b55ccb35
JK		 1512
1513 /* If AMT is enabled, let the firmware know that the network
1514 * interface is now closed */
1515 if (adapter->hw.mac_type == e1000_82573 &&
1516 e1000_check_mng_mode(&adapter->hw))
1517 e1000_release_hw_control(adapter);
1518
1da177e4
LT		 1519 return 0;
1520}
1521
1522/**
1523 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1524 * @adapter: address of board private structure
2d7edb92
MC		 1525 * @start: address of beginning of memory
1526 * @len: length of memory
1da177e4 1527 **/
e619d523 1528static boolean_t
1da177e4
LT		 1529e1000_check_64k_bound(struct e1000_adapter *adapter,
1530 void *start, unsigned long len)
1531{
1532 unsigned long begin = (unsigned long) start;
1533 unsigned long end = begin + len;
1534
2648345f
MC		 1535 /* First rev 82545 and 82546 need to not allow any memory
1536 * write location to cross 64k boundary due to errata 23 */
1da177e4 1537 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1538 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1539 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1540 }
1541
1542 return TRUE;
1543}
1544
1545/**
1546 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1547 * @adapter: board private structure
581d708e 1548 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1549 *
1550 * Return 0 on success, negative on failure
1551 **/
1552
3ad2cc67 1553static int
581d708e
MC		 1554e1000_setup_tx_resources(struct e1000_adapter *adapter,
1555 struct e1000_tx_ring *txdr)
1da177e4 1556{
1da177e4
LT		 1557 struct pci_dev *pdev = adapter->pdev;
1558 int size;
1559
1560 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1561 txdr->buffer_info = vmalloc(size);
96838a40 1562 if (!txdr->buffer_info) {
2648345f
MC		 1563 DPRINTK(PROBE, ERR,
1564 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1565 return -ENOMEM;
1566 }
1567 memset(txdr->buffer_info, 0, size);
1568
1569 /* round up to nearest 4K */
1570
1571 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1572 E1000_ROUNDUP(txdr->size, 4096);
1573
1574 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1575 if (!txdr->desc) {
1da177e4 1576setup_tx_desc_die:
1da177e4 1577 vfree(txdr->buffer_info);
2648345f
MC		 1578 DPRINTK(PROBE, ERR,
1579 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1580 return -ENOMEM;
1581 }
1582
2648345f 1583 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1584 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1585 void *olddesc = txdr->desc;
1586 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1587 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1588 "at %p\n", txdr->size, txdr->desc);
1589 /* Try again, without freeing the previous */
1da177e4 1590 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1591 /* Failed allocation, critical failure */
96838a40 1592 if (!txdr->desc) {
1da177e4
LT		 1593 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1594 goto setup_tx_desc_die;
1595 }
1596
1597 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1598 /* give up */
2648345f
MC		 1599 pci_free_consistent(pdev, txdr->size, txdr->desc,
1600 txdr->dma);
1da177e4
LT		 1601 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1602 DPRINTK(PROBE, ERR,
2648345f
MC		 1603 "Unable to allocate aligned memory "
1604 "for the transmit descriptor ring\n");
1da177e4
LT		 1605 vfree(txdr->buffer_info);
1606 return -ENOMEM;
1607 } else {
2648345f 1608 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1609 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1610 }
1611 }
1612 memset(txdr->desc, 0, txdr->size);
1613
1614 txdr->next_to_use = 0;
1615 txdr->next_to_clean = 0;
2ae76d98 1616 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1617
1618 return 0;
1619}
1620
581d708e
MC		 1621/**
1622 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1623 * (Descriptors) for all queues
1624 * @adapter: board private structure
1625 *
581d708e
MC		 1626 * Return 0 on success, negative on failure
1627 **/
1628
1629int
1630e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1631{
1632 int i, err = 0;
1633
f56799ea 1634 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1635 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1636 if (err) {
1637 DPRINTK(PROBE, ERR,
1638 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1639 for (i-- ; i >= 0; i--)
1640 e1000_free_tx_resources(adapter,
1641 &adapter->tx_ring[i]);
581d708e
MC		 1642 break;
1643 }
1644 }
1645
1646 return err;
1647}
1648
1da177e4
LT		 1649/**
1650 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1651 * @adapter: board private structure
1652 *
1653 * Configure the Tx unit of the MAC after a reset.
1654 **/
1655
1656static void
1657e1000_configure_tx(struct e1000_adapter *adapter)
1658{
581d708e
MC		 1659 uint64_t tdba;
1660 struct e1000_hw *hw = &adapter->hw;
1661 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1662 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1663
1664 /* Setup the HW Tx Head and Tail descriptor pointers */
1665
f56799ea 1666 switch (adapter->num_tx_queues) {
24025e4e
MC		 1667 case 1:
1668 default:
581d708e
MC		 1669 tdba = adapter->tx_ring[0].dma;
1670 tdlen = adapter->tx_ring[0].count *
1671 sizeof(struct e1000_tx_desc);
581d708e 1672 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1673 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1674 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1675 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1676 E1000_WRITE_REG(hw, TDH, 0);
6a951698
AK		 1677 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1678 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1679 break;
1680 }
1da177e4
LT		 1681
1682 /* Set the default values for the Tx Inter Packet Gap timer */
d89b6c67
JB		 1683 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1684 (hw->media_type == e1000_media_type_fiber ||
1685 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1686 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1687 else
1688 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1689
581d708e 1690 switch (hw->mac_type) {
1da177e4
LT		 1691 case e1000_82542_rev2_0:
1692 case e1000_82542_rev2_1:
1693 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1694 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1695 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1696 break;
87041639
JK		 1697 case e1000_80003es2lan:
1698 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1699 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1700 break;
1da177e4 1701 default:
0fadb059
JK		 1702 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1703 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1704 break;
1da177e4 1705 }
0fadb059
JK		 1706 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1707 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1708 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1709
1710 /* Set the Tx Interrupt Delay register */
1711
581d708e
MC		 1712 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1713 if (hw->mac_type >= e1000_82540)
1714 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1715
1716 /* Program the Transmit Control Register */
1717
581d708e 1718 tctl = E1000_READ_REG(hw, TCTL);
1da177e4 1719 tctl &= ~E1000_TCTL_CT;
7e6c9861 1720 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1721 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1722
2ae76d98
MC		 1723 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1724 tarc = E1000_READ_REG(hw, TARC0);
90fb5135
AK		 1725 /* set the speed mode bit, we'll clear it if we're not at
1726 * gigabit link later */
09ae3e88 1727 tarc |= (1 << 21);
2ae76d98 1728 E1000_WRITE_REG(hw, TARC0, tarc);
87041639
JK		 1729 } else if (hw->mac_type == e1000_80003es2lan) {
1730 tarc = E1000_READ_REG(hw, TARC0);
1731 tarc |= 1;
87041639
JK		 1732 E1000_WRITE_REG(hw, TARC0, tarc);
1733 tarc = E1000_READ_REG(hw, TARC1);
1734 tarc |= 1;
1735 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1736 }
1737
581d708e 1738 e1000_config_collision_dist(hw);
1da177e4
LT		 1739
1740 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1741 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1742
1743 /* only set IDE if we are delaying interrupts using the timers */
1744 if (adapter->tx_int_delay)
1745 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1746
581d708e 1747 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1748 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1749 else
1750 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1751
1752 /* Cache if we're 82544 running in PCI-X because we'll
1753 * need this to apply a workaround later in the send path. */
581d708e
MC		 1754 if (hw->mac_type == e1000_82544 &&
1755 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1756 adapter->pcix_82544 = 1;
7e6c9861
JK		 1757
1758 E1000_WRITE_REG(hw, TCTL, tctl);
1759
1da177e4
LT		 1760}
1761
1762/**
1763 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1764 * @adapter: board private structure
581d708e 1765 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1766 *
1767 * Returns 0 on success, negative on failure
1768 **/
1769
3ad2cc67 1770static int
581d708e
MC		 1771e1000_setup_rx_resources(struct e1000_adapter *adapter,
1772 struct e1000_rx_ring *rxdr)
1da177e4 1773{
1da177e4 1774 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1775 int size, desc_len;
1da177e4
LT		 1776
1777 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1778 rxdr->buffer_info = vmalloc(size);
581d708e 1779 if (!rxdr->buffer_info) {
2648345f
MC		 1780 DPRINTK(PROBE, ERR,
1781 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1782 return -ENOMEM;
1783 }
1784 memset(rxdr->buffer_info, 0, size);
1785
2d7edb92
MC		 1786 size = sizeof(struct e1000_ps_page) * rxdr->count;
1787 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1788 if (!rxdr->ps_page) {
2d7edb92
MC		 1789 vfree(rxdr->buffer_info);
1790 DPRINTK(PROBE, ERR,
1791 "Unable to allocate memory for the receive descriptor ring\n");
1792 return -ENOMEM;
1793 }
1794 memset(rxdr->ps_page, 0, size);
1795
1796 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1797 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1798 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1799 vfree(rxdr->buffer_info);
1800 kfree(rxdr->ps_page);
1801 DPRINTK(PROBE, ERR,
1802 "Unable to allocate memory for the receive descriptor ring\n");
1803 return -ENOMEM;
1804 }
1805 memset(rxdr->ps_page_dma, 0, size);
1806
96838a40 1807 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1808 desc_len = sizeof(struct e1000_rx_desc);
1809 else
1810 desc_len = sizeof(union e1000_rx_desc_packet_split);
1811
1da177e4
LT		 1812 /* Round up to nearest 4K */
1813
2d7edb92 1814 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1815 E1000_ROUNDUP(rxdr->size, 4096);
1816
1817 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1818
581d708e
MC		 1819 if (!rxdr->desc) {
1820 DPRINTK(PROBE, ERR,
1821 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1822setup_rx_desc_die:
1da177e4 1823 vfree(rxdr->buffer_info);
2d7edb92
MC		 1824 kfree(rxdr->ps_page);
1825 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1826 return -ENOMEM;
1827 }
1828
2648345f 1829 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1830 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1831 void *olddesc = rxdr->desc;
1832 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1833 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1834 "at %p\n", rxdr->size, rxdr->desc);
1835 /* Try again, without freeing the previous */
1da177e4 1836 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1837 /* Failed allocation, critical failure */
581d708e 1838 if (!rxdr->desc) {
1da177e4 1839 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1840 DPRINTK(PROBE, ERR,
1841 "Unable to allocate memory "
1842 "for the receive descriptor ring\n");
1da177e4
LT		 1843 goto setup_rx_desc_die;
1844 }
1845
1846 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1847 /* give up */
2648345f
MC		 1848 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1849 rxdr->dma);
1da177e4 1850 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1851 DPRINTK(PROBE, ERR,
1852 "Unable to allocate aligned memory "
1853 "for the receive descriptor ring\n");
581d708e 1854 goto setup_rx_desc_die;
1da177e4 1855 } else {
2648345f 1856 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1857 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1858 }
1859 }
1860 memset(rxdr->desc, 0, rxdr->size);
1861
1862 rxdr->next_to_clean = 0;
1863 rxdr->next_to_use = 0;
1864
1865 return 0;
1866}
1867
581d708e
MC		 1868/**
1869 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1870 * (Descriptors) for all queues
1871 * @adapter: board private structure
1872 *
581d708e
MC		 1873 * Return 0 on success, negative on failure
1874 **/
1875
1876int
1877e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1878{
1879 int i, err = 0;
1880
f56799ea 1881 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1882 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1883 if (err) {
1884 DPRINTK(PROBE, ERR,
1885 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1886 for (i-- ; i >= 0; i--)
1887 e1000_free_rx_resources(adapter,
1888 &adapter->rx_ring[i]);
581d708e
MC		 1889 break;
1890 }
1891 }
1892
1893 return err;
1894}
1895
1da177e4 1896/**
2648345f 1897 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1898 * @adapter: Board private structure
1899 **/
e4c811c9
MC		 1900#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1901 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1902static void
1903e1000_setup_rctl(struct e1000_adapter *adapter)
1904{
2d7edb92
MC		 1905 uint32_t rctl, rfctl;
1906 uint32_t psrctl = 0;
35ec56bb 1907#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1908 uint32_t pages = 0;
1909#endif
1da177e4
LT		 1910
1911 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1912
1913 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1914
1915 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1916 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1917 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1918
0fadb059 1919 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1920 rctl |= E1000_RCTL_SBP;
1921 else
1922 rctl &= ~E1000_RCTL_SBP;
1923
2d7edb92
MC		 1924 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1925 rctl &= ~E1000_RCTL_LPE;
1926 else
1927 rctl |= E1000_RCTL_LPE;
1928
1da177e4 1929 /* Setup buffer sizes */
9e2feace
AK		 1930 rctl &= ~E1000_RCTL_SZ_4096;
1931 rctl |= E1000_RCTL_BSEX;
1932 switch (adapter->rx_buffer_len) {
1933 case E1000_RXBUFFER_256:
1934 rctl |= E1000_RCTL_SZ_256;
1935 rctl &= ~E1000_RCTL_BSEX;
1936 break;
1937 case E1000_RXBUFFER_512:
1938 rctl |= E1000_RCTL_SZ_512;
1939 rctl &= ~E1000_RCTL_BSEX;
1940 break;
1941 case E1000_RXBUFFER_1024:
1942 rctl |= E1000_RCTL_SZ_1024;
1943 rctl &= ~E1000_RCTL_BSEX;
1944 break;
a1415ee6
JK		 1945 case E1000_RXBUFFER_2048:
1946 default:
1947 rctl |= E1000_RCTL_SZ_2048;
1948 rctl &= ~E1000_RCTL_BSEX;
1949 break;
1950 case E1000_RXBUFFER_4096:
1951 rctl |= E1000_RCTL_SZ_4096;
1952 break;
1953 case E1000_RXBUFFER_8192:
1954 rctl |= E1000_RCTL_SZ_8192;
1955 break;
1956 case E1000_RXBUFFER_16384:
1957 rctl |= E1000_RCTL_SZ_16384;
1958 break;
2d7edb92
MC		 1959 }
1960
35ec56bb 1961#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1962 /* 82571 and greater support packet-split where the protocol
1963 * header is placed in skb->data and the packet data is
1964 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1965 * In the case of a non-split, skb->data is linearly filled,
1966 * followed by the page buffers. Therefore, skb->data is
1967 * sized to hold the largest protocol header.
1968 */
e64d7d02
JB		 1969 /* allocations using alloc_page take too long for regular MTU
1970 * so only enable packet split for jumbo frames */
e4c811c9 1971 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
e64d7d02
JB		 1972 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1973 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
e4c811c9
MC		 1974 adapter->rx_ps_pages = pages;
1975 else
1976 adapter->rx_ps_pages = 0;
2d7edb92 1977#endif
e4c811c9 1978 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1979 /* Configure extra packet-split registers */
1980 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1981 rfctl |= E1000_RFCTL_EXTEN;
87ca4e5b
AK		 1982 /* disable packet split support for IPv6 extension headers,
1983 * because some malformed IPv6 headers can hang the RX */
1984 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1985 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1986
2d7edb92
MC		 1987 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1988
7dfee0cb 1989 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1990
2d7edb92
MC		 1991 psrctl |= adapter->rx_ps_bsize0 >>
1992 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1993
1994 switch (adapter->rx_ps_pages) {
1995 case 3:
1996 psrctl |= PAGE_SIZE <<
1997 E1000_PSRCTL_BSIZE3_SHIFT;
1998 case 2:
1999 psrctl |= PAGE_SIZE <<
2000 E1000_PSRCTL_BSIZE2_SHIFT;
2001 case 1:
2002 psrctl |= PAGE_SIZE >>
2003 E1000_PSRCTL_BSIZE1_SHIFT;
2004 break;
2005 }
2d7edb92
MC		 2006
2007 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 2008 }
2009
2010 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2011}
2012
2013/**
2014 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
2015 * @adapter: board private structure
2016 *
2017 * Configure the Rx unit of the MAC after a reset.
2018 **/
2019
2020static void
2021e1000_configure_rx(struct e1000_adapter *adapter)
2022{
581d708e
MC		 2023 uint64_t rdba;
2024 struct e1000_hw *hw = &adapter->hw;
2025 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 2026
e4c811c9 2027 if (adapter->rx_ps_pages) {
0f15a8fa 2028 /* this is a 32 byte descriptor */
581d708e 2029 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 2030 sizeof(union e1000_rx_desc_packet_split);
2031 adapter->clean_rx = e1000_clean_rx_irq_ps;
2032 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2033 } else {
581d708e
MC		 2034 rdlen = adapter->rx_ring[0].count *
2035 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 2036 adapter->clean_rx = e1000_clean_rx_irq;
2037 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2038 }
1da177e4
LT		 2039
2040 /* disable receives while setting up the descriptors */
581d708e
MC		 2041 rctl = E1000_READ_REG(hw, RCTL);
2042 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 2043
2044 /* set the Receive Delay Timer Register */
581d708e 2045 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 2046
581d708e
MC		 2047 if (hw->mac_type >= e1000_82540) {
2048 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
835bb129 2049 if (adapter->itr_setting != 0)
581d708e 2050 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 2051 1000000000 / (adapter->itr * 256));
2052 }
2053
2ae76d98 2054 if (hw->mac_type >= e1000_82571) {
2ae76d98 2055 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 2056 /* Reset delay timers after every interrupt */
6fc7a7ec 2057 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9 2058#ifdef CONFIG_E1000_NAPI
835bb129 2059 /* Auto-Mask interrupts upon ICR access */
1e613fd9 2060 ctrl_ext |= E1000_CTRL_EXT_IAME;
835bb129 2061 E1000_WRITE_REG(hw, IAM, 0xffffffff);
1e613fd9 2062#endif
2ae76d98
MC		 2063 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2064 E1000_WRITE_FLUSH(hw);
2065 }
2066
581d708e
MC		 2067 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2068 * the Base and Length of the Rx Descriptor Ring */
f56799ea 2069 switch (adapter->num_rx_queues) {
24025e4e
MC		 2070 case 1:
2071 default:
581d708e 2072 rdba = adapter->rx_ring[0].dma;
581d708e 2073 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 2074 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2075 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 2076 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 2077 E1000_WRITE_REG(hw, RDH, 0);
6a951698
AK		 2078 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2079 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 2080 break;
24025e4e
MC		 2081 }
2082
1da177e4 2083 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 2084 if (hw->mac_type >= e1000_82543) {
2085 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 2086 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 2087 rxcsum |= E1000_RXCSUM_TUOFL;
2088
868d5309 2089 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 2090 * Must be used in conjunction with packet-split. */
96838a40
JB		 2091 if ((hw->mac_type >= e1000_82571) &&
2092 (adapter->rx_ps_pages)) {
2d7edb92
MC		 2093 rxcsum |= E1000_RXCSUM_IPPCSE;
2094 }
2095 } else {
2096 rxcsum &= ~E1000_RXCSUM_TUOFL;
2097 /* don't need to clear IPPCSE as it defaults to 0 */
2098 }
581d708e 2099 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 2100 }
2101
21c4d5e0
AK		 2102 /* enable early receives on 82573, only takes effect if using > 2048
2103 * byte total frame size. for example only for jumbo frames */
2104#define E1000_ERT_2048 0x100
2105 if (hw->mac_type == e1000_82573)
2106 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2107
1da177e4 2108 /* Enable Receives */
581d708e 2109 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 2110}
2111
2112/**
581d708e 2113 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 2114 * @adapter: board private structure
581d708e 2115 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 2116 *
2117 * Free all transmit software resources
2118 **/
2119
3ad2cc67 2120static void
581d708e
MC		 2121e1000_free_tx_resources(struct e1000_adapter *adapter,
2122 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 2123{
2124 struct pci_dev *pdev = adapter->pdev;
2125
581d708e 2126 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 2127
581d708e
MC		 2128 vfree(tx_ring->buffer_info);
2129 tx_ring->buffer_info = NULL;
1da177e4 2130
581d708e 2131 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 2132
581d708e
MC		 2133 tx_ring->desc = NULL;
2134}
2135
2136/**
2137 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2138 * @adapter: board private structure
2139 *
2140 * Free all transmit software resources
2141 **/
2142
2143void
2144e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2145{
2146 int i;
2147
f56799ea 2148 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2149 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2150}
2151
e619d523 2152static void
1da177e4
LT		 2153e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2154 struct e1000_buffer *buffer_info)
2155{
96838a40 2156 if (buffer_info->dma) {
2648345f
MC		 2157 pci_unmap_page(adapter->pdev,
2158 buffer_info->dma,
2159 buffer_info->length,
2160 PCI_DMA_TODEVICE);
a9ebadd6 2161 buffer_info->dma = 0;
1da177e4 2162 }
a9ebadd6 2163 if (buffer_info->skb) {
1da177e4 2164 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 2165 buffer_info->skb = NULL;
2166 }
2167 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 2168}
2169
2170/**
2171 * e1000_clean_tx_ring - Free Tx Buffers
2172 * @adapter: board private structure
581d708e 2173 * @tx_ring: ring to be cleaned
1da177e4
LT		 2174 **/
2175
2176static void
581d708e
MC		 2177e1000_clean_tx_ring(struct e1000_adapter *adapter,
2178 struct e1000_tx_ring *tx_ring)
1da177e4 2179{
1da177e4
LT		 2180 struct e1000_buffer *buffer_info;
2181 unsigned long size;
2182 unsigned int i;
2183
2184 /* Free all the Tx ring sk_buffs */
2185
96838a40 2186 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2187 buffer_info = &tx_ring->buffer_info[i];
2188 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2189 }
2190
2191 size = sizeof(struct e1000_buffer) * tx_ring->count;
2192 memset(tx_ring->buffer_info, 0, size);
2193
2194 /* Zero out the descriptor ring */
2195
2196 memset(tx_ring->desc, 0, tx_ring->size);
2197
2198 tx_ring->next_to_use = 0;
2199 tx_ring->next_to_clean = 0;
fd803241 2200 tx_ring->last_tx_tso = 0;
1da177e4 2201
581d708e
MC		 2202 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2203 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2204}
2205
2206/**
2207 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2208 * @adapter: board private structure
2209 **/
2210
2211static void
2212e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2213{
2214 int i;
2215
f56799ea 2216 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2217 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2218}
2219
2220/**
2221 * e1000_free_rx_resources - Free Rx Resources
2222 * @adapter: board private structure
581d708e 2223 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2224 *
2225 * Free all receive software resources
2226 **/
2227
3ad2cc67 2228static void
581d708e
MC		 2229e1000_free_rx_resources(struct e1000_adapter *adapter,
2230 struct e1000_rx_ring *rx_ring)
1da177e4 2231{
1da177e4
LT		 2232 struct pci_dev *pdev = adapter->pdev;
2233
581d708e 2234 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2235
2236 vfree(rx_ring->buffer_info);
2237 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2238 kfree(rx_ring->ps_page);
2239 rx_ring->ps_page = NULL;
2240 kfree(rx_ring->ps_page_dma);
2241 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2242
2243 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2244
2245 rx_ring->desc = NULL;
2246}
2247
2248/**
581d708e 2249 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2250 * @adapter: board private structure
581d708e
MC		 2251 *
2252 * Free all receive software resources
2253 **/
2254
2255void
2256e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2257{
2258 int i;
2259
f56799ea 2260 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2261 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2262}
2263
2264/**
2265 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2266 * @adapter: board private structure
2267 * @rx_ring: ring to free buffers from
1da177e4
LT		 2268 **/
2269
2270static void
581d708e
MC		 2271e1000_clean_rx_ring(struct e1000_adapter *adapter,
2272 struct e1000_rx_ring *rx_ring)
1da177e4 2273{
1da177e4 2274 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2275 struct e1000_ps_page *ps_page;
2276 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2277 struct pci_dev *pdev = adapter->pdev;
2278 unsigned long size;
2d7edb92 2279 unsigned int i, j;
1da177e4
LT		 2280
2281 /* Free all the Rx ring sk_buffs */
96838a40 2282 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2283 buffer_info = &rx_ring->buffer_info[i];
96838a40 2284 if (buffer_info->skb) {
1da177e4
LT		 2285 pci_unmap_single(pdev,
2286 buffer_info->dma,
2287 buffer_info->length,
2288 PCI_DMA_FROMDEVICE);
2289
2290 dev_kfree_skb(buffer_info->skb);
2291 buffer_info->skb = NULL;
997f5cbd
JK		 2292 }
2293 ps_page = &rx_ring->ps_page[i];
2294 ps_page_dma = &rx_ring->ps_page_dma[i];
2295 for (j = 0; j < adapter->rx_ps_pages; j++) {
2296 if (!ps_page->ps_page[j]) break;
2297 pci_unmap_page(pdev,
2298 ps_page_dma->ps_page_dma[j],
2299 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2300 ps_page_dma->ps_page_dma[j] = 0;
2301 put_page(ps_page->ps_page[j]);
2302 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2303 }
2304 }
2305
2306 size = sizeof(struct e1000_buffer) * rx_ring->count;
2307 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2308 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2309 memset(rx_ring->ps_page, 0, size);
2310 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2311 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2312
2313 /* Zero out the descriptor ring */
2314
2315 memset(rx_ring->desc, 0, rx_ring->size);
2316
2317 rx_ring->next_to_clean = 0;
2318 rx_ring->next_to_use = 0;
2319
581d708e
MC		 2320 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2321 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2322}
2323
2324/**
2325 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2326 * @adapter: board private structure
2327 **/
2328
2329static void
2330e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2331{
2332 int i;
2333
f56799ea 2334 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2335 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2336}
2337
2338/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2339 * and memory write and invalidate disabled for certain operations
2340 */
2341static void
2342e1000_enter_82542_rst(struct e1000_adapter *adapter)
2343{
2344 struct net_device *netdev = adapter->netdev;
2345 uint32_t rctl;
2346
2347 e1000_pci_clear_mwi(&adapter->hw);
2348
2349 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2350 rctl |= E1000_RCTL_RST;
2351 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2352 E1000_WRITE_FLUSH(&adapter->hw);
2353 mdelay(5);
2354
96838a40 2355 if (netif_running(netdev))
581d708e 2356 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2357}
2358
2359static void
2360e1000_leave_82542_rst(struct e1000_adapter *adapter)
2361{
2362 struct net_device *netdev = adapter->netdev;
2363 uint32_t rctl;
2364
2365 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2366 rctl &= ~E1000_RCTL_RST;
2367 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2368 E1000_WRITE_FLUSH(&adapter->hw);
2369 mdelay(5);
2370
96838a40 2371 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2372 e1000_pci_set_mwi(&adapter->hw);
2373
96838a40 2374 if (netif_running(netdev)) {
72d64a43
JK		 2375 /* No need to loop, because 82542 supports only 1 queue */
2376 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2377 e1000_configure_rx(adapter);
72d64a43 2378 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2379 }
2380}
2381
2382/**
2383 * e1000_set_mac - Change the Ethernet Address of the NIC
2384 * @netdev: network interface device structure
2385 * @p: pointer to an address structure
2386 *
2387 * Returns 0 on success, negative on failure
2388 **/
2389
2390static int
2391e1000_set_mac(struct net_device *netdev, void *p)
2392{
60490fe0 2393 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2394 struct sockaddr *addr = p;
2395
96838a40 2396 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2397 return -EADDRNOTAVAIL;
2398
2399 /* 82542 2.0 needs to be in reset to write receive address registers */
2400
96838a40 2401 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2402 e1000_enter_82542_rst(adapter);
2403
2404 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2405 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2406
2407 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2408
868d5309
MC		 2409 /* With 82571 controllers, LAA may be overwritten (with the default)
2410 * due to controller reset from the other port. */
2411 if (adapter->hw.mac_type == e1000_82571) {
2412 /* activate the work around */
2413 adapter->hw.laa_is_present = 1;
2414
96838a40
JB		 2415 /* Hold a copy of the LAA in RAR[14] This is done so that
2416 * between the time RAR[0] gets clobbered and the time it
2417 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2418 * of the RARs and no incoming packets directed to this port
96838a40 2419 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2420 * RAR[14] */
96838a40 2421 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2422 E1000_RAR_ENTRIES - 1);
2423 }
2424
96838a40 2425 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2426 e1000_leave_82542_rst(adapter);
2427
2428 return 0;
2429}
2430
2431/**
2432 * e1000_set_multi - Multicast and Promiscuous mode set
2433 * @netdev: network interface device structure
2434 *
2435 * The set_multi entry point is called whenever the multicast address
2436 * list or the network interface flags are updated. This routine is
2437 * responsible for configuring the hardware for proper multicast,
2438 * promiscuous mode, and all-multi behavior.
2439 **/
2440
2441static void
2442e1000_set_multi(struct net_device *netdev)
2443{
60490fe0 2444 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2445 struct e1000_hw *hw = &adapter->hw;
2446 struct dev_mc_list *mc_ptr;
2447 uint32_t rctl;
2448 uint32_t hash_value;
868d5309 2449 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2450 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2451 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2452 E1000_NUM_MTA_REGISTERS;
2453
2454 if (adapter->hw.mac_type == e1000_ich8lan)
2455 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2456
868d5309
MC		 2457 /* reserve RAR[14] for LAA over-write work-around */
2458 if (adapter->hw.mac_type == e1000_82571)
2459 rar_entries--;
1da177e4 2460
2648345f
MC		 2461 /* Check for Promiscuous and All Multicast modes */
2462
1da177e4
LT		 2463 rctl = E1000_READ_REG(hw, RCTL);
2464
96838a40 2465 if (netdev->flags & IFF_PROMISC) {
1da177e4 2466 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2467 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2468 rctl |= E1000_RCTL_MPE;
2469 rctl &= ~E1000_RCTL_UPE;
2470 } else {
2471 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2472 }
2473
2474 E1000_WRITE_REG(hw, RCTL, rctl);
2475
2476 /* 82542 2.0 needs to be in reset to write receive address registers */
2477
96838a40 2478 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2479 e1000_enter_82542_rst(adapter);
2480
2481 /* load the first 14 multicast address into the exact filters 1-14
2482 * RAR 0 is used for the station MAC adddress
2483 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2484 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2485 */
2486 mc_ptr = netdev->mc_list;
2487
96838a40 2488 for (i = 1; i < rar_entries; i++) {
868d5309 2489 if (mc_ptr) {
1da177e4
LT		 2490 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2491 mc_ptr = mc_ptr->next;
2492 } else {
2493 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2494 E1000_WRITE_FLUSH(hw);
1da177e4 2495 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2496 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2497 }
2498 }
2499
2500 /* clear the old settings from the multicast hash table */
2501
cd94dd0b 2502 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2503 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2504 E1000_WRITE_FLUSH(hw);
2505 }
1da177e4
LT		 2506
2507 /* load any remaining addresses into the hash table */
2508
96838a40 2509 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2510 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2511 e1000_mta_set(hw, hash_value);
2512 }
2513
96838a40 2514 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2515 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2516}
2517
2518/* Need to wait a few seconds after link up to get diagnostic information from
2519 * the phy */
2520
2521static void
2522e1000_update_phy_info(unsigned long data)
2523{
2524 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2525 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2526}
2527
2528/**
2529 * e1000_82547_tx_fifo_stall - Timer Call-back
2530 * @data: pointer to adapter cast into an unsigned long
2531 **/
2532
2533static void
2534e1000_82547_tx_fifo_stall(unsigned long data)
2535{
2536 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2537 struct net_device *netdev = adapter->netdev;
2538 uint32_t tctl;
2539
96838a40
JB		 2540 if (atomic_read(&adapter->tx_fifo_stall)) {
2541 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2542 E1000_READ_REG(&adapter->hw, TDH)) &&
2543 (E1000_READ_REG(&adapter->hw, TDFT) ==
2544 E1000_READ_REG(&adapter->hw, TDFH)) &&
2545 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2546 E1000_READ_REG(&adapter->hw, TDFHS))) {
2547 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2548 E1000_WRITE_REG(&adapter->hw, TCTL,
2549 tctl & ~E1000_TCTL_EN);
2550 E1000_WRITE_REG(&adapter->hw, TDFT,
2551 adapter->tx_head_addr);
2552 E1000_WRITE_REG(&adapter->hw, TDFH,
2553 adapter->tx_head_addr);
2554 E1000_WRITE_REG(&adapter->hw, TDFTS,
2555 adapter->tx_head_addr);
2556 E1000_WRITE_REG(&adapter->hw, TDFHS,
2557 adapter->tx_head_addr);
2558 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2559 E1000_WRITE_FLUSH(&adapter->hw);
2560
2561 adapter->tx_fifo_head = 0;
2562 atomic_set(&adapter->tx_fifo_stall, 0);
2563 netif_wake_queue(netdev);
2564 } else {
2565 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2566 }
2567 }
2568}
2569
2570/**
2571 * e1000_watchdog - Timer Call-back
2572 * @data: pointer to adapter cast into an unsigned long
2573 **/
2574static void
2575e1000_watchdog(unsigned long data)
2576{
2577 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2578 struct net_device *netdev = adapter->netdev;
545c67c0 2579 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2580 uint32_t link, tctl;
cd94dd0b
AK		 2581 int32_t ret_val;
2582
2583 ret_val = e1000_check_for_link(&adapter->hw);
2584 if ((ret_val == E1000_ERR_PHY) &&
2585 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2586 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2587 /* See e1000_kumeran_lock_loss_workaround() */
2588 DPRINTK(LINK, INFO,
2589 "Gigabit has been disabled, downgrading speed\n");
2590 }
90fb5135 2591
2d7edb92
MC		 2592 if (adapter->hw.mac_type == e1000_82573) {
2593 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2594 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2595 e1000_update_mng_vlan(adapter);
96838a40 2596 }
1da177e4 2597
96838a40 2598 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2599 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2600 link = !adapter->hw.serdes_link_down;
2601 else
2602 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2603
96838a40
JB		 2604 if (link) {
2605 if (!netif_carrier_ok(netdev)) {
9669f53b 2606 uint32_t ctrl;
fe7fe28e 2607 boolean_t txb2b = 1;
1da177e4
LT		 2608 e1000_get_speed_and_duplex(&adapter->hw,
2609 &adapter->link_speed,
2610 &adapter->link_duplex);
2611
9669f53b
AK		 2612 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2613 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2614 "Flow Control: %s\n",
2615 adapter->link_speed,
2616 adapter->link_duplex == FULL_DUPLEX ?
2617 "Full Duplex" : "Half Duplex",
2618 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2619 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2620 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2621 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2622
7e6c9861
JK		 2623 /* tweak tx_queue_len according to speed/duplex
2624 * and adjust the timeout factor */
66a2b0a3
JK		 2625 netdev->tx_queue_len = adapter->tx_queue_len;
2626 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2627 switch (adapter->link_speed) {
2628 case SPEED_10:
fe7fe28e 2629 txb2b = 0;
7e6c9861
JK		 2630 netdev->tx_queue_len = 10;
2631 adapter->tx_timeout_factor = 8;
2632 break;
2633 case SPEED_100:
fe7fe28e 2634 txb2b = 0;
7e6c9861
JK		 2635 netdev->tx_queue_len = 100;
2636 /* maybe add some timeout factor ? */
2637 break;
2638 }
2639
fe7fe28e 2640 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2641 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2642 txb2b == 0) {
7e6c9861
JK		 2643 uint32_t tarc0;
2644 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
90fb5135 2645 tarc0 &= ~(1 << 21);
7e6c9861
JK		 2646 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2647 }
90fb5135 2648
7e6c9861
JK		 2649 /* disable TSO for pcie and 10/100 speeds, to avoid
2650 * some hardware issues */
2651 if (!adapter->tso_force &&
2652 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2653 switch (adapter->link_speed) {
2654 case SPEED_10:
66a2b0a3 2655 case SPEED_100:
7e6c9861
JK		 2656 DPRINTK(PROBE,INFO,
2657 "10/100 speed: disabling TSO\n");
2658 netdev->features &= ~NETIF_F_TSO;
87ca4e5b 2659 netdev->features &= ~NETIF_F_TSO6;
7e6c9861
JK		 2660 break;
2661 case SPEED_1000:
2662 netdev->features |= NETIF_F_TSO;
87ca4e5b 2663 netdev->features |= NETIF_F_TSO6;
7e6c9861
JK		 2664 break;
2665 default:
2666 /* oops */
66a2b0a3
JK		 2667 break;
2668 }
2669 }
7e6c9861
JK		 2670
2671 /* enable transmits in the hardware, need to do this
2672 * after setting TARC0 */
2673 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2674 tctl |= E1000_TCTL_EN;
2675 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2676
1da177e4
LT		 2677 netif_carrier_on(netdev);
2678 netif_wake_queue(netdev);
2679 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2680 adapter->smartspeed = 0;
bb8e3311
JG		 2681 } else {
2682 /* make sure the receive unit is started */
2683 if (adapter->hw.rx_needs_kicking) {
2684 struct e1000_hw *hw = &adapter->hw;
2685 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2686 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2687 }
1da177e4
LT		 2688 }
2689 } else {
96838a40 2690 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2691 adapter->link_speed = 0;
2692 adapter->link_duplex = 0;
2693 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2694 netif_carrier_off(netdev);
2695 netif_stop_queue(netdev);
2696 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2697
2698 /* 80003ES2LAN workaround--
2699 * For packet buffer work-around on link down event;
2700 * disable receives in the ISR and
2701 * reset device here in the watchdog
2702 */
8fc897b0 2703 if (adapter->hw.mac_type == e1000_80003es2lan)
87041639
JK		 2704 /* reset device */
2705 schedule_work(&adapter->reset_task);
1da177e4
LT		 2706 }
2707
2708 e1000_smartspeed(adapter);
2709 }
2710
2711 e1000_update_stats(adapter);
2712
2713 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2714 adapter->tpt_old = adapter->stats.tpt;
2715 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2716 adapter->colc_old = adapter->stats.colc;
2717
2718 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2719 adapter->gorcl_old = adapter->stats.gorcl;
2720 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2721 adapter->gotcl_old = adapter->stats.gotcl;
2722
2723 e1000_update_adaptive(&adapter->hw);
2724
f56799ea 2725 if (!netif_carrier_ok(netdev)) {
581d708e 2726 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2727 /* We've lost link, so the controller stops DMA,
2728 * but we've got queued Tx work that's never going
2729 * to get done, so reset controller to flush Tx.
2730 * (Do the reset outside of interrupt context). */
87041639
JK		 2731 adapter->tx_timeout_count++;
2732 schedule_work(&adapter->reset_task);
1da177e4
LT		 2733 }
2734 }
2735
1da177e4
LT		 2736 /* Cause software interrupt to ensure rx ring is cleaned */
2737 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2738
2648345f 2739 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2740 adapter->detect_tx_hung = TRUE;
2741
96838a40 2742 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2743 * reset from the other port. Set the appropriate LAA in RAR[0] */
2744 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2745 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2746
1da177e4
LT		 2747 /* Reset the timer */
2748 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2749}
2750
835bb129
JB		 2751enum latency_range {
2752 lowest_latency = 0,
2753 low_latency = 1,
2754 bulk_latency = 2,
2755 latency_invalid = 255
2756};
2757
2758/**
2759 * e1000_update_itr - update the dynamic ITR value based on statistics
2760 * Stores a new ITR value based on packets and byte
2761 * counts during the last interrupt. The advantage of per interrupt
2762 * computation is faster updates and more accurate ITR for the current
2763 * traffic pattern. Constants in this function were computed
2764 * based on theoretical maximum wire speed and thresholds were set based
2765 * on testing data as well as attempting to minimize response time
2766 * while increasing bulk throughput.
2767 * this functionality is controlled by the InterruptThrottleRate module
2768 * parameter (see e1000_param.c)
2769 * @adapter: pointer to adapter
2770 * @itr_setting: current adapter->itr
2771 * @packets: the number of packets during this measurement interval
2772 * @bytes: the number of bytes during this measurement interval
2773 **/
2774static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2775 uint16_t itr_setting,
2776 int packets,
2777 int bytes)
2778{
2779 unsigned int retval = itr_setting;
2780 struct e1000_hw *hw = &adapter->hw;
2781
2782 if (unlikely(hw->mac_type < e1000_82540))
2783 goto update_itr_done;
2784
2785 if (packets == 0)
2786 goto update_itr_done;
2787
835bb129
JB		 2788 switch (itr_setting) {
2789 case lowest_latency:
2b65326e
JB		 2790 /* jumbo frames get bulk treatment*/
2791 if (bytes/packets > 8000)
2792 retval = bulk_latency;
2793 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2794 retval = low_latency;
2795 break;
2796 case low_latency: /* 50 usec aka 20000 ints/s */
2797 if (bytes > 10000) {
2b65326e
JB		 2798 /* jumbo frames need bulk latency setting */
2799 if (bytes/packets > 8000)
2800 retval = bulk_latency;
2801 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2802 retval = bulk_latency;
2803 else if ((packets > 35))
2804 retval = lowest_latency;
2b65326e
JB		 2805 } else if (bytes/packets > 2000)
2806 retval = bulk_latency;
2807 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2808 retval = lowest_latency;
2809 break;
2810 case bulk_latency: /* 250 usec aka 4000 ints/s */
2811 if (bytes > 25000) {
2812 if (packets > 35)
2813 retval = low_latency;
2b65326e
JB		 2814 } else if (bytes < 6000) {
2815 retval = low_latency;
835bb129
JB		 2816 }
2817 break;
2818 }
2819
2820update_itr_done:
2821 return retval;
2822}
2823
2824static void e1000_set_itr(struct e1000_adapter *adapter)
2825{
2826 struct e1000_hw *hw = &adapter->hw;
2827 uint16_t current_itr;
2828 uint32_t new_itr = adapter->itr;
2829
2830 if (unlikely(hw->mac_type < e1000_82540))
2831 return;
2832
2833 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2834 if (unlikely(adapter->link_speed != SPEED_1000)) {
2835 current_itr = 0;
2836 new_itr = 4000;
2837 goto set_itr_now;
2838 }
2839
2840 adapter->tx_itr = e1000_update_itr(adapter,
2841 adapter->tx_itr,
2842 adapter->total_tx_packets,
2843 adapter->total_tx_bytes);
2b65326e
JB		 2844 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2845 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2846 adapter->tx_itr = low_latency;
2847
835bb129
JB		 2848 adapter->rx_itr = e1000_update_itr(adapter,
2849 adapter->rx_itr,
2850 adapter->total_rx_packets,
2851 adapter->total_rx_bytes);
2b65326e
JB		 2852 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2853 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2854 adapter->rx_itr = low_latency;
835bb129
JB		 2855
2856 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2857
835bb129
JB		 2858 switch (current_itr) {
2859 /* counts and packets in update_itr are dependent on these numbers */
2860 case lowest_latency:
2861 new_itr = 70000;
2862 break;
2863 case low_latency:
2864 new_itr = 20000; /* aka hwitr = ~200 */
2865 break;
2866 case bulk_latency:
2867 new_itr = 4000;
2868 break;
2869 default:
2870 break;
2871 }
2872
2873set_itr_now:
2874 if (new_itr != adapter->itr) {
2875 /* this attempts to bias the interrupt rate towards Bulk
2876 * by adding intermediate steps when interrupt rate is
2877 * increasing */
2878 new_itr = new_itr > adapter->itr ?
2879 min(adapter->itr + (new_itr >> 2), new_itr) :
2880 new_itr;
2881 adapter->itr = new_itr;
2882 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2883 }
2884
2885 return;
2886}
2887
1da177e4
LT		 2888#define E1000_TX_FLAGS_CSUM 0x00000001
2889#define E1000_TX_FLAGS_VLAN 0x00000002
2890#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2891#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2892#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2893#define E1000_TX_FLAGS_VLAN_SHIFT 16
2894
e619d523 2895static int
581d708e
MC		 2896e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2897 struct sk_buff *skb)
1da177e4 2898{
1da177e4 2899 struct e1000_context_desc *context_desc;
545c67c0 2900 struct e1000_buffer *buffer_info;
1da177e4
LT		 2901 unsigned int i;
2902 uint32_t cmd_length = 0;
2d7edb92 2903 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2904 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2905 int err;
2906
89114afd 2907 if (skb_is_gso(skb)) {
1da177e4
LT		 2908 if (skb_header_cloned(skb)) {
2909 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2910 if (err)
2911 return err;
2912 }
2913
2914 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 2915 mss = skb_shinfo(skb)->gso_size;
60828236 2916 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2917 skb->nh.iph->tot_len = 0;
2918 skb->nh.iph->check = 0;
2919 skb->h.th->check =
2920 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2921 skb->nh.iph->daddr,
2922 0,
2923 IPPROTO_TCP,
2924 0);
2925 cmd_length = E1000_TXD_CMD_IP;
2926 ipcse = skb->h.raw - skb->data - 1;
e15fdd03 2927 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2d7edb92
MC		 2928 skb->nh.ipv6h->payload_len = 0;
2929 skb->h.th->check =
2930 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2931 &skb->nh.ipv6h->daddr,
2932 0,
2933 IPPROTO_TCP,
2934 0);
2935 ipcse = 0;
2d7edb92 2936 }
1da177e4
LT		 2937 ipcss = skb->nh.raw - skb->data;
2938 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2939 tucss = skb->h.raw - skb->data;
2940 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2941 tucse = 0;
2942
2943 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2944 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2945
581d708e
MC		 2946 i = tx_ring->next_to_use;
2947 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2948 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2949
2950 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2951 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2952 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2953 context_desc->upper_setup.tcp_fields.tucss = tucss;
2954 context_desc->upper_setup.tcp_fields.tucso = tucso;
2955 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2956 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2957 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2958 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2959
545c67c0 2960 buffer_info->time_stamp = jiffies;
a9ebadd6 2961 buffer_info->next_to_watch = i;
545c67c0 2962
581d708e
MC		 2963 if (++i == tx_ring->count) i = 0;
2964 tx_ring->next_to_use = i;
1da177e4 2965
8241e35e 2966 return TRUE;
1da177e4 2967 }
8241e35e 2968 return FALSE;
1da177e4
LT		 2969}
2970
e619d523 2971static boolean_t
581d708e
MC		 2972e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2973 struct sk_buff *skb)
1da177e4
LT		 2974{
2975 struct e1000_context_desc *context_desc;
545c67c0 2976 struct e1000_buffer *buffer_info;
1da177e4
LT		 2977 unsigned int i;
2978 uint8_t css;
2979
84fa7933 2980 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1da177e4
LT		 2981 css = skb->h.raw - skb->data;
2982
581d708e 2983 i = tx_ring->next_to_use;
545c67c0 2984 buffer_info = &tx_ring->buffer_info[i];
581d708e 2985 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4 2986
f6c57baf 2987 context_desc->lower_setup.ip_config = 0;
1da177e4 2988 context_desc->upper_setup.tcp_fields.tucss = css;
f6c57baf 2989 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
1da177e4
LT		 2990 context_desc->upper_setup.tcp_fields.tucse = 0;
2991 context_desc->tcp_seg_setup.data = 0;
2992 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2993
545c67c0 2994 buffer_info->time_stamp = jiffies;
a9ebadd6 2995 buffer_info->next_to_watch = i;
545c67c0 2996
581d708e
MC		 2997 if (unlikely(++i == tx_ring->count)) i = 0;
2998 tx_ring->next_to_use = i;
1da177e4
LT		 2999
3000 return TRUE;
3001 }
3002
3003 return FALSE;
3004}
3005
3006#define E1000_MAX_TXD_PWR 12
3007#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
3008
e619d523 3009static int
581d708e
MC		 3010e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3011 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
3012 unsigned int nr_frags, unsigned int mss)
1da177e4 3013{
1da177e4
LT		 3014 struct e1000_buffer *buffer_info;
3015 unsigned int len = skb->len;
3016 unsigned int offset = 0, size, count = 0, i;
3017 unsigned int f;
3018 len -= skb->data_len;
3019
3020 i = tx_ring->next_to_use;
3021
96838a40 3022 while (len) {
1da177e4
LT		 3023 buffer_info = &tx_ring->buffer_info[i];
3024 size = min(len, max_per_txd);
fd803241
JK		 3025 /* Workaround for Controller erratum --
3026 * descriptor for non-tso packet in a linear SKB that follows a
3027 * tso gets written back prematurely before the data is fully
0f15a8fa 3028 * DMA'd to the controller */
fd803241 3029 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 3030 !skb_is_gso(skb)) {
fd803241
JK		 3031 tx_ring->last_tx_tso = 0;
3032 size -= 4;
3033 }
3034
1da177e4
LT		 3035 /* Workaround for premature desc write-backs
3036 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3037 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 3038 size -= 4;
97338bde
MC		 3039 /* work-around for errata 10 and it applies
3040 * to all controllers in PCI-X mode
3041 * The fix is to make sure that the first descriptor of a
3042 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3043 */
96838a40 3044 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3045 (size > 2015) && count == 0))
3046 size = 2015;
96838a40 3047
1da177e4
LT		 3048 /* Workaround for potential 82544 hang in PCI-X. Avoid
3049 * terminating buffers within evenly-aligned dwords. */
96838a40 3050 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3051 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3052 size > 4))
3053 size -= 4;
3054
3055 buffer_info->length = size;
3056 buffer_info->dma =
3057 pci_map_single(adapter->pdev,
3058 skb->data + offset,
3059 size,
3060 PCI_DMA_TODEVICE);
3061 buffer_info->time_stamp = jiffies;
a9ebadd6 3062 buffer_info->next_to_watch = i;
1da177e4
LT		 3063
3064 len -= size;
3065 offset += size;
3066 count++;
96838a40 3067 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3068 }
3069
96838a40 3070 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 3071 struct skb_frag_struct *frag;
3072
3073 frag = &skb_shinfo(skb)->frags[f];
3074 len = frag->size;
3075 offset = frag->page_offset;
3076
96838a40 3077 while (len) {
1da177e4
LT		 3078 buffer_info = &tx_ring->buffer_info[i];
3079 size = min(len, max_per_txd);
1da177e4
LT		 3080 /* Workaround for premature desc write-backs
3081 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3082 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 3083 size -= 4;
1da177e4
LT		 3084 /* Workaround for potential 82544 hang in PCI-X.
3085 * Avoid terminating buffers within evenly-aligned
3086 * dwords. */
96838a40 3087 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3088 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3089 size > 4))
3090 size -= 4;
3091
3092 buffer_info->length = size;
3093 buffer_info->dma =
3094 pci_map_page(adapter->pdev,
3095 frag->page,
3096 offset,
3097 size,
3098 PCI_DMA_TODEVICE);
3099 buffer_info->time_stamp = jiffies;
a9ebadd6 3100 buffer_info->next_to_watch = i;
1da177e4
LT		 3101
3102 len -= size;
3103 offset += size;
3104 count++;
96838a40 3105 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3106 }
3107 }
3108
3109 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3110 tx_ring->buffer_info[i].skb = skb;
3111 tx_ring->buffer_info[first].next_to_watch = i;
3112
3113 return count;
3114}
3115
e619d523 3116static void
581d708e
MC		 3117e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3118 int tx_flags, int count)
1da177e4 3119{
1da177e4
LT		 3120 struct e1000_tx_desc *tx_desc = NULL;
3121 struct e1000_buffer *buffer_info;
3122 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3123 unsigned int i;
3124
96838a40 3125 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 3126 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3127 E1000_TXD_CMD_TSE;
2d7edb92
MC		 3128 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3129
96838a40 3130 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 3131 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 3132 }
3133
96838a40 3134 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 3135 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3136 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3137 }
3138
96838a40 3139 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3140 txd_lower |= E1000_TXD_CMD_VLE;
3141 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3142 }
3143
3144 i = tx_ring->next_to_use;
3145
96838a40 3146 while (count--) {
1da177e4
LT		 3147 buffer_info = &tx_ring->buffer_info[i];
3148 tx_desc = E1000_TX_DESC(*tx_ring, i);
3149 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3150 tx_desc->lower.data =
3151 cpu_to_le32(txd_lower | buffer_info->length);
3152 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3153 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3154 }
3155
3156 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3157
3158 /* Force memory writes to complete before letting h/w
3159 * know there are new descriptors to fetch. (Only
3160 * applicable for weak-ordered memory model archs,
3161 * such as IA-64). */
3162 wmb();
3163
3164 tx_ring->next_to_use = i;
581d708e 3165 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2ce9047f
JB		 3166 /* we need this if more than one processor can write to our tail
3167 * at a time, it syncronizes IO on IA64/Altix systems */
3168 mmiowb();
1da177e4
LT		 3169}
3170
3171/**
3172 * 82547 workaround to avoid controller hang in half-duplex environment.
3173 * The workaround is to avoid queuing a large packet that would span
3174 * the internal Tx FIFO ring boundary by notifying the stack to resend
3175 * the packet at a later time. This gives the Tx FIFO an opportunity to
3176 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3177 * to the beginning of the Tx FIFO.
3178 **/
3179
3180#define E1000_FIFO_HDR 0x10
3181#define E1000_82547_PAD_LEN 0x3E0
3182
e619d523 3183static int
1da177e4
LT		 3184e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3185{
3186 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3187 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3188
3189 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
3190
96838a40 3191 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3192 goto no_fifo_stall_required;
3193
96838a40 3194 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3195 return 1;
3196
96838a40 3197 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3198 atomic_set(&adapter->tx_fifo_stall, 1);
3199 return 1;
3200 }
3201
3202no_fifo_stall_required:
3203 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3204 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3205 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3206 return 0;
3207}
3208
2d7edb92 3209#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 3210static int
2d7edb92
MC		 3211e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3212{
3213 struct e1000_hw *hw = &adapter->hw;
3214 uint16_t length, offset;
96838a40
JB		 3215 if (vlan_tx_tag_present(skb)) {
3216 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 3217 ( adapter->hw.mng_cookie.status &
3218 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3219 return 0;
3220 }
20a44028 3221 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 3222 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 3223 if ((htons(ETH_P_IP) == eth->h_proto)) {
3224 const struct iphdr *ip =
2d7edb92 3225 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 3226 if (IPPROTO_UDP == ip->protocol) {
3227 struct udphdr *udp =
3228 (struct udphdr *)((uint8_t *)ip +
2d7edb92 3229 (ip->ihl << 2));
96838a40 3230 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 3231 offset = (uint8_t *)udp + 8 - skb->data;
3232 length = skb->len - offset;
3233
3234 return e1000_mng_write_dhcp_info(hw,
96838a40 3235 (uint8_t *)udp + 8,
2d7edb92
MC		 3236 length);
3237 }
3238 }
3239 }
3240 }
3241 return 0;
3242}
3243
65c7973f
JB		 3244static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3245{
3246 struct e1000_adapter *adapter = netdev_priv(netdev);
3247 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3248
3249 netif_stop_queue(netdev);
3250 /* Herbert's original patch had:
3251 * smp_mb__after_netif_stop_queue();
3252 * but since that doesn't exist yet, just open code it. */
3253 smp_mb();
3254
3255 /* We need to check again in a case another CPU has just
3256 * made room available. */
3257 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3258 return -EBUSY;
3259
3260 /* A reprieve! */
3261 netif_start_queue(netdev);
fcfb1224 3262 ++adapter->restart_queue;
65c7973f
JB		 3263 return 0;
3264}
3265
3266static int e1000_maybe_stop_tx(struct net_device *netdev,
3267 struct e1000_tx_ring *tx_ring, int size)
3268{
3269 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3270 return 0;
3271 return __e1000_maybe_stop_tx(netdev, size);
3272}
3273
1da177e4
LT		 3274#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3275static int
3276e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3277{
60490fe0 3278 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 3279 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3280 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3281 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3282 unsigned int tx_flags = 0;
3283 unsigned int len = skb->len;
3284 unsigned long flags;
3285 unsigned int nr_frags = 0;
3286 unsigned int mss = 0;
3287 int count = 0;
76c224bc 3288 int tso;
1da177e4
LT		 3289 unsigned int f;
3290 len -= skb->data_len;
3291
65c7973f
JB		 3292 /* This goes back to the question of how to logically map a tx queue
3293 * to a flow. Right now, performance is impacted slightly negatively
3294 * if using multiple tx queues. If the stack breaks away from a
3295 * single qdisc implementation, we can look at this again. */
581d708e 3296 tx_ring = adapter->tx_ring;
24025e4e 3297
581d708e 3298 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3299 dev_kfree_skb_any(skb);
3300 return NETDEV_TX_OK;
3301 }
3302
032fe6e9
JB		 3303 /* 82571 and newer doesn't need the workaround that limited descriptor
3304 * length to 4kB */
3305 if (adapter->hw.mac_type >= e1000_82571)
3306 max_per_txd = 8192;
3307
7967168c 3308 mss = skb_shinfo(skb)->gso_size;
76c224bc 3309 /* The controller does a simple calculation to
1da177e4
LT		 3310 * make sure there is enough room in the FIFO before
3311 * initiating the DMA for each buffer. The calc is:
3312 * 4 = ceil(buffer len/mss). To make sure we don't
3313 * overrun the FIFO, adjust the max buffer len if mss
3314 * drops. */
96838a40 3315 if (mss) {
9a3056da 3316 uint8_t hdr_len;
1da177e4
LT		 3317 max_per_txd = min(mss << 2, max_per_txd);
3318 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3319
90fb5135
AK		 3320 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3321 * points to just header, pull a few bytes of payload from
3322 * frags into skb->data */
9a3056da 3323 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 3324 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3325 switch (adapter->hw.mac_type) {
3326 unsigned int pull_size;
683a2aa3
HX		 3327 case e1000_82544:
3328 /* Make sure we have room to chop off 4 bytes,
3329 * and that the end alignment will work out to
3330 * this hardware's requirements
3331 * NOTE: this is a TSO only workaround
3332 * if end byte alignment not correct move us
3333 * into the next dword */
3334 if ((unsigned long)(skb->tail - 1) & 4)
3335 break;
3336 /* fall through */
9f687888
JK		 3337 case e1000_82571:
3338 case e1000_82572:
3339 case e1000_82573:
cd94dd0b 3340 case e1000_ich8lan:
9f687888
JK		 3341 pull_size = min((unsigned int)4, skb->data_len);
3342 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3343 DPRINTK(DRV, ERR,
9f687888
JK		 3344 "__pskb_pull_tail failed.\n");
3345 dev_kfree_skb_any(skb);
749dfc70 3346 return NETDEV_TX_OK;
9f687888
JK		 3347 }
3348 len = skb->len - skb->data_len;
3349 break;
3350 default:
3351 /* do nothing */
3352 break;
d74bbd3b 3353 }
9a3056da 3354 }
1da177e4
LT		 3355 }
3356
9a3056da 3357 /* reserve a descriptor for the offload context */
84fa7933 3358 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3359 count++;
2648345f 3360 count++;
fd803241 3361
fd803241 3362 /* Controller Erratum workaround */
89114afd 3363 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3364 count++;
fd803241 3365
1da177e4
LT		 3366 count += TXD_USE_COUNT(len, max_txd_pwr);
3367
96838a40 3368 if (adapter->pcix_82544)
1da177e4
LT		 3369 count++;
3370
96838a40 3371 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3372 * in PCI-X mode, so add one more descriptor to the count
3373 */
96838a40 3374 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3375 (len > 2015)))
3376 count++;
3377
1da177e4 3378 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3379 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3380 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3381 max_txd_pwr);
96838a40 3382 if (adapter->pcix_82544)
1da177e4
LT		 3383 count += nr_frags;
3384
0f15a8fa
JK		 3385
3386 if (adapter->hw.tx_pkt_filtering &&
3387 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 3388 e1000_transfer_dhcp_info(adapter, skb);
3389
581d708e
MC		 3390 local_irq_save(flags);
3391 if (!spin_trylock(&tx_ring->tx_lock)) {
3392 /* Collision - tell upper layer to requeue */
3393 local_irq_restore(flags);
3394 return NETDEV_TX_LOCKED;
3395 }
1da177e4
LT		 3396
3397 /* need: count + 2 desc gap to keep tail from touching
3398 * head, otherwise try next time */
65c7973f 3399 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3400 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3401 return NETDEV_TX_BUSY;
3402 }
3403
96838a40
JB		 3404 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3405 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3406 netif_stop_queue(netdev);
1314bbf3 3407 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
581d708e 3408 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3409 return NETDEV_TX_BUSY;
3410 }
3411 }
3412
96838a40 3413 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3414 tx_flags |= E1000_TX_FLAGS_VLAN;
3415 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3416 }
3417
581d708e 3418 first = tx_ring->next_to_use;
96838a40 3419
581d708e 3420 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3421 if (tso < 0) {
3422 dev_kfree_skb_any(skb);
581d708e 3423 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3424 return NETDEV_TX_OK;
3425 }
3426
fd803241
JK		 3427 if (likely(tso)) {
3428 tx_ring->last_tx_tso = 1;
1da177e4 3429 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3430 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3431 tx_flags |= E1000_TX_FLAGS_CSUM;
3432
2d7edb92 3433 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3434 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3435 * no longer assume, we must. */
60828236 3436 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3437 tx_flags |= E1000_TX_FLAGS_IPV4;
3438
581d708e
MC		 3439 e1000_tx_queue(adapter, tx_ring, tx_flags,
3440 e1000_tx_map(adapter, tx_ring, skb, first,
3441 max_per_txd, nr_frags, mss));
1da177e4
LT		 3442
3443 netdev->trans_start = jiffies;
3444
3445 /* Make sure there is space in the ring for the next send. */
65c7973f 3446 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3447
581d708e 3448 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3449 return NETDEV_TX_OK;
3450}
3451
3452/**
3453 * e1000_tx_timeout - Respond to a Tx Hang
3454 * @netdev: network interface device structure
3455 **/
3456
3457static void
3458e1000_tx_timeout(struct net_device *netdev)
3459{
60490fe0 3460 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3461
3462 /* Do the reset outside of interrupt context */
87041639
JK		 3463 adapter->tx_timeout_count++;
3464 schedule_work(&adapter->reset_task);
1da177e4
LT		 3465}
3466
3467static void
65f27f38 3468e1000_reset_task(struct work_struct *work)
1da177e4 3469{
65f27f38
DH		 3470 struct e1000_adapter *adapter =
3471 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3472
2db10a08 3473 e1000_reinit_locked(adapter);
1da177e4
LT		 3474}
3475
3476/**
3477 * e1000_get_stats - Get System Network Statistics
3478 * @netdev: network interface device structure
3479 *
3480 * Returns the address of the device statistics structure.
3481 * The statistics are actually updated from the timer callback.
3482 **/
3483
3484static struct net_device_stats *
3485e1000_get_stats(struct net_device *netdev)
3486{
60490fe0 3487 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3488
6b7660cd 3489 /* only return the current stats */
1da177e4
LT		 3490 return &adapter->net_stats;
3491}
3492
3493/**
3494 * e1000_change_mtu - Change the Maximum Transfer Unit
3495 * @netdev: network interface device structure
3496 * @new_mtu: new value for maximum frame size
3497 *
3498 * Returns 0 on success, negative on failure
3499 **/
3500
3501static int
3502e1000_change_mtu(struct net_device *netdev, int new_mtu)
3503{
60490fe0 3504 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3505 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3506 uint16_t eeprom_data = 0;
1da177e4 3507
96838a40
JB		 3508 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3509 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3510 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3511 return -EINVAL;
2d7edb92 3512 }
1da177e4 3513
997f5cbd
JK		 3514 /* Adapter-specific max frame size limits. */
3515 switch (adapter->hw.mac_type) {
9e2feace 3516 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3517 case e1000_ich8lan:
997f5cbd
JK		 3518 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3519 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3520 return -EINVAL;
2d7edb92 3521 }
997f5cbd 3522 break;
85b22eb6 3523 case e1000_82573:
249d71d6
BA		 3524 /* Jumbo Frames not supported if:
3525 * - this is not an 82573L device
3526 * - ASPM is enabled in any way (0x1A bits 3:2) */
85b22eb6
JK		 3527 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3528 &eeprom_data);
249d71d6
BA		 3529 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3530 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3531 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3532 DPRINTK(PROBE, ERR,
3533 "Jumbo Frames not supported.\n");
3534 return -EINVAL;
3535 }
3536 break;
3537 }
249d71d6
BA		 3538 /* ERT will be enabled later to enable wire speed receives */
3539
85b22eb6 3540 /* fall through to get support */
997f5cbd
JK		 3541 case e1000_82571:
3542 case e1000_82572:
87041639 3543 case e1000_80003es2lan:
997f5cbd
JK		 3544#define MAX_STD_JUMBO_FRAME_SIZE 9234
3545 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3546 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3547 return -EINVAL;
3548 }
3549 break;
3550 default:
3551 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3552 break;
1da177e4
LT		 3553 }
3554
87f5032e 3555 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3556 * means we reserve 2 more, this pushes us to allocate from the next
3557 * larger slab size
3558 * i.e. RXBUFFER_2048 --> size-4096 slab */
3559
3560 if (max_frame <= E1000_RXBUFFER_256)
3561 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3562 else if (max_frame <= E1000_RXBUFFER_512)
3563 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3564 else if (max_frame <= E1000_RXBUFFER_1024)
3565 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3566 else if (max_frame <= E1000_RXBUFFER_2048)
3567 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3568 else if (max_frame <= E1000_RXBUFFER_4096)
3569 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3570 else if (max_frame <= E1000_RXBUFFER_8192)
3571 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3572 else if (max_frame <= E1000_RXBUFFER_16384)
3573 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3574
3575 /* adjust allocation if LPE protects us, and we aren't using SBP */
9e2feace
AK		 3576 if (!adapter->hw.tbi_compatibility_on &&
3577 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3578 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3579 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3580
2d7edb92 3581 netdev->mtu = new_mtu;
83cd8279 3582 adapter->hw.max_frame_size = max_frame;
2d7edb92 3583
2db10a08
AK		 3584 if (netif_running(netdev))
3585 e1000_reinit_locked(adapter);
1da177e4 3586
1da177e4
LT		 3587 return 0;
3588}
3589
3590/**
3591 * e1000_update_stats - Update the board statistics counters
3592 * @adapter: board private structure
3593 **/
3594
3595void
3596e1000_update_stats(struct e1000_adapter *adapter)
3597{
3598 struct e1000_hw *hw = &adapter->hw;
282f33c9 3599 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3600 unsigned long flags;
3601 uint16_t phy_tmp;
3602
3603#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3604
282f33c9
LV		 3605 /*
3606 * Prevent stats update while adapter is being reset, or if the pci
3607 * connection is down.
3608 */
9026729b 3609 if (adapter->link_speed == 0)
282f33c9 3610 return;
81b1955e 3611 if (pci_channel_offline(pdev))
9026729b
AK		 3612 return;
3613
1da177e4
LT		 3614 spin_lock_irqsave(&adapter->stats_lock, flags);
3615
3616 /* these counters are modified from e1000_adjust_tbi_stats,
3617 * called from the interrupt context, so they must only
3618 * be written while holding adapter->stats_lock
3619 */
3620
3621 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3622 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3623 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3624 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3625 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3626 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3627 adapter->stats.roc += E1000_READ_REG(hw, ROC);
cd94dd0b
AK		 3628
3629 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3630 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3631 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3632 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3633 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3634 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3635 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
cd94dd0b 3636 }
1da177e4
LT		 3637
3638 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3639 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3640 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3641 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3642 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3643 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3644 adapter->stats.dc += E1000_READ_REG(hw, DC);
3645 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3646 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3647 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3648 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3649 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3650 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3651 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3652 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3653 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3654 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3655 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3656 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3657 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3658 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3659 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3660 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3661 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3662 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3663 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
cd94dd0b
AK		 3664
3665 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3666 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3667 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3668 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3669 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3670 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3671 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
cd94dd0b
AK		 3672 }
3673
1da177e4
LT		 3674 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3675 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3676
3677 /* used for adaptive IFS */
3678
3679 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3680 adapter->stats.tpt += hw->tx_packet_delta;
3681 hw->collision_delta = E1000_READ_REG(hw, COLC);
3682 adapter->stats.colc += hw->collision_delta;
3683
96838a40 3684 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3685 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3686 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3687 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3688 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3689 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3690 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3691 }
96838a40 3692 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3693 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3694 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
cd94dd0b
AK		 3695
3696 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3697 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3698 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3699 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3700 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3701 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3702 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3703 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
cd94dd0b 3704 }
2d7edb92 3705 }
1da177e4
LT		 3706
3707 /* Fill out the OS statistics structure */
1da177e4
LT		 3708 adapter->net_stats.rx_packets = adapter->stats.gprc;
3709 adapter->net_stats.tx_packets = adapter->stats.gptc;
3710 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3711 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3712 adapter->net_stats.multicast = adapter->stats.mprc;
3713 adapter->net_stats.collisions = adapter->stats.colc;
3714
3715 /* Rx Errors */
3716
87041639
JK		 3717 /* RLEC on some newer hardware can be incorrect so build
3718 * our own version based on RUC and ROC */
1da177e4
LT		 3719 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3720 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3721 adapter->stats.ruc + adapter->stats.roc +
3722 adapter->stats.cexterr;
49559854
MW		 3723 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3724 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3725 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3726 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3727 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3728
3729 /* Tx Errors */
49559854
MW		 3730 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3731 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3732 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3733 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3734 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
167fb284
JG		 3735 if (adapter->hw.bad_tx_carr_stats_fd &&
3736 adapter->link_duplex == FULL_DUPLEX) {
3737 adapter->net_stats.tx_carrier_errors = 0;
3738 adapter->stats.tncrs = 0;
3739 }
1da177e4
LT		 3740
3741 /* Tx Dropped needs to be maintained elsewhere */
3742
3743 /* Phy Stats */
96838a40
JB		 3744 if (hw->media_type == e1000_media_type_copper) {
3745 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3746 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3747 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3748 adapter->phy_stats.idle_errors += phy_tmp;
3749 }
3750
96838a40 3751 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3752 (hw->phy_type == e1000_phy_m88) &&
3753 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3754 adapter->phy_stats.receive_errors += phy_tmp;
3755 }
3756
15e376b4
JG		 3757 /* Management Stats */
3758 if (adapter->hw.has_smbus) {
3759 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3760 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3761 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3762 }
3763
1da177e4
LT		 3764 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3765}
9ac98284
JB		 3766#ifdef CONFIG_PCI_MSI
3767
3768/**
3769 * e1000_intr_msi - Interrupt Handler
3770 * @irq: interrupt number
3771 * @data: pointer to a network interface device structure
3772 **/
3773
b5fc8f0c
JB		 3774static irqreturn_t
3775e1000_intr_msi(int irq, void *data)
9ac98284
JB		 3776{
3777 struct net_device *netdev = data;
3778 struct e1000_adapter *adapter = netdev_priv(netdev);
3779 struct e1000_hw *hw = &adapter->hw;
3780#ifndef CONFIG_E1000_NAPI
3781 int i;
3782#endif
b5fc8f0c 3783 uint32_t icr = E1000_READ_REG(hw, ICR);
9ac98284 3784
9ac98284 3785#ifdef CONFIG_E1000_NAPI
b5fc8f0c
JB		 3786 /* read ICR disables interrupts using IAM, so keep up with our
3787 * enable/disable accounting */
3788 atomic_inc(&adapter->irq_sem);
9ac98284 3789#endif
b5fc8f0c
JB		 3790 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3791 hw->get_link_status = 1;
3792 /* 80003ES2LAN workaround-- For packet buffer work-around on
3793 * link down event; disable receives here in the ISR and reset
3794 * adapter in watchdog */
3795 if (netif_carrier_ok(netdev) &&
3796 (adapter->hw.mac_type == e1000_80003es2lan)) {
3797 /* disable receives */
3798 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3799 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
9ac98284 3800 }
b5fc8f0c
JB		 3801 /* guard against interrupt when we're going down */
3802 if (!test_bit(__E1000_DOWN, &adapter->flags))
3803 mod_timer(&adapter->watchdog_timer, jiffies + 1);
9ac98284
JB		 3804 }
3805
3806#ifdef CONFIG_E1000_NAPI
835bb129
JB		 3807 if (likely(netif_rx_schedule_prep(netdev))) {
3808 adapter->total_tx_bytes = 0;
3809 adapter->total_tx_packets = 0;
3810 adapter->total_rx_bytes = 0;
3811 adapter->total_rx_packets = 0;
9ac98284 3812 __netif_rx_schedule(netdev);
835bb129 3813 } else
9ac98284
JB		 3814 e1000_irq_enable(adapter);
3815#else
835bb129
JB		 3816 adapter->total_tx_bytes = 0;
3817 adapter->total_rx_bytes = 0;
3818 adapter->total_tx_packets = 0;
3819 adapter->total_rx_packets = 0;
3820
9ac98284
JB		 3821 for (i = 0; i < E1000_MAX_INTR; i++)
3822 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
46fcc86d 3823 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
9ac98284 3824 break;
835bb129
JB		 3825
3826 if (likely(adapter->itr_setting & 3))
3827 e1000_set_itr(adapter);
9ac98284
JB		 3828#endif
3829
3830 return IRQ_HANDLED;
3831}
3832#endif
1da177e4
LT		 3833
3834/**
3835 * e1000_intr - Interrupt Handler
3836 * @irq: interrupt number
3837 * @data: pointer to a network interface device structure
1da177e4
LT		 3838 **/
3839
3840static irqreturn_t
7d12e780 3841e1000_intr(int irq, void *data)
1da177e4
LT		 3842{
3843 struct net_device *netdev = data;
60490fe0 3844 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3845 struct e1000_hw *hw = &adapter->hw;
87041639 3846 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3847#ifndef CONFIG_E1000_NAPI
581d708e 3848 int i;
835bb129
JB		 3849#endif
3850 if (unlikely(!icr))
3851 return IRQ_NONE; /* Not our interrupt */
3852
3853#ifdef CONFIG_E1000_NAPI
3854 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3855 * not set, then the adapter didn't send an interrupt */
3856 if (unlikely(hw->mac_type >= e1000_82571 &&
3857 !(icr & E1000_ICR_INT_ASSERTED)))
3858 return IRQ_NONE;
3859
1e613fd9
JK		 3860 /* Interrupt Auto-Mask...upon reading ICR,
3861 * interrupts are masked. No need for the
3862 * IMC write, but it does mean we should
3863 * account for it ASAP. */
3864 if (likely(hw->mac_type >= e1000_82571))
3865 atomic_inc(&adapter->irq_sem);
be2b28ed 3866#endif
1da177e4 3867
96838a40 3868 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3869 hw->get_link_status = 1;
87041639
JK		 3870 /* 80003ES2LAN workaround--
3871 * For packet buffer work-around on link down event;
3872 * disable receives here in the ISR and
3873 * reset adapter in watchdog
3874 */
3875 if (netif_carrier_ok(netdev) &&
3876 (adapter->hw.mac_type == e1000_80003es2lan)) {
3877 /* disable receives */
3878 rctl = E1000_READ_REG(hw, RCTL);
3879 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3880 }
1314bbf3
AK		 3881 /* guard against interrupt when we're going down */
3882 if (!test_bit(__E1000_DOWN, &adapter->flags))
3883 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3884 }
3885
3886#ifdef CONFIG_E1000_NAPI
1e613fd9 3887 if (unlikely(hw->mac_type < e1000_82571)) {
835bb129 3888 /* disable interrupts, without the synchronize_irq bit */
1e613fd9
JK		 3889 atomic_inc(&adapter->irq_sem);
3890 E1000_WRITE_REG(hw, IMC, ~0);
3891 E1000_WRITE_FLUSH(hw);
3892 }
835bb129
JB		 3893 if (likely(netif_rx_schedule_prep(netdev))) {
3894 adapter->total_tx_bytes = 0;
3895 adapter->total_tx_packets = 0;
3896 adapter->total_rx_bytes = 0;
3897 adapter->total_rx_packets = 0;
d3d9e484 3898 __netif_rx_schedule(netdev);
835bb129 3899 } else
90fb5135
AK		 3900 /* this really should not happen! if it does it is basically a
3901 * bug, but not a hard error, so enable ints and continue */
581d708e 3902 e1000_irq_enable(adapter);
c1605eb3 3903#else
1da177e4 3904 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3905 * Due to Hub Link bus being occupied, an interrupt
3906 * de-assertion message is not able to be sent.
3907 * When an interrupt assertion message is generated later,
3908 * two messages are re-ordered and sent out.
3909 * That causes APIC to think 82547 is in de-assertion
3910 * state, while 82547 is in assertion state, resulting
3911 * in dead lock. Writing IMC forces 82547 into
3912 * de-assertion state.
3913 */
3914 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3915 atomic_inc(&adapter->irq_sem);
2648345f 3916 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3917 }
3918
835bb129
JB		 3919 adapter->total_tx_bytes = 0;
3920 adapter->total_rx_bytes = 0;
3921 adapter->total_tx_packets = 0;
3922 adapter->total_rx_packets = 0;
3923
96838a40
JB		 3924 for (i = 0; i < E1000_MAX_INTR; i++)
3925 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
46fcc86d 3926 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3927 break;
3928
835bb129
JB		 3929 if (likely(adapter->itr_setting & 3))
3930 e1000_set_itr(adapter);
3931
96838a40 3932 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3933 e1000_irq_enable(adapter);
581d708e 3934
c1605eb3 3935#endif
1da177e4
LT		 3936 return IRQ_HANDLED;
3937}
3938
3939#ifdef CONFIG_E1000_NAPI
3940/**
3941 * e1000_clean - NAPI Rx polling callback
3942 * @adapter: board private structure
3943 **/
3944
3945static int
581d708e 3946e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3947{
581d708e
MC		 3948 struct e1000_adapter *adapter;
3949 int work_to_do = min(*budget, poll_dev->quota);
d3d9e484 3950 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3951
3952 /* Must NOT use netdev_priv macro here. */
3953 adapter = poll_dev->priv;
3954
3955 /* Keep link state information with original netdev */
d3d9e484 3956 if (!netif_carrier_ok(poll_dev))
581d708e 3957 goto quit_polling;
2648345f 3958
d3d9e484
AK		 3959 /* e1000_clean is called per-cpu. This lock protects
3960 * tx_ring[0] from being cleaned by multiple cpus
3961 * simultaneously. A failure obtaining the lock means
3962 * tx_ring[0] is currently being cleaned anyway. */
3963 if (spin_trylock(&adapter->tx_queue_lock)) {
3964 tx_cleaned = e1000_clean_tx_irq(adapter,
3965 &adapter->tx_ring[0]);
3966 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3967 }
3968
d3d9e484 3969 adapter->clean_rx(adapter, &adapter->rx_ring[0],
581d708e 3970 &work_done, work_to_do);
1da177e4
LT		 3971
3972 *budget -= work_done;
581d708e 3973 poll_dev->quota -= work_done;
96838a40 3974
2b02893e 3975 /* If no Tx and not enough Rx work done, exit the polling mode */
46fcc86d 3976 if ((!tx_cleaned && (work_done == 0)) ||
d3d9e484 3977 !netif_running(poll_dev)) {
581d708e 3978quit_polling:
835bb129
JB		 3979 if (likely(adapter->itr_setting & 3))
3980 e1000_set_itr(adapter);
581d708e 3981 netif_rx_complete(poll_dev);
1da177e4
LT		 3982 e1000_irq_enable(adapter);
3983 return 0;
3984 }
3985
3986 return 1;
3987}
3988
3989#endif
3990/**
3991 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3992 * @adapter: board private structure
3993 **/
3994
3995static boolean_t
581d708e
MC		 3996e1000_clean_tx_irq(struct e1000_adapter *adapter,
3997 struct e1000_tx_ring *tx_ring)
1da177e4 3998{
1da177e4
LT		 3999 struct net_device *netdev = adapter->netdev;
4000 struct e1000_tx_desc *tx_desc, *eop_desc;
4001 struct e1000_buffer *buffer_info;
4002 unsigned int i, eop;
2a1af5d7
JK		 4003#ifdef CONFIG_E1000_NAPI
4004 unsigned int count = 0;
4005#endif
46fcc86d 4006 boolean_t cleaned = FALSE;
835bb129 4007 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 4008
4009 i = tx_ring->next_to_clean;
4010 eop = tx_ring->buffer_info[i].next_to_watch;
4011 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4012
581d708e 4013 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 4014 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 4015 tx_desc = E1000_TX_DESC(*tx_ring, i);
4016 buffer_info = &tx_ring->buffer_info[i];
4017 cleaned = (i == eop);
4018
835bb129 4019 if (cleaned) {
2b65326e 4020 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 4021 unsigned int segs, bytecount;
4022 segs = skb_shinfo(skb)->gso_segs ?: 1;
4023 /* multiply data chunks by size of headers */
4024 bytecount = ((segs - 1) * skb_headlen(skb)) +
4025 skb->len;
2b65326e 4026 total_tx_packets += segs;
7753b171 4027 total_tx_bytes += bytecount;
835bb129 4028 }
fd803241 4029 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 4030 tx_desc->upper.data = 0;
1da177e4 4031
96838a40 4032 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 4033 }
581d708e 4034
1da177e4
LT		 4035 eop = tx_ring->buffer_info[i].next_to_watch;
4036 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 4037#ifdef CONFIG_E1000_NAPI
4038#define E1000_TX_WEIGHT 64
4039 /* weight of a sort for tx, to avoid endless transmit cleanup */
46fcc86d 4040 if (count++ == E1000_TX_WEIGHT) break;
2a1af5d7 4041#endif
1da177e4
LT		 4042 }
4043
4044 tx_ring->next_to_clean = i;
4045
77b2aad5 4046#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 4047 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4048 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4049 /* Make sure that anybody stopping the queue after this
4050 * sees the new next_to_clean.
4051 */
4052 smp_mb();
fcfb1224 4053 if (netif_queue_stopped(netdev)) {
77b2aad5 4054 netif_wake_queue(netdev);
fcfb1224
JB		 4055 ++adapter->restart_queue;
4056 }
77b2aad5 4057 }
2648345f 4058
581d708e 4059 if (adapter->detect_tx_hung) {
2648345f 4060 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 4061 * check with the clearing of time_stamp and movement of i */
4062 adapter->detect_tx_hung = FALSE;
392137fa
JK		 4063 if (tx_ring->buffer_info[eop].dma &&
4064 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 4065 (adapter->tx_timeout_factor * HZ))
70b8f1e1 4066 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 4067 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 4068
4069 /* detected Tx unit hang */
c6963ef5 4070 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 4071 " Tx Queue <%lu>\n"
70b8f1e1
MC		 4072 " TDH <%x>\n"
4073 " TDT <%x>\n"
4074 " next_to_use <%x>\n"
4075 " next_to_clean <%x>\n"
4076 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 4077 " time_stamp <%lx>\n"
4078 " next_to_watch <%x>\n"
4079 " jiffies <%lx>\n"
4080 " next_to_watch.status <%x>\n",
7bfa4816
JK		 4081 (unsigned long)((tx_ring - adapter->tx_ring) /
4082 sizeof(struct e1000_tx_ring)),
581d708e
MC		 4083 readl(adapter->hw.hw_addr + tx_ring->tdh),
4084 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 4085 tx_ring->next_to_use,
392137fa
JK		 4086 tx_ring->next_to_clean,
4087 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 4088 eop,
4089 jiffies,
4090 eop_desc->upper.fields.status);
1da177e4 4091 netif_stop_queue(netdev);
70b8f1e1 4092 }
1da177e4 4093 }
835bb129
JB		 4094 adapter->total_tx_bytes += total_tx_bytes;
4095 adapter->total_tx_packets += total_tx_packets;
1da177e4
LT		 4096 return cleaned;
4097}
4098
4099/**
4100 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 4101 * @adapter: board private structure
4102 * @status_err: receive descriptor status and error fields
4103 * @csum: receive descriptor csum field
4104 * @sk_buff: socket buffer with received data
1da177e4
LT		 4105 **/
4106
e619d523 4107static void
1da177e4 4108e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 4109 uint32_t status_err, uint32_t csum,
4110 struct sk_buff *skb)
1da177e4 4111{
2d7edb92
MC		 4112 uint16_t status = (uint16_t)status_err;
4113 uint8_t errors = (uint8_t)(status_err >> 24);
4114 skb->ip_summed = CHECKSUM_NONE;
4115
1da177e4 4116 /* 82543 or newer only */
96838a40 4117 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 4118 /* Ignore Checksum bit is set */
96838a40 4119 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 4120 /* TCP/UDP checksum error bit is set */
96838a40 4121 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 4122 /* let the stack verify checksum errors */
1da177e4 4123 adapter->hw_csum_err++;
2d7edb92
MC		 4124 return;
4125 }
4126 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 4127 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4128 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 4129 return;
1da177e4 4130 } else {
96838a40 4131 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 4132 return;
4133 }
4134 /* It must be a TCP or UDP packet with a valid checksum */
4135 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 4136 /* TCP checksum is good */
4137 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 4138 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4139 /* IP fragment with UDP payload */
4140 /* Hardware complements the payload checksum, so we undo it
4141 * and then put the value in host order for further stack use.
4142 */
4143 csum = ntohl(csum ^ 0xFFFF);
4144 skb->csum = csum;
84fa7933 4145 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 4146 }
2d7edb92 4147 adapter->hw_csum_good++;
1da177e4
LT		 4148}
4149
4150/**
2d7edb92 4151 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 4152 * @adapter: board private structure
4153 **/
4154
4155static boolean_t
4156#ifdef CONFIG_E1000_NAPI
581d708e
MC		 4157e1000_clean_rx_irq(struct e1000_adapter *adapter,
4158 struct e1000_rx_ring *rx_ring,
4159 int *work_done, int work_to_do)
1da177e4 4160#else
581d708e
MC		 4161e1000_clean_rx_irq(struct e1000_adapter *adapter,
4162 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 4163#endif
4164{
1da177e4
LT		 4165 struct net_device *netdev = adapter->netdev;
4166 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 4167 struct e1000_rx_desc *rx_desc, *next_rxd;
4168 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 4169 unsigned long flags;
4170 uint32_t length;
4171 uint8_t last_byte;
4172 unsigned int i;
72d64a43 4173 int cleaned_count = 0;
a1415ee6 4174 boolean_t cleaned = FALSE;
835bb129 4175 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 4176
4177 i = rx_ring->next_to_clean;
4178 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4179 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4180
b92ff8ee 4181 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4182 struct sk_buff *skb;
a292ca6e 4183 u8 status;
90fb5135 4184
1da177e4 4185#ifdef CONFIG_E1000_NAPI
96838a40 4186 if (*work_done >= work_to_do)
1da177e4
LT		 4187 break;
4188 (*work_done)++;
4189#endif
a292ca6e 4190 status = rx_desc->status;
b92ff8ee 4191 skb = buffer_info->skb;
86c3d59f
JB		 4192 buffer_info->skb = NULL;
4193
30320be8
JK		 4194 prefetch(skb->data - NET_IP_ALIGN);
4195
86c3d59f
JB		 4196 if (++i == rx_ring->count) i = 0;
4197 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4198 prefetch(next_rxd);
4199
86c3d59f 4200 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4201
72d64a43
JK		 4202 cleaned = TRUE;
4203 cleaned_count++;
a292ca6e
JK		 4204 pci_unmap_single(pdev,
4205 buffer_info->dma,
4206 buffer_info->length,
1da177e4
LT		 4207 PCI_DMA_FROMDEVICE);
4208
1da177e4
LT		 4209 length = le16_to_cpu(rx_desc->length);
4210
a1415ee6
JK		 4211 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4212 /* All receives must fit into a single buffer */
4213 E1000_DBG("%s: Receive packet consumed multiple"
4214 " buffers\n", netdev->name);
864c4e45 4215 /* recycle */
8fc897b0 4216 buffer_info->skb = skb;
1da177e4
LT		 4217 goto next_desc;
4218 }
4219
96838a40 4220 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 4221 last_byte = *(skb->data + length - 1);
b92ff8ee 4222 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 4223 rx_desc->errors, length, last_byte)) {
4224 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 4225 e1000_tbi_adjust_stats(&adapter->hw,
4226 &adapter->stats,
1da177e4
LT		 4227 length, skb->data);
4228 spin_unlock_irqrestore(&adapter->stats_lock,
4229 flags);
4230 length--;
4231 } else {
9e2feace
AK		 4232 /* recycle */
4233 buffer_info->skb = skb;
1da177e4
LT		 4234 goto next_desc;
4235 }
1cb5821f 4236 }
1da177e4 4237
d2a1e213
JB		 4238 /* adjust length to remove Ethernet CRC, this must be
4239 * done after the TBI_ACCEPT workaround above */
4240 length -= 4;
4241
835bb129
JB		 4242 /* probably a little skewed due to removing CRC */
4243 total_rx_bytes += length;
4244 total_rx_packets++;
4245
a292ca6e
JK		 4246 /* code added for copybreak, this should improve
4247 * performance for small packets with large amounts
4248 * of reassembly being done in the stack */
1f753861 4249 if (length < copybreak) {
a292ca6e 4250 struct sk_buff *new_skb =
87f5032e 4251 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 4252 if (new_skb) {
4253 skb_reserve(new_skb, NET_IP_ALIGN);
a292ca6e
JK		 4254 memcpy(new_skb->data - NET_IP_ALIGN,
4255 skb->data - NET_IP_ALIGN,
4256 length + NET_IP_ALIGN);
4257 /* save the skb in buffer_info as good */
4258 buffer_info->skb = skb;
4259 skb = new_skb;
a292ca6e 4260 }
996695de
AK		 4261 /* else just continue with the old one */
4262 }
a292ca6e 4263 /* end copybreak code */
996695de 4264 skb_put(skb, length);
1da177e4
LT		 4265
4266 /* Receive Checksum Offload */
a292ca6e
JK		 4267 e1000_rx_checksum(adapter,
4268 (uint32_t)(status) |
2d7edb92 4269 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 4270 le16_to_cpu(rx_desc->csum), skb);
96838a40 4271
1da177e4
LT		 4272 skb->protocol = eth_type_trans(skb, netdev);
4273#ifdef CONFIG_E1000_NAPI
96838a40 4274 if (unlikely(adapter->vlgrp &&
a292ca6e 4275 (status & E1000_RXD_STAT_VP))) {
1da177e4 4276 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 4277 le16_to_cpu(rx_desc->special) &
4278 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 4279 } else {
4280 netif_receive_skb(skb);
4281 }
4282#else /* CONFIG_E1000_NAPI */
96838a40 4283 if (unlikely(adapter->vlgrp &&
b92ff8ee 4284 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 4285 vlan_hwaccel_rx(skb, adapter->vlgrp,
4286 le16_to_cpu(rx_desc->special) &
4287 E1000_RXD_SPC_VLAN_MASK);
4288 } else {
4289 netif_rx(skb);
4290 }
4291#endif /* CONFIG_E1000_NAPI */
4292 netdev->last_rx = jiffies;
4293
4294next_desc:
4295 rx_desc->status = 0;
1da177e4 4296
72d64a43
JK		 4297 /* return some buffers to hardware, one at a time is too slow */
4298 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4299 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4300 cleaned_count = 0;
4301 }
4302
30320be8 4303 /* use prefetched values */
86c3d59f
JB		 4304 rx_desc = next_rxd;
4305 buffer_info = next_buffer;
1da177e4 4306 }
1da177e4 4307 rx_ring->next_to_clean = i;
72d64a43
JK		 4308
4309 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4310 if (cleaned_count)
4311 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4312
835bb129
JB		 4313 adapter->total_rx_packets += total_rx_packets;
4314 adapter->total_rx_bytes += total_rx_bytes;
2d7edb92
MC		 4315 return cleaned;
4316}
4317
4318/**
4319 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4320 * @adapter: board private structure
4321 **/
4322
4323static boolean_t
4324#ifdef CONFIG_E1000_NAPI
581d708e
MC		 4325e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4326 struct e1000_rx_ring *rx_ring,
4327 int *work_done, int work_to_do)
2d7edb92 4328#else
581d708e
MC		 4329e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4330 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 4331#endif
4332{
86c3d59f 4333 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 4334 struct net_device *netdev = adapter->netdev;
4335 struct pci_dev *pdev = adapter->pdev;
86c3d59f 4336 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 4337 struct e1000_ps_page *ps_page;
4338 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 4339 struct sk_buff *skb;
2d7edb92
MC		 4340 unsigned int i, j;
4341 uint32_t length, staterr;
72d64a43 4342 int cleaned_count = 0;
2d7edb92 4343 boolean_t cleaned = FALSE;
835bb129 4344 unsigned int total_rx_bytes=0, total_rx_packets=0;
2d7edb92
MC		 4345
4346 i = rx_ring->next_to_clean;
4347 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 4348 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 4349 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 4350
96838a40 4351 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 4352 ps_page = &rx_ring->ps_page[i];
4353 ps_page_dma = &rx_ring->ps_page_dma[i];
4354#ifdef CONFIG_E1000_NAPI
96838a40 4355 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 4356 break;
4357 (*work_done)++;
4358#endif
86c3d59f
JB		 4359 skb = buffer_info->skb;
4360
30320be8
JK		 4361 /* in the packet split case this is header only */
4362 prefetch(skb->data - NET_IP_ALIGN);
4363
86c3d59f
JB		 4364 if (++i == rx_ring->count) i = 0;
4365 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 4366 prefetch(next_rxd);
4367
86c3d59f 4368 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4369
2d7edb92 4370 cleaned = TRUE;
72d64a43 4371 cleaned_count++;
2d7edb92
MC		 4372 pci_unmap_single(pdev, buffer_info->dma,
4373 buffer_info->length,
4374 PCI_DMA_FROMDEVICE);
4375
96838a40 4376 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 4377 E1000_DBG("%s: Packet Split buffers didn't pick up"
4378 " the full packet\n", netdev->name);
4379 dev_kfree_skb_irq(skb);
4380 goto next_desc;
4381 }
1da177e4 4382
96838a40 4383 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 4384 dev_kfree_skb_irq(skb);
4385 goto next_desc;
4386 }
4387
4388 length = le16_to_cpu(rx_desc->wb.middle.length0);
4389
96838a40 4390 if (unlikely(!length)) {
2d7edb92
MC		 4391 E1000_DBG("%s: Last part of the packet spanning"
4392 " multiple descriptors\n", netdev->name);
4393 dev_kfree_skb_irq(skb);
4394 goto next_desc;
4395 }
4396
4397 /* Good Receive */
4398 skb_put(skb, length);
4399
dc7c6add
JK		 4400 {
4401 /* this looks ugly, but it seems compiler issues make it
4402 more efficient than reusing j */
4403 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4404
4405 /* page alloc/put takes too long and effects small packet
4406 * throughput, so unsplit small packets and save the alloc/put*/
1f753861 4407 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 4408 u8 *vaddr;
76c224bc 4409 /* there is no documentation about how to call
dc7c6add
JK		 4410 * kmap_atomic, so we can't hold the mapping
4411 * very long */
4412 pci_dma_sync_single_for_cpu(pdev,
4413 ps_page_dma->ps_page_dma[0],
4414 PAGE_SIZE,
4415 PCI_DMA_FROMDEVICE);
4416 vaddr = kmap_atomic(ps_page->ps_page[0],
4417 KM_SKB_DATA_SOFTIRQ);
4418 memcpy(skb->tail, vaddr, l1);
4419 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4420 pci_dma_sync_single_for_device(pdev,
4421 ps_page_dma->ps_page_dma[0],
4422 PAGE_SIZE, PCI_DMA_FROMDEVICE);
f235a2ab
AK		 4423 /* remove the CRC */
4424 l1 -= 4;
dc7c6add 4425 skb_put(skb, l1);
dc7c6add
JK		 4426 goto copydone;
4427 } /* if */
4428 }
90fb5135 4429
96838a40 4430 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 4431 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 4432 break;
2d7edb92
MC		 4433 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4434 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4435 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 4436 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4437 length);
2d7edb92 4438 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 4439 skb->len += length;
4440 skb->data_len += length;
5d51b80f 4441 skb->truesize += length;
2d7edb92
MC		 4442 }
4443
f235a2ab
AK		 4444 /* strip the ethernet crc, problem is we're using pages now so
4445 * this whole operation can get a little cpu intensive */
4446 pskb_trim(skb, skb->len - 4);
4447
dc7c6add 4448copydone:
835bb129
JB		 4449 total_rx_bytes += skb->len;
4450 total_rx_packets++;
4451
2d7edb92 4452 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 4453 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 4454 skb->protocol = eth_type_trans(skb, netdev);
4455
96838a40 4456 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 4457 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 4458 adapter->rx_hdr_split++;
2d7edb92 4459#ifdef CONFIG_E1000_NAPI
96838a40 4460 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4461 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 4462 le16_to_cpu(rx_desc->wb.middle.vlan) &
4463 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4464 } else {
4465 netif_receive_skb(skb);
4466 }
4467#else /* CONFIG_E1000_NAPI */
96838a40 4468 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4469 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 4470 le16_to_cpu(rx_desc->wb.middle.vlan) &
4471 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4472 } else {
4473 netif_rx(skb);
4474 }
4475#endif /* CONFIG_E1000_NAPI */
4476 netdev->last_rx = jiffies;
4477
4478next_desc:
c3d7a3a4 4479 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 4480 buffer_info->skb = NULL;
2d7edb92 4481
72d64a43
JK		 4482 /* return some buffers to hardware, one at a time is too slow */
4483 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4484 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4485 cleaned_count = 0;
4486 }
4487
30320be8 4488 /* use prefetched values */
86c3d59f
JB		 4489 rx_desc = next_rxd;
4490 buffer_info = next_buffer;
4491
683a38f3 4492 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 4493 }
4494 rx_ring->next_to_clean = i;
72d64a43
JK		 4495
4496 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4497 if (cleaned_count)
4498 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4 4499
835bb129
JB		 4500 adapter->total_rx_packets += total_rx_packets;
4501 adapter->total_rx_bytes += total_rx_bytes;
1da177e4
LT		 4502 return cleaned;
4503}
4504
4505/**
2d7edb92 4506 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4507 * @adapter: address of board private structure
4508 **/
4509
4510static void
581d708e 4511e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 4512 struct e1000_rx_ring *rx_ring,
a292ca6e 4513 int cleaned_count)
1da177e4 4514{
1da177e4
LT		 4515 struct net_device *netdev = adapter->netdev;
4516 struct pci_dev *pdev = adapter->pdev;
4517 struct e1000_rx_desc *rx_desc;
4518 struct e1000_buffer *buffer_info;
4519 struct sk_buff *skb;
2648345f
MC		 4520 unsigned int i;
4521 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4522
4523 i = rx_ring->next_to_use;
4524 buffer_info = &rx_ring->buffer_info[i];
4525
a292ca6e 4526 while (cleaned_count--) {
ca6f7224
CH		 4527 skb = buffer_info->skb;
4528 if (skb) {
a292ca6e
JK		 4529 skb_trim(skb, 0);
4530 goto map_skb;
4531 }
4532
ca6f7224 4533 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4534 if (unlikely(!skb)) {
1da177e4 4535 /* Better luck next round */
72d64a43 4536 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4537 break;
4538 }
4539
2648345f 4540 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4541 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4542 struct sk_buff *oldskb = skb;
2648345f
MC		 4543 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4544 "at %p\n", bufsz, skb->data);
4545 /* Try again, without freeing the previous */
87f5032e 4546 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4547 /* Failed allocation, critical failure */
1da177e4
LT		 4548 if (!skb) {
4549 dev_kfree_skb(oldskb);
4550 break;
4551 }
2648345f 4552
1da177e4
LT		 4553 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4554 /* give up */
4555 dev_kfree_skb(skb);
4556 dev_kfree_skb(oldskb);
4557 break; /* while !buffer_info->skb */
1da177e4 4558 }
ca6f7224
CH		 4559
4560 /* Use new allocation */
4561 dev_kfree_skb(oldskb);
1da177e4 4562 }
1da177e4
LT		 4563 /* Make buffer alignment 2 beyond a 16 byte boundary
4564 * this will result in a 16 byte aligned IP header after
4565 * the 14 byte MAC header is removed
4566 */
4567 skb_reserve(skb, NET_IP_ALIGN);
4568
1da177e4
LT		 4569 buffer_info->skb = skb;
4570 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4571map_skb:
1da177e4
LT		 4572 buffer_info->dma = pci_map_single(pdev,
4573 skb->data,
4574 adapter->rx_buffer_len,
4575 PCI_DMA_FROMDEVICE);
4576
2648345f
MC		 4577 /* Fix for errata 23, can't cross 64kB boundary */
4578 if (!e1000_check_64k_bound(adapter,
4579 (void *)(unsigned long)buffer_info->dma,
4580 adapter->rx_buffer_len)) {
4581 DPRINTK(RX_ERR, ERR,
4582 "dma align check failed: %u bytes at %p\n",
4583 adapter->rx_buffer_len,
4584 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4585 dev_kfree_skb(skb);
4586 buffer_info->skb = NULL;
4587
2648345f 4588 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4589 adapter->rx_buffer_len,
4590 PCI_DMA_FROMDEVICE);
4591
4592 break; /* while !buffer_info->skb */
4593 }
1da177e4
LT		 4594 rx_desc = E1000_RX_DESC(*rx_ring, i);
4595 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4596
96838a40
JB		 4597 if (unlikely(++i == rx_ring->count))
4598 i = 0;
1da177e4
LT		 4599 buffer_info = &rx_ring->buffer_info[i];
4600 }
4601
b92ff8ee
JB		 4602 if (likely(rx_ring->next_to_use != i)) {
4603 rx_ring->next_to_use = i;
4604 if (unlikely(i-- == 0))
4605 i = (rx_ring->count - 1);
4606
4607 /* Force memory writes to complete before letting h/w
4608 * know there are new descriptors to fetch. (Only
4609 * applicable for weak-ordered memory model archs,
4610 * such as IA-64). */
4611 wmb();
4612 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4613 }
1da177e4
LT		 4614}
4615
2d7edb92
MC		 4616/**
4617 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4618 * @adapter: address of board private structure
4619 **/
4620
4621static void
581d708e 4622e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4623 struct e1000_rx_ring *rx_ring,
4624 int cleaned_count)
2d7edb92 4625{
2d7edb92
MC		 4626 struct net_device *netdev = adapter->netdev;
4627 struct pci_dev *pdev = adapter->pdev;
4628 union e1000_rx_desc_packet_split *rx_desc;
4629 struct e1000_buffer *buffer_info;
4630 struct e1000_ps_page *ps_page;
4631 struct e1000_ps_page_dma *ps_page_dma;
4632 struct sk_buff *skb;
4633 unsigned int i, j;
4634
4635 i = rx_ring->next_to_use;
4636 buffer_info = &rx_ring->buffer_info[i];
4637 ps_page = &rx_ring->ps_page[i];
4638 ps_page_dma = &rx_ring->ps_page_dma[i];
4639
72d64a43 4640 while (cleaned_count--) {
2d7edb92
MC		 4641 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4642
96838a40 4643 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4644 if (j < adapter->rx_ps_pages) {
4645 if (likely(!ps_page->ps_page[j])) {
4646 ps_page->ps_page[j] =
4647 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4648 if (unlikely(!ps_page->ps_page[j])) {
4649 adapter->alloc_rx_buff_failed++;
e4c811c9 4650 goto no_buffers;
b92ff8ee 4651 }
e4c811c9
MC		 4652 ps_page_dma->ps_page_dma[j] =
4653 pci_map_page(pdev,
4654 ps_page->ps_page[j],
4655 0, PAGE_SIZE,
4656 PCI_DMA_FROMDEVICE);
4657 }
4658 /* Refresh the desc even if buffer_addrs didn't
96838a40 4659 * change because each write-back erases
e4c811c9
MC		 4660 * this info.
4661 */
4662 rx_desc->read.buffer_addr[j+1] =
4663 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4664 } else
4665 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4666 }
4667
87f5032e 4668 skb = netdev_alloc_skb(netdev,
90fb5135 4669 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
2d7edb92 4670
b92ff8ee
JB		 4671 if (unlikely(!skb)) {
4672 adapter->alloc_rx_buff_failed++;
2d7edb92 4673 break;
b92ff8ee 4674 }
2d7edb92
MC		 4675
4676 /* Make buffer alignment 2 beyond a 16 byte boundary
4677 * this will result in a 16 byte aligned IP header after
4678 * the 14 byte MAC header is removed
4679 */
4680 skb_reserve(skb, NET_IP_ALIGN);
4681
2d7edb92
MC		 4682 buffer_info->skb = skb;
4683 buffer_info->length = adapter->rx_ps_bsize0;
4684 buffer_info->dma = pci_map_single(pdev, skb->data,
4685 adapter->rx_ps_bsize0,
4686 PCI_DMA_FROMDEVICE);
4687
4688 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4689
96838a40 4690 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4691 buffer_info = &rx_ring->buffer_info[i];
4692 ps_page = &rx_ring->ps_page[i];
4693 ps_page_dma = &rx_ring->ps_page_dma[i];
4694 }
4695
4696no_buffers:
b92ff8ee
JB		 4697 if (likely(rx_ring->next_to_use != i)) {
4698 rx_ring->next_to_use = i;
4699 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4700
4701 /* Force memory writes to complete before letting h/w
4702 * know there are new descriptors to fetch. (Only
4703 * applicable for weak-ordered memory model archs,
4704 * such as IA-64). */
4705 wmb();
4706 /* Hardware increments by 16 bytes, but packet split
4707 * descriptors are 32 bytes...so we increment tail
4708 * twice as much.
4709 */
4710 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4711 }
2d7edb92
MC		 4712}
4713
1da177e4
LT		 4714/**
4715 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4716 * @adapter:
4717 **/
4718
4719static void
4720e1000_smartspeed(struct e1000_adapter *adapter)
4721{
4722 uint16_t phy_status;
4723 uint16_t phy_ctrl;
4724
96838a40 4725 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4726 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4727 return;
4728
96838a40 4729 if (adapter->smartspeed == 0) {
1da177e4
LT		 4730 /* If Master/Slave config fault is asserted twice,
4731 * we assume back-to-back */
4732 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4733 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4734 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4735 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4736 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4737 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4738 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4739 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4740 phy_ctrl);
4741 adapter->smartspeed++;
96838a40 4742 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4743 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4744 &phy_ctrl)) {
4745 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4746 MII_CR_RESTART_AUTO_NEG);
4747 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4748 phy_ctrl);
4749 }
4750 }
4751 return;
96838a40 4752 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4753 /* If still no link, perhaps using 2/3 pair cable */
4754 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4755 phy_ctrl |= CR_1000T_MS_ENABLE;
4756 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4757 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4758 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4759 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4760 MII_CR_RESTART_AUTO_NEG);
4761 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4762 }
4763 }
4764 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4765 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4766 adapter->smartspeed = 0;
4767}
4768
4769/**
4770 * e1000_ioctl -
4771 * @netdev:
4772 * @ifreq:
4773 * @cmd:
4774 **/
4775
4776static int
4777e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4778{
4779 switch (cmd) {
4780 case SIOCGMIIPHY:
4781 case SIOCGMIIREG:
4782 case SIOCSMIIREG:
4783 return e1000_mii_ioctl(netdev, ifr, cmd);
4784 default:
4785 return -EOPNOTSUPP;
4786 }
4787}
4788
4789/**
4790 * e1000_mii_ioctl -
4791 * @netdev:
4792 * @ifreq:
4793 * @cmd:
4794 **/
4795
4796static int
4797e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4798{
60490fe0 4799 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4800 struct mii_ioctl_data *data = if_mii(ifr);
4801 int retval;
4802 uint16_t mii_reg;
4803 uint16_t spddplx;
97876fc6 4804 unsigned long flags;
1da177e4 4805
96838a40 4806 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4807 return -EOPNOTSUPP;
4808
4809 switch (cmd) {
4810 case SIOCGMIIPHY:
4811 data->phy_id = adapter->hw.phy_addr;
4812 break;
4813 case SIOCGMIIREG:
96838a40 4814 if (!capable(CAP_NET_ADMIN))
1da177e4 4815 return -EPERM;
97876fc6 4816 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4817 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4818 &data->val_out)) {
4819 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4820 return -EIO;
97876fc6
MC		 4821 }
4822 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4823 break;
4824 case SIOCSMIIREG:
96838a40 4825 if (!capable(CAP_NET_ADMIN))
1da177e4 4826 return -EPERM;
96838a40 4827 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4828 return -EFAULT;
4829 mii_reg = data->val_in;
97876fc6 4830 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4831 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4832 mii_reg)) {
4833 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4834 return -EIO;
97876fc6 4835 }
dc86d32a 4836 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4837 switch (data->reg_num) {
4838 case PHY_CTRL:
96838a40 4839 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4840 break;
96838a40 4841 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4842 adapter->hw.autoneg = 1;
4843 adapter->hw.autoneg_advertised = 0x2F;
4844 } else {
4845 if (mii_reg & 0x40)
4846 spddplx = SPEED_1000;
4847 else if (mii_reg & 0x2000)
4848 spddplx = SPEED_100;
4849 else
4850 spddplx = SPEED_10;
4851 spddplx += (mii_reg & 0x100)
cb764326
JK		 4852 ? DUPLEX_FULL :
4853 DUPLEX_HALF;
1da177e4
LT		 4854 retval = e1000_set_spd_dplx(adapter,
4855 spddplx);
96838a40 4856 if (retval) {
97876fc6 4857 spin_unlock_irqrestore(
96838a40 4858 &adapter->stats_lock,
97876fc6 4859 flags);
1da177e4 4860 return retval;
97876fc6 4861 }
1da177e4 4862 }
2db10a08
AK		 4863 if (netif_running(adapter->netdev))
4864 e1000_reinit_locked(adapter);
4865 else
1da177e4
LT		 4866 e1000_reset(adapter);
4867 break;
4868 case M88E1000_PHY_SPEC_CTRL:
4869 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4870 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4871 spin_unlock_irqrestore(
4872 &adapter->stats_lock, flags);
1da177e4 4873 return -EIO;
97876fc6 4874 }
1da177e4
LT		 4875 break;
4876 }
4877 } else {
4878 switch (data->reg_num) {
4879 case PHY_CTRL:
96838a40 4880 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4881 break;
2db10a08
AK		 4882 if (netif_running(adapter->netdev))
4883 e1000_reinit_locked(adapter);
4884 else
1da177e4
LT		 4885 e1000_reset(adapter);
4886 break;
4887 }
4888 }
97876fc6 4889 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4890 break;
4891 default:
4892 return -EOPNOTSUPP;
4893 }
4894 return E1000_SUCCESS;
4895}
4896
4897void
4898e1000_pci_set_mwi(struct e1000_hw *hw)
4899{
4900 struct e1000_adapter *adapter = hw->back;
2648345f 4901 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4902
96838a40 4903 if (ret_val)
2648345f 4904 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4905}
4906
4907void
4908e1000_pci_clear_mwi(struct e1000_hw *hw)
4909{
4910 struct e1000_adapter *adapter = hw->back;
4911
4912 pci_clear_mwi(adapter->pdev);
4913}
4914
4915void
4916e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4917{
4918 struct e1000_adapter *adapter = hw->back;
4919
4920 pci_read_config_word(adapter->pdev, reg, value);
4921}
4922
4923void
4924e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4925{
4926 struct e1000_adapter *adapter = hw->back;
4927
4928 pci_write_config_word(adapter->pdev, reg, *value);
4929}
4930
caeccb68
JK		 4931int32_t
4932e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4933{
4934 struct e1000_adapter *adapter = hw->back;
4935 uint16_t cap_offset;
4936
4937 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4938 if (!cap_offset)
4939 return -E1000_ERR_CONFIG;
4940
4941 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4942
4943 return E1000_SUCCESS;
4944}
4945
1da177e4
LT		 4946void
4947e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4948{
4949 outl(value, port);
4950}
4951
4952static void
4953e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4954{
60490fe0 4955 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4956 uint32_t ctrl, rctl;
4957
4958 e1000_irq_disable(adapter);
4959 adapter->vlgrp = grp;
4960
96838a40 4961 if (grp) {
1da177e4
LT		 4962 /* enable VLAN tag insert/strip */
4963 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4964 ctrl |= E1000_CTRL_VME;
4965 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4966
cd94dd0b 4967 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 4968 /* enable VLAN receive filtering */
4969 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4970 rctl |= E1000_RCTL_VFE;
4971 rctl &= ~E1000_RCTL_CFIEN;
4972 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4973 e1000_update_mng_vlan(adapter);
cd94dd0b 4974 }
1da177e4
LT		 4975 } else {
4976 /* disable VLAN tag insert/strip */
4977 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4978 ctrl &= ~E1000_CTRL_VME;
4979 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4980
cd94dd0b 4981 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 4982 /* disable VLAN filtering */
4983 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4984 rctl &= ~E1000_RCTL_VFE;
4985 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4986 if (adapter->mng_vlan_id !=
4987 (uint16_t)E1000_MNG_VLAN_NONE) {
4988 e1000_vlan_rx_kill_vid(netdev,
4989 adapter->mng_vlan_id);
4990 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4991 }
cd94dd0b 4992 }
1da177e4
LT		 4993 }
4994
4995 e1000_irq_enable(adapter);
4996}
4997
4998static void
4999e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
5000{
60490fe0 5001 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 5002 uint32_t vfta, index;
96838a40
JB		 5003
5004 if ((adapter->hw.mng_cookie.status &
5005 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5006 (vid == adapter->mng_vlan_id))
2d7edb92 5007 return;
1da177e4
LT		 5008 /* add VID to filter table */
5009 index = (vid >> 5) & 0x7F;
5010 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5011 vfta |= (1 << (vid & 0x1F));
5012 e1000_write_vfta(&adapter->hw, index, vfta);
5013}
5014
5015static void
5016e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
5017{
60490fe0 5018 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 5019 uint32_t vfta, index;
5020
5021 e1000_irq_disable(adapter);
5c15bdec 5022 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1da177e4
LT		 5023 e1000_irq_enable(adapter);
5024
96838a40
JB		 5025 if ((adapter->hw.mng_cookie.status &
5026 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 5027 (vid == adapter->mng_vlan_id)) {
5028 /* release control to f/w */
5029 e1000_release_hw_control(adapter);
2d7edb92 5030 return;
ff147013
JK		 5031 }
5032
1da177e4
LT		 5033 /* remove VID from filter table */
5034 index = (vid >> 5) & 0x7F;
5035 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5036 vfta &= ~(1 << (vid & 0x1F));
5037 e1000_write_vfta(&adapter->hw, index, vfta);
5038}
5039
5040static void
5041e1000_restore_vlan(struct e1000_adapter *adapter)
5042{
5043 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5044
96838a40 5045 if (adapter->vlgrp) {
1da177e4 5046 uint16_t vid;
96838a40 5047 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 5048 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 5049 continue;
5050 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5051 }
5052 }
5053}
5054
5055int
5056e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5057{
5058 adapter->hw.autoneg = 0;
5059
6921368f 5060 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 5061 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 5062 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5063 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5064 return -EINVAL;
5065 }
5066
96838a40 5067 switch (spddplx) {
1da177e4
LT		 5068 case SPEED_10 + DUPLEX_HALF:
5069 adapter->hw.forced_speed_duplex = e1000_10_half;
5070 break;
5071 case SPEED_10 + DUPLEX_FULL:
5072 adapter->hw.forced_speed_duplex = e1000_10_full;
5073 break;
5074 case SPEED_100 + DUPLEX_HALF:
5075 adapter->hw.forced_speed_duplex = e1000_100_half;
5076 break;
5077 case SPEED_100 + DUPLEX_FULL:
5078 adapter->hw.forced_speed_duplex = e1000_100_full;
5079 break;
5080 case SPEED_1000 + DUPLEX_FULL:
5081 adapter->hw.autoneg = 1;
5082 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5083 break;
5084 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5085 default:
2648345f 5086 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 5087 return -EINVAL;
5088 }
5089 return 0;
5090}
5091
1da177e4 5092static int
829ca9a3 5093e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 5094{
5095 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5096 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9 5097 uint32_t ctrl, ctrl_ext, rctl, status;
1da177e4 5098 uint32_t wufc = adapter->wol;
6fdfef16 5099#ifdef CONFIG_PM
240b1710 5100 int retval = 0;
6fdfef16 5101#endif
1da177e4
LT		 5102
5103 netif_device_detach(netdev);
5104
2db10a08
AK		 5105 if (netif_running(netdev)) {
5106 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 5107 e1000_down(adapter);
2db10a08 5108 }
1da177e4 5109
2f82665f 5110#ifdef CONFIG_PM
1d33e9c6 5111 retval = pci_save_state(pdev);
2f82665f
JB		 5112 if (retval)
5113 return retval;
5114#endif
5115
1da177e4 5116 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 5117 if (status & E1000_STATUS_LU)
1da177e4
LT		 5118 wufc &= ~E1000_WUFC_LNKC;
5119
96838a40 5120 if (wufc) {
1da177e4
LT		 5121 e1000_setup_rctl(adapter);
5122 e1000_set_multi(netdev);
5123
5124 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 5125 if (wufc & E1000_WUFC_MC) {
1da177e4
LT		 5126 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5127 rctl |= E1000_RCTL_MPE;
5128 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5129 }
5130
96838a40 5131 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 5132 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5133 /* advertise wake from D3Cold */
5134 #define E1000_CTRL_ADVD3WUC 0x00100000
5135 /* phy power management enable */
5136 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5137 ctrl |= E1000_CTRL_ADVD3WUC |
5138 E1000_CTRL_EN_PHY_PWR_MGMT;
5139 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5140 }
5141
96838a40 5142 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 5143 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5144 /* keep the laser running in D3 */
5145 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5146 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5147 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5148 }
5149
2d7edb92
MC		 5150 /* Allow time for pending master requests to run */
5151 e1000_disable_pciex_master(&adapter->hw);
5152
1da177e4
LT		 5153 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5154 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 5155 pci_enable_wake(pdev, PCI_D3hot, 1);
5156 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 5157 } else {
5158 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5159 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 5160 pci_enable_wake(pdev, PCI_D3hot, 0);
5161 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 5162 }
5163
0fccd0e9
JG		 5164 e1000_release_manageability(adapter);
5165
5166 /* make sure adapter isn't asleep if manageability is enabled */
5167 if (adapter->en_mng_pt) {
5168 pci_enable_wake(pdev, PCI_D3hot, 1);
5169 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 5170 }
5171
cd94dd0b
AK		 5172 if (adapter->hw.phy_type == e1000_phy_igp_3)
5173 e1000_phy_powerdown_workaround(&adapter->hw);
5174
edd106fc
AK		 5175 if (netif_running(netdev))
5176 e1000_free_irq(adapter);
5177
b55ccb35
JK		 5178 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5179 * would have already happened in close and is redundant. */
5180 e1000_release_hw_control(adapter);
2d7edb92 5181
1da177e4 5182 pci_disable_device(pdev);
240b1710 5183
d0e027db 5184 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 5185
5186 return 0;
5187}
5188
2f82665f 5189#ifdef CONFIG_PM
1da177e4
LT		 5190static int
5191e1000_resume(struct pci_dev *pdev)
5192{
5193 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5194 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9 5195 uint32_t err;
1da177e4 5196
d0e027db 5197 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 5198 pci_restore_state(pdev);
3d1dd8cb
AK		 5199 if ((err = pci_enable_device(pdev))) {
5200 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5201 return err;
5202 }
a4cb847d 5203 pci_set_master(pdev);
1da177e4 5204
d0e027db
AK		 5205 pci_enable_wake(pdev, PCI_D3hot, 0);
5206 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 5207
edd106fc
AK		 5208 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5209 return err;
5210
5211 e1000_power_up_phy(adapter);
1da177e4
LT		 5212 e1000_reset(adapter);
5213 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5214
0fccd0e9
JG		 5215 e1000_init_manageability(adapter);
5216
96838a40 5217 if (netif_running(netdev))
1da177e4
LT		 5218 e1000_up(adapter);
5219
5220 netif_device_attach(netdev);
5221
b55ccb35
JK		 5222 /* If the controller is 82573 and f/w is AMT, do not set
5223 * DRV_LOAD until the interface is up. For all other cases,
5224 * let the f/w know that the h/w is now under the control
5225 * of the driver. */
5226 if (adapter->hw.mac_type != e1000_82573 ||
5227 !e1000_check_mng_mode(&adapter->hw))
5228 e1000_get_hw_control(adapter);
2d7edb92 5229
1da177e4
LT		 5230 return 0;
5231}
5232#endif
c653e635
AK		 5233
5234static void e1000_shutdown(struct pci_dev *pdev)
5235{
5236 e1000_suspend(pdev, PMSG_SUSPEND);
5237}
5238
1da177e4
LT		 5239#ifdef CONFIG_NET_POLL_CONTROLLER
5240/*
5241 * Polling 'interrupt' - used by things like netconsole to send skbs
5242 * without having to re-enable interrupts. It's not called while
5243 * the interrupt routine is executing.
5244 */
5245static void
2648345f 5246e1000_netpoll(struct net_device *netdev)
1da177e4 5247{
60490fe0 5248 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 5249
1da177e4 5250 disable_irq(adapter->pdev->irq);
7d12e780 5251 e1000_intr(adapter->pdev->irq, netdev);
c4cfe567 5252 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 5253#ifndef CONFIG_E1000_NAPI
5254 adapter->clean_rx(adapter, adapter->rx_ring);
5255#endif
1da177e4
LT		 5256 enable_irq(adapter->pdev->irq);
5257}
5258#endif
5259
9026729b
AK		 5260/**
5261 * e1000_io_error_detected - called when PCI error is detected
5262 * @pdev: Pointer to PCI device
5263 * @state: The current pci conneection state
5264 *
5265 * This function is called after a PCI bus error affecting
5266 * this device has been detected.
5267 */
5268static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5269{
5270 struct net_device *netdev = pci_get_drvdata(pdev);
5271 struct e1000_adapter *adapter = netdev->priv;
5272
5273 netif_device_detach(netdev);
5274
5275 if (netif_running(netdev))
5276 e1000_down(adapter);
72e8d6bb 5277 pci_disable_device(pdev);
9026729b
AK		 5278
5279 /* Request a slot slot reset. */
5280 return PCI_ERS_RESULT_NEED_RESET;
5281}
5282
5283/**
5284 * e1000_io_slot_reset - called after the pci bus has been reset.
5285 * @pdev: Pointer to PCI device
5286 *
5287 * Restart the card from scratch, as if from a cold-boot. Implementation
5288 * resembles the first-half of the e1000_resume routine.
5289 */
5290static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5291{
5292 struct net_device *netdev = pci_get_drvdata(pdev);
5293 struct e1000_adapter *adapter = netdev->priv;
5294
5295 if (pci_enable_device(pdev)) {
5296 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5297 return PCI_ERS_RESULT_DISCONNECT;
5298 }
5299 pci_set_master(pdev);
5300
dbf38c94
LV		 5301 pci_enable_wake(pdev, PCI_D3hot, 0);
5302 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 5303
9026729b
AK		 5304 e1000_reset(adapter);
5305 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5306
5307 return PCI_ERS_RESULT_RECOVERED;
5308}
5309
5310/**
5311 * e1000_io_resume - called when traffic can start flowing again.
5312 * @pdev: Pointer to PCI device
5313 *
5314 * This callback is called when the error recovery driver tells us that
5315 * its OK to resume normal operation. Implementation resembles the
5316 * second-half of the e1000_resume routine.
5317 */
5318static void e1000_io_resume(struct pci_dev *pdev)
5319{
5320 struct net_device *netdev = pci_get_drvdata(pdev);
5321 struct e1000_adapter *adapter = netdev->priv;
0fccd0e9
JG		 5322
5323 e1000_init_manageability(adapter);
9026729b
AK		 5324
5325 if (netif_running(netdev)) {
5326 if (e1000_up(adapter)) {
5327 printk("e1000: can't bring device back up after reset\n");
5328 return;
5329 }
5330 }
5331
5332 netif_device_attach(netdev);
5333
0fccd0e9
JG		 5334 /* If the controller is 82573 and f/w is AMT, do not set
5335 * DRV_LOAD until the interface is up. For all other cases,
5336 * let the f/w know that the h/w is now under the control
5337 * of the driver. */
5338 if (adapter->hw.mac_type != e1000_82573 ||
5339 !e1000_check_mng_mode(&adapter->hw))
5340 e1000_get_hw_control(adapter);
9026729b 5341
9026729b
AK		 5342}
5343
1da177e4 5344/* e1000_main.c */
Linux kernel - Deliverables
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