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Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 34#ifndef CONFIG_E1000_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
7e721579 39#define DRV_VERSION "7.3.20-k2"DRIVERNAPI
1da177e4 40char e1000_driver_version[] = DRV_VERSION;
3d41e30a 41static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 42
43/* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
ae2c3860
AK		 76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
07b8fede
MC		 81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
5881cde8 102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
ce57a02c 103 INTEL_E1000_ETHERNET_DEVICE(0x10A5),
b7ee49db 104 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 105 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
ae2c3860
AK		 106 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
fc2307d0
AK		 108 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
110 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
ce57a02c
AK		 111 INTEL_E1000_ETHERNET_DEVICE(0x10D9),
112 INTEL_E1000_ETHERNET_DEVICE(0x10DA),
1da177e4
LT		 113 /* required last entry */
114 {0,}
115};
116
117MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
118
35574764
NN		 119int e1000_up(struct e1000_adapter *adapter);
120void e1000_down(struct e1000_adapter *adapter);
121void e1000_reinit_locked(struct e1000_adapter *adapter);
122void e1000_reset(struct e1000_adapter *adapter);
123int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
124int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
125int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
126void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
127void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 128static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 129 struct e1000_tx_ring *txdr);
3ad2cc67 130static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 131 struct e1000_rx_ring *rxdr);
3ad2cc67 132static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 133 struct e1000_tx_ring *tx_ring);
3ad2cc67 134static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 135 struct e1000_rx_ring *rx_ring);
136void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 137
138static int e1000_init_module(void);
139static void e1000_exit_module(void);
140static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
141static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 142static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 143static int e1000_sw_init(struct e1000_adapter *adapter);
144static int e1000_open(struct net_device *netdev);
145static int e1000_close(struct net_device *netdev);
146static void e1000_configure_tx(struct e1000_adapter *adapter);
147static void e1000_configure_rx(struct e1000_adapter *adapter);
148static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 149static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
150static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
151static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
152 struct e1000_tx_ring *tx_ring);
153static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
154 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 155static void e1000_set_multi(struct net_device *netdev);
156static void e1000_update_phy_info(unsigned long data);
157static void e1000_watchdog(unsigned long data);
1da177e4
LT		 158static void e1000_82547_tx_fifo_stall(unsigned long data);
159static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
160static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
161static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
162static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 163static irqreturn_t e1000_intr(int irq, void *data);
9ac98284 164static irqreturn_t e1000_intr_msi(int irq, void *data);
581d708e
MC		 165static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
166 struct e1000_tx_ring *tx_ring);
1da177e4 167#ifdef CONFIG_E1000_NAPI
581d708e 168static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 169static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 170 struct e1000_rx_ring *rx_ring,
1da177e4 171 int *work_done, int work_to_do);
2d7edb92 172static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 173 struct e1000_rx_ring *rx_ring,
2d7edb92 174 int *work_done, int work_to_do);
1da177e4 175#else
581d708e
MC		 176static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
177 struct e1000_rx_ring *rx_ring);
178static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
179 struct e1000_rx_ring *rx_ring);
1da177e4 180#endif
581d708e 181static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 182 struct e1000_rx_ring *rx_ring,
183 int cleaned_count);
581d708e 184static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 185 struct e1000_rx_ring *rx_ring,
186 int cleaned_count);
1da177e4
LT		 187static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
188static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
189 int cmd);
35574764 190void e1000_set_ethtool_ops(struct net_device *netdev);
1da177e4
LT		 191static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
192static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
193static void e1000_tx_timeout(struct net_device *dev);
65f27f38 194static void e1000_reset_task(struct work_struct *work);
1da177e4 195static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 196static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
197 struct sk_buff *skb);
1da177e4
LT		 198
199static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
200static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
201static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
202static void e1000_restore_vlan(struct e1000_adapter *adapter);
203
977e74b5 204static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 205#ifdef CONFIG_PM
1da177e4
LT		 206static int e1000_resume(struct pci_dev *pdev);
207#endif
c653e635 208static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 209
210#ifdef CONFIG_NET_POLL_CONTROLLER
211/* for netdump / net console */
212static void e1000_netpoll (struct net_device *netdev);
213#endif
214
35574764
NN		 215extern void e1000_check_options(struct e1000_adapter *adapter);
216
1f753861
JB		 217#define COPYBREAK_DEFAULT 256
218static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
219module_param(copybreak, uint, 0644);
220MODULE_PARM_DESC(copybreak,
221 "Maximum size of packet that is copied to a new buffer on receive");
222
9026729b
AK		 223static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
224 pci_channel_state_t state);
225static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
226static void e1000_io_resume(struct pci_dev *pdev);
227
228static struct pci_error_handlers e1000_err_handler = {
229 .error_detected = e1000_io_error_detected,
230 .slot_reset = e1000_io_slot_reset,
231 .resume = e1000_io_resume,
232};
24025e4e 233
1da177e4
LT		 234static struct pci_driver e1000_driver = {
235 .name = e1000_driver_name,
236 .id_table = e1000_pci_tbl,
237 .probe = e1000_probe,
238 .remove = __devexit_p(e1000_remove),
c4e24f01 239#ifdef CONFIG_PM
1da177e4 240 /* Power Managment Hooks */
1da177e4 241 .suspend = e1000_suspend,
c653e635 242 .resume = e1000_resume,
1da177e4 243#endif
9026729b
AK		 244 .shutdown = e1000_shutdown,
245 .err_handler = &e1000_err_handler
1da177e4
LT		 246};
247
248MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
249MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
250MODULE_LICENSE("GPL");
251MODULE_VERSION(DRV_VERSION);
252
253static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
254module_param(debug, int, 0);
255MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
256
257/**
258 * e1000_init_module - Driver Registration Routine
259 *
260 * e1000_init_module is the first routine called when the driver is
261 * loaded. All it does is register with the PCI subsystem.
262 **/
263
264static int __init
265e1000_init_module(void)
266{
267 int ret;
268 printk(KERN_INFO "%s - version %s\n",
269 e1000_driver_string, e1000_driver_version);
270
271 printk(KERN_INFO "%s\n", e1000_copyright);
272
29917620 273 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 274 if (copybreak != COPYBREAK_DEFAULT) {
275 if (copybreak == 0)
276 printk(KERN_INFO "e1000: copybreak disabled\n");
277 else
278 printk(KERN_INFO "e1000: copybreak enabled for "
279 "packets <= %u bytes\n", copybreak);
280 }
1da177e4
LT		 281 return ret;
282}
283
284module_init(e1000_init_module);
285
286/**
287 * e1000_exit_module - Driver Exit Cleanup Routine
288 *
289 * e1000_exit_module is called just before the driver is removed
290 * from memory.
291 **/
292
293static void __exit
294e1000_exit_module(void)
295{
1da177e4
LT		 296 pci_unregister_driver(&e1000_driver);
297}
298
299module_exit(e1000_exit_module);
300
2db10a08
AK		 301static int e1000_request_irq(struct e1000_adapter *adapter)
302{
303 struct net_device *netdev = adapter->netdev;
e94bd23f
AK		 304 void (*handler) = &e1000_intr;
305 int irq_flags = IRQF_SHARED;
306 int err;
2db10a08 307
9ac98284 308 if (adapter->hw.mac_type >= e1000_82571) {
e94bd23f
AK		 309 adapter->have_msi = !pci_enable_msi(adapter->pdev);
310 if (adapter->have_msi) {
311 handler = &e1000_intr_msi;
312 irq_flags = 0;
2db10a08
AK		 313 }
314 }
e94bd23f
AK		 315
316 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
317 netdev);
318 if (err) {
319 if (adapter->have_msi)
320 pci_disable_msi(adapter->pdev);
2db10a08
AK		 321 DPRINTK(PROBE, ERR,
322 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 323 }
2db10a08
AK		 324
325 return err;
326}
327
328static void e1000_free_irq(struct e1000_adapter *adapter)
329{
330 struct net_device *netdev = adapter->netdev;
331
332 free_irq(adapter->pdev->irq, netdev);
333
2db10a08
AK		 334 if (adapter->have_msi)
335 pci_disable_msi(adapter->pdev);
2db10a08
AK		 336}
337
1da177e4
LT		 338/**
339 * e1000_irq_disable - Mask off interrupt generation on the NIC
340 * @adapter: board private structure
341 **/
342
e619d523 343static void
1da177e4
LT		 344e1000_irq_disable(struct e1000_adapter *adapter)
345{
346 atomic_inc(&adapter->irq_sem);
347 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
348 E1000_WRITE_FLUSH(&adapter->hw);
349 synchronize_irq(adapter->pdev->irq);
350}
351
352/**
353 * e1000_irq_enable - Enable default interrupt generation settings
354 * @adapter: board private structure
355 **/
356
e619d523 357static void
1da177e4
LT		 358e1000_irq_enable(struct e1000_adapter *adapter)
359{
96838a40 360 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 361 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
362 E1000_WRITE_FLUSH(&adapter->hw);
363 }
364}
3ad2cc67
AB		 365
366static void
2d7edb92
MC		 367e1000_update_mng_vlan(struct e1000_adapter *adapter)
368{
369 struct net_device *netdev = adapter->netdev;
370 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
371 uint16_t old_vid = adapter->mng_vlan_id;
96838a40 372 if (adapter->vlgrp) {
5c15bdec 373 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
96838a40 374 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 375 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
376 e1000_vlan_rx_add_vid(netdev, vid);
377 adapter->mng_vlan_id = vid;
378 } else
379 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 380
381 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
382 (vid != old_vid) &&
5c15bdec 383 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 384 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 385 } else
386 adapter->mng_vlan_id = vid;
2d7edb92
MC		 387 }
388}
b55ccb35
JK		 389
390/**
391 * e1000_release_hw_control - release control of the h/w to f/w
392 * @adapter: address of board private structure
393 *
394 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
395 * For ASF and Pass Through versions of f/w this means that the
396 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 397 * of the f/w this means that the network i/f is closed.
76c224bc 398 *
b55ccb35
JK		 399 **/
400
e619d523 401static void
b55ccb35
JK		 402e1000_release_hw_control(struct e1000_adapter *adapter)
403{
404 uint32_t ctrl_ext;
405 uint32_t swsm;
406
407 /* Let firmware taken over control of h/w */
408 switch (adapter->hw.mac_type) {
b55ccb35
JK		 409 case e1000_82573:
410 swsm = E1000_READ_REG(&adapter->hw, SWSM);
411 E1000_WRITE_REG(&adapter->hw, SWSM,
412 swsm & ~E1000_SWSM_DRV_LOAD);
31d76442
BA		 413 break;
414 case e1000_82571:
415 case e1000_82572:
416 case e1000_80003es2lan:
cd94dd0b 417 case e1000_ich8lan:
31d76442 418 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
cd94dd0b 419 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
31d76442 420 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 421 break;
b55ccb35
JK		 422 default:
423 break;
424 }
425}
426
427/**
428 * e1000_get_hw_control - get control of the h/w from f/w
429 * @adapter: address of board private structure
430 *
431 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 432 * For ASF and Pass Through versions of f/w this means that
433 * the driver is loaded. For AMT version (only with 82573)
90fb5135 434 * of the f/w this means that the network i/f is open.
76c224bc 435 *
b55ccb35
JK		 436 **/
437
e619d523 438static void
b55ccb35
JK		 439e1000_get_hw_control(struct e1000_adapter *adapter)
440{
441 uint32_t ctrl_ext;
442 uint32_t swsm;
90fb5135 443
b55ccb35
JK		 444 /* Let firmware know the driver has taken over */
445 switch (adapter->hw.mac_type) {
b55ccb35
JK		 446 case e1000_82573:
447 swsm = E1000_READ_REG(&adapter->hw, SWSM);
448 E1000_WRITE_REG(&adapter->hw, SWSM,
449 swsm | E1000_SWSM_DRV_LOAD);
450 break;
31d76442
BA		 451 case e1000_82571:
452 case e1000_82572:
453 case e1000_80003es2lan:
cd94dd0b 454 case e1000_ich8lan:
31d76442
BA		 455 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
456 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
457 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 458 break;
b55ccb35
JK		 459 default:
460 break;
461 }
462}
463
0fccd0e9
JG		 464static void
465e1000_init_manageability(struct e1000_adapter *adapter)
466{
467 if (adapter->en_mng_pt) {
468 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
469
470 /* disable hardware interception of ARP */
471 manc &= ~(E1000_MANC_ARP_EN);
472
473 /* enable receiving management packets to the host */
474 /* this will probably generate destination unreachable messages
475 * from the host OS, but the packets will be handled on SMBUS */
476 if (adapter->hw.has_manc2h) {
477 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
478
479 manc |= E1000_MANC_EN_MNG2HOST;
480#define E1000_MNG2HOST_PORT_623 (1 << 5)
481#define E1000_MNG2HOST_PORT_664 (1 << 6)
482 manc2h |= E1000_MNG2HOST_PORT_623;
483 manc2h |= E1000_MNG2HOST_PORT_664;
484 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
485 }
486
487 E1000_WRITE_REG(&adapter->hw, MANC, manc);
488 }
489}
490
491static void
492e1000_release_manageability(struct e1000_adapter *adapter)
493{
494 if (adapter->en_mng_pt) {
495 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
496
497 /* re-enable hardware interception of ARP */
498 manc |= E1000_MANC_ARP_EN;
499
500 if (adapter->hw.has_manc2h)
501 manc &= ~E1000_MANC_EN_MNG2HOST;
502
503 /* don't explicitly have to mess with MANC2H since
504 * MANC has an enable disable that gates MANC2H */
505
506 E1000_WRITE_REG(&adapter->hw, MANC, manc);
507 }
508}
509
e0aac5a2
AK		 510/**
511 * e1000_configure - configure the hardware for RX and TX
512 * @adapter = private board structure
513 **/
514static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 515{
516 struct net_device *netdev = adapter->netdev;
2db10a08 517 int i;
1da177e4 518
1da177e4
LT		 519 e1000_set_multi(netdev);
520
521 e1000_restore_vlan(adapter);
0fccd0e9 522 e1000_init_manageability(adapter);
1da177e4
LT		 523
524 e1000_configure_tx(adapter);
525 e1000_setup_rctl(adapter);
526 e1000_configure_rx(adapter);
72d64a43
JK		 527 /* call E1000_DESC_UNUSED which always leaves
528 * at least 1 descriptor unused to make sure
529 * next_to_use != next_to_clean */
f56799ea 530 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 531 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 532 adapter->alloc_rx_buf(adapter, ring,
533 E1000_DESC_UNUSED(ring));
f56799ea 534 }
1da177e4 535
7bfa4816 536 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 537}
538
539int e1000_up(struct e1000_adapter *adapter)
540{
541 /* hardware has been reset, we need to reload some things */
542 e1000_configure(adapter);
543
544 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 545
1da177e4 546#ifdef CONFIG_E1000_NAPI
e0aac5a2 547 netif_poll_enable(adapter->netdev);
1da177e4 548#endif
5de55624
MC		 549 e1000_irq_enable(adapter);
550
79f3d399
JB		 551 /* fire a link change interrupt to start the watchdog */
552 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1da177e4
LT		 553 return 0;
554}
555
79f05bf0
AK		 556/**
557 * e1000_power_up_phy - restore link in case the phy was powered down
558 * @adapter: address of board private structure
559 *
560 * The phy may be powered down to save power and turn off link when the
561 * driver is unloaded and wake on lan is not enabled (among others)
562 * *** this routine MUST be followed by a call to e1000_reset ***
563 *
564 **/
565
d658266e 566void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0
AK		 567{
568 uint16_t mii_reg = 0;
569
570 /* Just clear the power down bit to wake the phy back up */
571 if (adapter->hw.media_type == e1000_media_type_copper) {
572 /* according to the manual, the phy will retain its
573 * settings across a power-down/up cycle */
574 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
575 mii_reg &= ~MII_CR_POWER_DOWN;
576 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
577 }
578}
579
580static void e1000_power_down_phy(struct e1000_adapter *adapter)
581{
61c2505f
BA		 582 /* Power down the PHY so no link is implied when interface is down *
583 * The PHY cannot be powered down if any of the following is TRUE *
79f05bf0
AK		 584 * (a) WoL is enabled
585 * (b) AMT is active
586 * (c) SoL/IDER session is active */
587 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
61c2505f 588 adapter->hw.media_type == e1000_media_type_copper) {
79f05bf0 589 uint16_t mii_reg = 0;
61c2505f
BA		 590
591 switch (adapter->hw.mac_type) {
592 case e1000_82540:
593 case e1000_82545:
594 case e1000_82545_rev_3:
595 case e1000_82546:
596 case e1000_82546_rev_3:
597 case e1000_82541:
598 case e1000_82541_rev_2:
599 case e1000_82547:
600 case e1000_82547_rev_2:
601 if (E1000_READ_REG(&adapter->hw, MANC) &
602 E1000_MANC_SMBUS_EN)
603 goto out;
604 break;
605 case e1000_82571:
606 case e1000_82572:
607 case e1000_82573:
608 case e1000_80003es2lan:
609 case e1000_ich8lan:
610 if (e1000_check_mng_mode(&adapter->hw) ||
611 e1000_check_phy_reset_block(&adapter->hw))
612 goto out;
613 break;
614 default:
615 goto out;
616 }
79f05bf0
AK		 617 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
618 mii_reg |= MII_CR_POWER_DOWN;
619 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
620 mdelay(1);
621 }
61c2505f
BA		 622out:
623 return;
79f05bf0
AK		 624}
625
1da177e4
LT		 626void
627e1000_down(struct e1000_adapter *adapter)
628{
629 struct net_device *netdev = adapter->netdev;
630
1314bbf3
AK		 631 /* signal that we're down so the interrupt handler does not
632 * reschedule our watchdog timer */
633 set_bit(__E1000_DOWN, &adapter->flags);
634
e0aac5a2
AK		 635#ifdef CONFIG_E1000_NAPI
636 netif_poll_disable(netdev);
637#endif
1da177e4 638 e1000_irq_disable(adapter);
c1605eb3 639
1da177e4
LT		 640 del_timer_sync(&adapter->tx_fifo_stall_timer);
641 del_timer_sync(&adapter->watchdog_timer);
642 del_timer_sync(&adapter->phy_info_timer);
643
7bfa4816 644 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 645 adapter->link_speed = 0;
646 adapter->link_duplex = 0;
647 netif_carrier_off(netdev);
648 netif_stop_queue(netdev);
649
650 e1000_reset(adapter);
581d708e
MC		 651 e1000_clean_all_tx_rings(adapter);
652 e1000_clean_all_rx_rings(adapter);
1da177e4 653}
1da177e4 654
2db10a08
AK		 655void
656e1000_reinit_locked(struct e1000_adapter *adapter)
657{
658 WARN_ON(in_interrupt());
659 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
660 msleep(1);
661 e1000_down(adapter);
662 e1000_up(adapter);
663 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 664}
665
666void
667e1000_reset(struct e1000_adapter *adapter)
668{
018ea44e 669 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
1125ecbc 670 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
018ea44e 671 boolean_t legacy_pba_adjust = FALSE;
1da177e4
LT		 672
673 /* Repartition Pba for greater than 9k mtu
674 * To take effect CTRL.RST is required.
675 */
676
2d7edb92 677 switch (adapter->hw.mac_type) {
018ea44e
BA		 678 case e1000_82542_rev2_0:
679 case e1000_82542_rev2_1:
680 case e1000_82543:
681 case e1000_82544:
682 case e1000_82540:
683 case e1000_82541:
684 case e1000_82541_rev_2:
685 legacy_pba_adjust = TRUE;
686 pba = E1000_PBA_48K;
687 break;
688 case e1000_82545:
689 case e1000_82545_rev_3:
690 case e1000_82546:
691 case e1000_82546_rev_3:
692 pba = E1000_PBA_48K;
693 break;
2d7edb92 694 case e1000_82547:
0e6ef3e0 695 case e1000_82547_rev_2:
018ea44e 696 legacy_pba_adjust = TRUE;
2d7edb92
MC		 697 pba = E1000_PBA_30K;
698 break;
868d5309
MC		 699 case e1000_82571:
700 case e1000_82572:
6418ecc6 701 case e1000_80003es2lan:
868d5309
MC		 702 pba = E1000_PBA_38K;
703 break;
2d7edb92 704 case e1000_82573:
018ea44e 705 pba = E1000_PBA_20K;
2d7edb92 706 break;
cd94dd0b
AK		 707 case e1000_ich8lan:
708 pba = E1000_PBA_8K;
018ea44e
BA		 709 case e1000_undefined:
710 case e1000_num_macs:
2d7edb92
MC		 711 break;
712 }
713
018ea44e
BA		 714 if (legacy_pba_adjust == TRUE) {
715 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
716 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 717
018ea44e
BA		 718 if (adapter->hw.mac_type == e1000_82547) {
719 adapter->tx_fifo_head = 0;
720 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
721 adapter->tx_fifo_size =
722 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
723 atomic_set(&adapter->tx_fifo_stall, 0);
724 }
725 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
726 /* adjust PBA for jumbo frames */
727 E1000_WRITE_REG(&adapter->hw, PBA, pba);
728
729 /* To maintain wire speed transmits, the Tx FIFO should be
730 * large enough to accomodate two full transmit packets,
731 * rounded up to the next 1KB and expressed in KB. Likewise,
732 * the Rx FIFO should be large enough to accomodate at least
733 * one full receive packet and is similarly rounded up and
734 * expressed in KB. */
735 pba = E1000_READ_REG(&adapter->hw, PBA);
736 /* upper 16 bits has Tx packet buffer allocation size in KB */
737 tx_space = pba >> 16;
738 /* lower 16 bits has Rx packet buffer allocation size in KB */
739 pba &= 0xffff;
740 /* don't include ethernet FCS because hardware appends/strips */
741 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
742 VLAN_TAG_SIZE;
743 min_tx_space = min_rx_space;
744 min_tx_space *= 2;
9099cfb9 745 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 746 min_tx_space >>= 10;
9099cfb9 747 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 748 min_rx_space >>= 10;
749
750 /* If current Tx allocation is less than the min Tx FIFO size,
751 * and the min Tx FIFO size is less than the current Rx FIFO
752 * allocation, take space away from current Rx allocation */
753 if (tx_space < min_tx_space &&
754 ((min_tx_space - tx_space) < pba)) {
755 pba = pba - (min_tx_space - tx_space);
756
757 /* PCI/PCIx hardware has PBA alignment constraints */
758 switch (adapter->hw.mac_type) {
759 case e1000_82545 ... e1000_82546_rev_3:
760 pba &= ~(E1000_PBA_8K - 1);
761 break;
762 default:
763 break;
764 }
765
766 /* if short on rx space, rx wins and must trump tx
767 * adjustment or use Early Receive if available */
768 if (pba < min_rx_space) {
769 switch (adapter->hw.mac_type) {
770 case e1000_82573:
771 /* ERT enabled in e1000_configure_rx */
772 break;
773 default:
774 pba = min_rx_space;
775 break;
776 }
777 }
778 }
1da177e4 779 }
2d7edb92 780
1da177e4
LT		 781 E1000_WRITE_REG(&adapter->hw, PBA, pba);
782
783 /* flow control settings */
f11b7f85
JK		 784 /* Set the FC high water mark to 90% of the FIFO size.
785 * Required to clear last 3 LSB */
786 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 787 /* We can't use 90% on small FIFOs because the remainder
788 * would be less than 1 full frame. In this case, we size
789 * it to allow at least a full frame above the high water
790 * mark. */
791 if (pba < E1000_PBA_16K)
792 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85
JK		 793
794 adapter->hw.fc_high_water = fc_high_water_mark;
795 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 796 if (adapter->hw.mac_type == e1000_80003es2lan)
797 adapter->hw.fc_pause_time = 0xFFFF;
798 else
799 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 800 adapter->hw.fc_send_xon = 1;
801 adapter->hw.fc = adapter->hw.original_fc;
802
2d7edb92 803 /* Allow time for pending master requests to run */
1da177e4 804 e1000_reset_hw(&adapter->hw);
96838a40 805 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 806 E1000_WRITE_REG(&adapter->hw, WUC, 0);
09ae3e88 807
96838a40 808 if (e1000_init_hw(&adapter->hw))
1da177e4 809 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 810 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 811
812 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
813 if (adapter->hw.mac_type >= e1000_82544 &&
814 adapter->hw.mac_type <= e1000_82547_rev_2 &&
815 adapter->hw.autoneg == 1 &&
816 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
817 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
818 /* clear phy power management bit if we are in gig only mode,
819 * which if enabled will attempt negotiation to 100Mb, which
820 * can cause a loss of link at power off or driver unload */
821 ctrl &= ~E1000_CTRL_SWDPIN3;
822 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
823 }
824
1da177e4
LT		 825 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
826 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
827
828 e1000_reset_adaptive(&adapter->hw);
829 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 830
831 if (!adapter->smart_power_down &&
832 (adapter->hw.mac_type == e1000_82571 ||
833 adapter->hw.mac_type == e1000_82572)) {
834 uint16_t phy_data = 0;
835 /* speed up time to link by disabling smart power down, ignore
836 * the return value of this function because there is nothing
837 * different we would do if it failed */
838 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
839 &phy_data);
840 phy_data &= ~IGP02E1000_PM_SPD;
841 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
842 phy_data);
843 }
844
0fccd0e9 845 e1000_release_manageability(adapter);
1da177e4
LT		 846}
847
848/**
849 * e1000_probe - Device Initialization Routine
850 * @pdev: PCI device information struct
851 * @ent: entry in e1000_pci_tbl
852 *
853 * Returns 0 on success, negative on failure
854 *
855 * e1000_probe initializes an adapter identified by a pci_dev structure.
856 * The OS initialization, configuring of the adapter private structure,
857 * and a hardware reset occur.
858 **/
859
860static int __devinit
861e1000_probe(struct pci_dev *pdev,
862 const struct pci_device_id *ent)
863{
864 struct net_device *netdev;
865 struct e1000_adapter *adapter;
2d7edb92 866 unsigned long mmio_start, mmio_len;
cd94dd0b 867 unsigned long flash_start, flash_len;
2d7edb92 868
1da177e4 869 static int cards_found = 0;
120cd576 870 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 871 int i, err, pci_using_dac;
120cd576 872 uint16_t eeprom_data = 0;
1da177e4 873 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 874 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 875 return err;
876
cd94dd0b
AK		 877 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
878 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 879 pci_using_dac = 1;
880 } else {
cd94dd0b
AK		 881 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
882 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 883 E1000_ERR("No usable DMA configuration, aborting\n");
6dd62ab0 884 goto err_dma;
1da177e4
LT		 885 }
886 pci_using_dac = 0;
887 }
888
96838a40 889 if ((err = pci_request_regions(pdev, e1000_driver_name)))
6dd62ab0 890 goto err_pci_reg;
1da177e4
LT		 891
892 pci_set_master(pdev);
893
6dd62ab0 894 err = -ENOMEM;
1da177e4 895 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 896 if (!netdev)
1da177e4 897 goto err_alloc_etherdev;
1da177e4
LT		 898
899 SET_MODULE_OWNER(netdev);
900 SET_NETDEV_DEV(netdev, &pdev->dev);
901
902 pci_set_drvdata(pdev, netdev);
60490fe0 903 adapter = netdev_priv(netdev);
1da177e4
LT		 904 adapter->netdev = netdev;
905 adapter->pdev = pdev;
906 adapter->hw.back = adapter;
907 adapter->msg_enable = (1 << debug) - 1;
908
909 mmio_start = pci_resource_start(pdev, BAR_0);
910 mmio_len = pci_resource_len(pdev, BAR_0);
911
6dd62ab0 912 err = -EIO;
1da177e4 913 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6dd62ab0 914 if (!adapter->hw.hw_addr)
1da177e4 915 goto err_ioremap;
1da177e4 916
96838a40
JB		 917 for (i = BAR_1; i <= BAR_5; i++) {
918 if (pci_resource_len(pdev, i) == 0)
1da177e4 919 continue;
96838a40 920 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 921 adapter->hw.io_base = pci_resource_start(pdev, i);
922 break;
923 }
924 }
925
926 netdev->open = &e1000_open;
927 netdev->stop = &e1000_close;
928 netdev->hard_start_xmit = &e1000_xmit_frame;
929 netdev->get_stats = &e1000_get_stats;
930 netdev->set_multicast_list = &e1000_set_multi;
931 netdev->set_mac_address = &e1000_set_mac;
932 netdev->change_mtu = &e1000_change_mtu;
933 netdev->do_ioctl = &e1000_ioctl;
934 e1000_set_ethtool_ops(netdev);
935 netdev->tx_timeout = &e1000_tx_timeout;
936 netdev->watchdog_timeo = 5 * HZ;
937#ifdef CONFIG_E1000_NAPI
938 netdev->poll = &e1000_clean;
939 netdev->weight = 64;
940#endif
941 netdev->vlan_rx_register = e1000_vlan_rx_register;
942 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
943 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
944#ifdef CONFIG_NET_POLL_CONTROLLER
945 netdev->poll_controller = e1000_netpoll;
946#endif
0eb5a34c 947 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT		 948
949 netdev->mem_start = mmio_start;
950 netdev->mem_end = mmio_start + mmio_len;
951 netdev->base_addr = adapter->hw.io_base;
952
953 adapter->bd_number = cards_found;
954
955 /* setup the private structure */
956
96838a40 957 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 958 goto err_sw_init;
959
6dd62ab0 960 err = -EIO;
cd94dd0b
AK		 961 /* Flash BAR mapping must happen after e1000_sw_init
962 * because it depends on mac_type */
963 if ((adapter->hw.mac_type == e1000_ich8lan) &&
964 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
965 flash_start = pci_resource_start(pdev, 1);
966 flash_len = pci_resource_len(pdev, 1);
967 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6dd62ab0 968 if (!adapter->hw.flash_address)
cd94dd0b 969 goto err_flashmap;
cd94dd0b
AK		 970 }
971
6dd62ab0 972 if (e1000_check_phy_reset_block(&adapter->hw))
2d7edb92
MC		 973 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
974
96838a40 975 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 976 netdev->features = NETIF_F_SG |
977 NETIF_F_HW_CSUM |
978 NETIF_F_HW_VLAN_TX |
979 NETIF_F_HW_VLAN_RX |
980 NETIF_F_HW_VLAN_FILTER;
cd94dd0b
AK		 981 if (adapter->hw.mac_type == e1000_ich8lan)
982 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 983 }
984
96838a40 985 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 986 (adapter->hw.mac_type != e1000_82547))
987 netdev->features |= NETIF_F_TSO;
2d7edb92 988
96838a40 989 if (adapter->hw.mac_type > e1000_82547_rev_2)
87ca4e5b 990 netdev->features |= NETIF_F_TSO6;
96838a40 991 if (pci_using_dac)
1da177e4
LT		 992 netdev->features |= NETIF_F_HIGHDMA;
993
76c224bc
AK		 994 netdev->features |= NETIF_F_LLTX;
995
2d7edb92
MC		 996 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
997
cd94dd0b
AK		 998 /* initialize eeprom parameters */
999
1000 if (e1000_init_eeprom_params(&adapter->hw)) {
1001 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 1002 goto err_eeprom;
cd94dd0b
AK		 1003 }
1004
96838a40 1005 /* before reading the EEPROM, reset the controller to
1da177e4 1006 * put the device in a known good starting state */
96838a40 1007
1da177e4
LT		 1008 e1000_reset_hw(&adapter->hw);
1009
1010 /* make sure the EEPROM is good */
1011
96838a40 1012 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4 1013 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 1014 goto err_eeprom;
1015 }
1016
1017 /* copy the MAC address out of the EEPROM */
1018
96838a40 1019 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 1020 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1021 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 1022 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 1023
96838a40 1024 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4 1025 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 1026 goto err_eeprom;
1027 }
1028
1da177e4
LT		 1029 e1000_get_bus_info(&adapter->hw);
1030
1031 init_timer(&adapter->tx_fifo_stall_timer);
1032 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1033 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1034
1035 init_timer(&adapter->watchdog_timer);
1036 adapter->watchdog_timer.function = &e1000_watchdog;
1037 adapter->watchdog_timer.data = (unsigned long) adapter;
1038
1da177e4
LT		 1039 init_timer(&adapter->phy_info_timer);
1040 adapter->phy_info_timer.function = &e1000_update_phy_info;
1041 adapter->phy_info_timer.data = (unsigned long) adapter;
1042
65f27f38 1043 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1044
1da177e4
LT		 1045 e1000_check_options(adapter);
1046
1047 /* Initial Wake on LAN setting
1048 * If APM wake is enabled in the EEPROM,
1049 * enable the ACPI Magic Packet filter
1050 */
1051
96838a40 1052 switch (adapter->hw.mac_type) {
1da177e4
LT		 1053 case e1000_82542_rev2_0:
1054 case e1000_82542_rev2_1:
1055 case e1000_82543:
1056 break;
1057 case e1000_82544:
1058 e1000_read_eeprom(&adapter->hw,
1059 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1060 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1061 break;
cd94dd0b
AK		 1062 case e1000_ich8lan:
1063 e1000_read_eeprom(&adapter->hw,
1064 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1065 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1066 break;
1da177e4
LT		 1067 case e1000_82546:
1068 case e1000_82546_rev_3:
fd803241 1069 case e1000_82571:
6418ecc6 1070 case e1000_80003es2lan:
96838a40 1071 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 1072 e1000_read_eeprom(&adapter->hw,
1073 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1074 break;
1075 }
1076 /* Fall Through */
1077 default:
1078 e1000_read_eeprom(&adapter->hw,
1079 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1080 break;
1081 }
96838a40 1082 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1083 adapter->eeprom_wol |= E1000_WUFC_MAG;
1084
1085 /* now that we have the eeprom settings, apply the special cases
1086 * where the eeprom may be wrong or the board simply won't support
1087 * wake on lan on a particular port */
1088 switch (pdev->device) {
1089 case E1000_DEV_ID_82546GB_PCIE:
1090 adapter->eeprom_wol = 0;
1091 break;
1092 case E1000_DEV_ID_82546EB_FIBER:
1093 case E1000_DEV_ID_82546GB_FIBER:
1094 case E1000_DEV_ID_82571EB_FIBER:
1095 /* Wake events only supported on port A for dual fiber
1096 * regardless of eeprom setting */
1097 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1098 adapter->eeprom_wol = 0;
1099 break;
1100 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 1101 case E1000_DEV_ID_82571EB_QUAD_COPPER:
ce57a02c 1102 case E1000_DEV_ID_82571EB_QUAD_FIBER:
fc2307d0 1103 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
120cd576
JB		 1104 /* if quad port adapter, disable WoL on all but port A */
1105 if (global_quad_port_a != 0)
1106 adapter->eeprom_wol = 0;
1107 else
1108 adapter->quad_port_a = 1;
1109 /* Reset for multiple quad port adapters */
1110 if (++global_quad_port_a == 4)
1111 global_quad_port_a = 0;
1112 break;
1113 }
1114
1115 /* initialize the wol settings based on the eeprom settings */
1116 adapter->wol = adapter->eeprom_wol;
1da177e4 1117
fb3d47d4
JK		 1118 /* print bus type/speed/width info */
1119 {
1120 struct e1000_hw *hw = &adapter->hw;
1121 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1122 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1123 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1124 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1125 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1126 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1127 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1128 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1129 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1130 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1131 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1132 "32-bit"));
1133 }
1134
1135 for (i = 0; i < 6; i++)
1136 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1137
1da177e4
LT		 1138 /* reset the hardware with the new settings */
1139 e1000_reset(adapter);
1140
b55ccb35
JK		 1141 /* If the controller is 82573 and f/w is AMT, do not set
1142 * DRV_LOAD until the interface is up. For all other cases,
1143 * let the f/w know that the h/w is now under the control
1144 * of the driver. */
1145 if (adapter->hw.mac_type != e1000_82573 ||
1146 !e1000_check_mng_mode(&adapter->hw))
1147 e1000_get_hw_control(adapter);
2d7edb92 1148
1314bbf3
AK		 1149 /* tell the stack to leave us alone until e1000_open() is called */
1150 netif_carrier_off(netdev);
1151 netif_stop_queue(netdev);
416b5d10
AK		 1152#ifdef CONFIG_E1000_NAPI
1153 netif_poll_disable(netdev);
1154#endif
1155
1156 strcpy(netdev->name, "eth%d");
1157 if ((err = register_netdev(netdev)))
1158 goto err_register;
1314bbf3 1159
1da177e4
LT		 1160 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1161
1162 cards_found++;
1163 return 0;
1164
1165err_register:
6dd62ab0
VA		 1166 e1000_release_hw_control(adapter);
1167err_eeprom:
1168 if (!e1000_check_phy_reset_block(&adapter->hw))
1169 e1000_phy_hw_reset(&adapter->hw);
1170
cd94dd0b
AK		 1171 if (adapter->hw.flash_address)
1172 iounmap(adapter->hw.flash_address);
1173err_flashmap:
6dd62ab0
VA		 1174#ifdef CONFIG_E1000_NAPI
1175 for (i = 0; i < adapter->num_rx_queues; i++)
1176 dev_put(&adapter->polling_netdev[i]);
1177#endif
1178
1179 kfree(adapter->tx_ring);
1180 kfree(adapter->rx_ring);
1181#ifdef CONFIG_E1000_NAPI
1182 kfree(adapter->polling_netdev);
1183#endif
1da177e4 1184err_sw_init:
1da177e4
LT		 1185 iounmap(adapter->hw.hw_addr);
1186err_ioremap:
1187 free_netdev(netdev);
1188err_alloc_etherdev:
1189 pci_release_regions(pdev);
6dd62ab0
VA		 1190err_pci_reg:
1191err_dma:
1192 pci_disable_device(pdev);
1da177e4
LT		 1193 return err;
1194}
1195
1196/**
1197 * e1000_remove - Device Removal Routine
1198 * @pdev: PCI device information struct
1199 *
1200 * e1000_remove is called by the PCI subsystem to alert the driver
1201 * that it should release a PCI device. The could be caused by a
1202 * Hot-Plug event, or because the driver is going to be removed from
1203 * memory.
1204 **/
1205
1206static void __devexit
1207e1000_remove(struct pci_dev *pdev)
1208{
1209 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1210 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e
MC		 1211#ifdef CONFIG_E1000_NAPI
1212 int i;
1213#endif
1da177e4 1214
28e53bdd 1215 cancel_work_sync(&adapter->reset_task);
be2b28ed 1216
0fccd0e9 1217 e1000_release_manageability(adapter);
1da177e4 1218
b55ccb35
JK		 1219 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1220 * would have already happened in close and is redundant. */
1221 e1000_release_hw_control(adapter);
2d7edb92 1222
1da177e4 1223 unregister_netdev(netdev);
581d708e 1224#ifdef CONFIG_E1000_NAPI
f56799ea 1225 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1226 dev_put(&adapter->polling_netdev[i]);
581d708e 1227#endif
1da177e4 1228
96838a40 1229 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 1230 e1000_phy_hw_reset(&adapter->hw);
1da177e4 1231
24025e4e
MC		 1232 kfree(adapter->tx_ring);
1233 kfree(adapter->rx_ring);
1234#ifdef CONFIG_E1000_NAPI
1235 kfree(adapter->polling_netdev);
1236#endif
1237
1da177e4 1238 iounmap(adapter->hw.hw_addr);
cd94dd0b
AK		 1239 if (adapter->hw.flash_address)
1240 iounmap(adapter->hw.flash_address);
1da177e4
LT		 1241 pci_release_regions(pdev);
1242
1243 free_netdev(netdev);
1244
1245 pci_disable_device(pdev);
1246}
1247
1248/**
1249 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1250 * @adapter: board private structure to initialize
1251 *
1252 * e1000_sw_init initializes the Adapter private data structure.
1253 * Fields are initialized based on PCI device information and
1254 * OS network device settings (MTU size).
1255 **/
1256
1257static int __devinit
1258e1000_sw_init(struct e1000_adapter *adapter)
1259{
1260 struct e1000_hw *hw = &adapter->hw;
1261 struct net_device *netdev = adapter->netdev;
1262 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1263#ifdef CONFIG_E1000_NAPI
1264 int i;
1265#endif
1da177e4
LT		 1266
1267 /* PCI config space info */
1268
1269 hw->vendor_id = pdev->vendor;
1270 hw->device_id = pdev->device;
1271 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1272 hw->subsystem_id = pdev->subsystem_device;
44c10138 1273 hw->revision_id = pdev->revision;
1da177e4
LT		 1274
1275 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1276
eb0f8054 1277 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
9e2feace 1278 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1279 hw->max_frame_size = netdev->mtu +
1280 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1281 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1282
1283 /* identify the MAC */
1284
96838a40 1285 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1286 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1287 return -EIO;
1288 }
1289
96838a40 1290 switch (hw->mac_type) {
1da177e4
LT		 1291 default:
1292 break;
1293 case e1000_82541:
1294 case e1000_82547:
1295 case e1000_82541_rev_2:
1296 case e1000_82547_rev_2:
1297 hw->phy_init_script = 1;
1298 break;
1299 }
1300
1301 e1000_set_media_type(hw);
1302
1303 hw->wait_autoneg_complete = FALSE;
1304 hw->tbi_compatibility_en = TRUE;
1305 hw->adaptive_ifs = TRUE;
1306
1307 /* Copper options */
1308
96838a40 1309 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1310 hw->mdix = AUTO_ALL_MODES;
1311 hw->disable_polarity_correction = FALSE;
1312 hw->master_slave = E1000_MASTER_SLAVE;
1313 }
1314
f56799ea
JK		 1315 adapter->num_tx_queues = 1;
1316 adapter->num_rx_queues = 1;
581d708e
MC		 1317
1318 if (e1000_alloc_queues(adapter)) {
1319 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1320 return -ENOMEM;
1321 }
1322
1323#ifdef CONFIG_E1000_NAPI
f56799ea 1324 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1325 adapter->polling_netdev[i].priv = adapter;
1326 adapter->polling_netdev[i].poll = &e1000_clean;
1327 adapter->polling_netdev[i].weight = 64;
1328 dev_hold(&adapter->polling_netdev[i]);
1329 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1330 }
7bfa4816 1331 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1332#endif
1333
47313054
HX		 1334 /* Explicitly disable IRQ since the NIC can be in any state. */
1335 atomic_set(&adapter->irq_sem, 0);
1336 e1000_irq_disable(adapter);
1337
1da177e4 1338 spin_lock_init(&adapter->stats_lock);
1da177e4 1339
1314bbf3
AK		 1340 set_bit(__E1000_DOWN, &adapter->flags);
1341
1da177e4
LT		 1342 return 0;
1343}
1344
581d708e
MC		 1345/**
1346 * e1000_alloc_queues - Allocate memory for all rings
1347 * @adapter: board private structure to initialize
1348 *
1349 * We allocate one ring per queue at run-time since we don't know the
1350 * number of queues at compile-time. The polling_netdev array is
1351 * intended for Multiqueue, but should work fine with a single queue.
1352 **/
1353
1354static int __devinit
1355e1000_alloc_queues(struct e1000_adapter *adapter)
1356{
1c7e5b12
YB		 1357 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1358 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1359 if (!adapter->tx_ring)
1360 return -ENOMEM;
581d708e 1361
1c7e5b12
YB		 1362 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1363 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1364 if (!adapter->rx_ring) {
1365 kfree(adapter->tx_ring);
1366 return -ENOMEM;
1367 }
581d708e
MC		 1368
1369#ifdef CONFIG_E1000_NAPI
1c7e5b12
YB		 1370 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1371 sizeof(struct net_device),
1372 GFP_KERNEL);
581d708e
MC		 1373 if (!adapter->polling_netdev) {
1374 kfree(adapter->tx_ring);
1375 kfree(adapter->rx_ring);
1376 return -ENOMEM;
1377 }
581d708e
MC		 1378#endif
1379
1380 return E1000_SUCCESS;
1381}
1382
1da177e4
LT		 1383/**
1384 * e1000_open - Called when a network interface is made active
1385 * @netdev: network interface device structure
1386 *
1387 * Returns 0 on success, negative value on failure
1388 *
1389 * The open entry point is called when a network interface is made
1390 * active by the system (IFF_UP). At this point all resources needed
1391 * for transmit and receive operations are allocated, the interrupt
1392 * handler is registered with the OS, the watchdog timer is started,
1393 * and the stack is notified that the interface is ready.
1394 **/
1395
1396static int
1397e1000_open(struct net_device *netdev)
1398{
60490fe0 1399 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1400 int err;
1401
2db10a08 1402 /* disallow open during test */
1314bbf3 1403 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1404 return -EBUSY;
1405
1da177e4 1406 /* allocate transmit descriptors */
e0aac5a2
AK		 1407 err = e1000_setup_all_tx_resources(adapter);
1408 if (err)
1da177e4
LT		 1409 goto err_setup_tx;
1410
1411 /* allocate receive descriptors */
e0aac5a2 1412 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1413 if (err)
e0aac5a2 1414 goto err_setup_rx;
b5bf28cd 1415
79f05bf0
AK		 1416 e1000_power_up_phy(adapter);
1417
2d7edb92 1418 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1419 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1420 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1421 e1000_update_mng_vlan(adapter);
1422 }
1da177e4 1423
b55ccb35
JK		 1424 /* If AMT is enabled, let the firmware know that the network
1425 * interface is now open */
1426 if (adapter->hw.mac_type == e1000_82573 &&
1427 e1000_check_mng_mode(&adapter->hw))
1428 e1000_get_hw_control(adapter);
1429
e0aac5a2
AK		 1430 /* before we allocate an interrupt, we must be ready to handle it.
1431 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1432 * as soon as we call pci_request_irq, so we have to setup our
1433 * clean_rx handler before we do so. */
1434 e1000_configure(adapter);
1435
1436 err = e1000_request_irq(adapter);
1437 if (err)
1438 goto err_req_irq;
1439
1440 /* From here on the code is the same as e1000_up() */
1441 clear_bit(__E1000_DOWN, &adapter->flags);
1442
47313054
HX		 1443#ifdef CONFIG_E1000_NAPI
1444 netif_poll_enable(netdev);
1445#endif
1446
e0aac5a2
AK		 1447 e1000_irq_enable(adapter);
1448
1449 /* fire a link status change interrupt to start the watchdog */
1450 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1451
1da177e4
LT		 1452 return E1000_SUCCESS;
1453
b5bf28cd 1454err_req_irq:
e0aac5a2
AK		 1455 e1000_release_hw_control(adapter);
1456 e1000_power_down_phy(adapter);
581d708e 1457 e1000_free_all_rx_resources(adapter);
1da177e4 1458err_setup_rx:
581d708e 1459 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1460err_setup_tx:
1461 e1000_reset(adapter);
1462
1463 return err;
1464}
1465
1466/**
1467 * e1000_close - Disables a network interface
1468 * @netdev: network interface device structure
1469 *
1470 * Returns 0, this is not allowed to fail
1471 *
1472 * The close entry point is called when an interface is de-activated
1473 * by the OS. The hardware is still under the drivers control, but
1474 * needs to be disabled. A global MAC reset is issued to stop the
1475 * hardware, and all transmit and receive resources are freed.
1476 **/
1477
1478static int
1479e1000_close(struct net_device *netdev)
1480{
60490fe0 1481 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1482
2db10a08 1483 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1484 e1000_down(adapter);
79f05bf0 1485 e1000_power_down_phy(adapter);
2db10a08 1486 e1000_free_irq(adapter);
1da177e4 1487
581d708e
MC		 1488 e1000_free_all_tx_resources(adapter);
1489 e1000_free_all_rx_resources(adapter);
1da177e4 1490
4666560a
BA		 1491 /* kill manageability vlan ID if supported, but not if a vlan with
1492 * the same ID is registered on the host OS (let 8021q kill it) */
96838a40 1493 if ((adapter->hw.mng_cookie.status &
4666560a
BA		 1494 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1495 !(adapter->vlgrp &&
5c15bdec 1496 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1497 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1498 }
b55ccb35
JK		 1499
1500 /* If AMT is enabled, let the firmware know that the network
1501 * interface is now closed */
1502 if (adapter->hw.mac_type == e1000_82573 &&
1503 e1000_check_mng_mode(&adapter->hw))
1504 e1000_release_hw_control(adapter);
1505
1da177e4
LT		 1506 return 0;
1507}
1508
1509/**
1510 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1511 * @adapter: address of board private structure
2d7edb92
MC		 1512 * @start: address of beginning of memory
1513 * @len: length of memory
1da177e4 1514 **/
e619d523 1515static boolean_t
1da177e4
LT		 1516e1000_check_64k_bound(struct e1000_adapter *adapter,
1517 void *start, unsigned long len)
1518{
1519 unsigned long begin = (unsigned long) start;
1520 unsigned long end = begin + len;
1521
2648345f
MC		 1522 /* First rev 82545 and 82546 need to not allow any memory
1523 * write location to cross 64k boundary due to errata 23 */
1da177e4 1524 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1525 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1526 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1527 }
1528
1529 return TRUE;
1530}
1531
1532/**
1533 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1534 * @adapter: board private structure
581d708e 1535 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1536 *
1537 * Return 0 on success, negative on failure
1538 **/
1539
3ad2cc67 1540static int
581d708e
MC		 1541e1000_setup_tx_resources(struct e1000_adapter *adapter,
1542 struct e1000_tx_ring *txdr)
1da177e4 1543{
1da177e4
LT		 1544 struct pci_dev *pdev = adapter->pdev;
1545 int size;
1546
1547 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1548 txdr->buffer_info = vmalloc(size);
96838a40 1549 if (!txdr->buffer_info) {
2648345f
MC		 1550 DPRINTK(PROBE, ERR,
1551 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1552 return -ENOMEM;
1553 }
1554 memset(txdr->buffer_info, 0, size);
1555
1556 /* round up to nearest 4K */
1557
1558 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1559 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1560
1561 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1562 if (!txdr->desc) {
1da177e4 1563setup_tx_desc_die:
1da177e4 1564 vfree(txdr->buffer_info);
2648345f
MC		 1565 DPRINTK(PROBE, ERR,
1566 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1567 return -ENOMEM;
1568 }
1569
2648345f 1570 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1571 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1572 void *olddesc = txdr->desc;
1573 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1574 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1575 "at %p\n", txdr->size, txdr->desc);
1576 /* Try again, without freeing the previous */
1da177e4 1577 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1578 /* Failed allocation, critical failure */
96838a40 1579 if (!txdr->desc) {
1da177e4
LT		 1580 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1581 goto setup_tx_desc_die;
1582 }
1583
1584 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1585 /* give up */
2648345f
MC		 1586 pci_free_consistent(pdev, txdr->size, txdr->desc,
1587 txdr->dma);
1da177e4
LT		 1588 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1589 DPRINTK(PROBE, ERR,
2648345f
MC		 1590 "Unable to allocate aligned memory "
1591 "for the transmit descriptor ring\n");
1da177e4
LT		 1592 vfree(txdr->buffer_info);
1593 return -ENOMEM;
1594 } else {
2648345f 1595 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1596 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1597 }
1598 }
1599 memset(txdr->desc, 0, txdr->size);
1600
1601 txdr->next_to_use = 0;
1602 txdr->next_to_clean = 0;
2ae76d98 1603 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1604
1605 return 0;
1606}
1607
581d708e
MC		 1608/**
1609 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1610 * (Descriptors) for all queues
1611 * @adapter: board private structure
1612 *
581d708e
MC		 1613 * Return 0 on success, negative on failure
1614 **/
1615
1616int
1617e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1618{
1619 int i, err = 0;
1620
f56799ea 1621 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1622 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1623 if (err) {
1624 DPRINTK(PROBE, ERR,
1625 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1626 for (i-- ; i >= 0; i--)
1627 e1000_free_tx_resources(adapter,
1628 &adapter->tx_ring[i]);
581d708e
MC		 1629 break;
1630 }
1631 }
1632
1633 return err;
1634}
1635
1da177e4
LT		 1636/**
1637 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1638 * @adapter: board private structure
1639 *
1640 * Configure the Tx unit of the MAC after a reset.
1641 **/
1642
1643static void
1644e1000_configure_tx(struct e1000_adapter *adapter)
1645{
581d708e
MC		 1646 uint64_t tdba;
1647 struct e1000_hw *hw = &adapter->hw;
1648 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1649 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1650
1651 /* Setup the HW Tx Head and Tail descriptor pointers */
1652
f56799ea 1653 switch (adapter->num_tx_queues) {
24025e4e
MC		 1654 case 1:
1655 default:
581d708e
MC		 1656 tdba = adapter->tx_ring[0].dma;
1657 tdlen = adapter->tx_ring[0].count *
1658 sizeof(struct e1000_tx_desc);
581d708e 1659 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1660 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1661 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1662 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1663 E1000_WRITE_REG(hw, TDH, 0);
6a951698
AK		 1664 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1665 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1666 break;
1667 }
1da177e4
LT		 1668
1669 /* Set the default values for the Tx Inter Packet Gap timer */
d89b6c67
JB		 1670 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1671 (hw->media_type == e1000_media_type_fiber ||
1672 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1673 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1674 else
1675 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1676
581d708e 1677 switch (hw->mac_type) {
1da177e4
LT		 1678 case e1000_82542_rev2_0:
1679 case e1000_82542_rev2_1:
1680 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1681 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1682 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1683 break;
87041639
JK		 1684 case e1000_80003es2lan:
1685 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1686 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1687 break;
1da177e4 1688 default:
0fadb059
JK		 1689 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1690 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1691 break;
1da177e4 1692 }
0fadb059
JK		 1693 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1694 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1695 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1696
1697 /* Set the Tx Interrupt Delay register */
1698
581d708e
MC		 1699 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1700 if (hw->mac_type >= e1000_82540)
1701 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1702
1703 /* Program the Transmit Control Register */
1704
581d708e 1705 tctl = E1000_READ_REG(hw, TCTL);
1da177e4 1706 tctl &= ~E1000_TCTL_CT;
7e6c9861 1707 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1708 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1709
2ae76d98
MC		 1710 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1711 tarc = E1000_READ_REG(hw, TARC0);
90fb5135
AK		 1712 /* set the speed mode bit, we'll clear it if we're not at
1713 * gigabit link later */
09ae3e88 1714 tarc |= (1 << 21);
2ae76d98 1715 E1000_WRITE_REG(hw, TARC0, tarc);
87041639
JK		 1716 } else if (hw->mac_type == e1000_80003es2lan) {
1717 tarc = E1000_READ_REG(hw, TARC0);
1718 tarc |= 1;
87041639
JK		 1719 E1000_WRITE_REG(hw, TARC0, tarc);
1720 tarc = E1000_READ_REG(hw, TARC1);
1721 tarc |= 1;
1722 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1723 }
1724
581d708e 1725 e1000_config_collision_dist(hw);
1da177e4
LT		 1726
1727 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1728 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1729
1730 /* only set IDE if we are delaying interrupts using the timers */
1731 if (adapter->tx_int_delay)
1732 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1733
581d708e 1734 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1735 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1736 else
1737 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1738
1739 /* Cache if we're 82544 running in PCI-X because we'll
1740 * need this to apply a workaround later in the send path. */
581d708e
MC		 1741 if (hw->mac_type == e1000_82544 &&
1742 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1743 adapter->pcix_82544 = 1;
7e6c9861
JK		 1744
1745 E1000_WRITE_REG(hw, TCTL, tctl);
1746
1da177e4
LT		 1747}
1748
1749/**
1750 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1751 * @adapter: board private structure
581d708e 1752 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1753 *
1754 * Returns 0 on success, negative on failure
1755 **/
1756
3ad2cc67 1757static int
581d708e
MC		 1758e1000_setup_rx_resources(struct e1000_adapter *adapter,
1759 struct e1000_rx_ring *rxdr)
1da177e4 1760{
1da177e4 1761 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1762 int size, desc_len;
1da177e4
LT		 1763
1764 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1765 rxdr->buffer_info = vmalloc(size);
581d708e 1766 if (!rxdr->buffer_info) {
2648345f
MC		 1767 DPRINTK(PROBE, ERR,
1768 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1769 return -ENOMEM;
1770 }
1771 memset(rxdr->buffer_info, 0, size);
1772
1c7e5b12
YB		 1773 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1774 GFP_KERNEL);
96838a40 1775 if (!rxdr->ps_page) {
2d7edb92
MC		 1776 vfree(rxdr->buffer_info);
1777 DPRINTK(PROBE, ERR,
1778 "Unable to allocate memory for the receive descriptor ring\n");
1779 return -ENOMEM;
1780 }
2d7edb92 1781
1c7e5b12
YB		 1782 rxdr->ps_page_dma = kcalloc(rxdr->count,
1783 sizeof(struct e1000_ps_page_dma),
1784 GFP_KERNEL);
96838a40 1785 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1786 vfree(rxdr->buffer_info);
1787 kfree(rxdr->ps_page);
1788 DPRINTK(PROBE, ERR,
1789 "Unable to allocate memory for the receive descriptor ring\n");
1790 return -ENOMEM;
1791 }
2d7edb92 1792
96838a40 1793 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1794 desc_len = sizeof(struct e1000_rx_desc);
1795 else
1796 desc_len = sizeof(union e1000_rx_desc_packet_split);
1797
1da177e4
LT		 1798 /* Round up to nearest 4K */
1799
2d7edb92 1800 rxdr->size = rxdr->count * desc_len;
9099cfb9 1801 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1802
1803 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1804
581d708e
MC		 1805 if (!rxdr->desc) {
1806 DPRINTK(PROBE, ERR,
1807 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1808setup_rx_desc_die:
1da177e4 1809 vfree(rxdr->buffer_info);
2d7edb92
MC		 1810 kfree(rxdr->ps_page);
1811 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1812 return -ENOMEM;
1813 }
1814
2648345f 1815 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1816 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1817 void *olddesc = rxdr->desc;
1818 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1819 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1820 "at %p\n", rxdr->size, rxdr->desc);
1821 /* Try again, without freeing the previous */
1da177e4 1822 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1823 /* Failed allocation, critical failure */
581d708e 1824 if (!rxdr->desc) {
1da177e4 1825 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1826 DPRINTK(PROBE, ERR,
1827 "Unable to allocate memory "
1828 "for the receive descriptor ring\n");
1da177e4
LT		 1829 goto setup_rx_desc_die;
1830 }
1831
1832 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1833 /* give up */
2648345f
MC		 1834 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1835 rxdr->dma);
1da177e4 1836 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1837 DPRINTK(PROBE, ERR,
1838 "Unable to allocate aligned memory "
1839 "for the receive descriptor ring\n");
581d708e 1840 goto setup_rx_desc_die;
1da177e4 1841 } else {
2648345f 1842 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1843 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1844 }
1845 }
1846 memset(rxdr->desc, 0, rxdr->size);
1847
1848 rxdr->next_to_clean = 0;
1849 rxdr->next_to_use = 0;
1850
1851 return 0;
1852}
1853
581d708e
MC		 1854/**
1855 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1856 * (Descriptors) for all queues
1857 * @adapter: board private structure
1858 *
581d708e
MC		 1859 * Return 0 on success, negative on failure
1860 **/
1861
1862int
1863e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1864{
1865 int i, err = 0;
1866
f56799ea 1867 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1868 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1869 if (err) {
1870 DPRINTK(PROBE, ERR,
1871 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1872 for (i-- ; i >= 0; i--)
1873 e1000_free_rx_resources(adapter,
1874 &adapter->rx_ring[i]);
581d708e
MC		 1875 break;
1876 }
1877 }
1878
1879 return err;
1880}
1881
1da177e4 1882/**
2648345f 1883 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1884 * @adapter: Board private structure
1885 **/
e4c811c9
MC		 1886#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1887 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1888static void
1889e1000_setup_rctl(struct e1000_adapter *adapter)
1890{
2d7edb92
MC		 1891 uint32_t rctl, rfctl;
1892 uint32_t psrctl = 0;
35ec56bb 1893#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1894 uint32_t pages = 0;
1895#endif
1da177e4
LT		 1896
1897 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1898
1899 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1900
1901 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1902 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1903 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1904
0fadb059 1905 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1906 rctl |= E1000_RCTL_SBP;
1907 else
1908 rctl &= ~E1000_RCTL_SBP;
1909
2d7edb92
MC		 1910 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1911 rctl &= ~E1000_RCTL_LPE;
1912 else
1913 rctl |= E1000_RCTL_LPE;
1914
1da177e4 1915 /* Setup buffer sizes */
9e2feace
AK		 1916 rctl &= ~E1000_RCTL_SZ_4096;
1917 rctl |= E1000_RCTL_BSEX;
1918 switch (adapter->rx_buffer_len) {
1919 case E1000_RXBUFFER_256:
1920 rctl |= E1000_RCTL_SZ_256;
1921 rctl &= ~E1000_RCTL_BSEX;
1922 break;
1923 case E1000_RXBUFFER_512:
1924 rctl |= E1000_RCTL_SZ_512;
1925 rctl &= ~E1000_RCTL_BSEX;
1926 break;
1927 case E1000_RXBUFFER_1024:
1928 rctl |= E1000_RCTL_SZ_1024;
1929 rctl &= ~E1000_RCTL_BSEX;
1930 break;
a1415ee6
JK		 1931 case E1000_RXBUFFER_2048:
1932 default:
1933 rctl |= E1000_RCTL_SZ_2048;
1934 rctl &= ~E1000_RCTL_BSEX;
1935 break;
1936 case E1000_RXBUFFER_4096:
1937 rctl |= E1000_RCTL_SZ_4096;
1938 break;
1939 case E1000_RXBUFFER_8192:
1940 rctl |= E1000_RCTL_SZ_8192;
1941 break;
1942 case E1000_RXBUFFER_16384:
1943 rctl |= E1000_RCTL_SZ_16384;
1944 break;
2d7edb92
MC		 1945 }
1946
35ec56bb 1947#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1948 /* 82571 and greater support packet-split where the protocol
1949 * header is placed in skb->data and the packet data is
1950 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1951 * In the case of a non-split, skb->data is linearly filled,
1952 * followed by the page buffers. Therefore, skb->data is
1953 * sized to hold the largest protocol header.
1954 */
e64d7d02
JB		 1955 /* allocations using alloc_page take too long for regular MTU
1956 * so only enable packet split for jumbo frames */
e4c811c9 1957 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
e64d7d02
JB		 1958 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1959 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
e4c811c9
MC		 1960 adapter->rx_ps_pages = pages;
1961 else
1962 adapter->rx_ps_pages = 0;
2d7edb92 1963#endif
e4c811c9 1964 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1965 /* Configure extra packet-split registers */
1966 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1967 rfctl |= E1000_RFCTL_EXTEN;
87ca4e5b
AK		 1968 /* disable packet split support for IPv6 extension headers,
1969 * because some malformed IPv6 headers can hang the RX */
1970 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1971 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1972
2d7edb92
MC		 1973 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1974
7dfee0cb 1975 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1976
2d7edb92
MC		 1977 psrctl |= adapter->rx_ps_bsize0 >>
1978 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1979
1980 switch (adapter->rx_ps_pages) {
1981 case 3:
1982 psrctl |= PAGE_SIZE <<
1983 E1000_PSRCTL_BSIZE3_SHIFT;
1984 case 2:
1985 psrctl |= PAGE_SIZE <<
1986 E1000_PSRCTL_BSIZE2_SHIFT;
1987 case 1:
1988 psrctl |= PAGE_SIZE >>
1989 E1000_PSRCTL_BSIZE1_SHIFT;
1990 break;
1991 }
2d7edb92
MC		 1992
1993 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1994 }
1995
1996 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1997}
1998
1999/**
2000 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
2001 * @adapter: board private structure
2002 *
2003 * Configure the Rx unit of the MAC after a reset.
2004 **/
2005
2006static void
2007e1000_configure_rx(struct e1000_adapter *adapter)
2008{
581d708e
MC		 2009 uint64_t rdba;
2010 struct e1000_hw *hw = &adapter->hw;
2011 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 2012
e4c811c9 2013 if (adapter->rx_ps_pages) {
0f15a8fa 2014 /* this is a 32 byte descriptor */
581d708e 2015 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 2016 sizeof(union e1000_rx_desc_packet_split);
2017 adapter->clean_rx = e1000_clean_rx_irq_ps;
2018 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2019 } else {
581d708e
MC		 2020 rdlen = adapter->rx_ring[0].count *
2021 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 2022 adapter->clean_rx = e1000_clean_rx_irq;
2023 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2024 }
1da177e4
LT		 2025
2026 /* disable receives while setting up the descriptors */
581d708e
MC		 2027 rctl = E1000_READ_REG(hw, RCTL);
2028 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 2029
2030 /* set the Receive Delay Timer Register */
581d708e 2031 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 2032
581d708e
MC		 2033 if (hw->mac_type >= e1000_82540) {
2034 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
835bb129 2035 if (adapter->itr_setting != 0)
581d708e 2036 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 2037 1000000000 / (adapter->itr * 256));
2038 }
2039
2ae76d98 2040 if (hw->mac_type >= e1000_82571) {
2ae76d98 2041 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 2042 /* Reset delay timers after every interrupt */
6fc7a7ec 2043 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9 2044#ifdef CONFIG_E1000_NAPI
835bb129 2045 /* Auto-Mask interrupts upon ICR access */
1e613fd9 2046 ctrl_ext |= E1000_CTRL_EXT_IAME;
835bb129 2047 E1000_WRITE_REG(hw, IAM, 0xffffffff);
1e613fd9 2048#endif
2ae76d98
MC		 2049 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2050 E1000_WRITE_FLUSH(hw);
2051 }
2052
581d708e
MC		 2053 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2054 * the Base and Length of the Rx Descriptor Ring */
f56799ea 2055 switch (adapter->num_rx_queues) {
24025e4e
MC		 2056 case 1:
2057 default:
581d708e 2058 rdba = adapter->rx_ring[0].dma;
581d708e 2059 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 2060 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2061 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 2062 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 2063 E1000_WRITE_REG(hw, RDH, 0);
6a951698
AK		 2064 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2065 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 2066 break;
24025e4e
MC		 2067 }
2068
1da177e4 2069 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 2070 if (hw->mac_type >= e1000_82543) {
2071 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 2072 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 2073 rxcsum |= E1000_RXCSUM_TUOFL;
2074
868d5309 2075 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 2076 * Must be used in conjunction with packet-split. */
96838a40
JB		 2077 if ((hw->mac_type >= e1000_82571) &&
2078 (adapter->rx_ps_pages)) {
2d7edb92
MC		 2079 rxcsum |= E1000_RXCSUM_IPPCSE;
2080 }
2081 } else {
2082 rxcsum &= ~E1000_RXCSUM_TUOFL;
2083 /* don't need to clear IPPCSE as it defaults to 0 */
2084 }
581d708e 2085 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 2086 }
2087
21c4d5e0
AK		 2088 /* enable early receives on 82573, only takes effect if using > 2048
2089 * byte total frame size. for example only for jumbo frames */
2090#define E1000_ERT_2048 0x100
2091 if (hw->mac_type == e1000_82573)
2092 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2093
1da177e4 2094 /* Enable Receives */
581d708e 2095 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 2096}
2097
2098/**
581d708e 2099 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 2100 * @adapter: board private structure
581d708e 2101 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 2102 *
2103 * Free all transmit software resources
2104 **/
2105
3ad2cc67 2106static void
581d708e
MC		 2107e1000_free_tx_resources(struct e1000_adapter *adapter,
2108 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 2109{
2110 struct pci_dev *pdev = adapter->pdev;
2111
581d708e 2112 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 2113
581d708e
MC		 2114 vfree(tx_ring->buffer_info);
2115 tx_ring->buffer_info = NULL;
1da177e4 2116
581d708e 2117 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 2118
581d708e
MC		 2119 tx_ring->desc = NULL;
2120}
2121
2122/**
2123 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2124 * @adapter: board private structure
2125 *
2126 * Free all transmit software resources
2127 **/
2128
2129void
2130e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2131{
2132 int i;
2133
f56799ea 2134 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2135 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2136}
2137
e619d523 2138static void
1da177e4
LT		 2139e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2140 struct e1000_buffer *buffer_info)
2141{
96838a40 2142 if (buffer_info->dma) {
2648345f
MC		 2143 pci_unmap_page(adapter->pdev,
2144 buffer_info->dma,
2145 buffer_info->length,
2146 PCI_DMA_TODEVICE);
a9ebadd6 2147 buffer_info->dma = 0;
1da177e4 2148 }
a9ebadd6 2149 if (buffer_info->skb) {
1da177e4 2150 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 2151 buffer_info->skb = NULL;
2152 }
2153 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 2154}
2155
2156/**
2157 * e1000_clean_tx_ring - Free Tx Buffers
2158 * @adapter: board private structure
581d708e 2159 * @tx_ring: ring to be cleaned
1da177e4
LT		 2160 **/
2161
2162static void
581d708e
MC		 2163e1000_clean_tx_ring(struct e1000_adapter *adapter,
2164 struct e1000_tx_ring *tx_ring)
1da177e4 2165{
1da177e4
LT		 2166 struct e1000_buffer *buffer_info;
2167 unsigned long size;
2168 unsigned int i;
2169
2170 /* Free all the Tx ring sk_buffs */
2171
96838a40 2172 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2173 buffer_info = &tx_ring->buffer_info[i];
2174 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2175 }
2176
2177 size = sizeof(struct e1000_buffer) * tx_ring->count;
2178 memset(tx_ring->buffer_info, 0, size);
2179
2180 /* Zero out the descriptor ring */
2181
2182 memset(tx_ring->desc, 0, tx_ring->size);
2183
2184 tx_ring->next_to_use = 0;
2185 tx_ring->next_to_clean = 0;
fd803241 2186 tx_ring->last_tx_tso = 0;
1da177e4 2187
581d708e
MC		 2188 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2189 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2190}
2191
2192/**
2193 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2194 * @adapter: board private structure
2195 **/
2196
2197static void
2198e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2199{
2200 int i;
2201
f56799ea 2202 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2203 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2204}
2205
2206/**
2207 * e1000_free_rx_resources - Free Rx Resources
2208 * @adapter: board private structure
581d708e 2209 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2210 *
2211 * Free all receive software resources
2212 **/
2213
3ad2cc67 2214static void
581d708e
MC		 2215e1000_free_rx_resources(struct e1000_adapter *adapter,
2216 struct e1000_rx_ring *rx_ring)
1da177e4 2217{
1da177e4
LT		 2218 struct pci_dev *pdev = adapter->pdev;
2219
581d708e 2220 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2221
2222 vfree(rx_ring->buffer_info);
2223 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2224 kfree(rx_ring->ps_page);
2225 rx_ring->ps_page = NULL;
2226 kfree(rx_ring->ps_page_dma);
2227 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2228
2229 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2230
2231 rx_ring->desc = NULL;
2232}
2233
2234/**
581d708e 2235 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2236 * @adapter: board private structure
581d708e
MC		 2237 *
2238 * Free all receive software resources
2239 **/
2240
2241void
2242e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2243{
2244 int i;
2245
f56799ea 2246 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2247 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2248}
2249
2250/**
2251 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2252 * @adapter: board private structure
2253 * @rx_ring: ring to free buffers from
1da177e4
LT		 2254 **/
2255
2256static void
581d708e
MC		 2257e1000_clean_rx_ring(struct e1000_adapter *adapter,
2258 struct e1000_rx_ring *rx_ring)
1da177e4 2259{
1da177e4 2260 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2261 struct e1000_ps_page *ps_page;
2262 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2263 struct pci_dev *pdev = adapter->pdev;
2264 unsigned long size;
2d7edb92 2265 unsigned int i, j;
1da177e4
LT		 2266
2267 /* Free all the Rx ring sk_buffs */
96838a40 2268 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2269 buffer_info = &rx_ring->buffer_info[i];
96838a40 2270 if (buffer_info->skb) {
1da177e4
LT		 2271 pci_unmap_single(pdev,
2272 buffer_info->dma,
2273 buffer_info->length,
2274 PCI_DMA_FROMDEVICE);
2275
2276 dev_kfree_skb(buffer_info->skb);
2277 buffer_info->skb = NULL;
997f5cbd
JK		 2278 }
2279 ps_page = &rx_ring->ps_page[i];
2280 ps_page_dma = &rx_ring->ps_page_dma[i];
2281 for (j = 0; j < adapter->rx_ps_pages; j++) {
2282 if (!ps_page->ps_page[j]) break;
2283 pci_unmap_page(pdev,
2284 ps_page_dma->ps_page_dma[j],
2285 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2286 ps_page_dma->ps_page_dma[j] = 0;
2287 put_page(ps_page->ps_page[j]);
2288 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2289 }
2290 }
2291
2292 size = sizeof(struct e1000_buffer) * rx_ring->count;
2293 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2294 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2295 memset(rx_ring->ps_page, 0, size);
2296 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2297 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2298
2299 /* Zero out the descriptor ring */
2300
2301 memset(rx_ring->desc, 0, rx_ring->size);
2302
2303 rx_ring->next_to_clean = 0;
2304 rx_ring->next_to_use = 0;
2305
581d708e
MC		 2306 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2307 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2308}
2309
2310/**
2311 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2312 * @adapter: board private structure
2313 **/
2314
2315static void
2316e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2317{
2318 int i;
2319
f56799ea 2320 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2321 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2322}
2323
2324/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2325 * and memory write and invalidate disabled for certain operations
2326 */
2327static void
2328e1000_enter_82542_rst(struct e1000_adapter *adapter)
2329{
2330 struct net_device *netdev = adapter->netdev;
2331 uint32_t rctl;
2332
2333 e1000_pci_clear_mwi(&adapter->hw);
2334
2335 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2336 rctl |= E1000_RCTL_RST;
2337 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2338 E1000_WRITE_FLUSH(&adapter->hw);
2339 mdelay(5);
2340
96838a40 2341 if (netif_running(netdev))
581d708e 2342 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2343}
2344
2345static void
2346e1000_leave_82542_rst(struct e1000_adapter *adapter)
2347{
2348 struct net_device *netdev = adapter->netdev;
2349 uint32_t rctl;
2350
2351 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2352 rctl &= ~E1000_RCTL_RST;
2353 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2354 E1000_WRITE_FLUSH(&adapter->hw);
2355 mdelay(5);
2356
96838a40 2357 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2358 e1000_pci_set_mwi(&adapter->hw);
2359
96838a40 2360 if (netif_running(netdev)) {
72d64a43
JK		 2361 /* No need to loop, because 82542 supports only 1 queue */
2362 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2363 e1000_configure_rx(adapter);
72d64a43 2364 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2365 }
2366}
2367
2368/**
2369 * e1000_set_mac - Change the Ethernet Address of the NIC
2370 * @netdev: network interface device structure
2371 * @p: pointer to an address structure
2372 *
2373 * Returns 0 on success, negative on failure
2374 **/
2375
2376static int
2377e1000_set_mac(struct net_device *netdev, void *p)
2378{
60490fe0 2379 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2380 struct sockaddr *addr = p;
2381
96838a40 2382 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2383 return -EADDRNOTAVAIL;
2384
2385 /* 82542 2.0 needs to be in reset to write receive address registers */
2386
96838a40 2387 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2388 e1000_enter_82542_rst(adapter);
2389
2390 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2391 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2392
2393 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2394
868d5309
MC		 2395 /* With 82571 controllers, LAA may be overwritten (with the default)
2396 * due to controller reset from the other port. */
2397 if (adapter->hw.mac_type == e1000_82571) {
2398 /* activate the work around */
2399 adapter->hw.laa_is_present = 1;
2400
96838a40
JB		 2401 /* Hold a copy of the LAA in RAR[14] This is done so that
2402 * between the time RAR[0] gets clobbered and the time it
2403 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2404 * of the RARs and no incoming packets directed to this port
96838a40 2405 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2406 * RAR[14] */
96838a40 2407 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2408 E1000_RAR_ENTRIES - 1);
2409 }
2410
96838a40 2411 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2412 e1000_leave_82542_rst(adapter);
2413
2414 return 0;
2415}
2416
2417/**
2418 * e1000_set_multi - Multicast and Promiscuous mode set
2419 * @netdev: network interface device structure
2420 *
2421 * The set_multi entry point is called whenever the multicast address
2422 * list or the network interface flags are updated. This routine is
2423 * responsible for configuring the hardware for proper multicast,
2424 * promiscuous mode, and all-multi behavior.
2425 **/
2426
2427static void
2428e1000_set_multi(struct net_device *netdev)
2429{
60490fe0 2430 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2431 struct e1000_hw *hw = &adapter->hw;
2432 struct dev_mc_list *mc_ptr;
2433 uint32_t rctl;
2434 uint32_t hash_value;
868d5309 2435 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2436 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2437 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2438 E1000_NUM_MTA_REGISTERS;
2439
2440 if (adapter->hw.mac_type == e1000_ich8lan)
2441 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2442
868d5309
MC		 2443 /* reserve RAR[14] for LAA over-write work-around */
2444 if (adapter->hw.mac_type == e1000_82571)
2445 rar_entries--;
1da177e4 2446
2648345f
MC		 2447 /* Check for Promiscuous and All Multicast modes */
2448
1da177e4
LT		 2449 rctl = E1000_READ_REG(hw, RCTL);
2450
96838a40 2451 if (netdev->flags & IFF_PROMISC) {
1da177e4 2452 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2453 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2454 rctl |= E1000_RCTL_MPE;
2455 rctl &= ~E1000_RCTL_UPE;
2456 } else {
2457 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2458 }
2459
2460 E1000_WRITE_REG(hw, RCTL, rctl);
2461
2462 /* 82542 2.0 needs to be in reset to write receive address registers */
2463
96838a40 2464 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2465 e1000_enter_82542_rst(adapter);
2466
2467 /* load the first 14 multicast address into the exact filters 1-14
2468 * RAR 0 is used for the station MAC adddress
2469 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2470 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2471 */
2472 mc_ptr = netdev->mc_list;
2473
96838a40 2474 for (i = 1; i < rar_entries; i++) {
868d5309 2475 if (mc_ptr) {
1da177e4
LT		 2476 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2477 mc_ptr = mc_ptr->next;
2478 } else {
2479 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2480 E1000_WRITE_FLUSH(hw);
1da177e4 2481 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2482 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2483 }
2484 }
2485
2486 /* clear the old settings from the multicast hash table */
2487
cd94dd0b 2488 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2489 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2490 E1000_WRITE_FLUSH(hw);
2491 }
1da177e4
LT		 2492
2493 /* load any remaining addresses into the hash table */
2494
96838a40 2495 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2496 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2497 e1000_mta_set(hw, hash_value);
2498 }
2499
96838a40 2500 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2501 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2502}
2503
2504/* Need to wait a few seconds after link up to get diagnostic information from
2505 * the phy */
2506
2507static void
2508e1000_update_phy_info(unsigned long data)
2509{
2510 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2511 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2512}
2513
2514/**
2515 * e1000_82547_tx_fifo_stall - Timer Call-back
2516 * @data: pointer to adapter cast into an unsigned long
2517 **/
2518
2519static void
2520e1000_82547_tx_fifo_stall(unsigned long data)
2521{
2522 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2523 struct net_device *netdev = adapter->netdev;
2524 uint32_t tctl;
2525
96838a40
JB		 2526 if (atomic_read(&adapter->tx_fifo_stall)) {
2527 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2528 E1000_READ_REG(&adapter->hw, TDH)) &&
2529 (E1000_READ_REG(&adapter->hw, TDFT) ==
2530 E1000_READ_REG(&adapter->hw, TDFH)) &&
2531 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2532 E1000_READ_REG(&adapter->hw, TDFHS))) {
2533 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2534 E1000_WRITE_REG(&adapter->hw, TCTL,
2535 tctl & ~E1000_TCTL_EN);
2536 E1000_WRITE_REG(&adapter->hw, TDFT,
2537 adapter->tx_head_addr);
2538 E1000_WRITE_REG(&adapter->hw, TDFH,
2539 adapter->tx_head_addr);
2540 E1000_WRITE_REG(&adapter->hw, TDFTS,
2541 adapter->tx_head_addr);
2542 E1000_WRITE_REG(&adapter->hw, TDFHS,
2543 adapter->tx_head_addr);
2544 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2545 E1000_WRITE_FLUSH(&adapter->hw);
2546
2547 adapter->tx_fifo_head = 0;
2548 atomic_set(&adapter->tx_fifo_stall, 0);
2549 netif_wake_queue(netdev);
2550 } else {
2551 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2552 }
2553 }
2554}
2555
2556/**
2557 * e1000_watchdog - Timer Call-back
2558 * @data: pointer to adapter cast into an unsigned long
2559 **/
2560static void
2561e1000_watchdog(unsigned long data)
2562{
2563 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2564 struct net_device *netdev = adapter->netdev;
545c67c0 2565 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2566 uint32_t link, tctl;
cd94dd0b
AK		 2567 int32_t ret_val;
2568
2569 ret_val = e1000_check_for_link(&adapter->hw);
2570 if ((ret_val == E1000_ERR_PHY) &&
2571 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2572 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2573 /* See e1000_kumeran_lock_loss_workaround() */
2574 DPRINTK(LINK, INFO,
2575 "Gigabit has been disabled, downgrading speed\n");
2576 }
90fb5135 2577
2d7edb92
MC		 2578 if (adapter->hw.mac_type == e1000_82573) {
2579 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2580 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2581 e1000_update_mng_vlan(adapter);
96838a40 2582 }
1da177e4 2583
96838a40 2584 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2585 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2586 link = !adapter->hw.serdes_link_down;
2587 else
2588 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2589
96838a40
JB		 2590 if (link) {
2591 if (!netif_carrier_ok(netdev)) {
9669f53b 2592 uint32_t ctrl;
fe7fe28e 2593 boolean_t txb2b = 1;
1da177e4
LT		 2594 e1000_get_speed_and_duplex(&adapter->hw,
2595 &adapter->link_speed,
2596 &adapter->link_duplex);
2597
9669f53b
AK		 2598 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2599 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2600 "Flow Control: %s\n",
2601 adapter->link_speed,
2602 adapter->link_duplex == FULL_DUPLEX ?
2603 "Full Duplex" : "Half Duplex",
2604 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2605 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2606 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2607 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2608
7e6c9861
JK		 2609 /* tweak tx_queue_len according to speed/duplex
2610 * and adjust the timeout factor */
66a2b0a3
JK		 2611 netdev->tx_queue_len = adapter->tx_queue_len;
2612 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2613 switch (adapter->link_speed) {
2614 case SPEED_10:
fe7fe28e 2615 txb2b = 0;
7e6c9861
JK		 2616 netdev->tx_queue_len = 10;
2617 adapter->tx_timeout_factor = 8;
2618 break;
2619 case SPEED_100:
fe7fe28e 2620 txb2b = 0;
7e6c9861
JK		 2621 netdev->tx_queue_len = 100;
2622 /* maybe add some timeout factor ? */
2623 break;
2624 }
2625
fe7fe28e 2626 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2627 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2628 txb2b == 0) {
7e6c9861
JK		 2629 uint32_t tarc0;
2630 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
90fb5135 2631 tarc0 &= ~(1 << 21);
7e6c9861
JK		 2632 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2633 }
90fb5135 2634
7e6c9861
JK		 2635 /* disable TSO for pcie and 10/100 speeds, to avoid
2636 * some hardware issues */
2637 if (!adapter->tso_force &&
2638 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2639 switch (adapter->link_speed) {
2640 case SPEED_10:
66a2b0a3 2641 case SPEED_100:
7e6c9861
JK		 2642 DPRINTK(PROBE,INFO,
2643 "10/100 speed: disabling TSO\n");
2644 netdev->features &= ~NETIF_F_TSO;
87ca4e5b 2645 netdev->features &= ~NETIF_F_TSO6;
7e6c9861
JK		 2646 break;
2647 case SPEED_1000:
2648 netdev->features |= NETIF_F_TSO;
87ca4e5b 2649 netdev->features |= NETIF_F_TSO6;
7e6c9861
JK		 2650 break;
2651 default:
2652 /* oops */
66a2b0a3
JK		 2653 break;
2654 }
2655 }
7e6c9861
JK		 2656
2657 /* enable transmits in the hardware, need to do this
2658 * after setting TARC0 */
2659 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2660 tctl |= E1000_TCTL_EN;
2661 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2662
1da177e4
LT		 2663 netif_carrier_on(netdev);
2664 netif_wake_queue(netdev);
56e1393f 2665 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4 2666 adapter->smartspeed = 0;
bb8e3311
JG		 2667 } else {
2668 /* make sure the receive unit is started */
2669 if (adapter->hw.rx_needs_kicking) {
2670 struct e1000_hw *hw = &adapter->hw;
2671 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2672 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2673 }
1da177e4
LT		 2674 }
2675 } else {
96838a40 2676 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2677 adapter->link_speed = 0;
2678 adapter->link_duplex = 0;
2679 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2680 netif_carrier_off(netdev);
2681 netif_stop_queue(netdev);
56e1393f 2682 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
87041639
JK		 2683
2684 /* 80003ES2LAN workaround--
2685 * For packet buffer work-around on link down event;
2686 * disable receives in the ISR and
2687 * reset device here in the watchdog
2688 */
8fc897b0 2689 if (adapter->hw.mac_type == e1000_80003es2lan)
87041639
JK		 2690 /* reset device */
2691 schedule_work(&adapter->reset_task);
1da177e4
LT		 2692 }
2693
2694 e1000_smartspeed(adapter);
2695 }
2696
2697 e1000_update_stats(adapter);
2698
2699 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2700 adapter->tpt_old = adapter->stats.tpt;
2701 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2702 adapter->colc_old = adapter->stats.colc;
2703
2704 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2705 adapter->gorcl_old = adapter->stats.gorcl;
2706 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2707 adapter->gotcl_old = adapter->stats.gotcl;
2708
2709 e1000_update_adaptive(&adapter->hw);
2710
f56799ea 2711 if (!netif_carrier_ok(netdev)) {
581d708e 2712 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2713 /* We've lost link, so the controller stops DMA,
2714 * but we've got queued Tx work that's never going
2715 * to get done, so reset controller to flush Tx.
2716 * (Do the reset outside of interrupt context). */
87041639
JK		 2717 adapter->tx_timeout_count++;
2718 schedule_work(&adapter->reset_task);
1da177e4
LT		 2719 }
2720 }
2721
1da177e4
LT		 2722 /* Cause software interrupt to ensure rx ring is cleaned */
2723 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2724
2648345f 2725 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2726 adapter->detect_tx_hung = TRUE;
2727
96838a40 2728 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2729 * reset from the other port. Set the appropriate LAA in RAR[0] */
2730 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2731 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2732
1da177e4 2733 /* Reset the timer */
56e1393f 2734 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2735}
2736
835bb129
JB		 2737enum latency_range {
2738 lowest_latency = 0,
2739 low_latency = 1,
2740 bulk_latency = 2,
2741 latency_invalid = 255
2742};
2743
2744/**
2745 * e1000_update_itr - update the dynamic ITR value based on statistics
2746 * Stores a new ITR value based on packets and byte
2747 * counts during the last interrupt. The advantage of per interrupt
2748 * computation is faster updates and more accurate ITR for the current
2749 * traffic pattern. Constants in this function were computed
2750 * based on theoretical maximum wire speed and thresholds were set based
2751 * on testing data as well as attempting to minimize response time
2752 * while increasing bulk throughput.
2753 * this functionality is controlled by the InterruptThrottleRate module
2754 * parameter (see e1000_param.c)
2755 * @adapter: pointer to adapter
2756 * @itr_setting: current adapter->itr
2757 * @packets: the number of packets during this measurement interval
2758 * @bytes: the number of bytes during this measurement interval
2759 **/
2760static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2761 uint16_t itr_setting,
2762 int packets,
2763 int bytes)
2764{
2765 unsigned int retval = itr_setting;
2766 struct e1000_hw *hw = &adapter->hw;
2767
2768 if (unlikely(hw->mac_type < e1000_82540))
2769 goto update_itr_done;
2770
2771 if (packets == 0)
2772 goto update_itr_done;
2773
835bb129
JB		 2774 switch (itr_setting) {
2775 case lowest_latency:
2b65326e
JB		 2776 /* jumbo frames get bulk treatment*/
2777 if (bytes/packets > 8000)
2778 retval = bulk_latency;
2779 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2780 retval = low_latency;
2781 break;
2782 case low_latency: /* 50 usec aka 20000 ints/s */
2783 if (bytes > 10000) {
2b65326e
JB		 2784 /* jumbo frames need bulk latency setting */
2785 if (bytes/packets > 8000)
2786 retval = bulk_latency;
2787 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2788 retval = bulk_latency;
2789 else if ((packets > 35))
2790 retval = lowest_latency;
2b65326e
JB		 2791 } else if (bytes/packets > 2000)
2792 retval = bulk_latency;
2793 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2794 retval = lowest_latency;
2795 break;
2796 case bulk_latency: /* 250 usec aka 4000 ints/s */
2797 if (bytes > 25000) {
2798 if (packets > 35)
2799 retval = low_latency;
2b65326e
JB		 2800 } else if (bytes < 6000) {
2801 retval = low_latency;
835bb129
JB		 2802 }
2803 break;
2804 }
2805
2806update_itr_done:
2807 return retval;
2808}
2809
2810static void e1000_set_itr(struct e1000_adapter *adapter)
2811{
2812 struct e1000_hw *hw = &adapter->hw;
2813 uint16_t current_itr;
2814 uint32_t new_itr = adapter->itr;
2815
2816 if (unlikely(hw->mac_type < e1000_82540))
2817 return;
2818
2819 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2820 if (unlikely(adapter->link_speed != SPEED_1000)) {
2821 current_itr = 0;
2822 new_itr = 4000;
2823 goto set_itr_now;
2824 }
2825
2826 adapter->tx_itr = e1000_update_itr(adapter,
2827 adapter->tx_itr,
2828 adapter->total_tx_packets,
2829 adapter->total_tx_bytes);
2b65326e
JB		 2830 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2831 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2832 adapter->tx_itr = low_latency;
2833
835bb129
JB		 2834 adapter->rx_itr = e1000_update_itr(adapter,
2835 adapter->rx_itr,
2836 adapter->total_rx_packets,
2837 adapter->total_rx_bytes);
2b65326e
JB		 2838 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2839 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2840 adapter->rx_itr = low_latency;
835bb129
JB		 2841
2842 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2843
835bb129
JB		 2844 switch (current_itr) {
2845 /* counts and packets in update_itr are dependent on these numbers */
2846 case lowest_latency:
2847 new_itr = 70000;
2848 break;
2849 case low_latency:
2850 new_itr = 20000; /* aka hwitr = ~200 */
2851 break;
2852 case bulk_latency:
2853 new_itr = 4000;
2854 break;
2855 default:
2856 break;
2857 }
2858
2859set_itr_now:
2860 if (new_itr != adapter->itr) {
2861 /* this attempts to bias the interrupt rate towards Bulk
2862 * by adding intermediate steps when interrupt rate is
2863 * increasing */
2864 new_itr = new_itr > adapter->itr ?
2865 min(adapter->itr + (new_itr >> 2), new_itr) :
2866 new_itr;
2867 adapter->itr = new_itr;
2868 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2869 }
2870
2871 return;
2872}
2873
1da177e4
LT		 2874#define E1000_TX_FLAGS_CSUM 0x00000001
2875#define E1000_TX_FLAGS_VLAN 0x00000002
2876#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2877#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2878#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2879#define E1000_TX_FLAGS_VLAN_SHIFT 16
2880
e619d523 2881static int
581d708e
MC		 2882e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2883 struct sk_buff *skb)
1da177e4 2884{
1da177e4 2885 struct e1000_context_desc *context_desc;
545c67c0 2886 struct e1000_buffer *buffer_info;
1da177e4
LT		 2887 unsigned int i;
2888 uint32_t cmd_length = 0;
2d7edb92 2889 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2890 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2891 int err;
2892
89114afd 2893 if (skb_is_gso(skb)) {
1da177e4
LT		 2894 if (skb_header_cloned(skb)) {
2895 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2896 if (err)
2897 return err;
2898 }
2899
ab6a5bb6 2900 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2901 mss = skb_shinfo(skb)->gso_size;
60828236 2902 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2903 struct iphdr *iph = ip_hdr(skb);
2904 iph->tot_len = 0;
2905 iph->check = 0;
aa8223c7
ACM		 2906 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2907 iph->daddr, 0,
2908 IPPROTO_TCP,
2909 0);
2d7edb92 2910 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2911 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2912 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2913 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2914 tcp_hdr(skb)->check =
0660e03f
ACM		 2915 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2916 &ipv6_hdr(skb)->daddr,
2917 0, IPPROTO_TCP, 0);
2d7edb92 2918 ipcse = 0;
2d7edb92 2919 }
bbe735e4 2920 ipcss = skb_network_offset(skb);
eddc9ec5 2921 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2922 tucss = skb_transport_offset(skb);
aa8223c7 2923 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2924 tucse = 0;
2925
2926 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2927 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2928
581d708e
MC		 2929 i = tx_ring->next_to_use;
2930 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2931 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2932
2933 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2934 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2935 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2936 context_desc->upper_setup.tcp_fields.tucss = tucss;
2937 context_desc->upper_setup.tcp_fields.tucso = tucso;
2938 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2939 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2940 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2941 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2942
545c67c0 2943 buffer_info->time_stamp = jiffies;
a9ebadd6 2944 buffer_info->next_to_watch = i;
545c67c0 2945
581d708e
MC		 2946 if (++i == tx_ring->count) i = 0;
2947 tx_ring->next_to_use = i;
1da177e4 2948
8241e35e 2949 return TRUE;
1da177e4 2950 }
8241e35e 2951 return FALSE;
1da177e4
LT		 2952}
2953
e619d523 2954static boolean_t
581d708e
MC		 2955e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2956 struct sk_buff *skb)
1da177e4
LT		 2957{
2958 struct e1000_context_desc *context_desc;
545c67c0 2959 struct e1000_buffer *buffer_info;
1da177e4
LT		 2960 unsigned int i;
2961 uint8_t css;
2962
84fa7933 2963 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
ea2ae17d 2964 css = skb_transport_offset(skb);
1da177e4 2965
581d708e 2966 i = tx_ring->next_to_use;
545c67c0 2967 buffer_info = &tx_ring->buffer_info[i];
581d708e 2968 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4 2969
f6c57baf 2970 context_desc->lower_setup.ip_config = 0;
1da177e4 2971 context_desc->upper_setup.tcp_fields.tucss = css;
628592cc
HX		 2972 context_desc->upper_setup.tcp_fields.tucso =
2973 css + skb->csum_offset;
1da177e4
LT		 2974 context_desc->upper_setup.tcp_fields.tucse = 0;
2975 context_desc->tcp_seg_setup.data = 0;
2976 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2977
545c67c0 2978 buffer_info->time_stamp = jiffies;
a9ebadd6 2979 buffer_info->next_to_watch = i;
545c67c0 2980
581d708e
MC		 2981 if (unlikely(++i == tx_ring->count)) i = 0;
2982 tx_ring->next_to_use = i;
1da177e4
LT		 2983
2984 return TRUE;
2985 }
2986
2987 return FALSE;
2988}
2989
2990#define E1000_MAX_TXD_PWR 12
2991#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2992
e619d523 2993static int
581d708e
MC		 2994e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2995 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2996 unsigned int nr_frags, unsigned int mss)
1da177e4 2997{
1da177e4
LT		 2998 struct e1000_buffer *buffer_info;
2999 unsigned int len = skb->len;
3000 unsigned int offset = 0, size, count = 0, i;
3001 unsigned int f;
3002 len -= skb->data_len;
3003
3004 i = tx_ring->next_to_use;
3005
96838a40 3006 while (len) {
1da177e4
LT		 3007 buffer_info = &tx_ring->buffer_info[i];
3008 size = min(len, max_per_txd);
fd803241
JK		 3009 /* Workaround for Controller erratum --
3010 * descriptor for non-tso packet in a linear SKB that follows a
3011 * tso gets written back prematurely before the data is fully
0f15a8fa 3012 * DMA'd to the controller */
fd803241 3013 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 3014 !skb_is_gso(skb)) {
fd803241
JK		 3015 tx_ring->last_tx_tso = 0;
3016 size -= 4;
3017 }
3018
1da177e4
LT		 3019 /* Workaround for premature desc write-backs
3020 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3021 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 3022 size -= 4;
97338bde
MC		 3023 /* work-around for errata 10 and it applies
3024 * to all controllers in PCI-X mode
3025 * The fix is to make sure that the first descriptor of a
3026 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3027 */
96838a40 3028 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3029 (size > 2015) && count == 0))
3030 size = 2015;
96838a40 3031
1da177e4
LT		 3032 /* Workaround for potential 82544 hang in PCI-X. Avoid
3033 * terminating buffers within evenly-aligned dwords. */
96838a40 3034 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3035 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3036 size > 4))
3037 size -= 4;
3038
3039 buffer_info->length = size;
3040 buffer_info->dma =
3041 pci_map_single(adapter->pdev,
3042 skb->data + offset,
3043 size,
3044 PCI_DMA_TODEVICE);
3045 buffer_info->time_stamp = jiffies;
a9ebadd6 3046 buffer_info->next_to_watch = i;
1da177e4
LT		 3047
3048 len -= size;
3049 offset += size;
3050 count++;
96838a40 3051 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3052 }
3053
96838a40 3054 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 3055 struct skb_frag_struct *frag;
3056
3057 frag = &skb_shinfo(skb)->frags[f];
3058 len = frag->size;
3059 offset = frag->page_offset;
3060
96838a40 3061 while (len) {
1da177e4
LT		 3062 buffer_info = &tx_ring->buffer_info[i];
3063 size = min(len, max_per_txd);
1da177e4
LT		 3064 /* Workaround for premature desc write-backs
3065 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3066 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 3067 size -= 4;
1da177e4
LT		 3068 /* Workaround for potential 82544 hang in PCI-X.
3069 * Avoid terminating buffers within evenly-aligned
3070 * dwords. */
96838a40 3071 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3072 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3073 size > 4))
3074 size -= 4;
3075
3076 buffer_info->length = size;
3077 buffer_info->dma =
3078 pci_map_page(adapter->pdev,
3079 frag->page,
3080 offset,
3081 size,
3082 PCI_DMA_TODEVICE);
3083 buffer_info->time_stamp = jiffies;
a9ebadd6 3084 buffer_info->next_to_watch = i;
1da177e4
LT		 3085
3086 len -= size;
3087 offset += size;
3088 count++;
96838a40 3089 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3090 }
3091 }
3092
3093 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3094 tx_ring->buffer_info[i].skb = skb;
3095 tx_ring->buffer_info[first].next_to_watch = i;
3096
3097 return count;
3098}
3099
e619d523 3100static void
581d708e
MC		 3101e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3102 int tx_flags, int count)
1da177e4 3103{
1da177e4
LT		 3104 struct e1000_tx_desc *tx_desc = NULL;
3105 struct e1000_buffer *buffer_info;
3106 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3107 unsigned int i;
3108
96838a40 3109 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 3110 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3111 E1000_TXD_CMD_TSE;
2d7edb92
MC		 3112 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3113
96838a40 3114 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 3115 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 3116 }
3117
96838a40 3118 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 3119 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3120 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3121 }
3122
96838a40 3123 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3124 txd_lower |= E1000_TXD_CMD_VLE;
3125 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3126 }
3127
3128 i = tx_ring->next_to_use;
3129
96838a40 3130 while (count--) {
1da177e4
LT		 3131 buffer_info = &tx_ring->buffer_info[i];
3132 tx_desc = E1000_TX_DESC(*tx_ring, i);
3133 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3134 tx_desc->lower.data =
3135 cpu_to_le32(txd_lower | buffer_info->length);
3136 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3137 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3138 }
3139
3140 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3141
3142 /* Force memory writes to complete before letting h/w
3143 * know there are new descriptors to fetch. (Only
3144 * applicable for weak-ordered memory model archs,
3145 * such as IA-64). */
3146 wmb();
3147
3148 tx_ring->next_to_use = i;
581d708e 3149 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2ce9047f
JB		 3150 /* we need this if more than one processor can write to our tail
3151 * at a time, it syncronizes IO on IA64/Altix systems */
3152 mmiowb();
1da177e4
LT		 3153}
3154
3155/**
3156 * 82547 workaround to avoid controller hang in half-duplex environment.
3157 * The workaround is to avoid queuing a large packet that would span
3158 * the internal Tx FIFO ring boundary by notifying the stack to resend
3159 * the packet at a later time. This gives the Tx FIFO an opportunity to
3160 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3161 * to the beginning of the Tx FIFO.
3162 **/
3163
3164#define E1000_FIFO_HDR 0x10
3165#define E1000_82547_PAD_LEN 0x3E0
3166
e619d523 3167static int
1da177e4
LT		 3168e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3169{
3170 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3171 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3172
9099cfb9 3173 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3174
96838a40 3175 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3176 goto no_fifo_stall_required;
3177
96838a40 3178 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3179 return 1;
3180
96838a40 3181 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3182 atomic_set(&adapter->tx_fifo_stall, 1);
3183 return 1;
3184 }
3185
3186no_fifo_stall_required:
3187 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3188 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3189 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3190 return 0;
3191}
3192
2d7edb92 3193#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 3194static int
2d7edb92
MC		 3195e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3196{
3197 struct e1000_hw *hw = &adapter->hw;
3198 uint16_t length, offset;
96838a40
JB		 3199 if (vlan_tx_tag_present(skb)) {
3200 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 3201 ( adapter->hw.mng_cookie.status &
3202 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3203 return 0;
3204 }
20a44028 3205 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 3206 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 3207 if ((htons(ETH_P_IP) == eth->h_proto)) {
3208 const struct iphdr *ip =
2d7edb92 3209 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 3210 if (IPPROTO_UDP == ip->protocol) {
3211 struct udphdr *udp =
3212 (struct udphdr *)((uint8_t *)ip +
2d7edb92 3213 (ip->ihl << 2));
96838a40 3214 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 3215 offset = (uint8_t *)udp + 8 - skb->data;
3216 length = skb->len - offset;
3217
3218 return e1000_mng_write_dhcp_info(hw,
96838a40 3219 (uint8_t *)udp + 8,
2d7edb92
MC		 3220 length);
3221 }
3222 }
3223 }
3224 }
3225 return 0;
3226}
3227
65c7973f
JB		 3228static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3229{
3230 struct e1000_adapter *adapter = netdev_priv(netdev);
3231 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3232
3233 netif_stop_queue(netdev);
3234 /* Herbert's original patch had:
3235 * smp_mb__after_netif_stop_queue();
3236 * but since that doesn't exist yet, just open code it. */
3237 smp_mb();
3238
3239 /* We need to check again in a case another CPU has just
3240 * made room available. */
3241 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3242 return -EBUSY;
3243
3244 /* A reprieve! */
3245 netif_start_queue(netdev);
fcfb1224 3246 ++adapter->restart_queue;
65c7973f
JB		 3247 return 0;
3248}
3249
3250static int e1000_maybe_stop_tx(struct net_device *netdev,
3251 struct e1000_tx_ring *tx_ring, int size)
3252{
3253 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3254 return 0;
3255 return __e1000_maybe_stop_tx(netdev, size);
3256}
3257
1da177e4
LT		 3258#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3259static int
3260e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3261{
60490fe0 3262 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 3263 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3264 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3265 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3266 unsigned int tx_flags = 0;
3267 unsigned int len = skb->len;
3268 unsigned long flags;
3269 unsigned int nr_frags = 0;
3270 unsigned int mss = 0;
3271 int count = 0;
76c224bc 3272 int tso;
1da177e4
LT		 3273 unsigned int f;
3274 len -= skb->data_len;
3275
65c7973f
JB		 3276 /* This goes back to the question of how to logically map a tx queue
3277 * to a flow. Right now, performance is impacted slightly negatively
3278 * if using multiple tx queues. If the stack breaks away from a
3279 * single qdisc implementation, we can look at this again. */
581d708e 3280 tx_ring = adapter->tx_ring;
24025e4e 3281
581d708e 3282 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3283 dev_kfree_skb_any(skb);
3284 return NETDEV_TX_OK;
3285 }
3286
032fe6e9
JB		 3287 /* 82571 and newer doesn't need the workaround that limited descriptor
3288 * length to 4kB */
3289 if (adapter->hw.mac_type >= e1000_82571)
3290 max_per_txd = 8192;
3291
7967168c 3292 mss = skb_shinfo(skb)->gso_size;
76c224bc 3293 /* The controller does a simple calculation to
1da177e4
LT		 3294 * make sure there is enough room in the FIFO before
3295 * initiating the DMA for each buffer. The calc is:
3296 * 4 = ceil(buffer len/mss). To make sure we don't
3297 * overrun the FIFO, adjust the max buffer len if mss
3298 * drops. */
96838a40 3299 if (mss) {
9a3056da 3300 uint8_t hdr_len;
1da177e4
LT		 3301 max_per_txd = min(mss << 2, max_per_txd);
3302 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3303
90fb5135
AK		 3304 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3305 * points to just header, pull a few bytes of payload from
3306 * frags into skb->data */
ab6a5bb6 3307 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
9f687888
JK		 3308 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3309 switch (adapter->hw.mac_type) {
3310 unsigned int pull_size;
683a2aa3
HX		 3311 case e1000_82544:
3312 /* Make sure we have room to chop off 4 bytes,
3313 * and that the end alignment will work out to
3314 * this hardware's requirements
3315 * NOTE: this is a TSO only workaround
3316 * if end byte alignment not correct move us
3317 * into the next dword */
27a884dc 3318 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 3319 break;
3320 /* fall through */
9f687888
JK		 3321 case e1000_82571:
3322 case e1000_82572:
3323 case e1000_82573:
cd94dd0b 3324 case e1000_ich8lan:
9f687888
JK		 3325 pull_size = min((unsigned int)4, skb->data_len);
3326 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3327 DPRINTK(DRV, ERR,
9f687888
JK		 3328 "__pskb_pull_tail failed.\n");
3329 dev_kfree_skb_any(skb);
749dfc70 3330 return NETDEV_TX_OK;
9f687888
JK		 3331 }
3332 len = skb->len - skb->data_len;
3333 break;
3334 default:
3335 /* do nothing */
3336 break;
d74bbd3b 3337 }
9a3056da 3338 }
1da177e4
LT		 3339 }
3340
9a3056da 3341 /* reserve a descriptor for the offload context */
84fa7933 3342 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3343 count++;
2648345f 3344 count++;
fd803241 3345
fd803241 3346 /* Controller Erratum workaround */
89114afd 3347 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3348 count++;
fd803241 3349
1da177e4
LT		 3350 count += TXD_USE_COUNT(len, max_txd_pwr);
3351
96838a40 3352 if (adapter->pcix_82544)
1da177e4
LT		 3353 count++;
3354
96838a40 3355 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3356 * in PCI-X mode, so add one more descriptor to the count
3357 */
96838a40 3358 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3359 (len > 2015)))
3360 count++;
3361
1da177e4 3362 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3363 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3364 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3365 max_txd_pwr);
96838a40 3366 if (adapter->pcix_82544)
1da177e4
LT		 3367 count += nr_frags;
3368
0f15a8fa
JK		 3369
3370 if (adapter->hw.tx_pkt_filtering &&
3371 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 3372 e1000_transfer_dhcp_info(adapter, skb);
3373
f50393fe 3374 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
581d708e 3375 /* Collision - tell upper layer to requeue */
581d708e 3376 return NETDEV_TX_LOCKED;
1da177e4
LT		 3377
3378 /* need: count + 2 desc gap to keep tail from touching
3379 * head, otherwise try next time */
65c7973f 3380 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3381 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3382 return NETDEV_TX_BUSY;
3383 }
3384
96838a40
JB		 3385 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3386 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3387 netif_stop_queue(netdev);
1314bbf3 3388 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
581d708e 3389 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3390 return NETDEV_TX_BUSY;
3391 }
3392 }
3393
96838a40 3394 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3395 tx_flags |= E1000_TX_FLAGS_VLAN;
3396 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3397 }
3398
581d708e 3399 first = tx_ring->next_to_use;
96838a40 3400
581d708e 3401 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3402 if (tso < 0) {
3403 dev_kfree_skb_any(skb);
581d708e 3404 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3405 return NETDEV_TX_OK;
3406 }
3407
fd803241
JK		 3408 if (likely(tso)) {
3409 tx_ring->last_tx_tso = 1;
1da177e4 3410 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3411 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3412 tx_flags |= E1000_TX_FLAGS_CSUM;
3413
2d7edb92 3414 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3415 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3416 * no longer assume, we must. */
60828236 3417 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3418 tx_flags |= E1000_TX_FLAGS_IPV4;
3419
581d708e
MC		 3420 e1000_tx_queue(adapter, tx_ring, tx_flags,
3421 e1000_tx_map(adapter, tx_ring, skb, first,
3422 max_per_txd, nr_frags, mss));
1da177e4
LT		 3423
3424 netdev->trans_start = jiffies;
3425
3426 /* Make sure there is space in the ring for the next send. */
65c7973f 3427 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3428
581d708e 3429 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3430 return NETDEV_TX_OK;
3431}
3432
3433/**
3434 * e1000_tx_timeout - Respond to a Tx Hang
3435 * @netdev: network interface device structure
3436 **/
3437
3438static void
3439e1000_tx_timeout(struct net_device *netdev)
3440{
60490fe0 3441 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3442
3443 /* Do the reset outside of interrupt context */
87041639
JK		 3444 adapter->tx_timeout_count++;
3445 schedule_work(&adapter->reset_task);
1da177e4
LT		 3446}
3447
3448static void
65f27f38 3449e1000_reset_task(struct work_struct *work)
1da177e4 3450{
65f27f38
DH		 3451 struct e1000_adapter *adapter =
3452 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3453
2db10a08 3454 e1000_reinit_locked(adapter);
1da177e4
LT		 3455}
3456
3457/**
3458 * e1000_get_stats - Get System Network Statistics
3459 * @netdev: network interface device structure
3460 *
3461 * Returns the address of the device statistics structure.
3462 * The statistics are actually updated from the timer callback.
3463 **/
3464
3465static struct net_device_stats *
3466e1000_get_stats(struct net_device *netdev)
3467{
60490fe0 3468 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3469
6b7660cd 3470 /* only return the current stats */
1da177e4
LT		 3471 return &adapter->net_stats;
3472}
3473
3474/**
3475 * e1000_change_mtu - Change the Maximum Transfer Unit
3476 * @netdev: network interface device structure
3477 * @new_mtu: new value for maximum frame size
3478 *
3479 * Returns 0 on success, negative on failure
3480 **/
3481
3482static int
3483e1000_change_mtu(struct net_device *netdev, int new_mtu)
3484{
60490fe0 3485 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3486 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3487 uint16_t eeprom_data = 0;
1da177e4 3488
96838a40
JB		 3489 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3490 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3491 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3492 return -EINVAL;
2d7edb92 3493 }
1da177e4 3494
997f5cbd
JK		 3495 /* Adapter-specific max frame size limits. */
3496 switch (adapter->hw.mac_type) {
9e2feace 3497 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3498 case e1000_ich8lan:
997f5cbd
JK		 3499 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3500 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3501 return -EINVAL;
2d7edb92 3502 }
997f5cbd 3503 break;
85b22eb6 3504 case e1000_82573:
249d71d6
BA		 3505 /* Jumbo Frames not supported if:
3506 * - this is not an 82573L device
3507 * - ASPM is enabled in any way (0x1A bits 3:2) */
85b22eb6
JK		 3508 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3509 &eeprom_data);
249d71d6
BA		 3510 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3511 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3512 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3513 DPRINTK(PROBE, ERR,
3514 "Jumbo Frames not supported.\n");
3515 return -EINVAL;
3516 }
3517 break;
3518 }
249d71d6
BA		 3519 /* ERT will be enabled later to enable wire speed receives */
3520
85b22eb6 3521 /* fall through to get support */
997f5cbd
JK		 3522 case e1000_82571:
3523 case e1000_82572:
87041639 3524 case e1000_80003es2lan:
997f5cbd
JK		 3525#define MAX_STD_JUMBO_FRAME_SIZE 9234
3526 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3527 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3528 return -EINVAL;
3529 }
3530 break;
3531 default:
3532 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3533 break;
1da177e4
LT		 3534 }
3535
87f5032e 3536 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3537 * means we reserve 2 more, this pushes us to allocate from the next
3538 * larger slab size
3539 * i.e. RXBUFFER_2048 --> size-4096 slab */
3540
3541 if (max_frame <= E1000_RXBUFFER_256)
3542 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3543 else if (max_frame <= E1000_RXBUFFER_512)
3544 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3545 else if (max_frame <= E1000_RXBUFFER_1024)
3546 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3547 else if (max_frame <= E1000_RXBUFFER_2048)
3548 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3549 else if (max_frame <= E1000_RXBUFFER_4096)
3550 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3551 else if (max_frame <= E1000_RXBUFFER_8192)
3552 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3553 else if (max_frame <= E1000_RXBUFFER_16384)
3554 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3555
3556 /* adjust allocation if LPE protects us, and we aren't using SBP */
9e2feace
AK		 3557 if (!adapter->hw.tbi_compatibility_on &&
3558 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3559 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3560 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3561
2d7edb92 3562 netdev->mtu = new_mtu;
83cd8279 3563 adapter->hw.max_frame_size = max_frame;
2d7edb92 3564
2db10a08
AK		 3565 if (netif_running(netdev))
3566 e1000_reinit_locked(adapter);
1da177e4 3567
1da177e4
LT		 3568 return 0;
3569}
3570
3571/**
3572 * e1000_update_stats - Update the board statistics counters
3573 * @adapter: board private structure
3574 **/
3575
3576void
3577e1000_update_stats(struct e1000_adapter *adapter)
3578{
3579 struct e1000_hw *hw = &adapter->hw;
282f33c9 3580 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3581 unsigned long flags;
3582 uint16_t phy_tmp;
3583
3584#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3585
282f33c9
LV		 3586 /*
3587 * Prevent stats update while adapter is being reset, or if the pci
3588 * connection is down.
3589 */
9026729b 3590 if (adapter->link_speed == 0)
282f33c9 3591 return;
81b1955e 3592 if (pci_channel_offline(pdev))
9026729b
AK		 3593 return;
3594
1da177e4
LT		 3595 spin_lock_irqsave(&adapter->stats_lock, flags);
3596
3597 /* these counters are modified from e1000_adjust_tbi_stats,
3598 * called from the interrupt context, so they must only
3599 * be written while holding adapter->stats_lock
3600 */
3601
3602 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3603 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3604 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3605 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3606 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3607 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3608 adapter->stats.roc += E1000_READ_REG(hw, ROC);
cd94dd0b
AK		 3609
3610 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3611 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3612 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3613 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3614 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3615 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3616 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
cd94dd0b 3617 }
1da177e4
LT		 3618
3619 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3620 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3621 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3622 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3623 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3624 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3625 adapter->stats.dc += E1000_READ_REG(hw, DC);
3626 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3627 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3628 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3629 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3630 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3631 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3632 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3633 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3634 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3635 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3636 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3637 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3638 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3639 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3640 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3641 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3642 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3643 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3644 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
cd94dd0b
AK		 3645
3646 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3647 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3648 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3649 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3650 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3651 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3652 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
cd94dd0b
AK		 3653 }
3654
1da177e4
LT		 3655 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3656 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3657
3658 /* used for adaptive IFS */
3659
3660 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3661 adapter->stats.tpt += hw->tx_packet_delta;
3662 hw->collision_delta = E1000_READ_REG(hw, COLC);
3663 adapter->stats.colc += hw->collision_delta;
3664
96838a40 3665 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3666 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3667 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3668 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3669 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3670 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3671 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3672 }
96838a40 3673 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3674 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3675 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
cd94dd0b
AK		 3676
3677 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3678 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3679 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3680 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3681 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3682 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3683 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3684 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
cd94dd0b 3685 }
2d7edb92 3686 }
1da177e4
LT		 3687
3688 /* Fill out the OS statistics structure */
1da177e4
LT		 3689 adapter->net_stats.rx_packets = adapter->stats.gprc;
3690 adapter->net_stats.tx_packets = adapter->stats.gptc;
3691 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3692 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3693 adapter->net_stats.multicast = adapter->stats.mprc;
3694 adapter->net_stats.collisions = adapter->stats.colc;
3695
3696 /* Rx Errors */
3697
87041639
JK		 3698 /* RLEC on some newer hardware can be incorrect so build
3699 * our own version based on RUC and ROC */
1da177e4
LT		 3700 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3701 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3702 adapter->stats.ruc + adapter->stats.roc +
3703 adapter->stats.cexterr;
49559854
MW		 3704 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3705 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3706 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3707 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3708 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3709
3710 /* Tx Errors */
49559854
MW		 3711 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3712 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3713 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3714 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3715 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
167fb284
JG		 3716 if (adapter->hw.bad_tx_carr_stats_fd &&
3717 adapter->link_duplex == FULL_DUPLEX) {
3718 adapter->net_stats.tx_carrier_errors = 0;
3719 adapter->stats.tncrs = 0;
3720 }
1da177e4
LT		 3721
3722 /* Tx Dropped needs to be maintained elsewhere */
3723
3724 /* Phy Stats */
96838a40
JB		 3725 if (hw->media_type == e1000_media_type_copper) {
3726 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3727 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3728 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3729 adapter->phy_stats.idle_errors += phy_tmp;
3730 }
3731
96838a40 3732 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3733 (hw->phy_type == e1000_phy_m88) &&
3734 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3735 adapter->phy_stats.receive_errors += phy_tmp;
3736 }
3737
15e376b4
JG		 3738 /* Management Stats */
3739 if (adapter->hw.has_smbus) {
3740 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3741 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3742 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3743 }
3744
1da177e4
LT		 3745 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3746}
9ac98284
JB		 3747
3748/**
3749 * e1000_intr_msi - Interrupt Handler
3750 * @irq: interrupt number
3751 * @data: pointer to a network interface device structure
3752 **/
3753
b5fc8f0c
JB		 3754static irqreturn_t
3755e1000_intr_msi(int irq, void *data)
9ac98284
JB		 3756{
3757 struct net_device *netdev = data;
3758 struct e1000_adapter *adapter = netdev_priv(netdev);
3759 struct e1000_hw *hw = &adapter->hw;
3760#ifndef CONFIG_E1000_NAPI
3761 int i;
3762#endif
b5fc8f0c 3763 uint32_t icr = E1000_READ_REG(hw, ICR);
9ac98284 3764
9ac98284 3765#ifdef CONFIG_E1000_NAPI
b5fc8f0c
JB		 3766 /* read ICR disables interrupts using IAM, so keep up with our
3767 * enable/disable accounting */
3768 atomic_inc(&adapter->irq_sem);
9ac98284 3769#endif
b5fc8f0c
JB		 3770 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3771 hw->get_link_status = 1;
3772 /* 80003ES2LAN workaround-- For packet buffer work-around on
3773 * link down event; disable receives here in the ISR and reset
3774 * adapter in watchdog */
3775 if (netif_carrier_ok(netdev) &&
3776 (adapter->hw.mac_type == e1000_80003es2lan)) {
3777 /* disable receives */
3778 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3779 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
9ac98284 3780 }
b5fc8f0c
JB		 3781 /* guard against interrupt when we're going down */
3782 if (!test_bit(__E1000_DOWN, &adapter->flags))
3783 mod_timer(&adapter->watchdog_timer, jiffies + 1);
9ac98284
JB		 3784 }
3785
3786#ifdef CONFIG_E1000_NAPI
835bb129
JB		 3787 if (likely(netif_rx_schedule_prep(netdev))) {
3788 adapter->total_tx_bytes = 0;
3789 adapter->total_tx_packets = 0;
3790 adapter->total_rx_bytes = 0;
3791 adapter->total_rx_packets = 0;
9ac98284 3792 __netif_rx_schedule(netdev);
835bb129 3793 } else
9ac98284
JB		 3794 e1000_irq_enable(adapter);
3795#else
835bb129
JB		 3796 adapter->total_tx_bytes = 0;
3797 adapter->total_rx_bytes = 0;
3798 adapter->total_tx_packets = 0;
3799 adapter->total_rx_packets = 0;
3800
9ac98284
JB		 3801 for (i = 0; i < E1000_MAX_INTR; i++)
3802 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
46fcc86d 3803 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
9ac98284 3804 break;
835bb129
JB		 3805
3806 if (likely(adapter->itr_setting & 3))
3807 e1000_set_itr(adapter);
9ac98284
JB		 3808#endif
3809
3810 return IRQ_HANDLED;
3811}
1da177e4
LT		 3812
3813/**
3814 * e1000_intr - Interrupt Handler
3815 * @irq: interrupt number
3816 * @data: pointer to a network interface device structure
1da177e4
LT		 3817 **/
3818
3819static irqreturn_t
7d12e780 3820e1000_intr(int irq, void *data)
1da177e4
LT		 3821{
3822 struct net_device *netdev = data;
60490fe0 3823 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3824 struct e1000_hw *hw = &adapter->hw;
87041639 3825 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3826#ifndef CONFIG_E1000_NAPI
581d708e 3827 int i;
835bb129
JB		 3828#endif
3829 if (unlikely(!icr))
3830 return IRQ_NONE; /* Not our interrupt */
3831
3832#ifdef CONFIG_E1000_NAPI
3833 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3834 * not set, then the adapter didn't send an interrupt */
3835 if (unlikely(hw->mac_type >= e1000_82571 &&
3836 !(icr & E1000_ICR_INT_ASSERTED)))
3837 return IRQ_NONE;
3838
1e613fd9
JK		 3839 /* Interrupt Auto-Mask...upon reading ICR,
3840 * interrupts are masked. No need for the
3841 * IMC write, but it does mean we should
3842 * account for it ASAP. */
3843 if (likely(hw->mac_type >= e1000_82571))
3844 atomic_inc(&adapter->irq_sem);
be2b28ed 3845#endif
1da177e4 3846
96838a40 3847 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3848 hw->get_link_status = 1;
87041639
JK		 3849 /* 80003ES2LAN workaround--
3850 * For packet buffer work-around on link down event;
3851 * disable receives here in the ISR and
3852 * reset adapter in watchdog
3853 */
3854 if (netif_carrier_ok(netdev) &&
3855 (adapter->hw.mac_type == e1000_80003es2lan)) {
3856 /* disable receives */
3857 rctl = E1000_READ_REG(hw, RCTL);
3858 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3859 }
1314bbf3
AK		 3860 /* guard against interrupt when we're going down */
3861 if (!test_bit(__E1000_DOWN, &adapter->flags))
3862 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3863 }
3864
3865#ifdef CONFIG_E1000_NAPI
1e613fd9 3866 if (unlikely(hw->mac_type < e1000_82571)) {
835bb129 3867 /* disable interrupts, without the synchronize_irq bit */
1e613fd9
JK		 3868 atomic_inc(&adapter->irq_sem);
3869 E1000_WRITE_REG(hw, IMC, ~0);
3870 E1000_WRITE_FLUSH(hw);
3871 }
835bb129
JB		 3872 if (likely(netif_rx_schedule_prep(netdev))) {
3873 adapter->total_tx_bytes = 0;
3874 adapter->total_tx_packets = 0;
3875 adapter->total_rx_bytes = 0;
3876 adapter->total_rx_packets = 0;
d3d9e484 3877 __netif_rx_schedule(netdev);
835bb129 3878 } else
90fb5135
AK		 3879 /* this really should not happen! if it does it is basically a
3880 * bug, but not a hard error, so enable ints and continue */
581d708e 3881 e1000_irq_enable(adapter);
c1605eb3 3882#else
1da177e4 3883 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3884 * Due to Hub Link bus being occupied, an interrupt
3885 * de-assertion message is not able to be sent.
3886 * When an interrupt assertion message is generated later,
3887 * two messages are re-ordered and sent out.
3888 * That causes APIC to think 82547 is in de-assertion
3889 * state, while 82547 is in assertion state, resulting
3890 * in dead lock. Writing IMC forces 82547 into
3891 * de-assertion state.
3892 */
3893 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3894 atomic_inc(&adapter->irq_sem);
2648345f 3895 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3896 }
3897
835bb129
JB		 3898 adapter->total_tx_bytes = 0;
3899 adapter->total_rx_bytes = 0;
3900 adapter->total_tx_packets = 0;
3901 adapter->total_rx_packets = 0;
3902
96838a40
JB		 3903 for (i = 0; i < E1000_MAX_INTR; i++)
3904 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
46fcc86d 3905 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3906 break;
3907
835bb129
JB		 3908 if (likely(adapter->itr_setting & 3))
3909 e1000_set_itr(adapter);
3910
96838a40 3911 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3912 e1000_irq_enable(adapter);
581d708e 3913
c1605eb3 3914#endif
1da177e4
LT		 3915 return IRQ_HANDLED;
3916}
3917
3918#ifdef CONFIG_E1000_NAPI
3919/**
3920 * e1000_clean - NAPI Rx polling callback
3921 * @adapter: board private structure
3922 **/
3923
3924static int
581d708e 3925e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3926{
581d708e
MC		 3927 struct e1000_adapter *adapter;
3928 int work_to_do = min(*budget, poll_dev->quota);
d3d9e484 3929 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3930
3931 /* Must NOT use netdev_priv macro here. */
3932 adapter = poll_dev->priv;
3933
3934 /* Keep link state information with original netdev */
d3d9e484 3935 if (!netif_carrier_ok(poll_dev))
581d708e 3936 goto quit_polling;
2648345f 3937
d3d9e484
AK		 3938 /* e1000_clean is called per-cpu. This lock protects
3939 * tx_ring[0] from being cleaned by multiple cpus
3940 * simultaneously. A failure obtaining the lock means
3941 * tx_ring[0] is currently being cleaned anyway. */
3942 if (spin_trylock(&adapter->tx_queue_lock)) {
3943 tx_cleaned = e1000_clean_tx_irq(adapter,
3944 &adapter->tx_ring[0]);
3945 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3946 }
3947
d3d9e484 3948 adapter->clean_rx(adapter, &adapter->rx_ring[0],
581d708e 3949 &work_done, work_to_do);
1da177e4
LT		 3950
3951 *budget -= work_done;
581d708e 3952 poll_dev->quota -= work_done;
96838a40 3953
2b02893e 3954 /* If no Tx and not enough Rx work done, exit the polling mode */
46fcc86d 3955 if ((!tx_cleaned && (work_done == 0)) ||
d3d9e484 3956 !netif_running(poll_dev)) {
581d708e 3957quit_polling:
835bb129
JB		 3958 if (likely(adapter->itr_setting & 3))
3959 e1000_set_itr(adapter);
581d708e 3960 netif_rx_complete(poll_dev);
1da177e4
LT		 3961 e1000_irq_enable(adapter);
3962 return 0;
3963 }
3964
3965 return 1;
3966}
3967
3968#endif
3969/**
3970 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3971 * @adapter: board private structure
3972 **/
3973
3974static boolean_t
581d708e
MC		 3975e1000_clean_tx_irq(struct e1000_adapter *adapter,
3976 struct e1000_tx_ring *tx_ring)
1da177e4 3977{
1da177e4
LT		 3978 struct net_device *netdev = adapter->netdev;
3979 struct e1000_tx_desc *tx_desc, *eop_desc;
3980 struct e1000_buffer *buffer_info;
3981 unsigned int i, eop;
2a1af5d7
JK		 3982#ifdef CONFIG_E1000_NAPI
3983 unsigned int count = 0;
3984#endif
46fcc86d 3985 boolean_t cleaned = FALSE;
835bb129 3986 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3987
3988 i = tx_ring->next_to_clean;
3989 eop = tx_ring->buffer_info[i].next_to_watch;
3990 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3991
581d708e 3992 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3993 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3994 tx_desc = E1000_TX_DESC(*tx_ring, i);
3995 buffer_info = &tx_ring->buffer_info[i];
3996 cleaned = (i == eop);
3997
835bb129 3998 if (cleaned) {
2b65326e 3999 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 4000 unsigned int segs, bytecount;
4001 segs = skb_shinfo(skb)->gso_segs ?: 1;
4002 /* multiply data chunks by size of headers */
4003 bytecount = ((segs - 1) * skb_headlen(skb)) +
4004 skb->len;
2b65326e 4005 total_tx_packets += segs;
7753b171 4006 total_tx_bytes += bytecount;
835bb129 4007 }
fd803241 4008 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 4009 tx_desc->upper.data = 0;
1da177e4 4010
96838a40 4011 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 4012 }
581d708e 4013
1da177e4
LT		 4014 eop = tx_ring->buffer_info[i].next_to_watch;
4015 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 4016#ifdef CONFIG_E1000_NAPI
4017#define E1000_TX_WEIGHT 64
4018 /* weight of a sort for tx, to avoid endless transmit cleanup */
46fcc86d 4019 if (count++ == E1000_TX_WEIGHT) break;
2a1af5d7 4020#endif
1da177e4
LT		 4021 }
4022
4023 tx_ring->next_to_clean = i;
4024
77b2aad5 4025#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 4026 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4027 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4028 /* Make sure that anybody stopping the queue after this
4029 * sees the new next_to_clean.
4030 */
4031 smp_mb();
fcfb1224 4032 if (netif_queue_stopped(netdev)) {
77b2aad5 4033 netif_wake_queue(netdev);
fcfb1224
JB		 4034 ++adapter->restart_queue;
4035 }
77b2aad5 4036 }
2648345f 4037
581d708e 4038 if (adapter->detect_tx_hung) {
2648345f 4039 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 4040 * check with the clearing of time_stamp and movement of i */
4041 adapter->detect_tx_hung = FALSE;
392137fa
JK		 4042 if (tx_ring->buffer_info[eop].dma &&
4043 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 4044 (adapter->tx_timeout_factor * HZ))
70b8f1e1 4045 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 4046 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 4047
4048 /* detected Tx unit hang */
c6963ef5 4049 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 4050 " Tx Queue <%lu>\n"
70b8f1e1
MC		 4051 " TDH <%x>\n"
4052 " TDT <%x>\n"
4053 " next_to_use <%x>\n"
4054 " next_to_clean <%x>\n"
4055 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 4056 " time_stamp <%lx>\n"
4057 " next_to_watch <%x>\n"
4058 " jiffies <%lx>\n"
4059 " next_to_watch.status <%x>\n",
7bfa4816
JK		 4060 (unsigned long)((tx_ring - adapter->tx_ring) /
4061 sizeof(struct e1000_tx_ring)),
581d708e
MC		 4062 readl(adapter->hw.hw_addr + tx_ring->tdh),
4063 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 4064 tx_ring->next_to_use,
392137fa
JK		 4065 tx_ring->next_to_clean,
4066 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 4067 eop,
4068 jiffies,
4069 eop_desc->upper.fields.status);
1da177e4 4070 netif_stop_queue(netdev);
70b8f1e1 4071 }
1da177e4 4072 }
835bb129
JB		 4073 adapter->total_tx_bytes += total_tx_bytes;
4074 adapter->total_tx_packets += total_tx_packets;
1da177e4
LT		 4075 return cleaned;
4076}
4077
4078/**
4079 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 4080 * @adapter: board private structure
4081 * @status_err: receive descriptor status and error fields
4082 * @csum: receive descriptor csum field
4083 * @sk_buff: socket buffer with received data
1da177e4
LT		 4084 **/
4085
e619d523 4086static void
1da177e4 4087e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 4088 uint32_t status_err, uint32_t csum,
4089 struct sk_buff *skb)
1da177e4 4090{
2d7edb92
MC		 4091 uint16_t status = (uint16_t)status_err;
4092 uint8_t errors = (uint8_t)(status_err >> 24);
4093 skb->ip_summed = CHECKSUM_NONE;
4094
1da177e4 4095 /* 82543 or newer only */
96838a40 4096 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 4097 /* Ignore Checksum bit is set */
96838a40 4098 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 4099 /* TCP/UDP checksum error bit is set */
96838a40 4100 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 4101 /* let the stack verify checksum errors */
1da177e4 4102 adapter->hw_csum_err++;
2d7edb92
MC		 4103 return;
4104 }
4105 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 4106 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4107 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 4108 return;
1da177e4 4109 } else {
96838a40 4110 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 4111 return;
4112 }
4113 /* It must be a TCP or UDP packet with a valid checksum */
4114 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 4115 /* TCP checksum is good */
4116 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 4117 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4118 /* IP fragment with UDP payload */
4119 /* Hardware complements the payload checksum, so we undo it
4120 * and then put the value in host order for further stack use.
4121 */
4122 csum = ntohl(csum ^ 0xFFFF);
4123 skb->csum = csum;
84fa7933 4124 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 4125 }
2d7edb92 4126 adapter->hw_csum_good++;
1da177e4
LT		 4127}
4128
4129/**
2d7edb92 4130 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 4131 * @adapter: board private structure
4132 **/
4133
4134static boolean_t
4135#ifdef CONFIG_E1000_NAPI
581d708e
MC		 4136e1000_clean_rx_irq(struct e1000_adapter *adapter,
4137 struct e1000_rx_ring *rx_ring,
4138 int *work_done, int work_to_do)
1da177e4 4139#else
581d708e
MC		 4140e1000_clean_rx_irq(struct e1000_adapter *adapter,
4141 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 4142#endif
4143{
1da177e4
LT		 4144 struct net_device *netdev = adapter->netdev;
4145 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 4146 struct e1000_rx_desc *rx_desc, *next_rxd;
4147 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 4148 unsigned long flags;
4149 uint32_t length;
4150 uint8_t last_byte;
4151 unsigned int i;
72d64a43 4152 int cleaned_count = 0;
a1415ee6 4153 boolean_t cleaned = FALSE;
835bb129 4154 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 4155
4156 i = rx_ring->next_to_clean;
4157 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4158 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4159
b92ff8ee 4160 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4161 struct sk_buff *skb;
a292ca6e 4162 u8 status;
90fb5135 4163
1da177e4 4164#ifdef CONFIG_E1000_NAPI
96838a40 4165 if (*work_done >= work_to_do)
1da177e4
LT		 4166 break;
4167 (*work_done)++;
4168#endif
a292ca6e 4169 status = rx_desc->status;
b92ff8ee 4170 skb = buffer_info->skb;
86c3d59f
JB		 4171 buffer_info->skb = NULL;
4172
30320be8
JK		 4173 prefetch(skb->data - NET_IP_ALIGN);
4174
86c3d59f
JB		 4175 if (++i == rx_ring->count) i = 0;
4176 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4177 prefetch(next_rxd);
4178
86c3d59f 4179 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4180
72d64a43
JK		 4181 cleaned = TRUE;
4182 cleaned_count++;
a292ca6e
JK		 4183 pci_unmap_single(pdev,
4184 buffer_info->dma,
4185 buffer_info->length,
1da177e4
LT		 4186 PCI_DMA_FROMDEVICE);
4187
1da177e4
LT		 4188 length = le16_to_cpu(rx_desc->length);
4189
a1415ee6
JK		 4190 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4191 /* All receives must fit into a single buffer */
4192 E1000_DBG("%s: Receive packet consumed multiple"
4193 " buffers\n", netdev->name);
864c4e45 4194 /* recycle */
8fc897b0 4195 buffer_info->skb = skb;
1da177e4
LT		 4196 goto next_desc;
4197 }
4198
96838a40 4199 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 4200 last_byte = *(skb->data + length - 1);
b92ff8ee 4201 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 4202 rx_desc->errors, length, last_byte)) {
4203 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 4204 e1000_tbi_adjust_stats(&adapter->hw,
4205 &adapter->stats,
1da177e4
LT		 4206 length, skb->data);
4207 spin_unlock_irqrestore(&adapter->stats_lock,
4208 flags);
4209 length--;
4210 } else {
9e2feace
AK		 4211 /* recycle */
4212 buffer_info->skb = skb;
1da177e4
LT		 4213 goto next_desc;
4214 }
1cb5821f 4215 }
1da177e4 4216
d2a1e213
JB		 4217 /* adjust length to remove Ethernet CRC, this must be
4218 * done after the TBI_ACCEPT workaround above */
4219 length -= 4;
4220
835bb129
JB		 4221 /* probably a little skewed due to removing CRC */
4222 total_rx_bytes += length;
4223 total_rx_packets++;
4224
a292ca6e
JK		 4225 /* code added for copybreak, this should improve
4226 * performance for small packets with large amounts
4227 * of reassembly being done in the stack */
1f753861 4228 if (length < copybreak) {
a292ca6e 4229 struct sk_buff *new_skb =
87f5032e 4230 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 4231 if (new_skb) {
4232 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM		 4233 skb_copy_to_linear_data_offset(new_skb,
4234 -NET_IP_ALIGN,
4235 (skb->data -
4236 NET_IP_ALIGN),
4237 (length +
4238 NET_IP_ALIGN));
a292ca6e
JK		 4239 /* save the skb in buffer_info as good */
4240 buffer_info->skb = skb;
4241 skb = new_skb;
a292ca6e 4242 }
996695de
AK		 4243 /* else just continue with the old one */
4244 }
a292ca6e 4245 /* end copybreak code */
996695de 4246 skb_put(skb, length);
1da177e4
LT		 4247
4248 /* Receive Checksum Offload */
a292ca6e
JK		 4249 e1000_rx_checksum(adapter,
4250 (uint32_t)(status) |
2d7edb92 4251 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 4252 le16_to_cpu(rx_desc->csum), skb);
96838a40 4253
1da177e4
LT		 4254 skb->protocol = eth_type_trans(skb, netdev);
4255#ifdef CONFIG_E1000_NAPI
96838a40 4256 if (unlikely(adapter->vlgrp &&
a292ca6e 4257 (status & E1000_RXD_STAT_VP))) {
1da177e4 4258 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 4259 le16_to_cpu(rx_desc->special) &
4260 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 4261 } else {
4262 netif_receive_skb(skb);
4263 }
4264#else /* CONFIG_E1000_NAPI */
96838a40 4265 if (unlikely(adapter->vlgrp &&
b92ff8ee 4266 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 4267 vlan_hwaccel_rx(skb, adapter->vlgrp,
4268 le16_to_cpu(rx_desc->special) &
4269 E1000_RXD_SPC_VLAN_MASK);
4270 } else {
4271 netif_rx(skb);
4272 }
4273#endif /* CONFIG_E1000_NAPI */
4274 netdev->last_rx = jiffies;
4275
4276next_desc:
4277 rx_desc->status = 0;
1da177e4 4278
72d64a43
JK		 4279 /* return some buffers to hardware, one at a time is too slow */
4280 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4281 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4282 cleaned_count = 0;
4283 }
4284
30320be8 4285 /* use prefetched values */
86c3d59f
JB		 4286 rx_desc = next_rxd;
4287 buffer_info = next_buffer;
1da177e4 4288 }
1da177e4 4289 rx_ring->next_to_clean = i;
72d64a43
JK		 4290
4291 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4292 if (cleaned_count)
4293 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4294
835bb129
JB		 4295 adapter->total_rx_packets += total_rx_packets;
4296 adapter->total_rx_bytes += total_rx_bytes;
2d7edb92
MC		 4297 return cleaned;
4298}
4299
4300/**
4301 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4302 * @adapter: board private structure
4303 **/
4304
4305static boolean_t
4306#ifdef CONFIG_E1000_NAPI
581d708e
MC		 4307e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4308 struct e1000_rx_ring *rx_ring,
4309 int *work_done, int work_to_do)
2d7edb92 4310#else
581d708e
MC		 4311e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4312 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 4313#endif
4314{
86c3d59f 4315 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 4316 struct net_device *netdev = adapter->netdev;
4317 struct pci_dev *pdev = adapter->pdev;
86c3d59f 4318 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 4319 struct e1000_ps_page *ps_page;
4320 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 4321 struct sk_buff *skb;
2d7edb92
MC		 4322 unsigned int i, j;
4323 uint32_t length, staterr;
72d64a43 4324 int cleaned_count = 0;
2d7edb92 4325 boolean_t cleaned = FALSE;
835bb129 4326 unsigned int total_rx_bytes=0, total_rx_packets=0;
2d7edb92
MC		 4327
4328 i = rx_ring->next_to_clean;
4329 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 4330 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 4331 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 4332
96838a40 4333 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 4334 ps_page = &rx_ring->ps_page[i];
4335 ps_page_dma = &rx_ring->ps_page_dma[i];
4336#ifdef CONFIG_E1000_NAPI
96838a40 4337 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 4338 break;
4339 (*work_done)++;
4340#endif
86c3d59f
JB		 4341 skb = buffer_info->skb;
4342
30320be8
JK		 4343 /* in the packet split case this is header only */
4344 prefetch(skb->data - NET_IP_ALIGN);
4345
86c3d59f
JB		 4346 if (++i == rx_ring->count) i = 0;
4347 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 4348 prefetch(next_rxd);
4349
86c3d59f 4350 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4351
2d7edb92 4352 cleaned = TRUE;
72d64a43 4353 cleaned_count++;
2d7edb92
MC		 4354 pci_unmap_single(pdev, buffer_info->dma,
4355 buffer_info->length,
4356 PCI_DMA_FROMDEVICE);
4357
96838a40 4358 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 4359 E1000_DBG("%s: Packet Split buffers didn't pick up"
4360 " the full packet\n", netdev->name);
4361 dev_kfree_skb_irq(skb);
4362 goto next_desc;
4363 }
1da177e4 4364
96838a40 4365 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 4366 dev_kfree_skb_irq(skb);
4367 goto next_desc;
4368 }
4369
4370 length = le16_to_cpu(rx_desc->wb.middle.length0);
4371
96838a40 4372 if (unlikely(!length)) {
2d7edb92
MC		 4373 E1000_DBG("%s: Last part of the packet spanning"
4374 " multiple descriptors\n", netdev->name);
4375 dev_kfree_skb_irq(skb);
4376 goto next_desc;
4377 }
4378
4379 /* Good Receive */
4380 skb_put(skb, length);
4381
dc7c6add
JK		 4382 {
4383 /* this looks ugly, but it seems compiler issues make it
4384 more efficient than reusing j */
4385 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4386
4387 /* page alloc/put takes too long and effects small packet
4388 * throughput, so unsplit small packets and save the alloc/put*/
1f753861 4389 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 4390 u8 *vaddr;
76c224bc 4391 /* there is no documentation about how to call
dc7c6add
JK		 4392 * kmap_atomic, so we can't hold the mapping
4393 * very long */
4394 pci_dma_sync_single_for_cpu(pdev,
4395 ps_page_dma->ps_page_dma[0],
4396 PAGE_SIZE,
4397 PCI_DMA_FROMDEVICE);
4398 vaddr = kmap_atomic(ps_page->ps_page[0],
4399 KM_SKB_DATA_SOFTIRQ);
27a884dc 4400 memcpy(skb_tail_pointer(skb), vaddr, l1);
dc7c6add
JK		 4401 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4402 pci_dma_sync_single_for_device(pdev,
4403 ps_page_dma->ps_page_dma[0],
4404 PAGE_SIZE, PCI_DMA_FROMDEVICE);
f235a2ab
AK		 4405 /* remove the CRC */
4406 l1 -= 4;
dc7c6add 4407 skb_put(skb, l1);
dc7c6add
JK		 4408 goto copydone;
4409 } /* if */
4410 }
90fb5135 4411
96838a40 4412 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 4413 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 4414 break;
2d7edb92
MC		 4415 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4416 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4417 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 4418 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4419 length);
2d7edb92 4420 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 4421 skb->len += length;
4422 skb->data_len += length;
5d51b80f 4423 skb->truesize += length;
2d7edb92
MC		 4424 }
4425
f235a2ab
AK		 4426 /* strip the ethernet crc, problem is we're using pages now so
4427 * this whole operation can get a little cpu intensive */
4428 pskb_trim(skb, skb->len - 4);
4429
dc7c6add 4430copydone:
835bb129
JB		 4431 total_rx_bytes += skb->len;
4432 total_rx_packets++;
4433
2d7edb92 4434 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 4435 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 4436 skb->protocol = eth_type_trans(skb, netdev);
4437
96838a40 4438 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 4439 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 4440 adapter->rx_hdr_split++;
2d7edb92 4441#ifdef CONFIG_E1000_NAPI
96838a40 4442 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4443 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 4444 le16_to_cpu(rx_desc->wb.middle.vlan) &
4445 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4446 } else {
4447 netif_receive_skb(skb);
4448 }
4449#else /* CONFIG_E1000_NAPI */
96838a40 4450 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4451 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 4452 le16_to_cpu(rx_desc->wb.middle.vlan) &
4453 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4454 } else {
4455 netif_rx(skb);
4456 }
4457#endif /* CONFIG_E1000_NAPI */
4458 netdev->last_rx = jiffies;
4459
4460next_desc:
c3d7a3a4 4461 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 4462 buffer_info->skb = NULL;
2d7edb92 4463
72d64a43
JK		 4464 /* return some buffers to hardware, one at a time is too slow */
4465 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4466 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4467 cleaned_count = 0;
4468 }
4469
30320be8 4470 /* use prefetched values */
86c3d59f
JB		 4471 rx_desc = next_rxd;
4472 buffer_info = next_buffer;
4473
683a38f3 4474 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 4475 }
4476 rx_ring->next_to_clean = i;
72d64a43
JK		 4477
4478 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4479 if (cleaned_count)
4480 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4 4481
835bb129
JB		 4482 adapter->total_rx_packets += total_rx_packets;
4483 adapter->total_rx_bytes += total_rx_bytes;
1da177e4
LT		 4484 return cleaned;
4485}
4486
4487/**
2d7edb92 4488 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4489 * @adapter: address of board private structure
4490 **/
4491
4492static void
581d708e 4493e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 4494 struct e1000_rx_ring *rx_ring,
a292ca6e 4495 int cleaned_count)
1da177e4 4496{
1da177e4
LT		 4497 struct net_device *netdev = adapter->netdev;
4498 struct pci_dev *pdev = adapter->pdev;
4499 struct e1000_rx_desc *rx_desc;
4500 struct e1000_buffer *buffer_info;
4501 struct sk_buff *skb;
2648345f
MC		 4502 unsigned int i;
4503 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4504
4505 i = rx_ring->next_to_use;
4506 buffer_info = &rx_ring->buffer_info[i];
4507
a292ca6e 4508 while (cleaned_count--) {
ca6f7224
CH		 4509 skb = buffer_info->skb;
4510 if (skb) {
a292ca6e
JK		 4511 skb_trim(skb, 0);
4512 goto map_skb;
4513 }
4514
ca6f7224 4515 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4516 if (unlikely(!skb)) {
1da177e4 4517 /* Better luck next round */
72d64a43 4518 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4519 break;
4520 }
4521
2648345f 4522 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4523 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4524 struct sk_buff *oldskb = skb;
2648345f
MC		 4525 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4526 "at %p\n", bufsz, skb->data);
4527 /* Try again, without freeing the previous */
87f5032e 4528 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4529 /* Failed allocation, critical failure */
1da177e4
LT		 4530 if (!skb) {
4531 dev_kfree_skb(oldskb);
4532 break;
4533 }
2648345f 4534
1da177e4
LT		 4535 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4536 /* give up */
4537 dev_kfree_skb(skb);
4538 dev_kfree_skb(oldskb);
4539 break; /* while !buffer_info->skb */
1da177e4 4540 }
ca6f7224
CH		 4541
4542 /* Use new allocation */
4543 dev_kfree_skb(oldskb);
1da177e4 4544 }
1da177e4
LT		 4545 /* Make buffer alignment 2 beyond a 16 byte boundary
4546 * this will result in a 16 byte aligned IP header after
4547 * the 14 byte MAC header is removed
4548 */
4549 skb_reserve(skb, NET_IP_ALIGN);
4550
1da177e4
LT		 4551 buffer_info->skb = skb;
4552 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4553map_skb:
1da177e4
LT		 4554 buffer_info->dma = pci_map_single(pdev,
4555 skb->data,
4556 adapter->rx_buffer_len,
4557 PCI_DMA_FROMDEVICE);
4558
2648345f
MC		 4559 /* Fix for errata 23, can't cross 64kB boundary */
4560 if (!e1000_check_64k_bound(adapter,
4561 (void *)(unsigned long)buffer_info->dma,
4562 adapter->rx_buffer_len)) {
4563 DPRINTK(RX_ERR, ERR,
4564 "dma align check failed: %u bytes at %p\n",
4565 adapter->rx_buffer_len,
4566 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4567 dev_kfree_skb(skb);
4568 buffer_info->skb = NULL;
4569
2648345f 4570 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4571 adapter->rx_buffer_len,
4572 PCI_DMA_FROMDEVICE);
4573
4574 break; /* while !buffer_info->skb */
4575 }
1da177e4
LT		 4576 rx_desc = E1000_RX_DESC(*rx_ring, i);
4577 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4578
96838a40
JB		 4579 if (unlikely(++i == rx_ring->count))
4580 i = 0;
1da177e4
LT		 4581 buffer_info = &rx_ring->buffer_info[i];
4582 }
4583
b92ff8ee
JB		 4584 if (likely(rx_ring->next_to_use != i)) {
4585 rx_ring->next_to_use = i;
4586 if (unlikely(i-- == 0))
4587 i = (rx_ring->count - 1);
4588
4589 /* Force memory writes to complete before letting h/w
4590 * know there are new descriptors to fetch. (Only
4591 * applicable for weak-ordered memory model archs,
4592 * such as IA-64). */
4593 wmb();
4594 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4595 }
1da177e4
LT		 4596}
4597
2d7edb92
MC		 4598/**
4599 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4600 * @adapter: address of board private structure
4601 **/
4602
4603static void
581d708e 4604e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4605 struct e1000_rx_ring *rx_ring,
4606 int cleaned_count)
2d7edb92 4607{
2d7edb92
MC		 4608 struct net_device *netdev = adapter->netdev;
4609 struct pci_dev *pdev = adapter->pdev;
4610 union e1000_rx_desc_packet_split *rx_desc;
4611 struct e1000_buffer *buffer_info;
4612 struct e1000_ps_page *ps_page;
4613 struct e1000_ps_page_dma *ps_page_dma;
4614 struct sk_buff *skb;
4615 unsigned int i, j;
4616
4617 i = rx_ring->next_to_use;
4618 buffer_info = &rx_ring->buffer_info[i];
4619 ps_page = &rx_ring->ps_page[i];
4620 ps_page_dma = &rx_ring->ps_page_dma[i];
4621
72d64a43 4622 while (cleaned_count--) {
2d7edb92
MC		 4623 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4624
96838a40 4625 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4626 if (j < adapter->rx_ps_pages) {
4627 if (likely(!ps_page->ps_page[j])) {
4628 ps_page->ps_page[j] =
4629 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4630 if (unlikely(!ps_page->ps_page[j])) {
4631 adapter->alloc_rx_buff_failed++;
e4c811c9 4632 goto no_buffers;
b92ff8ee 4633 }
e4c811c9
MC		 4634 ps_page_dma->ps_page_dma[j] =
4635 pci_map_page(pdev,
4636 ps_page->ps_page[j],
4637 0, PAGE_SIZE,
4638 PCI_DMA_FROMDEVICE);
4639 }
4640 /* Refresh the desc even if buffer_addrs didn't
96838a40 4641 * change because each write-back erases
e4c811c9
MC		 4642 * this info.
4643 */
4644 rx_desc->read.buffer_addr[j+1] =
4645 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4646 } else
4647 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4648 }
4649
87f5032e 4650 skb = netdev_alloc_skb(netdev,
90fb5135 4651 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
2d7edb92 4652
b92ff8ee
JB		 4653 if (unlikely(!skb)) {
4654 adapter->alloc_rx_buff_failed++;
2d7edb92 4655 break;
b92ff8ee 4656 }
2d7edb92
MC		 4657
4658 /* Make buffer alignment 2 beyond a 16 byte boundary
4659 * this will result in a 16 byte aligned IP header after
4660 * the 14 byte MAC header is removed
4661 */
4662 skb_reserve(skb, NET_IP_ALIGN);
4663
2d7edb92
MC		 4664 buffer_info->skb = skb;
4665 buffer_info->length = adapter->rx_ps_bsize0;
4666 buffer_info->dma = pci_map_single(pdev, skb->data,
4667 adapter->rx_ps_bsize0,
4668 PCI_DMA_FROMDEVICE);
4669
4670 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4671
96838a40 4672 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4673 buffer_info = &rx_ring->buffer_info[i];
4674 ps_page = &rx_ring->ps_page[i];
4675 ps_page_dma = &rx_ring->ps_page_dma[i];
4676 }
4677
4678no_buffers:
b92ff8ee
JB		 4679 if (likely(rx_ring->next_to_use != i)) {
4680 rx_ring->next_to_use = i;
4681 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4682
4683 /* Force memory writes to complete before letting h/w
4684 * know there are new descriptors to fetch. (Only
4685 * applicable for weak-ordered memory model archs,
4686 * such as IA-64). */
4687 wmb();
4688 /* Hardware increments by 16 bytes, but packet split
4689 * descriptors are 32 bytes...so we increment tail
4690 * twice as much.
4691 */
4692 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4693 }
2d7edb92
MC		 4694}
4695
1da177e4
LT		 4696/**
4697 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4698 * @adapter:
4699 **/
4700
4701static void
4702e1000_smartspeed(struct e1000_adapter *adapter)
4703{
4704 uint16_t phy_status;
4705 uint16_t phy_ctrl;
4706
96838a40 4707 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4708 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4709 return;
4710
96838a40 4711 if (adapter->smartspeed == 0) {
1da177e4
LT		 4712 /* If Master/Slave config fault is asserted twice,
4713 * we assume back-to-back */
4714 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4715 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4716 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4717 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4718 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4719 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4720 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4721 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4722 phy_ctrl);
4723 adapter->smartspeed++;
96838a40 4724 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4725 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4726 &phy_ctrl)) {
4727 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4728 MII_CR_RESTART_AUTO_NEG);
4729 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4730 phy_ctrl);
4731 }
4732 }
4733 return;
96838a40 4734 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4735 /* If still no link, perhaps using 2/3 pair cable */
4736 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4737 phy_ctrl |= CR_1000T_MS_ENABLE;
4738 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4739 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4740 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4741 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4742 MII_CR_RESTART_AUTO_NEG);
4743 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4744 }
4745 }
4746 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4747 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4748 adapter->smartspeed = 0;
4749}
4750
4751/**
4752 * e1000_ioctl -
4753 * @netdev:
4754 * @ifreq:
4755 * @cmd:
4756 **/
4757
4758static int
4759e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4760{
4761 switch (cmd) {
4762 case SIOCGMIIPHY:
4763 case SIOCGMIIREG:
4764 case SIOCSMIIREG:
4765 return e1000_mii_ioctl(netdev, ifr, cmd);
4766 default:
4767 return -EOPNOTSUPP;
4768 }
4769}
4770
4771/**
4772 * e1000_mii_ioctl -
4773 * @netdev:
4774 * @ifreq:
4775 * @cmd:
4776 **/
4777
4778static int
4779e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4780{
60490fe0 4781 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4782 struct mii_ioctl_data *data = if_mii(ifr);
4783 int retval;
4784 uint16_t mii_reg;
4785 uint16_t spddplx;
97876fc6 4786 unsigned long flags;
1da177e4 4787
96838a40 4788 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4789 return -EOPNOTSUPP;
4790
4791 switch (cmd) {
4792 case SIOCGMIIPHY:
4793 data->phy_id = adapter->hw.phy_addr;
4794 break;
4795 case SIOCGMIIREG:
96838a40 4796 if (!capable(CAP_NET_ADMIN))
1da177e4 4797 return -EPERM;
97876fc6 4798 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4799 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4800 &data->val_out)) {
4801 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4802 return -EIO;
97876fc6
MC		 4803 }
4804 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4805 break;
4806 case SIOCSMIIREG:
96838a40 4807 if (!capable(CAP_NET_ADMIN))
1da177e4 4808 return -EPERM;
96838a40 4809 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4810 return -EFAULT;
4811 mii_reg = data->val_in;
97876fc6 4812 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4813 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4814 mii_reg)) {
4815 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4816 return -EIO;
97876fc6 4817 }
dc86d32a 4818 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4819 switch (data->reg_num) {
4820 case PHY_CTRL:
96838a40 4821 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4822 break;
96838a40 4823 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4824 adapter->hw.autoneg = 1;
4825 adapter->hw.autoneg_advertised = 0x2F;
4826 } else {
4827 if (mii_reg & 0x40)
4828 spddplx = SPEED_1000;
4829 else if (mii_reg & 0x2000)
4830 spddplx = SPEED_100;
4831 else
4832 spddplx = SPEED_10;
4833 spddplx += (mii_reg & 0x100)
cb764326
JK		 4834 ? DUPLEX_FULL :
4835 DUPLEX_HALF;
1da177e4
LT		 4836 retval = e1000_set_spd_dplx(adapter,
4837 spddplx);
96838a40 4838 if (retval) {
97876fc6 4839 spin_unlock_irqrestore(
96838a40 4840 &adapter->stats_lock,
97876fc6 4841 flags);
1da177e4 4842 return retval;
97876fc6 4843 }
1da177e4 4844 }
2db10a08
AK		 4845 if (netif_running(adapter->netdev))
4846 e1000_reinit_locked(adapter);
4847 else
1da177e4
LT		 4848 e1000_reset(adapter);
4849 break;
4850 case M88E1000_PHY_SPEC_CTRL:
4851 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4852 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4853 spin_unlock_irqrestore(
4854 &adapter->stats_lock, flags);
1da177e4 4855 return -EIO;
97876fc6 4856 }
1da177e4
LT		 4857 break;
4858 }
4859 } else {
4860 switch (data->reg_num) {
4861 case PHY_CTRL:
96838a40 4862 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4863 break;
2db10a08
AK		 4864 if (netif_running(adapter->netdev))
4865 e1000_reinit_locked(adapter);
4866 else
1da177e4
LT		 4867 e1000_reset(adapter);
4868 break;
4869 }
4870 }
97876fc6 4871 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4872 break;
4873 default:
4874 return -EOPNOTSUPP;
4875 }
4876 return E1000_SUCCESS;
4877}
4878
4879void
4880e1000_pci_set_mwi(struct e1000_hw *hw)
4881{
4882 struct e1000_adapter *adapter = hw->back;
2648345f 4883 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4884
96838a40 4885 if (ret_val)
2648345f 4886 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4887}
4888
4889void
4890e1000_pci_clear_mwi(struct e1000_hw *hw)
4891{
4892 struct e1000_adapter *adapter = hw->back;
4893
4894 pci_clear_mwi(adapter->pdev);
4895}
4896
4897void
4898e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4899{
4900 struct e1000_adapter *adapter = hw->back;
4901
4902 pci_read_config_word(adapter->pdev, reg, value);
4903}
4904
4905void
4906e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4907{
4908 struct e1000_adapter *adapter = hw->back;
4909
4910 pci_write_config_word(adapter->pdev, reg, *value);
4911}
4912
caeccb68
JK		 4913int32_t
4914e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4915{
4916 struct e1000_adapter *adapter = hw->back;
4917 uint16_t cap_offset;
4918
4919 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4920 if (!cap_offset)
4921 return -E1000_ERR_CONFIG;
4922
4923 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4924
4925 return E1000_SUCCESS;
4926}
4927
1da177e4
LT		 4928void
4929e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4930{
4931 outl(value, port);
4932}
4933
4934static void
4935e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4936{
60490fe0 4937 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4938 uint32_t ctrl, rctl;
4939
4940 e1000_irq_disable(adapter);
4941 adapter->vlgrp = grp;
4942
96838a40 4943 if (grp) {
1da177e4
LT		 4944 /* enable VLAN tag insert/strip */
4945 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4946 ctrl |= E1000_CTRL_VME;
4947 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4948
cd94dd0b 4949 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 4950 /* enable VLAN receive filtering */
4951 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4952 rctl |= E1000_RCTL_VFE;
4953 rctl &= ~E1000_RCTL_CFIEN;
4954 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4955 e1000_update_mng_vlan(adapter);
cd94dd0b 4956 }
1da177e4
LT		 4957 } else {
4958 /* disable VLAN tag insert/strip */
4959 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4960 ctrl &= ~E1000_CTRL_VME;
4961 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4962
cd94dd0b 4963 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 4964 /* disable VLAN filtering */
4965 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4966 rctl &= ~E1000_RCTL_VFE;
4967 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4968 if (adapter->mng_vlan_id !=
4969 (uint16_t)E1000_MNG_VLAN_NONE) {
4970 e1000_vlan_rx_kill_vid(netdev,
4971 adapter->mng_vlan_id);
4972 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4973 }
cd94dd0b 4974 }
1da177e4
LT		 4975 }
4976
4977 e1000_irq_enable(adapter);
4978}
4979
4980static void
4981e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4982{
60490fe0 4983 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4984 uint32_t vfta, index;
96838a40
JB		 4985
4986 if ((adapter->hw.mng_cookie.status &
4987 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4988 (vid == adapter->mng_vlan_id))
2d7edb92 4989 return;
1da177e4
LT		 4990 /* add VID to filter table */
4991 index = (vid >> 5) & 0x7F;
4992 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4993 vfta |= (1 << (vid & 0x1F));
4994 e1000_write_vfta(&adapter->hw, index, vfta);
4995}
4996
4997static void
4998e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4999{
60490fe0 5000 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 5001 uint32_t vfta, index;
5002
5003 e1000_irq_disable(adapter);
5c15bdec 5004 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1da177e4
LT		 5005 e1000_irq_enable(adapter);
5006
96838a40
JB		 5007 if ((adapter->hw.mng_cookie.status &
5008 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 5009 (vid == adapter->mng_vlan_id)) {
5010 /* release control to f/w */
5011 e1000_release_hw_control(adapter);
2d7edb92 5012 return;
ff147013
JK		 5013 }
5014
1da177e4
LT		 5015 /* remove VID from filter table */
5016 index = (vid >> 5) & 0x7F;
5017 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5018 vfta &= ~(1 << (vid & 0x1F));
5019 e1000_write_vfta(&adapter->hw, index, vfta);
5020}
5021
5022static void
5023e1000_restore_vlan(struct e1000_adapter *adapter)
5024{
5025 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5026
96838a40 5027 if (adapter->vlgrp) {
1da177e4 5028 uint16_t vid;
96838a40 5029 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 5030 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 5031 continue;
5032 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5033 }
5034 }
5035}
5036
5037int
5038e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5039{
5040 adapter->hw.autoneg = 0;
5041
6921368f 5042 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 5043 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 5044 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5045 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5046 return -EINVAL;
5047 }
5048
96838a40 5049 switch (spddplx) {
1da177e4
LT		 5050 case SPEED_10 + DUPLEX_HALF:
5051 adapter->hw.forced_speed_duplex = e1000_10_half;
5052 break;
5053 case SPEED_10 + DUPLEX_FULL:
5054 adapter->hw.forced_speed_duplex = e1000_10_full;
5055 break;
5056 case SPEED_100 + DUPLEX_HALF:
5057 adapter->hw.forced_speed_duplex = e1000_100_half;
5058 break;
5059 case SPEED_100 + DUPLEX_FULL:
5060 adapter->hw.forced_speed_duplex = e1000_100_full;
5061 break;
5062 case SPEED_1000 + DUPLEX_FULL:
5063 adapter->hw.autoneg = 1;
5064 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5065 break;
5066 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5067 default:
2648345f 5068 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 5069 return -EINVAL;
5070 }
5071 return 0;
5072}
5073
1da177e4 5074static int
829ca9a3 5075e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 5076{
5077 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5078 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9 5079 uint32_t ctrl, ctrl_ext, rctl, status;
1da177e4 5080 uint32_t wufc = adapter->wol;
6fdfef16 5081#ifdef CONFIG_PM
240b1710 5082 int retval = 0;
6fdfef16 5083#endif
1da177e4
LT		 5084
5085 netif_device_detach(netdev);
5086
2db10a08
AK		 5087 if (netif_running(netdev)) {
5088 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 5089 e1000_down(adapter);
2db10a08 5090 }
1da177e4 5091
2f82665f 5092#ifdef CONFIG_PM
1d33e9c6 5093 retval = pci_save_state(pdev);
2f82665f
JB		 5094 if (retval)
5095 return retval;
5096#endif
5097
1da177e4 5098 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 5099 if (status & E1000_STATUS_LU)
1da177e4
LT		 5100 wufc &= ~E1000_WUFC_LNKC;
5101
96838a40 5102 if (wufc) {
1da177e4
LT		 5103 e1000_setup_rctl(adapter);
5104 e1000_set_multi(netdev);
5105
5106 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 5107 if (wufc & E1000_WUFC_MC) {
1da177e4
LT		 5108 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5109 rctl |= E1000_RCTL_MPE;
5110 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5111 }
5112
96838a40 5113 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 5114 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5115 /* advertise wake from D3Cold */
5116 #define E1000_CTRL_ADVD3WUC 0x00100000
5117 /* phy power management enable */
5118 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5119 ctrl |= E1000_CTRL_ADVD3WUC |
5120 E1000_CTRL_EN_PHY_PWR_MGMT;
5121 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5122 }
5123
96838a40 5124 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 5125 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5126 /* keep the laser running in D3 */
5127 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5128 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5129 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5130 }
5131
2d7edb92
MC		 5132 /* Allow time for pending master requests to run */
5133 e1000_disable_pciex_master(&adapter->hw);
5134
1da177e4
LT		 5135 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5136 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 5137 pci_enable_wake(pdev, PCI_D3hot, 1);
5138 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 5139 } else {
5140 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5141 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 5142 pci_enable_wake(pdev, PCI_D3hot, 0);
5143 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 5144 }
5145
0fccd0e9
JG		 5146 e1000_release_manageability(adapter);
5147
5148 /* make sure adapter isn't asleep if manageability is enabled */
5149 if (adapter->en_mng_pt) {
5150 pci_enable_wake(pdev, PCI_D3hot, 1);
5151 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 5152 }
5153
cd94dd0b
AK		 5154 if (adapter->hw.phy_type == e1000_phy_igp_3)
5155 e1000_phy_powerdown_workaround(&adapter->hw);
5156
edd106fc
AK		 5157 if (netif_running(netdev))
5158 e1000_free_irq(adapter);
5159
b55ccb35
JK		 5160 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5161 * would have already happened in close and is redundant. */
5162 e1000_release_hw_control(adapter);
2d7edb92 5163
1da177e4 5164 pci_disable_device(pdev);
240b1710 5165
d0e027db 5166 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 5167
5168 return 0;
5169}
5170
2f82665f 5171#ifdef CONFIG_PM
1da177e4
LT		 5172static int
5173e1000_resume(struct pci_dev *pdev)
5174{
5175 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5176 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9 5177 uint32_t err;
1da177e4 5178
d0e027db 5179 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 5180 pci_restore_state(pdev);
3d1dd8cb
AK		 5181 if ((err = pci_enable_device(pdev))) {
5182 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5183 return err;
5184 }
a4cb847d 5185 pci_set_master(pdev);
1da177e4 5186
d0e027db
AK		 5187 pci_enable_wake(pdev, PCI_D3hot, 0);
5188 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 5189
edd106fc
AK		 5190 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5191 return err;
5192
5193 e1000_power_up_phy(adapter);
1da177e4
LT		 5194 e1000_reset(adapter);
5195 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5196
0fccd0e9
JG		 5197 e1000_init_manageability(adapter);
5198
96838a40 5199 if (netif_running(netdev))
1da177e4
LT		 5200 e1000_up(adapter);
5201
5202 netif_device_attach(netdev);
5203
b55ccb35
JK		 5204 /* If the controller is 82573 and f/w is AMT, do not set
5205 * DRV_LOAD until the interface is up. For all other cases,
5206 * let the f/w know that the h/w is now under the control
5207 * of the driver. */
5208 if (adapter->hw.mac_type != e1000_82573 ||
5209 !e1000_check_mng_mode(&adapter->hw))
5210 e1000_get_hw_control(adapter);
2d7edb92 5211
1da177e4
LT		 5212 return 0;
5213}
5214#endif
c653e635
AK		 5215
5216static void e1000_shutdown(struct pci_dev *pdev)
5217{
5218 e1000_suspend(pdev, PMSG_SUSPEND);
5219}
5220
1da177e4
LT		 5221#ifdef CONFIG_NET_POLL_CONTROLLER
5222/*
5223 * Polling 'interrupt' - used by things like netconsole to send skbs
5224 * without having to re-enable interrupts. It's not called while
5225 * the interrupt routine is executing.
5226 */
5227static void
2648345f 5228e1000_netpoll(struct net_device *netdev)
1da177e4 5229{
60490fe0 5230 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 5231
1da177e4 5232 disable_irq(adapter->pdev->irq);
7d12e780 5233 e1000_intr(adapter->pdev->irq, netdev);
c4cfe567 5234 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 5235#ifndef CONFIG_E1000_NAPI
5236 adapter->clean_rx(adapter, adapter->rx_ring);
5237#endif
1da177e4
LT		 5238 enable_irq(adapter->pdev->irq);
5239}
5240#endif
5241
9026729b
AK		 5242/**
5243 * e1000_io_error_detected - called when PCI error is detected
5244 * @pdev: Pointer to PCI device
5245 * @state: The current pci conneection state
5246 *
5247 * This function is called after a PCI bus error affecting
5248 * this device has been detected.
5249 */
5250static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5251{
5252 struct net_device *netdev = pci_get_drvdata(pdev);
5253 struct e1000_adapter *adapter = netdev->priv;
5254
5255 netif_device_detach(netdev);
5256
5257 if (netif_running(netdev))
5258 e1000_down(adapter);
72e8d6bb 5259 pci_disable_device(pdev);
9026729b
AK		 5260
5261 /* Request a slot slot reset. */
5262 return PCI_ERS_RESULT_NEED_RESET;
5263}
5264
5265/**
5266 * e1000_io_slot_reset - called after the pci bus has been reset.
5267 * @pdev: Pointer to PCI device
5268 *
5269 * Restart the card from scratch, as if from a cold-boot. Implementation
5270 * resembles the first-half of the e1000_resume routine.
5271 */
5272static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5273{
5274 struct net_device *netdev = pci_get_drvdata(pdev);
5275 struct e1000_adapter *adapter = netdev->priv;
5276
5277 if (pci_enable_device(pdev)) {
5278 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5279 return PCI_ERS_RESULT_DISCONNECT;
5280 }
5281 pci_set_master(pdev);
5282
dbf38c94
LV		 5283 pci_enable_wake(pdev, PCI_D3hot, 0);
5284 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 5285
9026729b
AK		 5286 e1000_reset(adapter);
5287 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5288
5289 return PCI_ERS_RESULT_RECOVERED;
5290}
5291
5292/**
5293 * e1000_io_resume - called when traffic can start flowing again.
5294 * @pdev: Pointer to PCI device
5295 *
5296 * This callback is called when the error recovery driver tells us that
5297 * its OK to resume normal operation. Implementation resembles the
5298 * second-half of the e1000_resume routine.
5299 */
5300static void e1000_io_resume(struct pci_dev *pdev)
5301{
5302 struct net_device *netdev = pci_get_drvdata(pdev);
5303 struct e1000_adapter *adapter = netdev->priv;
0fccd0e9
JG		 5304
5305 e1000_init_manageability(adapter);
9026729b
AK		 5306
5307 if (netif_running(netdev)) {
5308 if (e1000_up(adapter)) {
5309 printk("e1000: can't bring device back up after reset\n");
5310 return;
5311 }
5312 }
5313
5314 netif_device_attach(netdev);
5315
0fccd0e9
JG		 5316 /* If the controller is 82573 and f/w is AMT, do not set
5317 * DRV_LOAD until the interface is up. For all other cases,
5318 * let the f/w know that the h/w is now under the control
5319 * of the driver. */
5320 if (adapter->hw.mac_type != e1000_82573 ||
5321 !e1000_check_mng_mode(&adapter->hw))
5322 e1000_get_hw_control(adapter);
9026729b 5323
9026729b
AK		 5324}
5325
1da177e4 5326/* e1000_main.c */
Linux kernel - Deliverables
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