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net offloading: Convert checksums to use centrally computed features.
[deliverable/linux.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
451152d9 4 Copyright(c) 1999 - 2010 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
bc7f75fa
AK		 42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
bc7f75fa
AK		 52
53#include "e1000.h"
54
c14c643b
BA		 55#define DRV_EXTRAVERSION "-k2"
56
c920aa8b 57#define DRV_VERSION "1.2.20" DRV_EXTRAVERSION
bc7f75fa
AK		 58char e1000e_driver_name[] = "e1000e";
59const char e1000e_driver_version[] = DRV_VERSION;
60
61static const struct e1000_info *e1000_info_tbl[] = {
62 [board_82571] = &e1000_82571_info,
63 [board_82572] = &e1000_82572_info,
64 [board_82573] = &e1000_82573_info,
4662e82b 65 [board_82574] = &e1000_82574_info,
8c81c9c3 66 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 67 [board_80003es2lan] = &e1000_es2_info,
68 [board_ich8lan] = &e1000_ich8_info,
69 [board_ich9lan] = &e1000_ich9_info,
f4187b56 70 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 71 [board_pchlan] = &e1000_pch_info,
d3738bb8 72 [board_pch2lan] = &e1000_pch2_info,
bc7f75fa
AK		 73};
74
84f4ee90
TI		 75struct e1000_reg_info {
76 u32 ofs;
77 char *name;
78};
79
80#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
81#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
82#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
83#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
84#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
85
86#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
87#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
88#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
89#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
90#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
91
92static const struct e1000_reg_info e1000_reg_info_tbl[] = {
93
94 /* General Registers */
95 {E1000_CTRL, "CTRL"},
96 {E1000_STATUS, "STATUS"},
97 {E1000_CTRL_EXT, "CTRL_EXT"},
98
99 /* Interrupt Registers */
100 {E1000_ICR, "ICR"},
101
102 /* RX Registers */
103 {E1000_RCTL, "RCTL"},
104 {E1000_RDLEN, "RDLEN"},
105 {E1000_RDH, "RDH"},
106 {E1000_RDT, "RDT"},
107 {E1000_RDTR, "RDTR"},
108 {E1000_RXDCTL(0), "RXDCTL"},
109 {E1000_ERT, "ERT"},
110 {E1000_RDBAL, "RDBAL"},
111 {E1000_RDBAH, "RDBAH"},
112 {E1000_RDFH, "RDFH"},
113 {E1000_RDFT, "RDFT"},
114 {E1000_RDFHS, "RDFHS"},
115 {E1000_RDFTS, "RDFTS"},
116 {E1000_RDFPC, "RDFPC"},
117
118 /* TX Registers */
119 {E1000_TCTL, "TCTL"},
120 {E1000_TDBAL, "TDBAL"},
121 {E1000_TDBAH, "TDBAH"},
122 {E1000_TDLEN, "TDLEN"},
123 {E1000_TDH, "TDH"},
124 {E1000_TDT, "TDT"},
125 {E1000_TIDV, "TIDV"},
126 {E1000_TXDCTL(0), "TXDCTL"},
127 {E1000_TADV, "TADV"},
128 {E1000_TARC(0), "TARC"},
129 {E1000_TDFH, "TDFH"},
130 {E1000_TDFT, "TDFT"},
131 {E1000_TDFHS, "TDFHS"},
132 {E1000_TDFTS, "TDFTS"},
133 {E1000_TDFPC, "TDFPC"},
134
135 /* List Terminator */
136 {}
137};
138
139/*
140 * e1000_regdump - register printout routine
141 */
142static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
143{
144 int n = 0;
145 char rname[16];
146 u32 regs[8];
147
148 switch (reginfo->ofs) {
149 case E1000_RXDCTL(0):
150 for (n = 0; n < 2; n++)
151 regs[n] = __er32(hw, E1000_RXDCTL(n));
152 break;
153 case E1000_TXDCTL(0):
154 for (n = 0; n < 2; n++)
155 regs[n] = __er32(hw, E1000_TXDCTL(n));
156 break;
157 case E1000_TARC(0):
158 for (n = 0; n < 2; n++)
159 regs[n] = __er32(hw, E1000_TARC(n));
160 break;
161 default:
162 printk(KERN_INFO "%-15s %08x\n",
163 reginfo->name, __er32(hw, reginfo->ofs));
164 return;
165 }
166
167 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
168 printk(KERN_INFO "%-15s ", rname);
169 for (n = 0; n < 2; n++)
170 printk(KERN_CONT "%08x ", regs[n]);
171 printk(KERN_CONT "\n");
172}
173
174
175/*
176 * e1000e_dump - Print registers, tx-ring and rx-ring
177 */
178static void e1000e_dump(struct e1000_adapter *adapter)
179{
180 struct net_device *netdev = adapter->netdev;
181 struct e1000_hw *hw = &adapter->hw;
182 struct e1000_reg_info *reginfo;
183 struct e1000_ring *tx_ring = adapter->tx_ring;
184 struct e1000_tx_desc *tx_desc;
185 struct my_u0 { u64 a; u64 b; } *u0;
186 struct e1000_buffer *buffer_info;
187 struct e1000_ring *rx_ring = adapter->rx_ring;
188 union e1000_rx_desc_packet_split *rx_desc_ps;
189 struct e1000_rx_desc *rx_desc;
190 struct my_u1 { u64 a; u64 b; u64 c; u64 d; } *u1;
191 u32 staterr;
192 int i = 0;
193
194 if (!netif_msg_hw(adapter))
195 return;
196
197 /* Print netdevice Info */
198 if (netdev) {
199 dev_info(&adapter->pdev->dev, "Net device Info\n");
200 printk(KERN_INFO "Device Name state "
201 "trans_start last_rx\n");
202 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
203 netdev->name,
204 netdev->state,
205 netdev->trans_start,
206 netdev->last_rx);
207 }
208
209 /* Print Registers */
210 dev_info(&adapter->pdev->dev, "Register Dump\n");
211 printk(KERN_INFO " Register Name Value\n");
212 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
213 reginfo->name; reginfo++) {
214 e1000_regdump(hw, reginfo);
215 }
216
217 /* Print TX Ring Summary */
218 if (!netdev || !netif_running(netdev))
219 goto exit;
220
221 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
222 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
223 " leng ntw timestamp\n");
224 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
225 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
226 0, tx_ring->next_to_use, tx_ring->next_to_clean,
8eb64e6b 227 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 228 buffer_info->length,
229 buffer_info->next_to_watch,
8eb64e6b 230 (unsigned long long)buffer_info->time_stamp);
84f4ee90
TI		 231
232 /* Print TX Rings */
233 if (!netif_msg_tx_done(adapter))
234 goto rx_ring_summary;
235
236 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
237
238 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
239 *
240 * Legacy Transmit Descriptor
241 * +--------------------------------------------------------------+
242 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
243 * +--------------------------------------------------------------+
244 * 8 | Special | CSS | Status | CMD | CSO | Length |
245 * +--------------------------------------------------------------+
246 * 63 48 47 36 35 32 31 24 23 16 15 0
247 *
248 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
249 * 63 48 47 40 39 32 31 16 15 8 7 0
250 * +----------------------------------------------------------------+
251 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
252 * +----------------------------------------------------------------+
253 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
254 * +----------------------------------------------------------------+
255 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
256 *
257 * Extended Data Descriptor (DTYP=0x1)
258 * +----------------------------------------------------------------+
259 * 0 | Buffer Address [63:0] |
260 * +----------------------------------------------------------------+
261 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
262 * +----------------------------------------------------------------+
263 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
264 */
265 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
266 " [bi->dma ] leng ntw timestamp bi->skb "
267 "<-- Legacy format\n");
268 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
269 " [bi->dma ] leng ntw timestamp bi->skb "
270 "<-- Ext Context format\n");
271 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
272 " [bi->dma ] leng ntw timestamp bi->skb "
273 "<-- Ext Data format\n");
274 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
275 tx_desc = E1000_TX_DESC(*tx_ring, i);
276 buffer_info = &tx_ring->buffer_info[i];
277 u0 = (struct my_u0 *)tx_desc;
278 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
279 "%04X %3X %016llX %p",
280 (!(le64_to_cpu(u0->b) & (1<<29)) ? 'l' :
281 ((le64_to_cpu(u0->b) & (1<<20)) ? 'd' : 'c')), i,
8eb64e6b
BA		 282 (unsigned long long)le64_to_cpu(u0->a),
283 (unsigned long long)le64_to_cpu(u0->b),
284 (unsigned long long)buffer_info->dma,
285 buffer_info->length, buffer_info->next_to_watch,
286 (unsigned long long)buffer_info->time_stamp,
84f4ee90
TI		 287 buffer_info->skb);
288 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
289 printk(KERN_CONT " NTC/U\n");
290 else if (i == tx_ring->next_to_use)
291 printk(KERN_CONT " NTU\n");
292 else if (i == tx_ring->next_to_clean)
293 printk(KERN_CONT " NTC\n");
294 else
295 printk(KERN_CONT "\n");
296
297 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
298 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
299 16, 1, phys_to_virt(buffer_info->dma),
300 buffer_info->length, true);
301 }
302
303 /* Print RX Rings Summary */
304rx_ring_summary:
305 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
306 printk(KERN_INFO "Queue [NTU] [NTC]\n");
307 printk(KERN_INFO " %5d %5X %5X\n", 0,
308 rx_ring->next_to_use, rx_ring->next_to_clean);
309
310 /* Print RX Rings */
311 if (!netif_msg_rx_status(adapter))
312 goto exit;
313
314 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
315 switch (adapter->rx_ps_pages) {
316 case 1:
317 case 2:
318 case 3:
319 /* [Extended] Packet Split Receive Descriptor Format
320 *
321 * +-----------------------------------------------------+
322 * 0 | Buffer Address 0 [63:0] |
323 * +-----------------------------------------------------+
324 * 8 | Buffer Address 1 [63:0] |
325 * +-----------------------------------------------------+
326 * 16 | Buffer Address 2 [63:0] |
327 * +-----------------------------------------------------+
328 * 24 | Buffer Address 3 [63:0] |
329 * +-----------------------------------------------------+
330 */
331 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
332 "[buffer 1 63:0 ] "
333 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
334 "[bi->skb] <-- Ext Pkt Split format\n");
335 /* [Extended] Receive Descriptor (Write-Back) Format
336 *
337 * 63 48 47 32 31 13 12 8 7 4 3 0
338 * +------------------------------------------------------+
339 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
340 * | Checksum | Ident | | Queue | | Type |
341 * +------------------------------------------------------+
342 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
343 * +------------------------------------------------------+
344 * 63 48 47 32 31 20 19 0
345 */
346 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
347 "[vl l0 ee es] "
348 "[ l3 l2 l1 hs] [reserved ] ---------------- "
349 "[bi->skb] <-- Ext Rx Write-Back format\n");
350 for (i = 0; i < rx_ring->count; i++) {
351 buffer_info = &rx_ring->buffer_info[i];
352 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
353 u1 = (struct my_u1 *)rx_desc_ps;
354 staterr =
355 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
356 if (staterr & E1000_RXD_STAT_DD) {
357 /* Descriptor Done */
358 printk(KERN_INFO "RWB[0x%03X] %016llX "
359 "%016llX %016llX %016llX "
360 "---------------- %p", i,
8eb64e6b
BA		 361 (unsigned long long)le64_to_cpu(u1->a),
362 (unsigned long long)le64_to_cpu(u1->b),
363 (unsigned long long)le64_to_cpu(u1->c),
364 (unsigned long long)le64_to_cpu(u1->d),
84f4ee90
TI		 365 buffer_info->skb);
366 } else {
367 printk(KERN_INFO "R [0x%03X] %016llX "
368 "%016llX %016llX %016llX %016llX %p", i,
8eb64e6b
BA		 369 (unsigned long long)le64_to_cpu(u1->a),
370 (unsigned long long)le64_to_cpu(u1->b),
371 (unsigned long long)le64_to_cpu(u1->c),
372 (unsigned long long)le64_to_cpu(u1->d),
373 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 374 buffer_info->skb);
375
376 if (netif_msg_pktdata(adapter))
377 print_hex_dump(KERN_INFO, "",
378 DUMP_PREFIX_ADDRESS, 16, 1,
379 phys_to_virt(buffer_info->dma),
380 adapter->rx_ps_bsize0, true);
381 }
382
383 if (i == rx_ring->next_to_use)
384 printk(KERN_CONT " NTU\n");
385 else if (i == rx_ring->next_to_clean)
386 printk(KERN_CONT " NTC\n");
387 else
388 printk(KERN_CONT "\n");
389 }
390 break;
391 default:
392 case 0:
393 /* Legacy Receive Descriptor Format
394 *
395 * +-----------------------------------------------------+
396 * | Buffer Address [63:0] |
397 * +-----------------------------------------------------+
398 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
399 * +-----------------------------------------------------+
400 * 63 48 47 40 39 32 31 16 15 0
401 */
402 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
403 "[vl er S cks ln] [bi->dma ] [bi->skb] "
404 "<-- Legacy format\n");
405 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
406 rx_desc = E1000_RX_DESC(*rx_ring, i);
407 buffer_info = &rx_ring->buffer_info[i];
408 u0 = (struct my_u0 *)rx_desc;
409 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
8eb64e6b
BA		 410 "%016llX %p", i,
411 (unsigned long long)le64_to_cpu(u0->a),
412 (unsigned long long)le64_to_cpu(u0->b),
413 (unsigned long long)buffer_info->dma,
414 buffer_info->skb);
84f4ee90
TI		 415 if (i == rx_ring->next_to_use)
416 printk(KERN_CONT " NTU\n");
417 else if (i == rx_ring->next_to_clean)
418 printk(KERN_CONT " NTC\n");
419 else
420 printk(KERN_CONT "\n");
421
422 if (netif_msg_pktdata(adapter))
423 print_hex_dump(KERN_INFO, "",
424 DUMP_PREFIX_ADDRESS,
425 16, 1, phys_to_virt(buffer_info->dma),
426 adapter->rx_buffer_len, true);
427 }
428 }
429
430exit:
431 return;
432}
433
bc7f75fa
AK		 434/**
435 * e1000_desc_unused - calculate if we have unused descriptors
436 **/
437static int e1000_desc_unused(struct e1000_ring *ring)
438{
439 if (ring->next_to_clean > ring->next_to_use)
440 return ring->next_to_clean - ring->next_to_use - 1;
441
442 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
443}
444
445/**
ad68076e 446 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 447 * @adapter: board private structure
448 * @status: descriptor status field as written by hardware
449 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
450 * @skb: pointer to sk_buff to be indicated to stack
451 **/
452static void e1000_receive_skb(struct e1000_adapter *adapter,
453 struct net_device *netdev,
454 struct sk_buff *skb,
a39fe742 455 u8 status, __le16 vlan)
bc7f75fa
AK		 456{
457 skb->protocol = eth_type_trans(skb, netdev);
458
459 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 460 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
461 le16_to_cpu(vlan), skb);
bc7f75fa 462 else
89c88b16 463 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 464}
465
466/**
467 * e1000_rx_checksum - Receive Checksum Offload for 82543
468 * @adapter: board private structure
469 * @status_err: receive descriptor status and error fields
470 * @csum: receive descriptor csum field
471 * @sk_buff: socket buffer with received data
472 **/
473static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
474 u32 csum, struct sk_buff *skb)
475{
476 u16 status = (u16)status_err;
477 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 478
479 skb_checksum_none_assert(skb);
bc7f75fa
AK		 480
481 /* Ignore Checksum bit is set */
482 if (status & E1000_RXD_STAT_IXSM)
483 return;
484 /* TCP/UDP checksum error bit is set */
485 if (errors & E1000_RXD_ERR_TCPE) {
486 /* let the stack verify checksum errors */
487 adapter->hw_csum_err++;
488 return;
489 }
490
491 /* TCP/UDP Checksum has not been calculated */
492 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
493 return;
494
495 /* It must be a TCP or UDP packet with a valid checksum */
496 if (status & E1000_RXD_STAT_TCPCS) {
497 /* TCP checksum is good */
498 skb->ip_summed = CHECKSUM_UNNECESSARY;
499 } else {
ad68076e
BA		 500 /*
501 * IP fragment with UDP payload
502 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 503 * and then put the value in host order for further stack use.
504 */
a39fe742
AV		 505 __sum16 sum = (__force __sum16)htons(csum);
506 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 507 skb->ip_summed = CHECKSUM_COMPLETE;
508 }
509 adapter->hw_csum_good++;
510}
511
512/**
513 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
514 * @adapter: address of board private structure
515 **/
516static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
517 int cleaned_count)
518{
519 struct net_device *netdev = adapter->netdev;
520 struct pci_dev *pdev = adapter->pdev;
521 struct e1000_ring *rx_ring = adapter->rx_ring;
522 struct e1000_rx_desc *rx_desc;
523 struct e1000_buffer *buffer_info;
524 struct sk_buff *skb;
525 unsigned int i;
89d71a66 526 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 527
528 i = rx_ring->next_to_use;
529 buffer_info = &rx_ring->buffer_info[i];
530
531 while (cleaned_count--) {
532 skb = buffer_info->skb;
533 if (skb) {
534 skb_trim(skb, 0);
535 goto map_skb;
536 }
537
89d71a66 538 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 539 if (!skb) {
540 /* Better luck next round */
541 adapter->alloc_rx_buff_failed++;
542 break;
543 }
544
bc7f75fa
AK		 545 buffer_info->skb = skb;
546map_skb:
0be3f55f 547 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 548 adapter->rx_buffer_len,
0be3f55f
NN		 549 DMA_FROM_DEVICE);
550 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 551 dev_err(&pdev->dev, "RX DMA map failed\n");
552 adapter->rx_dma_failed++;
553 break;
554 }
555
556 rx_desc = E1000_RX_DESC(*rx_ring, i);
557 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
558
50849d79
TH		 559 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
560 /*
561 * Force memory writes to complete before letting h/w
562 * know there are new descriptors to fetch. (Only
563 * applicable for weak-ordered memory model archs,
564 * such as IA-64).
565 */
566 wmb();
567 writel(i, adapter->hw.hw_addr + rx_ring->tail);
568 }
bc7f75fa
AK		 569 i++;
570 if (i == rx_ring->count)
571 i = 0;
572 buffer_info = &rx_ring->buffer_info[i];
573 }
574
50849d79 575 rx_ring->next_to_use = i;
bc7f75fa
AK		 576}
577
578/**
579 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
580 * @adapter: address of board private structure
581 **/
582static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
583 int cleaned_count)
584{
585 struct net_device *netdev = adapter->netdev;
586 struct pci_dev *pdev = adapter->pdev;
587 union e1000_rx_desc_packet_split *rx_desc;
588 struct e1000_ring *rx_ring = adapter->rx_ring;
589 struct e1000_buffer *buffer_info;
590 struct e1000_ps_page *ps_page;
591 struct sk_buff *skb;
592 unsigned int i, j;
593
594 i = rx_ring->next_to_use;
595 buffer_info = &rx_ring->buffer_info[i];
596
597 while (cleaned_count--) {
598 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
599
600 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 601 ps_page = &buffer_info->ps_pages[j];
602 if (j >= adapter->rx_ps_pages) {
603 /* all unused desc entries get hw null ptr */
a39fe742 604 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 605 continue;
606 }
607 if (!ps_page->page) {
608 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 609 if (!ps_page->page) {
47f44e40
AK		 610 adapter->alloc_rx_buff_failed++;
611 goto no_buffers;
612 }
0be3f55f
NN		 613 ps_page->dma = dma_map_page(&pdev->dev,
614 ps_page->page,
615 0, PAGE_SIZE,
616 DMA_FROM_DEVICE);
617 if (dma_mapping_error(&pdev->dev,
618 ps_page->dma)) {
47f44e40
AK		 619 dev_err(&adapter->pdev->dev,
620 "RX DMA page map failed\n");
621 adapter->rx_dma_failed++;
622 goto no_buffers;
bc7f75fa 623 }
bc7f75fa 624 }
47f44e40
AK		 625 /*
626 * Refresh the desc even if buffer_addrs
627 * didn't change because each write-back
628 * erases this info.
629 */
630 rx_desc->read.buffer_addr[j+1] =
631 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 632 }
633
89d71a66
ED		 634 skb = netdev_alloc_skb_ip_align(netdev,
635 adapter->rx_ps_bsize0);
bc7f75fa
AK		 636
637 if (!skb) {
638 adapter->alloc_rx_buff_failed++;
639 break;
640 }
641
bc7f75fa 642 buffer_info->skb = skb;
0be3f55f 643 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 644 adapter->rx_ps_bsize0,
0be3f55f
NN		 645 DMA_FROM_DEVICE);
646 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 647 dev_err(&pdev->dev, "RX DMA map failed\n");
648 adapter->rx_dma_failed++;
649 /* cleanup skb */
650 dev_kfree_skb_any(skb);
651 buffer_info->skb = NULL;
652 break;
653 }
654
655 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
656
50849d79
TH		 657 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
658 /*
659 * Force memory writes to complete before letting h/w
660 * know there are new descriptors to fetch. (Only
661 * applicable for weak-ordered memory model archs,
662 * such as IA-64).
663 */
664 wmb();
665 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
666 }
667
bc7f75fa
AK		 668 i++;
669 if (i == rx_ring->count)
670 i = 0;
671 buffer_info = &rx_ring->buffer_info[i];
672 }
673
674no_buffers:
50849d79 675 rx_ring->next_to_use = i;
bc7f75fa
AK		 676}
677
97ac8cae
BA		 678/**
679 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
680 * @adapter: address of board private structure
97ac8cae
BA		 681 * @cleaned_count: number of buffers to allocate this pass
682 **/
683
684static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
685 int cleaned_count)
686{
687 struct net_device *netdev = adapter->netdev;
688 struct pci_dev *pdev = adapter->pdev;
689 struct e1000_rx_desc *rx_desc;
690 struct e1000_ring *rx_ring = adapter->rx_ring;
691 struct e1000_buffer *buffer_info;
692 struct sk_buff *skb;
693 unsigned int i;
89d71a66 694 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 695
696 i = rx_ring->next_to_use;
697 buffer_info = &rx_ring->buffer_info[i];
698
699 while (cleaned_count--) {
700 skb = buffer_info->skb;
701 if (skb) {
702 skb_trim(skb, 0);
703 goto check_page;
704 }
705
89d71a66 706 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 707 if (unlikely(!skb)) {
708 /* Better luck next round */
709 adapter->alloc_rx_buff_failed++;
710 break;
711 }
712
97ac8cae
BA		 713 buffer_info->skb = skb;
714check_page:
715 /* allocate a new page if necessary */
716 if (!buffer_info->page) {
717 buffer_info->page = alloc_page(GFP_ATOMIC);
718 if (unlikely(!buffer_info->page)) {
719 adapter->alloc_rx_buff_failed++;
720 break;
721 }
722 }
723
724 if (!buffer_info->dma)
0be3f55f 725 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 726 buffer_info->page, 0,
727 PAGE_SIZE,
0be3f55f 728 DMA_FROM_DEVICE);
97ac8cae
BA		 729
730 rx_desc = E1000_RX_DESC(*rx_ring, i);
731 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
732
733 if (unlikely(++i == rx_ring->count))
734 i = 0;
735 buffer_info = &rx_ring->buffer_info[i];
736 }
737
738 if (likely(rx_ring->next_to_use != i)) {
739 rx_ring->next_to_use = i;
740 if (unlikely(i-- == 0))
741 i = (rx_ring->count - 1);
742
743 /* Force memory writes to complete before letting h/w
744 * know there are new descriptors to fetch. (Only
745 * applicable for weak-ordered memory model archs,
746 * such as IA-64). */
747 wmb();
748 writel(i, adapter->hw.hw_addr + rx_ring->tail);
749 }
750}
751
bc7f75fa
AK		 752/**
753 * e1000_clean_rx_irq - Send received data up the network stack; legacy
754 * @adapter: board private structure
755 *
756 * the return value indicates whether actual cleaning was done, there
757 * is no guarantee that everything was cleaned
758 **/
759static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
760 int *work_done, int work_to_do)
761{
762 struct net_device *netdev = adapter->netdev;
763 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 764 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 765 struct e1000_ring *rx_ring = adapter->rx_ring;
766 struct e1000_rx_desc *rx_desc, *next_rxd;
767 struct e1000_buffer *buffer_info, *next_buffer;
768 u32 length;
769 unsigned int i;
770 int cleaned_count = 0;
771 bool cleaned = 0;
772 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
773
774 i = rx_ring->next_to_clean;
775 rx_desc = E1000_RX_DESC(*rx_ring, i);
776 buffer_info = &rx_ring->buffer_info[i];
777
778 while (rx_desc->status & E1000_RXD_STAT_DD) {
779 struct sk_buff *skb;
780 u8 status;
781
782 if (*work_done >= work_to_do)
783 break;
784 (*work_done)++;
2d0bb1c1 785 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 786
787 status = rx_desc->status;
788 skb = buffer_info->skb;
789 buffer_info->skb = NULL;
790
791 prefetch(skb->data - NET_IP_ALIGN);
792
793 i++;
794 if (i == rx_ring->count)
795 i = 0;
796 next_rxd = E1000_RX_DESC(*rx_ring, i);
797 prefetch(next_rxd);
798
799 next_buffer = &rx_ring->buffer_info[i];
800
801 cleaned = 1;
802 cleaned_count++;
0be3f55f 803 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 804 buffer_info->dma,
805 adapter->rx_buffer_len,
0be3f55f 806 DMA_FROM_DEVICE);
bc7f75fa
AK		 807 buffer_info->dma = 0;
808
809 length = le16_to_cpu(rx_desc->length);
810
b94b5028
JB		 811 /*
812 * !EOP means multiple descriptors were used to store a single
813 * packet, if that's the case we need to toss it. In fact, we
814 * need to toss every packet with the EOP bit clear and the
815 * next frame that _does_ have the EOP bit set, as it is by
816 * definition only a frame fragment
817 */
818 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
819 adapter->flags2 |= FLAG2_IS_DISCARDING;
820
821 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 822 /* All receives must fit into a single buffer */
3bb99fe2 823 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 824 /* recycle */
825 buffer_info->skb = skb;
b94b5028
JB		 826 if (status & E1000_RXD_STAT_EOP)
827 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 828 goto next_desc;
829 }
830
831 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
832 /* recycle */
833 buffer_info->skb = skb;
834 goto next_desc;
835 }
836
eb7c3adb
JK		 837 /* adjust length to remove Ethernet CRC */
838 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
839 length -= 4;
840
bc7f75fa
AK		 841 total_rx_bytes += length;
842 total_rx_packets++;
843
ad68076e
BA		 844 /*
845 * code added for copybreak, this should improve
bc7f75fa 846 * performance for small packets with large amounts
ad68076e
BA		 847 * of reassembly being done in the stack
848 */
bc7f75fa
AK		 849 if (length < copybreak) {
850 struct sk_buff *new_skb =
89d71a66 851 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 852 if (new_skb) {
808ff676
BA		 853 skb_copy_to_linear_data_offset(new_skb,
854 -NET_IP_ALIGN,
855 (skb->data -
856 NET_IP_ALIGN),
857 (length +
858 NET_IP_ALIGN));
bc7f75fa
AK		 859 /* save the skb in buffer_info as good */
860 buffer_info->skb = skb;
861 skb = new_skb;
862 }
863 /* else just continue with the old one */
864 }
865 /* end copybreak code */
866 skb_put(skb, length);
867
868 /* Receive Checksum Offload */
869 e1000_rx_checksum(adapter,
870 (u32)(status) |
871 ((u32)(rx_desc->errors) << 24),
872 le16_to_cpu(rx_desc->csum), skb);
873
874 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
875
876next_desc:
877 rx_desc->status = 0;
878
879 /* return some buffers to hardware, one at a time is too slow */
880 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
881 adapter->alloc_rx_buf(adapter, cleaned_count);
882 cleaned_count = 0;
883 }
884
885 /* use prefetched values */
886 rx_desc = next_rxd;
887 buffer_info = next_buffer;
888 }
889 rx_ring->next_to_clean = i;
890
891 cleaned_count = e1000_desc_unused(rx_ring);
892 if (cleaned_count)
893 adapter->alloc_rx_buf(adapter, cleaned_count);
894
bc7f75fa 895 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 896 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 897 netdev->stats.rx_bytes += total_rx_bytes;
898 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 899 return cleaned;
900}
901
bc7f75fa
AK		 902static void e1000_put_txbuf(struct e1000_adapter *adapter,
903 struct e1000_buffer *buffer_info)
904{
03b1320d
AD		 905 if (buffer_info->dma) {
906 if (buffer_info->mapped_as_page)
0be3f55f
NN		 907 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
908 buffer_info->length, DMA_TO_DEVICE);
03b1320d 909 else
0be3f55f
NN		 910 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
911 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 912 buffer_info->dma = 0;
913 }
bc7f75fa
AK		 914 if (buffer_info->skb) {
915 dev_kfree_skb_any(buffer_info->skb);
916 buffer_info->skb = NULL;
917 }
1b7719c4 918 buffer_info->time_stamp = 0;
bc7f75fa
AK		 919}
920
41cec6f1 921static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 922{
41cec6f1
BA		 923 struct e1000_adapter *adapter = container_of(work,
924 struct e1000_adapter,
925 print_hang_task);
bc7f75fa
AK		 926 struct e1000_ring *tx_ring = adapter->tx_ring;
927 unsigned int i = tx_ring->next_to_clean;
928 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
929 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 930 struct e1000_hw *hw = &adapter->hw;
931 u16 phy_status, phy_1000t_status, phy_ext_status;
932 u16 pci_status;
933
934 e1e_rphy(hw, PHY_STATUS, &phy_status);
935 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
936 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 937
41cec6f1
BA		 938 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
939
940 /* detected Hardware unit hang */
941 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 942 " TDH <%x>\n"
943 " TDT <%x>\n"
944 " next_to_use <%x>\n"
945 " next_to_clean <%x>\n"
946 "buffer_info[next_to_clean]:\n"
947 " time_stamp <%lx>\n"
948 " next_to_watch <%x>\n"
949 " jiffies <%lx>\n"
41cec6f1
BA		 950 " next_to_watch.status <%x>\n"
951 "MAC Status <%x>\n"
952 "PHY Status <%x>\n"
953 "PHY 1000BASE-T Status <%x>\n"
954 "PHY Extended Status <%x>\n"
955 "PCI Status <%x>\n",
44defeb3
JK		 956 readl(adapter->hw.hw_addr + tx_ring->head),
957 readl(adapter->hw.hw_addr + tx_ring->tail),
958 tx_ring->next_to_use,
959 tx_ring->next_to_clean,
960 tx_ring->buffer_info[eop].time_stamp,
961 eop,
962 jiffies,
41cec6f1
BA		 963 eop_desc->upper.fields.status,
964 er32(STATUS),
965 phy_status,
966 phy_1000t_status,
967 phy_ext_status,
968 pci_status);
bc7f75fa
AK		 969}
970
971/**
972 * e1000_clean_tx_irq - Reclaim resources after transmit completes
973 * @adapter: board private structure
974 *
975 * the return value indicates whether actual cleaning was done, there
976 * is no guarantee that everything was cleaned
977 **/
978static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
979{
980 struct net_device *netdev = adapter->netdev;
981 struct e1000_hw *hw = &adapter->hw;
982 struct e1000_ring *tx_ring = adapter->tx_ring;
983 struct e1000_tx_desc *tx_desc, *eop_desc;
984 struct e1000_buffer *buffer_info;
985 unsigned int i, eop;
986 unsigned int count = 0;
bc7f75fa
AK		 987 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
988
989 i = tx_ring->next_to_clean;
990 eop = tx_ring->buffer_info[i].next_to_watch;
991 eop_desc = E1000_TX_DESC(*tx_ring, eop);
992
12d04a3c
AD		 993 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
994 (count < tx_ring->count)) {
a86043c2 995 bool cleaned = false;
2d0bb1c1 996 rmb(); /* read buffer_info after eop_desc */
a86043c2 997 for (; !cleaned; count++) {
bc7f75fa
AK		 998 tx_desc = E1000_TX_DESC(*tx_ring, i);
999 buffer_info = &tx_ring->buffer_info[i];
1000 cleaned = (i == eop);
1001
1002 if (cleaned) {
9ed318d5
TH		 1003 total_tx_packets += buffer_info->segs;
1004 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK		 1005 }
1006
1007 e1000_put_txbuf(adapter, buffer_info);
1008 tx_desc->upper.data = 0;
1009
1010 i++;
1011 if (i == tx_ring->count)
1012 i = 0;
1013 }
1014
dac87619
TL		 1015 if (i == tx_ring->next_to_use)
1016 break;
bc7f75fa
AK		 1017 eop = tx_ring->buffer_info[i].next_to_watch;
1018 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1019 }
1020
1021 tx_ring->next_to_clean = i;
1022
1023#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1024 if (count && netif_carrier_ok(netdev) &&
1025 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1026 /* Make sure that anybody stopping the queue after this
1027 * sees the new next_to_clean.
1028 */
1029 smp_mb();
1030
1031 if (netif_queue_stopped(netdev) &&
1032 !(test_bit(__E1000_DOWN, &adapter->state))) {
1033 netif_wake_queue(netdev);
1034 ++adapter->restart_queue;
1035 }
1036 }
1037
1038 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1039 /*
1040 * Detect a transmit hang in hardware, this serializes the
1041 * check with the clearing of time_stamp and movement of i
1042 */
bc7f75fa 1043 adapter->detect_tx_hung = 0;
12d04a3c
AD		 1044 if (tx_ring->buffer_info[i].time_stamp &&
1045 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 1046 + (adapter->tx_timeout_factor * HZ)) &&
1047 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1048 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 1049 netif_stop_queue(netdev);
1050 }
1051 }
1052 adapter->total_tx_bytes += total_tx_bytes;
1053 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 1054 netdev->stats.tx_bytes += total_tx_bytes;
1055 netdev->stats.tx_packets += total_tx_packets;
807540ba 1056 return count < tx_ring->count;
bc7f75fa
AK		 1057}
1058
bc7f75fa
AK		 1059/**
1060 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1061 * @adapter: board private structure
1062 *
1063 * the return value indicates whether actual cleaning was done, there
1064 * is no guarantee that everything was cleaned
1065 **/
1066static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1067 int *work_done, int work_to_do)
1068{
3bb99fe2 1069 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1070 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1071 struct net_device *netdev = adapter->netdev;
1072 struct pci_dev *pdev = adapter->pdev;
1073 struct e1000_ring *rx_ring = adapter->rx_ring;
1074 struct e1000_buffer *buffer_info, *next_buffer;
1075 struct e1000_ps_page *ps_page;
1076 struct sk_buff *skb;
1077 unsigned int i, j;
1078 u32 length, staterr;
1079 int cleaned_count = 0;
1080 bool cleaned = 0;
1081 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1082
1083 i = rx_ring->next_to_clean;
1084 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1085 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1086 buffer_info = &rx_ring->buffer_info[i];
1087
1088 while (staterr & E1000_RXD_STAT_DD) {
1089 if (*work_done >= work_to_do)
1090 break;
1091 (*work_done)++;
1092 skb = buffer_info->skb;
2d0bb1c1 1093 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 1094
1095 /* in the packet split case this is header only */
1096 prefetch(skb->data - NET_IP_ALIGN);
1097
1098 i++;
1099 if (i == rx_ring->count)
1100 i = 0;
1101 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1102 prefetch(next_rxd);
1103
1104 next_buffer = &rx_ring->buffer_info[i];
1105
1106 cleaned = 1;
1107 cleaned_count++;
0be3f55f 1108 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1109 adapter->rx_ps_bsize0,
0be3f55f 1110 DMA_FROM_DEVICE);
bc7f75fa
AK		 1111 buffer_info->dma = 0;
1112
b94b5028
JB		 1113 /* see !EOP comment in other rx routine */
1114 if (!(staterr & E1000_RXD_STAT_EOP))
1115 adapter->flags2 |= FLAG2_IS_DISCARDING;
1116
1117 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 1118 e_dbg("Packet Split buffers didn't pick up the full "
1119 "packet\n");
bc7f75fa 1120 dev_kfree_skb_irq(skb);
b94b5028
JB		 1121 if (staterr & E1000_RXD_STAT_EOP)
1122 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1123 goto next_desc;
1124 }
1125
1126 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1127 dev_kfree_skb_irq(skb);
1128 goto next_desc;
1129 }
1130
1131 length = le16_to_cpu(rx_desc->wb.middle.length0);
1132
1133 if (!length) {
3bb99fe2
BA		 1134 e_dbg("Last part of the packet spanning multiple "
1135 "descriptors\n");
bc7f75fa
AK		 1136 dev_kfree_skb_irq(skb);
1137 goto next_desc;
1138 }
1139
1140 /* Good Receive */
1141 skb_put(skb, length);
1142
1143 {
ad68076e
BA		 1144 /*
1145 * this looks ugly, but it seems compiler issues make it
1146 * more efficient than reusing j
1147 */
bc7f75fa
AK		 1148 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1149
ad68076e
BA		 1150 /*
1151 * page alloc/put takes too long and effects small packet
1152 * throughput, so unsplit small packets and save the alloc/put
1153 * only valid in softirq (napi) context to call kmap_*
1154 */
bc7f75fa
AK		 1155 if (l1 && (l1 <= copybreak) &&
1156 ((length + l1) <= adapter->rx_ps_bsize0)) {
1157 u8 *vaddr;
1158
47f44e40 1159 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1160
ad68076e
BA		 1161 /*
1162 * there is no documentation about how to call
bc7f75fa 1163 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 1164 * very long
1165 */
0be3f55f
NN		 1166 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1167 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK		 1168 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1169 memcpy(skb_tail_pointer(skb), vaddr, l1);
1170 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN		 1171 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1172 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1173
eb7c3adb
JK		 1174 /* remove the CRC */
1175 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1176 l1 -= 4;
1177
bc7f75fa
AK		 1178 skb_put(skb, l1);
1179 goto copydone;
1180 } /* if */
1181 }
1182
1183 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1184 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1185 if (!length)
1186 break;
1187
47f44e40 1188 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1189 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1190 DMA_FROM_DEVICE);
bc7f75fa
AK		 1191 ps_page->dma = 0;
1192 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1193 ps_page->page = NULL;
1194 skb->len += length;
1195 skb->data_len += length;
1196 skb->truesize += length;
1197 }
1198
eb7c3adb
JK		 1199 /* strip the ethernet crc, problem is we're using pages now so
1200 * this whole operation can get a little cpu intensive
1201 */
1202 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1203 pskb_trim(skb, skb->len - 4);
1204
bc7f75fa
AK		 1205copydone:
1206 total_rx_bytes += skb->len;
1207 total_rx_packets++;
1208
1209 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1210 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1211
1212 if (rx_desc->wb.upper.header_status &
1213 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1214 adapter->rx_hdr_split++;
1215
1216 e1000_receive_skb(adapter, netdev, skb,
1217 staterr, rx_desc->wb.middle.vlan);
1218
1219next_desc:
1220 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1221 buffer_info->skb = NULL;
1222
1223 /* return some buffers to hardware, one at a time is too slow */
1224 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1225 adapter->alloc_rx_buf(adapter, cleaned_count);
1226 cleaned_count = 0;
1227 }
1228
1229 /* use prefetched values */
1230 rx_desc = next_rxd;
1231 buffer_info = next_buffer;
1232
1233 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1234 }
1235 rx_ring->next_to_clean = i;
1236
1237 cleaned_count = e1000_desc_unused(rx_ring);
1238 if (cleaned_count)
1239 adapter->alloc_rx_buf(adapter, cleaned_count);
1240
bc7f75fa 1241 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1242 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1243 netdev->stats.rx_bytes += total_rx_bytes;
1244 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 1245 return cleaned;
1246}
1247
97ac8cae
BA		 1248/**
1249 * e1000_consume_page - helper function
1250 **/
1251static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1252 u16 length)
1253{
1254 bi->page = NULL;
1255 skb->len += length;
1256 skb->data_len += length;
1257 skb->truesize += length;
1258}
1259
1260/**
1261 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1262 * @adapter: board private structure
1263 *
1264 * the return value indicates whether actual cleaning was done, there
1265 * is no guarantee that everything was cleaned
1266 **/
1267
1268static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1269 int *work_done, int work_to_do)
1270{
1271 struct net_device *netdev = adapter->netdev;
1272 struct pci_dev *pdev = adapter->pdev;
1273 struct e1000_ring *rx_ring = adapter->rx_ring;
1274 struct e1000_rx_desc *rx_desc, *next_rxd;
1275 struct e1000_buffer *buffer_info, *next_buffer;
1276 u32 length;
1277 unsigned int i;
1278 int cleaned_count = 0;
1279 bool cleaned = false;
1280 unsigned int total_rx_bytes=0, total_rx_packets=0;
1281
1282 i = rx_ring->next_to_clean;
1283 rx_desc = E1000_RX_DESC(*rx_ring, i);
1284 buffer_info = &rx_ring->buffer_info[i];
1285
1286 while (rx_desc->status & E1000_RXD_STAT_DD) {
1287 struct sk_buff *skb;
1288 u8 status;
1289
1290 if (*work_done >= work_to_do)
1291 break;
1292 (*work_done)++;
2d0bb1c1 1293 rmb(); /* read descriptor and rx_buffer_info after status DD */
97ac8cae
BA		 1294
1295 status = rx_desc->status;
1296 skb = buffer_info->skb;
1297 buffer_info->skb = NULL;
1298
1299 ++i;
1300 if (i == rx_ring->count)
1301 i = 0;
1302 next_rxd = E1000_RX_DESC(*rx_ring, i);
1303 prefetch(next_rxd);
1304
1305 next_buffer = &rx_ring->buffer_info[i];
1306
1307 cleaned = true;
1308 cleaned_count++;
0be3f55f
NN		 1309 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1310 DMA_FROM_DEVICE);
97ac8cae
BA		 1311 buffer_info->dma = 0;
1312
1313 length = le16_to_cpu(rx_desc->length);
1314
1315 /* errors is only valid for DD + EOP descriptors */
1316 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1317 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1318 /* recycle both page and skb */
1319 buffer_info->skb = skb;
1320 /* an error means any chain goes out the window
1321 * too */
1322 if (rx_ring->rx_skb_top)
1323 dev_kfree_skb(rx_ring->rx_skb_top);
1324 rx_ring->rx_skb_top = NULL;
1325 goto next_desc;
1326 }
1327
f0f1a172 1328#define rxtop (rx_ring->rx_skb_top)
97ac8cae
BA		 1329 if (!(status & E1000_RXD_STAT_EOP)) {
1330 /* this descriptor is only the beginning (or middle) */
1331 if (!rxtop) {
1332 /* this is the beginning of a chain */
1333 rxtop = skb;
1334 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1335 0, length);
1336 } else {
1337 /* this is the middle of a chain */
1338 skb_fill_page_desc(rxtop,
1339 skb_shinfo(rxtop)->nr_frags,
1340 buffer_info->page, 0, length);
1341 /* re-use the skb, only consumed the page */
1342 buffer_info->skb = skb;
1343 }
1344 e1000_consume_page(buffer_info, rxtop, length);
1345 goto next_desc;
1346 } else {
1347 if (rxtop) {
1348 /* end of the chain */
1349 skb_fill_page_desc(rxtop,
1350 skb_shinfo(rxtop)->nr_frags,
1351 buffer_info->page, 0, length);
1352 /* re-use the current skb, we only consumed the
1353 * page */
1354 buffer_info->skb = skb;
1355 skb = rxtop;
1356 rxtop = NULL;
1357 e1000_consume_page(buffer_info, skb, length);
1358 } else {
1359 /* no chain, got EOP, this buf is the packet
1360 * copybreak to save the put_page/alloc_page */
1361 if (length <= copybreak &&
1362 skb_tailroom(skb) >= length) {
1363 u8 *vaddr;
1364 vaddr = kmap_atomic(buffer_info->page,
1365 KM_SKB_DATA_SOFTIRQ);
1366 memcpy(skb_tail_pointer(skb), vaddr,
1367 length);
1368 kunmap_atomic(vaddr,
1369 KM_SKB_DATA_SOFTIRQ);
1370 /* re-use the page, so don't erase
1371 * buffer_info->page */
1372 skb_put(skb, length);
1373 } else {
1374 skb_fill_page_desc(skb, 0,
1375 buffer_info->page, 0,
1376 length);
1377 e1000_consume_page(buffer_info, skb,
1378 length);
1379 }
1380 }
1381 }
1382
1383 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1384 e1000_rx_checksum(adapter,
1385 (u32)(status) |
1386 ((u32)(rx_desc->errors) << 24),
1387 le16_to_cpu(rx_desc->csum), skb);
1388
1389 /* probably a little skewed due to removing CRC */
1390 total_rx_bytes += skb->len;
1391 total_rx_packets++;
1392
1393 /* eth type trans needs skb->data to point to something */
1394 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1395 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1396 dev_kfree_skb(skb);
1397 goto next_desc;
1398 }
1399
1400 e1000_receive_skb(adapter, netdev, skb, status,
1401 rx_desc->special);
1402
1403next_desc:
1404 rx_desc->status = 0;
1405
1406 /* return some buffers to hardware, one at a time is too slow */
1407 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1408 adapter->alloc_rx_buf(adapter, cleaned_count);
1409 cleaned_count = 0;
1410 }
1411
1412 /* use prefetched values */
1413 rx_desc = next_rxd;
1414 buffer_info = next_buffer;
1415 }
1416 rx_ring->next_to_clean = i;
1417
1418 cleaned_count = e1000_desc_unused(rx_ring);
1419 if (cleaned_count)
1420 adapter->alloc_rx_buf(adapter, cleaned_count);
1421
1422 adapter->total_rx_bytes += total_rx_bytes;
1423 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1424 netdev->stats.rx_bytes += total_rx_bytes;
1425 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1426 return cleaned;
1427}
1428
bc7f75fa
AK		 1429/**
1430 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1431 * @adapter: board private structure
1432 **/
1433static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1434{
1435 struct e1000_ring *rx_ring = adapter->rx_ring;
1436 struct e1000_buffer *buffer_info;
1437 struct e1000_ps_page *ps_page;
1438 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1439 unsigned int i, j;
1440
1441 /* Free all the Rx ring sk_buffs */
1442 for (i = 0; i < rx_ring->count; i++) {
1443 buffer_info = &rx_ring->buffer_info[i];
1444 if (buffer_info->dma) {
1445 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1446 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1447 adapter->rx_buffer_len,
0be3f55f 1448 DMA_FROM_DEVICE);
97ac8cae 1449 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1450 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1451 PAGE_SIZE,
0be3f55f 1452 DMA_FROM_DEVICE);
bc7f75fa 1453 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1454 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1455 adapter->rx_ps_bsize0,
0be3f55f 1456 DMA_FROM_DEVICE);
bc7f75fa
AK		 1457 buffer_info->dma = 0;
1458 }
1459
97ac8cae
BA		 1460 if (buffer_info->page) {
1461 put_page(buffer_info->page);
1462 buffer_info->page = NULL;
1463 }
1464
bc7f75fa
AK		 1465 if (buffer_info->skb) {
1466 dev_kfree_skb(buffer_info->skb);
1467 buffer_info->skb = NULL;
1468 }
1469
1470 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1471 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1472 if (!ps_page->page)
1473 break;
0be3f55f
NN		 1474 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1475 DMA_FROM_DEVICE);
bc7f75fa
AK		 1476 ps_page->dma = 0;
1477 put_page(ps_page->page);
1478 ps_page->page = NULL;
1479 }
1480 }
1481
1482 /* there also may be some cached data from a chained receive */
1483 if (rx_ring->rx_skb_top) {
1484 dev_kfree_skb(rx_ring->rx_skb_top);
1485 rx_ring->rx_skb_top = NULL;
1486 }
1487
bc7f75fa
AK		 1488 /* Zero out the descriptor ring */
1489 memset(rx_ring->desc, 0, rx_ring->size);
1490
1491 rx_ring->next_to_clean = 0;
1492 rx_ring->next_to_use = 0;
b94b5028 1493 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1494
1495 writel(0, adapter->hw.hw_addr + rx_ring->head);
1496 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1497}
1498
a8f88ff5
JB		 1499static void e1000e_downshift_workaround(struct work_struct *work)
1500{
1501 struct e1000_adapter *adapter = container_of(work,
1502 struct e1000_adapter, downshift_task);
1503
1504 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1505}
1506
bc7f75fa
AK		 1507/**
1508 * e1000_intr_msi - Interrupt Handler
1509 * @irq: interrupt number
1510 * @data: pointer to a network interface device structure
1511 **/
1512static irqreturn_t e1000_intr_msi(int irq, void *data)
1513{
1514 struct net_device *netdev = data;
1515 struct e1000_adapter *adapter = netdev_priv(netdev);
1516 struct e1000_hw *hw = &adapter->hw;
1517 u32 icr = er32(ICR);
1518
ad68076e
BA		 1519 /*
1520 * read ICR disables interrupts using IAM
1521 */
bc7f75fa 1522
573cca8c 1523 if (icr & E1000_ICR_LSC) {
bc7f75fa 1524 hw->mac.get_link_status = 1;
ad68076e
BA		 1525 /*
1526 * ICH8 workaround-- Call gig speed drop workaround on cable
1527 * disconnect (LSC) before accessing any PHY registers
1528 */
bc7f75fa
AK		 1529 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1530 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1531 schedule_work(&adapter->downshift_task);
bc7f75fa 1532
ad68076e
BA		 1533 /*
1534 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1535 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1536 * adapter in watchdog
1537 */
bc7f75fa
AK		 1538 if (netif_carrier_ok(netdev) &&
1539 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1540 /* disable receives */
1541 u32 rctl = er32(RCTL);
1542 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1543 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1544 }
1545 /* guard against interrupt when we're going down */
1546 if (!test_bit(__E1000_DOWN, &adapter->state))
1547 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1548 }
1549
288379f0 1550 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1551 adapter->total_tx_bytes = 0;
1552 adapter->total_tx_packets = 0;
1553 adapter->total_rx_bytes = 0;
1554 adapter->total_rx_packets = 0;
288379f0 1555 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1556 }
1557
1558 return IRQ_HANDLED;
1559}
1560
1561/**
1562 * e1000_intr - Interrupt Handler
1563 * @irq: interrupt number
1564 * @data: pointer to a network interface device structure
1565 **/
1566static irqreturn_t e1000_intr(int irq, void *data)
1567{
1568 struct net_device *netdev = data;
1569 struct e1000_adapter *adapter = netdev_priv(netdev);
1570 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1571 u32 rctl, icr = er32(ICR);
4662e82b 1572
a68ea775 1573 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1574 return IRQ_NONE; /* Not our interrupt */
1575
ad68076e
BA		 1576 /*
1577 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1578 * not set, then the adapter didn't send an interrupt
1579 */
bc7f75fa
AK		 1580 if (!(icr & E1000_ICR_INT_ASSERTED))
1581 return IRQ_NONE;
1582
ad68076e
BA		 1583 /*
1584 * Interrupt Auto-Mask...upon reading ICR,
1585 * interrupts are masked. No need for the
1586 * IMC write
1587 */
bc7f75fa 1588
573cca8c 1589 if (icr & E1000_ICR_LSC) {
bc7f75fa 1590 hw->mac.get_link_status = 1;
ad68076e
BA		 1591 /*
1592 * ICH8 workaround-- Call gig speed drop workaround on cable
1593 * disconnect (LSC) before accessing any PHY registers
1594 */
bc7f75fa
AK		 1595 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1596 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1597 schedule_work(&adapter->downshift_task);
bc7f75fa 1598
ad68076e
BA		 1599 /*
1600 * 80003ES2LAN workaround--
bc7f75fa
AK		 1601 * For packet buffer work-around on link down event;
1602 * disable receives here in the ISR and
1603 * reset adapter in watchdog
1604 */
1605 if (netif_carrier_ok(netdev) &&
1606 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1607 /* disable receives */
1608 rctl = er32(RCTL);
1609 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1610 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1611 }
1612 /* guard against interrupt when we're going down */
1613 if (!test_bit(__E1000_DOWN, &adapter->state))
1614 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1615 }
1616
288379f0 1617 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1618 adapter->total_tx_bytes = 0;
1619 adapter->total_tx_packets = 0;
1620 adapter->total_rx_bytes = 0;
1621 adapter->total_rx_packets = 0;
288379f0 1622 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1623 }
1624
1625 return IRQ_HANDLED;
1626}
1627
4662e82b
BA		 1628static irqreturn_t e1000_msix_other(int irq, void *data)
1629{
1630 struct net_device *netdev = data;
1631 struct e1000_adapter *adapter = netdev_priv(netdev);
1632 struct e1000_hw *hw = &adapter->hw;
1633 u32 icr = er32(ICR);
1634
1635 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1636 if (!test_bit(__E1000_DOWN, &adapter->state))
1637 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1638 return IRQ_NONE;
1639 }
1640
1641 if (icr & adapter->eiac_mask)
1642 ew32(ICS, (icr & adapter->eiac_mask));
1643
1644 if (icr & E1000_ICR_OTHER) {
1645 if (!(icr & E1000_ICR_LSC))
1646 goto no_link_interrupt;
1647 hw->mac.get_link_status = 1;
1648 /* guard against interrupt when we're going down */
1649 if (!test_bit(__E1000_DOWN, &adapter->state))
1650 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1651 }
1652
1653no_link_interrupt:
a3c69fef
JB		 1654 if (!test_bit(__E1000_DOWN, &adapter->state))
1655 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1656
1657 return IRQ_HANDLED;
1658}
1659
1660
1661static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1662{
1663 struct net_device *netdev = data;
1664 struct e1000_adapter *adapter = netdev_priv(netdev);
1665 struct e1000_hw *hw = &adapter->hw;
1666 struct e1000_ring *tx_ring = adapter->tx_ring;
1667
1668
1669 adapter->total_tx_bytes = 0;
1670 adapter->total_tx_packets = 0;
1671
1672 if (!e1000_clean_tx_irq(adapter))
1673 /* Ring was not completely cleaned, so fire another interrupt */
1674 ew32(ICS, tx_ring->ims_val);
1675
1676 return IRQ_HANDLED;
1677}
1678
1679static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1680{
1681 struct net_device *netdev = data;
1682 struct e1000_adapter *adapter = netdev_priv(netdev);
1683
1684 /* Write the ITR value calculated at the end of the
1685 * previous interrupt.
1686 */
1687 if (adapter->rx_ring->set_itr) {
1688 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1689 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1690 adapter->rx_ring->set_itr = 0;
1691 }
1692
288379f0 1693 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1694 adapter->total_rx_bytes = 0;
1695 adapter->total_rx_packets = 0;
288379f0 1696 __napi_schedule(&adapter->napi);
4662e82b
BA		 1697 }
1698 return IRQ_HANDLED;
1699}
1700
1701/**
1702 * e1000_configure_msix - Configure MSI-X hardware
1703 *
1704 * e1000_configure_msix sets up the hardware to properly
1705 * generate MSI-X interrupts.
1706 **/
1707static void e1000_configure_msix(struct e1000_adapter *adapter)
1708{
1709 struct e1000_hw *hw = &adapter->hw;
1710 struct e1000_ring *rx_ring = adapter->rx_ring;
1711 struct e1000_ring *tx_ring = adapter->tx_ring;
1712 int vector = 0;
1713 u32 ctrl_ext, ivar = 0;
1714
1715 adapter->eiac_mask = 0;
1716
1717 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1718 if (hw->mac.type == e1000_82574) {
1719 u32 rfctl = er32(RFCTL);
1720 rfctl |= E1000_RFCTL_ACK_DIS;
1721 ew32(RFCTL, rfctl);
1722 }
1723
1724#define E1000_IVAR_INT_ALLOC_VALID 0x8
1725 /* Configure Rx vector */
1726 rx_ring->ims_val = E1000_IMS_RXQ0;
1727 adapter->eiac_mask |= rx_ring->ims_val;
1728 if (rx_ring->itr_val)
1729 writel(1000000000 / (rx_ring->itr_val * 256),
1730 hw->hw_addr + rx_ring->itr_register);
1731 else
1732 writel(1, hw->hw_addr + rx_ring->itr_register);
1733 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1734
1735 /* Configure Tx vector */
1736 tx_ring->ims_val = E1000_IMS_TXQ0;
1737 vector++;
1738 if (tx_ring->itr_val)
1739 writel(1000000000 / (tx_ring->itr_val * 256),
1740 hw->hw_addr + tx_ring->itr_register);
1741 else
1742 writel(1, hw->hw_addr + tx_ring->itr_register);
1743 adapter->eiac_mask |= tx_ring->ims_val;
1744 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1745
1746 /* set vector for Other Causes, e.g. link changes */
1747 vector++;
1748 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1749 if (rx_ring->itr_val)
1750 writel(1000000000 / (rx_ring->itr_val * 256),
1751 hw->hw_addr + E1000_EITR_82574(vector));
1752 else
1753 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1754
1755 /* Cause Tx interrupts on every write back */
1756 ivar |= (1 << 31);
1757
1758 ew32(IVAR, ivar);
1759
1760 /* enable MSI-X PBA support */
1761 ctrl_ext = er32(CTRL_EXT);
1762 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1763
1764 /* Auto-Mask Other interrupts upon ICR read */
1765#define E1000_EIAC_MASK_82574 0x01F00000
1766 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1767 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1768 ew32(CTRL_EXT, ctrl_ext);
1769 e1e_flush();
1770}
1771
1772void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1773{
1774 if (adapter->msix_entries) {
1775 pci_disable_msix(adapter->pdev);
1776 kfree(adapter->msix_entries);
1777 adapter->msix_entries = NULL;
1778 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1779 pci_disable_msi(adapter->pdev);
1780 adapter->flags &= ~FLAG_MSI_ENABLED;
1781 }
4662e82b
BA		 1782}
1783
1784/**
1785 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1786 *
1787 * Attempt to configure interrupts using the best available
1788 * capabilities of the hardware and kernel.
1789 **/
1790void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1791{
1792 int err;
8e86acd7 1793 int i;
4662e82b
BA		 1794
1795 switch (adapter->int_mode) {
1796 case E1000E_INT_MODE_MSIX:
1797 if (adapter->flags & FLAG_HAS_MSIX) {
8e86acd7
JK		 1798 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1799 adapter->msix_entries = kcalloc(adapter->num_vectors,
4662e82b
BA		 1800 sizeof(struct msix_entry),
1801 GFP_KERNEL);
1802 if (adapter->msix_entries) {
8e86acd7 1803 for (i = 0; i < adapter->num_vectors; i++)
4662e82b
BA		 1804 adapter->msix_entries[i].entry = i;
1805
1806 err = pci_enable_msix(adapter->pdev,
1807 adapter->msix_entries,
8e86acd7 1808 adapter->num_vectors);
b1cdfead 1809 if (err == 0)
4662e82b
BA		 1810 return;
1811 }
1812 /* MSI-X failed, so fall through and try MSI */
1813 e_err("Failed to initialize MSI-X interrupts. "
1814 "Falling back to MSI interrupts.\n");
1815 e1000e_reset_interrupt_capability(adapter);
1816 }
1817 adapter->int_mode = E1000E_INT_MODE_MSI;
1818 /* Fall through */
1819 case E1000E_INT_MODE_MSI:
1820 if (!pci_enable_msi(adapter->pdev)) {
1821 adapter->flags |= FLAG_MSI_ENABLED;
1822 } else {
1823 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1824 e_err("Failed to initialize MSI interrupts. Falling "
1825 "back to legacy interrupts.\n");
1826 }
1827 /* Fall through */
1828 case E1000E_INT_MODE_LEGACY:
1829 /* Don't do anything; this is the system default */
1830 break;
1831 }
8e86acd7
JK		 1832
1833 /* store the number of vectors being used */
1834 adapter->num_vectors = 1;
4662e82b
BA		 1835}
1836
1837/**
1838 * e1000_request_msix - Initialize MSI-X interrupts
1839 *
1840 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1841 * kernel.
1842 **/
1843static int e1000_request_msix(struct e1000_adapter *adapter)
1844{
1845 struct net_device *netdev = adapter->netdev;
1846 int err = 0, vector = 0;
1847
1848 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1849 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1850 else
1851 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1852 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1853 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1854 netdev);
1855 if (err)
1856 goto out;
1857 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1858 adapter->rx_ring->itr_val = adapter->itr;
1859 vector++;
1860
1861 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1862 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1863 else
1864 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1865 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1866 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1867 netdev);
1868 if (err)
1869 goto out;
1870 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1871 adapter->tx_ring->itr_val = adapter->itr;
1872 vector++;
1873
1874 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1875 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1876 if (err)
1877 goto out;
1878
1879 e1000_configure_msix(adapter);
1880 return 0;
1881out:
1882 return err;
1883}
1884
f8d59f78
BA		 1885/**
1886 * e1000_request_irq - initialize interrupts
1887 *
1888 * Attempts to configure interrupts using the best available
1889 * capabilities of the hardware and kernel.
1890 **/
bc7f75fa
AK		 1891static int e1000_request_irq(struct e1000_adapter *adapter)
1892{
1893 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1894 int err;
1895
4662e82b
BA		 1896 if (adapter->msix_entries) {
1897 err = e1000_request_msix(adapter);
1898 if (!err)
1899 return err;
1900 /* fall back to MSI */
1901 e1000e_reset_interrupt_capability(adapter);
1902 adapter->int_mode = E1000E_INT_MODE_MSI;
1903 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1904 }
4662e82b 1905 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1906 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1907 netdev->name, netdev);
1908 if (!err)
1909 return err;
bc7f75fa 1910
4662e82b
BA		 1911 /* fall back to legacy interrupt */
1912 e1000e_reset_interrupt_capability(adapter);
1913 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1914 }
1915
a0607fd3 1916 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1917 netdev->name, netdev);
1918 if (err)
1919 e_err("Unable to allocate interrupt, Error: %d\n", err);
1920
bc7f75fa
AK		 1921 return err;
1922}
1923
1924static void e1000_free_irq(struct e1000_adapter *adapter)
1925{
1926 struct net_device *netdev = adapter->netdev;
1927
4662e82b
BA		 1928 if (adapter->msix_entries) {
1929 int vector = 0;
1930
1931 free_irq(adapter->msix_entries[vector].vector, netdev);
1932 vector++;
1933
1934 free_irq(adapter->msix_entries[vector].vector, netdev);
1935 vector++;
1936
1937 /* Other Causes interrupt vector */
1938 free_irq(adapter->msix_entries[vector].vector, netdev);
1939 return;
bc7f75fa 1940 }
4662e82b
BA		 1941
1942 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1943}
1944
1945/**
1946 * e1000_irq_disable - Mask off interrupt generation on the NIC
1947 **/
1948static void e1000_irq_disable(struct e1000_adapter *adapter)
1949{
1950 struct e1000_hw *hw = &adapter->hw;
1951
bc7f75fa 1952 ew32(IMC, ~0);
4662e82b
BA		 1953 if (adapter->msix_entries)
1954 ew32(EIAC_82574, 0);
bc7f75fa 1955 e1e_flush();
8e86acd7
JK		 1956
1957 if (adapter->msix_entries) {
1958 int i;
1959 for (i = 0; i < adapter->num_vectors; i++)
1960 synchronize_irq(adapter->msix_entries[i].vector);
1961 } else {
1962 synchronize_irq(adapter->pdev->irq);
1963 }
bc7f75fa
AK		 1964}
1965
1966/**
1967 * e1000_irq_enable - Enable default interrupt generation settings
1968 **/
1969static void e1000_irq_enable(struct e1000_adapter *adapter)
1970{
1971 struct e1000_hw *hw = &adapter->hw;
1972
4662e82b
BA		 1973 if (adapter->msix_entries) {
1974 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1975 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1976 } else {
1977 ew32(IMS, IMS_ENABLE_MASK);
1978 }
74ef9c39 1979 e1e_flush();
bc7f75fa
AK		 1980}
1981
1982/**
1983 * e1000_get_hw_control - get control of the h/w from f/w
1984 * @adapter: address of board private structure
1985 *
489815ce 1986 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1987 * For ASF and Pass Through versions of f/w this means that
1988 * the driver is loaded. For AMT version (only with 82573)
1989 * of the f/w this means that the network i/f is open.
1990 **/
1991static void e1000_get_hw_control(struct e1000_adapter *adapter)
1992{
1993 struct e1000_hw *hw = &adapter->hw;
1994 u32 ctrl_ext;
1995 u32 swsm;
1996
1997 /* Let firmware know the driver has taken over */
1998 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1999 swsm = er32(SWSM);
2000 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2001 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2002 ctrl_ext = er32(CTRL_EXT);
ad68076e 2003 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2004 }
2005}
2006
2007/**
2008 * e1000_release_hw_control - release control of the h/w to f/w
2009 * @adapter: address of board private structure
2010 *
489815ce 2011 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 2012 * For ASF and Pass Through versions of f/w this means that the
2013 * driver is no longer loaded. For AMT version (only with 82573) i
2014 * of the f/w this means that the network i/f is closed.
2015 *
2016 **/
2017static void e1000_release_hw_control(struct e1000_adapter *adapter)
2018{
2019 struct e1000_hw *hw = &adapter->hw;
2020 u32 ctrl_ext;
2021 u32 swsm;
2022
2023 /* Let firmware taken over control of h/w */
2024 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2025 swsm = er32(SWSM);
2026 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2027 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2028 ctrl_ext = er32(CTRL_EXT);
ad68076e 2029 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2030 }
2031}
2032
bc7f75fa
AK		 2033/**
2034 * @e1000_alloc_ring - allocate memory for a ring structure
2035 **/
2036static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2037 struct e1000_ring *ring)
2038{
2039 struct pci_dev *pdev = adapter->pdev;
2040
2041 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2042 GFP_KERNEL);
2043 if (!ring->desc)
2044 return -ENOMEM;
2045
2046 return 0;
2047}
2048
2049/**
2050 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2051 * @adapter: board private structure
2052 *
2053 * Return 0 on success, negative on failure
2054 **/
2055int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2056{
2057 struct e1000_ring *tx_ring = adapter->tx_ring;
2058 int err = -ENOMEM, size;
2059
2060 size = sizeof(struct e1000_buffer) * tx_ring->count;
89bf67f1 2061 tx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2062 if (!tx_ring->buffer_info)
2063 goto err;
bc7f75fa
AK		 2064
2065 /* round up to nearest 4K */
2066 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2067 tx_ring->size = ALIGN(tx_ring->size, 4096);
2068
2069 err = e1000_alloc_ring_dma(adapter, tx_ring);
2070 if (err)
2071 goto err;
2072
2073 tx_ring->next_to_use = 0;
2074 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2075
2076 return 0;
2077err:
2078 vfree(tx_ring->buffer_info);
44defeb3 2079 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2080 return err;
2081}
2082
2083/**
2084 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2085 * @adapter: board private structure
2086 *
2087 * Returns 0 on success, negative on failure
2088 **/
2089int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2090{
2091 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 2092 struct e1000_buffer *buffer_info;
2093 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2094
2095 size = sizeof(struct e1000_buffer) * rx_ring->count;
89bf67f1 2096 rx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2097 if (!rx_ring->buffer_info)
2098 goto err;
bc7f75fa 2099
47f44e40
AK		 2100 for (i = 0; i < rx_ring->count; i++) {
2101 buffer_info = &rx_ring->buffer_info[i];
2102 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2103 sizeof(struct e1000_ps_page),
2104 GFP_KERNEL);
2105 if (!buffer_info->ps_pages)
2106 goto err_pages;
2107 }
bc7f75fa
AK		 2108
2109 desc_len = sizeof(union e1000_rx_desc_packet_split);
2110
2111 /* Round up to nearest 4K */
2112 rx_ring->size = rx_ring->count * desc_len;
2113 rx_ring->size = ALIGN(rx_ring->size, 4096);
2114
2115 err = e1000_alloc_ring_dma(adapter, rx_ring);
2116 if (err)
47f44e40 2117 goto err_pages;
bc7f75fa
AK		 2118
2119 rx_ring->next_to_clean = 0;
2120 rx_ring->next_to_use = 0;
2121 rx_ring->rx_skb_top = NULL;
2122
2123 return 0;
47f44e40
AK		 2124
2125err_pages:
2126 for (i = 0; i < rx_ring->count; i++) {
2127 buffer_info = &rx_ring->buffer_info[i];
2128 kfree(buffer_info->ps_pages);
2129 }
bc7f75fa
AK		 2130err:
2131 vfree(rx_ring->buffer_info);
e9262447 2132 e_err("Unable to allocate memory for the receive descriptor ring\n");
bc7f75fa
AK		 2133 return err;
2134}
2135
2136/**
2137 * e1000_clean_tx_ring - Free Tx Buffers
2138 * @adapter: board private structure
2139 **/
2140static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2141{
2142 struct e1000_ring *tx_ring = adapter->tx_ring;
2143 struct e1000_buffer *buffer_info;
2144 unsigned long size;
2145 unsigned int i;
2146
2147 for (i = 0; i < tx_ring->count; i++) {
2148 buffer_info = &tx_ring->buffer_info[i];
2149 e1000_put_txbuf(adapter, buffer_info);
2150 }
2151
2152 size = sizeof(struct e1000_buffer) * tx_ring->count;
2153 memset(tx_ring->buffer_info, 0, size);
2154
2155 memset(tx_ring->desc, 0, tx_ring->size);
2156
2157 tx_ring->next_to_use = 0;
2158 tx_ring->next_to_clean = 0;
2159
2160 writel(0, adapter->hw.hw_addr + tx_ring->head);
2161 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2162}
2163
2164/**
2165 * e1000e_free_tx_resources - Free Tx Resources per Queue
2166 * @adapter: board private structure
2167 *
2168 * Free all transmit software resources
2169 **/
2170void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2171{
2172 struct pci_dev *pdev = adapter->pdev;
2173 struct e1000_ring *tx_ring = adapter->tx_ring;
2174
2175 e1000_clean_tx_ring(adapter);
2176
2177 vfree(tx_ring->buffer_info);
2178 tx_ring->buffer_info = NULL;
2179
2180 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2181 tx_ring->dma);
2182 tx_ring->desc = NULL;
2183}
2184
2185/**
2186 * e1000e_free_rx_resources - Free Rx Resources
2187 * @adapter: board private structure
2188 *
2189 * Free all receive software resources
2190 **/
2191
2192void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2193{
2194 struct pci_dev *pdev = adapter->pdev;
2195 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2196 int i;
bc7f75fa
AK		 2197
2198 e1000_clean_rx_ring(adapter);
2199
b1cdfead 2200 for (i = 0; i < rx_ring->count; i++)
47f44e40 2201 kfree(rx_ring->buffer_info[i].ps_pages);
47f44e40 2202
bc7f75fa
AK		 2203 vfree(rx_ring->buffer_info);
2204 rx_ring->buffer_info = NULL;
2205
bc7f75fa
AK		 2206 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2207 rx_ring->dma);
2208 rx_ring->desc = NULL;
2209}
2210
2211/**
2212 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2213 * @adapter: pointer to adapter
2214 * @itr_setting: current adapter->itr
2215 * @packets: the number of packets during this measurement interval
2216 * @bytes: the number of bytes during this measurement interval
2217 *
bc7f75fa
AK		 2218 * Stores a new ITR value based on packets and byte
2219 * counts during the last interrupt. The advantage of per interrupt
2220 * computation is faster updates and more accurate ITR for the current
2221 * traffic pattern. Constants in this function were computed
2222 * based on theoretical maximum wire speed and thresholds were set based
2223 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2224 * while increasing bulk throughput. This functionality is controlled
2225 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2226 **/
2227static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2228 u16 itr_setting, int packets,
2229 int bytes)
2230{
2231 unsigned int retval = itr_setting;
2232
2233 if (packets == 0)
2234 goto update_itr_done;
2235
2236 switch (itr_setting) {
2237 case lowest_latency:
2238 /* handle TSO and jumbo frames */
2239 if (bytes/packets > 8000)
2240 retval = bulk_latency;
b1cdfead 2241 else if ((packets < 5) && (bytes > 512))
bc7f75fa 2242 retval = low_latency;
bc7f75fa
AK		 2243 break;
2244 case low_latency: /* 50 usec aka 20000 ints/s */
2245 if (bytes > 10000) {
2246 /* this if handles the TSO accounting */
b1cdfead 2247 if (bytes/packets > 8000)
bc7f75fa 2248 retval = bulk_latency;
b1cdfead 2249 else if ((packets < 10) || ((bytes/packets) > 1200))
bc7f75fa 2250 retval = bulk_latency;
b1cdfead 2251 else if ((packets > 35))
bc7f75fa 2252 retval = lowest_latency;
bc7f75fa
AK		 2253 } else if (bytes/packets > 2000) {
2254 retval = bulk_latency;
2255 } else if (packets <= 2 && bytes < 512) {
2256 retval = lowest_latency;
2257 }
2258 break;
2259 case bulk_latency: /* 250 usec aka 4000 ints/s */
2260 if (bytes > 25000) {
b1cdfead 2261 if (packets > 35)
bc7f75fa 2262 retval = low_latency;
bc7f75fa
AK		 2263 } else if (bytes < 6000) {
2264 retval = low_latency;
2265 }
2266 break;
2267 }
2268
2269update_itr_done:
2270 return retval;
2271}
2272
2273static void e1000_set_itr(struct e1000_adapter *adapter)
2274{
2275 struct e1000_hw *hw = &adapter->hw;
2276 u16 current_itr;
2277 u32 new_itr = adapter->itr;
2278
2279 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2280 if (adapter->link_speed != SPEED_1000) {
2281 current_itr = 0;
2282 new_itr = 4000;
2283 goto set_itr_now;
2284 }
2285
828bac87
BA		 2286 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2287 new_itr = 0;
2288 goto set_itr_now;
2289 }
2290
bc7f75fa
AK		 2291 adapter->tx_itr = e1000_update_itr(adapter,
2292 adapter->tx_itr,
2293 adapter->total_tx_packets,
2294 adapter->total_tx_bytes);
2295 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2296 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2297 adapter->tx_itr = low_latency;
2298
2299 adapter->rx_itr = e1000_update_itr(adapter,
2300 adapter->rx_itr,
2301 adapter->total_rx_packets,
2302 adapter->total_rx_bytes);
2303 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2304 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2305 adapter->rx_itr = low_latency;
2306
2307 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2308
2309 switch (current_itr) {
2310 /* counts and packets in update_itr are dependent on these numbers */
2311 case lowest_latency:
2312 new_itr = 70000;
2313 break;
2314 case low_latency:
2315 new_itr = 20000; /* aka hwitr = ~200 */
2316 break;
2317 case bulk_latency:
2318 new_itr = 4000;
2319 break;
2320 default:
2321 break;
2322 }
2323
2324set_itr_now:
2325 if (new_itr != adapter->itr) {
ad68076e
BA		 2326 /*
2327 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2328 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2329 * increasing
2330 */
bc7f75fa
AK		 2331 new_itr = new_itr > adapter->itr ?
2332 min(adapter->itr + (new_itr >> 2), new_itr) :
2333 new_itr;
2334 adapter->itr = new_itr;
4662e82b
BA		 2335 adapter->rx_ring->itr_val = new_itr;
2336 if (adapter->msix_entries)
2337 adapter->rx_ring->set_itr = 1;
2338 else
828bac87
BA		 2339 if (new_itr)
2340 ew32(ITR, 1000000000 / (new_itr * 256));
2341 else
2342 ew32(ITR, 0);
bc7f75fa
AK		 2343 }
2344}
2345
4662e82b
BA		 2346/**
2347 * e1000_alloc_queues - Allocate memory for all rings
2348 * @adapter: board private structure to initialize
2349 **/
2350static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2351{
2352 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2353 if (!adapter->tx_ring)
2354 goto err;
2355
2356 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2357 if (!adapter->rx_ring)
2358 goto err;
2359
2360 return 0;
2361err:
2362 e_err("Unable to allocate memory for queues\n");
2363 kfree(adapter->rx_ring);
2364 kfree(adapter->tx_ring);
2365 return -ENOMEM;
2366}
2367
bc7f75fa
AK		 2368/**
2369 * e1000_clean - NAPI Rx polling callback
ad68076e 2370 * @napi: struct associated with this polling callback
489815ce 2371 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2372 **/
2373static int e1000_clean(struct napi_struct *napi, int budget)
2374{
2375 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2376 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2377 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2378 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2379
4cf1653a 2380 adapter = netdev_priv(poll_dev);
bc7f75fa 2381
4662e82b
BA		 2382 if (adapter->msix_entries &&
2383 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2384 goto clean_rx;
2385
92af3e95 2386 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2387
4662e82b 2388clean_rx:
bc7f75fa 2389 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2390
12d04a3c 2391 if (!tx_cleaned)
d2c7ddd6 2392 work_done = budget;
bc7f75fa 2393
53e52c72
DM		 2394 /* If budget not fully consumed, exit the polling mode */
2395 if (work_done < budget) {
bc7f75fa
AK		 2396 if (adapter->itr_setting & 3)
2397 e1000_set_itr(adapter);
288379f0 2398 napi_complete(napi);
a3c69fef
JB		 2399 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2400 if (adapter->msix_entries)
2401 ew32(IMS, adapter->rx_ring->ims_val);
2402 else
2403 e1000_irq_enable(adapter);
2404 }
bc7f75fa
AK		 2405 }
2406
2407 return work_done;
2408}
2409
2410static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2411{
2412 struct e1000_adapter *adapter = netdev_priv(netdev);
2413 struct e1000_hw *hw = &adapter->hw;
2414 u32 vfta, index;
2415
2416 /* don't update vlan cookie if already programmed */
2417 if ((adapter->hw.mng_cookie.status &
2418 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2419 (vid == adapter->mng_vlan_id))
2420 return;
caaddaf8 2421
bc7f75fa 2422 /* add VID to filter table */
caaddaf8
BA		 2423 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2424 index = (vid >> 5) & 0x7F;
2425 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2426 vfta |= (1 << (vid & 0x1F));
2427 hw->mac.ops.write_vfta(hw, index, vfta);
2428 }
bc7f75fa
AK		 2429}
2430
2431static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2432{
2433 struct e1000_adapter *adapter = netdev_priv(netdev);
2434 struct e1000_hw *hw = &adapter->hw;
2435 u32 vfta, index;
2436
74ef9c39
JB		 2437 if (!test_bit(__E1000_DOWN, &adapter->state))
2438 e1000_irq_disable(adapter);
bc7f75fa 2439 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2440
2441 if (!test_bit(__E1000_DOWN, &adapter->state))
2442 e1000_irq_enable(adapter);
bc7f75fa
AK		 2443
2444 if ((adapter->hw.mng_cookie.status &
2445 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2446 (vid == adapter->mng_vlan_id)) {
2447 /* release control to f/w */
2448 e1000_release_hw_control(adapter);
2449 return;
2450 }
2451
2452 /* remove VID from filter table */
caaddaf8
BA		 2453 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2454 index = (vid >> 5) & 0x7F;
2455 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2456 vfta &= ~(1 << (vid & 0x1F));
2457 hw->mac.ops.write_vfta(hw, index, vfta);
2458 }
bc7f75fa
AK		 2459}
2460
2461static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2462{
2463 struct net_device *netdev = adapter->netdev;
2464 u16 vid = adapter->hw.mng_cookie.vlan_id;
2465 u16 old_vid = adapter->mng_vlan_id;
2466
2467 if (!adapter->vlgrp)
2468 return;
2469
2470 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2471 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2472 if (adapter->hw.mng_cookie.status &
2473 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2474 e1000_vlan_rx_add_vid(netdev, vid);
2475 adapter->mng_vlan_id = vid;
2476 }
2477
2478 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2479 (vid != old_vid) &&
2480 !vlan_group_get_device(adapter->vlgrp, old_vid))
2481 e1000_vlan_rx_kill_vid(netdev, old_vid);
2482 } else {
2483 adapter->mng_vlan_id = vid;
2484 }
2485}
2486
2487
2488static void e1000_vlan_rx_register(struct net_device *netdev,
2489 struct vlan_group *grp)
2490{
2491 struct e1000_adapter *adapter = netdev_priv(netdev);
2492 struct e1000_hw *hw = &adapter->hw;
2493 u32 ctrl, rctl;
2494
74ef9c39
JB		 2495 if (!test_bit(__E1000_DOWN, &adapter->state))
2496 e1000_irq_disable(adapter);
bc7f75fa
AK		 2497 adapter->vlgrp = grp;
2498
2499 if (grp) {
2500 /* enable VLAN tag insert/strip */
2501 ctrl = er32(CTRL);
2502 ctrl |= E1000_CTRL_VME;
2503 ew32(CTRL, ctrl);
2504
2505 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2506 /* enable VLAN receive filtering */
2507 rctl = er32(RCTL);
bc7f75fa
AK		 2508 rctl &= ~E1000_RCTL_CFIEN;
2509 ew32(RCTL, rctl);
2510 e1000_update_mng_vlan(adapter);
2511 }
2512 } else {
2513 /* disable VLAN tag insert/strip */
2514 ctrl = er32(CTRL);
2515 ctrl &= ~E1000_CTRL_VME;
2516 ew32(CTRL, ctrl);
2517
2518 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2519 if (adapter->mng_vlan_id !=
2520 (u16)E1000_MNG_VLAN_NONE) {
2521 e1000_vlan_rx_kill_vid(netdev,
2522 adapter->mng_vlan_id);
2523 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2524 }
2525 }
2526 }
2527
74ef9c39
JB		 2528 if (!test_bit(__E1000_DOWN, &adapter->state))
2529 e1000_irq_enable(adapter);
bc7f75fa
AK		 2530}
2531
2532static void e1000_restore_vlan(struct e1000_adapter *adapter)
2533{
2534 u16 vid;
2535
2536 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2537
2538 if (!adapter->vlgrp)
2539 return;
2540
b738127d 2541 for (vid = 0; vid < VLAN_N_VID; vid++) {
bc7f75fa
AK		 2542 if (!vlan_group_get_device(adapter->vlgrp, vid))
2543 continue;
2544 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2545 }
2546}
2547
cd791618 2548static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK		 2549{
2550 struct e1000_hw *hw = &adapter->hw;
cd791618 2551 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK		 2552
2553 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2554 return;
2555
2556 manc = er32(MANC);
2557
ad68076e
BA		 2558 /*
2559 * enable receiving management packets to the host. this will probably
bc7f75fa 2560 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2561 * the packets will be handled on SMBUS
2562 */
bc7f75fa
AK		 2563 manc |= E1000_MANC_EN_MNG2HOST;
2564 manc2h = er32(MANC2H);
cd791618
BA		 2565
2566 switch (hw->mac.type) {
2567 default:
2568 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2569 break;
2570 case e1000_82574:
2571 case e1000_82583:
2572 /*
2573 * Check if IPMI pass-through decision filter already exists;
2574 * if so, enable it.
2575 */
2576 for (i = 0, j = 0; i < 8; i++) {
2577 mdef = er32(MDEF(i));
2578
2579 /* Ignore filters with anything other than IPMI ports */
3b21b508 2580 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
cd791618
BA		 2581 continue;
2582
2583 /* Enable this decision filter in MANC2H */
2584 if (mdef)
2585 manc2h |= (1 << i);
2586
2587 j |= mdef;
2588 }
2589
2590 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2591 break;
2592
2593 /* Create new decision filter in an empty filter */
2594 for (i = 0, j = 0; i < 8; i++)
2595 if (er32(MDEF(i)) == 0) {
2596 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2597 E1000_MDEF_PORT_664));
2598 manc2h |= (1 << 1);
2599 j++;
2600 break;
2601 }
2602
2603 if (!j)
2604 e_warn("Unable to create IPMI pass-through filter\n");
2605 break;
2606 }
2607
bc7f75fa
AK		 2608 ew32(MANC2H, manc2h);
2609 ew32(MANC, manc);
2610}
2611
2612/**
2613 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2614 * @adapter: board private structure
2615 *
2616 * Configure the Tx unit of the MAC after a reset.
2617 **/
2618static void e1000_configure_tx(struct e1000_adapter *adapter)
2619{
2620 struct e1000_hw *hw = &adapter->hw;
2621 struct e1000_ring *tx_ring = adapter->tx_ring;
2622 u64 tdba;
2623 u32 tdlen, tctl, tipg, tarc;
2624 u32 ipgr1, ipgr2;
2625
2626 /* Setup the HW Tx Head and Tail descriptor pointers */
2627 tdba = tx_ring->dma;
2628 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2629 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2630 ew32(TDBAH, (tdba >> 32));
2631 ew32(TDLEN, tdlen);
2632 ew32(TDH, 0);
2633 ew32(TDT, 0);
2634 tx_ring->head = E1000_TDH;
2635 tx_ring->tail = E1000_TDT;
2636
2637 /* Set the default values for the Tx Inter Packet Gap timer */
2638 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2639 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2640 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2641
2642 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2643 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2644
2645 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2646 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2647 ew32(TIPG, tipg);
2648
2649 /* Set the Tx Interrupt Delay register */
2650 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2651 /* Tx irq moderation */
bc7f75fa
AK		 2652 ew32(TADV, adapter->tx_abs_int_delay);
2653
3a3b7586
JB		 2654 if (adapter->flags2 & FLAG2_DMA_BURST) {
2655 u32 txdctl = er32(TXDCTL(0));
2656 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2657 E1000_TXDCTL_WTHRESH);
2658 /*
2659 * set up some performance related parameters to encourage the
2660 * hardware to use the bus more efficiently in bursts, depends
2661 * on the tx_int_delay to be enabled,
2662 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time
2663 * hthresh = 1 ==> prefetch when one or more available
2664 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2665 * BEWARE: this seems to work but should be considered first if
2666 * there are tx hangs or other tx related bugs
2667 */
2668 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2669 ew32(TXDCTL(0), txdctl);
2670 /* erratum work around: set txdctl the same for both queues */
2671 ew32(TXDCTL(1), txdctl);
2672 }
2673
bc7f75fa
AK		 2674 /* Program the Transmit Control Register */
2675 tctl = er32(TCTL);
2676 tctl &= ~E1000_TCTL_CT;
2677 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2678 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2679
2680 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2681 tarc = er32(TARC(0));
ad68076e
BA		 2682 /*
2683 * set the speed mode bit, we'll clear it if we're not at
2684 * gigabit link later
2685 */
bc7f75fa
AK		 2686#define SPEED_MODE_BIT (1 << 21)
2687 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2688 ew32(TARC(0), tarc);
bc7f75fa
AK		 2689 }
2690
2691 /* errata: program both queues to unweighted RR */
2692 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2693 tarc = er32(TARC(0));
bc7f75fa 2694 tarc |= 1;
e9ec2c0f
JK		 2695 ew32(TARC(0), tarc);
2696 tarc = er32(TARC(1));
bc7f75fa 2697 tarc |= 1;
e9ec2c0f 2698 ew32(TARC(1), tarc);
bc7f75fa
AK		 2699 }
2700
bc7f75fa
AK		 2701 /* Setup Transmit Descriptor Settings for eop descriptor */
2702 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2703
2704 /* only set IDE if we are delaying interrupts using the timers */
2705 if (adapter->tx_int_delay)
2706 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2707
2708 /* enable Report Status bit */
2709 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2710
2711 ew32(TCTL, tctl);
2712
edfea6e6 2713 e1000e_config_collision_dist(hw);
bc7f75fa
AK		 2714}
2715
2716/**
2717 * e1000_setup_rctl - configure the receive control registers
2718 * @adapter: Board private structure
2719 **/
2720#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2721 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2722static void e1000_setup_rctl(struct e1000_adapter *adapter)
2723{
2724 struct e1000_hw *hw = &adapter->hw;
2725 u32 rctl, rfctl;
2726 u32 psrctl = 0;
2727 u32 pages = 0;
2728
a1ce6473
BA		 2729 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2730 if (hw->mac.type == e1000_pch2lan) {
2731 s32 ret_val;
2732
2733 if (adapter->netdev->mtu > ETH_DATA_LEN)
2734 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2735 else
2736 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
2737 }
2738
bc7f75fa
AK		 2739 /* Program MC offset vector base */
2740 rctl = er32(RCTL);
2741 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2742 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2743 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2744 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2745
2746 /* Do not Store bad packets */
2747 rctl &= ~E1000_RCTL_SBP;
2748
2749 /* Enable Long Packet receive */
2750 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2751 rctl &= ~E1000_RCTL_LPE;
2752 else
2753 rctl |= E1000_RCTL_LPE;
2754
eb7c3adb
JK		 2755 /* Some systems expect that the CRC is included in SMBUS traffic. The
2756 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2757 * host memory when this is enabled
2758 */
2759 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2760 rctl |= E1000_RCTL_SECRC;
5918bd88 2761
a4f58f54
BA		 2762 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2763 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2764 u16 phy_data;
2765
2766 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2767 phy_data &= 0xfff8;
2768 phy_data |= (1 << 2);
2769 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2770
2771 e1e_rphy(hw, 22, &phy_data);
2772 phy_data &= 0x0fff;
2773 phy_data |= (1 << 14);
2774 e1e_wphy(hw, 0x10, 0x2823);
2775 e1e_wphy(hw, 0x11, 0x0003);
2776 e1e_wphy(hw, 22, phy_data);
2777 }
2778
bc7f75fa
AK		 2779 /* Setup buffer sizes */
2780 rctl &= ~E1000_RCTL_SZ_4096;
2781 rctl |= E1000_RCTL_BSEX;
2782 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2783 case 2048:
2784 default:
2785 rctl |= E1000_RCTL_SZ_2048;
2786 rctl &= ~E1000_RCTL_BSEX;
2787 break;
2788 case 4096:
2789 rctl |= E1000_RCTL_SZ_4096;
2790 break;
2791 case 8192:
2792 rctl |= E1000_RCTL_SZ_8192;
2793 break;
2794 case 16384:
2795 rctl |= E1000_RCTL_SZ_16384;
2796 break;
2797 }
2798
2799 /*
2800 * 82571 and greater support packet-split where the protocol
2801 * header is placed in skb->data and the packet data is
2802 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2803 * In the case of a non-split, skb->data is linearly filled,
2804 * followed by the page buffers. Therefore, skb->data is
2805 * sized to hold the largest protocol header.
2806 *
2807 * allocations using alloc_page take too long for regular MTU
2808 * so only enable packet split for jumbo frames
2809 *
2810 * Using pages when the page size is greater than 16k wastes
2811 * a lot of memory, since we allocate 3 pages at all times
2812 * per packet.
2813 */
bc7f75fa 2814 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
dbcb9fec 2815 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
97ac8cae 2816 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2817 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2818 else
2819 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2820
2821 if (adapter->rx_ps_pages) {
2822 /* Configure extra packet-split registers */
2823 rfctl = er32(RFCTL);
2824 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2825 /*
2826 * disable packet split support for IPv6 extension headers,
2827 * because some malformed IPv6 headers can hang the Rx
2828 */
bc7f75fa
AK		 2829 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2830 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2831
2832 ew32(RFCTL, rfctl);
2833
140a7480
AK		 2834 /* Enable Packet split descriptors */
2835 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2836
2837 psrctl |= adapter->rx_ps_bsize0 >>
2838 E1000_PSRCTL_BSIZE0_SHIFT;
2839
2840 switch (adapter->rx_ps_pages) {
2841 case 3:
2842 psrctl |= PAGE_SIZE <<
2843 E1000_PSRCTL_BSIZE3_SHIFT;
2844 case 2:
2845 psrctl |= PAGE_SIZE <<
2846 E1000_PSRCTL_BSIZE2_SHIFT;
2847 case 1:
2848 psrctl |= PAGE_SIZE >>
2849 E1000_PSRCTL_BSIZE1_SHIFT;
2850 break;
2851 }
2852
2853 ew32(PSRCTL, psrctl);
2854 }
2855
2856 ew32(RCTL, rctl);
318a94d6
JK		 2857 /* just started the receive unit, no need to restart */
2858 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2859}
2860
2861/**
2862 * e1000_configure_rx - Configure Receive Unit after Reset
2863 * @adapter: board private structure
2864 *
2865 * Configure the Rx unit of the MAC after a reset.
2866 **/
2867static void e1000_configure_rx(struct e1000_adapter *adapter)
2868{
2869 struct e1000_hw *hw = &adapter->hw;
2870 struct e1000_ring *rx_ring = adapter->rx_ring;
2871 u64 rdba;
2872 u32 rdlen, rctl, rxcsum, ctrl_ext;
2873
2874 if (adapter->rx_ps_pages) {
2875 /* this is a 32 byte descriptor */
2876 rdlen = rx_ring->count *
2877 sizeof(union e1000_rx_desc_packet_split);
2878 adapter->clean_rx = e1000_clean_rx_irq_ps;
2879 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2880 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2881 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2882 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2883 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2884 } else {
97ac8cae 2885 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2886 adapter->clean_rx = e1000_clean_rx_irq;
2887 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2888 }
2889
2890 /* disable receives while setting up the descriptors */
2891 rctl = er32(RCTL);
2892 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2893 e1e_flush();
2894 msleep(10);
2895
3a3b7586
JB		 2896 if (adapter->flags2 & FLAG2_DMA_BURST) {
2897 /*
2898 * set the writeback threshold (only takes effect if the RDTR
2899 * is set). set GRAN=1 and write back up to 0x4 worth, and
2900 * enable prefetching of 0x20 rx descriptors
2901 * granularity = 01
2902 * wthresh = 04,
2903 * hthresh = 04,
2904 * pthresh = 0x20
2905 */
2906 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
2907 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
2908
2909 /*
2910 * override the delay timers for enabling bursting, only if
2911 * the value was not set by the user via module options
2912 */
2913 if (adapter->rx_int_delay == DEFAULT_RDTR)
2914 adapter->rx_int_delay = BURST_RDTR;
2915 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
2916 adapter->rx_abs_int_delay = BURST_RADV;
2917 }
2918
bc7f75fa
AK		 2919 /* set the Receive Delay Timer Register */
2920 ew32(RDTR, adapter->rx_int_delay);
2921
2922 /* irq moderation */
2923 ew32(RADV, adapter->rx_abs_int_delay);
828bac87 2924 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
ad68076e 2925 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2926
2927 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2928 /* Auto-Mask interrupts upon ICR access */
2929 ctrl_ext |= E1000_CTRL_EXT_IAME;
2930 ew32(IAM, 0xffffffff);
2931 ew32(CTRL_EXT, ctrl_ext);
2932 e1e_flush();
2933
ad68076e
BA		 2934 /*
2935 * Setup the HW Rx Head and Tail Descriptor Pointers and
2936 * the Base and Length of the Rx Descriptor Ring
2937 */
bc7f75fa 2938 rdba = rx_ring->dma;
284901a9 2939 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2940 ew32(RDBAH, (rdba >> 32));
2941 ew32(RDLEN, rdlen);
2942 ew32(RDH, 0);
2943 ew32(RDT, 0);
2944 rx_ring->head = E1000_RDH;
2945 rx_ring->tail = E1000_RDT;
2946
2947 /* Enable Receive Checksum Offload for TCP and UDP */
2948 rxcsum = er32(RXCSUM);
2949 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2950 rxcsum |= E1000_RXCSUM_TUOFL;
2951
ad68076e
BA		 2952 /*
2953 * IPv4 payload checksum for UDP fragments must be
2954 * used in conjunction with packet-split.
2955 */
bc7f75fa
AK		 2956 if (adapter->rx_ps_pages)
2957 rxcsum |= E1000_RXCSUM_IPPCSE;
2958 } else {
2959 rxcsum &= ~E1000_RXCSUM_TUOFL;
2960 /* no need to clear IPPCSE as it defaults to 0 */
2961 }
2962 ew32(RXCSUM, rxcsum);
2963
ad68076e
BA		 2964 /*
2965 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2966 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2967 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2968 */
828bac87
BA		 2969 if ((adapter->flags & FLAG_HAS_ERT) ||
2970 (adapter->hw.mac.type == e1000_pch2lan)) {
53ec5498
BA		 2971 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2972 u32 rxdctl = er32(RXDCTL(0));
2973 ew32(RXDCTL(0), rxdctl | 0x3);
828bac87
BA		 2974 if (adapter->flags & FLAG_HAS_ERT)
2975 ew32(ERT, E1000_ERT_2048 | (1 << 13));
53ec5498
BA		 2976 /*
2977 * With jumbo frames and early-receive enabled,
2978 * excessive C-state transition latencies result in
2979 * dropped transactions.
2980 */
ed77134b 2981 pm_qos_update_request(
82f68251 2982 &adapter->netdev->pm_qos_req, 55);
53ec5498 2983 } else {
ed77134b 2984 pm_qos_update_request(
82f68251 2985 &adapter->netdev->pm_qos_req,
ed77134b 2986 PM_QOS_DEFAULT_VALUE);
53ec5498 2987 }
97ac8cae 2988 }
bc7f75fa
AK		 2989
2990 /* Enable Receives */
2991 ew32(RCTL, rctl);
2992}
2993
2994/**
e2de3eb6 2995 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2996 * @hw: pointer to the HW structure
2997 * @mc_addr_list: array of multicast addresses to program
2998 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2999 *
ab8932f3 3000 * Updates the Multicast Table Array.
bc7f75fa 3001 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 3002 **/
e2de3eb6 3003static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 3004 u32 mc_addr_count)
bc7f75fa 3005{
ab8932f3 3006 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 3007}
3008
3009/**
3010 * e1000_set_multi - Multicast and Promiscuous mode set
3011 * @netdev: network interface device structure
3012 *
3013 * The set_multi entry point is called whenever the multicast address
3014 * list or the network interface flags are updated. This routine is
3015 * responsible for configuring the hardware for proper multicast,
3016 * promiscuous mode, and all-multi behavior.
3017 **/
3018static void e1000_set_multi(struct net_device *netdev)
3019{
3020 struct e1000_adapter *adapter = netdev_priv(netdev);
3021 struct e1000_hw *hw = &adapter->hw;
22bedad3 3022 struct netdev_hw_addr *ha;
bc7f75fa
AK		 3023 u8 *mta_list;
3024 u32 rctl;
3025 int i;
3026
3027 /* Check for Promiscuous and All Multicast modes */
3028
3029 rctl = er32(RCTL);
3030
3031 if (netdev->flags & IFF_PROMISC) {
3032 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 3033 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 3034 } else {
746b9f02
PM		 3035 if (netdev->flags & IFF_ALLMULTI) {
3036 rctl |= E1000_RCTL_MPE;
3037 rctl &= ~E1000_RCTL_UPE;
3038 } else {
3039 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3040 }
78ed11a5 3041 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 3042 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 3043 }
3044
3045 ew32(RCTL, rctl);
3046
7aeef972
JP		 3047 if (!netdev_mc_empty(netdev)) {
3048 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 3049 if (!mta_list)
3050 return;
3051
3052 /* prepare a packed array of only addresses. */
7aeef972 3053 i = 0;
22bedad3
JP		 3054 netdev_for_each_mc_addr(ha, netdev)
3055 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 3056
ab8932f3 3057 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 3058 kfree(mta_list);
3059 } else {
3060 /*
3061 * if we're called from probe, we might not have
3062 * anything to do here, so clear out the list
3063 */
ab8932f3 3064 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 3065 }
3066}
3067
3068/**
ad68076e 3069 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 3070 * @adapter: private board structure
3071 **/
3072static void e1000_configure(struct e1000_adapter *adapter)
3073{
3074 e1000_set_multi(adapter->netdev);
3075
3076 e1000_restore_vlan(adapter);
cd791618 3077 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 3078
3079 e1000_configure_tx(adapter);
3080 e1000_setup_rctl(adapter);
3081 e1000_configure_rx(adapter);
ad68076e 3082 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 3083}
3084
3085/**
3086 * e1000e_power_up_phy - restore link in case the phy was powered down
3087 * @adapter: address of board private structure
3088 *
3089 * The phy may be powered down to save power and turn off link when the
3090 * driver is unloaded and wake on lan is not enabled (among others)
3091 * *** this routine MUST be followed by a call to e1000e_reset ***
3092 **/
3093void e1000e_power_up_phy(struct e1000_adapter *adapter)
3094{
17f208de
BA		 3095 if (adapter->hw.phy.ops.power_up)
3096 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 3097
3098 adapter->hw.mac.ops.setup_link(&adapter->hw);
3099}
3100
3101/**
3102 * e1000_power_down_phy - Power down the PHY
3103 *
17f208de
BA		 3104 * Power down the PHY so no link is implied when interface is down.
3105 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 3106 */
3107static void e1000_power_down_phy(struct e1000_adapter *adapter)
3108{
bc7f75fa 3109 /* WoL is enabled */
23b66e2b 3110 if (adapter->wol)
bc7f75fa
AK		 3111 return;
3112
17f208de
BA		 3113 if (adapter->hw.phy.ops.power_down)
3114 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3115}
3116
3117/**
3118 * e1000e_reset - bring the hardware into a known good state
3119 *
3120 * This function boots the hardware and enables some settings that
3121 * require a configuration cycle of the hardware - those cannot be
3122 * set/changed during runtime. After reset the device needs to be
ad68076e 3123 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3124 */
3125void e1000e_reset(struct e1000_adapter *adapter)
3126{
3127 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3128 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3129 struct e1000_hw *hw = &adapter->hw;
3130 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3131 u32 pba = adapter->pba;
bc7f75fa
AK		 3132 u16 hwm;
3133
ad68076e 3134 /* reset Packet Buffer Allocation to default */
318a94d6 3135 ew32(PBA, pba);
df762464 3136
318a94d6 3137 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3138 /*
3139 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3140 * large enough to accommodate two full transmit packets,
3141 * rounded up to the next 1KB and expressed in KB. Likewise,
3142 * the Rx FIFO should be large enough to accommodate at least
3143 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3144 * expressed in KB.
3145 */
df762464 3146 pba = er32(PBA);
bc7f75fa 3147 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3148 tx_space = pba >> 16;
bc7f75fa 3149 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3150 pba &= 0xffff;
ad68076e
BA		 3151 /*
3152 * the Tx fifo also stores 16 bytes of information about the tx
3153 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3154 */
3155 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3156 sizeof(struct e1000_tx_desc) -
3157 ETH_FCS_LEN) * 2;
3158 min_tx_space = ALIGN(min_tx_space, 1024);
3159 min_tx_space >>= 10;
3160 /* software strips receive CRC, so leave room for it */
318a94d6 3161 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3162 min_rx_space = ALIGN(min_rx_space, 1024);
3163 min_rx_space >>= 10;
3164
ad68076e
BA		 3165 /*
3166 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3167 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3168 * allocation, take space away from current Rx allocation
3169 */
df762464
AK		 3170 if ((tx_space < min_tx_space) &&
3171 ((min_tx_space - tx_space) < pba)) {
3172 pba -= min_tx_space - tx_space;
bc7f75fa 3173
ad68076e
BA		 3174 /*
3175 * if short on Rx space, Rx wins and must trump tx
3176 * adjustment or use Early Receive if available
3177 */
df762464 3178 if ((pba < min_rx_space) &&
bc7f75fa
AK		 3179 (!(adapter->flags & FLAG_HAS_ERT)))
3180 /* ERT enabled in e1000_configure_rx */
df762464 3181 pba = min_rx_space;
bc7f75fa 3182 }
df762464
AK		 3183
3184 ew32(PBA, pba);
bc7f75fa
AK		 3185 }
3186
bc7f75fa 3187
ad68076e
BA		 3188 /*
3189 * flow control settings
3190 *
38eb394e 3191 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3192 * (or the size used for early receive) above it in the Rx FIFO.
3193 * Set it to the lower of:
3194 * - 90% of the Rx FIFO size, and
3195 * - the full Rx FIFO size minus the early receive size (for parts
3196 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3197 * - the full Rx FIFO size minus one full frame
ad68076e 3198 */
d3738bb8
BA		 3199 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3200 fc->pause_time = 0xFFFF;
3201 else
3202 fc->pause_time = E1000_FC_PAUSE_TIME;
3203 fc->send_xon = 1;
3204 fc->current_mode = fc->requested_mode;
3205
3206 switch (hw->mac.type) {
3207 default:
3208 if ((adapter->flags & FLAG_HAS_ERT) &&
3209 (adapter->netdev->mtu > ETH_DATA_LEN))
3210 hwm = min(((pba << 10) * 9 / 10),
3211 ((pba << 10) - (E1000_ERT_2048 << 3)));
3212 else
3213 hwm = min(((pba << 10) * 9 / 10),
3214 ((pba << 10) - adapter->max_frame_size));
3215
3216 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3217 fc->low_water = fc->high_water - 8;
3218 break;
3219 case e1000_pchlan:
38eb394e
BA		 3220 /*
3221 * Workaround PCH LOM adapter hangs with certain network
3222 * loads. If hangs persist, try disabling Tx flow control.
3223 */
3224 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3225 fc->high_water = 0x3500;
3226 fc->low_water = 0x1500;
3227 } else {
3228 fc->high_water = 0x5000;
3229 fc->low_water = 0x3000;
3230 }
a305595b 3231 fc->refresh_time = 0x1000;
d3738bb8
BA		 3232 break;
3233 case e1000_pch2lan:
3234 fc->high_water = 0x05C20;
3235 fc->low_water = 0x05048;
3236 fc->pause_time = 0x0650;
3237 fc->refresh_time = 0x0400;
828bac87
BA		 3238 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3239 pba = 14;
3240 ew32(PBA, pba);
3241 }
d3738bb8 3242 break;
38eb394e 3243 }
bc7f75fa 3244
828bac87
BA		 3245 /*
3246 * Disable Adaptive Interrupt Moderation if 2 full packets cannot
3247 * fit in receive buffer and early-receive not supported.
3248 */
3249 if (adapter->itr_setting & 0x3) {
3250 if (((adapter->max_frame_size * 2) > (pba << 10)) &&
3251 !(adapter->flags & FLAG_HAS_ERT)) {
3252 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3253 dev_info(&adapter->pdev->dev,
3254 "Interrupt Throttle Rate turned off\n");
3255 adapter->flags2 |= FLAG2_DISABLE_AIM;
3256 ew32(ITR, 0);
3257 }
3258 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3259 dev_info(&adapter->pdev->dev,
3260 "Interrupt Throttle Rate turned on\n");
3261 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3262 adapter->itr = 20000;
3263 ew32(ITR, 1000000000 / (adapter->itr * 256));
3264 }
3265 }
3266
bc7f75fa
AK		 3267 /* Allow time for pending master requests to run */
3268 mac->ops.reset_hw(hw);
97ac8cae
BA		 3269
3270 /*
3271 * For parts with AMT enabled, let the firmware know
3272 * that the network interface is in control
3273 */
c43bc57e 3274 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 3275 e1000_get_hw_control(adapter);
3276
bc7f75fa
AK		 3277 ew32(WUC, 0);
3278
3279 if (mac->ops.init_hw(hw))
44defeb3 3280 e_err("Hardware Error\n");
bc7f75fa
AK		 3281
3282 e1000_update_mng_vlan(adapter);
3283
3284 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3285 ew32(VET, ETH_P_8021Q);
3286
3287 e1000e_reset_adaptive(hw);
3288 e1000_get_phy_info(hw);
3289
918d7197
BA		 3290 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3291 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3292 u16 phy_data = 0;
ad68076e
BA		 3293 /*
3294 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3295 * the return value of this function because there is nothing
ad68076e
BA		 3296 * different we would do if it failed
3297 */
bc7f75fa
AK		 3298 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3299 phy_data &= ~IGP02E1000_PM_SPD;
3300 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3301 }
bc7f75fa
AK		 3302}
3303
3304int e1000e_up(struct e1000_adapter *adapter)
3305{
3306 struct e1000_hw *hw = &adapter->hw;
3307
3308 /* hardware has been reset, we need to reload some things */
3309 e1000_configure(adapter);
3310
3311 clear_bit(__E1000_DOWN, &adapter->state);
3312
3313 napi_enable(&adapter->napi);
4662e82b
BA		 3314 if (adapter->msix_entries)
3315 e1000_configure_msix(adapter);
bc7f75fa
AK		 3316 e1000_irq_enable(adapter);
3317
4cb9be7a
JB		 3318 netif_wake_queue(adapter->netdev);
3319
bc7f75fa 3320 /* fire a link change interrupt to start the watchdog */
52a9b231
BA		 3321 if (adapter->msix_entries)
3322 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3323 else
3324 ew32(ICS, E1000_ICS_LSC);
3325
bc7f75fa
AK		 3326 return 0;
3327}
3328
3329void e1000e_down(struct e1000_adapter *adapter)
3330{
3331 struct net_device *netdev = adapter->netdev;
3332 struct e1000_hw *hw = &adapter->hw;
3333 u32 tctl, rctl;
3334
ad68076e
BA		 3335 /*
3336 * signal that we're down so the interrupt handler does not
3337 * reschedule our watchdog timer
3338 */
bc7f75fa
AK		 3339 set_bit(__E1000_DOWN, &adapter->state);
3340
3341 /* disable receives in the hardware */
3342 rctl = er32(RCTL);
3343 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3344 /* flush and sleep below */
3345
4cb9be7a 3346 netif_stop_queue(netdev);
bc7f75fa
AK		 3347
3348 /* disable transmits in the hardware */
3349 tctl = er32(TCTL);
3350 tctl &= ~E1000_TCTL_EN;
3351 ew32(TCTL, tctl);
3352 /* flush both disables and wait for them to finish */
3353 e1e_flush();
3354 msleep(10);
3355
3356 napi_disable(&adapter->napi);
3357 e1000_irq_disable(adapter);
3358
3359 del_timer_sync(&adapter->watchdog_timer);
3360 del_timer_sync(&adapter->phy_info_timer);
3361
bc7f75fa
AK		 3362 netif_carrier_off(netdev);
3363 adapter->link_speed = 0;
3364 adapter->link_duplex = 0;
3365
52cc3086
JK		 3366 if (!pci_channel_offline(adapter->pdev))
3367 e1000e_reset(adapter);
bc7f75fa
AK		 3368 e1000_clean_tx_ring(adapter);
3369 e1000_clean_rx_ring(adapter);
3370
3371 /*
3372 * TODO: for power management, we could drop the link and
3373 * pci_disable_device here.
3374 */
3375}
3376
3377void e1000e_reinit_locked(struct e1000_adapter *adapter)
3378{
3379 might_sleep();
3380 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3381 msleep(1);
3382 e1000e_down(adapter);
3383 e1000e_up(adapter);
3384 clear_bit(__E1000_RESETTING, &adapter->state);
3385}
3386
3387/**
3388 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3389 * @adapter: board private structure to initialize
3390 *
3391 * e1000_sw_init initializes the Adapter private data structure.
3392 * Fields are initialized based on PCI device information and
3393 * OS network device settings (MTU size).
3394 **/
3395static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3396{
bc7f75fa
AK		 3397 struct net_device *netdev = adapter->netdev;
3398
3399 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3400 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3401 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3402 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3403
4662e82b 3404 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3405
4662e82b
BA		 3406 if (e1000_alloc_queues(adapter))
3407 return -ENOMEM;
bc7f75fa 3408
bc7f75fa 3409 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3410 e1000_irq_disable(adapter);
3411
bc7f75fa
AK		 3412 set_bit(__E1000_DOWN, &adapter->state);
3413 return 0;
bc7f75fa
AK		 3414}
3415
f8d59f78
BA		 3416/**
3417 * e1000_intr_msi_test - Interrupt Handler
3418 * @irq: interrupt number
3419 * @data: pointer to a network interface device structure
3420 **/
3421static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3422{
3423 struct net_device *netdev = data;
3424 struct e1000_adapter *adapter = netdev_priv(netdev);
3425 struct e1000_hw *hw = &adapter->hw;
3426 u32 icr = er32(ICR);
3427
3bb99fe2 3428 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3429 if (icr & E1000_ICR_RXSEQ) {
3430 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3431 wmb();
3432 }
3433
3434 return IRQ_HANDLED;
3435}
3436
3437/**
3438 * e1000_test_msi_interrupt - Returns 0 for successful test
3439 * @adapter: board private struct
3440 *
3441 * code flow taken from tg3.c
3442 **/
3443static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3444{
3445 struct net_device *netdev = adapter->netdev;
3446 struct e1000_hw *hw = &adapter->hw;
3447 int err;
3448
3449 /* poll_enable hasn't been called yet, so don't need disable */
3450 /* clear any pending events */
3451 er32(ICR);
3452
3453 /* free the real vector and request a test handler */
3454 e1000_free_irq(adapter);
4662e82b 3455 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3456
3457 /* Assume that the test fails, if it succeeds then the test
3458 * MSI irq handler will unset this flag */
3459 adapter->flags |= FLAG_MSI_TEST_FAILED;
3460
3461 err = pci_enable_msi(adapter->pdev);
3462 if (err)
3463 goto msi_test_failed;
3464
a0607fd3 3465 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3466 netdev->name, netdev);
3467 if (err) {
3468 pci_disable_msi(adapter->pdev);
3469 goto msi_test_failed;
3470 }
3471
3472 wmb();
3473
3474 e1000_irq_enable(adapter);
3475
3476 /* fire an unusual interrupt on the test handler */
3477 ew32(ICS, E1000_ICS_RXSEQ);
3478 e1e_flush();
3479 msleep(50);
3480
3481 e1000_irq_disable(adapter);
3482
3483 rmb();
3484
3485 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3486 adapter->int_mode = E1000E_INT_MODE_LEGACY;
068e8a30
JD		 3487 e_info("MSI interrupt test failed, using legacy interrupt.\n");
3488 } else
3489 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78
BA		 3490
3491 free_irq(adapter->pdev->irq, netdev);
3492 pci_disable_msi(adapter->pdev);
3493
f8d59f78 3494msi_test_failed:
4662e82b 3495 e1000e_set_interrupt_capability(adapter);
068e8a30 3496 return e1000_request_irq(adapter);
f8d59f78
BA		 3497}
3498
3499/**
3500 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3501 * @adapter: board private struct
3502 *
3503 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3504 **/
3505static int e1000_test_msi(struct e1000_adapter *adapter)
3506{
3507 int err;
3508 u16 pci_cmd;
3509
3510 if (!(adapter->flags & FLAG_MSI_ENABLED))
3511 return 0;
3512
3513 /* disable SERR in case the MSI write causes a master abort */
3514 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
36f2407f
DN		 3515 if (pci_cmd & PCI_COMMAND_SERR)
3516 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3517 pci_cmd & ~PCI_COMMAND_SERR);
f8d59f78
BA		 3518
3519 err = e1000_test_msi_interrupt(adapter);
3520
36f2407f
DN		 3521 /* re-enable SERR */
3522 if (pci_cmd & PCI_COMMAND_SERR) {
3523 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3524 pci_cmd |= PCI_COMMAND_SERR;
3525 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3526 }
f8d59f78 3527
f8d59f78
BA		 3528 return err;
3529}
3530
bc7f75fa
AK		 3531/**
3532 * e1000_open - Called when a network interface is made active
3533 * @netdev: network interface device structure
3534 *
3535 * Returns 0 on success, negative value on failure
3536 *
3537 * The open entry point is called when a network interface is made
3538 * active by the system (IFF_UP). At this point all resources needed
3539 * for transmit and receive operations are allocated, the interrupt
3540 * handler is registered with the OS, the watchdog timer is started,
3541 * and the stack is notified that the interface is ready.
3542 **/
3543static int e1000_open(struct net_device *netdev)
3544{
3545 struct e1000_adapter *adapter = netdev_priv(netdev);
3546 struct e1000_hw *hw = &adapter->hw;
23606cf5 3547 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3548 int err;
3549
3550 /* disallow open during test */
3551 if (test_bit(__E1000_TESTING, &adapter->state))
3552 return -EBUSY;
3553
23606cf5
RW		 3554 pm_runtime_get_sync(&pdev->dev);
3555
9c563d20
JB		 3556 netif_carrier_off(netdev);
3557
bc7f75fa
AK		 3558 /* allocate transmit descriptors */
3559 err = e1000e_setup_tx_resources(adapter);
3560 if (err)
3561 goto err_setup_tx;
3562
3563 /* allocate receive descriptors */
3564 err = e1000e_setup_rx_resources(adapter);
3565 if (err)
3566 goto err_setup_rx;
3567
11b08be8
BA		 3568 /*
3569 * If AMT is enabled, let the firmware know that the network
3570 * interface is now open and reset the part to a known state.
3571 */
3572 if (adapter->flags & FLAG_HAS_AMT) {
3573 e1000_get_hw_control(adapter);
3574 e1000e_reset(adapter);
3575 }
3576
bc7f75fa
AK		 3577 e1000e_power_up_phy(adapter);
3578
3579 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3580 if ((adapter->hw.mng_cookie.status &
3581 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3582 e1000_update_mng_vlan(adapter);
3583
c128ec29 3584 /* DMA latency requirement to workaround early-receive/jumbo issue */
828bac87
BA		 3585 if ((adapter->flags & FLAG_HAS_ERT) ||
3586 (adapter->hw.mac.type == e1000_pch2lan))
6ba74014
LT		 3587 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3588 PM_QOS_CPU_DMA_LATENCY,
3589 PM_QOS_DEFAULT_VALUE);
c128ec29 3590
ad68076e
BA		 3591 /*
3592 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3593 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3594 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3595 * clean_rx handler before we do so.
3596 */
bc7f75fa
AK		 3597 e1000_configure(adapter);
3598
3599 err = e1000_request_irq(adapter);
3600 if (err)
3601 goto err_req_irq;
3602
f8d59f78
BA		 3603 /*
3604 * Work around PCIe errata with MSI interrupts causing some chipsets to
3605 * ignore e1000e MSI messages, which means we need to test our MSI
3606 * interrupt now
3607 */
4662e82b 3608 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3609 err = e1000_test_msi(adapter);
3610 if (err) {
3611 e_err("Interrupt allocation failed\n");
3612 goto err_req_irq;
3613 }
3614 }
3615
bc7f75fa
AK		 3616 /* From here on the code is the same as e1000e_up() */
3617 clear_bit(__E1000_DOWN, &adapter->state);
3618
3619 napi_enable(&adapter->napi);
3620
3621 e1000_irq_enable(adapter);
3622
4cb9be7a 3623 netif_start_queue(netdev);
d55b53ff 3624
23606cf5
RW		 3625 adapter->idle_check = true;
3626 pm_runtime_put(&pdev->dev);
3627
bc7f75fa 3628 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA		 3629 if (adapter->msix_entries)
3630 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3631 else
3632 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK		 3633
3634 return 0;
3635
3636err_req_irq:
3637 e1000_release_hw_control(adapter);
3638 e1000_power_down_phy(adapter);
3639 e1000e_free_rx_resources(adapter);
3640err_setup_rx:
3641 e1000e_free_tx_resources(adapter);
3642err_setup_tx:
3643 e1000e_reset(adapter);
23606cf5 3644 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3645
3646 return err;
3647}
3648
3649/**
3650 * e1000_close - Disables a network interface
3651 * @netdev: network interface device structure
3652 *
3653 * Returns 0, this is not allowed to fail
3654 *
3655 * The close entry point is called when an interface is de-activated
3656 * by the OS. The hardware is still under the drivers control, but
3657 * needs to be disabled. A global MAC reset is issued to stop the
3658 * hardware, and all transmit and receive resources are freed.
3659 **/
3660static int e1000_close(struct net_device *netdev)
3661{
3662 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3663 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3664
3665 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3666
3667 pm_runtime_get_sync(&pdev->dev);
3668
3669 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3670 e1000e_down(adapter);
3671 e1000_free_irq(adapter);
3672 }
bc7f75fa 3673 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3674
3675 e1000e_free_tx_resources(adapter);
3676 e1000e_free_rx_resources(adapter);
3677
ad68076e
BA		 3678 /*
3679 * kill manageability vlan ID if supported, but not if a vlan with
3680 * the same ID is registered on the host OS (let 8021q kill it)
3681 */
bc7f75fa
AK		 3682 if ((adapter->hw.mng_cookie.status &
3683 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3684 !(adapter->vlgrp &&
3685 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3686 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3687
ad68076e
BA		 3688 /*
3689 * If AMT is enabled, let the firmware know that the network
3690 * interface is now closed
3691 */
c43bc57e 3692 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3693 e1000_release_hw_control(adapter);
3694
828bac87
BA		 3695 if ((adapter->flags & FLAG_HAS_ERT) ||
3696 (adapter->hw.mac.type == e1000_pch2lan))
6ba74014 3697 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
c128ec29 3698
23606cf5
RW		 3699 pm_runtime_put_sync(&pdev->dev);
3700
bc7f75fa
AK		 3701 return 0;
3702}
3703/**
3704 * e1000_set_mac - Change the Ethernet Address of the NIC
3705 * @netdev: network interface device structure
3706 * @p: pointer to an address structure
3707 *
3708 * Returns 0 on success, negative on failure
3709 **/
3710static int e1000_set_mac(struct net_device *netdev, void *p)
3711{
3712 struct e1000_adapter *adapter = netdev_priv(netdev);
3713 struct sockaddr *addr = p;
3714
3715 if (!is_valid_ether_addr(addr->sa_data))
3716 return -EADDRNOTAVAIL;
3717
3718 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3719 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3720
3721 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3722
3723 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3724 /* activate the work around */
3725 e1000e_set_laa_state_82571(&adapter->hw, 1);
3726
ad68076e
BA		 3727 /*
3728 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3729 * between the time RAR[0] gets clobbered and the time it
3730 * gets fixed (in e1000_watchdog), the actual LAA is in one
3731 * of the RARs and no incoming packets directed to this port
3732 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3733 * RAR[14]
3734 */
bc7f75fa
AK		 3735 e1000e_rar_set(&adapter->hw,
3736 adapter->hw.mac.addr,
3737 adapter->hw.mac.rar_entry_count - 1);
3738 }
3739
3740 return 0;
3741}
3742
a8f88ff5
JB		 3743/**
3744 * e1000e_update_phy_task - work thread to update phy
3745 * @work: pointer to our work struct
3746 *
3747 * this worker thread exists because we must acquire a
3748 * semaphore to read the phy, which we could msleep while
3749 * waiting for it, and we can't msleep in a timer.
3750 **/
3751static void e1000e_update_phy_task(struct work_struct *work)
3752{
3753 struct e1000_adapter *adapter = container_of(work,
3754 struct e1000_adapter, update_phy_task);
3755 e1000_get_phy_info(&adapter->hw);
3756}
3757
ad68076e
BA		 3758/*
3759 * Need to wait a few seconds after link up to get diagnostic information from
3760 * the phy
3761 */
bc7f75fa
AK		 3762static void e1000_update_phy_info(unsigned long data)
3763{
3764 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3765 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3766}
3767
8c7bbb92
BA		 3768/**
3769 * e1000e_update_phy_stats - Update the PHY statistics counters
3770 * @adapter: board private structure
3771 **/
3772static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3773{
3774 struct e1000_hw *hw = &adapter->hw;
3775 s32 ret_val;
3776 u16 phy_data;
3777
3778 ret_val = hw->phy.ops.acquire(hw);
3779 if (ret_val)
3780 return;
3781
3782 hw->phy.addr = 1;
3783
3784#define HV_PHY_STATS_PAGE 778
3785 /*
3786 * A page set is expensive so check if already on desired page.
3787 * If not, set to the page with the PHY status registers.
3788 */
3789 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3790 &phy_data);
3791 if (ret_val)
3792 goto release;
3793 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) {
3794 ret_val = e1000e_write_phy_reg_mdic(hw,
3795 IGP01E1000_PHY_PAGE_SELECT,
3796 (HV_PHY_STATS_PAGE <<
3797 IGP_PAGE_SHIFT));
3798 if (ret_val)
3799 goto release;
3800 }
3801
3802 /* Read/clear the upper 16-bit registers and read/accumulate lower */
3803
3804 /* Single Collision Count */
3805 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS,
3806 &phy_data);
3807 ret_val = e1000e_read_phy_reg_mdic(hw,
3808 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS,
3809 &phy_data);
3810 if (!ret_val)
3811 adapter->stats.scc += phy_data;
3812
3813 /* Excessive Collision Count */
3814 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS,
3815 &phy_data);
3816 ret_val = e1000e_read_phy_reg_mdic(hw,
3817 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS,
3818 &phy_data);
3819 if (!ret_val)
3820 adapter->stats.ecol += phy_data;
3821
3822 /* Multiple Collision Count */
3823 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS,
3824 &phy_data);
3825 ret_val = e1000e_read_phy_reg_mdic(hw,
3826 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS,
3827 &phy_data);
3828 if (!ret_val)
3829 adapter->stats.mcc += phy_data;
3830
3831 /* Late Collision Count */
3832 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS,
3833 &phy_data);
3834 ret_val = e1000e_read_phy_reg_mdic(hw,
3835 HV_LATECOL_LOWER &
3836 MAX_PHY_REG_ADDRESS,
3837 &phy_data);
3838 if (!ret_val)
3839 adapter->stats.latecol += phy_data;
3840
3841 /* Collision Count - also used for adaptive IFS */
3842 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS,
3843 &phy_data);
3844 ret_val = e1000e_read_phy_reg_mdic(hw,
3845 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS,
3846 &phy_data);
3847 if (!ret_val)
3848 hw->mac.collision_delta = phy_data;
3849
3850 /* Defer Count */
3851 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS,
3852 &phy_data);
3853 ret_val = e1000e_read_phy_reg_mdic(hw,
3854 HV_DC_LOWER & MAX_PHY_REG_ADDRESS,
3855 &phy_data);
3856 if (!ret_val)
3857 adapter->stats.dc += phy_data;
3858
3859 /* Transmit with no CRS */
3860 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS,
3861 &phy_data);
3862 ret_val = e1000e_read_phy_reg_mdic(hw,
3863 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS,
3864 &phy_data);
3865 if (!ret_val)
3866 adapter->stats.tncrs += phy_data;
3867
3868release:
3869 hw->phy.ops.release(hw);
3870}
3871
bc7f75fa
AK		 3872/**
3873 * e1000e_update_stats - Update the board statistics counters
3874 * @adapter: board private structure
3875 **/
3876void e1000e_update_stats(struct e1000_adapter *adapter)
3877{
7274c20f 3878 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3879 struct e1000_hw *hw = &adapter->hw;
3880 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3881
3882 /*
3883 * Prevent stats update while adapter is being reset, or if the pci
3884 * connection is down.
3885 */
3886 if (adapter->link_speed == 0)
3887 return;
3888 if (pci_channel_offline(pdev))
3889 return;
3890
bc7f75fa
AK		 3891 adapter->stats.crcerrs += er32(CRCERRS);
3892 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3893 adapter->stats.gorc += er32(GORCL);
3894 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3895 adapter->stats.bprc += er32(BPRC);
3896 adapter->stats.mprc += er32(MPRC);
3897 adapter->stats.roc += er32(ROC);
3898
bc7f75fa 3899 adapter->stats.mpc += er32(MPC);
8c7bbb92
BA		 3900
3901 /* Half-duplex statistics */
3902 if (adapter->link_duplex == HALF_DUPLEX) {
3903 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
3904 e1000e_update_phy_stats(adapter);
3905 } else {
3906 adapter->stats.scc += er32(SCC);
3907 adapter->stats.ecol += er32(ECOL);
3908 adapter->stats.mcc += er32(MCC);
3909 adapter->stats.latecol += er32(LATECOL);
3910 adapter->stats.dc += er32(DC);
3911
3912 hw->mac.collision_delta = er32(COLC);
3913
3914 if ((hw->mac.type != e1000_82574) &&
3915 (hw->mac.type != e1000_82583))
3916 adapter->stats.tncrs += er32(TNCRS);
3917 }
3918 adapter->stats.colc += hw->mac.collision_delta;
a4f58f54 3919 }
8c7bbb92 3920
bc7f75fa
AK		 3921 adapter->stats.xonrxc += er32(XONRXC);
3922 adapter->stats.xontxc += er32(XONTXC);
3923 adapter->stats.xoffrxc += er32(XOFFRXC);
3924 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3925 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3926 adapter->stats.gotc += er32(GOTCL);
3927 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3928 adapter->stats.rnbc += er32(RNBC);
3929 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3930
3931 adapter->stats.mptc += er32(MPTC);
3932 adapter->stats.bptc += er32(BPTC);
3933
3934 /* used for adaptive IFS */
3935
3936 hw->mac.tx_packet_delta = er32(TPT);
3937 adapter->stats.tpt += hw->mac.tx_packet_delta;
bc7f75fa
AK		 3938
3939 adapter->stats.algnerrc += er32(ALGNERRC);
3940 adapter->stats.rxerrc += er32(RXERRC);
bc7f75fa
AK		 3941 adapter->stats.cexterr += er32(CEXTERR);
3942 adapter->stats.tsctc += er32(TSCTC);
3943 adapter->stats.tsctfc += er32(TSCTFC);
3944
bc7f75fa 3945 /* Fill out the OS statistics structure */
7274c20f
AK		 3946 netdev->stats.multicast = adapter->stats.mprc;
3947 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3948
3949 /* Rx Errors */
3950
ad68076e
BA		 3951 /*
3952 * RLEC on some newer hardware can be incorrect so build
3953 * our own version based on RUC and ROC
3954 */
7274c20f 3955 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3956 adapter->stats.crcerrs + adapter->stats.algnerrc +
3957 adapter->stats.ruc + adapter->stats.roc +
3958 adapter->stats.cexterr;
7274c20f 3959 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3960 adapter->stats.roc;
7274c20f
AK		 3961 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3962 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3963 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3964
3965 /* Tx Errors */
7274c20f 3966 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3967 adapter->stats.latecol;
7274c20f
AK		 3968 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3969 netdev->stats.tx_window_errors = adapter->stats.latecol;
3970 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3971
3972 /* Tx Dropped needs to be maintained elsewhere */
3973
bc7f75fa
AK		 3974 /* Management Stats */
3975 adapter->stats.mgptc += er32(MGTPTC);
3976 adapter->stats.mgprc += er32(MGTPRC);
3977 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3978}
3979
7c25769f
BA		 3980/**
3981 * e1000_phy_read_status - Update the PHY register status snapshot
3982 * @adapter: board private structure
3983 **/
3984static void e1000_phy_read_status(struct e1000_adapter *adapter)
3985{
3986 struct e1000_hw *hw = &adapter->hw;
3987 struct e1000_phy_regs *phy = &adapter->phy_regs;
3988 int ret_val;
7c25769f
BA		 3989
3990 if ((er32(STATUS) & E1000_STATUS_LU) &&
3991 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3992 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3993 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3994 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3995 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3996 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3997 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3998 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3999 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
4000 if (ret_val)
44defeb3 4001 e_warn("Error reading PHY register\n");
7c25769f
BA		 4002 } else {
4003 /*
4004 * Do not read PHY registers if link is not up
4005 * Set values to typical power-on defaults
4006 */
4007 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4008 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4009 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4010 BMSR_ERCAP);
4011 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4012 ADVERTISE_ALL | ADVERTISE_CSMA);
4013 phy->lpa = 0;
4014 phy->expansion = EXPANSION_ENABLENPAGE;
4015 phy->ctrl1000 = ADVERTISE_1000FULL;
4016 phy->stat1000 = 0;
4017 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4018 }
7c25769f
BA		 4019}
4020
bc7f75fa
AK		 4021static void e1000_print_link_info(struct e1000_adapter *adapter)
4022{
bc7f75fa
AK		 4023 struct e1000_hw *hw = &adapter->hw;
4024 u32 ctrl = er32(CTRL);
4025
8f12fe86
BA		 4026 /* Link status message must follow this format for user tools */
4027 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
4028 "Flow Control: %s\n",
4029 adapter->netdev->name,
44defeb3
JK		 4030 adapter->link_speed,
4031 (adapter->link_duplex == FULL_DUPLEX) ?
4032 "Full Duplex" : "Half Duplex",
4033 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
4034 "RX/TX" :
4035 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
4036 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 4037}
4038
0c6bdb30 4039static bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 4040{
4041 struct e1000_hw *hw = &adapter->hw;
4042 bool link_active = 0;
4043 s32 ret_val = 0;
4044
4045 /*
4046 * get_link_status is set on LSC (link status) interrupt or
4047 * Rx sequence error interrupt. get_link_status will stay
4048 * false until the check_for_link establishes link
4049 * for copper adapters ONLY
4050 */
4051 switch (hw->phy.media_type) {
4052 case e1000_media_type_copper:
4053 if (hw->mac.get_link_status) {
4054 ret_val = hw->mac.ops.check_for_link(hw);
4055 link_active = !hw->mac.get_link_status;
4056 } else {
4057 link_active = 1;
4058 }
4059 break;
4060 case e1000_media_type_fiber:
4061 ret_val = hw->mac.ops.check_for_link(hw);
4062 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4063 break;
4064 case e1000_media_type_internal_serdes:
4065 ret_val = hw->mac.ops.check_for_link(hw);
4066 link_active = adapter->hw.mac.serdes_has_link;
4067 break;
4068 default:
4069 case e1000_media_type_unknown:
4070 break;
4071 }
4072
4073 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4074 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4075 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 4076 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 4077 }
4078
4079 return link_active;
4080}
4081
4082static void e1000e_enable_receives(struct e1000_adapter *adapter)
4083{
4084 /* make sure the receive unit is started */
4085 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4086 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4087 struct e1000_hw *hw = &adapter->hw;
4088 u32 rctl = er32(RCTL);
4089 ew32(RCTL, rctl | E1000_RCTL_EN);
4090 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4091 }
4092}
4093
ff10e13c
CW		 4094static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4095{
4096 struct e1000_hw *hw = &adapter->hw;
4097
4098 /*
4099 * With 82574 controllers, PHY needs to be checked periodically
4100 * for hung state and reset, if two calls return true
4101 */
4102 if (e1000_check_phy_82574(hw))
4103 adapter->phy_hang_count++;
4104 else
4105 adapter->phy_hang_count = 0;
4106
4107 if (adapter->phy_hang_count > 1) {
4108 adapter->phy_hang_count = 0;
4109 schedule_work(&adapter->reset_task);
4110 }
4111}
4112
bc7f75fa
AK		 4113/**
4114 * e1000_watchdog - Timer Call-back
4115 * @data: pointer to adapter cast into an unsigned long
4116 **/
4117static void e1000_watchdog(unsigned long data)
4118{
4119 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4120
4121 /* Do the rest outside of interrupt context */
4122 schedule_work(&adapter->watchdog_task);
4123
4124 /* TODO: make this use queue_delayed_work() */
4125}
4126
4127static void e1000_watchdog_task(struct work_struct *work)
4128{
4129 struct e1000_adapter *adapter = container_of(work,
4130 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 4131 struct net_device *netdev = adapter->netdev;
4132 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 4133 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 4134 struct e1000_ring *tx_ring = adapter->tx_ring;
4135 struct e1000_hw *hw = &adapter->hw;
4136 u32 link, tctl;
bc7f75fa
AK		 4137 int tx_pending = 0;
4138
b405e8df 4139 link = e1000e_has_link(adapter);
318a94d6 4140 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 4141 /* Cancel scheduled suspend requests. */
4142 pm_runtime_resume(netdev->dev.parent);
4143
318a94d6 4144 e1000e_enable_receives(adapter);
bc7f75fa 4145 goto link_up;
bc7f75fa
AK		 4146 }
4147
4148 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4149 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4150 e1000_update_mng_vlan(adapter);
4151
bc7f75fa
AK		 4152 if (link) {
4153 if (!netif_carrier_ok(netdev)) {
4154 bool txb2b = 1;
23606cf5
RW		 4155
4156 /* Cancel scheduled suspend requests. */
4157 pm_runtime_resume(netdev->dev.parent);
4158
318a94d6 4159 /* update snapshot of PHY registers on LSC */
7c25769f 4160 e1000_phy_read_status(adapter);
bc7f75fa
AK		 4161 mac->ops.get_link_up_info(&adapter->hw,
4162 &adapter->link_speed,
4163 &adapter->link_duplex);
4164 e1000_print_link_info(adapter);
f4187b56
BA		 4165 /*
4166 * On supported PHYs, check for duplex mismatch only
4167 * if link has autonegotiated at 10/100 half
4168 */
4169 if ((hw->phy.type == e1000_phy_igp_3 ||
4170 hw->phy.type == e1000_phy_bm) &&
4171 (hw->mac.autoneg == true) &&
4172 (adapter->link_speed == SPEED_10 ||
4173 adapter->link_speed == SPEED_100) &&
4174 (adapter->link_duplex == HALF_DUPLEX)) {
4175 u16 autoneg_exp;
4176
4177 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4178
4179 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4180 e_info("Autonegotiated half duplex but"
4181 " link partner cannot autoneg. "
4182 " Try forcing full duplex if "
4183 "link gets many collisions.\n");
4184 }
4185
f49c57e1 4186 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 4187 adapter->tx_timeout_factor = 1;
4188 switch (adapter->link_speed) {
4189 case SPEED_10:
4190 txb2b = 0;
10f1b492 4191 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 4192 break;
4193 case SPEED_100:
4194 txb2b = 0;
4c86e0b9 4195 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 4196 break;
4197 }
4198
ad68076e
BA		 4199 /*
4200 * workaround: re-program speed mode bit after
4201 * link-up event
4202 */
bc7f75fa
AK		 4203 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4204 !txb2b) {
4205 u32 tarc0;
e9ec2c0f 4206 tarc0 = er32(TARC(0));
bc7f75fa 4207 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4208 ew32(TARC(0), tarc0);
bc7f75fa
AK		 4209 }
4210
ad68076e
BA		 4211 /*
4212 * disable TSO for pcie and 10/100 speeds, to avoid
4213 * some hardware issues
4214 */
bc7f75fa
AK		 4215 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4216 switch (adapter->link_speed) {
4217 case SPEED_10:
4218 case SPEED_100:
44defeb3 4219 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 4220 netdev->features &= ~NETIF_F_TSO;
4221 netdev->features &= ~NETIF_F_TSO6;
4222 break;
4223 case SPEED_1000:
4224 netdev->features |= NETIF_F_TSO;
4225 netdev->features |= NETIF_F_TSO6;
4226 break;
4227 default:
4228 /* oops */
4229 break;
4230 }
4231 }
4232
ad68076e
BA		 4233 /*
4234 * enable transmits in the hardware, need to do this
4235 * after setting TARC(0)
4236 */
bc7f75fa
AK		 4237 tctl = er32(TCTL);
4238 tctl |= E1000_TCTL_EN;
4239 ew32(TCTL, tctl);
4240
75eb0fad
BA		 4241 /*
4242 * Perform any post-link-up configuration before
4243 * reporting link up.
4244 */
4245 if (phy->ops.cfg_on_link_up)
4246 phy->ops.cfg_on_link_up(hw);
4247
bc7f75fa 4248 netif_carrier_on(netdev);
bc7f75fa
AK		 4249
4250 if (!test_bit(__E1000_DOWN, &adapter->state))
4251 mod_timer(&adapter->phy_info_timer,
4252 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4253 }
4254 } else {
4255 if (netif_carrier_ok(netdev)) {
4256 adapter->link_speed = 0;
4257 adapter->link_duplex = 0;
8f12fe86
BA		 4258 /* Link status message must follow this format */
4259 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4260 adapter->netdev->name);
bc7f75fa 4261 netif_carrier_off(netdev);
bc7f75fa
AK		 4262 if (!test_bit(__E1000_DOWN, &adapter->state))
4263 mod_timer(&adapter->phy_info_timer,
4264 round_jiffies(jiffies + 2 * HZ));
4265
4266 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4267 schedule_work(&adapter->reset_task);
23606cf5
RW		 4268 else
4269 pm_schedule_suspend(netdev->dev.parent,
4270 LINK_TIMEOUT);
bc7f75fa
AK		 4271 }
4272 }
4273
4274link_up:
4275 e1000e_update_stats(adapter);
4276
4277 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4278 adapter->tpt_old = adapter->stats.tpt;
4279 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4280 adapter->colc_old = adapter->stats.colc;
4281
7c25769f
BA		 4282 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4283 adapter->gorc_old = adapter->stats.gorc;
4284 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4285 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 4286
4287 e1000e_update_adaptive(&adapter->hw);
4288
4289 if (!netif_carrier_ok(netdev)) {
4290 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
4291 tx_ring->count);
4292 if (tx_pending) {
ad68076e
BA		 4293 /*
4294 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 4295 * but we've got queued Tx work that's never going
4296 * to get done, so reset controller to flush Tx.
ad68076e
BA		 4297 * (Do the reset outside of interrupt context).
4298 */
bc7f75fa
AK		 4299 adapter->tx_timeout_count++;
4300 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 4301 /* return immediately since reset is imminent */
4302 return;
bc7f75fa
AK		 4303 }
4304 }
4305
eab2abf5
JB		 4306 /* Simple mode for Interrupt Throttle Rate (ITR) */
4307 if (adapter->itr_setting == 4) {
4308 /*
4309 * Symmetric Tx/Rx gets a reduced ITR=2000;
4310 * Total asymmetrical Tx or Rx gets ITR=8000;
4311 * everyone else is between 2000-8000.
4312 */
4313 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4314 u32 dif = (adapter->gotc > adapter->gorc ?
4315 adapter->gotc - adapter->gorc :
4316 adapter->gorc - adapter->gotc) / 10000;
4317 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4318
4319 ew32(ITR, 1000000000 / (itr * 256));
4320 }
4321
ad68076e 4322 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4323 if (adapter->msix_entries)
4324 ew32(ICS, adapter->rx_ring->ims_val);
4325 else
4326 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 4327
4328 /* Force detection of hung controller every watchdog period */
4329 adapter->detect_tx_hung = 1;
4330
3a3b7586
JB		 4331 /* flush partial descriptors to memory before detecting tx hang */
4332 if (adapter->flags2 & FLAG2_DMA_BURST) {
4333 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4334 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4335 /*
4336 * no need to flush the writes because the timeout code does
4337 * an er32 first thing
4338 */
4339 }
4340
ad68076e
BA		 4341 /*
4342 * With 82571 controllers, LAA may be overwritten due to controller
4343 * reset from the other port. Set the appropriate LAA in RAR[0]
4344 */
bc7f75fa
AK		 4345 if (e1000e_get_laa_state_82571(hw))
4346 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4347
ff10e13c
CW		 4348 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
4349 e1000e_check_82574_phy_workaround(adapter);
4350
bc7f75fa
AK		 4351 /* Reset the timer */
4352 if (!test_bit(__E1000_DOWN, &adapter->state))
4353 mod_timer(&adapter->watchdog_timer,
4354 round_jiffies(jiffies + 2 * HZ));
4355}
4356
4357#define E1000_TX_FLAGS_CSUM 0x00000001
4358#define E1000_TX_FLAGS_VLAN 0x00000002
4359#define E1000_TX_FLAGS_TSO 0x00000004
4360#define E1000_TX_FLAGS_IPV4 0x00000008
4361#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4362#define E1000_TX_FLAGS_VLAN_SHIFT 16
4363
4364static int e1000_tso(struct e1000_adapter *adapter,
4365 struct sk_buff *skb)
4366{
4367 struct e1000_ring *tx_ring = adapter->tx_ring;
4368 struct e1000_context_desc *context_desc;
4369 struct e1000_buffer *buffer_info;
4370 unsigned int i;
4371 u32 cmd_length = 0;
4372 u16 ipcse = 0, tucse, mss;
4373 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4374 int err;
4375
3d5e33c9
BA		 4376 if (!skb_is_gso(skb))
4377 return 0;
bc7f75fa 4378
3d5e33c9
BA		 4379 if (skb_header_cloned(skb)) {
4380 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4381 if (err)
4382 return err;
bc7f75fa
AK		 4383 }
4384
3d5e33c9
BA		 4385 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4386 mss = skb_shinfo(skb)->gso_size;
4387 if (skb->protocol == htons(ETH_P_IP)) {
4388 struct iphdr *iph = ip_hdr(skb);
4389 iph->tot_len = 0;
4390 iph->check = 0;
4391 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4392 0, IPPROTO_TCP, 0);
4393 cmd_length = E1000_TXD_CMD_IP;
4394 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4395 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4396 ipv6_hdr(skb)->payload_len = 0;
4397 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4398 &ipv6_hdr(skb)->daddr,
4399 0, IPPROTO_TCP, 0);
4400 ipcse = 0;
4401 }
4402 ipcss = skb_network_offset(skb);
4403 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4404 tucss = skb_transport_offset(skb);
4405 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4406 tucse = 0;
4407
4408 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4409 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4410
4411 i = tx_ring->next_to_use;
4412 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4413 buffer_info = &tx_ring->buffer_info[i];
4414
4415 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4416 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4417 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4418 context_desc->upper_setup.tcp_fields.tucss = tucss;
4419 context_desc->upper_setup.tcp_fields.tucso = tucso;
4420 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4421 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4422 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4423 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4424
4425 buffer_info->time_stamp = jiffies;
4426 buffer_info->next_to_watch = i;
4427
4428 i++;
4429 if (i == tx_ring->count)
4430 i = 0;
4431 tx_ring->next_to_use = i;
4432
4433 return 1;
bc7f75fa
AK		 4434}
4435
4436static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4437{
4438 struct e1000_ring *tx_ring = adapter->tx_ring;
4439 struct e1000_context_desc *context_desc;
4440 struct e1000_buffer *buffer_info;
4441 unsigned int i;
4442 u8 css;
af807c82 4443 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4444 __be16 protocol;
bc7f75fa 4445
af807c82
DG		 4446 if (skb->ip_summed != CHECKSUM_PARTIAL)
4447 return 0;
bc7f75fa 4448
5f66f208
AJ		 4449 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4450 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4451 else
4452 protocol = skb->protocol;
4453
3f518390 4454 switch (protocol) {
09640e63 4455 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4456 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4457 cmd_len |= E1000_TXD_CMD_TCP;
4458 break;
09640e63 4459 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4460 /* XXX not handling all IPV6 headers */
4461 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4462 cmd_len |= E1000_TXD_CMD_TCP;
4463 break;
4464 default:
4465 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4466 e_warn("checksum_partial proto=%x!\n",
4467 be16_to_cpu(protocol));
af807c82 4468 break;
bc7f75fa
AK		 4469 }
4470
0d0b1672 4471 css = skb_checksum_start_offset(skb);
af807c82
DG		 4472
4473 i = tx_ring->next_to_use;
4474 buffer_info = &tx_ring->buffer_info[i];
4475 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4476
4477 context_desc->lower_setup.ip_config = 0;
4478 context_desc->upper_setup.tcp_fields.tucss = css;
4479 context_desc->upper_setup.tcp_fields.tucso =
4480 css + skb->csum_offset;
4481 context_desc->upper_setup.tcp_fields.tucse = 0;
4482 context_desc->tcp_seg_setup.data = 0;
4483 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4484
4485 buffer_info->time_stamp = jiffies;
4486 buffer_info->next_to_watch = i;
4487
4488 i++;
4489 if (i == tx_ring->count)
4490 i = 0;
4491 tx_ring->next_to_use = i;
4492
4493 return 1;
bc7f75fa
AK		 4494}
4495
4496#define E1000_MAX_PER_TXD 8192
4497#define E1000_MAX_TXD_PWR 12
4498
4499static int e1000_tx_map(struct e1000_adapter *adapter,
4500 struct sk_buff *skb, unsigned int first,
4501 unsigned int max_per_txd, unsigned int nr_frags,
4502 unsigned int mss)
4503{
4504 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4505 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4506 struct e1000_buffer *buffer_info;
8ddc951c 4507 unsigned int len = skb_headlen(skb);
03b1320d 4508 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4509 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4510
4511 i = tx_ring->next_to_use;
4512
4513 while (len) {
1b7719c4 4514 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4515 size = min(len, max_per_txd);
4516
bc7f75fa 4517 buffer_info->length = size;
bc7f75fa 4518 buffer_info->time_stamp = jiffies;
bc7f75fa 4519 buffer_info->next_to_watch = i;
0be3f55f
NN		 4520 buffer_info->dma = dma_map_single(&pdev->dev,
4521 skb->data + offset,
4522 size, DMA_TO_DEVICE);
03b1320d 4523 buffer_info->mapped_as_page = false;
0be3f55f 4524 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4525 goto dma_error;
bc7f75fa
AK		 4526
4527 len -= size;
4528 offset += size;
03b1320d 4529 count++;
1b7719c4
AD		 4530
4531 if (len) {
4532 i++;
4533 if (i == tx_ring->count)
4534 i = 0;
4535 }
bc7f75fa
AK		 4536 }
4537
4538 for (f = 0; f < nr_frags; f++) {
4539 struct skb_frag_struct *frag;
4540
4541 frag = &skb_shinfo(skb)->frags[f];
4542 len = frag->size;
03b1320d 4543 offset = frag->page_offset;
bc7f75fa
AK		 4544
4545 while (len) {
1b7719c4
AD		 4546 i++;
4547 if (i == tx_ring->count)
4548 i = 0;
4549
bc7f75fa
AK		 4550 buffer_info = &tx_ring->buffer_info[i];
4551 size = min(len, max_per_txd);
bc7f75fa
AK		 4552
4553 buffer_info->length = size;
4554 buffer_info->time_stamp = jiffies;
bc7f75fa 4555 buffer_info->next_to_watch = i;
0be3f55f 4556 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4557 offset, size,
0be3f55f 4558 DMA_TO_DEVICE);
03b1320d 4559 buffer_info->mapped_as_page = true;
0be3f55f 4560 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4561 goto dma_error;
bc7f75fa
AK		 4562
4563 len -= size;
4564 offset += size;
4565 count++;
bc7f75fa
AK		 4566 }
4567 }
4568
9ed318d5
TH		 4569 segs = skb_shinfo(skb)->gso_segs ?: 1;
4570 /* multiply data chunks by size of headers */
4571 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4572
bc7f75fa 4573 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4574 tx_ring->buffer_info[i].segs = segs;
4575 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4576 tx_ring->buffer_info[first].next_to_watch = i;
4577
4578 return count;
03b1320d
AD		 4579
4580dma_error:
4581 dev_err(&pdev->dev, "TX DMA map failed\n");
4582 buffer_info->dma = 0;
c1fa347f 4583 if (count)
03b1320d 4584 count--;
c1fa347f
RK		 4585
4586 while (count--) {
4587 if (i==0)
03b1320d 4588 i += tx_ring->count;
c1fa347f 4589 i--;
03b1320d 4590 buffer_info = &tx_ring->buffer_info[i];
1d51c418 4591 e1000_put_txbuf(adapter, buffer_info);
03b1320d
AD		 4592 }
4593
4594 return 0;
bc7f75fa
AK		 4595}
4596
4597static void e1000_tx_queue(struct e1000_adapter *adapter,
4598 int tx_flags, int count)
4599{
4600 struct e1000_ring *tx_ring = adapter->tx_ring;
4601 struct e1000_tx_desc *tx_desc = NULL;
4602 struct e1000_buffer *buffer_info;
4603 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4604 unsigned int i;
4605
4606 if (tx_flags & E1000_TX_FLAGS_TSO) {
4607 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4608 E1000_TXD_CMD_TSE;
4609 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4610
4611 if (tx_flags & E1000_TX_FLAGS_IPV4)
4612 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4613 }
4614
4615 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4616 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4617 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4618 }
4619
4620 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4621 txd_lower |= E1000_TXD_CMD_VLE;
4622 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4623 }
4624
4625 i = tx_ring->next_to_use;
4626
36b973df 4627 do {
bc7f75fa
AK		 4628 buffer_info = &tx_ring->buffer_info[i];
4629 tx_desc = E1000_TX_DESC(*tx_ring, i);
4630 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4631 tx_desc->lower.data =
4632 cpu_to_le32(txd_lower | buffer_info->length);
4633 tx_desc->upper.data = cpu_to_le32(txd_upper);
4634
4635 i++;
4636 if (i == tx_ring->count)
4637 i = 0;
36b973df 4638 } while (--count > 0);
bc7f75fa
AK		 4639
4640 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4641
ad68076e
BA		 4642 /*
4643 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4644 * know there are new descriptors to fetch. (Only
4645 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4646 * such as IA-64).
4647 */
bc7f75fa
AK		 4648 wmb();
4649
4650 tx_ring->next_to_use = i;
4651 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4652 /*
4653 * we need this if more than one processor can write to our tail
4654 * at a time, it synchronizes IO on IA64/Altix systems
4655 */
bc7f75fa
AK		 4656 mmiowb();
4657}
4658
4659#define MINIMUM_DHCP_PACKET_SIZE 282
4660static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4661 struct sk_buff *skb)
4662{
4663 struct e1000_hw *hw = &adapter->hw;
4664 u16 length, offset;
4665
4666 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4667 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4668 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4669 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4670 return 0;
4671 }
4672
4673 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4674 return 0;
4675
4676 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4677 return 0;
4678
4679 {
4680 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4681 struct udphdr *udp;
4682
4683 if (ip->protocol != IPPROTO_UDP)
4684 return 0;
4685
4686 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4687 if (ntohs(udp->dest) != 67)
4688 return 0;
4689
4690 offset = (u8 *)udp + 8 - skb->data;
4691 length = skb->len - offset;
4692 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4693 }
4694
4695 return 0;
4696}
4697
4698static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4699{
4700 struct e1000_adapter *adapter = netdev_priv(netdev);
4701
4702 netif_stop_queue(netdev);
ad68076e
BA		 4703 /*
4704 * Herbert's original patch had:
bc7f75fa 4705 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4706 * but since that doesn't exist yet, just open code it.
4707 */
bc7f75fa
AK		 4708 smp_mb();
4709
ad68076e
BA		 4710 /*
4711 * We need to check again in a case another CPU has just
4712 * made room available.
4713 */
bc7f75fa
AK		 4714 if (e1000_desc_unused(adapter->tx_ring) < size)
4715 return -EBUSY;
4716
4717 /* A reprieve! */
4718 netif_start_queue(netdev);
4719 ++adapter->restart_queue;
4720 return 0;
4721}
4722
4723static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4724{
4725 struct e1000_adapter *adapter = netdev_priv(netdev);
4726
4727 if (e1000_desc_unused(adapter->tx_ring) >= size)
4728 return 0;
4729 return __e1000_maybe_stop_tx(netdev, size);
4730}
4731
4732#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4733static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4734 struct net_device *netdev)
bc7f75fa
AK		 4735{
4736 struct e1000_adapter *adapter = netdev_priv(netdev);
4737 struct e1000_ring *tx_ring = adapter->tx_ring;
4738 unsigned int first;
4739 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4740 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4741 unsigned int tx_flags = 0;
e743d313 4742 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 4743 unsigned int nr_frags;
4744 unsigned int mss;
bc7f75fa
AK		 4745 int count = 0;
4746 int tso;
4747 unsigned int f;
bc7f75fa
AK		 4748
4749 if (test_bit(__E1000_DOWN, &adapter->state)) {
4750 dev_kfree_skb_any(skb);
4751 return NETDEV_TX_OK;
4752 }
4753
4754 if (skb->len <= 0) {
4755 dev_kfree_skb_any(skb);
4756 return NETDEV_TX_OK;
4757 }
4758
4759 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4760 /*
4761 * The controller does a simple calculation to
bc7f75fa
AK		 4762 * make sure there is enough room in the FIFO before
4763 * initiating the DMA for each buffer. The calc is:
4764 * 4 = ceil(buffer len/mss). To make sure we don't
4765 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4766 * drops.
4767 */
bc7f75fa
AK		 4768 if (mss) {
4769 u8 hdr_len;
4770 max_per_txd = min(mss << 2, max_per_txd);
4771 max_txd_pwr = fls(max_per_txd) - 1;
4772
ad68076e
BA		 4773 /*
4774 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4775 * points to just header, pull a few bytes of payload from
4776 * frags into skb->data
4777 */
bc7f75fa 4778 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4779 /*
4780 * we do this workaround for ES2LAN, but it is un-necessary,
4781 * avoiding it could save a lot of cycles
4782 */
4e6c709c 4783 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4784 unsigned int pull_size;
4785
4786 pull_size = min((unsigned int)4, skb->data_len);
4787 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4788 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4789 dev_kfree_skb_any(skb);
4790 return NETDEV_TX_OK;
4791 }
e743d313 4792 len = skb_headlen(skb);
bc7f75fa
AK		 4793 }
4794 }
4795
4796 /* reserve a descriptor for the offload context */
4797 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4798 count++;
4799 count++;
4800
4801 count += TXD_USE_COUNT(len, max_txd_pwr);
4802
4803 nr_frags = skb_shinfo(skb)->nr_frags;
4804 for (f = 0; f < nr_frags; f++)
4805 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4806 max_txd_pwr);
4807
4808 if (adapter->hw.mac.tx_pkt_filtering)
4809 e1000_transfer_dhcp_info(adapter, skb);
4810
ad68076e
BA		 4811 /*
4812 * need: count + 2 desc gap to keep tail from touching
4813 * head, otherwise try next time
4814 */
92af3e95 4815 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4816 return NETDEV_TX_BUSY;
bc7f75fa 4817
eab6d18d 4818 if (vlan_tx_tag_present(skb)) {
bc7f75fa
AK		 4819 tx_flags |= E1000_TX_FLAGS_VLAN;
4820 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4821 }
4822
4823 first = tx_ring->next_to_use;
4824
4825 tso = e1000_tso(adapter, skb);
4826 if (tso < 0) {
4827 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4828 return NETDEV_TX_OK;
4829 }
4830
4831 if (tso)
4832 tx_flags |= E1000_TX_FLAGS_TSO;
4833 else if (e1000_tx_csum(adapter, skb))
4834 tx_flags |= E1000_TX_FLAGS_CSUM;
4835
ad68076e
BA		 4836 /*
4837 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4838 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4839 * no longer assume, we must.
4840 */
bc7f75fa
AK		 4841 if (skb->protocol == htons(ETH_P_IP))
4842 tx_flags |= E1000_TX_FLAGS_IPV4;
4843
1b7719c4 4844 /* if count is 0 then mapping error has occured */
bc7f75fa 4845 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4846 if (count) {
4847 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4848 /* Make sure there is space in the ring for the next send. */
4849 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4850
4851 } else {
bc7f75fa 4852 dev_kfree_skb_any(skb);
1b7719c4
AD		 4853 tx_ring->buffer_info[first].time_stamp = 0;
4854 tx_ring->next_to_use = first;
bc7f75fa
AK		 4855 }
4856
bc7f75fa
AK		 4857 return NETDEV_TX_OK;
4858}
4859
4860/**
4861 * e1000_tx_timeout - Respond to a Tx Hang
4862 * @netdev: network interface device structure
4863 **/
4864static void e1000_tx_timeout(struct net_device *netdev)
4865{
4866 struct e1000_adapter *adapter = netdev_priv(netdev);
4867
4868 /* Do the reset outside of interrupt context */
4869 adapter->tx_timeout_count++;
4870 schedule_work(&adapter->reset_task);
4871}
4872
4873static void e1000_reset_task(struct work_struct *work)
4874{
4875 struct e1000_adapter *adapter;
4876 adapter = container_of(work, struct e1000_adapter, reset_task);
4877
affa9dfb
CW		 4878 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4879 (adapter->flags & FLAG_RX_RESTART_NOW))) {
4880 e1000e_dump(adapter);
4881 e_err("Reset adapter\n");
4882 }
bc7f75fa
AK		 4883 e1000e_reinit_locked(adapter);
4884}
4885
4886/**
4887 * e1000_get_stats - Get System Network Statistics
4888 * @netdev: network interface device structure
4889 *
4890 * Returns the address of the device statistics structure.
4891 * The statistics are actually updated from the timer callback.
4892 **/
4893static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4894{
bc7f75fa 4895 /* only return the current stats */
7274c20f 4896 return &netdev->stats;
bc7f75fa
AK		 4897}
4898
4899/**
4900 * e1000_change_mtu - Change the Maximum Transfer Unit
4901 * @netdev: network interface device structure
4902 * @new_mtu: new value for maximum frame size
4903 *
4904 * Returns 0 on success, negative on failure
4905 **/
4906static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4907{
4908 struct e1000_adapter *adapter = netdev_priv(netdev);
4909 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4910
2adc55c9
BA		 4911 /* Jumbo frame support */
4912 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4913 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4914 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4915 return -EINVAL;
4916 }
4917
2adc55c9
BA		 4918 /* Supported frame sizes */
4919 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4920 (max_frame > adapter->max_hw_frame_size)) {
4921 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4922 return -EINVAL;
4923 }
4924
a1ce6473
BA		 4925 /* Jumbo frame workaround on 82579 requires CRC be stripped */
4926 if ((adapter->hw.mac.type == e1000_pch2lan) &&
4927 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
4928 (new_mtu > ETH_DATA_LEN)) {
4929 e_err("Jumbo Frames not supported on 82579 when CRC "
4930 "stripping is disabled.\n");
4931 return -EINVAL;
4932 }
4933
6f461f6c
BA		 4934 /* 82573 Errata 17 */
4935 if (((adapter->hw.mac.type == e1000_82573) ||
4936 (adapter->hw.mac.type == e1000_82574)) &&
4937 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4938 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4939 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4940 }
4941
bc7f75fa
AK		 4942 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4943 msleep(1);
610c9928 4944 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4945 adapter->max_frame_size = max_frame;
610c9928
BA		 4946 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4947 netdev->mtu = new_mtu;
bc7f75fa
AK		 4948 if (netif_running(netdev))
4949 e1000e_down(adapter);
4950
ad68076e
BA		 4951 /*
4952 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4953 * means we reserve 2 more, this pushes us to allocate from the next
4954 * larger slab size.
ad68076e 4955 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4956 * However with the new *_jumbo_rx* routines, jumbo receives will use
4957 * fragmented skbs
ad68076e 4958 */
bc7f75fa 4959
9926146b 4960 if (max_frame <= 2048)
bc7f75fa
AK		 4961 adapter->rx_buffer_len = 2048;
4962 else
4963 adapter->rx_buffer_len = 4096;
4964
4965 /* adjust allocation if LPE protects us, and we aren't using SBP */
4966 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4967 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4968 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4969 + ETH_FCS_LEN;
bc7f75fa 4970
bc7f75fa
AK		 4971 if (netif_running(netdev))
4972 e1000e_up(adapter);
4973 else
4974 e1000e_reset(adapter);
4975
4976 clear_bit(__E1000_RESETTING, &adapter->state);
4977
4978 return 0;
4979}
4980
4981static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4982 int cmd)
4983{
4984 struct e1000_adapter *adapter = netdev_priv(netdev);
4985 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4986
318a94d6 4987 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4988 return -EOPNOTSUPP;
4989
4990 switch (cmd) {
4991 case SIOCGMIIPHY:
4992 data->phy_id = adapter->hw.phy.addr;
4993 break;
4994 case SIOCGMIIREG:
b16a002e
BA		 4995 e1000_phy_read_status(adapter);
4996
7c25769f
BA		 4997 switch (data->reg_num & 0x1F) {
4998 case MII_BMCR:
4999 data->val_out = adapter->phy_regs.bmcr;
5000 break;
5001 case MII_BMSR:
5002 data->val_out = adapter->phy_regs.bmsr;
5003 break;
5004 case MII_PHYSID1:
5005 data->val_out = (adapter->hw.phy.id >> 16);
5006 break;
5007 case MII_PHYSID2:
5008 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5009 break;
5010 case MII_ADVERTISE:
5011 data->val_out = adapter->phy_regs.advertise;
5012 break;
5013 case MII_LPA:
5014 data->val_out = adapter->phy_regs.lpa;
5015 break;
5016 case MII_EXPANSION:
5017 data->val_out = adapter->phy_regs.expansion;
5018 break;
5019 case MII_CTRL1000:
5020 data->val_out = adapter->phy_regs.ctrl1000;
5021 break;
5022 case MII_STAT1000:
5023 data->val_out = adapter->phy_regs.stat1000;
5024 break;
5025 case MII_ESTATUS:
5026 data->val_out = adapter->phy_regs.estatus;
5027 break;
5028 default:
bc7f75fa
AK		 5029 return -EIO;
5030 }
bc7f75fa
AK		 5031 break;
5032 case SIOCSMIIREG:
5033 default:
5034 return -EOPNOTSUPP;
5035 }
5036 return 0;
5037}
5038
5039static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5040{
5041 switch (cmd) {
5042 case SIOCGMIIPHY:
5043 case SIOCGMIIREG:
5044 case SIOCSMIIREG:
5045 return e1000_mii_ioctl(netdev, ifr, cmd);
5046 default:
5047 return -EOPNOTSUPP;
5048 }
5049}
5050
a4f58f54
BA		 5051static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5052{
5053 struct e1000_hw *hw = &adapter->hw;
5054 u32 i, mac_reg;
5055 u16 phy_reg;
5056 int retval = 0;
5057
5058 /* copy MAC RARs to PHY RARs */
d3738bb8 5059 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
a4f58f54
BA		 5060
5061 /* copy MAC MTA to PHY MTA */
5062 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5063 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5064 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
5065 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
5066 }
5067
5068 /* configure PHY Rx Control register */
5069 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
5070 mac_reg = er32(RCTL);
5071 if (mac_reg & E1000_RCTL_UPE)
5072 phy_reg |= BM_RCTL_UPE;
5073 if (mac_reg & E1000_RCTL_MPE)
5074 phy_reg |= BM_RCTL_MPE;
5075 phy_reg &= ~(BM_RCTL_MO_MASK);
5076 if (mac_reg & E1000_RCTL_MO_3)
5077 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5078 << BM_RCTL_MO_SHIFT);
5079 if (mac_reg & E1000_RCTL_BAM)
5080 phy_reg |= BM_RCTL_BAM;
5081 if (mac_reg & E1000_RCTL_PMCF)
5082 phy_reg |= BM_RCTL_PMCF;
5083 mac_reg = er32(CTRL);
5084 if (mac_reg & E1000_CTRL_RFCE)
5085 phy_reg |= BM_RCTL_RFCE;
5086 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
5087
5088 /* enable PHY wakeup in MAC register */
5089 ew32(WUFC, wufc);
5090 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5091
5092 /* configure and enable PHY wakeup in PHY registers */
5093 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
5094 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5095
5096 /* activate PHY wakeup */
94d8186a 5097 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 5098 if (retval) {
5099 e_err("Could not acquire PHY\n");
5100 return retval;
5101 }
5102 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
5103 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
5104 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
5105 if (retval) {
5106 e_err("Could not read PHY page 769\n");
5107 goto out;
5108 }
5109 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5110 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
5111 if (retval)
5112 e_err("Could not set PHY Host Wakeup bit\n");
5113out:
94d8186a 5114 hw->phy.ops.release(hw);
a4f58f54
BA		 5115
5116 return retval;
5117}
5118
23606cf5
RW		 5119static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5120 bool runtime)
bc7f75fa
AK		 5121{
5122 struct net_device *netdev = pci_get_drvdata(pdev);
5123 struct e1000_adapter *adapter = netdev_priv(netdev);
5124 struct e1000_hw *hw = &adapter->hw;
5125 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 5126 /* Runtime suspend should only enable wakeup for link changes */
5127 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 5128 int retval = 0;
5129
5130 netif_device_detach(netdev);
5131
5132 if (netif_running(netdev)) {
5133 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5134 e1000e_down(adapter);
5135 e1000_free_irq(adapter);
5136 }
4662e82b 5137 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5138
5139 retval = pci_save_state(pdev);
5140 if (retval)
5141 return retval;
5142
5143 status = er32(STATUS);
5144 if (status & E1000_STATUS_LU)
5145 wufc &= ~E1000_WUFC_LNKC;
5146
5147 if (wufc) {
5148 e1000_setup_rctl(adapter);
5149 e1000_set_multi(netdev);
5150
5151 /* turn on all-multi mode if wake on multicast is enabled */
5152 if (wufc & E1000_WUFC_MC) {
5153 rctl = er32(RCTL);
5154 rctl |= E1000_RCTL_MPE;
5155 ew32(RCTL, rctl);
5156 }
5157
5158 ctrl = er32(CTRL);
5159 /* advertise wake from D3Cold */
5160 #define E1000_CTRL_ADVD3WUC 0x00100000
5161 /* phy power management enable */
5162 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 5163 ctrl |= E1000_CTRL_ADVD3WUC;
5164 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5165 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 5166 ew32(CTRL, ctrl);
5167
318a94d6
JK		 5168 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5169 adapter->hw.phy.media_type ==
5170 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 5171 /* keep the laser running in D3 */
5172 ctrl_ext = er32(CTRL_EXT);
93a23f48 5173 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 5174 ew32(CTRL_EXT, ctrl_ext);
5175 }
5176
97ac8cae
BA		 5177 if (adapter->flags & FLAG_IS_ICH)
5178 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
5179
bc7f75fa
AK		 5180 /* Allow time for pending master requests to run */
5181 e1000e_disable_pcie_master(&adapter->hw);
5182
82776a4b 5183 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 5184 /* enable wakeup by the PHY */
5185 retval = e1000_init_phy_wakeup(adapter, wufc);
5186 if (retval)
5187 return retval;
5188 } else {
5189 /* enable wakeup by the MAC */
5190 ew32(WUFC, wufc);
5191 ew32(WUC, E1000_WUC_PME_EN);
5192 }
bc7f75fa
AK		 5193 } else {
5194 ew32(WUC, 0);
5195 ew32(WUFC, 0);
bc7f75fa
AK		 5196 }
5197
4f9de721
RW		 5198 *enable_wake = !!wufc;
5199
bc7f75fa 5200 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 5201 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5202 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 5203 *enable_wake = true;
bc7f75fa
AK		 5204
5205 if (adapter->hw.phy.type == e1000_phy_igp_3)
5206 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5207
ad68076e
BA		 5208 /*
5209 * Release control of h/w to f/w. If f/w is AMT enabled, this
5210 * would have already happened in close and is redundant.
5211 */
bc7f75fa
AK		 5212 e1000_release_hw_control(adapter);
5213
5214 pci_disable_device(pdev);
5215
4f9de721
RW		 5216 return 0;
5217}
5218
5219static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5220{
5221 if (sleep && wake) {
5222 pci_prepare_to_sleep(pdev);
5223 return;
5224 }
5225
5226 pci_wake_from_d3(pdev, wake);
5227 pci_set_power_state(pdev, PCI_D3hot);
5228}
5229
5230static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5231 bool wake)
5232{
5233 struct net_device *netdev = pci_get_drvdata(pdev);
5234 struct e1000_adapter *adapter = netdev_priv(netdev);
5235
005cbdfc
AD		 5236 /*
5237 * The pci-e switch on some quad port adapters will report a
5238 * correctable error when the MAC transitions from D0 to D3. To
5239 * prevent this we need to mask off the correctable errors on the
5240 * downstream port of the pci-e switch.
5241 */
5242 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5243 struct pci_dev *us_dev = pdev->bus->self;
5244 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5245 u16 devctl;
5246
5247 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5248 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5249 (devctl & ~PCI_EXP_DEVCTL_CERE));
5250
4f9de721 5251 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 5252
5253 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5254 } else {
4f9de721 5255 e1000_power_off(pdev, sleep, wake);
005cbdfc 5256 }
bc7f75fa
AK		 5257}
5258
6f461f6c
BA		 5259#ifdef CONFIG_PCIEASPM
5260static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5261{
5262 pci_disable_link_state(pdev, state);
5263}
5264#else
5265static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 5266{
5267 int pos;
6f461f6c 5268 u16 reg16;
1eae4eb2
AK		 5269
5270 /*
6f461f6c
BA		 5271 * Both device and parent should have the same ASPM setting.
5272 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5273 */
6f461f6c
BA		 5274 pos = pci_pcie_cap(pdev);
5275 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5276 reg16 &= ~state;
5277 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5278
0c75ba22
AB		 5279 if (!pdev->bus->self)
5280 return;
5281
6f461f6c
BA		 5282 pos = pci_pcie_cap(pdev->bus->self);
5283 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5284 reg16 &= ~state;
5285 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5286}
5287#endif
5288void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5289{
5290 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5291 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5292 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5293
5294 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5295}
5296
a0340162 5297#ifdef CONFIG_PM_OPS
23606cf5 5298static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4f9de721 5299{
23606cf5 5300 return !!adapter->tx_ring->buffer_info;
4f9de721
RW		 5301}
5302
23606cf5 5303static int __e1000_resume(struct pci_dev *pdev)
bc7f75fa
AK		 5304{
5305 struct net_device *netdev = pci_get_drvdata(pdev);
5306 struct e1000_adapter *adapter = netdev_priv(netdev);
5307 struct e1000_hw *hw = &adapter->hw;
5308 u32 err;
5309
5310 pci_set_power_state(pdev, PCI_D0);
5311 pci_restore_state(pdev);
28b8f04a 5312 pci_save_state(pdev);
6f461f6c
BA		 5313 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5314 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5315
4662e82b 5316 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5317 if (netif_running(netdev)) {
5318 err = e1000_request_irq(adapter);
5319 if (err)
5320 return err;
5321 }
5322
5323 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5324
5325 /* report the system wakeup cause from S3/S4 */
5326 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5327 u16 phy_data;
5328
5329 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5330 if (phy_data) {
5331 e_info("PHY Wakeup cause - %s\n",
5332 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5333 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5334 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5335 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5336 phy_data & E1000_WUS_LNKC ? "Link Status "
5337 " Change" : "other");
5338 }
5339 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5340 } else {
5341 u32 wus = er32(WUS);
5342 if (wus) {
5343 e_info("MAC Wakeup cause - %s\n",
5344 wus & E1000_WUS_EX ? "Unicast Packet" :
5345 wus & E1000_WUS_MC ? "Multicast Packet" :
5346 wus & E1000_WUS_BC ? "Broadcast Packet" :
5347 wus & E1000_WUS_MAG ? "Magic Packet" :
5348 wus & E1000_WUS_LNKC ? "Link Status Change" :
5349 "other");
5350 }
5351 ew32(WUS, ~0);
5352 }
5353
bc7f75fa 5354 e1000e_reset(adapter);
bc7f75fa 5355
cd791618 5356 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5357
5358 if (netif_running(netdev))
5359 e1000e_up(adapter);
5360
5361 netif_device_attach(netdev);
5362
ad68076e
BA		 5363 /*
5364 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5365 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5366 * under the control of the driver.
5367 */
c43bc57e 5368 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5369 e1000_get_hw_control(adapter);
5370
5371 return 0;
5372}
23606cf5 5373
a0340162
RW		 5374#ifdef CONFIG_PM_SLEEP
5375static int e1000_suspend(struct device *dev)
5376{
5377 struct pci_dev *pdev = to_pci_dev(dev);
5378 int retval;
5379 bool wake;
5380
5381 retval = __e1000_shutdown(pdev, &wake, false);
5382 if (!retval)
5383 e1000_complete_shutdown(pdev, true, wake);
5384
5385 return retval;
5386}
5387
23606cf5
RW		 5388static int e1000_resume(struct device *dev)
5389{
5390 struct pci_dev *pdev = to_pci_dev(dev);
5391 struct net_device *netdev = pci_get_drvdata(pdev);
5392 struct e1000_adapter *adapter = netdev_priv(netdev);
5393
5394 if (e1000e_pm_ready(adapter))
5395 adapter->idle_check = true;
5396
5397 return __e1000_resume(pdev);
5398}
a0340162
RW		 5399#endif /* CONFIG_PM_SLEEP */
5400
5401#ifdef CONFIG_PM_RUNTIME
5402static int e1000_runtime_suspend(struct device *dev)
5403{
5404 struct pci_dev *pdev = to_pci_dev(dev);
5405 struct net_device *netdev = pci_get_drvdata(pdev);
5406 struct e1000_adapter *adapter = netdev_priv(netdev);
5407
5408 if (e1000e_pm_ready(adapter)) {
5409 bool wake;
5410
5411 __e1000_shutdown(pdev, &wake, true);
5412 }
5413
5414 return 0;
5415}
5416
5417static int e1000_idle(struct device *dev)
5418{
5419 struct pci_dev *pdev = to_pci_dev(dev);
5420 struct net_device *netdev = pci_get_drvdata(pdev);
5421 struct e1000_adapter *adapter = netdev_priv(netdev);
5422
5423 if (!e1000e_pm_ready(adapter))
5424 return 0;
5425
5426 if (adapter->idle_check) {
5427 adapter->idle_check = false;
5428 if (!e1000e_has_link(adapter))
5429 pm_schedule_suspend(dev, MSEC_PER_SEC);
5430 }
5431
5432 return -EBUSY;
5433}
23606cf5
RW		 5434
5435static int e1000_runtime_resume(struct device *dev)
5436{
5437 struct pci_dev *pdev = to_pci_dev(dev);
5438 struct net_device *netdev = pci_get_drvdata(pdev);
5439 struct e1000_adapter *adapter = netdev_priv(netdev);
5440
5441 if (!e1000e_pm_ready(adapter))
5442 return 0;
5443
5444 adapter->idle_check = !dev->power.runtime_auto;
5445 return __e1000_resume(pdev);
5446}
a0340162
RW		 5447#endif /* CONFIG_PM_RUNTIME */
5448#endif /* CONFIG_PM_OPS */
bc7f75fa
AK		 5449
5450static void e1000_shutdown(struct pci_dev *pdev)
5451{
4f9de721
RW		 5452 bool wake = false;
5453
23606cf5 5454 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5455
5456 if (system_state == SYSTEM_POWER_OFF)
5457 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5458}
5459
5460#ifdef CONFIG_NET_POLL_CONTROLLER
147b2c8c
DD		 5461
5462static irqreturn_t e1000_intr_msix(int irq, void *data)
5463{
5464 struct net_device *netdev = data;
5465 struct e1000_adapter *adapter = netdev_priv(netdev);
5466 int vector, msix_irq;
5467
5468 if (adapter->msix_entries) {
5469 vector = 0;
5470 msix_irq = adapter->msix_entries[vector].vector;
5471 disable_irq(msix_irq);
5472 e1000_intr_msix_rx(msix_irq, netdev);
5473 enable_irq(msix_irq);
5474
5475 vector++;
5476 msix_irq = adapter->msix_entries[vector].vector;
5477 disable_irq(msix_irq);
5478 e1000_intr_msix_tx(msix_irq, netdev);
5479 enable_irq(msix_irq);
5480
5481 vector++;
5482 msix_irq = adapter->msix_entries[vector].vector;
5483 disable_irq(msix_irq);
5484 e1000_msix_other(msix_irq, netdev);
5485 enable_irq(msix_irq);
5486 }
5487
5488 return IRQ_HANDLED;
5489}
5490
bc7f75fa
AK		 5491/*
5492 * Polling 'interrupt' - used by things like netconsole to send skbs
5493 * without having to re-enable interrupts. It's not called while
5494 * the interrupt routine is executing.
5495 */
5496static void e1000_netpoll(struct net_device *netdev)
5497{
5498 struct e1000_adapter *adapter = netdev_priv(netdev);
5499
147b2c8c
DD		 5500 switch (adapter->int_mode) {
5501 case E1000E_INT_MODE_MSIX:
5502 e1000_intr_msix(adapter->pdev->irq, netdev);
5503 break;
5504 case E1000E_INT_MODE_MSI:
5505 disable_irq(adapter->pdev->irq);
5506 e1000_intr_msi(adapter->pdev->irq, netdev);
5507 enable_irq(adapter->pdev->irq);
5508 break;
5509 default: /* E1000E_INT_MODE_LEGACY */
5510 disable_irq(adapter->pdev->irq);
5511 e1000_intr(adapter->pdev->irq, netdev);
5512 enable_irq(adapter->pdev->irq);
5513 break;
5514 }
bc7f75fa
AK		 5515}
5516#endif
5517
5518/**
5519 * e1000_io_error_detected - called when PCI error is detected
5520 * @pdev: Pointer to PCI device
5521 * @state: The current pci connection state
5522 *
5523 * This function is called after a PCI bus error affecting
5524 * this device has been detected.
5525 */
5526static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5527 pci_channel_state_t state)
5528{
5529 struct net_device *netdev = pci_get_drvdata(pdev);
5530 struct e1000_adapter *adapter = netdev_priv(netdev);
5531
5532 netif_device_detach(netdev);
5533
c93b5a76
MM		 5534 if (state == pci_channel_io_perm_failure)
5535 return PCI_ERS_RESULT_DISCONNECT;
5536
bc7f75fa
AK		 5537 if (netif_running(netdev))
5538 e1000e_down(adapter);
5539 pci_disable_device(pdev);
5540
5541 /* Request a slot slot reset. */
5542 return PCI_ERS_RESULT_NEED_RESET;
5543}
5544
5545/**
5546 * e1000_io_slot_reset - called after the pci bus has been reset.
5547 * @pdev: Pointer to PCI device
5548 *
5549 * Restart the card from scratch, as if from a cold-boot. Implementation
5550 * resembles the first-half of the e1000_resume routine.
5551 */
5552static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5553{
5554 struct net_device *netdev = pci_get_drvdata(pdev);
5555 struct e1000_adapter *adapter = netdev_priv(netdev);
5556 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 5557 int err;
111b9dc5 5558 pci_ers_result_t result;
bc7f75fa 5559
6f461f6c
BA		 5560 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5561 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 5562 err = pci_enable_device_mem(pdev);
6e4f6f6b 5563 if (err) {
bc7f75fa
AK		 5564 dev_err(&pdev->dev,
5565 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5566 result = PCI_ERS_RESULT_DISCONNECT;
5567 } else {
5568 pci_set_master(pdev);
23606cf5 5569 pdev->state_saved = true;
111b9dc5 5570 pci_restore_state(pdev);
bc7f75fa 5571
111b9dc5
JB		 5572 pci_enable_wake(pdev, PCI_D3hot, 0);
5573 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5574
111b9dc5
JB		 5575 e1000e_reset(adapter);
5576 ew32(WUS, ~0);
5577 result = PCI_ERS_RESULT_RECOVERED;
5578 }
bc7f75fa 5579
111b9dc5
JB		 5580 pci_cleanup_aer_uncorrect_error_status(pdev);
5581
5582 return result;
bc7f75fa
AK		 5583}
5584
5585/**
5586 * e1000_io_resume - called when traffic can start flowing again.
5587 * @pdev: Pointer to PCI device
5588 *
5589 * This callback is called when the error recovery driver tells us that
5590 * its OK to resume normal operation. Implementation resembles the
5591 * second-half of the e1000_resume routine.
5592 */
5593static void e1000_io_resume(struct pci_dev *pdev)
5594{
5595 struct net_device *netdev = pci_get_drvdata(pdev);
5596 struct e1000_adapter *adapter = netdev_priv(netdev);
5597
cd791618 5598 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5599
5600 if (netif_running(netdev)) {
5601 if (e1000e_up(adapter)) {
5602 dev_err(&pdev->dev,
5603 "can't bring device back up after reset\n");
5604 return;
5605 }
5606 }
5607
5608 netif_device_attach(netdev);
5609
ad68076e
BA		 5610 /*
5611 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5612 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5613 * under the control of the driver.
5614 */
c43bc57e 5615 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5616 e1000_get_hw_control(adapter);
5617
5618}
5619
5620static void e1000_print_device_info(struct e1000_adapter *adapter)
5621{
5622 struct e1000_hw *hw = &adapter->hw;
5623 struct net_device *netdev = adapter->netdev;
073287c0
BA		 5624 u32 ret_val;
5625 u8 pba_str[E1000_PBANUM_LENGTH];
bc7f75fa
AK		 5626
5627 /* print bus type/speed/width info */
7c510e4b 5628 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 5629 /* bus width */
5630 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5631 "Width x1"),
5632 /* MAC address */
7c510e4b 5633 netdev->dev_addr);
44defeb3
JK		 5634 e_info("Intel(R) PRO/%s Network Connection\n",
5635 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
073287c0
BA		 5636 ret_val = e1000_read_pba_string_generic(hw, pba_str,
5637 E1000_PBANUM_LENGTH);
5638 if (ret_val)
5639 strcpy(pba_str, "Unknown");
5640 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
5641 hw->mac.type, hw->phy.type, pba_str);
bc7f75fa
AK		 5642}
5643
10aa4c04
AK		 5644static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5645{
5646 struct e1000_hw *hw = &adapter->hw;
5647 int ret_val;
5648 u16 buf = 0;
5649
5650 if (hw->mac.type != e1000_82573)
5651 return;
5652
5653 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5654 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5655 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 5656 dev_warn(&adapter->pdev->dev,
5657 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5658 }
10aa4c04
AK		 5659}
5660
651c2466
SH		 5661static const struct net_device_ops e1000e_netdev_ops = {
5662 .ndo_open = e1000_open,
5663 .ndo_stop = e1000_close,
00829823 5664 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 5665 .ndo_get_stats = e1000_get_stats,
5666 .ndo_set_multicast_list = e1000_set_multi,
5667 .ndo_set_mac_address = e1000_set_mac,
5668 .ndo_change_mtu = e1000_change_mtu,
5669 .ndo_do_ioctl = e1000_ioctl,
5670 .ndo_tx_timeout = e1000_tx_timeout,
5671 .ndo_validate_addr = eth_validate_addr,
5672
5673 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5674 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5675 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5676#ifdef CONFIG_NET_POLL_CONTROLLER
5677 .ndo_poll_controller = e1000_netpoll,
5678#endif
5679};
5680
bc7f75fa
AK		 5681/**
5682 * e1000_probe - Device Initialization Routine
5683 * @pdev: PCI device information struct
5684 * @ent: entry in e1000_pci_tbl
5685 *
5686 * Returns 0 on success, negative on failure
5687 *
5688 * e1000_probe initializes an adapter identified by a pci_dev structure.
5689 * The OS initialization, configuring of the adapter private structure,
5690 * and a hardware reset occur.
5691 **/
5692static int __devinit e1000_probe(struct pci_dev *pdev,
5693 const struct pci_device_id *ent)
5694{
5695 struct net_device *netdev;
5696 struct e1000_adapter *adapter;
5697 struct e1000_hw *hw;
5698 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5699 resource_size_t mmio_start, mmio_len;
5700 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5701
5702 static int cards_found;
5703 int i, err, pci_using_dac;
5704 u16 eeprom_data = 0;
5705 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5706
6f461f6c
BA		 5707 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5708 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5709
f0f422e5 5710 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5711 if (err)
5712 return err;
5713
5714 pci_using_dac = 0;
0be3f55f 5715 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5716 if (!err) {
0be3f55f 5717 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5718 if (!err)
5719 pci_using_dac = 1;
5720 } else {
0be3f55f 5721 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5722 if (err) {
0be3f55f
NN		 5723 err = dma_set_coherent_mask(&pdev->dev,
5724 DMA_BIT_MASK(32));
bc7f75fa
AK		 5725 if (err) {
5726 dev_err(&pdev->dev, "No usable DMA "
5727 "configuration, aborting\n");
5728 goto err_dma;
5729 }
5730 }
5731 }
5732
e8de1481 5733 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5734 pci_select_bars(pdev, IORESOURCE_MEM),
5735 e1000e_driver_name);
bc7f75fa
AK		 5736 if (err)
5737 goto err_pci_reg;
5738
68eac460 5739 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5740 pci_enable_pcie_error_reporting(pdev);
68eac460 5741
bc7f75fa 5742 pci_set_master(pdev);
438b365a
BA		 5743 /* PCI config space info */
5744 err = pci_save_state(pdev);
5745 if (err)
5746 goto err_alloc_etherdev;
bc7f75fa
AK		 5747
5748 err = -ENOMEM;
5749 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5750 if (!netdev)
5751 goto err_alloc_etherdev;
5752
bc7f75fa
AK		 5753 SET_NETDEV_DEV(netdev, &pdev->dev);
5754
f85e4dfa
TH		 5755 netdev->irq = pdev->irq;
5756
bc7f75fa
AK		 5757 pci_set_drvdata(pdev, netdev);
5758 adapter = netdev_priv(netdev);
5759 hw = &adapter->hw;
5760 adapter->netdev = netdev;
5761 adapter->pdev = pdev;
5762 adapter->ei = ei;
5763 adapter->pba = ei->pba;
5764 adapter->flags = ei->flags;
eb7c3adb 5765 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5766 adapter->hw.adapter = adapter;
5767 adapter->hw.mac.type = ei->mac;
2adc55c9 5768 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5769 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5770
5771 mmio_start = pci_resource_start(pdev, 0);
5772 mmio_len = pci_resource_len(pdev, 0);
5773
5774 err = -EIO;
5775 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5776 if (!adapter->hw.hw_addr)
5777 goto err_ioremap;
5778
5779 if ((adapter->flags & FLAG_HAS_FLASH) &&
5780 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5781 flash_start = pci_resource_start(pdev, 1);
5782 flash_len = pci_resource_len(pdev, 1);
5783 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5784 if (!adapter->hw.flash_address)
5785 goto err_flashmap;
5786 }
5787
5788 /* construct the net_device struct */
651c2466 5789 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5790 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5791 netdev->watchdog_timeo = 5 * HZ;
5792 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5793 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5794
5795 netdev->mem_start = mmio_start;
5796 netdev->mem_end = mmio_start + mmio_len;
5797
5798 adapter->bd_number = cards_found++;
5799
4662e82b
BA		 5800 e1000e_check_options(adapter);
5801
bc7f75fa
AK		 5802 /* setup adapter struct */
5803 err = e1000_sw_init(adapter);
5804 if (err)
5805 goto err_sw_init;
5806
bc7f75fa
AK		 5807 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5808 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5809 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5810
69e3fd8c 5811 err = ei->get_variants(adapter);
bc7f75fa
AK		 5812 if (err)
5813 goto err_hw_init;
5814
4a770358
BA		 5815 if ((adapter->flags & FLAG_IS_ICH) &&
5816 (adapter->flags & FLAG_READ_ONLY_NVM))
5817 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5818
bc7f75fa
AK		 5819 hw->mac.ops.get_bus_info(&adapter->hw);
5820
318a94d6 5821 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5822
5823 /* Copper options */
318a94d6 5824 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5825 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5826 adapter->hw.phy.disable_polarity_correction = 0;
5827 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5828 }
5829
5830 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5831 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5832
5833 netdev->features = NETIF_F_SG |
5834 NETIF_F_HW_CSUM |
5835 NETIF_F_HW_VLAN_TX |
5836 NETIF_F_HW_VLAN_RX;
5837
5838 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5839 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5840
5841 netdev->features |= NETIF_F_TSO;
5842 netdev->features |= NETIF_F_TSO6;
5843
a5136e23
JK		 5844 netdev->vlan_features |= NETIF_F_TSO;
5845 netdev->vlan_features |= NETIF_F_TSO6;
5846 netdev->vlan_features |= NETIF_F_HW_CSUM;
5847 netdev->vlan_features |= NETIF_F_SG;
5848
7b872a55 5849 if (pci_using_dac) {
bc7f75fa 5850 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 5851 netdev->vlan_features |= NETIF_F_HIGHDMA;
5852 }
bc7f75fa 5853
bc7f75fa
AK		 5854 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5855 adapter->flags |= FLAG_MNG_PT_ENABLED;
5856
ad68076e
BA		 5857 /*
5858 * before reading the NVM, reset the controller to
5859 * put the device in a known good starting state
5860 */
bc7f75fa
AK		 5861 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5862
5863 /*
5864 * systems with ASPM and others may see the checksum fail on the first
5865 * attempt. Let's give it a few tries
5866 */
5867 for (i = 0;; i++) {
5868 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5869 break;
5870 if (i == 2) {
44defeb3 5871 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5872 err = -EIO;
5873 goto err_eeprom;
5874 }
5875 }
5876
10aa4c04
AK		 5877 e1000_eeprom_checks(adapter);
5878
608f8a0d 5879 /* copy the MAC address */
bc7f75fa 5880 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5881 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5882
5883 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5884 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5885
5886 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5887 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5888 err = -EIO;
5889 goto err_eeprom;
5890 }
5891
5892 init_timer(&adapter->watchdog_timer);
c061b18d 5893 adapter->watchdog_timer.function = e1000_watchdog;
bc7f75fa
AK		 5894 adapter->watchdog_timer.data = (unsigned long) adapter;
5895
5896 init_timer(&adapter->phy_info_timer);
c061b18d 5897 adapter->phy_info_timer.function = e1000_update_phy_info;
bc7f75fa
AK		 5898 adapter->phy_info_timer.data = (unsigned long) adapter;
5899
5900 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5901 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5902 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5903 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5904 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
9633e63b 5905 INIT_WORK(&adapter->led_blink_task, e1000e_led_blink_task);
bc7f75fa 5906
bc7f75fa
AK		 5907 /* Initialize link parameters. User can change them with ethtool */
5908 adapter->hw.mac.autoneg = 1;
309af40b 5909 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5910 adapter->hw.fc.requested_mode = e1000_fc_default;
5911 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5912 adapter->hw.phy.autoneg_advertised = 0x2f;
5913
5914 /* ring size defaults */
5915 adapter->rx_ring->count = 256;
5916 adapter->tx_ring->count = 256;
5917
5918 /*
5919 * Initial Wake on LAN setting - If APM wake is enabled in
5920 * the EEPROM, enable the ACPI Magic Packet filter
5921 */
5922 if (adapter->flags & FLAG_APME_IN_WUC) {
5923 /* APME bit in EEPROM is mapped to WUC.APME */
5924 eeprom_data = er32(WUC);
5925 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5926 if (eeprom_data & E1000_WUC_PHY_WAKE)
5927 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5928 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5929 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5930 (adapter->hw.bus.func == 1))
5931 e1000_read_nvm(&adapter->hw,
5932 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5933 else
5934 e1000_read_nvm(&adapter->hw,
5935 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5936 }
5937
5938 /* fetch WoL from EEPROM */
5939 if (eeprom_data & eeprom_apme_mask)
5940 adapter->eeprom_wol |= E1000_WUFC_MAG;
5941
5942 /*
5943 * now that we have the eeprom settings, apply the special cases
5944 * where the eeprom may be wrong or the board simply won't support
5945 * wake on lan on a particular port
5946 */
5947 if (!(adapter->flags & FLAG_HAS_WOL))
5948 adapter->eeprom_wol = 0;
5949
5950 /* initialize the wol settings based on the eeprom settings */
5951 adapter->wol = adapter->eeprom_wol;
6ff68026 5952 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5953
84527590
BA		 5954 /* save off EEPROM version number */
5955 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5956
bc7f75fa
AK		 5957 /* reset the hardware with the new settings */
5958 e1000e_reset(adapter);
5959
ad68076e
BA		 5960 /*
5961 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5962 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5963 * under the control of the driver.
5964 */
c43bc57e 5965 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5966 e1000_get_hw_control(adapter);
5967
bc7f75fa
AK		 5968 strcpy(netdev->name, "eth%d");
5969 err = register_netdev(netdev);
5970 if (err)
5971 goto err_register;
5972
9c563d20
JB		 5973 /* carrier off reporting is important to ethtool even BEFORE open */
5974 netif_carrier_off(netdev);
5975
bc7f75fa
AK		 5976 e1000_print_device_info(adapter);
5977
f3ec4f87
AS		 5978 if (pci_dev_run_wake(pdev))
5979 pm_runtime_put_noidle(&pdev->dev);
23606cf5 5980
bc7f75fa
AK		 5981 return 0;
5982
5983err_register:
c43bc57e
JB		 5984 if (!(adapter->flags & FLAG_HAS_AMT))
5985 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5986err_eeprom:
5987 if (!e1000_check_reset_block(&adapter->hw))
5988 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5989err_hw_init:
bc7f75fa 5990
bc7f75fa
AK		 5991 kfree(adapter->tx_ring);
5992 kfree(adapter->rx_ring);
5993err_sw_init:
c43bc57e
JB		 5994 if (adapter->hw.flash_address)
5995 iounmap(adapter->hw.flash_address);
e82f54ba 5996 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5997err_flashmap:
bc7f75fa
AK		 5998 iounmap(adapter->hw.hw_addr);
5999err_ioremap:
6000 free_netdev(netdev);
6001err_alloc_etherdev:
f0f422e5
BA		 6002 pci_release_selected_regions(pdev,
6003 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6004err_pci_reg:
6005err_dma:
6006 pci_disable_device(pdev);
6007 return err;
6008}
6009
6010/**
6011 * e1000_remove - Device Removal Routine
6012 * @pdev: PCI device information struct
6013 *
6014 * e1000_remove is called by the PCI subsystem to alert the driver
6015 * that it should release a PCI device. The could be caused by a
6016 * Hot-Plug event, or because the driver is going to be removed from
6017 * memory.
6018 **/
6019static void __devexit e1000_remove(struct pci_dev *pdev)
6020{
6021 struct net_device *netdev = pci_get_drvdata(pdev);
6022 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 6023 bool down = test_bit(__E1000_DOWN, &adapter->state);
6024
ad68076e 6025 /*
23f333a2
TH		 6026 * The timers may be rescheduled, so explicitly disable them
6027 * from being rescheduled.
ad68076e 6028 */
23606cf5
RW		 6029 if (!down)
6030 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 6031 del_timer_sync(&adapter->watchdog_timer);
6032 del_timer_sync(&adapter->phy_info_timer);
6033
41cec6f1
BA		 6034 cancel_work_sync(&adapter->reset_task);
6035 cancel_work_sync(&adapter->watchdog_task);
6036 cancel_work_sync(&adapter->downshift_task);
6037 cancel_work_sync(&adapter->update_phy_task);
23f333a2 6038 cancel_work_sync(&adapter->led_blink_task);
41cec6f1 6039 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa 6040
17f208de
BA		 6041 if (!(netdev->flags & IFF_UP))
6042 e1000_power_down_phy(adapter);
6043
23606cf5
RW		 6044 /* Don't lie to e1000_close() down the road. */
6045 if (!down)
6046 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 6047 unregister_netdev(netdev);
6048
f3ec4f87
AS		 6049 if (pci_dev_run_wake(pdev))
6050 pm_runtime_get_noresume(&pdev->dev);
23606cf5 6051
ad68076e
BA		 6052 /*
6053 * Release control of h/w to f/w. If f/w is AMT enabled, this
6054 * would have already happened in close and is redundant.
6055 */
bc7f75fa
AK		 6056 e1000_release_hw_control(adapter);
6057
4662e82b 6058 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 6059 kfree(adapter->tx_ring);
6060 kfree(adapter->rx_ring);
6061
6062 iounmap(adapter->hw.hw_addr);
6063 if (adapter->hw.flash_address)
6064 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 6065 pci_release_selected_regions(pdev,
6066 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6067
6068 free_netdev(netdev);
6069
111b9dc5 6070 /* AER disable */
19d5afd4 6071 pci_disable_pcie_error_reporting(pdev);
111b9dc5 6072
bc7f75fa
AK		 6073 pci_disable_device(pdev);
6074}
6075
6076/* PCI Error Recovery (ERS) */
6077static struct pci_error_handlers e1000_err_handler = {
6078 .error_detected = e1000_io_error_detected,
6079 .slot_reset = e1000_io_slot_reset,
6080 .resume = e1000_io_resume,
6081};
6082
a3aa1884 6083static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 6084 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6085 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6086 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6087 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
6088 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6089 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 6090 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6091 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6092 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 6093
bc7f75fa
AK		 6094 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6095 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6096 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6097 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 6098
bc7f75fa
AK		 6099 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6101 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 6102
4662e82b 6103 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 6104 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 6105 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 6106
bc7f75fa
AK		 6107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6108 board_80003es2lan },
6109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6110 board_80003es2lan },
6111 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6112 board_80003es2lan },
6113 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6114 board_80003es2lan },
ad68076e 6115
bc7f75fa
AK		 6116 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6117 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6118 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6119 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6120 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6121 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6122 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 6123 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 6124
bc7f75fa
AK		 6125 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6126 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6127 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6128 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6129 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 6130 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 6131 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6132 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6133 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6134
6135 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6136 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6137 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 6138
f4187b56
BA		 6139 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
6140 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
10df0b91 6141 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
f4187b56 6142
a4f58f54
BA		 6143 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6144 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6145 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6146 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6147
d3738bb8
BA		 6148 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6149 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6150
bc7f75fa
AK		 6151 { } /* terminate list */
6152};
6153MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6154
a0340162 6155#ifdef CONFIG_PM_OPS
23606cf5 6156static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 6157 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6158 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6159 e1000_runtime_resume, e1000_idle)
23606cf5 6160};
e50208a0 6161#endif
23606cf5 6162
bc7f75fa
AK		 6163/* PCI Device API Driver */
6164static struct pci_driver e1000_driver = {
6165 .name = e1000e_driver_name,
6166 .id_table = e1000_pci_tbl,
6167 .probe = e1000_probe,
6168 .remove = __devexit_p(e1000_remove),
a0340162 6169#ifdef CONFIG_PM_OPS
23606cf5 6170 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 6171#endif
6172 .shutdown = e1000_shutdown,
6173 .err_handler = &e1000_err_handler
6174};
6175
6176/**
6177 * e1000_init_module - Driver Registration Routine
6178 *
6179 * e1000_init_module is the first routine called when the driver is
6180 * loaded. All it does is register with the PCI subsystem.
6181 **/
6182static int __init e1000_init_module(void)
6183{
6184 int ret;
8544b9f7
BA		 6185 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6186 e1000e_driver_version);
451152d9 6187 pr_info("Copyright (c) 1999 - 2010 Intel Corporation.\n");
bc7f75fa 6188 ret = pci_register_driver(&e1000_driver);
53ec5498 6189
bc7f75fa
AK		 6190 return ret;
6191}
6192module_init(e1000_init_module);
6193
6194/**
6195 * e1000_exit_module - Driver Exit Cleanup Routine
6196 *
6197 * e1000_exit_module is called just before the driver is removed
6198 * from memory.
6199 **/
6200static void __exit e1000_exit_module(void)
6201{
6202 pci_unregister_driver(&e1000_driver);
6203}
6204module_exit(e1000_exit_module);
6205
6206
6207MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6208MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6209MODULE_LICENSE("GPL");
6210MODULE_VERSION(DRV_VERSION);
6211
6212/* e1000_main.c */
Linux kernel - Deliverables
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