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e1000e: ensure the link state is correct for serdes links
[deliverable/linux.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
c7e54b1b 4 Copyright(c) 1999 - 2009 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/module.h>
30#include <linux/types.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/vmalloc.h>
34#include <linux/pagemap.h>
35#include <linux/delay.h>
36#include <linux/netdevice.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/mii.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
44#include <linux/cpu.h>
45#include <linux/smp.h>
97ac8cae 46#include <linux/pm_qos_params.h>
111b9dc5 47#include <linux/aer.h>
bc7f75fa
AK		 48
49#include "e1000.h"
50
3be8c940 51#define DRV_VERSION "1.0.2-k2"
bc7f75fa
AK		 52char e1000e_driver_name[] = "e1000e";
53const char e1000e_driver_version[] = DRV_VERSION;
54
55static const struct e1000_info *e1000_info_tbl[] = {
56 [board_82571] = &e1000_82571_info,
57 [board_82572] = &e1000_82572_info,
58 [board_82573] = &e1000_82573_info,
4662e82b 59 [board_82574] = &e1000_82574_info,
8c81c9c3 60 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 61 [board_80003es2lan] = &e1000_es2_info,
62 [board_ich8lan] = &e1000_ich8_info,
63 [board_ich9lan] = &e1000_ich9_info,
f4187b56 64 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 65 [board_pchlan] = &e1000_pch_info,
bc7f75fa
AK		 66};
67
bc7f75fa
AK		 68/**
69 * e1000_desc_unused - calculate if we have unused descriptors
70 **/
71static int e1000_desc_unused(struct e1000_ring *ring)
72{
73 if (ring->next_to_clean > ring->next_to_use)
74 return ring->next_to_clean - ring->next_to_use - 1;
75
76 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
77}
78
79/**
ad68076e 80 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 81 * @adapter: board private structure
82 * @status: descriptor status field as written by hardware
83 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
84 * @skb: pointer to sk_buff to be indicated to stack
85 **/
86static void e1000_receive_skb(struct e1000_adapter *adapter,
87 struct net_device *netdev,
88 struct sk_buff *skb,
a39fe742 89 u8 status, __le16 vlan)
bc7f75fa
AK		 90{
91 skb->protocol = eth_type_trans(skb, netdev);
92
93 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 94 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
95 le16_to_cpu(vlan), skb);
bc7f75fa 96 else
89c88b16 97 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 98}
99
100/**
101 * e1000_rx_checksum - Receive Checksum Offload for 82543
102 * @adapter: board private structure
103 * @status_err: receive descriptor status and error fields
104 * @csum: receive descriptor csum field
105 * @sk_buff: socket buffer with received data
106 **/
107static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
108 u32 csum, struct sk_buff *skb)
109{
110 u16 status = (u16)status_err;
111 u8 errors = (u8)(status_err >> 24);
112 skb->ip_summed = CHECKSUM_NONE;
113
114 /* Ignore Checksum bit is set */
115 if (status & E1000_RXD_STAT_IXSM)
116 return;
117 /* TCP/UDP checksum error bit is set */
118 if (errors & E1000_RXD_ERR_TCPE) {
119 /* let the stack verify checksum errors */
120 adapter->hw_csum_err++;
121 return;
122 }
123
124 /* TCP/UDP Checksum has not been calculated */
125 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
126 return;
127
128 /* It must be a TCP or UDP packet with a valid checksum */
129 if (status & E1000_RXD_STAT_TCPCS) {
130 /* TCP checksum is good */
131 skb->ip_summed = CHECKSUM_UNNECESSARY;
132 } else {
ad68076e
BA		 133 /*
134 * IP fragment with UDP payload
135 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 136 * and then put the value in host order for further stack use.
137 */
a39fe742
AV		 138 __sum16 sum = (__force __sum16)htons(csum);
139 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 140 skb->ip_summed = CHECKSUM_COMPLETE;
141 }
142 adapter->hw_csum_good++;
143}
144
145/**
146 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
147 * @adapter: address of board private structure
148 **/
149static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
150 int cleaned_count)
151{
152 struct net_device *netdev = adapter->netdev;
153 struct pci_dev *pdev = adapter->pdev;
154 struct e1000_ring *rx_ring = adapter->rx_ring;
155 struct e1000_rx_desc *rx_desc;
156 struct e1000_buffer *buffer_info;
157 struct sk_buff *skb;
158 unsigned int i;
89d71a66 159 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 160
161 i = rx_ring->next_to_use;
162 buffer_info = &rx_ring->buffer_info[i];
163
164 while (cleaned_count--) {
165 skb = buffer_info->skb;
166 if (skb) {
167 skb_trim(skb, 0);
168 goto map_skb;
169 }
170
89d71a66 171 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 172 if (!skb) {
173 /* Better luck next round */
174 adapter->alloc_rx_buff_failed++;
175 break;
176 }
177
bc7f75fa
AK		 178 buffer_info->skb = skb;
179map_skb:
180 buffer_info->dma = pci_map_single(pdev, skb->data,
181 adapter->rx_buffer_len,
182 PCI_DMA_FROMDEVICE);
8d8bb39b 183 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 184 dev_err(&pdev->dev, "RX DMA map failed\n");
185 adapter->rx_dma_failed++;
186 break;
187 }
188
189 rx_desc = E1000_RX_DESC(*rx_ring, i);
190 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
191
192 i++;
193 if (i == rx_ring->count)
194 i = 0;
195 buffer_info = &rx_ring->buffer_info[i];
196 }
197
198 if (rx_ring->next_to_use != i) {
199 rx_ring->next_to_use = i;
200 if (i-- == 0)
201 i = (rx_ring->count - 1);
202
ad68076e
BA		 203 /*
204 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 205 * know there are new descriptors to fetch. (Only
206 * applicable for weak-ordered memory model archs,
ad68076e
BA		 207 * such as IA-64).
208 */
bc7f75fa
AK		 209 wmb();
210 writel(i, adapter->hw.hw_addr + rx_ring->tail);
211 }
212}
213
214/**
215 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
216 * @adapter: address of board private structure
217 **/
218static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
219 int cleaned_count)
220{
221 struct net_device *netdev = adapter->netdev;
222 struct pci_dev *pdev = adapter->pdev;
223 union e1000_rx_desc_packet_split *rx_desc;
224 struct e1000_ring *rx_ring = adapter->rx_ring;
225 struct e1000_buffer *buffer_info;
226 struct e1000_ps_page *ps_page;
227 struct sk_buff *skb;
228 unsigned int i, j;
229
230 i = rx_ring->next_to_use;
231 buffer_info = &rx_ring->buffer_info[i];
232
233 while (cleaned_count--) {
234 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
235
236 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 237 ps_page = &buffer_info->ps_pages[j];
238 if (j >= adapter->rx_ps_pages) {
239 /* all unused desc entries get hw null ptr */
a39fe742 240 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 241 continue;
242 }
243 if (!ps_page->page) {
244 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 245 if (!ps_page->page) {
47f44e40
AK		 246 adapter->alloc_rx_buff_failed++;
247 goto no_buffers;
248 }
249 ps_page->dma = pci_map_page(pdev,
250 ps_page->page,
251 0, PAGE_SIZE,
252 PCI_DMA_FROMDEVICE);
8d8bb39b 253 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
47f44e40
AK		 254 dev_err(&adapter->pdev->dev,
255 "RX DMA page map failed\n");
256 adapter->rx_dma_failed++;
257 goto no_buffers;
bc7f75fa 258 }
bc7f75fa 259 }
47f44e40
AK		 260 /*
261 * Refresh the desc even if buffer_addrs
262 * didn't change because each write-back
263 * erases this info.
264 */
265 rx_desc->read.buffer_addr[j+1] =
266 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 267 }
268
89d71a66
ED		 269 skb = netdev_alloc_skb_ip_align(netdev,
270 adapter->rx_ps_bsize0);
bc7f75fa
AK		 271
272 if (!skb) {
273 adapter->alloc_rx_buff_failed++;
274 break;
275 }
276
bc7f75fa
AK		 277 buffer_info->skb = skb;
278 buffer_info->dma = pci_map_single(pdev, skb->data,
279 adapter->rx_ps_bsize0,
280 PCI_DMA_FROMDEVICE);
8d8bb39b 281 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 282 dev_err(&pdev->dev, "RX DMA map failed\n");
283 adapter->rx_dma_failed++;
284 /* cleanup skb */
285 dev_kfree_skb_any(skb);
286 buffer_info->skb = NULL;
287 break;
288 }
289
290 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
291
292 i++;
293 if (i == rx_ring->count)
294 i = 0;
295 buffer_info = &rx_ring->buffer_info[i];
296 }
297
298no_buffers:
299 if (rx_ring->next_to_use != i) {
300 rx_ring->next_to_use = i;
301
302 if (!(i--))
303 i = (rx_ring->count - 1);
304
ad68076e
BA		 305 /*
306 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 307 * know there are new descriptors to fetch. (Only
308 * applicable for weak-ordered memory model archs,
ad68076e
BA		 309 * such as IA-64).
310 */
bc7f75fa 311 wmb();
ad68076e
BA		 312 /*
313 * Hardware increments by 16 bytes, but packet split
bc7f75fa
AK		 314 * descriptors are 32 bytes...so we increment tail
315 * twice as much.
316 */
317 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
318 }
319}
320
97ac8cae
BA		 321/**
322 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
323 * @adapter: address of board private structure
97ac8cae
BA		 324 * @cleaned_count: number of buffers to allocate this pass
325 **/
326
327static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
328 int cleaned_count)
329{
330 struct net_device *netdev = adapter->netdev;
331 struct pci_dev *pdev = adapter->pdev;
332 struct e1000_rx_desc *rx_desc;
333 struct e1000_ring *rx_ring = adapter->rx_ring;
334 struct e1000_buffer *buffer_info;
335 struct sk_buff *skb;
336 unsigned int i;
89d71a66 337 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 338
339 i = rx_ring->next_to_use;
340 buffer_info = &rx_ring->buffer_info[i];
341
342 while (cleaned_count--) {
343 skb = buffer_info->skb;
344 if (skb) {
345 skb_trim(skb, 0);
346 goto check_page;
347 }
348
89d71a66 349 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 350 if (unlikely(!skb)) {
351 /* Better luck next round */
352 adapter->alloc_rx_buff_failed++;
353 break;
354 }
355
97ac8cae
BA		 356 buffer_info->skb = skb;
357check_page:
358 /* allocate a new page if necessary */
359 if (!buffer_info->page) {
360 buffer_info->page = alloc_page(GFP_ATOMIC);
361 if (unlikely(!buffer_info->page)) {
362 adapter->alloc_rx_buff_failed++;
363 break;
364 }
365 }
366
367 if (!buffer_info->dma)
368 buffer_info->dma = pci_map_page(pdev,
369 buffer_info->page, 0,
370 PAGE_SIZE,
371 PCI_DMA_FROMDEVICE);
372
373 rx_desc = E1000_RX_DESC(*rx_ring, i);
374 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
375
376 if (unlikely(++i == rx_ring->count))
377 i = 0;
378 buffer_info = &rx_ring->buffer_info[i];
379 }
380
381 if (likely(rx_ring->next_to_use != i)) {
382 rx_ring->next_to_use = i;
383 if (unlikely(i-- == 0))
384 i = (rx_ring->count - 1);
385
386 /* Force memory writes to complete before letting h/w
387 * know there are new descriptors to fetch. (Only
388 * applicable for weak-ordered memory model archs,
389 * such as IA-64). */
390 wmb();
391 writel(i, adapter->hw.hw_addr + rx_ring->tail);
392 }
393}
394
bc7f75fa
AK		 395/**
396 * e1000_clean_rx_irq - Send received data up the network stack; legacy
397 * @adapter: board private structure
398 *
399 * the return value indicates whether actual cleaning was done, there
400 * is no guarantee that everything was cleaned
401 **/
402static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
403 int *work_done, int work_to_do)
404{
405 struct net_device *netdev = adapter->netdev;
406 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 407 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 408 struct e1000_ring *rx_ring = adapter->rx_ring;
409 struct e1000_rx_desc *rx_desc, *next_rxd;
410 struct e1000_buffer *buffer_info, *next_buffer;
411 u32 length;
412 unsigned int i;
413 int cleaned_count = 0;
414 bool cleaned = 0;
415 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
416
417 i = rx_ring->next_to_clean;
418 rx_desc = E1000_RX_DESC(*rx_ring, i);
419 buffer_info = &rx_ring->buffer_info[i];
420
421 while (rx_desc->status & E1000_RXD_STAT_DD) {
422 struct sk_buff *skb;
423 u8 status;
424
425 if (*work_done >= work_to_do)
426 break;
427 (*work_done)++;
428
429 status = rx_desc->status;
430 skb = buffer_info->skb;
431 buffer_info->skb = NULL;
432
433 prefetch(skb->data - NET_IP_ALIGN);
434
435 i++;
436 if (i == rx_ring->count)
437 i = 0;
438 next_rxd = E1000_RX_DESC(*rx_ring, i);
439 prefetch(next_rxd);
440
441 next_buffer = &rx_ring->buffer_info[i];
442
443 cleaned = 1;
444 cleaned_count++;
445 pci_unmap_single(pdev,
446 buffer_info->dma,
447 adapter->rx_buffer_len,
448 PCI_DMA_FROMDEVICE);
449 buffer_info->dma = 0;
450
451 length = le16_to_cpu(rx_desc->length);
452
453 /* !EOP means multiple descriptors were used to store a single
454 * packet, also make sure the frame isn't just CRC only */
455 if (!(status & E1000_RXD_STAT_EOP) || (length <= 4)) {
456 /* All receives must fit into a single buffer */
3bb99fe2 457 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 458 /* recycle */
459 buffer_info->skb = skb;
460 goto next_desc;
461 }
462
463 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
464 /* recycle */
465 buffer_info->skb = skb;
466 goto next_desc;
467 }
468
eb7c3adb
JK		 469 /* adjust length to remove Ethernet CRC */
470 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
471 length -= 4;
472
bc7f75fa
AK		 473 total_rx_bytes += length;
474 total_rx_packets++;
475
ad68076e
BA		 476 /*
477 * code added for copybreak, this should improve
bc7f75fa 478 * performance for small packets with large amounts
ad68076e
BA		 479 * of reassembly being done in the stack
480 */
bc7f75fa
AK		 481 if (length < copybreak) {
482 struct sk_buff *new_skb =
89d71a66 483 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 484 if (new_skb) {
808ff676
BA		 485 skb_copy_to_linear_data_offset(new_skb,
486 -NET_IP_ALIGN,
487 (skb->data -
488 NET_IP_ALIGN),
489 (length +
490 NET_IP_ALIGN));
bc7f75fa
AK		 491 /* save the skb in buffer_info as good */
492 buffer_info->skb = skb;
493 skb = new_skb;
494 }
495 /* else just continue with the old one */
496 }
497 /* end copybreak code */
498 skb_put(skb, length);
499
500 /* Receive Checksum Offload */
501 e1000_rx_checksum(adapter,
502 (u32)(status) |
503 ((u32)(rx_desc->errors) << 24),
504 le16_to_cpu(rx_desc->csum), skb);
505
506 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
507
508next_desc:
509 rx_desc->status = 0;
510
511 /* return some buffers to hardware, one at a time is too slow */
512 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
513 adapter->alloc_rx_buf(adapter, cleaned_count);
514 cleaned_count = 0;
515 }
516
517 /* use prefetched values */
518 rx_desc = next_rxd;
519 buffer_info = next_buffer;
520 }
521 rx_ring->next_to_clean = i;
522
523 cleaned_count = e1000_desc_unused(rx_ring);
524 if (cleaned_count)
525 adapter->alloc_rx_buf(adapter, cleaned_count);
526
bc7f75fa 527 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 528 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 529 netdev->stats.rx_bytes += total_rx_bytes;
530 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 531 return cleaned;
532}
533
bc7f75fa
AK		 534static void e1000_put_txbuf(struct e1000_adapter *adapter,
535 struct e1000_buffer *buffer_info)
536{
8ddc951c 537 buffer_info->dma = 0;
bc7f75fa 538 if (buffer_info->skb) {
8ddc951c
JB		 539 skb_dma_unmap(&adapter->pdev->dev, buffer_info->skb,
540 DMA_TO_DEVICE);
bc7f75fa
AK		 541 dev_kfree_skb_any(buffer_info->skb);
542 buffer_info->skb = NULL;
543 }
1b7719c4 544 buffer_info->time_stamp = 0;
bc7f75fa
AK		 545}
546
41cec6f1 547static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 548{
41cec6f1
BA		 549 struct e1000_adapter *adapter = container_of(work,
550 struct e1000_adapter,
551 print_hang_task);
bc7f75fa
AK		 552 struct e1000_ring *tx_ring = adapter->tx_ring;
553 unsigned int i = tx_ring->next_to_clean;
554 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
555 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 556 struct e1000_hw *hw = &adapter->hw;
557 u16 phy_status, phy_1000t_status, phy_ext_status;
558 u16 pci_status;
559
560 e1e_rphy(hw, PHY_STATUS, &phy_status);
561 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
562 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 563
41cec6f1
BA		 564 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
565
566 /* detected Hardware unit hang */
567 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 568 " TDH <%x>\n"
569 " TDT <%x>\n"
570 " next_to_use <%x>\n"
571 " next_to_clean <%x>\n"
572 "buffer_info[next_to_clean]:\n"
573 " time_stamp <%lx>\n"
574 " next_to_watch <%x>\n"
575 " jiffies <%lx>\n"
41cec6f1
BA		 576 " next_to_watch.status <%x>\n"
577 "MAC Status <%x>\n"
578 "PHY Status <%x>\n"
579 "PHY 1000BASE-T Status <%x>\n"
580 "PHY Extended Status <%x>\n"
581 "PCI Status <%x>\n",
44defeb3
JK		 582 readl(adapter->hw.hw_addr + tx_ring->head),
583 readl(adapter->hw.hw_addr + tx_ring->tail),
584 tx_ring->next_to_use,
585 tx_ring->next_to_clean,
586 tx_ring->buffer_info[eop].time_stamp,
587 eop,
588 jiffies,
41cec6f1
BA		 589 eop_desc->upper.fields.status,
590 er32(STATUS),
591 phy_status,
592 phy_1000t_status,
593 phy_ext_status,
594 pci_status);
bc7f75fa
AK		 595}
596
597/**
598 * e1000_clean_tx_irq - Reclaim resources after transmit completes
599 * @adapter: board private structure
600 *
601 * the return value indicates whether actual cleaning was done, there
602 * is no guarantee that everything was cleaned
603 **/
604static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
605{
606 struct net_device *netdev = adapter->netdev;
607 struct e1000_hw *hw = &adapter->hw;
608 struct e1000_ring *tx_ring = adapter->tx_ring;
609 struct e1000_tx_desc *tx_desc, *eop_desc;
610 struct e1000_buffer *buffer_info;
611 unsigned int i, eop;
612 unsigned int count = 0;
bc7f75fa
AK		 613 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
614
615 i = tx_ring->next_to_clean;
616 eop = tx_ring->buffer_info[i].next_to_watch;
617 eop_desc = E1000_TX_DESC(*tx_ring, eop);
618
12d04a3c
AD		 619 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
620 (count < tx_ring->count)) {
a86043c2
JB		 621 bool cleaned = false;
622 for (; !cleaned; count++) {
bc7f75fa
AK		 623 tx_desc = E1000_TX_DESC(*tx_ring, i);
624 buffer_info = &tx_ring->buffer_info[i];
625 cleaned = (i == eop);
626
627 if (cleaned) {
628 struct sk_buff *skb = buffer_info->skb;
629 unsigned int segs, bytecount;
630 segs = skb_shinfo(skb)->gso_segs ?: 1;
631 /* multiply data chunks by size of headers */
632 bytecount = ((segs - 1) * skb_headlen(skb)) +
633 skb->len;
634 total_tx_packets += segs;
635 total_tx_bytes += bytecount;
636 }
637
638 e1000_put_txbuf(adapter, buffer_info);
639 tx_desc->upper.data = 0;
640
641 i++;
642 if (i == tx_ring->count)
643 i = 0;
644 }
645
646 eop = tx_ring->buffer_info[i].next_to_watch;
647 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 648 }
649
650 tx_ring->next_to_clean = i;
651
652#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 653 if (count && netif_carrier_ok(netdev) &&
654 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 655 /* Make sure that anybody stopping the queue after this
656 * sees the new next_to_clean.
657 */
658 smp_mb();
659
660 if (netif_queue_stopped(netdev) &&
661 !(test_bit(__E1000_DOWN, &adapter->state))) {
662 netif_wake_queue(netdev);
663 ++adapter->restart_queue;
664 }
665 }
666
667 if (adapter->detect_tx_hung) {
41cec6f1
BA		 668 /*
669 * Detect a transmit hang in hardware, this serializes the
670 * check with the clearing of time_stamp and movement of i
671 */
bc7f75fa 672 adapter->detect_tx_hung = 0;
12d04a3c
AD		 673 if (tx_ring->buffer_info[i].time_stamp &&
674 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
bc7f75fa 675 + (adapter->tx_timeout_factor * HZ))
ad68076e 676 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 677 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 678 netif_stop_queue(netdev);
679 }
680 }
681 adapter->total_tx_bytes += total_tx_bytes;
682 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 683 netdev->stats.tx_bytes += total_tx_bytes;
684 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 685 return (count < tx_ring->count);
bc7f75fa
AK		 686}
687
bc7f75fa
AK		 688/**
689 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
690 * @adapter: board private structure
691 *
692 * the return value indicates whether actual cleaning was done, there
693 * is no guarantee that everything was cleaned
694 **/
695static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
696 int *work_done, int work_to_do)
697{
3bb99fe2 698 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 699 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
700 struct net_device *netdev = adapter->netdev;
701 struct pci_dev *pdev = adapter->pdev;
702 struct e1000_ring *rx_ring = adapter->rx_ring;
703 struct e1000_buffer *buffer_info, *next_buffer;
704 struct e1000_ps_page *ps_page;
705 struct sk_buff *skb;
706 unsigned int i, j;
707 u32 length, staterr;
708 int cleaned_count = 0;
709 bool cleaned = 0;
710 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
711
712 i = rx_ring->next_to_clean;
713 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
714 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
715 buffer_info = &rx_ring->buffer_info[i];
716
717 while (staterr & E1000_RXD_STAT_DD) {
718 if (*work_done >= work_to_do)
719 break;
720 (*work_done)++;
721 skb = buffer_info->skb;
722
723 /* in the packet split case this is header only */
724 prefetch(skb->data - NET_IP_ALIGN);
725
726 i++;
727 if (i == rx_ring->count)
728 i = 0;
729 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
730 prefetch(next_rxd);
731
732 next_buffer = &rx_ring->buffer_info[i];
733
734 cleaned = 1;
735 cleaned_count++;
736 pci_unmap_single(pdev, buffer_info->dma,
737 adapter->rx_ps_bsize0,
738 PCI_DMA_FROMDEVICE);
739 buffer_info->dma = 0;
740
741 if (!(staterr & E1000_RXD_STAT_EOP)) {
3bb99fe2
BA		 742 e_dbg("Packet Split buffers didn't pick up the full "
743 "packet\n");
bc7f75fa
AK		 744 dev_kfree_skb_irq(skb);
745 goto next_desc;
746 }
747
748 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
749 dev_kfree_skb_irq(skb);
750 goto next_desc;
751 }
752
753 length = le16_to_cpu(rx_desc->wb.middle.length0);
754
755 if (!length) {
3bb99fe2
BA		 756 e_dbg("Last part of the packet spanning multiple "
757 "descriptors\n");
bc7f75fa
AK		 758 dev_kfree_skb_irq(skb);
759 goto next_desc;
760 }
761
762 /* Good Receive */
763 skb_put(skb, length);
764
765 {
ad68076e
BA		 766 /*
767 * this looks ugly, but it seems compiler issues make it
768 * more efficient than reusing j
769 */
bc7f75fa
AK		 770 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
771
ad68076e
BA		 772 /*
773 * page alloc/put takes too long and effects small packet
774 * throughput, so unsplit small packets and save the alloc/put
775 * only valid in softirq (napi) context to call kmap_*
776 */
bc7f75fa
AK		 777 if (l1 && (l1 <= copybreak) &&
778 ((length + l1) <= adapter->rx_ps_bsize0)) {
779 u8 *vaddr;
780
47f44e40 781 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 782
ad68076e
BA		 783 /*
784 * there is no documentation about how to call
bc7f75fa 785 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 786 * very long
787 */
bc7f75fa
AK		 788 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
789 PAGE_SIZE, PCI_DMA_FROMDEVICE);
790 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
791 memcpy(skb_tail_pointer(skb), vaddr, l1);
792 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
793 pci_dma_sync_single_for_device(pdev, ps_page->dma,
794 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 795
eb7c3adb
JK		 796 /* remove the CRC */
797 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
798 l1 -= 4;
799
bc7f75fa
AK		 800 skb_put(skb, l1);
801 goto copydone;
802 } /* if */
803 }
804
805 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
806 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
807 if (!length)
808 break;
809
47f44e40 810 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 811 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
812 PCI_DMA_FROMDEVICE);
813 ps_page->dma = 0;
814 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
815 ps_page->page = NULL;
816 skb->len += length;
817 skb->data_len += length;
818 skb->truesize += length;
819 }
820
eb7c3adb
JK		 821 /* strip the ethernet crc, problem is we're using pages now so
822 * this whole operation can get a little cpu intensive
823 */
824 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
825 pskb_trim(skb, skb->len - 4);
826
bc7f75fa
AK		 827copydone:
828 total_rx_bytes += skb->len;
829 total_rx_packets++;
830
831 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
832 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
833
834 if (rx_desc->wb.upper.header_status &
835 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
836 adapter->rx_hdr_split++;
837
838 e1000_receive_skb(adapter, netdev, skb,
839 staterr, rx_desc->wb.middle.vlan);
840
841next_desc:
842 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
843 buffer_info->skb = NULL;
844
845 /* return some buffers to hardware, one at a time is too slow */
846 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
847 adapter->alloc_rx_buf(adapter, cleaned_count);
848 cleaned_count = 0;
849 }
850
851 /* use prefetched values */
852 rx_desc = next_rxd;
853 buffer_info = next_buffer;
854
855 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
856 }
857 rx_ring->next_to_clean = i;
858
859 cleaned_count = e1000_desc_unused(rx_ring);
860 if (cleaned_count)
861 adapter->alloc_rx_buf(adapter, cleaned_count);
862
bc7f75fa 863 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 864 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 865 netdev->stats.rx_bytes += total_rx_bytes;
866 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 867 return cleaned;
868}
869
97ac8cae
BA		 870/**
871 * e1000_consume_page - helper function
872 **/
873static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
874 u16 length)
875{
876 bi->page = NULL;
877 skb->len += length;
878 skb->data_len += length;
879 skb->truesize += length;
880}
881
882/**
883 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
884 * @adapter: board private structure
885 *
886 * the return value indicates whether actual cleaning was done, there
887 * is no guarantee that everything was cleaned
888 **/
889
890static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
891 int *work_done, int work_to_do)
892{
893 struct net_device *netdev = adapter->netdev;
894 struct pci_dev *pdev = adapter->pdev;
895 struct e1000_ring *rx_ring = adapter->rx_ring;
896 struct e1000_rx_desc *rx_desc, *next_rxd;
897 struct e1000_buffer *buffer_info, *next_buffer;
898 u32 length;
899 unsigned int i;
900 int cleaned_count = 0;
901 bool cleaned = false;
902 unsigned int total_rx_bytes=0, total_rx_packets=0;
903
904 i = rx_ring->next_to_clean;
905 rx_desc = E1000_RX_DESC(*rx_ring, i);
906 buffer_info = &rx_ring->buffer_info[i];
907
908 while (rx_desc->status & E1000_RXD_STAT_DD) {
909 struct sk_buff *skb;
910 u8 status;
911
912 if (*work_done >= work_to_do)
913 break;
914 (*work_done)++;
915
916 status = rx_desc->status;
917 skb = buffer_info->skb;
918 buffer_info->skb = NULL;
919
920 ++i;
921 if (i == rx_ring->count)
922 i = 0;
923 next_rxd = E1000_RX_DESC(*rx_ring, i);
924 prefetch(next_rxd);
925
926 next_buffer = &rx_ring->buffer_info[i];
927
928 cleaned = true;
929 cleaned_count++;
930 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
931 PCI_DMA_FROMDEVICE);
932 buffer_info->dma = 0;
933
934 length = le16_to_cpu(rx_desc->length);
935
936 /* errors is only valid for DD + EOP descriptors */
937 if (unlikely((status & E1000_RXD_STAT_EOP) &&
938 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
939 /* recycle both page and skb */
940 buffer_info->skb = skb;
941 /* an error means any chain goes out the window
942 * too */
943 if (rx_ring->rx_skb_top)
944 dev_kfree_skb(rx_ring->rx_skb_top);
945 rx_ring->rx_skb_top = NULL;
946 goto next_desc;
947 }
948
949#define rxtop rx_ring->rx_skb_top
950 if (!(status & E1000_RXD_STAT_EOP)) {
951 /* this descriptor is only the beginning (or middle) */
952 if (!rxtop) {
953 /* this is the beginning of a chain */
954 rxtop = skb;
955 skb_fill_page_desc(rxtop, 0, buffer_info->page,
956 0, length);
957 } else {
958 /* this is the middle of a chain */
959 skb_fill_page_desc(rxtop,
960 skb_shinfo(rxtop)->nr_frags,
961 buffer_info->page, 0, length);
962 /* re-use the skb, only consumed the page */
963 buffer_info->skb = skb;
964 }
965 e1000_consume_page(buffer_info, rxtop, length);
966 goto next_desc;
967 } else {
968 if (rxtop) {
969 /* end of the chain */
970 skb_fill_page_desc(rxtop,
971 skb_shinfo(rxtop)->nr_frags,
972 buffer_info->page, 0, length);
973 /* re-use the current skb, we only consumed the
974 * page */
975 buffer_info->skb = skb;
976 skb = rxtop;
977 rxtop = NULL;
978 e1000_consume_page(buffer_info, skb, length);
979 } else {
980 /* no chain, got EOP, this buf is the packet
981 * copybreak to save the put_page/alloc_page */
982 if (length <= copybreak &&
983 skb_tailroom(skb) >= length) {
984 u8 *vaddr;
985 vaddr = kmap_atomic(buffer_info->page,
986 KM_SKB_DATA_SOFTIRQ);
987 memcpy(skb_tail_pointer(skb), vaddr,
988 length);
989 kunmap_atomic(vaddr,
990 KM_SKB_DATA_SOFTIRQ);
991 /* re-use the page, so don't erase
992 * buffer_info->page */
993 skb_put(skb, length);
994 } else {
995 skb_fill_page_desc(skb, 0,
996 buffer_info->page, 0,
997 length);
998 e1000_consume_page(buffer_info, skb,
999 length);
1000 }
1001 }
1002 }
1003
1004 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1005 e1000_rx_checksum(adapter,
1006 (u32)(status) |
1007 ((u32)(rx_desc->errors) << 24),
1008 le16_to_cpu(rx_desc->csum), skb);
1009
1010 /* probably a little skewed due to removing CRC */
1011 total_rx_bytes += skb->len;
1012 total_rx_packets++;
1013
1014 /* eth type trans needs skb->data to point to something */
1015 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1016 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1017 dev_kfree_skb(skb);
1018 goto next_desc;
1019 }
1020
1021 e1000_receive_skb(adapter, netdev, skb, status,
1022 rx_desc->special);
1023
1024next_desc:
1025 rx_desc->status = 0;
1026
1027 /* return some buffers to hardware, one at a time is too slow */
1028 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1029 adapter->alloc_rx_buf(adapter, cleaned_count);
1030 cleaned_count = 0;
1031 }
1032
1033 /* use prefetched values */
1034 rx_desc = next_rxd;
1035 buffer_info = next_buffer;
1036 }
1037 rx_ring->next_to_clean = i;
1038
1039 cleaned_count = e1000_desc_unused(rx_ring);
1040 if (cleaned_count)
1041 adapter->alloc_rx_buf(adapter, cleaned_count);
1042
1043 adapter->total_rx_bytes += total_rx_bytes;
1044 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1045 netdev->stats.rx_bytes += total_rx_bytes;
1046 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1047 return cleaned;
1048}
1049
bc7f75fa
AK		 1050/**
1051 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1052 * @adapter: board private structure
1053 **/
1054static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1055{
1056 struct e1000_ring *rx_ring = adapter->rx_ring;
1057 struct e1000_buffer *buffer_info;
1058 struct e1000_ps_page *ps_page;
1059 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1060 unsigned int i, j;
1061
1062 /* Free all the Rx ring sk_buffs */
1063 for (i = 0; i < rx_ring->count; i++) {
1064 buffer_info = &rx_ring->buffer_info[i];
1065 if (buffer_info->dma) {
1066 if (adapter->clean_rx == e1000_clean_rx_irq)
1067 pci_unmap_single(pdev, buffer_info->dma,
1068 adapter->rx_buffer_len,
1069 PCI_DMA_FROMDEVICE);
97ac8cae
BA		 1070 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1071 pci_unmap_page(pdev, buffer_info->dma,
1072 PAGE_SIZE,
1073 PCI_DMA_FROMDEVICE);
bc7f75fa
AK		 1074 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1075 pci_unmap_single(pdev, buffer_info->dma,
1076 adapter->rx_ps_bsize0,
1077 PCI_DMA_FROMDEVICE);
1078 buffer_info->dma = 0;
1079 }
1080
97ac8cae
BA		 1081 if (buffer_info->page) {
1082 put_page(buffer_info->page);
1083 buffer_info->page = NULL;
1084 }
1085
bc7f75fa
AK		 1086 if (buffer_info->skb) {
1087 dev_kfree_skb(buffer_info->skb);
1088 buffer_info->skb = NULL;
1089 }
1090
1091 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1092 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1093 if (!ps_page->page)
1094 break;
1095 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1096 PCI_DMA_FROMDEVICE);
1097 ps_page->dma = 0;
1098 put_page(ps_page->page);
1099 ps_page->page = NULL;
1100 }
1101 }
1102
1103 /* there also may be some cached data from a chained receive */
1104 if (rx_ring->rx_skb_top) {
1105 dev_kfree_skb(rx_ring->rx_skb_top);
1106 rx_ring->rx_skb_top = NULL;
1107 }
1108
bc7f75fa
AK		 1109 /* Zero out the descriptor ring */
1110 memset(rx_ring->desc, 0, rx_ring->size);
1111
1112 rx_ring->next_to_clean = 0;
1113 rx_ring->next_to_use = 0;
1114
1115 writel(0, adapter->hw.hw_addr + rx_ring->head);
1116 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1117}
1118
a8f88ff5
JB		 1119static void e1000e_downshift_workaround(struct work_struct *work)
1120{
1121 struct e1000_adapter *adapter = container_of(work,
1122 struct e1000_adapter, downshift_task);
1123
1124 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1125}
1126
bc7f75fa
AK		 1127/**
1128 * e1000_intr_msi - Interrupt Handler
1129 * @irq: interrupt number
1130 * @data: pointer to a network interface device structure
1131 **/
1132static irqreturn_t e1000_intr_msi(int irq, void *data)
1133{
1134 struct net_device *netdev = data;
1135 struct e1000_adapter *adapter = netdev_priv(netdev);
1136 struct e1000_hw *hw = &adapter->hw;
1137 u32 icr = er32(ICR);
1138
ad68076e
BA		 1139 /*
1140 * read ICR disables interrupts using IAM
1141 */
bc7f75fa 1142
573cca8c 1143 if (icr & E1000_ICR_LSC) {
bc7f75fa 1144 hw->mac.get_link_status = 1;
ad68076e
BA		 1145 /*
1146 * ICH8 workaround-- Call gig speed drop workaround on cable
1147 * disconnect (LSC) before accessing any PHY registers
1148 */
bc7f75fa
AK		 1149 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1150 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1151 schedule_work(&adapter->downshift_task);
bc7f75fa 1152
ad68076e
BA		 1153 /*
1154 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1155 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1156 * adapter in watchdog
1157 */
bc7f75fa
AK		 1158 if (netif_carrier_ok(netdev) &&
1159 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1160 /* disable receives */
1161 u32 rctl = er32(RCTL);
1162 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1163 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1164 }
1165 /* guard against interrupt when we're going down */
1166 if (!test_bit(__E1000_DOWN, &adapter->state))
1167 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1168 }
1169
288379f0 1170 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1171 adapter->total_tx_bytes = 0;
1172 adapter->total_tx_packets = 0;
1173 adapter->total_rx_bytes = 0;
1174 adapter->total_rx_packets = 0;
288379f0 1175 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1176 }
1177
1178 return IRQ_HANDLED;
1179}
1180
1181/**
1182 * e1000_intr - Interrupt Handler
1183 * @irq: interrupt number
1184 * @data: pointer to a network interface device structure
1185 **/
1186static irqreturn_t e1000_intr(int irq, void *data)
1187{
1188 struct net_device *netdev = data;
1189 struct e1000_adapter *adapter = netdev_priv(netdev);
1190 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1191 u32 rctl, icr = er32(ICR);
4662e82b 1192
a68ea775 1193 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1194 return IRQ_NONE; /* Not our interrupt */
1195
ad68076e
BA		 1196 /*
1197 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1198 * not set, then the adapter didn't send an interrupt
1199 */
bc7f75fa
AK		 1200 if (!(icr & E1000_ICR_INT_ASSERTED))
1201 return IRQ_NONE;
1202
ad68076e
BA		 1203 /*
1204 * Interrupt Auto-Mask...upon reading ICR,
1205 * interrupts are masked. No need for the
1206 * IMC write
1207 */
bc7f75fa 1208
573cca8c 1209 if (icr & E1000_ICR_LSC) {
bc7f75fa 1210 hw->mac.get_link_status = 1;
ad68076e
BA		 1211 /*
1212 * ICH8 workaround-- Call gig speed drop workaround on cable
1213 * disconnect (LSC) before accessing any PHY registers
1214 */
bc7f75fa
AK		 1215 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1216 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1217 schedule_work(&adapter->downshift_task);
bc7f75fa 1218
ad68076e
BA		 1219 /*
1220 * 80003ES2LAN workaround--
bc7f75fa
AK		 1221 * For packet buffer work-around on link down event;
1222 * disable receives here in the ISR and
1223 * reset adapter in watchdog
1224 */
1225 if (netif_carrier_ok(netdev) &&
1226 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1227 /* disable receives */
1228 rctl = er32(RCTL);
1229 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1230 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1231 }
1232 /* guard against interrupt when we're going down */
1233 if (!test_bit(__E1000_DOWN, &adapter->state))
1234 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1235 }
1236
288379f0 1237 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1238 adapter->total_tx_bytes = 0;
1239 adapter->total_tx_packets = 0;
1240 adapter->total_rx_bytes = 0;
1241 adapter->total_rx_packets = 0;
288379f0 1242 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1243 }
1244
1245 return IRQ_HANDLED;
1246}
1247
4662e82b
BA		 1248static irqreturn_t e1000_msix_other(int irq, void *data)
1249{
1250 struct net_device *netdev = data;
1251 struct e1000_adapter *adapter = netdev_priv(netdev);
1252 struct e1000_hw *hw = &adapter->hw;
1253 u32 icr = er32(ICR);
1254
1255 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1256 if (!test_bit(__E1000_DOWN, &adapter->state))
1257 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1258 return IRQ_NONE;
1259 }
1260
1261 if (icr & adapter->eiac_mask)
1262 ew32(ICS, (icr & adapter->eiac_mask));
1263
1264 if (icr & E1000_ICR_OTHER) {
1265 if (!(icr & E1000_ICR_LSC))
1266 goto no_link_interrupt;
1267 hw->mac.get_link_status = 1;
1268 /* guard against interrupt when we're going down */
1269 if (!test_bit(__E1000_DOWN, &adapter->state))
1270 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1271 }
1272
1273no_link_interrupt:
a3c69fef
JB		 1274 if (!test_bit(__E1000_DOWN, &adapter->state))
1275 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1276
1277 return IRQ_HANDLED;
1278}
1279
1280
1281static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1282{
1283 struct net_device *netdev = data;
1284 struct e1000_adapter *adapter = netdev_priv(netdev);
1285 struct e1000_hw *hw = &adapter->hw;
1286 struct e1000_ring *tx_ring = adapter->tx_ring;
1287
1288
1289 adapter->total_tx_bytes = 0;
1290 adapter->total_tx_packets = 0;
1291
1292 if (!e1000_clean_tx_irq(adapter))
1293 /* Ring was not completely cleaned, so fire another interrupt */
1294 ew32(ICS, tx_ring->ims_val);
1295
1296 return IRQ_HANDLED;
1297}
1298
1299static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1300{
1301 struct net_device *netdev = data;
1302 struct e1000_adapter *adapter = netdev_priv(netdev);
1303
1304 /* Write the ITR value calculated at the end of the
1305 * previous interrupt.
1306 */
1307 if (adapter->rx_ring->set_itr) {
1308 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1309 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1310 adapter->rx_ring->set_itr = 0;
1311 }
1312
288379f0 1313 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1314 adapter->total_rx_bytes = 0;
1315 adapter->total_rx_packets = 0;
288379f0 1316 __napi_schedule(&adapter->napi);
4662e82b
BA		 1317 }
1318 return IRQ_HANDLED;
1319}
1320
1321/**
1322 * e1000_configure_msix - Configure MSI-X hardware
1323 *
1324 * e1000_configure_msix sets up the hardware to properly
1325 * generate MSI-X interrupts.
1326 **/
1327static void e1000_configure_msix(struct e1000_adapter *adapter)
1328{
1329 struct e1000_hw *hw = &adapter->hw;
1330 struct e1000_ring *rx_ring = adapter->rx_ring;
1331 struct e1000_ring *tx_ring = adapter->tx_ring;
1332 int vector = 0;
1333 u32 ctrl_ext, ivar = 0;
1334
1335 adapter->eiac_mask = 0;
1336
1337 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1338 if (hw->mac.type == e1000_82574) {
1339 u32 rfctl = er32(RFCTL);
1340 rfctl |= E1000_RFCTL_ACK_DIS;
1341 ew32(RFCTL, rfctl);
1342 }
1343
1344#define E1000_IVAR_INT_ALLOC_VALID 0x8
1345 /* Configure Rx vector */
1346 rx_ring->ims_val = E1000_IMS_RXQ0;
1347 adapter->eiac_mask |= rx_ring->ims_val;
1348 if (rx_ring->itr_val)
1349 writel(1000000000 / (rx_ring->itr_val * 256),
1350 hw->hw_addr + rx_ring->itr_register);
1351 else
1352 writel(1, hw->hw_addr + rx_ring->itr_register);
1353 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1354
1355 /* Configure Tx vector */
1356 tx_ring->ims_val = E1000_IMS_TXQ0;
1357 vector++;
1358 if (tx_ring->itr_val)
1359 writel(1000000000 / (tx_ring->itr_val * 256),
1360 hw->hw_addr + tx_ring->itr_register);
1361 else
1362 writel(1, hw->hw_addr + tx_ring->itr_register);
1363 adapter->eiac_mask |= tx_ring->ims_val;
1364 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1365
1366 /* set vector for Other Causes, e.g. link changes */
1367 vector++;
1368 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1369 if (rx_ring->itr_val)
1370 writel(1000000000 / (rx_ring->itr_val * 256),
1371 hw->hw_addr + E1000_EITR_82574(vector));
1372 else
1373 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1374
1375 /* Cause Tx interrupts on every write back */
1376 ivar |= (1 << 31);
1377
1378 ew32(IVAR, ivar);
1379
1380 /* enable MSI-X PBA support */
1381 ctrl_ext = er32(CTRL_EXT);
1382 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1383
1384 /* Auto-Mask Other interrupts upon ICR read */
1385#define E1000_EIAC_MASK_82574 0x01F00000
1386 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1387 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1388 ew32(CTRL_EXT, ctrl_ext);
1389 e1e_flush();
1390}
1391
1392void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1393{
1394 if (adapter->msix_entries) {
1395 pci_disable_msix(adapter->pdev);
1396 kfree(adapter->msix_entries);
1397 adapter->msix_entries = NULL;
1398 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1399 pci_disable_msi(adapter->pdev);
1400 adapter->flags &= ~FLAG_MSI_ENABLED;
1401 }
1402
1403 return;
1404}
1405
1406/**
1407 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1408 *
1409 * Attempt to configure interrupts using the best available
1410 * capabilities of the hardware and kernel.
1411 **/
1412void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1413{
1414 int err;
1415 int numvecs, i;
1416
1417
1418 switch (adapter->int_mode) {
1419 case E1000E_INT_MODE_MSIX:
1420 if (adapter->flags & FLAG_HAS_MSIX) {
1421 numvecs = 3; /* RxQ0, TxQ0 and other */
1422 adapter->msix_entries = kcalloc(numvecs,
1423 sizeof(struct msix_entry),
1424 GFP_KERNEL);
1425 if (adapter->msix_entries) {
1426 for (i = 0; i < numvecs; i++)
1427 adapter->msix_entries[i].entry = i;
1428
1429 err = pci_enable_msix(adapter->pdev,
1430 adapter->msix_entries,
1431 numvecs);
1432 if (err == 0)
1433 return;
1434 }
1435 /* MSI-X failed, so fall through and try MSI */
1436 e_err("Failed to initialize MSI-X interrupts. "
1437 "Falling back to MSI interrupts.\n");
1438 e1000e_reset_interrupt_capability(adapter);
1439 }
1440 adapter->int_mode = E1000E_INT_MODE_MSI;
1441 /* Fall through */
1442 case E1000E_INT_MODE_MSI:
1443 if (!pci_enable_msi(adapter->pdev)) {
1444 adapter->flags |= FLAG_MSI_ENABLED;
1445 } else {
1446 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1447 e_err("Failed to initialize MSI interrupts. Falling "
1448 "back to legacy interrupts.\n");
1449 }
1450 /* Fall through */
1451 case E1000E_INT_MODE_LEGACY:
1452 /* Don't do anything; this is the system default */
1453 break;
1454 }
1455
1456 return;
1457}
1458
1459/**
1460 * e1000_request_msix - Initialize MSI-X interrupts
1461 *
1462 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1463 * kernel.
1464 **/
1465static int e1000_request_msix(struct e1000_adapter *adapter)
1466{
1467 struct net_device *netdev = adapter->netdev;
1468 int err = 0, vector = 0;
1469
1470 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1471 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1472 else
1473 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1474 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1475 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1476 netdev);
1477 if (err)
1478 goto out;
1479 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1480 adapter->rx_ring->itr_val = adapter->itr;
1481 vector++;
1482
1483 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1484 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1485 else
1486 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1487 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1488 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1489 netdev);
1490 if (err)
1491 goto out;
1492 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1493 adapter->tx_ring->itr_val = adapter->itr;
1494 vector++;
1495
1496 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1497 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1498 if (err)
1499 goto out;
1500
1501 e1000_configure_msix(adapter);
1502 return 0;
1503out:
1504 return err;
1505}
1506
f8d59f78
BA		 1507/**
1508 * e1000_request_irq - initialize interrupts
1509 *
1510 * Attempts to configure interrupts using the best available
1511 * capabilities of the hardware and kernel.
1512 **/
bc7f75fa
AK		 1513static int e1000_request_irq(struct e1000_adapter *adapter)
1514{
1515 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1516 int err;
1517
4662e82b
BA		 1518 if (adapter->msix_entries) {
1519 err = e1000_request_msix(adapter);
1520 if (!err)
1521 return err;
1522 /* fall back to MSI */
1523 e1000e_reset_interrupt_capability(adapter);
1524 adapter->int_mode = E1000E_INT_MODE_MSI;
1525 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1526 }
4662e82b 1527 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1528 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1529 netdev->name, netdev);
1530 if (!err)
1531 return err;
bc7f75fa 1532
4662e82b
BA		 1533 /* fall back to legacy interrupt */
1534 e1000e_reset_interrupt_capability(adapter);
1535 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1536 }
1537
a0607fd3 1538 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1539 netdev->name, netdev);
1540 if (err)
1541 e_err("Unable to allocate interrupt, Error: %d\n", err);
1542
bc7f75fa
AK		 1543 return err;
1544}
1545
1546static void e1000_free_irq(struct e1000_adapter *adapter)
1547{
1548 struct net_device *netdev = adapter->netdev;
1549
4662e82b
BA		 1550 if (adapter->msix_entries) {
1551 int vector = 0;
1552
1553 free_irq(adapter->msix_entries[vector].vector, netdev);
1554 vector++;
1555
1556 free_irq(adapter->msix_entries[vector].vector, netdev);
1557 vector++;
1558
1559 /* Other Causes interrupt vector */
1560 free_irq(adapter->msix_entries[vector].vector, netdev);
1561 return;
bc7f75fa 1562 }
4662e82b
BA		 1563
1564 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1565}
1566
1567/**
1568 * e1000_irq_disable - Mask off interrupt generation on the NIC
1569 **/
1570static void e1000_irq_disable(struct e1000_adapter *adapter)
1571{
1572 struct e1000_hw *hw = &adapter->hw;
1573
bc7f75fa 1574 ew32(IMC, ~0);
4662e82b
BA		 1575 if (adapter->msix_entries)
1576 ew32(EIAC_82574, 0);
bc7f75fa
AK		 1577 e1e_flush();
1578 synchronize_irq(adapter->pdev->irq);
1579}
1580
1581/**
1582 * e1000_irq_enable - Enable default interrupt generation settings
1583 **/
1584static void e1000_irq_enable(struct e1000_adapter *adapter)
1585{
1586 struct e1000_hw *hw = &adapter->hw;
1587
4662e82b
BA		 1588 if (adapter->msix_entries) {
1589 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1590 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1591 } else {
1592 ew32(IMS, IMS_ENABLE_MASK);
1593 }
74ef9c39 1594 e1e_flush();
bc7f75fa
AK		 1595}
1596
1597/**
1598 * e1000_get_hw_control - get control of the h/w from f/w
1599 * @adapter: address of board private structure
1600 *
489815ce 1601 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1602 * For ASF and Pass Through versions of f/w this means that
1603 * the driver is loaded. For AMT version (only with 82573)
1604 * of the f/w this means that the network i/f is open.
1605 **/
1606static void e1000_get_hw_control(struct e1000_adapter *adapter)
1607{
1608 struct e1000_hw *hw = &adapter->hw;
1609 u32 ctrl_ext;
1610 u32 swsm;
1611
1612 /* Let firmware know the driver has taken over */
1613 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1614 swsm = er32(SWSM);
1615 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1616 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1617 ctrl_ext = er32(CTRL_EXT);
ad68076e 1618 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1619 }
1620}
1621
1622/**
1623 * e1000_release_hw_control - release control of the h/w to f/w
1624 * @adapter: address of board private structure
1625 *
489815ce 1626 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1627 * For ASF and Pass Through versions of f/w this means that the
1628 * driver is no longer loaded. For AMT version (only with 82573) i
1629 * of the f/w this means that the network i/f is closed.
1630 *
1631 **/
1632static void e1000_release_hw_control(struct e1000_adapter *adapter)
1633{
1634 struct e1000_hw *hw = &adapter->hw;
1635 u32 ctrl_ext;
1636 u32 swsm;
1637
1638 /* Let firmware taken over control of h/w */
1639 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1640 swsm = er32(SWSM);
1641 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1642 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1643 ctrl_ext = er32(CTRL_EXT);
ad68076e 1644 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1645 }
1646}
1647
bc7f75fa
AK		 1648/**
1649 * @e1000_alloc_ring - allocate memory for a ring structure
1650 **/
1651static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1652 struct e1000_ring *ring)
1653{
1654 struct pci_dev *pdev = adapter->pdev;
1655
1656 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1657 GFP_KERNEL);
1658 if (!ring->desc)
1659 return -ENOMEM;
1660
1661 return 0;
1662}
1663
1664/**
1665 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1666 * @adapter: board private structure
1667 *
1668 * Return 0 on success, negative on failure
1669 **/
1670int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1671{
1672 struct e1000_ring *tx_ring = adapter->tx_ring;
1673 int err = -ENOMEM, size;
1674
1675 size = sizeof(struct e1000_buffer) * tx_ring->count;
1676 tx_ring->buffer_info = vmalloc(size);
1677 if (!tx_ring->buffer_info)
1678 goto err;
1679 memset(tx_ring->buffer_info, 0, size);
1680
1681 /* round up to nearest 4K */
1682 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1683 tx_ring->size = ALIGN(tx_ring->size, 4096);
1684
1685 err = e1000_alloc_ring_dma(adapter, tx_ring);
1686 if (err)
1687 goto err;
1688
1689 tx_ring->next_to_use = 0;
1690 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 1691
1692 return 0;
1693err:
1694 vfree(tx_ring->buffer_info);
44defeb3 1695 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1696 return err;
1697}
1698
1699/**
1700 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1701 * @adapter: board private structure
1702 *
1703 * Returns 0 on success, negative on failure
1704 **/
1705int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1706{
1707 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 1708 struct e1000_buffer *buffer_info;
1709 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 1710
1711 size = sizeof(struct e1000_buffer) * rx_ring->count;
1712 rx_ring->buffer_info = vmalloc(size);
1713 if (!rx_ring->buffer_info)
1714 goto err;
1715 memset(rx_ring->buffer_info, 0, size);
1716
47f44e40
AK		 1717 for (i = 0; i < rx_ring->count; i++) {
1718 buffer_info = &rx_ring->buffer_info[i];
1719 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1720 sizeof(struct e1000_ps_page),
1721 GFP_KERNEL);
1722 if (!buffer_info->ps_pages)
1723 goto err_pages;
1724 }
bc7f75fa
AK		 1725
1726 desc_len = sizeof(union e1000_rx_desc_packet_split);
1727
1728 /* Round up to nearest 4K */
1729 rx_ring->size = rx_ring->count * desc_len;
1730 rx_ring->size = ALIGN(rx_ring->size, 4096);
1731
1732 err = e1000_alloc_ring_dma(adapter, rx_ring);
1733 if (err)
47f44e40 1734 goto err_pages;
bc7f75fa
AK		 1735
1736 rx_ring->next_to_clean = 0;
1737 rx_ring->next_to_use = 0;
1738 rx_ring->rx_skb_top = NULL;
1739
1740 return 0;
47f44e40
AK		 1741
1742err_pages:
1743 for (i = 0; i < rx_ring->count; i++) {
1744 buffer_info = &rx_ring->buffer_info[i];
1745 kfree(buffer_info->ps_pages);
1746 }
bc7f75fa
AK		 1747err:
1748 vfree(rx_ring->buffer_info);
44defeb3 1749 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1750 return err;
1751}
1752
1753/**
1754 * e1000_clean_tx_ring - Free Tx Buffers
1755 * @adapter: board private structure
1756 **/
1757static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1758{
1759 struct e1000_ring *tx_ring = adapter->tx_ring;
1760 struct e1000_buffer *buffer_info;
1761 unsigned long size;
1762 unsigned int i;
1763
1764 for (i = 0; i < tx_ring->count; i++) {
1765 buffer_info = &tx_ring->buffer_info[i];
1766 e1000_put_txbuf(adapter, buffer_info);
1767 }
1768
1769 size = sizeof(struct e1000_buffer) * tx_ring->count;
1770 memset(tx_ring->buffer_info, 0, size);
1771
1772 memset(tx_ring->desc, 0, tx_ring->size);
1773
1774 tx_ring->next_to_use = 0;
1775 tx_ring->next_to_clean = 0;
1776
1777 writel(0, adapter->hw.hw_addr + tx_ring->head);
1778 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1779}
1780
1781/**
1782 * e1000e_free_tx_resources - Free Tx Resources per Queue
1783 * @adapter: board private structure
1784 *
1785 * Free all transmit software resources
1786 **/
1787void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1788{
1789 struct pci_dev *pdev = adapter->pdev;
1790 struct e1000_ring *tx_ring = adapter->tx_ring;
1791
1792 e1000_clean_tx_ring(adapter);
1793
1794 vfree(tx_ring->buffer_info);
1795 tx_ring->buffer_info = NULL;
1796
1797 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1798 tx_ring->dma);
1799 tx_ring->desc = NULL;
1800}
1801
1802/**
1803 * e1000e_free_rx_resources - Free Rx Resources
1804 * @adapter: board private structure
1805 *
1806 * Free all receive software resources
1807 **/
1808
1809void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1810{
1811 struct pci_dev *pdev = adapter->pdev;
1812 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1813 int i;
bc7f75fa
AK		 1814
1815 e1000_clean_rx_ring(adapter);
1816
47f44e40
AK		 1817 for (i = 0; i < rx_ring->count; i++) {
1818 kfree(rx_ring->buffer_info[i].ps_pages);
1819 }
1820
bc7f75fa
AK		 1821 vfree(rx_ring->buffer_info);
1822 rx_ring->buffer_info = NULL;
1823
bc7f75fa
AK		 1824 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1825 rx_ring->dma);
1826 rx_ring->desc = NULL;
1827}
1828
1829/**
1830 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 1831 * @adapter: pointer to adapter
1832 * @itr_setting: current adapter->itr
1833 * @packets: the number of packets during this measurement interval
1834 * @bytes: the number of bytes during this measurement interval
1835 *
bc7f75fa
AK		 1836 * Stores a new ITR value based on packets and byte
1837 * counts during the last interrupt. The advantage of per interrupt
1838 * computation is faster updates and more accurate ITR for the current
1839 * traffic pattern. Constants in this function were computed
1840 * based on theoretical maximum wire speed and thresholds were set based
1841 * on testing data as well as attempting to minimize response time
4662e82b
BA		 1842 * while increasing bulk throughput. This functionality is controlled
1843 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 1844 **/
1845static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1846 u16 itr_setting, int packets,
1847 int bytes)
1848{
1849 unsigned int retval = itr_setting;
1850
1851 if (packets == 0)
1852 goto update_itr_done;
1853
1854 switch (itr_setting) {
1855 case lowest_latency:
1856 /* handle TSO and jumbo frames */
1857 if (bytes/packets > 8000)
1858 retval = bulk_latency;
1859 else if ((packets < 5) && (bytes > 512)) {
1860 retval = low_latency;
1861 }
1862 break;
1863 case low_latency: /* 50 usec aka 20000 ints/s */
1864 if (bytes > 10000) {
1865 /* this if handles the TSO accounting */
1866 if (bytes/packets > 8000) {
1867 retval = bulk_latency;
1868 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1869 retval = bulk_latency;
1870 } else if ((packets > 35)) {
1871 retval = lowest_latency;
1872 }
1873 } else if (bytes/packets > 2000) {
1874 retval = bulk_latency;
1875 } else if (packets <= 2 && bytes < 512) {
1876 retval = lowest_latency;
1877 }
1878 break;
1879 case bulk_latency: /* 250 usec aka 4000 ints/s */
1880 if (bytes > 25000) {
1881 if (packets > 35) {
1882 retval = low_latency;
1883 }
1884 } else if (bytes < 6000) {
1885 retval = low_latency;
1886 }
1887 break;
1888 }
1889
1890update_itr_done:
1891 return retval;
1892}
1893
1894static void e1000_set_itr(struct e1000_adapter *adapter)
1895{
1896 struct e1000_hw *hw = &adapter->hw;
1897 u16 current_itr;
1898 u32 new_itr = adapter->itr;
1899
1900 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1901 if (adapter->link_speed != SPEED_1000) {
1902 current_itr = 0;
1903 new_itr = 4000;
1904 goto set_itr_now;
1905 }
1906
1907 adapter->tx_itr = e1000_update_itr(adapter,
1908 adapter->tx_itr,
1909 adapter->total_tx_packets,
1910 adapter->total_tx_bytes);
1911 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1912 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1913 adapter->tx_itr = low_latency;
1914
1915 adapter->rx_itr = e1000_update_itr(adapter,
1916 adapter->rx_itr,
1917 adapter->total_rx_packets,
1918 adapter->total_rx_bytes);
1919 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1920 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1921 adapter->rx_itr = low_latency;
1922
1923 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1924
1925 switch (current_itr) {
1926 /* counts and packets in update_itr are dependent on these numbers */
1927 case lowest_latency:
1928 new_itr = 70000;
1929 break;
1930 case low_latency:
1931 new_itr = 20000; /* aka hwitr = ~200 */
1932 break;
1933 case bulk_latency:
1934 new_itr = 4000;
1935 break;
1936 default:
1937 break;
1938 }
1939
1940set_itr_now:
1941 if (new_itr != adapter->itr) {
ad68076e
BA		 1942 /*
1943 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1944 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 1945 * increasing
1946 */
bc7f75fa
AK		 1947 new_itr = new_itr > adapter->itr ?
1948 min(adapter->itr + (new_itr >> 2), new_itr) :
1949 new_itr;
1950 adapter->itr = new_itr;
4662e82b
BA		 1951 adapter->rx_ring->itr_val = new_itr;
1952 if (adapter->msix_entries)
1953 adapter->rx_ring->set_itr = 1;
1954 else
1955 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 1956 }
1957}
1958
4662e82b
BA		 1959/**
1960 * e1000_alloc_queues - Allocate memory for all rings
1961 * @adapter: board private structure to initialize
1962 **/
1963static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1964{
1965 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1966 if (!adapter->tx_ring)
1967 goto err;
1968
1969 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1970 if (!adapter->rx_ring)
1971 goto err;
1972
1973 return 0;
1974err:
1975 e_err("Unable to allocate memory for queues\n");
1976 kfree(adapter->rx_ring);
1977 kfree(adapter->tx_ring);
1978 return -ENOMEM;
1979}
1980
bc7f75fa
AK		 1981/**
1982 * e1000_clean - NAPI Rx polling callback
ad68076e 1983 * @napi: struct associated with this polling callback
489815ce 1984 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 1985 **/
1986static int e1000_clean(struct napi_struct *napi, int budget)
1987{
1988 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 1989 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1990 struct net_device *poll_dev = adapter->netdev;
679e8a0f 1991 int tx_cleaned = 1, work_done = 0;
bc7f75fa 1992
4cf1653a 1993 adapter = netdev_priv(poll_dev);
bc7f75fa 1994
4662e82b
BA		 1995 if (adapter->msix_entries &&
1996 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
1997 goto clean_rx;
1998
92af3e95 1999 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2000
4662e82b 2001clean_rx:
bc7f75fa 2002 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2003
12d04a3c 2004 if (!tx_cleaned)
d2c7ddd6 2005 work_done = budget;
bc7f75fa 2006
53e52c72
DM		 2007 /* If budget not fully consumed, exit the polling mode */
2008 if (work_done < budget) {
bc7f75fa
AK		 2009 if (adapter->itr_setting & 3)
2010 e1000_set_itr(adapter);
288379f0 2011 napi_complete(napi);
a3c69fef
JB		 2012 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2013 if (adapter->msix_entries)
2014 ew32(IMS, adapter->rx_ring->ims_val);
2015 else
2016 e1000_irq_enable(adapter);
2017 }
bc7f75fa
AK		 2018 }
2019
2020 return work_done;
2021}
2022
2023static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2024{
2025 struct e1000_adapter *adapter = netdev_priv(netdev);
2026 struct e1000_hw *hw = &adapter->hw;
2027 u32 vfta, index;
2028
2029 /* don't update vlan cookie if already programmed */
2030 if ((adapter->hw.mng_cookie.status &
2031 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2032 (vid == adapter->mng_vlan_id))
2033 return;
caaddaf8 2034
bc7f75fa 2035 /* add VID to filter table */
caaddaf8
BA		 2036 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2037 index = (vid >> 5) & 0x7F;
2038 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2039 vfta |= (1 << (vid & 0x1F));
2040 hw->mac.ops.write_vfta(hw, index, vfta);
2041 }
bc7f75fa
AK		 2042}
2043
2044static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2045{
2046 struct e1000_adapter *adapter = netdev_priv(netdev);
2047 struct e1000_hw *hw = &adapter->hw;
2048 u32 vfta, index;
2049
74ef9c39
JB		 2050 if (!test_bit(__E1000_DOWN, &adapter->state))
2051 e1000_irq_disable(adapter);
bc7f75fa 2052 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2053
2054 if (!test_bit(__E1000_DOWN, &adapter->state))
2055 e1000_irq_enable(adapter);
bc7f75fa
AK		 2056
2057 if ((adapter->hw.mng_cookie.status &
2058 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2059 (vid == adapter->mng_vlan_id)) {
2060 /* release control to f/w */
2061 e1000_release_hw_control(adapter);
2062 return;
2063 }
2064
2065 /* remove VID from filter table */
caaddaf8
BA		 2066 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2067 index = (vid >> 5) & 0x7F;
2068 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2069 vfta &= ~(1 << (vid & 0x1F));
2070 hw->mac.ops.write_vfta(hw, index, vfta);
2071 }
bc7f75fa
AK		 2072}
2073
2074static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2075{
2076 struct net_device *netdev = adapter->netdev;
2077 u16 vid = adapter->hw.mng_cookie.vlan_id;
2078 u16 old_vid = adapter->mng_vlan_id;
2079
2080 if (!adapter->vlgrp)
2081 return;
2082
2083 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2084 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2085 if (adapter->hw.mng_cookie.status &
2086 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2087 e1000_vlan_rx_add_vid(netdev, vid);
2088 adapter->mng_vlan_id = vid;
2089 }
2090
2091 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2092 (vid != old_vid) &&
2093 !vlan_group_get_device(adapter->vlgrp, old_vid))
2094 e1000_vlan_rx_kill_vid(netdev, old_vid);
2095 } else {
2096 adapter->mng_vlan_id = vid;
2097 }
2098}
2099
2100
2101static void e1000_vlan_rx_register(struct net_device *netdev,
2102 struct vlan_group *grp)
2103{
2104 struct e1000_adapter *adapter = netdev_priv(netdev);
2105 struct e1000_hw *hw = &adapter->hw;
2106 u32 ctrl, rctl;
2107
74ef9c39
JB		 2108 if (!test_bit(__E1000_DOWN, &adapter->state))
2109 e1000_irq_disable(adapter);
bc7f75fa
AK		 2110 adapter->vlgrp = grp;
2111
2112 if (grp) {
2113 /* enable VLAN tag insert/strip */
2114 ctrl = er32(CTRL);
2115 ctrl |= E1000_CTRL_VME;
2116 ew32(CTRL, ctrl);
2117
2118 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2119 /* enable VLAN receive filtering */
2120 rctl = er32(RCTL);
bc7f75fa
AK		 2121 rctl &= ~E1000_RCTL_CFIEN;
2122 ew32(RCTL, rctl);
2123 e1000_update_mng_vlan(adapter);
2124 }
2125 } else {
2126 /* disable VLAN tag insert/strip */
2127 ctrl = er32(CTRL);
2128 ctrl &= ~E1000_CTRL_VME;
2129 ew32(CTRL, ctrl);
2130
2131 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2132 if (adapter->mng_vlan_id !=
2133 (u16)E1000_MNG_VLAN_NONE) {
2134 e1000_vlan_rx_kill_vid(netdev,
2135 adapter->mng_vlan_id);
2136 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2137 }
2138 }
2139 }
2140
74ef9c39
JB		 2141 if (!test_bit(__E1000_DOWN, &adapter->state))
2142 e1000_irq_enable(adapter);
bc7f75fa
AK		 2143}
2144
2145static void e1000_restore_vlan(struct e1000_adapter *adapter)
2146{
2147 u16 vid;
2148
2149 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2150
2151 if (!adapter->vlgrp)
2152 return;
2153
2154 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2155 if (!vlan_group_get_device(adapter->vlgrp, vid))
2156 continue;
2157 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2158 }
2159}
2160
2161static void e1000_init_manageability(struct e1000_adapter *adapter)
2162{
2163 struct e1000_hw *hw = &adapter->hw;
2164 u32 manc, manc2h;
2165
2166 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2167 return;
2168
2169 manc = er32(MANC);
2170
ad68076e
BA		 2171 /*
2172 * enable receiving management packets to the host. this will probably
bc7f75fa 2173 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2174 * the packets will be handled on SMBUS
2175 */
bc7f75fa
AK		 2176 manc |= E1000_MANC_EN_MNG2HOST;
2177 manc2h = er32(MANC2H);
2178#define E1000_MNG2HOST_PORT_623 (1 << 5)
2179#define E1000_MNG2HOST_PORT_664 (1 << 6)
2180 manc2h |= E1000_MNG2HOST_PORT_623;
2181 manc2h |= E1000_MNG2HOST_PORT_664;
2182 ew32(MANC2H, manc2h);
2183 ew32(MANC, manc);
2184}
2185
2186/**
2187 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2188 * @adapter: board private structure
2189 *
2190 * Configure the Tx unit of the MAC after a reset.
2191 **/
2192static void e1000_configure_tx(struct e1000_adapter *adapter)
2193{
2194 struct e1000_hw *hw = &adapter->hw;
2195 struct e1000_ring *tx_ring = adapter->tx_ring;
2196 u64 tdba;
2197 u32 tdlen, tctl, tipg, tarc;
2198 u32 ipgr1, ipgr2;
2199
2200 /* Setup the HW Tx Head and Tail descriptor pointers */
2201 tdba = tx_ring->dma;
2202 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2203 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2204 ew32(TDBAH, (tdba >> 32));
2205 ew32(TDLEN, tdlen);
2206 ew32(TDH, 0);
2207 ew32(TDT, 0);
2208 tx_ring->head = E1000_TDH;
2209 tx_ring->tail = E1000_TDT;
2210
2211 /* Set the default values for the Tx Inter Packet Gap timer */
2212 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2213 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2214 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2215
2216 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2217 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2218
2219 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2220 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2221 ew32(TIPG, tipg);
2222
2223 /* Set the Tx Interrupt Delay register */
2224 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2225 /* Tx irq moderation */
bc7f75fa
AK		 2226 ew32(TADV, adapter->tx_abs_int_delay);
2227
2228 /* Program the Transmit Control Register */
2229 tctl = er32(TCTL);
2230 tctl &= ~E1000_TCTL_CT;
2231 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2232 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2233
2234 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2235 tarc = er32(TARC(0));
ad68076e
BA		 2236 /*
2237 * set the speed mode bit, we'll clear it if we're not at
2238 * gigabit link later
2239 */
bc7f75fa
AK		 2240#define SPEED_MODE_BIT (1 << 21)
2241 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2242 ew32(TARC(0), tarc);
bc7f75fa
AK		 2243 }
2244
2245 /* errata: program both queues to unweighted RR */
2246 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2247 tarc = er32(TARC(0));
bc7f75fa 2248 tarc |= 1;
e9ec2c0f
JK		 2249 ew32(TARC(0), tarc);
2250 tarc = er32(TARC(1));
bc7f75fa 2251 tarc |= 1;
e9ec2c0f 2252 ew32(TARC(1), tarc);
bc7f75fa
AK		 2253 }
2254
bc7f75fa
AK		 2255 /* Setup Transmit Descriptor Settings for eop descriptor */
2256 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2257
2258 /* only set IDE if we are delaying interrupts using the timers */
2259 if (adapter->tx_int_delay)
2260 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2261
2262 /* enable Report Status bit */
2263 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2264
2265 ew32(TCTL, tctl);
2266
edfea6e6
SH		 2267 e1000e_config_collision_dist(hw);
2268
bc7f75fa
AK		 2269 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
2270}
2271
2272/**
2273 * e1000_setup_rctl - configure the receive control registers
2274 * @adapter: Board private structure
2275 **/
2276#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2277 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2278static void e1000_setup_rctl(struct e1000_adapter *adapter)
2279{
2280 struct e1000_hw *hw = &adapter->hw;
2281 u32 rctl, rfctl;
2282 u32 psrctl = 0;
2283 u32 pages = 0;
2284
2285 /* Program MC offset vector base */
2286 rctl = er32(RCTL);
2287 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2288 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2289 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2290 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2291
2292 /* Do not Store bad packets */
2293 rctl &= ~E1000_RCTL_SBP;
2294
2295 /* Enable Long Packet receive */
2296 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2297 rctl &= ~E1000_RCTL_LPE;
2298 else
2299 rctl |= E1000_RCTL_LPE;
2300
eb7c3adb
JK		 2301 /* Some systems expect that the CRC is included in SMBUS traffic. The
2302 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2303 * host memory when this is enabled
2304 */
2305 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2306 rctl |= E1000_RCTL_SECRC;
5918bd88 2307
a4f58f54
BA		 2308 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2309 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2310 u16 phy_data;
2311
2312 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2313 phy_data &= 0xfff8;
2314 phy_data |= (1 << 2);
2315 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2316
2317 e1e_rphy(hw, 22, &phy_data);
2318 phy_data &= 0x0fff;
2319 phy_data |= (1 << 14);
2320 e1e_wphy(hw, 0x10, 0x2823);
2321 e1e_wphy(hw, 0x11, 0x0003);
2322 e1e_wphy(hw, 22, phy_data);
2323 }
2324
bc7f75fa
AK		 2325 /* Setup buffer sizes */
2326 rctl &= ~E1000_RCTL_SZ_4096;
2327 rctl |= E1000_RCTL_BSEX;
2328 switch (adapter->rx_buffer_len) {
2329 case 256:
2330 rctl |= E1000_RCTL_SZ_256;
2331 rctl &= ~E1000_RCTL_BSEX;
2332 break;
2333 case 512:
2334 rctl |= E1000_RCTL_SZ_512;
2335 rctl &= ~E1000_RCTL_BSEX;
2336 break;
2337 case 1024:
2338 rctl |= E1000_RCTL_SZ_1024;
2339 rctl &= ~E1000_RCTL_BSEX;
2340 break;
2341 case 2048:
2342 default:
2343 rctl |= E1000_RCTL_SZ_2048;
2344 rctl &= ~E1000_RCTL_BSEX;
2345 break;
2346 case 4096:
2347 rctl |= E1000_RCTL_SZ_4096;
2348 break;
2349 case 8192:
2350 rctl |= E1000_RCTL_SZ_8192;
2351 break;
2352 case 16384:
2353 rctl |= E1000_RCTL_SZ_16384;
2354 break;
2355 }
2356
2357 /*
2358 * 82571 and greater support packet-split where the protocol
2359 * header is placed in skb->data and the packet data is
2360 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2361 * In the case of a non-split, skb->data is linearly filled,
2362 * followed by the page buffers. Therefore, skb->data is
2363 * sized to hold the largest protocol header.
2364 *
2365 * allocations using alloc_page take too long for regular MTU
2366 * so only enable packet split for jumbo frames
2367 *
2368 * Using pages when the page size is greater than 16k wastes
2369 * a lot of memory, since we allocate 3 pages at all times
2370 * per packet.
2371 */
bc7f75fa 2372 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA		 2373 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2374 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2375 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2376 else
2377 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2378
2379 if (adapter->rx_ps_pages) {
2380 /* Configure extra packet-split registers */
2381 rfctl = er32(RFCTL);
2382 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2383 /*
2384 * disable packet split support for IPv6 extension headers,
2385 * because some malformed IPv6 headers can hang the Rx
2386 */
bc7f75fa
AK		 2387 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2388 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2389
2390 ew32(RFCTL, rfctl);
2391
140a7480
AK		 2392 /* Enable Packet split descriptors */
2393 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2394
2395 psrctl |= adapter->rx_ps_bsize0 >>
2396 E1000_PSRCTL_BSIZE0_SHIFT;
2397
2398 switch (adapter->rx_ps_pages) {
2399 case 3:
2400 psrctl |= PAGE_SIZE <<
2401 E1000_PSRCTL_BSIZE3_SHIFT;
2402 case 2:
2403 psrctl |= PAGE_SIZE <<
2404 E1000_PSRCTL_BSIZE2_SHIFT;
2405 case 1:
2406 psrctl |= PAGE_SIZE >>
2407 E1000_PSRCTL_BSIZE1_SHIFT;
2408 break;
2409 }
2410
2411 ew32(PSRCTL, psrctl);
2412 }
2413
2414 ew32(RCTL, rctl);
318a94d6
JK		 2415 /* just started the receive unit, no need to restart */
2416 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2417}
2418
2419/**
2420 * e1000_configure_rx - Configure Receive Unit after Reset
2421 * @adapter: board private structure
2422 *
2423 * Configure the Rx unit of the MAC after a reset.
2424 **/
2425static void e1000_configure_rx(struct e1000_adapter *adapter)
2426{
2427 struct e1000_hw *hw = &adapter->hw;
2428 struct e1000_ring *rx_ring = adapter->rx_ring;
2429 u64 rdba;
2430 u32 rdlen, rctl, rxcsum, ctrl_ext;
2431
2432 if (adapter->rx_ps_pages) {
2433 /* this is a 32 byte descriptor */
2434 rdlen = rx_ring->count *
2435 sizeof(union e1000_rx_desc_packet_split);
2436 adapter->clean_rx = e1000_clean_rx_irq_ps;
2437 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2438 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2439 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2440 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2441 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2442 } else {
97ac8cae 2443 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2444 adapter->clean_rx = e1000_clean_rx_irq;
2445 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2446 }
2447
2448 /* disable receives while setting up the descriptors */
2449 rctl = er32(RCTL);
2450 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2451 e1e_flush();
2452 msleep(10);
2453
2454 /* set the Receive Delay Timer Register */
2455 ew32(RDTR, adapter->rx_int_delay);
2456
2457 /* irq moderation */
2458 ew32(RADV, adapter->rx_abs_int_delay);
2459 if (adapter->itr_setting != 0)
ad68076e 2460 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2461
2462 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2463 /* Auto-Mask interrupts upon ICR access */
2464 ctrl_ext |= E1000_CTRL_EXT_IAME;
2465 ew32(IAM, 0xffffffff);
2466 ew32(CTRL_EXT, ctrl_ext);
2467 e1e_flush();
2468
ad68076e
BA		 2469 /*
2470 * Setup the HW Rx Head and Tail Descriptor Pointers and
2471 * the Base and Length of the Rx Descriptor Ring
2472 */
bc7f75fa 2473 rdba = rx_ring->dma;
284901a9 2474 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2475 ew32(RDBAH, (rdba >> 32));
2476 ew32(RDLEN, rdlen);
2477 ew32(RDH, 0);
2478 ew32(RDT, 0);
2479 rx_ring->head = E1000_RDH;
2480 rx_ring->tail = E1000_RDT;
2481
2482 /* Enable Receive Checksum Offload for TCP and UDP */
2483 rxcsum = er32(RXCSUM);
2484 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2485 rxcsum |= E1000_RXCSUM_TUOFL;
2486
ad68076e
BA		 2487 /*
2488 * IPv4 payload checksum for UDP fragments must be
2489 * used in conjunction with packet-split.
2490 */
bc7f75fa
AK		 2491 if (adapter->rx_ps_pages)
2492 rxcsum |= E1000_RXCSUM_IPPCSE;
2493 } else {
2494 rxcsum &= ~E1000_RXCSUM_TUOFL;
2495 /* no need to clear IPPCSE as it defaults to 0 */
2496 }
2497 ew32(RXCSUM, rxcsum);
2498
ad68076e
BA		 2499 /*
2500 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2501 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2502 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2503 */
53ec5498
BA		 2504 if (adapter->flags & FLAG_HAS_ERT) {
2505 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2506 u32 rxdctl = er32(RXDCTL(0));
2507 ew32(RXDCTL(0), rxdctl | 0x3);
2508 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2509 /*
2510 * With jumbo frames and early-receive enabled,
2511 * excessive C-state transition latencies result in
2512 * dropped transactions.
2513 */
2514 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2515 adapter->netdev->name, 55);
2516 } else {
2517 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2518 adapter->netdev->name,
2519 PM_QOS_DEFAULT_VALUE);
2520 }
97ac8cae 2521 }
bc7f75fa
AK		 2522
2523 /* Enable Receives */
2524 ew32(RCTL, rctl);
2525}
2526
2527/**
e2de3eb6 2528 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2529 * @hw: pointer to the HW structure
2530 * @mc_addr_list: array of multicast addresses to program
2531 * @mc_addr_count: number of multicast addresses to program
2532 * @rar_used_count: the first RAR register free to program
2533 * @rar_count: total number of supported Receive Address Registers
2534 *
2535 * Updates the Receive Address Registers and Multicast Table Array.
2536 * The caller must have a packed mc_addr_list of multicast addresses.
2537 * The parameter rar_count will usually be hw->mac.rar_entry_count
2538 * unless there are workarounds that change this. Currently no func pointer
2539 * exists and all implementations are handled in the generic version of this
2540 * function.
2541 **/
e2de3eb6
JK		 2542static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
2543 u32 mc_addr_count, u32 rar_used_count,
2544 u32 rar_count)
bc7f75fa 2545{
e2de3eb6 2546 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count,
bc7f75fa
AK		 2547 rar_used_count, rar_count);
2548}
2549
2550/**
2551 * e1000_set_multi - Multicast and Promiscuous mode set
2552 * @netdev: network interface device structure
2553 *
2554 * The set_multi entry point is called whenever the multicast address
2555 * list or the network interface flags are updated. This routine is
2556 * responsible for configuring the hardware for proper multicast,
2557 * promiscuous mode, and all-multi behavior.
2558 **/
2559static void e1000_set_multi(struct net_device *netdev)
2560{
2561 struct e1000_adapter *adapter = netdev_priv(netdev);
2562 struct e1000_hw *hw = &adapter->hw;
2563 struct e1000_mac_info *mac = &hw->mac;
2564 struct dev_mc_list *mc_ptr;
2565 u8 *mta_list;
2566 u32 rctl;
2567 int i;
2568
2569 /* Check for Promiscuous and All Multicast modes */
2570
2571 rctl = er32(RCTL);
2572
2573 if (netdev->flags & IFF_PROMISC) {
2574 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2575 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2576 } else {
746b9f02
PM		 2577 if (netdev->flags & IFF_ALLMULTI) {
2578 rctl |= E1000_RCTL_MPE;
2579 rctl &= ~E1000_RCTL_UPE;
2580 } else {
2581 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2582 }
78ed11a5 2583 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2584 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2585 }
2586
2587 ew32(RCTL, rctl);
2588
2589 if (netdev->mc_count) {
2590 mta_list = kmalloc(netdev->mc_count * 6, GFP_ATOMIC);
2591 if (!mta_list)
2592 return;
2593
2594 /* prepare a packed array of only addresses. */
2595 mc_ptr = netdev->mc_list;
2596
2597 for (i = 0; i < netdev->mc_count; i++) {
2598 if (!mc_ptr)
2599 break;
2600 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr,
2601 ETH_ALEN);
2602 mc_ptr = mc_ptr->next;
2603 }
2604
e2de3eb6 2605 e1000_update_mc_addr_list(hw, mta_list, i, 1,
bc7f75fa
AK		 2606 mac->rar_entry_count);
2607 kfree(mta_list);
2608 } else {
2609 /*
2610 * if we're called from probe, we might not have
2611 * anything to do here, so clear out the list
2612 */
e2de3eb6 2613 e1000_update_mc_addr_list(hw, NULL, 0, 1, mac->rar_entry_count);
bc7f75fa
AK		 2614 }
2615}
2616
2617/**
ad68076e 2618 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 2619 * @adapter: private board structure
2620 **/
2621static void e1000_configure(struct e1000_adapter *adapter)
2622{
2623 e1000_set_multi(adapter->netdev);
2624
2625 e1000_restore_vlan(adapter);
2626 e1000_init_manageability(adapter);
2627
2628 e1000_configure_tx(adapter);
2629 e1000_setup_rctl(adapter);
2630 e1000_configure_rx(adapter);
ad68076e 2631 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 2632}
2633
2634/**
2635 * e1000e_power_up_phy - restore link in case the phy was powered down
2636 * @adapter: address of board private structure
2637 *
2638 * The phy may be powered down to save power and turn off link when the
2639 * driver is unloaded and wake on lan is not enabled (among others)
2640 * *** this routine MUST be followed by a call to e1000e_reset ***
2641 **/
2642void e1000e_power_up_phy(struct e1000_adapter *adapter)
2643{
17f208de
BA		 2644 if (adapter->hw.phy.ops.power_up)
2645 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 2646
2647 adapter->hw.mac.ops.setup_link(&adapter->hw);
2648}
2649
2650/**
2651 * e1000_power_down_phy - Power down the PHY
2652 *
17f208de
BA		 2653 * Power down the PHY so no link is implied when interface is down.
2654 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 2655 */
2656static void e1000_power_down_phy(struct e1000_adapter *adapter)
2657{
bc7f75fa 2658 /* WoL is enabled */
23b66e2b 2659 if (adapter->wol)
bc7f75fa
AK		 2660 return;
2661
17f208de
BA		 2662 if (adapter->hw.phy.ops.power_down)
2663 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 2664}
2665
2666/**
2667 * e1000e_reset - bring the hardware into a known good state
2668 *
2669 * This function boots the hardware and enables some settings that
2670 * require a configuration cycle of the hardware - those cannot be
2671 * set/changed during runtime. After reset the device needs to be
ad68076e 2672 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 2673 */
2674void e1000e_reset(struct e1000_adapter *adapter)
2675{
2676 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2677 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 2678 struct e1000_hw *hw = &adapter->hw;
2679 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2680 u32 pba = adapter->pba;
bc7f75fa
AK		 2681 u16 hwm;
2682
ad68076e 2683 /* reset Packet Buffer Allocation to default */
318a94d6 2684 ew32(PBA, pba);
df762464 2685
318a94d6 2686 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 2687 /*
2688 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 2689 * large enough to accommodate two full transmit packets,
2690 * rounded up to the next 1KB and expressed in KB. Likewise,
2691 * the Rx FIFO should be large enough to accommodate at least
2692 * one full receive packet and is similarly rounded up and
ad68076e
BA		 2693 * expressed in KB.
2694 */
df762464 2695 pba = er32(PBA);
bc7f75fa 2696 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2697 tx_space = pba >> 16;
bc7f75fa 2698 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2699 pba &= 0xffff;
ad68076e
BA		 2700 /*
2701 * the Tx fifo also stores 16 bytes of information about the tx
2702 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 2703 */
2704 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 2705 sizeof(struct e1000_tx_desc) -
2706 ETH_FCS_LEN) * 2;
2707 min_tx_space = ALIGN(min_tx_space, 1024);
2708 min_tx_space >>= 10;
2709 /* software strips receive CRC, so leave room for it */
318a94d6 2710 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 2711 min_rx_space = ALIGN(min_rx_space, 1024);
2712 min_rx_space >>= 10;
2713
ad68076e
BA		 2714 /*
2715 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2716 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 2717 * allocation, take space away from current Rx allocation
2718 */
df762464
AK		 2719 if ((tx_space < min_tx_space) &&
2720 ((min_tx_space - tx_space) < pba)) {
2721 pba -= min_tx_space - tx_space;
bc7f75fa 2722
ad68076e
BA		 2723 /*
2724 * if short on Rx space, Rx wins and must trump tx
2725 * adjustment or use Early Receive if available
2726 */
df762464 2727 if ((pba < min_rx_space) &&
bc7f75fa
AK		 2728 (!(adapter->flags & FLAG_HAS_ERT)))
2729 /* ERT enabled in e1000_configure_rx */
df762464 2730 pba = min_rx_space;
bc7f75fa 2731 }
df762464
AK		 2732
2733 ew32(PBA, pba);
bc7f75fa
AK		 2734 }
2735
bc7f75fa 2736
ad68076e
BA		 2737 /*
2738 * flow control settings
2739 *
38eb394e 2740 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 2741 * (or the size used for early receive) above it in the Rx FIFO.
2742 * Set it to the lower of:
2743 * - 90% of the Rx FIFO size, and
2744 * - the full Rx FIFO size minus the early receive size (for parts
2745 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 2746 * - the full Rx FIFO size minus one full frame
ad68076e 2747 */
38eb394e
BA		 2748 if (hw->mac.type == e1000_pchlan) {
2749 /*
2750 * Workaround PCH LOM adapter hangs with certain network
2751 * loads. If hangs persist, try disabling Tx flow control.
2752 */
2753 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2754 fc->high_water = 0x3500;
2755 fc->low_water = 0x1500;
2756 } else {
2757 fc->high_water = 0x5000;
2758 fc->low_water = 0x3000;
2759 }
2760 } else {
2761 if ((adapter->flags & FLAG_HAS_ERT) &&
2762 (adapter->netdev->mtu > ETH_DATA_LEN))
2763 hwm = min(((pba << 10) * 9 / 10),
2764 ((pba << 10) - (E1000_ERT_2048 << 3)));
2765 else
2766 hwm = min(((pba << 10) * 9 / 10),
2767 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 2768
38eb394e
BA		 2769 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
2770 fc->low_water = fc->high_water - 8;
2771 }
bc7f75fa
AK		 2772
2773 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2774 fc->pause_time = 0xFFFF;
bc7f75fa 2775 else
318a94d6
JK		 2776 fc->pause_time = E1000_FC_PAUSE_TIME;
2777 fc->send_xon = 1;
5c48ef3e 2778 fc->current_mode = fc->requested_mode;
bc7f75fa
AK		 2779
2780 /* Allow time for pending master requests to run */
2781 mac->ops.reset_hw(hw);
97ac8cae
BA		 2782
2783 /*
2784 * For parts with AMT enabled, let the firmware know
2785 * that the network interface is in control
2786 */
c43bc57e 2787 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 2788 e1000_get_hw_control(adapter);
2789
bc7f75fa 2790 ew32(WUC, 0);
a4f58f54
BA		 2791 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
2792 e1e_wphy(&adapter->hw, BM_WUC, 0);
bc7f75fa
AK		 2793
2794 if (mac->ops.init_hw(hw))
44defeb3 2795 e_err("Hardware Error\n");
bc7f75fa 2796
38eb394e
BA		 2797 /* additional part of the flow-control workaround above */
2798 if (hw->mac.type == e1000_pchlan)
2799 ew32(FCRTV_PCH, 0x1000);
2800
bc7f75fa
AK		 2801 e1000_update_mng_vlan(adapter);
2802
2803 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2804 ew32(VET, ETH_P_8021Q);
2805
2806 e1000e_reset_adaptive(hw);
2807 e1000_get_phy_info(hw);
2808
918d7197
BA		 2809 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
2810 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 2811 u16 phy_data = 0;
ad68076e
BA		 2812 /*
2813 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2814 * the return value of this function because there is nothing
ad68076e
BA		 2815 * different we would do if it failed
2816 */
bc7f75fa
AK		 2817 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2818 phy_data &= ~IGP02E1000_PM_SPD;
2819 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2820 }
bc7f75fa
AK		 2821}
2822
2823int e1000e_up(struct e1000_adapter *adapter)
2824{
2825 struct e1000_hw *hw = &adapter->hw;
2826
53ec5498
BA		 2827 /* DMA latency requirement to workaround early-receive/jumbo issue */
2828 if (adapter->flags & FLAG_HAS_ERT)
2829 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY,
2830 adapter->netdev->name,
2831 PM_QOS_DEFAULT_VALUE);
2832
bc7f75fa
AK		 2833 /* hardware has been reset, we need to reload some things */
2834 e1000_configure(adapter);
2835
2836 clear_bit(__E1000_DOWN, &adapter->state);
2837
2838 napi_enable(&adapter->napi);
4662e82b
BA		 2839 if (adapter->msix_entries)
2840 e1000_configure_msix(adapter);
bc7f75fa
AK		 2841 e1000_irq_enable(adapter);
2842
4cb9be7a
JB		 2843 netif_wake_queue(adapter->netdev);
2844
bc7f75fa
AK		 2845 /* fire a link change interrupt to start the watchdog */
2846 ew32(ICS, E1000_ICS_LSC);
2847 return 0;
2848}
2849
2850void e1000e_down(struct e1000_adapter *adapter)
2851{
2852 struct net_device *netdev = adapter->netdev;
2853 struct e1000_hw *hw = &adapter->hw;
2854 u32 tctl, rctl;
2855
ad68076e
BA		 2856 /*
2857 * signal that we're down so the interrupt handler does not
2858 * reschedule our watchdog timer
2859 */
bc7f75fa
AK		 2860 set_bit(__E1000_DOWN, &adapter->state);
2861
2862 /* disable receives in the hardware */
2863 rctl = er32(RCTL);
2864 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2865 /* flush and sleep below */
2866
4cb9be7a 2867 netif_stop_queue(netdev);
bc7f75fa
AK		 2868
2869 /* disable transmits in the hardware */
2870 tctl = er32(TCTL);
2871 tctl &= ~E1000_TCTL_EN;
2872 ew32(TCTL, tctl);
2873 /* flush both disables and wait for them to finish */
2874 e1e_flush();
2875 msleep(10);
2876
2877 napi_disable(&adapter->napi);
2878 e1000_irq_disable(adapter);
2879
2880 del_timer_sync(&adapter->watchdog_timer);
2881 del_timer_sync(&adapter->phy_info_timer);
2882
2883 netdev->tx_queue_len = adapter->tx_queue_len;
2884 netif_carrier_off(netdev);
2885 adapter->link_speed = 0;
2886 adapter->link_duplex = 0;
2887
52cc3086
JK		 2888 if (!pci_channel_offline(adapter->pdev))
2889 e1000e_reset(adapter);
bc7f75fa
AK		 2890 e1000_clean_tx_ring(adapter);
2891 e1000_clean_rx_ring(adapter);
2892
53ec5498
BA		 2893 if (adapter->flags & FLAG_HAS_ERT)
2894 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY,
2895 adapter->netdev->name);
2896
bc7f75fa
AK		 2897 /*
2898 * TODO: for power management, we could drop the link and
2899 * pci_disable_device here.
2900 */
2901}
2902
2903void e1000e_reinit_locked(struct e1000_adapter *adapter)
2904{
2905 might_sleep();
2906 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2907 msleep(1);
2908 e1000e_down(adapter);
2909 e1000e_up(adapter);
2910 clear_bit(__E1000_RESETTING, &adapter->state);
2911}
2912
2913/**
2914 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2915 * @adapter: board private structure to initialize
2916 *
2917 * e1000_sw_init initializes the Adapter private data structure.
2918 * Fields are initialized based on PCI device information and
2919 * OS network device settings (MTU size).
2920 **/
2921static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2922{
bc7f75fa
AK		 2923 struct net_device *netdev = adapter->netdev;
2924
2925 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2926 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 2927 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2928 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 2929
4662e82b 2930 e1000e_set_interrupt_capability(adapter);
bc7f75fa 2931
4662e82b
BA		 2932 if (e1000_alloc_queues(adapter))
2933 return -ENOMEM;
bc7f75fa 2934
bc7f75fa 2935 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 2936 e1000_irq_disable(adapter);
2937
bc7f75fa
AK		 2938 set_bit(__E1000_DOWN, &adapter->state);
2939 return 0;
bc7f75fa
AK		 2940}
2941
f8d59f78
BA		 2942/**
2943 * e1000_intr_msi_test - Interrupt Handler
2944 * @irq: interrupt number
2945 * @data: pointer to a network interface device structure
2946 **/
2947static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2948{
2949 struct net_device *netdev = data;
2950 struct e1000_adapter *adapter = netdev_priv(netdev);
2951 struct e1000_hw *hw = &adapter->hw;
2952 u32 icr = er32(ICR);
2953
3bb99fe2 2954 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 2955 if (icr & E1000_ICR_RXSEQ) {
2956 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2957 wmb();
2958 }
2959
2960 return IRQ_HANDLED;
2961}
2962
2963/**
2964 * e1000_test_msi_interrupt - Returns 0 for successful test
2965 * @adapter: board private struct
2966 *
2967 * code flow taken from tg3.c
2968 **/
2969static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2970{
2971 struct net_device *netdev = adapter->netdev;
2972 struct e1000_hw *hw = &adapter->hw;
2973 int err;
2974
2975 /* poll_enable hasn't been called yet, so don't need disable */
2976 /* clear any pending events */
2977 er32(ICR);
2978
2979 /* free the real vector and request a test handler */
2980 e1000_free_irq(adapter);
4662e82b 2981 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 2982
2983 /* Assume that the test fails, if it succeeds then the test
2984 * MSI irq handler will unset this flag */
2985 adapter->flags |= FLAG_MSI_TEST_FAILED;
2986
2987 err = pci_enable_msi(adapter->pdev);
2988 if (err)
2989 goto msi_test_failed;
2990
a0607fd3 2991 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 2992 netdev->name, netdev);
2993 if (err) {
2994 pci_disable_msi(adapter->pdev);
2995 goto msi_test_failed;
2996 }
2997
2998 wmb();
2999
3000 e1000_irq_enable(adapter);
3001
3002 /* fire an unusual interrupt on the test handler */
3003 ew32(ICS, E1000_ICS_RXSEQ);
3004 e1e_flush();
3005 msleep(50);
3006
3007 e1000_irq_disable(adapter);
3008
3009 rmb();
3010
3011 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3012 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 3013 err = -EIO;
3014 e_info("MSI interrupt test failed!\n");
3015 }
3016
3017 free_irq(adapter->pdev->irq, netdev);
3018 pci_disable_msi(adapter->pdev);
3019
3020 if (err == -EIO)
3021 goto msi_test_failed;
3022
3023 /* okay so the test worked, restore settings */
3bb99fe2 3024 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3025msi_test_failed:
4662e82b 3026 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3027 e1000_request_irq(adapter);
3028 return err;
3029}
3030
3031/**
3032 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3033 * @adapter: board private struct
3034 *
3035 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3036 **/
3037static int e1000_test_msi(struct e1000_adapter *adapter)
3038{
3039 int err;
3040 u16 pci_cmd;
3041
3042 if (!(adapter->flags & FLAG_MSI_ENABLED))
3043 return 0;
3044
3045 /* disable SERR in case the MSI write causes a master abort */
3046 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3047 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3048 pci_cmd & ~PCI_COMMAND_SERR);
3049
3050 err = e1000_test_msi_interrupt(adapter);
3051
3052 /* restore previous setting of command word */
3053 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3054
3055 /* success ! */
3056 if (!err)
3057 return 0;
3058
3059 /* EIO means MSI test failed */
3060 if (err != -EIO)
3061 return err;
3062
3063 /* back to INTx mode */
3064 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3065
3066 e1000_free_irq(adapter);
3067
3068 err = e1000_request_irq(adapter);
3069
3070 return err;
3071}
3072
bc7f75fa
AK		 3073/**
3074 * e1000_open - Called when a network interface is made active
3075 * @netdev: network interface device structure
3076 *
3077 * Returns 0 on success, negative value on failure
3078 *
3079 * The open entry point is called when a network interface is made
3080 * active by the system (IFF_UP). At this point all resources needed
3081 * for transmit and receive operations are allocated, the interrupt
3082 * handler is registered with the OS, the watchdog timer is started,
3083 * and the stack is notified that the interface is ready.
3084 **/
3085static int e1000_open(struct net_device *netdev)
3086{
3087 struct e1000_adapter *adapter = netdev_priv(netdev);
3088 struct e1000_hw *hw = &adapter->hw;
3089 int err;
3090
3091 /* disallow open during test */
3092 if (test_bit(__E1000_TESTING, &adapter->state))
3093 return -EBUSY;
3094
9c563d20
JB		 3095 netif_carrier_off(netdev);
3096
bc7f75fa
AK		 3097 /* allocate transmit descriptors */
3098 err = e1000e_setup_tx_resources(adapter);
3099 if (err)
3100 goto err_setup_tx;
3101
3102 /* allocate receive descriptors */
3103 err = e1000e_setup_rx_resources(adapter);
3104 if (err)
3105 goto err_setup_rx;
3106
3107 e1000e_power_up_phy(adapter);
3108
3109 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3110 if ((adapter->hw.mng_cookie.status &
3111 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3112 e1000_update_mng_vlan(adapter);
3113
ad68076e
BA		 3114 /*
3115 * If AMT is enabled, let the firmware know that the network
3116 * interface is now open
3117 */
c43bc57e 3118 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3119 e1000_get_hw_control(adapter);
3120
ad68076e
BA		 3121 /*
3122 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3123 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3124 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3125 * clean_rx handler before we do so.
3126 */
bc7f75fa
AK		 3127 e1000_configure(adapter);
3128
3129 err = e1000_request_irq(adapter);
3130 if (err)
3131 goto err_req_irq;
3132
f8d59f78
BA		 3133 /*
3134 * Work around PCIe errata with MSI interrupts causing some chipsets to
3135 * ignore e1000e MSI messages, which means we need to test our MSI
3136 * interrupt now
3137 */
4662e82b 3138 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3139 err = e1000_test_msi(adapter);
3140 if (err) {
3141 e_err("Interrupt allocation failed\n");
3142 goto err_req_irq;
3143 }
3144 }
3145
bc7f75fa
AK		 3146 /* From here on the code is the same as e1000e_up() */
3147 clear_bit(__E1000_DOWN, &adapter->state);
3148
3149 napi_enable(&adapter->napi);
3150
3151 e1000_irq_enable(adapter);
3152
4cb9be7a 3153 netif_start_queue(netdev);
d55b53ff 3154
bc7f75fa
AK		 3155 /* fire a link status change interrupt to start the watchdog */
3156 ew32(ICS, E1000_ICS_LSC);
3157
3158 return 0;
3159
3160err_req_irq:
3161 e1000_release_hw_control(adapter);
3162 e1000_power_down_phy(adapter);
3163 e1000e_free_rx_resources(adapter);
3164err_setup_rx:
3165 e1000e_free_tx_resources(adapter);
3166err_setup_tx:
3167 e1000e_reset(adapter);
3168
3169 return err;
3170}
3171
3172/**
3173 * e1000_close - Disables a network interface
3174 * @netdev: network interface device structure
3175 *
3176 * Returns 0, this is not allowed to fail
3177 *
3178 * The close entry point is called when an interface is de-activated
3179 * by the OS. The hardware is still under the drivers control, but
3180 * needs to be disabled. A global MAC reset is issued to stop the
3181 * hardware, and all transmit and receive resources are freed.
3182 **/
3183static int e1000_close(struct net_device *netdev)
3184{
3185 struct e1000_adapter *adapter = netdev_priv(netdev);
3186
3187 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3188 e1000e_down(adapter);
3189 e1000_power_down_phy(adapter);
3190 e1000_free_irq(adapter);
3191
3192 e1000e_free_tx_resources(adapter);
3193 e1000e_free_rx_resources(adapter);
3194
ad68076e
BA		 3195 /*
3196 * kill manageability vlan ID if supported, but not if a vlan with
3197 * the same ID is registered on the host OS (let 8021q kill it)
3198 */
bc7f75fa
AK		 3199 if ((adapter->hw.mng_cookie.status &
3200 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3201 !(adapter->vlgrp &&
3202 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3203 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3204
ad68076e
BA		 3205 /*
3206 * If AMT is enabled, let the firmware know that the network
3207 * interface is now closed
3208 */
c43bc57e 3209 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3210 e1000_release_hw_control(adapter);
3211
3212 return 0;
3213}
3214/**
3215 * e1000_set_mac - Change the Ethernet Address of the NIC
3216 * @netdev: network interface device structure
3217 * @p: pointer to an address structure
3218 *
3219 * Returns 0 on success, negative on failure
3220 **/
3221static int e1000_set_mac(struct net_device *netdev, void *p)
3222{
3223 struct e1000_adapter *adapter = netdev_priv(netdev);
3224 struct sockaddr *addr = p;
3225
3226 if (!is_valid_ether_addr(addr->sa_data))
3227 return -EADDRNOTAVAIL;
3228
3229 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3230 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3231
3232 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3233
3234 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3235 /* activate the work around */
3236 e1000e_set_laa_state_82571(&adapter->hw, 1);
3237
ad68076e
BA		 3238 /*
3239 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3240 * between the time RAR[0] gets clobbered and the time it
3241 * gets fixed (in e1000_watchdog), the actual LAA is in one
3242 * of the RARs and no incoming packets directed to this port
3243 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3244 * RAR[14]
3245 */
bc7f75fa
AK		 3246 e1000e_rar_set(&adapter->hw,
3247 adapter->hw.mac.addr,
3248 adapter->hw.mac.rar_entry_count - 1);
3249 }
3250
3251 return 0;
3252}
3253
a8f88ff5
JB		 3254/**
3255 * e1000e_update_phy_task - work thread to update phy
3256 * @work: pointer to our work struct
3257 *
3258 * this worker thread exists because we must acquire a
3259 * semaphore to read the phy, which we could msleep while
3260 * waiting for it, and we can't msleep in a timer.
3261 **/
3262static void e1000e_update_phy_task(struct work_struct *work)
3263{
3264 struct e1000_adapter *adapter = container_of(work,
3265 struct e1000_adapter, update_phy_task);
3266 e1000_get_phy_info(&adapter->hw);
3267}
3268
ad68076e
BA		 3269/*
3270 * Need to wait a few seconds after link up to get diagnostic information from
3271 * the phy
3272 */
bc7f75fa
AK		 3273static void e1000_update_phy_info(unsigned long data)
3274{
3275 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3276 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3277}
3278
3279/**
3280 * e1000e_update_stats - Update the board statistics counters
3281 * @adapter: board private structure
3282 **/
3283void e1000e_update_stats(struct e1000_adapter *adapter)
3284{
7274c20f 3285 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3286 struct e1000_hw *hw = &adapter->hw;
3287 struct pci_dev *pdev = adapter->pdev;
a4f58f54 3288 u16 phy_data;
bc7f75fa
AK		 3289
3290 /*
3291 * Prevent stats update while adapter is being reset, or if the pci
3292 * connection is down.
3293 */
3294 if (adapter->link_speed == 0)
3295 return;
3296 if (pci_channel_offline(pdev))
3297 return;
3298
bc7f75fa
AK		 3299 adapter->stats.crcerrs += er32(CRCERRS);
3300 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3301 adapter->stats.gorc += er32(GORCL);
3302 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3303 adapter->stats.bprc += er32(BPRC);
3304 adapter->stats.mprc += er32(MPRC);
3305 adapter->stats.roc += er32(ROC);
3306
bc7f75fa 3307 adapter->stats.mpc += er32(MPC);
a4f58f54
BA		 3308 if ((hw->phy.type == e1000_phy_82578) ||
3309 (hw->phy.type == e1000_phy_82577)) {
3310 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
3311 e1e_rphy(hw, HV_SCC_LOWER, &phy_data);
3312 adapter->stats.scc += phy_data;
3313
3314 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
3315 e1e_rphy(hw, HV_ECOL_LOWER, &phy_data);
3316 adapter->stats.ecol += phy_data;
3317
3318 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
3319 e1e_rphy(hw, HV_MCC_LOWER, &phy_data);
3320 adapter->stats.mcc += phy_data;
3321
3322 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
3323 e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data);
3324 adapter->stats.latecol += phy_data;
3325
3326 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
3327 e1e_rphy(hw, HV_DC_LOWER, &phy_data);
3328 adapter->stats.dc += phy_data;
3329 } else {
3330 adapter->stats.scc += er32(SCC);
3331 adapter->stats.ecol += er32(ECOL);
3332 adapter->stats.mcc += er32(MCC);
3333 adapter->stats.latecol += er32(LATECOL);
3334 adapter->stats.dc += er32(DC);
3335 }
bc7f75fa
AK		 3336 adapter->stats.xonrxc += er32(XONRXC);
3337 adapter->stats.xontxc += er32(XONTXC);
3338 adapter->stats.xoffrxc += er32(XOFFRXC);
3339 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3340 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3341 adapter->stats.gotc += er32(GOTCL);
3342 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3343 adapter->stats.rnbc += er32(RNBC);
3344 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3345
3346 adapter->stats.mptc += er32(MPTC);
3347 adapter->stats.bptc += er32(BPTC);
3348
3349 /* used for adaptive IFS */
3350
3351 hw->mac.tx_packet_delta = er32(TPT);
3352 adapter->stats.tpt += hw->mac.tx_packet_delta;
a4f58f54
BA		 3353 if ((hw->phy.type == e1000_phy_82578) ||
3354 (hw->phy.type == e1000_phy_82577)) {
3355 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
3356 e1e_rphy(hw, HV_COLC_LOWER, &phy_data);
3357 hw->mac.collision_delta = phy_data;
3358 } else {
3359 hw->mac.collision_delta = er32(COLC);
3360 }
bc7f75fa
AK		 3361 adapter->stats.colc += hw->mac.collision_delta;
3362
3363 adapter->stats.algnerrc += er32(ALGNERRC);
3364 adapter->stats.rxerrc += er32(RXERRC);
a4f58f54
BA		 3365 if ((hw->phy.type == e1000_phy_82578) ||
3366 (hw->phy.type == e1000_phy_82577)) {
3367 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
3368 e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data);
3369 adapter->stats.tncrs += phy_data;
3370 } else {
3371 if ((hw->mac.type != e1000_82574) &&
3372 (hw->mac.type != e1000_82583))
3373 adapter->stats.tncrs += er32(TNCRS);
3374 }
bc7f75fa
AK		 3375 adapter->stats.cexterr += er32(CEXTERR);
3376 adapter->stats.tsctc += er32(TSCTC);
3377 adapter->stats.tsctfc += er32(TSCTFC);
3378
bc7f75fa 3379 /* Fill out the OS statistics structure */
7274c20f
AK		 3380 netdev->stats.multicast = adapter->stats.mprc;
3381 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3382
3383 /* Rx Errors */
3384
ad68076e
BA		 3385 /*
3386 * RLEC on some newer hardware can be incorrect so build
3387 * our own version based on RUC and ROC
3388 */
7274c20f 3389 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3390 adapter->stats.crcerrs + adapter->stats.algnerrc +
3391 adapter->stats.ruc + adapter->stats.roc +
3392 adapter->stats.cexterr;
7274c20f 3393 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3394 adapter->stats.roc;
7274c20f
AK		 3395 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3396 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3397 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3398
3399 /* Tx Errors */
7274c20f 3400 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3401 adapter->stats.latecol;
7274c20f
AK		 3402 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3403 netdev->stats.tx_window_errors = adapter->stats.latecol;
3404 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3405
3406 /* Tx Dropped needs to be maintained elsewhere */
3407
bc7f75fa
AK		 3408 /* Management Stats */
3409 adapter->stats.mgptc += er32(MGTPTC);
3410 adapter->stats.mgprc += er32(MGTPRC);
3411 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3412}
3413
7c25769f
BA		 3414/**
3415 * e1000_phy_read_status - Update the PHY register status snapshot
3416 * @adapter: board private structure
3417 **/
3418static void e1000_phy_read_status(struct e1000_adapter *adapter)
3419{
3420 struct e1000_hw *hw = &adapter->hw;
3421 struct e1000_phy_regs *phy = &adapter->phy_regs;
3422 int ret_val;
7c25769f
BA		 3423
3424 if ((er32(STATUS) & E1000_STATUS_LU) &&
3425 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3426 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3427 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3428 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3429 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3430 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3431 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3432 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3433 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3434 if (ret_val)
44defeb3 3435 e_warn("Error reading PHY register\n");
7c25769f
BA		 3436 } else {
3437 /*
3438 * Do not read PHY registers if link is not up
3439 * Set values to typical power-on defaults
3440 */
3441 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3442 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3443 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3444 BMSR_ERCAP);
3445 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3446 ADVERTISE_ALL | ADVERTISE_CSMA);
3447 phy->lpa = 0;
3448 phy->expansion = EXPANSION_ENABLENPAGE;
3449 phy->ctrl1000 = ADVERTISE_1000FULL;
3450 phy->stat1000 = 0;
3451 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3452 }
7c25769f
BA		 3453}
3454
bc7f75fa
AK		 3455static void e1000_print_link_info(struct e1000_adapter *adapter)
3456{
bc7f75fa
AK		 3457 struct e1000_hw *hw = &adapter->hw;
3458 u32 ctrl = er32(CTRL);
3459
8f12fe86
BA		 3460 /* Link status message must follow this format for user tools */
3461 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3462 "Flow Control: %s\n",
3463 adapter->netdev->name,
44defeb3
JK		 3464 adapter->link_speed,
3465 (adapter->link_duplex == FULL_DUPLEX) ?
3466 "Full Duplex" : "Half Duplex",
3467 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3468 "RX/TX" :
3469 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3470 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3471}
3472
a20e4cf9 3473bool e1000_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3474{
3475 struct e1000_hw *hw = &adapter->hw;
3476 bool link_active = 0;
3477 s32 ret_val = 0;
3478
3479 /*
3480 * get_link_status is set on LSC (link status) interrupt or
3481 * Rx sequence error interrupt. get_link_status will stay
3482 * false until the check_for_link establishes link
3483 * for copper adapters ONLY
3484 */
3485 switch (hw->phy.media_type) {
3486 case e1000_media_type_copper:
3487 if (hw->mac.get_link_status) {
3488 ret_val = hw->mac.ops.check_for_link(hw);
3489 link_active = !hw->mac.get_link_status;
3490 } else {
3491 link_active = 1;
3492 }
3493 break;
3494 case e1000_media_type_fiber:
3495 ret_val = hw->mac.ops.check_for_link(hw);
3496 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3497 break;
3498 case e1000_media_type_internal_serdes:
3499 ret_val = hw->mac.ops.check_for_link(hw);
3500 link_active = adapter->hw.mac.serdes_has_link;
3501 break;
3502 default:
3503 case e1000_media_type_unknown:
3504 break;
3505 }
3506
3507 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3508 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3509 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3510 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 3511 }
3512
3513 return link_active;
3514}
3515
3516static void e1000e_enable_receives(struct e1000_adapter *adapter)
3517{
3518 /* make sure the receive unit is started */
3519 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3520 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3521 struct e1000_hw *hw = &adapter->hw;
3522 u32 rctl = er32(RCTL);
3523 ew32(RCTL, rctl | E1000_RCTL_EN);
3524 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3525 }
3526}
3527
bc7f75fa
AK		 3528/**
3529 * e1000_watchdog - Timer Call-back
3530 * @data: pointer to adapter cast into an unsigned long
3531 **/
3532static void e1000_watchdog(unsigned long data)
3533{
3534 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3535
3536 /* Do the rest outside of interrupt context */
3537 schedule_work(&adapter->watchdog_task);
3538
3539 /* TODO: make this use queue_delayed_work() */
3540}
3541
3542static void e1000_watchdog_task(struct work_struct *work)
3543{
3544 struct e1000_adapter *adapter = container_of(work,
3545 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 3546 struct net_device *netdev = adapter->netdev;
3547 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3548 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 3549 struct e1000_ring *tx_ring = adapter->tx_ring;
3550 struct e1000_hw *hw = &adapter->hw;
3551 u32 link, tctl;
bc7f75fa
AK		 3552 int tx_pending = 0;
3553
318a94d6
JK		 3554 link = e1000_has_link(adapter);
3555 if ((netif_carrier_ok(netdev)) && link) {
3556 e1000e_enable_receives(adapter);
bc7f75fa 3557 goto link_up;
bc7f75fa
AK		 3558 }
3559
3560 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3561 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3562 e1000_update_mng_vlan(adapter);
3563
bc7f75fa
AK		 3564 if (link) {
3565 if (!netif_carrier_ok(netdev)) {
3566 bool txb2b = 1;
318a94d6 3567 /* update snapshot of PHY registers on LSC */
7c25769f 3568 e1000_phy_read_status(adapter);
bc7f75fa
AK		 3569 mac->ops.get_link_up_info(&adapter->hw,
3570 &adapter->link_speed,
3571 &adapter->link_duplex);
3572 e1000_print_link_info(adapter);
f4187b56
BA		 3573 /*
3574 * On supported PHYs, check for duplex mismatch only
3575 * if link has autonegotiated at 10/100 half
3576 */
3577 if ((hw->phy.type == e1000_phy_igp_3 ||
3578 hw->phy.type == e1000_phy_bm) &&
3579 (hw->mac.autoneg == true) &&
3580 (adapter->link_speed == SPEED_10 ||
3581 adapter->link_speed == SPEED_100) &&
3582 (adapter->link_duplex == HALF_DUPLEX)) {
3583 u16 autoneg_exp;
3584
3585 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3586
3587 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3588 e_info("Autonegotiated half duplex but"
3589 " link partner cannot autoneg. "
3590 " Try forcing full duplex if "
3591 "link gets many collisions.\n");
3592 }
3593
ad68076e
BA		 3594 /*
3595 * tweak tx_queue_len according to speed/duplex
3596 * and adjust the timeout factor
3597 */
bc7f75fa
AK		 3598 netdev->tx_queue_len = adapter->tx_queue_len;
3599 adapter->tx_timeout_factor = 1;
3600 switch (adapter->link_speed) {
3601 case SPEED_10:
3602 txb2b = 0;
3603 netdev->tx_queue_len = 10;
10f1b492 3604 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 3605 break;
3606 case SPEED_100:
3607 txb2b = 0;
3608 netdev->tx_queue_len = 100;
4c86e0b9 3609 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 3610 break;
3611 }
3612
ad68076e
BA		 3613 /*
3614 * workaround: re-program speed mode bit after
3615 * link-up event
3616 */
bc7f75fa
AK		 3617 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3618 !txb2b) {
3619 u32 tarc0;
e9ec2c0f 3620 tarc0 = er32(TARC(0));
bc7f75fa 3621 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3622 ew32(TARC(0), tarc0);
bc7f75fa
AK		 3623 }
3624
ad68076e
BA		 3625 /*
3626 * disable TSO for pcie and 10/100 speeds, to avoid
3627 * some hardware issues
3628 */
bc7f75fa
AK		 3629 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3630 switch (adapter->link_speed) {
3631 case SPEED_10:
3632 case SPEED_100:
44defeb3 3633 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 3634 netdev->features &= ~NETIF_F_TSO;
3635 netdev->features &= ~NETIF_F_TSO6;
3636 break;
3637 case SPEED_1000:
3638 netdev->features |= NETIF_F_TSO;
3639 netdev->features |= NETIF_F_TSO6;
3640 break;
3641 default:
3642 /* oops */
3643 break;
3644 }
3645 }
3646
ad68076e
BA		 3647 /*
3648 * enable transmits in the hardware, need to do this
3649 * after setting TARC(0)
3650 */
bc7f75fa
AK		 3651 tctl = er32(TCTL);
3652 tctl |= E1000_TCTL_EN;
3653 ew32(TCTL, tctl);
3654
75eb0fad
BA		 3655 /*
3656 * Perform any post-link-up configuration before
3657 * reporting link up.
3658 */
3659 if (phy->ops.cfg_on_link_up)
3660 phy->ops.cfg_on_link_up(hw);
3661
bc7f75fa 3662 netif_carrier_on(netdev);
bc7f75fa
AK		 3663
3664 if (!test_bit(__E1000_DOWN, &adapter->state))
3665 mod_timer(&adapter->phy_info_timer,
3666 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 3667 }
3668 } else {
3669 if (netif_carrier_ok(netdev)) {
3670 adapter->link_speed = 0;
3671 adapter->link_duplex = 0;
8f12fe86
BA		 3672 /* Link status message must follow this format */
3673 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3674 adapter->netdev->name);
bc7f75fa 3675 netif_carrier_off(netdev);
bc7f75fa
AK		 3676 if (!test_bit(__E1000_DOWN, &adapter->state))
3677 mod_timer(&adapter->phy_info_timer,
3678 round_jiffies(jiffies + 2 * HZ));
3679
3680 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3681 schedule_work(&adapter->reset_task);
3682 }
3683 }
3684
3685link_up:
3686 e1000e_update_stats(adapter);
3687
3688 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3689 adapter->tpt_old = adapter->stats.tpt;
3690 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3691 adapter->colc_old = adapter->stats.colc;
3692
7c25769f
BA		 3693 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3694 adapter->gorc_old = adapter->stats.gorc;
3695 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3696 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 3697
3698 e1000e_update_adaptive(&adapter->hw);
3699
3700 if (!netif_carrier_ok(netdev)) {
3701 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3702 tx_ring->count);
3703 if (tx_pending) {
ad68076e
BA		 3704 /*
3705 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 3706 * but we've got queued Tx work that's never going
3707 * to get done, so reset controller to flush Tx.
ad68076e
BA		 3708 * (Do the reset outside of interrupt context).
3709 */
bc7f75fa
AK		 3710 adapter->tx_timeout_count++;
3711 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 3712 /* return immediately since reset is imminent */
3713 return;
bc7f75fa
AK		 3714 }
3715 }
3716
ad68076e 3717 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 3718 if (adapter->msix_entries)
3719 ew32(ICS, adapter->rx_ring->ims_val);
3720 else
3721 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 3722
3723 /* Force detection of hung controller every watchdog period */
3724 adapter->detect_tx_hung = 1;
3725
ad68076e
BA		 3726 /*
3727 * With 82571 controllers, LAA may be overwritten due to controller
3728 * reset from the other port. Set the appropriate LAA in RAR[0]
3729 */
bc7f75fa
AK		 3730 if (e1000e_get_laa_state_82571(hw))
3731 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3732
3733 /* Reset the timer */
3734 if (!test_bit(__E1000_DOWN, &adapter->state))
3735 mod_timer(&adapter->watchdog_timer,
3736 round_jiffies(jiffies + 2 * HZ));
3737}
3738
3739#define E1000_TX_FLAGS_CSUM 0x00000001
3740#define E1000_TX_FLAGS_VLAN 0x00000002
3741#define E1000_TX_FLAGS_TSO 0x00000004
3742#define E1000_TX_FLAGS_IPV4 0x00000008
3743#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3744#define E1000_TX_FLAGS_VLAN_SHIFT 16
3745
3746static int e1000_tso(struct e1000_adapter *adapter,
3747 struct sk_buff *skb)
3748{
3749 struct e1000_ring *tx_ring = adapter->tx_ring;
3750 struct e1000_context_desc *context_desc;
3751 struct e1000_buffer *buffer_info;
3752 unsigned int i;
3753 u32 cmd_length = 0;
3754 u16 ipcse = 0, tucse, mss;
3755 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3756 int err;
3757
3d5e33c9
BA		 3758 if (!skb_is_gso(skb))
3759 return 0;
bc7f75fa 3760
3d5e33c9
BA		 3761 if (skb_header_cloned(skb)) {
3762 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3763 if (err)
3764 return err;
bc7f75fa
AK		 3765 }
3766
3d5e33c9
BA		 3767 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3768 mss = skb_shinfo(skb)->gso_size;
3769 if (skb->protocol == htons(ETH_P_IP)) {
3770 struct iphdr *iph = ip_hdr(skb);
3771 iph->tot_len = 0;
3772 iph->check = 0;
3773 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
3774 0, IPPROTO_TCP, 0);
3775 cmd_length = E1000_TXD_CMD_IP;
3776 ipcse = skb_transport_offset(skb) - 1;
3777 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3778 ipv6_hdr(skb)->payload_len = 0;
3779 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3780 &ipv6_hdr(skb)->daddr,
3781 0, IPPROTO_TCP, 0);
3782 ipcse = 0;
3783 }
3784 ipcss = skb_network_offset(skb);
3785 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3786 tucss = skb_transport_offset(skb);
3787 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3788 tucse = 0;
3789
3790 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3791 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3792
3793 i = tx_ring->next_to_use;
3794 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3795 buffer_info = &tx_ring->buffer_info[i];
3796
3797 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3798 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3799 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3800 context_desc->upper_setup.tcp_fields.tucss = tucss;
3801 context_desc->upper_setup.tcp_fields.tucso = tucso;
3802 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3803 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3804 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3805 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3806
3807 buffer_info->time_stamp = jiffies;
3808 buffer_info->next_to_watch = i;
3809
3810 i++;
3811 if (i == tx_ring->count)
3812 i = 0;
3813 tx_ring->next_to_use = i;
3814
3815 return 1;
bc7f75fa
AK		 3816}
3817
3818static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3819{
3820 struct e1000_ring *tx_ring = adapter->tx_ring;
3821 struct e1000_context_desc *context_desc;
3822 struct e1000_buffer *buffer_info;
3823 unsigned int i;
3824 u8 css;
af807c82 3825 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 3826 __be16 protocol;
bc7f75fa 3827
af807c82
DG		 3828 if (skb->ip_summed != CHECKSUM_PARTIAL)
3829 return 0;
bc7f75fa 3830
5f66f208
AJ		 3831 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
3832 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
3833 else
3834 protocol = skb->protocol;
3835
3f518390 3836 switch (protocol) {
09640e63 3837 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 3838 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3839 cmd_len |= E1000_TXD_CMD_TCP;
3840 break;
09640e63 3841 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 3842 /* XXX not handling all IPV6 headers */
3843 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3844 cmd_len |= E1000_TXD_CMD_TCP;
3845 break;
3846 default:
3847 if (unlikely(net_ratelimit()))
5f66f208
AJ		 3848 e_warn("checksum_partial proto=%x!\n",
3849 be16_to_cpu(protocol));
af807c82 3850 break;
bc7f75fa
AK		 3851 }
3852
af807c82
DG		 3853 css = skb_transport_offset(skb);
3854
3855 i = tx_ring->next_to_use;
3856 buffer_info = &tx_ring->buffer_info[i];
3857 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3858
3859 context_desc->lower_setup.ip_config = 0;
3860 context_desc->upper_setup.tcp_fields.tucss = css;
3861 context_desc->upper_setup.tcp_fields.tucso =
3862 css + skb->csum_offset;
3863 context_desc->upper_setup.tcp_fields.tucse = 0;
3864 context_desc->tcp_seg_setup.data = 0;
3865 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
3866
3867 buffer_info->time_stamp = jiffies;
3868 buffer_info->next_to_watch = i;
3869
3870 i++;
3871 if (i == tx_ring->count)
3872 i = 0;
3873 tx_ring->next_to_use = i;
3874
3875 return 1;
bc7f75fa
AK		 3876}
3877
3878#define E1000_MAX_PER_TXD 8192
3879#define E1000_MAX_TXD_PWR 12
3880
3881static int e1000_tx_map(struct e1000_adapter *adapter,
3882 struct sk_buff *skb, unsigned int first,
3883 unsigned int max_per_txd, unsigned int nr_frags,
3884 unsigned int mss)
3885{
3886 struct e1000_ring *tx_ring = adapter->tx_ring;
1b7719c4 3887 struct e1000_buffer *buffer_info;
8ddc951c
JB		 3888 unsigned int len = skb_headlen(skb);
3889 unsigned int offset, size, count = 0, i;
bc7f75fa 3890 unsigned int f;
1b7719c4 3891 dma_addr_t *map;
bc7f75fa
AK		 3892
3893 i = tx_ring->next_to_use;
3894
8ddc951c
JB		 3895 if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
3896 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
3897 adapter->tx_dma_failed++;
1b7719c4 3898 return 0;
8ddc951c
JB		 3899 }
3900
1b7719c4 3901 map = skb_shinfo(skb)->dma_maps;
8ddc951c
JB		 3902 offset = 0;
3903
bc7f75fa 3904 while (len) {
1b7719c4 3905 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 3906 size = min(len, max_per_txd);
3907
bc7f75fa 3908 buffer_info->length = size;
bc7f75fa 3909 buffer_info->time_stamp = jiffies;
bc7f75fa 3910 buffer_info->next_to_watch = i;
042a53a9 3911 buffer_info->dma = skb_shinfo(skb)->dma_head + offset;
1b7719c4 3912 count++;
bc7f75fa
AK		 3913
3914 len -= size;
3915 offset += size;
1b7719c4
AD		 3916
3917 if (len) {
3918 i++;
3919 if (i == tx_ring->count)
3920 i = 0;
3921 }
bc7f75fa
AK		 3922 }
3923
3924 for (f = 0; f < nr_frags; f++) {
3925 struct skb_frag_struct *frag;
3926
3927 frag = &skb_shinfo(skb)->frags[f];
3928 len = frag->size;
8ddc951c 3929 offset = 0;
bc7f75fa
AK		 3930
3931 while (len) {
1b7719c4
AD		 3932 i++;
3933 if (i == tx_ring->count)
3934 i = 0;
3935
bc7f75fa
AK		 3936 buffer_info = &tx_ring->buffer_info[i];
3937 size = min(len, max_per_txd);
bc7f75fa
AK		 3938
3939 buffer_info->length = size;
3940 buffer_info->time_stamp = jiffies;
bc7f75fa 3941 buffer_info->next_to_watch = i;
042a53a9 3942 buffer_info->dma = map[f] + offset;
bc7f75fa
AK		 3943
3944 len -= size;
3945 offset += size;
3946 count++;
bc7f75fa
AK		 3947 }
3948 }
3949
bc7f75fa
AK		 3950 tx_ring->buffer_info[i].skb = skb;
3951 tx_ring->buffer_info[first].next_to_watch = i;
3952
3953 return count;
3954}
3955
3956static void e1000_tx_queue(struct e1000_adapter *adapter,
3957 int tx_flags, int count)
3958{
3959 struct e1000_ring *tx_ring = adapter->tx_ring;
3960 struct e1000_tx_desc *tx_desc = NULL;
3961 struct e1000_buffer *buffer_info;
3962 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3963 unsigned int i;
3964
3965 if (tx_flags & E1000_TX_FLAGS_TSO) {
3966 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3967 E1000_TXD_CMD_TSE;
3968 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3969
3970 if (tx_flags & E1000_TX_FLAGS_IPV4)
3971 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3972 }
3973
3974 if (tx_flags & E1000_TX_FLAGS_CSUM) {
3975 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3976 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3977 }
3978
3979 if (tx_flags & E1000_TX_FLAGS_VLAN) {
3980 txd_lower |= E1000_TXD_CMD_VLE;
3981 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3982 }
3983
3984 i = tx_ring->next_to_use;
3985
3986 while (count--) {
3987 buffer_info = &tx_ring->buffer_info[i];
3988 tx_desc = E1000_TX_DESC(*tx_ring, i);
3989 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3990 tx_desc->lower.data =
3991 cpu_to_le32(txd_lower | buffer_info->length);
3992 tx_desc->upper.data = cpu_to_le32(txd_upper);
3993
3994 i++;
3995 if (i == tx_ring->count)
3996 i = 0;
3997 }
3998
3999 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4000
ad68076e
BA		 4001 /*
4002 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4003 * know there are new descriptors to fetch. (Only
4004 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4005 * such as IA-64).
4006 */
bc7f75fa
AK		 4007 wmb();
4008
4009 tx_ring->next_to_use = i;
4010 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4011 /*
4012 * we need this if more than one processor can write to our tail
4013 * at a time, it synchronizes IO on IA64/Altix systems
4014 */
bc7f75fa
AK		 4015 mmiowb();
4016}
4017
4018#define MINIMUM_DHCP_PACKET_SIZE 282
4019static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4020 struct sk_buff *skb)
4021{
4022 struct e1000_hw *hw = &adapter->hw;
4023 u16 length, offset;
4024
4025 if (vlan_tx_tag_present(skb)) {
4026 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id)
4027 && (adapter->hw.mng_cookie.status &
4028 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4029 return 0;
4030 }
4031
4032 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4033 return 0;
4034
4035 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4036 return 0;
4037
4038 {
4039 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4040 struct udphdr *udp;
4041
4042 if (ip->protocol != IPPROTO_UDP)
4043 return 0;
4044
4045 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4046 if (ntohs(udp->dest) != 67)
4047 return 0;
4048
4049 offset = (u8 *)udp + 8 - skb->data;
4050 length = skb->len - offset;
4051 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4052 }
4053
4054 return 0;
4055}
4056
4057static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4058{
4059 struct e1000_adapter *adapter = netdev_priv(netdev);
4060
4061 netif_stop_queue(netdev);
ad68076e
BA		 4062 /*
4063 * Herbert's original patch had:
bc7f75fa 4064 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4065 * but since that doesn't exist yet, just open code it.
4066 */
bc7f75fa
AK		 4067 smp_mb();
4068
ad68076e
BA		 4069 /*
4070 * We need to check again in a case another CPU has just
4071 * made room available.
4072 */
bc7f75fa
AK		 4073 if (e1000_desc_unused(adapter->tx_ring) < size)
4074 return -EBUSY;
4075
4076 /* A reprieve! */
4077 netif_start_queue(netdev);
4078 ++adapter->restart_queue;
4079 return 0;
4080}
4081
4082static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4083{
4084 struct e1000_adapter *adapter = netdev_priv(netdev);
4085
4086 if (e1000_desc_unused(adapter->tx_ring) >= size)
4087 return 0;
4088 return __e1000_maybe_stop_tx(netdev, size);
4089}
4090
4091#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4092static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4093 struct net_device *netdev)
bc7f75fa
AK		 4094{
4095 struct e1000_adapter *adapter = netdev_priv(netdev);
4096 struct e1000_ring *tx_ring = adapter->tx_ring;
4097 unsigned int first;
4098 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4099 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4100 unsigned int tx_flags = 0;
4e6c709c 4101 unsigned int len = skb->len - skb->data_len;
4e6c709c
AK		 4102 unsigned int nr_frags;
4103 unsigned int mss;
bc7f75fa
AK		 4104 int count = 0;
4105 int tso;
4106 unsigned int f;
bc7f75fa
AK		 4107
4108 if (test_bit(__E1000_DOWN, &adapter->state)) {
4109 dev_kfree_skb_any(skb);
4110 return NETDEV_TX_OK;
4111 }
4112
4113 if (skb->len <= 0) {
4114 dev_kfree_skb_any(skb);
4115 return NETDEV_TX_OK;
4116 }
4117
4118 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4119 /*
4120 * The controller does a simple calculation to
bc7f75fa
AK		 4121 * make sure there is enough room in the FIFO before
4122 * initiating the DMA for each buffer. The calc is:
4123 * 4 = ceil(buffer len/mss). To make sure we don't
4124 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4125 * drops.
4126 */
bc7f75fa
AK		 4127 if (mss) {
4128 u8 hdr_len;
4129 max_per_txd = min(mss << 2, max_per_txd);
4130 max_txd_pwr = fls(max_per_txd) - 1;
4131
ad68076e
BA		 4132 /*
4133 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4134 * points to just header, pull a few bytes of payload from
4135 * frags into skb->data
4136 */
bc7f75fa 4137 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4138 /*
4139 * we do this workaround for ES2LAN, but it is un-necessary,
4140 * avoiding it could save a lot of cycles
4141 */
4e6c709c 4142 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4143 unsigned int pull_size;
4144
4145 pull_size = min((unsigned int)4, skb->data_len);
4146 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4147 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4148 dev_kfree_skb_any(skb);
4149 return NETDEV_TX_OK;
4150 }
4151 len = skb->len - skb->data_len;
4152 }
4153 }
4154
4155 /* reserve a descriptor for the offload context */
4156 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4157 count++;
4158 count++;
4159
4160 count += TXD_USE_COUNT(len, max_txd_pwr);
4161
4162 nr_frags = skb_shinfo(skb)->nr_frags;
4163 for (f = 0; f < nr_frags; f++)
4164 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4165 max_txd_pwr);
4166
4167 if (adapter->hw.mac.tx_pkt_filtering)
4168 e1000_transfer_dhcp_info(adapter, skb);
4169
ad68076e
BA		 4170 /*
4171 * need: count + 2 desc gap to keep tail from touching
4172 * head, otherwise try next time
4173 */
92af3e95 4174 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4175 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4176
4177 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4178 tx_flags |= E1000_TX_FLAGS_VLAN;
4179 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4180 }
4181
4182 first = tx_ring->next_to_use;
4183
4184 tso = e1000_tso(adapter, skb);
4185 if (tso < 0) {
4186 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4187 return NETDEV_TX_OK;
4188 }
4189
4190 if (tso)
4191 tx_flags |= E1000_TX_FLAGS_TSO;
4192 else if (e1000_tx_csum(adapter, skb))
4193 tx_flags |= E1000_TX_FLAGS_CSUM;
4194
ad68076e
BA		 4195 /*
4196 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4197 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4198 * no longer assume, we must.
4199 */
bc7f75fa
AK		 4200 if (skb->protocol == htons(ETH_P_IP))
4201 tx_flags |= E1000_TX_FLAGS_IPV4;
4202
1b7719c4 4203 /* if count is 0 then mapping error has occured */
bc7f75fa 4204 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4205 if (count) {
4206 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4207 /* Make sure there is space in the ring for the next send. */
4208 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4209
4210 } else {
bc7f75fa 4211 dev_kfree_skb_any(skb);
1b7719c4
AD		 4212 tx_ring->buffer_info[first].time_stamp = 0;
4213 tx_ring->next_to_use = first;
bc7f75fa
AK		 4214 }
4215
bc7f75fa
AK		 4216 return NETDEV_TX_OK;
4217}
4218
4219/**
4220 * e1000_tx_timeout - Respond to a Tx Hang
4221 * @netdev: network interface device structure
4222 **/
4223static void e1000_tx_timeout(struct net_device *netdev)
4224{
4225 struct e1000_adapter *adapter = netdev_priv(netdev);
4226
4227 /* Do the reset outside of interrupt context */
4228 adapter->tx_timeout_count++;
4229 schedule_work(&adapter->reset_task);
4230}
4231
4232static void e1000_reset_task(struct work_struct *work)
4233{
4234 struct e1000_adapter *adapter;
4235 adapter = container_of(work, struct e1000_adapter, reset_task);
4236
4237 e1000e_reinit_locked(adapter);
4238}
4239
4240/**
4241 * e1000_get_stats - Get System Network Statistics
4242 * @netdev: network interface device structure
4243 *
4244 * Returns the address of the device statistics structure.
4245 * The statistics are actually updated from the timer callback.
4246 **/
4247static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4248{
bc7f75fa 4249 /* only return the current stats */
7274c20f 4250 return &netdev->stats;
bc7f75fa
AK		 4251}
4252
4253/**
4254 * e1000_change_mtu - Change the Maximum Transfer Unit
4255 * @netdev: network interface device structure
4256 * @new_mtu: new value for maximum frame size
4257 *
4258 * Returns 0 on success, negative on failure
4259 **/
4260static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4261{
4262 struct e1000_adapter *adapter = netdev_priv(netdev);
4263 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4264
2adc55c9
BA		 4265 /* Jumbo frame support */
4266 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4267 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4268 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4269 return -EINVAL;
4270 }
4271
2adc55c9
BA		 4272 /* Supported frame sizes */
4273 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4274 (max_frame > adapter->max_hw_frame_size)) {
4275 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4276 return -EINVAL;
4277 }
4278
4279 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4280 msleep(1);
610c9928 4281 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4282 adapter->max_frame_size = max_frame;
610c9928
BA		 4283 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4284 netdev->mtu = new_mtu;
bc7f75fa
AK		 4285 if (netif_running(netdev))
4286 e1000e_down(adapter);
4287
ad68076e
BA		 4288 /*
4289 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4290 * means we reserve 2 more, this pushes us to allocate from the next
4291 * larger slab size.
ad68076e 4292 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4293 * However with the new *_jumbo_rx* routines, jumbo receives will use
4294 * fragmented skbs
ad68076e 4295 */
bc7f75fa
AK		 4296
4297 if (max_frame <= 256)
4298 adapter->rx_buffer_len = 256;
4299 else if (max_frame <= 512)
4300 adapter->rx_buffer_len = 512;
4301 else if (max_frame <= 1024)
4302 adapter->rx_buffer_len = 1024;
4303 else if (max_frame <= 2048)
4304 adapter->rx_buffer_len = 2048;
4305 else
4306 adapter->rx_buffer_len = 4096;
4307
4308 /* adjust allocation if LPE protects us, and we aren't using SBP */
4309 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4310 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4311 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4312 + ETH_FCS_LEN;
bc7f75fa 4313
bc7f75fa
AK		 4314 if (netif_running(netdev))
4315 e1000e_up(adapter);
4316 else
4317 e1000e_reset(adapter);
4318
4319 clear_bit(__E1000_RESETTING, &adapter->state);
4320
4321 return 0;
4322}
4323
4324static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4325 int cmd)
4326{
4327 struct e1000_adapter *adapter = netdev_priv(netdev);
4328 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4329
318a94d6 4330 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4331 return -EOPNOTSUPP;
4332
4333 switch (cmd) {
4334 case SIOCGMIIPHY:
4335 data->phy_id = adapter->hw.phy.addr;
4336 break;
4337 case SIOCGMIIREG:
b16a002e
BA		 4338 e1000_phy_read_status(adapter);
4339
7c25769f
BA		 4340 switch (data->reg_num & 0x1F) {
4341 case MII_BMCR:
4342 data->val_out = adapter->phy_regs.bmcr;
4343 break;
4344 case MII_BMSR:
4345 data->val_out = adapter->phy_regs.bmsr;
4346 break;
4347 case MII_PHYSID1:
4348 data->val_out = (adapter->hw.phy.id >> 16);
4349 break;
4350 case MII_PHYSID2:
4351 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4352 break;
4353 case MII_ADVERTISE:
4354 data->val_out = adapter->phy_regs.advertise;
4355 break;
4356 case MII_LPA:
4357 data->val_out = adapter->phy_regs.lpa;
4358 break;
4359 case MII_EXPANSION:
4360 data->val_out = adapter->phy_regs.expansion;
4361 break;
4362 case MII_CTRL1000:
4363 data->val_out = adapter->phy_regs.ctrl1000;
4364 break;
4365 case MII_STAT1000:
4366 data->val_out = adapter->phy_regs.stat1000;
4367 break;
4368 case MII_ESTATUS:
4369 data->val_out = adapter->phy_regs.estatus;
4370 break;
4371 default:
bc7f75fa
AK		 4372 return -EIO;
4373 }
bc7f75fa
AK		 4374 break;
4375 case SIOCSMIIREG:
4376 default:
4377 return -EOPNOTSUPP;
4378 }
4379 return 0;
4380}
4381
4382static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4383{
4384 switch (cmd) {
4385 case SIOCGMIIPHY:
4386 case SIOCGMIIREG:
4387 case SIOCSMIIREG:
4388 return e1000_mii_ioctl(netdev, ifr, cmd);
4389 default:
4390 return -EOPNOTSUPP;
4391 }
4392}
4393
a4f58f54
BA		 4394static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4395{
4396 struct e1000_hw *hw = &adapter->hw;
4397 u32 i, mac_reg;
4398 u16 phy_reg;
4399 int retval = 0;
4400
4401 /* copy MAC RARs to PHY RARs */
4402 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4403 mac_reg = er32(RAL(i));
4404 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4405 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4406 mac_reg = er32(RAH(i));
4407 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4408 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4409 }
4410
4411 /* copy MAC MTA to PHY MTA */
4412 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4413 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4414 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4415 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4416 }
4417
4418 /* configure PHY Rx Control register */
4419 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4420 mac_reg = er32(RCTL);
4421 if (mac_reg & E1000_RCTL_UPE)
4422 phy_reg |= BM_RCTL_UPE;
4423 if (mac_reg & E1000_RCTL_MPE)
4424 phy_reg |= BM_RCTL_MPE;
4425 phy_reg &= ~(BM_RCTL_MO_MASK);
4426 if (mac_reg & E1000_RCTL_MO_3)
4427 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4428 << BM_RCTL_MO_SHIFT);
4429 if (mac_reg & E1000_RCTL_BAM)
4430 phy_reg |= BM_RCTL_BAM;
4431 if (mac_reg & E1000_RCTL_PMCF)
4432 phy_reg |= BM_RCTL_PMCF;
4433 mac_reg = er32(CTRL);
4434 if (mac_reg & E1000_CTRL_RFCE)
4435 phy_reg |= BM_RCTL_RFCE;
4436 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4437
4438 /* enable PHY wakeup in MAC register */
4439 ew32(WUFC, wufc);
4440 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4441
4442 /* configure and enable PHY wakeup in PHY registers */
4443 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4444 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4445
4446 /* activate PHY wakeup */
94d8186a 4447 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 4448 if (retval) {
4449 e_err("Could not acquire PHY\n");
4450 return retval;
4451 }
4452 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4453 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4454 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4455 if (retval) {
4456 e_err("Could not read PHY page 769\n");
4457 goto out;
4458 }
4459 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4460 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4461 if (retval)
4462 e_err("Could not set PHY Host Wakeup bit\n");
4463out:
94d8186a 4464 hw->phy.ops.release(hw);
a4f58f54
BA		 4465
4466 return retval;
4467}
4468
4f9de721 4469static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
bc7f75fa
AK		 4470{
4471 struct net_device *netdev = pci_get_drvdata(pdev);
4472 struct e1000_adapter *adapter = netdev_priv(netdev);
4473 struct e1000_hw *hw = &adapter->hw;
4474 u32 ctrl, ctrl_ext, rctl, status;
4475 u32 wufc = adapter->wol;
4476 int retval = 0;
4477
4478 netif_device_detach(netdev);
4479
4480 if (netif_running(netdev)) {
4481 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4482 e1000e_down(adapter);
4483 e1000_free_irq(adapter);
4484 }
4662e82b 4485 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 4486
4487 retval = pci_save_state(pdev);
4488 if (retval)
4489 return retval;
4490
4491 status = er32(STATUS);
4492 if (status & E1000_STATUS_LU)
4493 wufc &= ~E1000_WUFC_LNKC;
4494
4495 if (wufc) {
4496 e1000_setup_rctl(adapter);
4497 e1000_set_multi(netdev);
4498
4499 /* turn on all-multi mode if wake on multicast is enabled */
4500 if (wufc & E1000_WUFC_MC) {
4501 rctl = er32(RCTL);
4502 rctl |= E1000_RCTL_MPE;
4503 ew32(RCTL, rctl);
4504 }
4505
4506 ctrl = er32(CTRL);
4507 /* advertise wake from D3Cold */
4508 #define E1000_CTRL_ADVD3WUC 0x00100000
4509 /* phy power management enable */
4510 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 4511 ctrl |= E1000_CTRL_ADVD3WUC;
4512 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4513 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 4514 ew32(CTRL, ctrl);
4515
318a94d6
JK		 4516 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4517 adapter->hw.phy.media_type ==
4518 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 4519 /* keep the laser running in D3 */
4520 ctrl_ext = er32(CTRL_EXT);
4521 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4522 ew32(CTRL_EXT, ctrl_ext);
4523 }
4524
97ac8cae
BA		 4525 if (adapter->flags & FLAG_IS_ICH)
4526 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4527
bc7f75fa
AK		 4528 /* Allow time for pending master requests to run */
4529 e1000e_disable_pcie_master(&adapter->hw);
4530
82776a4b 4531 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 4532 /* enable wakeup by the PHY */
4533 retval = e1000_init_phy_wakeup(adapter, wufc);
4534 if (retval)
4535 return retval;
4536 } else {
4537 /* enable wakeup by the MAC */
4538 ew32(WUFC, wufc);
4539 ew32(WUC, E1000_WUC_PME_EN);
4540 }
bc7f75fa
AK		 4541 } else {
4542 ew32(WUC, 0);
4543 ew32(WUFC, 0);
bc7f75fa
AK		 4544 }
4545
4f9de721
RW		 4546 *enable_wake = !!wufc;
4547
bc7f75fa 4548 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 4549 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4550 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 4551 *enable_wake = true;
bc7f75fa
AK		 4552
4553 if (adapter->hw.phy.type == e1000_phy_igp_3)
4554 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4555
ad68076e
BA		 4556 /*
4557 * Release control of h/w to f/w. If f/w is AMT enabled, this
4558 * would have already happened in close and is redundant.
4559 */
bc7f75fa
AK		 4560 e1000_release_hw_control(adapter);
4561
4562 pci_disable_device(pdev);
4563
4f9de721
RW		 4564 return 0;
4565}
4566
4567static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
4568{
4569 if (sleep && wake) {
4570 pci_prepare_to_sleep(pdev);
4571 return;
4572 }
4573
4574 pci_wake_from_d3(pdev, wake);
4575 pci_set_power_state(pdev, PCI_D3hot);
4576}
4577
4578static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
4579 bool wake)
4580{
4581 struct net_device *netdev = pci_get_drvdata(pdev);
4582 struct e1000_adapter *adapter = netdev_priv(netdev);
4583
005cbdfc
AD		 4584 /*
4585 * The pci-e switch on some quad port adapters will report a
4586 * correctable error when the MAC transitions from D0 to D3. To
4587 * prevent this we need to mask off the correctable errors on the
4588 * downstream port of the pci-e switch.
4589 */
4590 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4591 struct pci_dev *us_dev = pdev->bus->self;
4592 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4593 u16 devctl;
4594
4595 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4596 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4597 (devctl & ~PCI_EXP_DEVCTL_CERE));
4598
4f9de721 4599 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 4600
4601 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4602 } else {
4f9de721 4603 e1000_power_off(pdev, sleep, wake);
005cbdfc 4604 }
bc7f75fa
AK		 4605}
4606
1eae4eb2
AK		 4607static void e1000e_disable_l1aspm(struct pci_dev *pdev)
4608{
4609 int pos;
1eae4eb2
AK		 4610 u16 val;
4611
4612 /*
4613 * 82573 workaround - disable L1 ASPM on mobile chipsets
4614 *
4615 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
4616 * resulting in lost data or garbage information on the pci-e link
4617 * level. This could result in (false) bad EEPROM checksum errors,
4618 * long ping times (up to 2s) or even a system freeze/hang.
4619 *
4620 * Unfortunately this feature saves about 1W power consumption when
4621 * active.
4622 */
4623 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK		 4624 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
4625 if (val & 0x2) {
4626 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
4627 val &= ~0x2;
4628 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
4629 }
4630}
4631
bc7f75fa 4632#ifdef CONFIG_PM
4f9de721
RW		 4633static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4634{
4635 int retval;
4636 bool wake;
4637
4638 retval = __e1000_shutdown(pdev, &wake);
4639 if (!retval)
4640 e1000_complete_shutdown(pdev, true, wake);
4641
4642 return retval;
4643}
4644
bc7f75fa
AK		 4645static int e1000_resume(struct pci_dev *pdev)
4646{
4647 struct net_device *netdev = pci_get_drvdata(pdev);
4648 struct e1000_adapter *adapter = netdev_priv(netdev);
4649 struct e1000_hw *hw = &adapter->hw;
4650 u32 err;
4651
4652 pci_set_power_state(pdev, PCI_D0);
4653 pci_restore_state(pdev);
1eae4eb2 4654 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4655
f0f422e5 4656 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4657 if (err) {
4658 dev_err(&pdev->dev,
4659 "Cannot enable PCI device from suspend\n");
4660 return err;
4661 }
4662
4663 pci_set_master(pdev);
4664
4665 pci_enable_wake(pdev, PCI_D3hot, 0);
4666 pci_enable_wake(pdev, PCI_D3cold, 0);
4667
4662e82b 4668 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 4669 if (netif_running(netdev)) {
4670 err = e1000_request_irq(adapter);
4671 if (err)
4672 return err;
4673 }
4674
4675 e1000e_power_up_phy(adapter);
a4f58f54
BA		 4676
4677 /* report the system wakeup cause from S3/S4 */
4678 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
4679 u16 phy_data;
4680
4681 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
4682 if (phy_data) {
4683 e_info("PHY Wakeup cause - %s\n",
4684 phy_data & E1000_WUS_EX ? "Unicast Packet" :
4685 phy_data & E1000_WUS_MC ? "Multicast Packet" :
4686 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
4687 phy_data & E1000_WUS_MAG ? "Magic Packet" :
4688 phy_data & E1000_WUS_LNKC ? "Link Status "
4689 " Change" : "other");
4690 }
4691 e1e_wphy(&adapter->hw, BM_WUS, ~0);
4692 } else {
4693 u32 wus = er32(WUS);
4694 if (wus) {
4695 e_info("MAC Wakeup cause - %s\n",
4696 wus & E1000_WUS_EX ? "Unicast Packet" :
4697 wus & E1000_WUS_MC ? "Multicast Packet" :
4698 wus & E1000_WUS_BC ? "Broadcast Packet" :
4699 wus & E1000_WUS_MAG ? "Magic Packet" :
4700 wus & E1000_WUS_LNKC ? "Link Status Change" :
4701 "other");
4702 }
4703 ew32(WUS, ~0);
4704 }
4705
bc7f75fa 4706 e1000e_reset(adapter);
bc7f75fa
AK		 4707
4708 e1000_init_manageability(adapter);
4709
4710 if (netif_running(netdev))
4711 e1000e_up(adapter);
4712
4713 netif_device_attach(netdev);
4714
ad68076e
BA		 4715 /*
4716 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4717 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4718 * under the control of the driver.
4719 */
c43bc57e 4720 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4721 e1000_get_hw_control(adapter);
4722
4723 return 0;
4724}
4725#endif
4726
4727static void e1000_shutdown(struct pci_dev *pdev)
4728{
4f9de721
RW		 4729 bool wake = false;
4730
4731 __e1000_shutdown(pdev, &wake);
4732
4733 if (system_state == SYSTEM_POWER_OFF)
4734 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 4735}
4736
4737#ifdef CONFIG_NET_POLL_CONTROLLER
4738/*
4739 * Polling 'interrupt' - used by things like netconsole to send skbs
4740 * without having to re-enable interrupts. It's not called while
4741 * the interrupt routine is executing.
4742 */
4743static void e1000_netpoll(struct net_device *netdev)
4744{
4745 struct e1000_adapter *adapter = netdev_priv(netdev);
4746
4747 disable_irq(adapter->pdev->irq);
4748 e1000_intr(adapter->pdev->irq, netdev);
4749
bc7f75fa
AK		 4750 enable_irq(adapter->pdev->irq);
4751}
4752#endif
4753
4754/**
4755 * e1000_io_error_detected - called when PCI error is detected
4756 * @pdev: Pointer to PCI device
4757 * @state: The current pci connection state
4758 *
4759 * This function is called after a PCI bus error affecting
4760 * this device has been detected.
4761 */
4762static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4763 pci_channel_state_t state)
4764{
4765 struct net_device *netdev = pci_get_drvdata(pdev);
4766 struct e1000_adapter *adapter = netdev_priv(netdev);
4767
4768 netif_device_detach(netdev);
4769
c93b5a76
MM		 4770 if (state == pci_channel_io_perm_failure)
4771 return PCI_ERS_RESULT_DISCONNECT;
4772
bc7f75fa
AK		 4773 if (netif_running(netdev))
4774 e1000e_down(adapter);
4775 pci_disable_device(pdev);
4776
4777 /* Request a slot slot reset. */
4778 return PCI_ERS_RESULT_NEED_RESET;
4779}
4780
4781/**
4782 * e1000_io_slot_reset - called after the pci bus has been reset.
4783 * @pdev: Pointer to PCI device
4784 *
4785 * Restart the card from scratch, as if from a cold-boot. Implementation
4786 * resembles the first-half of the e1000_resume routine.
4787 */
4788static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4789{
4790 struct net_device *netdev = pci_get_drvdata(pdev);
4791 struct e1000_adapter *adapter = netdev_priv(netdev);
4792 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4793 int err;
111b9dc5 4794 pci_ers_result_t result;
bc7f75fa 4795
1eae4eb2 4796 e1000e_disable_l1aspm(pdev);
f0f422e5 4797 err = pci_enable_device_mem(pdev);
6e4f6f6b 4798 if (err) {
bc7f75fa
AK		 4799 dev_err(&pdev->dev,
4800 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 4801 result = PCI_ERS_RESULT_DISCONNECT;
4802 } else {
4803 pci_set_master(pdev);
4804 pci_restore_state(pdev);
bc7f75fa 4805
111b9dc5
JB		 4806 pci_enable_wake(pdev, PCI_D3hot, 0);
4807 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 4808
111b9dc5
JB		 4809 e1000e_reset(adapter);
4810 ew32(WUS, ~0);
4811 result = PCI_ERS_RESULT_RECOVERED;
4812 }
bc7f75fa 4813
111b9dc5
JB		 4814 pci_cleanup_aer_uncorrect_error_status(pdev);
4815
4816 return result;
bc7f75fa
AK		 4817}
4818
4819/**
4820 * e1000_io_resume - called when traffic can start flowing again.
4821 * @pdev: Pointer to PCI device
4822 *
4823 * This callback is called when the error recovery driver tells us that
4824 * its OK to resume normal operation. Implementation resembles the
4825 * second-half of the e1000_resume routine.
4826 */
4827static void e1000_io_resume(struct pci_dev *pdev)
4828{
4829 struct net_device *netdev = pci_get_drvdata(pdev);
4830 struct e1000_adapter *adapter = netdev_priv(netdev);
4831
4832 e1000_init_manageability(adapter);
4833
4834 if (netif_running(netdev)) {
4835 if (e1000e_up(adapter)) {
4836 dev_err(&pdev->dev,
4837 "can't bring device back up after reset\n");
4838 return;
4839 }
4840 }
4841
4842 netif_device_attach(netdev);
4843
ad68076e
BA		 4844 /*
4845 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4846 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4847 * under the control of the driver.
4848 */
c43bc57e 4849 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4850 e1000_get_hw_control(adapter);
4851
4852}
4853
4854static void e1000_print_device_info(struct e1000_adapter *adapter)
4855{
4856 struct e1000_hw *hw = &adapter->hw;
4857 struct net_device *netdev = adapter->netdev;
69e3fd8c 4858 u32 pba_num;
bc7f75fa
AK		 4859
4860 /* print bus type/speed/width info */
7c510e4b 4861 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 4862 /* bus width */
4863 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4864 "Width x1"),
4865 /* MAC address */
7c510e4b 4866 netdev->dev_addr);
44defeb3
JK		 4867 e_info("Intel(R) PRO/%s Network Connection\n",
4868 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4869 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 4870 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4871 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 4872}
4873
10aa4c04
AK		 4874static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4875{
4876 struct e1000_hw *hw = &adapter->hw;
4877 int ret_val;
4878 u16 buf = 0;
4879
4880 if (hw->mac.type != e1000_82573)
4881 return;
4882
4883 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 4884 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 4885 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 4886 dev_warn(&adapter->pdev->dev,
4887 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04
AK		 4888 }
4889
4890 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
e243455d 4891 if (!ret_val && (le16_to_cpu(buf) & (3 << 2))) {
10aa4c04 4892 /* ASPM enable */
6c2a9efa
FP		 4893 dev_warn(&adapter->pdev->dev,
4894 "Warning: detected ASPM enabled in EEPROM\n");
10aa4c04
AK		 4895 }
4896}
4897
651c2466
SH		 4898static const struct net_device_ops e1000e_netdev_ops = {
4899 .ndo_open = e1000_open,
4900 .ndo_stop = e1000_close,
00829823 4901 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 4902 .ndo_get_stats = e1000_get_stats,
4903 .ndo_set_multicast_list = e1000_set_multi,
4904 .ndo_set_mac_address = e1000_set_mac,
4905 .ndo_change_mtu = e1000_change_mtu,
4906 .ndo_do_ioctl = e1000_ioctl,
4907 .ndo_tx_timeout = e1000_tx_timeout,
4908 .ndo_validate_addr = eth_validate_addr,
4909
4910 .ndo_vlan_rx_register = e1000_vlan_rx_register,
4911 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
4912 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
4913#ifdef CONFIG_NET_POLL_CONTROLLER
4914 .ndo_poll_controller = e1000_netpoll,
4915#endif
4916};
4917
bc7f75fa
AK		 4918/**
4919 * e1000_probe - Device Initialization Routine
4920 * @pdev: PCI device information struct
4921 * @ent: entry in e1000_pci_tbl
4922 *
4923 * Returns 0 on success, negative on failure
4924 *
4925 * e1000_probe initializes an adapter identified by a pci_dev structure.
4926 * The OS initialization, configuring of the adapter private structure,
4927 * and a hardware reset occur.
4928 **/
4929static int __devinit e1000_probe(struct pci_dev *pdev,
4930 const struct pci_device_id *ent)
4931{
4932 struct net_device *netdev;
4933 struct e1000_adapter *adapter;
4934 struct e1000_hw *hw;
4935 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 4936 resource_size_t mmio_start, mmio_len;
4937 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 4938
4939 static int cards_found;
4940 int i, err, pci_using_dac;
4941 u16 eeprom_data = 0;
4942 u16 eeprom_apme_mask = E1000_EEPROM_APME;
4943
1eae4eb2 4944 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4945
f0f422e5 4946 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4947 if (err)
4948 return err;
4949
4950 pci_using_dac = 0;
6a35528a 4951 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa 4952 if (!err) {
6a35528a 4953 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa
AK		 4954 if (!err)
4955 pci_using_dac = 1;
4956 } else {
284901a9 4957 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
bc7f75fa
AK		 4958 if (err) {
4959 err = pci_set_consistent_dma_mask(pdev,
284901a9 4960 DMA_BIT_MASK(32));
bc7f75fa
AK		 4961 if (err) {
4962 dev_err(&pdev->dev, "No usable DMA "
4963 "configuration, aborting\n");
4964 goto err_dma;
4965 }
4966 }
4967 }
4968
e8de1481 4969 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 4970 pci_select_bars(pdev, IORESOURCE_MEM),
4971 e1000e_driver_name);
bc7f75fa
AK		 4972 if (err)
4973 goto err_pci_reg;
4974
68eac460 4975 /* AER (Advanced Error Reporting) hooks */
19d5afd4 4976 pci_enable_pcie_error_reporting(pdev);
68eac460 4977
bc7f75fa 4978 pci_set_master(pdev);
438b365a
BA		 4979 /* PCI config space info */
4980 err = pci_save_state(pdev);
4981 if (err)
4982 goto err_alloc_etherdev;
bc7f75fa
AK		 4983
4984 err = -ENOMEM;
4985 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
4986 if (!netdev)
4987 goto err_alloc_etherdev;
4988
bc7f75fa
AK		 4989 SET_NETDEV_DEV(netdev, &pdev->dev);
4990
4991 pci_set_drvdata(pdev, netdev);
4992 adapter = netdev_priv(netdev);
4993 hw = &adapter->hw;
4994 adapter->netdev = netdev;
4995 adapter->pdev = pdev;
4996 adapter->ei = ei;
4997 adapter->pba = ei->pba;
4998 adapter->flags = ei->flags;
eb7c3adb 4999 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5000 adapter->hw.adapter = adapter;
5001 adapter->hw.mac.type = ei->mac;
2adc55c9 5002 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5003 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5004
5005 mmio_start = pci_resource_start(pdev, 0);
5006 mmio_len = pci_resource_len(pdev, 0);
5007
5008 err = -EIO;
5009 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5010 if (!adapter->hw.hw_addr)
5011 goto err_ioremap;
5012
5013 if ((adapter->flags & FLAG_HAS_FLASH) &&
5014 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5015 flash_start = pci_resource_start(pdev, 1);
5016 flash_len = pci_resource_len(pdev, 1);
5017 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5018 if (!adapter->hw.flash_address)
5019 goto err_flashmap;
5020 }
5021
5022 /* construct the net_device struct */
651c2466 5023 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5024 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5025 netdev->watchdog_timeo = 5 * HZ;
5026 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5027 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5028
5029 netdev->mem_start = mmio_start;
5030 netdev->mem_end = mmio_start + mmio_len;
5031
5032 adapter->bd_number = cards_found++;
5033
4662e82b
BA		 5034 e1000e_check_options(adapter);
5035
bc7f75fa
AK		 5036 /* setup adapter struct */
5037 err = e1000_sw_init(adapter);
5038 if (err)
5039 goto err_sw_init;
5040
5041 err = -EIO;
5042
5043 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5044 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5045 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5046
69e3fd8c 5047 err = ei->get_variants(adapter);
bc7f75fa
AK		 5048 if (err)
5049 goto err_hw_init;
5050
4a770358
BA		 5051 if ((adapter->flags & FLAG_IS_ICH) &&
5052 (adapter->flags & FLAG_READ_ONLY_NVM))
5053 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5054
bc7f75fa
AK		 5055 hw->mac.ops.get_bus_info(&adapter->hw);
5056
318a94d6 5057 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5058
5059 /* Copper options */
318a94d6 5060 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5061 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5062 adapter->hw.phy.disable_polarity_correction = 0;
5063 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5064 }
5065
5066 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5067 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5068
5069 netdev->features = NETIF_F_SG |
5070 NETIF_F_HW_CSUM |
5071 NETIF_F_HW_VLAN_TX |
5072 NETIF_F_HW_VLAN_RX;
5073
5074 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5075 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5076
5077 netdev->features |= NETIF_F_TSO;
5078 netdev->features |= NETIF_F_TSO6;
5079
a5136e23
JK		 5080 netdev->vlan_features |= NETIF_F_TSO;
5081 netdev->vlan_features |= NETIF_F_TSO6;
5082 netdev->vlan_features |= NETIF_F_HW_CSUM;
5083 netdev->vlan_features |= NETIF_F_SG;
5084
bc7f75fa
AK		 5085 if (pci_using_dac)
5086 netdev->features |= NETIF_F_HIGHDMA;
5087
bc7f75fa
AK		 5088 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5089 adapter->flags |= FLAG_MNG_PT_ENABLED;
5090
ad68076e
BA		 5091 /*
5092 * before reading the NVM, reset the controller to
5093 * put the device in a known good starting state
5094 */
bc7f75fa
AK		 5095 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5096
5097 /*
5098 * systems with ASPM and others may see the checksum fail on the first
5099 * attempt. Let's give it a few tries
5100 */
5101 for (i = 0;; i++) {
5102 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5103 break;
5104 if (i == 2) {
44defeb3 5105 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5106 err = -EIO;
5107 goto err_eeprom;
5108 }
5109 }
5110
10aa4c04
AK		 5111 e1000_eeprom_checks(adapter);
5112
bc7f75fa
AK		 5113 /* copy the MAC address out of the NVM */
5114 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5115 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5116
5117 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5118 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5119
5120 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5121 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5122 err = -EIO;
5123 goto err_eeprom;
5124 }
5125
5126 init_timer(&adapter->watchdog_timer);
5127 adapter->watchdog_timer.function = &e1000_watchdog;
5128 adapter->watchdog_timer.data = (unsigned long) adapter;
5129
5130 init_timer(&adapter->phy_info_timer);
5131 adapter->phy_info_timer.function = &e1000_update_phy_info;
5132 adapter->phy_info_timer.data = (unsigned long) adapter;
5133
5134 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5135 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5136 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5137 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5138 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5139
bc7f75fa
AK		 5140 /* Initialize link parameters. User can change them with ethtool */
5141 adapter->hw.mac.autoneg = 1;
309af40b 5142 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5143 adapter->hw.fc.requested_mode = e1000_fc_default;
5144 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5145 adapter->hw.phy.autoneg_advertised = 0x2f;
5146
5147 /* ring size defaults */
5148 adapter->rx_ring->count = 256;
5149 adapter->tx_ring->count = 256;
5150
5151 /*
5152 * Initial Wake on LAN setting - If APM wake is enabled in
5153 * the EEPROM, enable the ACPI Magic Packet filter
5154 */
5155 if (adapter->flags & FLAG_APME_IN_WUC) {
5156 /* APME bit in EEPROM is mapped to WUC.APME */
5157 eeprom_data = er32(WUC);
5158 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5159 if (eeprom_data & E1000_WUC_PHY_WAKE)
5160 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5161 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5162 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5163 (adapter->hw.bus.func == 1))
5164 e1000_read_nvm(&adapter->hw,
5165 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5166 else
5167 e1000_read_nvm(&adapter->hw,
5168 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5169 }
5170
5171 /* fetch WoL from EEPROM */
5172 if (eeprom_data & eeprom_apme_mask)
5173 adapter->eeprom_wol |= E1000_WUFC_MAG;
5174
5175 /*
5176 * now that we have the eeprom settings, apply the special cases
5177 * where the eeprom may be wrong or the board simply won't support
5178 * wake on lan on a particular port
5179 */
5180 if (!(adapter->flags & FLAG_HAS_WOL))
5181 adapter->eeprom_wol = 0;
5182
5183 /* initialize the wol settings based on the eeprom settings */
5184 adapter->wol = adapter->eeprom_wol;
6ff68026 5185 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5186
84527590
BA		 5187 /* save off EEPROM version number */
5188 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5189
bc7f75fa
AK		 5190 /* reset the hardware with the new settings */
5191 e1000e_reset(adapter);
5192
ad68076e
BA		 5193 /*
5194 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5195 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5196 * under the control of the driver.
5197 */
c43bc57e 5198 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5199 e1000_get_hw_control(adapter);
5200
bc7f75fa
AK		 5201 strcpy(netdev->name, "eth%d");
5202 err = register_netdev(netdev);
5203 if (err)
5204 goto err_register;
5205
9c563d20
JB		 5206 /* carrier off reporting is important to ethtool even BEFORE open */
5207 netif_carrier_off(netdev);
5208
bc7f75fa
AK		 5209 e1000_print_device_info(adapter);
5210
5211 return 0;
5212
5213err_register:
c43bc57e
JB		 5214 if (!(adapter->flags & FLAG_HAS_AMT))
5215 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5216err_eeprom:
5217 if (!e1000_check_reset_block(&adapter->hw))
5218 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5219err_hw_init:
bc7f75fa 5220
bc7f75fa
AK		 5221 kfree(adapter->tx_ring);
5222 kfree(adapter->rx_ring);
5223err_sw_init:
c43bc57e
JB		 5224 if (adapter->hw.flash_address)
5225 iounmap(adapter->hw.flash_address);
e82f54ba 5226 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5227err_flashmap:
bc7f75fa
AK		 5228 iounmap(adapter->hw.hw_addr);
5229err_ioremap:
5230 free_netdev(netdev);
5231err_alloc_etherdev:
f0f422e5
BA		 5232 pci_release_selected_regions(pdev,
5233 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5234err_pci_reg:
5235err_dma:
5236 pci_disable_device(pdev);
5237 return err;
5238}
5239
5240/**
5241 * e1000_remove - Device Removal Routine
5242 * @pdev: PCI device information struct
5243 *
5244 * e1000_remove is called by the PCI subsystem to alert the driver
5245 * that it should release a PCI device. The could be caused by a
5246 * Hot-Plug event, or because the driver is going to be removed from
5247 * memory.
5248 **/
5249static void __devexit e1000_remove(struct pci_dev *pdev)
5250{
5251 struct net_device *netdev = pci_get_drvdata(pdev);
5252 struct e1000_adapter *adapter = netdev_priv(netdev);
5253
ad68076e
BA		 5254 /*
5255 * flush_scheduled work may reschedule our watchdog task, so
5256 * explicitly disable watchdog tasks from being rescheduled
5257 */
bc7f75fa
AK		 5258 set_bit(__E1000_DOWN, &adapter->state);
5259 del_timer_sync(&adapter->watchdog_timer);
5260 del_timer_sync(&adapter->phy_info_timer);
5261
41cec6f1
BA		 5262 cancel_work_sync(&adapter->reset_task);
5263 cancel_work_sync(&adapter->watchdog_task);
5264 cancel_work_sync(&adapter->downshift_task);
5265 cancel_work_sync(&adapter->update_phy_task);
5266 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 5267 flush_scheduled_work();
5268
17f208de
BA		 5269 if (!(netdev->flags & IFF_UP))
5270 e1000_power_down_phy(adapter);
5271
5272 unregister_netdev(netdev);
5273
ad68076e
BA		 5274 /*
5275 * Release control of h/w to f/w. If f/w is AMT enabled, this
5276 * would have already happened in close and is redundant.
5277 */
bc7f75fa
AK		 5278 e1000_release_hw_control(adapter);
5279
4662e82b 5280 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5281 kfree(adapter->tx_ring);
5282 kfree(adapter->rx_ring);
5283
5284 iounmap(adapter->hw.hw_addr);
5285 if (adapter->hw.flash_address)
5286 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5287 pci_release_selected_regions(pdev,
5288 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5289
5290 free_netdev(netdev);
5291
111b9dc5 5292 /* AER disable */
19d5afd4 5293 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5294
bc7f75fa
AK		 5295 pci_disable_device(pdev);
5296}
5297
5298/* PCI Error Recovery (ERS) */
5299static struct pci_error_handlers e1000_err_handler = {
5300 .error_detected = e1000_io_error_detected,
5301 .slot_reset = e1000_io_slot_reset,
5302 .resume = e1000_io_resume,
5303};
5304
5305static struct pci_device_id e1000_pci_tbl[] = {
bc7f75fa
AK		 5306 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5307 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5308 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5309 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5310 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5311 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5312 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5313 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5314 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5315
bc7f75fa
AK		 5316 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5317 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5318 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5319 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5320
bc7f75fa
AK		 5321 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5322 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5323 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5324
4662e82b 5325 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5326 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5327 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5328
bc7f75fa
AK		 5329 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5330 board_80003es2lan },
5331 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5332 board_80003es2lan },
5333 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5334 board_80003es2lan },
5335 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5336 board_80003es2lan },
ad68076e 5337
bc7f75fa
AK		 5338 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5339 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5340 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5341 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5342 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5343 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5344 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
ad68076e 5345
bc7f75fa
AK		 5346 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5347 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5348 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5349 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5350 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5351 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5352 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5353 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5354 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5355
5356 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5357 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5358 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5359
f4187b56
BA		 5360 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5361 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5362
a4f58f54
BA		 5363 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5364 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5365 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5366 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5367
bc7f75fa
AK		 5368 { } /* terminate list */
5369};
5370MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5371
5372/* PCI Device API Driver */
5373static struct pci_driver e1000_driver = {
5374 .name = e1000e_driver_name,
5375 .id_table = e1000_pci_tbl,
5376 .probe = e1000_probe,
5377 .remove = __devexit_p(e1000_remove),
5378#ifdef CONFIG_PM
ad68076e 5379 /* Power Management Hooks */
bc7f75fa
AK		 5380 .suspend = e1000_suspend,
5381 .resume = e1000_resume,
5382#endif
5383 .shutdown = e1000_shutdown,
5384 .err_handler = &e1000_err_handler
5385};
5386
5387/**
5388 * e1000_init_module - Driver Registration Routine
5389 *
5390 * e1000_init_module is the first routine called when the driver is
5391 * loaded. All it does is register with the PCI subsystem.
5392 **/
5393static int __init e1000_init_module(void)
5394{
5395 int ret;
5396 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
5397 e1000e_driver_name, e1000e_driver_version);
c7e54b1b 5398 printk(KERN_INFO "%s: Copyright (c) 1999 - 2009 Intel Corporation.\n",
bc7f75fa
AK		 5399 e1000e_driver_name);
5400 ret = pci_register_driver(&e1000_driver);
53ec5498 5401
bc7f75fa
AK		 5402 return ret;
5403}
5404module_init(e1000_init_module);
5405
5406/**
5407 * e1000_exit_module - Driver Exit Cleanup Routine
5408 *
5409 * e1000_exit_module is called just before the driver is removed
5410 * from memory.
5411 **/
5412static void __exit e1000_exit_module(void)
5413{
5414 pci_unregister_driver(&e1000_driver);
5415}
5416module_exit(e1000_exit_module);
5417
5418
5419MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5420MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5421MODULE_LICENSE("GPL");
5422MODULE_VERSION(DRV_VERSION);
5423
5424/* e1000_main.c */
Linux kernel - Deliverables
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