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drivers/net/Makefile: conditionally descend to wireless
[deliverable/linux.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
451152d9 4 Copyright(c) 1999 - 2010 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
bc7f75fa
AK		 42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
bc7f75fa
AK		 52
53#include "e1000.h"
54
c14c643b
BA		 55#define DRV_EXTRAVERSION "-k2"
56
57#define DRV_VERSION "1.2.7" DRV_EXTRAVERSION
bc7f75fa
AK		 58char e1000e_driver_name[] = "e1000e";
59const char e1000e_driver_version[] = DRV_VERSION;
60
61static const struct e1000_info *e1000_info_tbl[] = {
62 [board_82571] = &e1000_82571_info,
63 [board_82572] = &e1000_82572_info,
64 [board_82573] = &e1000_82573_info,
4662e82b 65 [board_82574] = &e1000_82574_info,
8c81c9c3 66 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 67 [board_80003es2lan] = &e1000_es2_info,
68 [board_ich8lan] = &e1000_ich8_info,
69 [board_ich9lan] = &e1000_ich9_info,
f4187b56 70 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 71 [board_pchlan] = &e1000_pch_info,
d3738bb8 72 [board_pch2lan] = &e1000_pch2_info,
bc7f75fa
AK		 73};
74
84f4ee90
TI		 75struct e1000_reg_info {
76 u32 ofs;
77 char *name;
78};
79
80#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
81#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
82#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
83#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
84#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
85
86#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
87#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
88#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
89#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
90#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
91
92static const struct e1000_reg_info e1000_reg_info_tbl[] = {
93
94 /* General Registers */
95 {E1000_CTRL, "CTRL"},
96 {E1000_STATUS, "STATUS"},
97 {E1000_CTRL_EXT, "CTRL_EXT"},
98
99 /* Interrupt Registers */
100 {E1000_ICR, "ICR"},
101
102 /* RX Registers */
103 {E1000_RCTL, "RCTL"},
104 {E1000_RDLEN, "RDLEN"},
105 {E1000_RDH, "RDH"},
106 {E1000_RDT, "RDT"},
107 {E1000_RDTR, "RDTR"},
108 {E1000_RXDCTL(0), "RXDCTL"},
109 {E1000_ERT, "ERT"},
110 {E1000_RDBAL, "RDBAL"},
111 {E1000_RDBAH, "RDBAH"},
112 {E1000_RDFH, "RDFH"},
113 {E1000_RDFT, "RDFT"},
114 {E1000_RDFHS, "RDFHS"},
115 {E1000_RDFTS, "RDFTS"},
116 {E1000_RDFPC, "RDFPC"},
117
118 /* TX Registers */
119 {E1000_TCTL, "TCTL"},
120 {E1000_TDBAL, "TDBAL"},
121 {E1000_TDBAH, "TDBAH"},
122 {E1000_TDLEN, "TDLEN"},
123 {E1000_TDH, "TDH"},
124 {E1000_TDT, "TDT"},
125 {E1000_TIDV, "TIDV"},
126 {E1000_TXDCTL(0), "TXDCTL"},
127 {E1000_TADV, "TADV"},
128 {E1000_TARC(0), "TARC"},
129 {E1000_TDFH, "TDFH"},
130 {E1000_TDFT, "TDFT"},
131 {E1000_TDFHS, "TDFHS"},
132 {E1000_TDFTS, "TDFTS"},
133 {E1000_TDFPC, "TDFPC"},
134
135 /* List Terminator */
136 {}
137};
138
139/*
140 * e1000_regdump - register printout routine
141 */
142static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
143{
144 int n = 0;
145 char rname[16];
146 u32 regs[8];
147
148 switch (reginfo->ofs) {
149 case E1000_RXDCTL(0):
150 for (n = 0; n < 2; n++)
151 regs[n] = __er32(hw, E1000_RXDCTL(n));
152 break;
153 case E1000_TXDCTL(0):
154 for (n = 0; n < 2; n++)
155 regs[n] = __er32(hw, E1000_TXDCTL(n));
156 break;
157 case E1000_TARC(0):
158 for (n = 0; n < 2; n++)
159 regs[n] = __er32(hw, E1000_TARC(n));
160 break;
161 default:
162 printk(KERN_INFO "%-15s %08x\n",
163 reginfo->name, __er32(hw, reginfo->ofs));
164 return;
165 }
166
167 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
168 printk(KERN_INFO "%-15s ", rname);
169 for (n = 0; n < 2; n++)
170 printk(KERN_CONT "%08x ", regs[n]);
171 printk(KERN_CONT "\n");
172}
173
174
175/*
176 * e1000e_dump - Print registers, tx-ring and rx-ring
177 */
178static void e1000e_dump(struct e1000_adapter *adapter)
179{
180 struct net_device *netdev = adapter->netdev;
181 struct e1000_hw *hw = &adapter->hw;
182 struct e1000_reg_info *reginfo;
183 struct e1000_ring *tx_ring = adapter->tx_ring;
184 struct e1000_tx_desc *tx_desc;
185 struct my_u0 { u64 a; u64 b; } *u0;
186 struct e1000_buffer *buffer_info;
187 struct e1000_ring *rx_ring = adapter->rx_ring;
188 union e1000_rx_desc_packet_split *rx_desc_ps;
189 struct e1000_rx_desc *rx_desc;
190 struct my_u1 { u64 a; u64 b; u64 c; u64 d; } *u1;
191 u32 staterr;
192 int i = 0;
193
194 if (!netif_msg_hw(adapter))
195 return;
196
197 /* Print netdevice Info */
198 if (netdev) {
199 dev_info(&adapter->pdev->dev, "Net device Info\n");
200 printk(KERN_INFO "Device Name state "
201 "trans_start last_rx\n");
202 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
203 netdev->name,
204 netdev->state,
205 netdev->trans_start,
206 netdev->last_rx);
207 }
208
209 /* Print Registers */
210 dev_info(&adapter->pdev->dev, "Register Dump\n");
211 printk(KERN_INFO " Register Name Value\n");
212 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
213 reginfo->name; reginfo++) {
214 e1000_regdump(hw, reginfo);
215 }
216
217 /* Print TX Ring Summary */
218 if (!netdev || !netif_running(netdev))
219 goto exit;
220
221 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
222 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
223 " leng ntw timestamp\n");
224 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
225 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
226 0, tx_ring->next_to_use, tx_ring->next_to_clean,
227 (u64)buffer_info->dma,
228 buffer_info->length,
229 buffer_info->next_to_watch,
230 (u64)buffer_info->time_stamp);
231
232 /* Print TX Rings */
233 if (!netif_msg_tx_done(adapter))
234 goto rx_ring_summary;
235
236 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
237
238 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
239 *
240 * Legacy Transmit Descriptor
241 * +--------------------------------------------------------------+
242 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
243 * +--------------------------------------------------------------+
244 * 8 | Special | CSS | Status | CMD | CSO | Length |
245 * +--------------------------------------------------------------+
246 * 63 48 47 36 35 32 31 24 23 16 15 0
247 *
248 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
249 * 63 48 47 40 39 32 31 16 15 8 7 0
250 * +----------------------------------------------------------------+
251 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
252 * +----------------------------------------------------------------+
253 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
254 * +----------------------------------------------------------------+
255 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
256 *
257 * Extended Data Descriptor (DTYP=0x1)
258 * +----------------------------------------------------------------+
259 * 0 | Buffer Address [63:0] |
260 * +----------------------------------------------------------------+
261 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
262 * +----------------------------------------------------------------+
263 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
264 */
265 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
266 " [bi->dma ] leng ntw timestamp bi->skb "
267 "<-- Legacy format\n");
268 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
269 " [bi->dma ] leng ntw timestamp bi->skb "
270 "<-- Ext Context format\n");
271 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
272 " [bi->dma ] leng ntw timestamp bi->skb "
273 "<-- Ext Data format\n");
274 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
275 tx_desc = E1000_TX_DESC(*tx_ring, i);
276 buffer_info = &tx_ring->buffer_info[i];
277 u0 = (struct my_u0 *)tx_desc;
278 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
279 "%04X %3X %016llX %p",
280 (!(le64_to_cpu(u0->b) & (1<<29)) ? 'l' :
281 ((le64_to_cpu(u0->b) & (1<<20)) ? 'd' : 'c')), i,
282 le64_to_cpu(u0->a), le64_to_cpu(u0->b),
283 (u64)buffer_info->dma, buffer_info->length,
284 buffer_info->next_to_watch, (u64)buffer_info->time_stamp,
285 buffer_info->skb);
286 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
287 printk(KERN_CONT " NTC/U\n");
288 else if (i == tx_ring->next_to_use)
289 printk(KERN_CONT " NTU\n");
290 else if (i == tx_ring->next_to_clean)
291 printk(KERN_CONT " NTC\n");
292 else
293 printk(KERN_CONT "\n");
294
295 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
296 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
297 16, 1, phys_to_virt(buffer_info->dma),
298 buffer_info->length, true);
299 }
300
301 /* Print RX Rings Summary */
302rx_ring_summary:
303 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
304 printk(KERN_INFO "Queue [NTU] [NTC]\n");
305 printk(KERN_INFO " %5d %5X %5X\n", 0,
306 rx_ring->next_to_use, rx_ring->next_to_clean);
307
308 /* Print RX Rings */
309 if (!netif_msg_rx_status(adapter))
310 goto exit;
311
312 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
313 switch (adapter->rx_ps_pages) {
314 case 1:
315 case 2:
316 case 3:
317 /* [Extended] Packet Split Receive Descriptor Format
318 *
319 * +-----------------------------------------------------+
320 * 0 | Buffer Address 0 [63:0] |
321 * +-----------------------------------------------------+
322 * 8 | Buffer Address 1 [63:0] |
323 * +-----------------------------------------------------+
324 * 16 | Buffer Address 2 [63:0] |
325 * +-----------------------------------------------------+
326 * 24 | Buffer Address 3 [63:0] |
327 * +-----------------------------------------------------+
328 */
329 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
330 "[buffer 1 63:0 ] "
331 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
332 "[bi->skb] <-- Ext Pkt Split format\n");
333 /* [Extended] Receive Descriptor (Write-Back) Format
334 *
335 * 63 48 47 32 31 13 12 8 7 4 3 0
336 * +------------------------------------------------------+
337 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
338 * | Checksum | Ident | | Queue | | Type |
339 * +------------------------------------------------------+
340 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
341 * +------------------------------------------------------+
342 * 63 48 47 32 31 20 19 0
343 */
344 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
345 "[vl l0 ee es] "
346 "[ l3 l2 l1 hs] [reserved ] ---------------- "
347 "[bi->skb] <-- Ext Rx Write-Back format\n");
348 for (i = 0; i < rx_ring->count; i++) {
349 buffer_info = &rx_ring->buffer_info[i];
350 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
351 u1 = (struct my_u1 *)rx_desc_ps;
352 staterr =
353 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
354 if (staterr & E1000_RXD_STAT_DD) {
355 /* Descriptor Done */
356 printk(KERN_INFO "RWB[0x%03X] %016llX "
357 "%016llX %016llX %016llX "
358 "---------------- %p", i,
359 le64_to_cpu(u1->a),
360 le64_to_cpu(u1->b),
361 le64_to_cpu(u1->c),
362 le64_to_cpu(u1->d),
363 buffer_info->skb);
364 } else {
365 printk(KERN_INFO "R [0x%03X] %016llX "
366 "%016llX %016llX %016llX %016llX %p", i,
367 le64_to_cpu(u1->a),
368 le64_to_cpu(u1->b),
369 le64_to_cpu(u1->c),
370 le64_to_cpu(u1->d),
371 (u64)buffer_info->dma,
372 buffer_info->skb);
373
374 if (netif_msg_pktdata(adapter))
375 print_hex_dump(KERN_INFO, "",
376 DUMP_PREFIX_ADDRESS, 16, 1,
377 phys_to_virt(buffer_info->dma),
378 adapter->rx_ps_bsize0, true);
379 }
380
381 if (i == rx_ring->next_to_use)
382 printk(KERN_CONT " NTU\n");
383 else if (i == rx_ring->next_to_clean)
384 printk(KERN_CONT " NTC\n");
385 else
386 printk(KERN_CONT "\n");
387 }
388 break;
389 default:
390 case 0:
391 /* Legacy Receive Descriptor Format
392 *
393 * +-----------------------------------------------------+
394 * | Buffer Address [63:0] |
395 * +-----------------------------------------------------+
396 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
397 * +-----------------------------------------------------+
398 * 63 48 47 40 39 32 31 16 15 0
399 */
400 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
401 "[vl er S cks ln] [bi->dma ] [bi->skb] "
402 "<-- Legacy format\n");
403 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
404 rx_desc = E1000_RX_DESC(*rx_ring, i);
405 buffer_info = &rx_ring->buffer_info[i];
406 u0 = (struct my_u0 *)rx_desc;
407 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
408 "%016llX %p",
409 i, le64_to_cpu(u0->a), le64_to_cpu(u0->b),
410 (u64)buffer_info->dma, buffer_info->skb);
411 if (i == rx_ring->next_to_use)
412 printk(KERN_CONT " NTU\n");
413 else if (i == rx_ring->next_to_clean)
414 printk(KERN_CONT " NTC\n");
415 else
416 printk(KERN_CONT "\n");
417
418 if (netif_msg_pktdata(adapter))
419 print_hex_dump(KERN_INFO, "",
420 DUMP_PREFIX_ADDRESS,
421 16, 1, phys_to_virt(buffer_info->dma),
422 adapter->rx_buffer_len, true);
423 }
424 }
425
426exit:
427 return;
428}
429
bc7f75fa
AK		 430/**
431 * e1000_desc_unused - calculate if we have unused descriptors
432 **/
433static int e1000_desc_unused(struct e1000_ring *ring)
434{
435 if (ring->next_to_clean > ring->next_to_use)
436 return ring->next_to_clean - ring->next_to_use - 1;
437
438 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
439}
440
441/**
ad68076e 442 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 443 * @adapter: board private structure
444 * @status: descriptor status field as written by hardware
445 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
446 * @skb: pointer to sk_buff to be indicated to stack
447 **/
448static void e1000_receive_skb(struct e1000_adapter *adapter,
449 struct net_device *netdev,
450 struct sk_buff *skb,
a39fe742 451 u8 status, __le16 vlan)
bc7f75fa
AK		 452{
453 skb->protocol = eth_type_trans(skb, netdev);
454
455 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 456 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
457 le16_to_cpu(vlan), skb);
bc7f75fa 458 else
89c88b16 459 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 460}
461
462/**
463 * e1000_rx_checksum - Receive Checksum Offload for 82543
464 * @adapter: board private structure
465 * @status_err: receive descriptor status and error fields
466 * @csum: receive descriptor csum field
467 * @sk_buff: socket buffer with received data
468 **/
469static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
470 u32 csum, struct sk_buff *skb)
471{
472 u16 status = (u16)status_err;
473 u8 errors = (u8)(status_err >> 24);
474 skb->ip_summed = CHECKSUM_NONE;
475
476 /* Ignore Checksum bit is set */
477 if (status & E1000_RXD_STAT_IXSM)
478 return;
479 /* TCP/UDP checksum error bit is set */
480 if (errors & E1000_RXD_ERR_TCPE) {
481 /* let the stack verify checksum errors */
482 adapter->hw_csum_err++;
483 return;
484 }
485
486 /* TCP/UDP Checksum has not been calculated */
487 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
488 return;
489
490 /* It must be a TCP or UDP packet with a valid checksum */
491 if (status & E1000_RXD_STAT_TCPCS) {
492 /* TCP checksum is good */
493 skb->ip_summed = CHECKSUM_UNNECESSARY;
494 } else {
ad68076e
BA		 495 /*
496 * IP fragment with UDP payload
497 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 498 * and then put the value in host order for further stack use.
499 */
a39fe742
AV		 500 __sum16 sum = (__force __sum16)htons(csum);
501 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 502 skb->ip_summed = CHECKSUM_COMPLETE;
503 }
504 adapter->hw_csum_good++;
505}
506
507/**
508 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
509 * @adapter: address of board private structure
510 **/
511static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
512 int cleaned_count)
513{
514 struct net_device *netdev = adapter->netdev;
515 struct pci_dev *pdev = adapter->pdev;
516 struct e1000_ring *rx_ring = adapter->rx_ring;
517 struct e1000_rx_desc *rx_desc;
518 struct e1000_buffer *buffer_info;
519 struct sk_buff *skb;
520 unsigned int i;
89d71a66 521 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 522
523 i = rx_ring->next_to_use;
524 buffer_info = &rx_ring->buffer_info[i];
525
526 while (cleaned_count--) {
527 skb = buffer_info->skb;
528 if (skb) {
529 skb_trim(skb, 0);
530 goto map_skb;
531 }
532
89d71a66 533 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 534 if (!skb) {
535 /* Better luck next round */
536 adapter->alloc_rx_buff_failed++;
537 break;
538 }
539
bc7f75fa
AK		 540 buffer_info->skb = skb;
541map_skb:
0be3f55f 542 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 543 adapter->rx_buffer_len,
0be3f55f
NN		 544 DMA_FROM_DEVICE);
545 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 546 dev_err(&pdev->dev, "RX DMA map failed\n");
547 adapter->rx_dma_failed++;
548 break;
549 }
550
551 rx_desc = E1000_RX_DESC(*rx_ring, i);
552 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
553
50849d79
TH		 554 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
555 /*
556 * Force memory writes to complete before letting h/w
557 * know there are new descriptors to fetch. (Only
558 * applicable for weak-ordered memory model archs,
559 * such as IA-64).
560 */
561 wmb();
562 writel(i, adapter->hw.hw_addr + rx_ring->tail);
563 }
bc7f75fa
AK		 564 i++;
565 if (i == rx_ring->count)
566 i = 0;
567 buffer_info = &rx_ring->buffer_info[i];
568 }
569
50849d79 570 rx_ring->next_to_use = i;
bc7f75fa
AK		 571}
572
573/**
574 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
575 * @adapter: address of board private structure
576 **/
577static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
578 int cleaned_count)
579{
580 struct net_device *netdev = adapter->netdev;
581 struct pci_dev *pdev = adapter->pdev;
582 union e1000_rx_desc_packet_split *rx_desc;
583 struct e1000_ring *rx_ring = adapter->rx_ring;
584 struct e1000_buffer *buffer_info;
585 struct e1000_ps_page *ps_page;
586 struct sk_buff *skb;
587 unsigned int i, j;
588
589 i = rx_ring->next_to_use;
590 buffer_info = &rx_ring->buffer_info[i];
591
592 while (cleaned_count--) {
593 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
594
595 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 596 ps_page = &buffer_info->ps_pages[j];
597 if (j >= adapter->rx_ps_pages) {
598 /* all unused desc entries get hw null ptr */
a39fe742 599 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 600 continue;
601 }
602 if (!ps_page->page) {
603 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 604 if (!ps_page->page) {
47f44e40
AK		 605 adapter->alloc_rx_buff_failed++;
606 goto no_buffers;
607 }
0be3f55f
NN		 608 ps_page->dma = dma_map_page(&pdev->dev,
609 ps_page->page,
610 0, PAGE_SIZE,
611 DMA_FROM_DEVICE);
612 if (dma_mapping_error(&pdev->dev,
613 ps_page->dma)) {
47f44e40
AK		 614 dev_err(&adapter->pdev->dev,
615 "RX DMA page map failed\n");
616 adapter->rx_dma_failed++;
617 goto no_buffers;
bc7f75fa 618 }
bc7f75fa 619 }
47f44e40
AK		 620 /*
621 * Refresh the desc even if buffer_addrs
622 * didn't change because each write-back
623 * erases this info.
624 */
625 rx_desc->read.buffer_addr[j+1] =
626 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 627 }
628
89d71a66
ED		 629 skb = netdev_alloc_skb_ip_align(netdev,
630 adapter->rx_ps_bsize0);
bc7f75fa
AK		 631
632 if (!skb) {
633 adapter->alloc_rx_buff_failed++;
634 break;
635 }
636
bc7f75fa 637 buffer_info->skb = skb;
0be3f55f 638 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 639 adapter->rx_ps_bsize0,
0be3f55f
NN		 640 DMA_FROM_DEVICE);
641 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 642 dev_err(&pdev->dev, "RX DMA map failed\n");
643 adapter->rx_dma_failed++;
644 /* cleanup skb */
645 dev_kfree_skb_any(skb);
646 buffer_info->skb = NULL;
647 break;
648 }
649
650 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
651
50849d79
TH		 652 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
653 /*
654 * Force memory writes to complete before letting h/w
655 * know there are new descriptors to fetch. (Only
656 * applicable for weak-ordered memory model archs,
657 * such as IA-64).
658 */
659 wmb();
660 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
661 }
662
bc7f75fa
AK		 663 i++;
664 if (i == rx_ring->count)
665 i = 0;
666 buffer_info = &rx_ring->buffer_info[i];
667 }
668
669no_buffers:
50849d79 670 rx_ring->next_to_use = i;
bc7f75fa
AK		 671}
672
97ac8cae
BA		 673/**
674 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
675 * @adapter: address of board private structure
97ac8cae
BA		 676 * @cleaned_count: number of buffers to allocate this pass
677 **/
678
679static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
680 int cleaned_count)
681{
682 struct net_device *netdev = adapter->netdev;
683 struct pci_dev *pdev = adapter->pdev;
684 struct e1000_rx_desc *rx_desc;
685 struct e1000_ring *rx_ring = adapter->rx_ring;
686 struct e1000_buffer *buffer_info;
687 struct sk_buff *skb;
688 unsigned int i;
89d71a66 689 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 690
691 i = rx_ring->next_to_use;
692 buffer_info = &rx_ring->buffer_info[i];
693
694 while (cleaned_count--) {
695 skb = buffer_info->skb;
696 if (skb) {
697 skb_trim(skb, 0);
698 goto check_page;
699 }
700
89d71a66 701 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 702 if (unlikely(!skb)) {
703 /* Better luck next round */
704 adapter->alloc_rx_buff_failed++;
705 break;
706 }
707
97ac8cae
BA		 708 buffer_info->skb = skb;
709check_page:
710 /* allocate a new page if necessary */
711 if (!buffer_info->page) {
712 buffer_info->page = alloc_page(GFP_ATOMIC);
713 if (unlikely(!buffer_info->page)) {
714 adapter->alloc_rx_buff_failed++;
715 break;
716 }
717 }
718
719 if (!buffer_info->dma)
0be3f55f 720 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 721 buffer_info->page, 0,
722 PAGE_SIZE,
0be3f55f 723 DMA_FROM_DEVICE);
97ac8cae
BA		 724
725 rx_desc = E1000_RX_DESC(*rx_ring, i);
726 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
727
728 if (unlikely(++i == rx_ring->count))
729 i = 0;
730 buffer_info = &rx_ring->buffer_info[i];
731 }
732
733 if (likely(rx_ring->next_to_use != i)) {
734 rx_ring->next_to_use = i;
735 if (unlikely(i-- == 0))
736 i = (rx_ring->count - 1);
737
738 /* Force memory writes to complete before letting h/w
739 * know there are new descriptors to fetch. (Only
740 * applicable for weak-ordered memory model archs,
741 * such as IA-64). */
742 wmb();
743 writel(i, adapter->hw.hw_addr + rx_ring->tail);
744 }
745}
746
bc7f75fa
AK		 747/**
748 * e1000_clean_rx_irq - Send received data up the network stack; legacy
749 * @adapter: board private structure
750 *
751 * the return value indicates whether actual cleaning was done, there
752 * is no guarantee that everything was cleaned
753 **/
754static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
755 int *work_done, int work_to_do)
756{
757 struct net_device *netdev = adapter->netdev;
758 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 759 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 760 struct e1000_ring *rx_ring = adapter->rx_ring;
761 struct e1000_rx_desc *rx_desc, *next_rxd;
762 struct e1000_buffer *buffer_info, *next_buffer;
763 u32 length;
764 unsigned int i;
765 int cleaned_count = 0;
766 bool cleaned = 0;
767 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
768
769 i = rx_ring->next_to_clean;
770 rx_desc = E1000_RX_DESC(*rx_ring, i);
771 buffer_info = &rx_ring->buffer_info[i];
772
773 while (rx_desc->status & E1000_RXD_STAT_DD) {
774 struct sk_buff *skb;
775 u8 status;
776
777 if (*work_done >= work_to_do)
778 break;
779 (*work_done)++;
780
781 status = rx_desc->status;
782 skb = buffer_info->skb;
783 buffer_info->skb = NULL;
784
785 prefetch(skb->data - NET_IP_ALIGN);
786
787 i++;
788 if (i == rx_ring->count)
789 i = 0;
790 next_rxd = E1000_RX_DESC(*rx_ring, i);
791 prefetch(next_rxd);
792
793 next_buffer = &rx_ring->buffer_info[i];
794
795 cleaned = 1;
796 cleaned_count++;
0be3f55f 797 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 798 buffer_info->dma,
799 adapter->rx_buffer_len,
0be3f55f 800 DMA_FROM_DEVICE);
bc7f75fa
AK		 801 buffer_info->dma = 0;
802
803 length = le16_to_cpu(rx_desc->length);
804
b94b5028
JB		 805 /*
806 * !EOP means multiple descriptors were used to store a single
807 * packet, if that's the case we need to toss it. In fact, we
808 * need to toss every packet with the EOP bit clear and the
809 * next frame that _does_ have the EOP bit set, as it is by
810 * definition only a frame fragment
811 */
812 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
813 adapter->flags2 |= FLAG2_IS_DISCARDING;
814
815 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 816 /* All receives must fit into a single buffer */
3bb99fe2 817 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 818 /* recycle */
819 buffer_info->skb = skb;
b94b5028
JB		 820 if (status & E1000_RXD_STAT_EOP)
821 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 822 goto next_desc;
823 }
824
825 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
826 /* recycle */
827 buffer_info->skb = skb;
828 goto next_desc;
829 }
830
eb7c3adb
JK		 831 /* adjust length to remove Ethernet CRC */
832 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
833 length -= 4;
834
bc7f75fa
AK		 835 total_rx_bytes += length;
836 total_rx_packets++;
837
ad68076e
BA		 838 /*
839 * code added for copybreak, this should improve
bc7f75fa 840 * performance for small packets with large amounts
ad68076e
BA		 841 * of reassembly being done in the stack
842 */
bc7f75fa
AK		 843 if (length < copybreak) {
844 struct sk_buff *new_skb =
89d71a66 845 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 846 if (new_skb) {
808ff676
BA		 847 skb_copy_to_linear_data_offset(new_skb,
848 -NET_IP_ALIGN,
849 (skb->data -
850 NET_IP_ALIGN),
851 (length +
852 NET_IP_ALIGN));
bc7f75fa
AK		 853 /* save the skb in buffer_info as good */
854 buffer_info->skb = skb;
855 skb = new_skb;
856 }
857 /* else just continue with the old one */
858 }
859 /* end copybreak code */
860 skb_put(skb, length);
861
862 /* Receive Checksum Offload */
863 e1000_rx_checksum(adapter,
864 (u32)(status) |
865 ((u32)(rx_desc->errors) << 24),
866 le16_to_cpu(rx_desc->csum), skb);
867
868 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
869
870next_desc:
871 rx_desc->status = 0;
872
873 /* return some buffers to hardware, one at a time is too slow */
874 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
875 adapter->alloc_rx_buf(adapter, cleaned_count);
876 cleaned_count = 0;
877 }
878
879 /* use prefetched values */
880 rx_desc = next_rxd;
881 buffer_info = next_buffer;
882 }
883 rx_ring->next_to_clean = i;
884
885 cleaned_count = e1000_desc_unused(rx_ring);
886 if (cleaned_count)
887 adapter->alloc_rx_buf(adapter, cleaned_count);
888
bc7f75fa 889 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 890 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 891 netdev->stats.rx_bytes += total_rx_bytes;
892 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 893 return cleaned;
894}
895
bc7f75fa
AK		 896static void e1000_put_txbuf(struct e1000_adapter *adapter,
897 struct e1000_buffer *buffer_info)
898{
03b1320d
AD		 899 if (buffer_info->dma) {
900 if (buffer_info->mapped_as_page)
0be3f55f
NN		 901 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
902 buffer_info->length, DMA_TO_DEVICE);
03b1320d 903 else
0be3f55f
NN		 904 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
905 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 906 buffer_info->dma = 0;
907 }
bc7f75fa
AK		 908 if (buffer_info->skb) {
909 dev_kfree_skb_any(buffer_info->skb);
910 buffer_info->skb = NULL;
911 }
1b7719c4 912 buffer_info->time_stamp = 0;
bc7f75fa
AK		 913}
914
41cec6f1 915static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 916{
41cec6f1
BA		 917 struct e1000_adapter *adapter = container_of(work,
918 struct e1000_adapter,
919 print_hang_task);
bc7f75fa
AK		 920 struct e1000_ring *tx_ring = adapter->tx_ring;
921 unsigned int i = tx_ring->next_to_clean;
922 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
923 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 924 struct e1000_hw *hw = &adapter->hw;
925 u16 phy_status, phy_1000t_status, phy_ext_status;
926 u16 pci_status;
927
928 e1e_rphy(hw, PHY_STATUS, &phy_status);
929 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
930 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 931
41cec6f1
BA		 932 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
933
934 /* detected Hardware unit hang */
935 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 936 " TDH <%x>\n"
937 " TDT <%x>\n"
938 " next_to_use <%x>\n"
939 " next_to_clean <%x>\n"
940 "buffer_info[next_to_clean]:\n"
941 " time_stamp <%lx>\n"
942 " next_to_watch <%x>\n"
943 " jiffies <%lx>\n"
41cec6f1
BA		 944 " next_to_watch.status <%x>\n"
945 "MAC Status <%x>\n"
946 "PHY Status <%x>\n"
947 "PHY 1000BASE-T Status <%x>\n"
948 "PHY Extended Status <%x>\n"
949 "PCI Status <%x>\n",
44defeb3
JK		 950 readl(adapter->hw.hw_addr + tx_ring->head),
951 readl(adapter->hw.hw_addr + tx_ring->tail),
952 tx_ring->next_to_use,
953 tx_ring->next_to_clean,
954 tx_ring->buffer_info[eop].time_stamp,
955 eop,
956 jiffies,
41cec6f1
BA		 957 eop_desc->upper.fields.status,
958 er32(STATUS),
959 phy_status,
960 phy_1000t_status,
961 phy_ext_status,
962 pci_status);
bc7f75fa
AK		 963}
964
965/**
966 * e1000_clean_tx_irq - Reclaim resources after transmit completes
967 * @adapter: board private structure
968 *
969 * the return value indicates whether actual cleaning was done, there
970 * is no guarantee that everything was cleaned
971 **/
972static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
973{
974 struct net_device *netdev = adapter->netdev;
975 struct e1000_hw *hw = &adapter->hw;
976 struct e1000_ring *tx_ring = adapter->tx_ring;
977 struct e1000_tx_desc *tx_desc, *eop_desc;
978 struct e1000_buffer *buffer_info;
979 unsigned int i, eop;
980 unsigned int count = 0;
bc7f75fa
AK		 981 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
982
983 i = tx_ring->next_to_clean;
984 eop = tx_ring->buffer_info[i].next_to_watch;
985 eop_desc = E1000_TX_DESC(*tx_ring, eop);
986
12d04a3c
AD		 987 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
988 (count < tx_ring->count)) {
a86043c2
JB		 989 bool cleaned = false;
990 for (; !cleaned; count++) {
bc7f75fa
AK		 991 tx_desc = E1000_TX_DESC(*tx_ring, i);
992 buffer_info = &tx_ring->buffer_info[i];
993 cleaned = (i == eop);
994
995 if (cleaned) {
9ed318d5
TH		 996 total_tx_packets += buffer_info->segs;
997 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK		 998 }
999
1000 e1000_put_txbuf(adapter, buffer_info);
1001 tx_desc->upper.data = 0;
1002
1003 i++;
1004 if (i == tx_ring->count)
1005 i = 0;
1006 }
1007
dac87619
TL		 1008 if (i == tx_ring->next_to_use)
1009 break;
bc7f75fa
AK		 1010 eop = tx_ring->buffer_info[i].next_to_watch;
1011 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1012 }
1013
1014 tx_ring->next_to_clean = i;
1015
1016#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1017 if (count && netif_carrier_ok(netdev) &&
1018 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1019 /* Make sure that anybody stopping the queue after this
1020 * sees the new next_to_clean.
1021 */
1022 smp_mb();
1023
1024 if (netif_queue_stopped(netdev) &&
1025 !(test_bit(__E1000_DOWN, &adapter->state))) {
1026 netif_wake_queue(netdev);
1027 ++adapter->restart_queue;
1028 }
1029 }
1030
1031 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1032 /*
1033 * Detect a transmit hang in hardware, this serializes the
1034 * check with the clearing of time_stamp and movement of i
1035 */
bc7f75fa 1036 adapter->detect_tx_hung = 0;
12d04a3c
AD		 1037 if (tx_ring->buffer_info[i].time_stamp &&
1038 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 1039 + (adapter->tx_timeout_factor * HZ)) &&
1040 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1041 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 1042 netif_stop_queue(netdev);
1043 }
1044 }
1045 adapter->total_tx_bytes += total_tx_bytes;
1046 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 1047 netdev->stats.tx_bytes += total_tx_bytes;
1048 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 1049 return (count < tx_ring->count);
bc7f75fa
AK		 1050}
1051
bc7f75fa
AK		 1052/**
1053 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1054 * @adapter: board private structure
1055 *
1056 * the return value indicates whether actual cleaning was done, there
1057 * is no guarantee that everything was cleaned
1058 **/
1059static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1060 int *work_done, int work_to_do)
1061{
3bb99fe2 1062 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1063 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1064 struct net_device *netdev = adapter->netdev;
1065 struct pci_dev *pdev = adapter->pdev;
1066 struct e1000_ring *rx_ring = adapter->rx_ring;
1067 struct e1000_buffer *buffer_info, *next_buffer;
1068 struct e1000_ps_page *ps_page;
1069 struct sk_buff *skb;
1070 unsigned int i, j;
1071 u32 length, staterr;
1072 int cleaned_count = 0;
1073 bool cleaned = 0;
1074 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1075
1076 i = rx_ring->next_to_clean;
1077 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1078 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1079 buffer_info = &rx_ring->buffer_info[i];
1080
1081 while (staterr & E1000_RXD_STAT_DD) {
1082 if (*work_done >= work_to_do)
1083 break;
1084 (*work_done)++;
1085 skb = buffer_info->skb;
1086
1087 /* in the packet split case this is header only */
1088 prefetch(skb->data - NET_IP_ALIGN);
1089
1090 i++;
1091 if (i == rx_ring->count)
1092 i = 0;
1093 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1094 prefetch(next_rxd);
1095
1096 next_buffer = &rx_ring->buffer_info[i];
1097
1098 cleaned = 1;
1099 cleaned_count++;
0be3f55f 1100 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1101 adapter->rx_ps_bsize0,
0be3f55f 1102 DMA_FROM_DEVICE);
bc7f75fa
AK		 1103 buffer_info->dma = 0;
1104
b94b5028
JB		 1105 /* see !EOP comment in other rx routine */
1106 if (!(staterr & E1000_RXD_STAT_EOP))
1107 adapter->flags2 |= FLAG2_IS_DISCARDING;
1108
1109 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 1110 e_dbg("Packet Split buffers didn't pick up the full "
1111 "packet\n");
bc7f75fa 1112 dev_kfree_skb_irq(skb);
b94b5028
JB		 1113 if (staterr & E1000_RXD_STAT_EOP)
1114 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1115 goto next_desc;
1116 }
1117
1118 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1119 dev_kfree_skb_irq(skb);
1120 goto next_desc;
1121 }
1122
1123 length = le16_to_cpu(rx_desc->wb.middle.length0);
1124
1125 if (!length) {
3bb99fe2
BA		 1126 e_dbg("Last part of the packet spanning multiple "
1127 "descriptors\n");
bc7f75fa
AK		 1128 dev_kfree_skb_irq(skb);
1129 goto next_desc;
1130 }
1131
1132 /* Good Receive */
1133 skb_put(skb, length);
1134
1135 {
ad68076e
BA		 1136 /*
1137 * this looks ugly, but it seems compiler issues make it
1138 * more efficient than reusing j
1139 */
bc7f75fa
AK		 1140 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1141
ad68076e
BA		 1142 /*
1143 * page alloc/put takes too long and effects small packet
1144 * throughput, so unsplit small packets and save the alloc/put
1145 * only valid in softirq (napi) context to call kmap_*
1146 */
bc7f75fa
AK		 1147 if (l1 && (l1 <= copybreak) &&
1148 ((length + l1) <= adapter->rx_ps_bsize0)) {
1149 u8 *vaddr;
1150
47f44e40 1151 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1152
ad68076e
BA		 1153 /*
1154 * there is no documentation about how to call
bc7f75fa 1155 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 1156 * very long
1157 */
0be3f55f
NN		 1158 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1159 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK		 1160 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1161 memcpy(skb_tail_pointer(skb), vaddr, l1);
1162 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN		 1163 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1164 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1165
eb7c3adb
JK		 1166 /* remove the CRC */
1167 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1168 l1 -= 4;
1169
bc7f75fa
AK		 1170 skb_put(skb, l1);
1171 goto copydone;
1172 } /* if */
1173 }
1174
1175 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1176 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1177 if (!length)
1178 break;
1179
47f44e40 1180 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1181 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1182 DMA_FROM_DEVICE);
bc7f75fa
AK		 1183 ps_page->dma = 0;
1184 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1185 ps_page->page = NULL;
1186 skb->len += length;
1187 skb->data_len += length;
1188 skb->truesize += length;
1189 }
1190
eb7c3adb
JK		 1191 /* strip the ethernet crc, problem is we're using pages now so
1192 * this whole operation can get a little cpu intensive
1193 */
1194 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1195 pskb_trim(skb, skb->len - 4);
1196
bc7f75fa
AK		 1197copydone:
1198 total_rx_bytes += skb->len;
1199 total_rx_packets++;
1200
1201 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1202 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1203
1204 if (rx_desc->wb.upper.header_status &
1205 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1206 adapter->rx_hdr_split++;
1207
1208 e1000_receive_skb(adapter, netdev, skb,
1209 staterr, rx_desc->wb.middle.vlan);
1210
1211next_desc:
1212 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1213 buffer_info->skb = NULL;
1214
1215 /* return some buffers to hardware, one at a time is too slow */
1216 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1217 adapter->alloc_rx_buf(adapter, cleaned_count);
1218 cleaned_count = 0;
1219 }
1220
1221 /* use prefetched values */
1222 rx_desc = next_rxd;
1223 buffer_info = next_buffer;
1224
1225 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1226 }
1227 rx_ring->next_to_clean = i;
1228
1229 cleaned_count = e1000_desc_unused(rx_ring);
1230 if (cleaned_count)
1231 adapter->alloc_rx_buf(adapter, cleaned_count);
1232
bc7f75fa 1233 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1234 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1235 netdev->stats.rx_bytes += total_rx_bytes;
1236 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 1237 return cleaned;
1238}
1239
97ac8cae
BA		 1240/**
1241 * e1000_consume_page - helper function
1242 **/
1243static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1244 u16 length)
1245{
1246 bi->page = NULL;
1247 skb->len += length;
1248 skb->data_len += length;
1249 skb->truesize += length;
1250}
1251
1252/**
1253 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1254 * @adapter: board private structure
1255 *
1256 * the return value indicates whether actual cleaning was done, there
1257 * is no guarantee that everything was cleaned
1258 **/
1259
1260static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1261 int *work_done, int work_to_do)
1262{
1263 struct net_device *netdev = adapter->netdev;
1264 struct pci_dev *pdev = adapter->pdev;
1265 struct e1000_ring *rx_ring = adapter->rx_ring;
1266 struct e1000_rx_desc *rx_desc, *next_rxd;
1267 struct e1000_buffer *buffer_info, *next_buffer;
1268 u32 length;
1269 unsigned int i;
1270 int cleaned_count = 0;
1271 bool cleaned = false;
1272 unsigned int total_rx_bytes=0, total_rx_packets=0;
1273
1274 i = rx_ring->next_to_clean;
1275 rx_desc = E1000_RX_DESC(*rx_ring, i);
1276 buffer_info = &rx_ring->buffer_info[i];
1277
1278 while (rx_desc->status & E1000_RXD_STAT_DD) {
1279 struct sk_buff *skb;
1280 u8 status;
1281
1282 if (*work_done >= work_to_do)
1283 break;
1284 (*work_done)++;
1285
1286 status = rx_desc->status;
1287 skb = buffer_info->skb;
1288 buffer_info->skb = NULL;
1289
1290 ++i;
1291 if (i == rx_ring->count)
1292 i = 0;
1293 next_rxd = E1000_RX_DESC(*rx_ring, i);
1294 prefetch(next_rxd);
1295
1296 next_buffer = &rx_ring->buffer_info[i];
1297
1298 cleaned = true;
1299 cleaned_count++;
0be3f55f
NN		 1300 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1301 DMA_FROM_DEVICE);
97ac8cae
BA		 1302 buffer_info->dma = 0;
1303
1304 length = le16_to_cpu(rx_desc->length);
1305
1306 /* errors is only valid for DD + EOP descriptors */
1307 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1308 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1309 /* recycle both page and skb */
1310 buffer_info->skb = skb;
1311 /* an error means any chain goes out the window
1312 * too */
1313 if (rx_ring->rx_skb_top)
1314 dev_kfree_skb(rx_ring->rx_skb_top);
1315 rx_ring->rx_skb_top = NULL;
1316 goto next_desc;
1317 }
1318
1319#define rxtop rx_ring->rx_skb_top
1320 if (!(status & E1000_RXD_STAT_EOP)) {
1321 /* this descriptor is only the beginning (or middle) */
1322 if (!rxtop) {
1323 /* this is the beginning of a chain */
1324 rxtop = skb;
1325 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1326 0, length);
1327 } else {
1328 /* this is the middle of a chain */
1329 skb_fill_page_desc(rxtop,
1330 skb_shinfo(rxtop)->nr_frags,
1331 buffer_info->page, 0, length);
1332 /* re-use the skb, only consumed the page */
1333 buffer_info->skb = skb;
1334 }
1335 e1000_consume_page(buffer_info, rxtop, length);
1336 goto next_desc;
1337 } else {
1338 if (rxtop) {
1339 /* end of the chain */
1340 skb_fill_page_desc(rxtop,
1341 skb_shinfo(rxtop)->nr_frags,
1342 buffer_info->page, 0, length);
1343 /* re-use the current skb, we only consumed the
1344 * page */
1345 buffer_info->skb = skb;
1346 skb = rxtop;
1347 rxtop = NULL;
1348 e1000_consume_page(buffer_info, skb, length);
1349 } else {
1350 /* no chain, got EOP, this buf is the packet
1351 * copybreak to save the put_page/alloc_page */
1352 if (length <= copybreak &&
1353 skb_tailroom(skb) >= length) {
1354 u8 *vaddr;
1355 vaddr = kmap_atomic(buffer_info->page,
1356 KM_SKB_DATA_SOFTIRQ);
1357 memcpy(skb_tail_pointer(skb), vaddr,
1358 length);
1359 kunmap_atomic(vaddr,
1360 KM_SKB_DATA_SOFTIRQ);
1361 /* re-use the page, so don't erase
1362 * buffer_info->page */
1363 skb_put(skb, length);
1364 } else {
1365 skb_fill_page_desc(skb, 0,
1366 buffer_info->page, 0,
1367 length);
1368 e1000_consume_page(buffer_info, skb,
1369 length);
1370 }
1371 }
1372 }
1373
1374 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1375 e1000_rx_checksum(adapter,
1376 (u32)(status) |
1377 ((u32)(rx_desc->errors) << 24),
1378 le16_to_cpu(rx_desc->csum), skb);
1379
1380 /* probably a little skewed due to removing CRC */
1381 total_rx_bytes += skb->len;
1382 total_rx_packets++;
1383
1384 /* eth type trans needs skb->data to point to something */
1385 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1386 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1387 dev_kfree_skb(skb);
1388 goto next_desc;
1389 }
1390
1391 e1000_receive_skb(adapter, netdev, skb, status,
1392 rx_desc->special);
1393
1394next_desc:
1395 rx_desc->status = 0;
1396
1397 /* return some buffers to hardware, one at a time is too slow */
1398 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1399 adapter->alloc_rx_buf(adapter, cleaned_count);
1400 cleaned_count = 0;
1401 }
1402
1403 /* use prefetched values */
1404 rx_desc = next_rxd;
1405 buffer_info = next_buffer;
1406 }
1407 rx_ring->next_to_clean = i;
1408
1409 cleaned_count = e1000_desc_unused(rx_ring);
1410 if (cleaned_count)
1411 adapter->alloc_rx_buf(adapter, cleaned_count);
1412
1413 adapter->total_rx_bytes += total_rx_bytes;
1414 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1415 netdev->stats.rx_bytes += total_rx_bytes;
1416 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1417 return cleaned;
1418}
1419
bc7f75fa
AK		 1420/**
1421 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1422 * @adapter: board private structure
1423 **/
1424static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1425{
1426 struct e1000_ring *rx_ring = adapter->rx_ring;
1427 struct e1000_buffer *buffer_info;
1428 struct e1000_ps_page *ps_page;
1429 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1430 unsigned int i, j;
1431
1432 /* Free all the Rx ring sk_buffs */
1433 for (i = 0; i < rx_ring->count; i++) {
1434 buffer_info = &rx_ring->buffer_info[i];
1435 if (buffer_info->dma) {
1436 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1437 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1438 adapter->rx_buffer_len,
0be3f55f 1439 DMA_FROM_DEVICE);
97ac8cae 1440 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1441 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1442 PAGE_SIZE,
0be3f55f 1443 DMA_FROM_DEVICE);
bc7f75fa 1444 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1445 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1446 adapter->rx_ps_bsize0,
0be3f55f 1447 DMA_FROM_DEVICE);
bc7f75fa
AK		 1448 buffer_info->dma = 0;
1449 }
1450
97ac8cae
BA		 1451 if (buffer_info->page) {
1452 put_page(buffer_info->page);
1453 buffer_info->page = NULL;
1454 }
1455
bc7f75fa
AK		 1456 if (buffer_info->skb) {
1457 dev_kfree_skb(buffer_info->skb);
1458 buffer_info->skb = NULL;
1459 }
1460
1461 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1462 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1463 if (!ps_page->page)
1464 break;
0be3f55f
NN		 1465 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1466 DMA_FROM_DEVICE);
bc7f75fa
AK		 1467 ps_page->dma = 0;
1468 put_page(ps_page->page);
1469 ps_page->page = NULL;
1470 }
1471 }
1472
1473 /* there also may be some cached data from a chained receive */
1474 if (rx_ring->rx_skb_top) {
1475 dev_kfree_skb(rx_ring->rx_skb_top);
1476 rx_ring->rx_skb_top = NULL;
1477 }
1478
bc7f75fa
AK		 1479 /* Zero out the descriptor ring */
1480 memset(rx_ring->desc, 0, rx_ring->size);
1481
1482 rx_ring->next_to_clean = 0;
1483 rx_ring->next_to_use = 0;
b94b5028 1484 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1485
1486 writel(0, adapter->hw.hw_addr + rx_ring->head);
1487 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1488}
1489
a8f88ff5
JB		 1490static void e1000e_downshift_workaround(struct work_struct *work)
1491{
1492 struct e1000_adapter *adapter = container_of(work,
1493 struct e1000_adapter, downshift_task);
1494
1495 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1496}
1497
bc7f75fa
AK		 1498/**
1499 * e1000_intr_msi - Interrupt Handler
1500 * @irq: interrupt number
1501 * @data: pointer to a network interface device structure
1502 **/
1503static irqreturn_t e1000_intr_msi(int irq, void *data)
1504{
1505 struct net_device *netdev = data;
1506 struct e1000_adapter *adapter = netdev_priv(netdev);
1507 struct e1000_hw *hw = &adapter->hw;
1508 u32 icr = er32(ICR);
1509
ad68076e
BA		 1510 /*
1511 * read ICR disables interrupts using IAM
1512 */
bc7f75fa 1513
573cca8c 1514 if (icr & E1000_ICR_LSC) {
bc7f75fa 1515 hw->mac.get_link_status = 1;
ad68076e
BA		 1516 /*
1517 * ICH8 workaround-- Call gig speed drop workaround on cable
1518 * disconnect (LSC) before accessing any PHY registers
1519 */
bc7f75fa
AK		 1520 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1521 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1522 schedule_work(&adapter->downshift_task);
bc7f75fa 1523
ad68076e
BA		 1524 /*
1525 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1526 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1527 * adapter in watchdog
1528 */
bc7f75fa
AK		 1529 if (netif_carrier_ok(netdev) &&
1530 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1531 /* disable receives */
1532 u32 rctl = er32(RCTL);
1533 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1534 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1535 }
1536 /* guard against interrupt when we're going down */
1537 if (!test_bit(__E1000_DOWN, &adapter->state))
1538 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1539 }
1540
288379f0 1541 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1542 adapter->total_tx_bytes = 0;
1543 adapter->total_tx_packets = 0;
1544 adapter->total_rx_bytes = 0;
1545 adapter->total_rx_packets = 0;
288379f0 1546 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1547 }
1548
1549 return IRQ_HANDLED;
1550}
1551
1552/**
1553 * e1000_intr - Interrupt Handler
1554 * @irq: interrupt number
1555 * @data: pointer to a network interface device structure
1556 **/
1557static irqreturn_t e1000_intr(int irq, void *data)
1558{
1559 struct net_device *netdev = data;
1560 struct e1000_adapter *adapter = netdev_priv(netdev);
1561 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1562 u32 rctl, icr = er32(ICR);
4662e82b 1563
a68ea775 1564 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1565 return IRQ_NONE; /* Not our interrupt */
1566
ad68076e
BA		 1567 /*
1568 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1569 * not set, then the adapter didn't send an interrupt
1570 */
bc7f75fa
AK		 1571 if (!(icr & E1000_ICR_INT_ASSERTED))
1572 return IRQ_NONE;
1573
ad68076e
BA		 1574 /*
1575 * Interrupt Auto-Mask...upon reading ICR,
1576 * interrupts are masked. No need for the
1577 * IMC write
1578 */
bc7f75fa 1579
573cca8c 1580 if (icr & E1000_ICR_LSC) {
bc7f75fa 1581 hw->mac.get_link_status = 1;
ad68076e
BA		 1582 /*
1583 * ICH8 workaround-- Call gig speed drop workaround on cable
1584 * disconnect (LSC) before accessing any PHY registers
1585 */
bc7f75fa
AK		 1586 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1587 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1588 schedule_work(&adapter->downshift_task);
bc7f75fa 1589
ad68076e
BA		 1590 /*
1591 * 80003ES2LAN workaround--
bc7f75fa
AK		 1592 * For packet buffer work-around on link down event;
1593 * disable receives here in the ISR and
1594 * reset adapter in watchdog
1595 */
1596 if (netif_carrier_ok(netdev) &&
1597 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1598 /* disable receives */
1599 rctl = er32(RCTL);
1600 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1601 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1602 }
1603 /* guard against interrupt when we're going down */
1604 if (!test_bit(__E1000_DOWN, &adapter->state))
1605 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1606 }
1607
288379f0 1608 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1609 adapter->total_tx_bytes = 0;
1610 adapter->total_tx_packets = 0;
1611 adapter->total_rx_bytes = 0;
1612 adapter->total_rx_packets = 0;
288379f0 1613 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1614 }
1615
1616 return IRQ_HANDLED;
1617}
1618
4662e82b
BA		 1619static irqreturn_t e1000_msix_other(int irq, void *data)
1620{
1621 struct net_device *netdev = data;
1622 struct e1000_adapter *adapter = netdev_priv(netdev);
1623 struct e1000_hw *hw = &adapter->hw;
1624 u32 icr = er32(ICR);
1625
1626 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1627 if (!test_bit(__E1000_DOWN, &adapter->state))
1628 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1629 return IRQ_NONE;
1630 }
1631
1632 if (icr & adapter->eiac_mask)
1633 ew32(ICS, (icr & adapter->eiac_mask));
1634
1635 if (icr & E1000_ICR_OTHER) {
1636 if (!(icr & E1000_ICR_LSC))
1637 goto no_link_interrupt;
1638 hw->mac.get_link_status = 1;
1639 /* guard against interrupt when we're going down */
1640 if (!test_bit(__E1000_DOWN, &adapter->state))
1641 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1642 }
1643
1644no_link_interrupt:
a3c69fef
JB		 1645 if (!test_bit(__E1000_DOWN, &adapter->state))
1646 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1647
1648 return IRQ_HANDLED;
1649}
1650
1651
1652static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1653{
1654 struct net_device *netdev = data;
1655 struct e1000_adapter *adapter = netdev_priv(netdev);
1656 struct e1000_hw *hw = &adapter->hw;
1657 struct e1000_ring *tx_ring = adapter->tx_ring;
1658
1659
1660 adapter->total_tx_bytes = 0;
1661 adapter->total_tx_packets = 0;
1662
1663 if (!e1000_clean_tx_irq(adapter))
1664 /* Ring was not completely cleaned, so fire another interrupt */
1665 ew32(ICS, tx_ring->ims_val);
1666
1667 return IRQ_HANDLED;
1668}
1669
1670static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1671{
1672 struct net_device *netdev = data;
1673 struct e1000_adapter *adapter = netdev_priv(netdev);
1674
1675 /* Write the ITR value calculated at the end of the
1676 * previous interrupt.
1677 */
1678 if (adapter->rx_ring->set_itr) {
1679 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1680 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1681 adapter->rx_ring->set_itr = 0;
1682 }
1683
288379f0 1684 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1685 adapter->total_rx_bytes = 0;
1686 adapter->total_rx_packets = 0;
288379f0 1687 __napi_schedule(&adapter->napi);
4662e82b
BA		 1688 }
1689 return IRQ_HANDLED;
1690}
1691
1692/**
1693 * e1000_configure_msix - Configure MSI-X hardware
1694 *
1695 * e1000_configure_msix sets up the hardware to properly
1696 * generate MSI-X interrupts.
1697 **/
1698static void e1000_configure_msix(struct e1000_adapter *adapter)
1699{
1700 struct e1000_hw *hw = &adapter->hw;
1701 struct e1000_ring *rx_ring = adapter->rx_ring;
1702 struct e1000_ring *tx_ring = adapter->tx_ring;
1703 int vector = 0;
1704 u32 ctrl_ext, ivar = 0;
1705
1706 adapter->eiac_mask = 0;
1707
1708 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1709 if (hw->mac.type == e1000_82574) {
1710 u32 rfctl = er32(RFCTL);
1711 rfctl |= E1000_RFCTL_ACK_DIS;
1712 ew32(RFCTL, rfctl);
1713 }
1714
1715#define E1000_IVAR_INT_ALLOC_VALID 0x8
1716 /* Configure Rx vector */
1717 rx_ring->ims_val = E1000_IMS_RXQ0;
1718 adapter->eiac_mask |= rx_ring->ims_val;
1719 if (rx_ring->itr_val)
1720 writel(1000000000 / (rx_ring->itr_val * 256),
1721 hw->hw_addr + rx_ring->itr_register);
1722 else
1723 writel(1, hw->hw_addr + rx_ring->itr_register);
1724 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1725
1726 /* Configure Tx vector */
1727 tx_ring->ims_val = E1000_IMS_TXQ0;
1728 vector++;
1729 if (tx_ring->itr_val)
1730 writel(1000000000 / (tx_ring->itr_val * 256),
1731 hw->hw_addr + tx_ring->itr_register);
1732 else
1733 writel(1, hw->hw_addr + tx_ring->itr_register);
1734 adapter->eiac_mask |= tx_ring->ims_val;
1735 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1736
1737 /* set vector for Other Causes, e.g. link changes */
1738 vector++;
1739 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1740 if (rx_ring->itr_val)
1741 writel(1000000000 / (rx_ring->itr_val * 256),
1742 hw->hw_addr + E1000_EITR_82574(vector));
1743 else
1744 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1745
1746 /* Cause Tx interrupts on every write back */
1747 ivar |= (1 << 31);
1748
1749 ew32(IVAR, ivar);
1750
1751 /* enable MSI-X PBA support */
1752 ctrl_ext = er32(CTRL_EXT);
1753 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1754
1755 /* Auto-Mask Other interrupts upon ICR read */
1756#define E1000_EIAC_MASK_82574 0x01F00000
1757 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1758 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1759 ew32(CTRL_EXT, ctrl_ext);
1760 e1e_flush();
1761}
1762
1763void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1764{
1765 if (adapter->msix_entries) {
1766 pci_disable_msix(adapter->pdev);
1767 kfree(adapter->msix_entries);
1768 adapter->msix_entries = NULL;
1769 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1770 pci_disable_msi(adapter->pdev);
1771 adapter->flags &= ~FLAG_MSI_ENABLED;
1772 }
4662e82b
BA		 1773}
1774
1775/**
1776 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1777 *
1778 * Attempt to configure interrupts using the best available
1779 * capabilities of the hardware and kernel.
1780 **/
1781void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1782{
1783 int err;
1784 int numvecs, i;
1785
1786
1787 switch (adapter->int_mode) {
1788 case E1000E_INT_MODE_MSIX:
1789 if (adapter->flags & FLAG_HAS_MSIX) {
1790 numvecs = 3; /* RxQ0, TxQ0 and other */
1791 adapter->msix_entries = kcalloc(numvecs,
1792 sizeof(struct msix_entry),
1793 GFP_KERNEL);
1794 if (adapter->msix_entries) {
1795 for (i = 0; i < numvecs; i++)
1796 adapter->msix_entries[i].entry = i;
1797
1798 err = pci_enable_msix(adapter->pdev,
1799 adapter->msix_entries,
1800 numvecs);
1801 if (err == 0)
1802 return;
1803 }
1804 /* MSI-X failed, so fall through and try MSI */
1805 e_err("Failed to initialize MSI-X interrupts. "
1806 "Falling back to MSI interrupts.\n");
1807 e1000e_reset_interrupt_capability(adapter);
1808 }
1809 adapter->int_mode = E1000E_INT_MODE_MSI;
1810 /* Fall through */
1811 case E1000E_INT_MODE_MSI:
1812 if (!pci_enable_msi(adapter->pdev)) {
1813 adapter->flags |= FLAG_MSI_ENABLED;
1814 } else {
1815 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1816 e_err("Failed to initialize MSI interrupts. Falling "
1817 "back to legacy interrupts.\n");
1818 }
1819 /* Fall through */
1820 case E1000E_INT_MODE_LEGACY:
1821 /* Don't do anything; this is the system default */
1822 break;
1823 }
4662e82b
BA		 1824}
1825
1826/**
1827 * e1000_request_msix - Initialize MSI-X interrupts
1828 *
1829 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1830 * kernel.
1831 **/
1832static int e1000_request_msix(struct e1000_adapter *adapter)
1833{
1834 struct net_device *netdev = adapter->netdev;
1835 int err = 0, vector = 0;
1836
1837 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1838 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1839 else
1840 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1841 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1842 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1843 netdev);
1844 if (err)
1845 goto out;
1846 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1847 adapter->rx_ring->itr_val = adapter->itr;
1848 vector++;
1849
1850 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1851 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1852 else
1853 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1854 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1855 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1856 netdev);
1857 if (err)
1858 goto out;
1859 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1860 adapter->tx_ring->itr_val = adapter->itr;
1861 vector++;
1862
1863 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1864 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1865 if (err)
1866 goto out;
1867
1868 e1000_configure_msix(adapter);
1869 return 0;
1870out:
1871 return err;
1872}
1873
f8d59f78
BA		 1874/**
1875 * e1000_request_irq - initialize interrupts
1876 *
1877 * Attempts to configure interrupts using the best available
1878 * capabilities of the hardware and kernel.
1879 **/
bc7f75fa
AK		 1880static int e1000_request_irq(struct e1000_adapter *adapter)
1881{
1882 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1883 int err;
1884
4662e82b
BA		 1885 if (adapter->msix_entries) {
1886 err = e1000_request_msix(adapter);
1887 if (!err)
1888 return err;
1889 /* fall back to MSI */
1890 e1000e_reset_interrupt_capability(adapter);
1891 adapter->int_mode = E1000E_INT_MODE_MSI;
1892 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1893 }
4662e82b 1894 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1895 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1896 netdev->name, netdev);
1897 if (!err)
1898 return err;
bc7f75fa 1899
4662e82b
BA		 1900 /* fall back to legacy interrupt */
1901 e1000e_reset_interrupt_capability(adapter);
1902 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1903 }
1904
a0607fd3 1905 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1906 netdev->name, netdev);
1907 if (err)
1908 e_err("Unable to allocate interrupt, Error: %d\n", err);
1909
bc7f75fa
AK		 1910 return err;
1911}
1912
1913static void e1000_free_irq(struct e1000_adapter *adapter)
1914{
1915 struct net_device *netdev = adapter->netdev;
1916
4662e82b
BA		 1917 if (adapter->msix_entries) {
1918 int vector = 0;
1919
1920 free_irq(adapter->msix_entries[vector].vector, netdev);
1921 vector++;
1922
1923 free_irq(adapter->msix_entries[vector].vector, netdev);
1924 vector++;
1925
1926 /* Other Causes interrupt vector */
1927 free_irq(adapter->msix_entries[vector].vector, netdev);
1928 return;
bc7f75fa 1929 }
4662e82b
BA		 1930
1931 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1932}
1933
1934/**
1935 * e1000_irq_disable - Mask off interrupt generation on the NIC
1936 **/
1937static void e1000_irq_disable(struct e1000_adapter *adapter)
1938{
1939 struct e1000_hw *hw = &adapter->hw;
1940
bc7f75fa 1941 ew32(IMC, ~0);
4662e82b
BA		 1942 if (adapter->msix_entries)
1943 ew32(EIAC_82574, 0);
bc7f75fa
AK		 1944 e1e_flush();
1945 synchronize_irq(adapter->pdev->irq);
1946}
1947
1948/**
1949 * e1000_irq_enable - Enable default interrupt generation settings
1950 **/
1951static void e1000_irq_enable(struct e1000_adapter *adapter)
1952{
1953 struct e1000_hw *hw = &adapter->hw;
1954
4662e82b
BA		 1955 if (adapter->msix_entries) {
1956 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1957 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1958 } else {
1959 ew32(IMS, IMS_ENABLE_MASK);
1960 }
74ef9c39 1961 e1e_flush();
bc7f75fa
AK		 1962}
1963
1964/**
1965 * e1000_get_hw_control - get control of the h/w from f/w
1966 * @adapter: address of board private structure
1967 *
489815ce 1968 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1969 * For ASF and Pass Through versions of f/w this means that
1970 * the driver is loaded. For AMT version (only with 82573)
1971 * of the f/w this means that the network i/f is open.
1972 **/
1973static void e1000_get_hw_control(struct e1000_adapter *adapter)
1974{
1975 struct e1000_hw *hw = &adapter->hw;
1976 u32 ctrl_ext;
1977 u32 swsm;
1978
1979 /* Let firmware know the driver has taken over */
1980 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1981 swsm = er32(SWSM);
1982 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1983 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1984 ctrl_ext = er32(CTRL_EXT);
ad68076e 1985 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1986 }
1987}
1988
1989/**
1990 * e1000_release_hw_control - release control of the h/w to f/w
1991 * @adapter: address of board private structure
1992 *
489815ce 1993 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1994 * For ASF and Pass Through versions of f/w this means that the
1995 * driver is no longer loaded. For AMT version (only with 82573) i
1996 * of the f/w this means that the network i/f is closed.
1997 *
1998 **/
1999static void e1000_release_hw_control(struct e1000_adapter *adapter)
2000{
2001 struct e1000_hw *hw = &adapter->hw;
2002 u32 ctrl_ext;
2003 u32 swsm;
2004
2005 /* Let firmware taken over control of h/w */
2006 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2007 swsm = er32(SWSM);
2008 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2009 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2010 ctrl_ext = er32(CTRL_EXT);
ad68076e 2011 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2012 }
2013}
2014
bc7f75fa
AK		 2015/**
2016 * @e1000_alloc_ring - allocate memory for a ring structure
2017 **/
2018static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2019 struct e1000_ring *ring)
2020{
2021 struct pci_dev *pdev = adapter->pdev;
2022
2023 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2024 GFP_KERNEL);
2025 if (!ring->desc)
2026 return -ENOMEM;
2027
2028 return 0;
2029}
2030
2031/**
2032 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2033 * @adapter: board private structure
2034 *
2035 * Return 0 on success, negative on failure
2036 **/
2037int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2038{
2039 struct e1000_ring *tx_ring = adapter->tx_ring;
2040 int err = -ENOMEM, size;
2041
2042 size = sizeof(struct e1000_buffer) * tx_ring->count;
2043 tx_ring->buffer_info = vmalloc(size);
2044 if (!tx_ring->buffer_info)
2045 goto err;
2046 memset(tx_ring->buffer_info, 0, size);
2047
2048 /* round up to nearest 4K */
2049 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2050 tx_ring->size = ALIGN(tx_ring->size, 4096);
2051
2052 err = e1000_alloc_ring_dma(adapter, tx_ring);
2053 if (err)
2054 goto err;
2055
2056 tx_ring->next_to_use = 0;
2057 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2058
2059 return 0;
2060err:
2061 vfree(tx_ring->buffer_info);
44defeb3 2062 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2063 return err;
2064}
2065
2066/**
2067 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2068 * @adapter: board private structure
2069 *
2070 * Returns 0 on success, negative on failure
2071 **/
2072int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2073{
2074 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 2075 struct e1000_buffer *buffer_info;
2076 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2077
2078 size = sizeof(struct e1000_buffer) * rx_ring->count;
2079 rx_ring->buffer_info = vmalloc(size);
2080 if (!rx_ring->buffer_info)
2081 goto err;
2082 memset(rx_ring->buffer_info, 0, size);
2083
47f44e40
AK		 2084 for (i = 0; i < rx_ring->count; i++) {
2085 buffer_info = &rx_ring->buffer_info[i];
2086 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2087 sizeof(struct e1000_ps_page),
2088 GFP_KERNEL);
2089 if (!buffer_info->ps_pages)
2090 goto err_pages;
2091 }
bc7f75fa
AK		 2092
2093 desc_len = sizeof(union e1000_rx_desc_packet_split);
2094
2095 /* Round up to nearest 4K */
2096 rx_ring->size = rx_ring->count * desc_len;
2097 rx_ring->size = ALIGN(rx_ring->size, 4096);
2098
2099 err = e1000_alloc_ring_dma(adapter, rx_ring);
2100 if (err)
47f44e40 2101 goto err_pages;
bc7f75fa
AK		 2102
2103 rx_ring->next_to_clean = 0;
2104 rx_ring->next_to_use = 0;
2105 rx_ring->rx_skb_top = NULL;
2106
2107 return 0;
47f44e40
AK		 2108
2109err_pages:
2110 for (i = 0; i < rx_ring->count; i++) {
2111 buffer_info = &rx_ring->buffer_info[i];
2112 kfree(buffer_info->ps_pages);
2113 }
bc7f75fa
AK		 2114err:
2115 vfree(rx_ring->buffer_info);
44defeb3 2116 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2117 return err;
2118}
2119
2120/**
2121 * e1000_clean_tx_ring - Free Tx Buffers
2122 * @adapter: board private structure
2123 **/
2124static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2125{
2126 struct e1000_ring *tx_ring = adapter->tx_ring;
2127 struct e1000_buffer *buffer_info;
2128 unsigned long size;
2129 unsigned int i;
2130
2131 for (i = 0; i < tx_ring->count; i++) {
2132 buffer_info = &tx_ring->buffer_info[i];
2133 e1000_put_txbuf(adapter, buffer_info);
2134 }
2135
2136 size = sizeof(struct e1000_buffer) * tx_ring->count;
2137 memset(tx_ring->buffer_info, 0, size);
2138
2139 memset(tx_ring->desc, 0, tx_ring->size);
2140
2141 tx_ring->next_to_use = 0;
2142 tx_ring->next_to_clean = 0;
2143
2144 writel(0, adapter->hw.hw_addr + tx_ring->head);
2145 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2146}
2147
2148/**
2149 * e1000e_free_tx_resources - Free Tx Resources per Queue
2150 * @adapter: board private structure
2151 *
2152 * Free all transmit software resources
2153 **/
2154void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2155{
2156 struct pci_dev *pdev = adapter->pdev;
2157 struct e1000_ring *tx_ring = adapter->tx_ring;
2158
2159 e1000_clean_tx_ring(adapter);
2160
2161 vfree(tx_ring->buffer_info);
2162 tx_ring->buffer_info = NULL;
2163
2164 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2165 tx_ring->dma);
2166 tx_ring->desc = NULL;
2167}
2168
2169/**
2170 * e1000e_free_rx_resources - Free Rx Resources
2171 * @adapter: board private structure
2172 *
2173 * Free all receive software resources
2174 **/
2175
2176void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2177{
2178 struct pci_dev *pdev = adapter->pdev;
2179 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2180 int i;
bc7f75fa
AK		 2181
2182 e1000_clean_rx_ring(adapter);
2183
47f44e40
AK		 2184 for (i = 0; i < rx_ring->count; i++) {
2185 kfree(rx_ring->buffer_info[i].ps_pages);
2186 }
2187
bc7f75fa
AK		 2188 vfree(rx_ring->buffer_info);
2189 rx_ring->buffer_info = NULL;
2190
bc7f75fa
AK		 2191 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2192 rx_ring->dma);
2193 rx_ring->desc = NULL;
2194}
2195
2196/**
2197 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2198 * @adapter: pointer to adapter
2199 * @itr_setting: current adapter->itr
2200 * @packets: the number of packets during this measurement interval
2201 * @bytes: the number of bytes during this measurement interval
2202 *
bc7f75fa
AK		 2203 * Stores a new ITR value based on packets and byte
2204 * counts during the last interrupt. The advantage of per interrupt
2205 * computation is faster updates and more accurate ITR for the current
2206 * traffic pattern. Constants in this function were computed
2207 * based on theoretical maximum wire speed and thresholds were set based
2208 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2209 * while increasing bulk throughput. This functionality is controlled
2210 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2211 **/
2212static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2213 u16 itr_setting, int packets,
2214 int bytes)
2215{
2216 unsigned int retval = itr_setting;
2217
2218 if (packets == 0)
2219 goto update_itr_done;
2220
2221 switch (itr_setting) {
2222 case lowest_latency:
2223 /* handle TSO and jumbo frames */
2224 if (bytes/packets > 8000)
2225 retval = bulk_latency;
2226 else if ((packets < 5) && (bytes > 512)) {
2227 retval = low_latency;
2228 }
2229 break;
2230 case low_latency: /* 50 usec aka 20000 ints/s */
2231 if (bytes > 10000) {
2232 /* this if handles the TSO accounting */
2233 if (bytes/packets > 8000) {
2234 retval = bulk_latency;
2235 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2236 retval = bulk_latency;
2237 } else if ((packets > 35)) {
2238 retval = lowest_latency;
2239 }
2240 } else if (bytes/packets > 2000) {
2241 retval = bulk_latency;
2242 } else if (packets <= 2 && bytes < 512) {
2243 retval = lowest_latency;
2244 }
2245 break;
2246 case bulk_latency: /* 250 usec aka 4000 ints/s */
2247 if (bytes > 25000) {
2248 if (packets > 35) {
2249 retval = low_latency;
2250 }
2251 } else if (bytes < 6000) {
2252 retval = low_latency;
2253 }
2254 break;
2255 }
2256
2257update_itr_done:
2258 return retval;
2259}
2260
2261static void e1000_set_itr(struct e1000_adapter *adapter)
2262{
2263 struct e1000_hw *hw = &adapter->hw;
2264 u16 current_itr;
2265 u32 new_itr = adapter->itr;
2266
2267 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2268 if (adapter->link_speed != SPEED_1000) {
2269 current_itr = 0;
2270 new_itr = 4000;
2271 goto set_itr_now;
2272 }
2273
2274 adapter->tx_itr = e1000_update_itr(adapter,
2275 adapter->tx_itr,
2276 adapter->total_tx_packets,
2277 adapter->total_tx_bytes);
2278 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2279 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2280 adapter->tx_itr = low_latency;
2281
2282 adapter->rx_itr = e1000_update_itr(adapter,
2283 adapter->rx_itr,
2284 adapter->total_rx_packets,
2285 adapter->total_rx_bytes);
2286 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2287 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2288 adapter->rx_itr = low_latency;
2289
2290 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2291
2292 switch (current_itr) {
2293 /* counts and packets in update_itr are dependent on these numbers */
2294 case lowest_latency:
2295 new_itr = 70000;
2296 break;
2297 case low_latency:
2298 new_itr = 20000; /* aka hwitr = ~200 */
2299 break;
2300 case bulk_latency:
2301 new_itr = 4000;
2302 break;
2303 default:
2304 break;
2305 }
2306
2307set_itr_now:
2308 if (new_itr != adapter->itr) {
ad68076e
BA		 2309 /*
2310 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2311 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2312 * increasing
2313 */
bc7f75fa
AK		 2314 new_itr = new_itr > adapter->itr ?
2315 min(adapter->itr + (new_itr >> 2), new_itr) :
2316 new_itr;
2317 adapter->itr = new_itr;
4662e82b
BA		 2318 adapter->rx_ring->itr_val = new_itr;
2319 if (adapter->msix_entries)
2320 adapter->rx_ring->set_itr = 1;
2321 else
2322 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 2323 }
2324}
2325
4662e82b
BA		 2326/**
2327 * e1000_alloc_queues - Allocate memory for all rings
2328 * @adapter: board private structure to initialize
2329 **/
2330static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2331{
2332 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2333 if (!adapter->tx_ring)
2334 goto err;
2335
2336 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2337 if (!adapter->rx_ring)
2338 goto err;
2339
2340 return 0;
2341err:
2342 e_err("Unable to allocate memory for queues\n");
2343 kfree(adapter->rx_ring);
2344 kfree(adapter->tx_ring);
2345 return -ENOMEM;
2346}
2347
bc7f75fa
AK		 2348/**
2349 * e1000_clean - NAPI Rx polling callback
ad68076e 2350 * @napi: struct associated with this polling callback
489815ce 2351 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2352 **/
2353static int e1000_clean(struct napi_struct *napi, int budget)
2354{
2355 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2356 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2357 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2358 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2359
4cf1653a 2360 adapter = netdev_priv(poll_dev);
bc7f75fa 2361
4662e82b
BA		 2362 if (adapter->msix_entries &&
2363 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2364 goto clean_rx;
2365
92af3e95 2366 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2367
4662e82b 2368clean_rx:
bc7f75fa 2369 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2370
12d04a3c 2371 if (!tx_cleaned)
d2c7ddd6 2372 work_done = budget;
bc7f75fa 2373
53e52c72
DM		 2374 /* If budget not fully consumed, exit the polling mode */
2375 if (work_done < budget) {
bc7f75fa
AK		 2376 if (adapter->itr_setting & 3)
2377 e1000_set_itr(adapter);
288379f0 2378 napi_complete(napi);
a3c69fef
JB		 2379 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2380 if (adapter->msix_entries)
2381 ew32(IMS, adapter->rx_ring->ims_val);
2382 else
2383 e1000_irq_enable(adapter);
2384 }
bc7f75fa
AK		 2385 }
2386
2387 return work_done;
2388}
2389
2390static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2391{
2392 struct e1000_adapter *adapter = netdev_priv(netdev);
2393 struct e1000_hw *hw = &adapter->hw;
2394 u32 vfta, index;
2395
2396 /* don't update vlan cookie if already programmed */
2397 if ((adapter->hw.mng_cookie.status &
2398 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2399 (vid == adapter->mng_vlan_id))
2400 return;
caaddaf8 2401
bc7f75fa 2402 /* add VID to filter table */
caaddaf8
BA		 2403 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2404 index = (vid >> 5) & 0x7F;
2405 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2406 vfta |= (1 << (vid & 0x1F));
2407 hw->mac.ops.write_vfta(hw, index, vfta);
2408 }
bc7f75fa
AK		 2409}
2410
2411static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2412{
2413 struct e1000_adapter *adapter = netdev_priv(netdev);
2414 struct e1000_hw *hw = &adapter->hw;
2415 u32 vfta, index;
2416
74ef9c39
JB		 2417 if (!test_bit(__E1000_DOWN, &adapter->state))
2418 e1000_irq_disable(adapter);
bc7f75fa 2419 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2420
2421 if (!test_bit(__E1000_DOWN, &adapter->state))
2422 e1000_irq_enable(adapter);
bc7f75fa
AK		 2423
2424 if ((adapter->hw.mng_cookie.status &
2425 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2426 (vid == adapter->mng_vlan_id)) {
2427 /* release control to f/w */
2428 e1000_release_hw_control(adapter);
2429 return;
2430 }
2431
2432 /* remove VID from filter table */
caaddaf8
BA		 2433 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2434 index = (vid >> 5) & 0x7F;
2435 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2436 vfta &= ~(1 << (vid & 0x1F));
2437 hw->mac.ops.write_vfta(hw, index, vfta);
2438 }
bc7f75fa
AK		 2439}
2440
2441static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2442{
2443 struct net_device *netdev = adapter->netdev;
2444 u16 vid = adapter->hw.mng_cookie.vlan_id;
2445 u16 old_vid = adapter->mng_vlan_id;
2446
2447 if (!adapter->vlgrp)
2448 return;
2449
2450 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2451 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2452 if (adapter->hw.mng_cookie.status &
2453 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2454 e1000_vlan_rx_add_vid(netdev, vid);
2455 adapter->mng_vlan_id = vid;
2456 }
2457
2458 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2459 (vid != old_vid) &&
2460 !vlan_group_get_device(adapter->vlgrp, old_vid))
2461 e1000_vlan_rx_kill_vid(netdev, old_vid);
2462 } else {
2463 adapter->mng_vlan_id = vid;
2464 }
2465}
2466
2467
2468static void e1000_vlan_rx_register(struct net_device *netdev,
2469 struct vlan_group *grp)
2470{
2471 struct e1000_adapter *adapter = netdev_priv(netdev);
2472 struct e1000_hw *hw = &adapter->hw;
2473 u32 ctrl, rctl;
2474
74ef9c39
JB		 2475 if (!test_bit(__E1000_DOWN, &adapter->state))
2476 e1000_irq_disable(adapter);
bc7f75fa
AK		 2477 adapter->vlgrp = grp;
2478
2479 if (grp) {
2480 /* enable VLAN tag insert/strip */
2481 ctrl = er32(CTRL);
2482 ctrl |= E1000_CTRL_VME;
2483 ew32(CTRL, ctrl);
2484
2485 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2486 /* enable VLAN receive filtering */
2487 rctl = er32(RCTL);
bc7f75fa
AK		 2488 rctl &= ~E1000_RCTL_CFIEN;
2489 ew32(RCTL, rctl);
2490 e1000_update_mng_vlan(adapter);
2491 }
2492 } else {
2493 /* disable VLAN tag insert/strip */
2494 ctrl = er32(CTRL);
2495 ctrl &= ~E1000_CTRL_VME;
2496 ew32(CTRL, ctrl);
2497
2498 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2499 if (adapter->mng_vlan_id !=
2500 (u16)E1000_MNG_VLAN_NONE) {
2501 e1000_vlan_rx_kill_vid(netdev,
2502 adapter->mng_vlan_id);
2503 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2504 }
2505 }
2506 }
2507
74ef9c39
JB		 2508 if (!test_bit(__E1000_DOWN, &adapter->state))
2509 e1000_irq_enable(adapter);
bc7f75fa
AK		 2510}
2511
2512static void e1000_restore_vlan(struct e1000_adapter *adapter)
2513{
2514 u16 vid;
2515
2516 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2517
2518 if (!adapter->vlgrp)
2519 return;
2520
2521 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2522 if (!vlan_group_get_device(adapter->vlgrp, vid))
2523 continue;
2524 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2525 }
2526}
2527
cd791618 2528static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK		 2529{
2530 struct e1000_hw *hw = &adapter->hw;
cd791618 2531 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK		 2532
2533 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2534 return;
2535
2536 manc = er32(MANC);
2537
ad68076e
BA		 2538 /*
2539 * enable receiving management packets to the host. this will probably
bc7f75fa 2540 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2541 * the packets will be handled on SMBUS
2542 */
bc7f75fa
AK		 2543 manc |= E1000_MANC_EN_MNG2HOST;
2544 manc2h = er32(MANC2H);
cd791618
BA		 2545
2546 switch (hw->mac.type) {
2547 default:
2548 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2549 break;
2550 case e1000_82574:
2551 case e1000_82583:
2552 /*
2553 * Check if IPMI pass-through decision filter already exists;
2554 * if so, enable it.
2555 */
2556 for (i = 0, j = 0; i < 8; i++) {
2557 mdef = er32(MDEF(i));
2558
2559 /* Ignore filters with anything other than IPMI ports */
3b21b508 2560 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
cd791618
BA		 2561 continue;
2562
2563 /* Enable this decision filter in MANC2H */
2564 if (mdef)
2565 manc2h |= (1 << i);
2566
2567 j |= mdef;
2568 }
2569
2570 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2571 break;
2572
2573 /* Create new decision filter in an empty filter */
2574 for (i = 0, j = 0; i < 8; i++)
2575 if (er32(MDEF(i)) == 0) {
2576 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2577 E1000_MDEF_PORT_664));
2578 manc2h |= (1 << 1);
2579 j++;
2580 break;
2581 }
2582
2583 if (!j)
2584 e_warn("Unable to create IPMI pass-through filter\n");
2585 break;
2586 }
2587
bc7f75fa
AK		 2588 ew32(MANC2H, manc2h);
2589 ew32(MANC, manc);
2590}
2591
2592/**
2593 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2594 * @adapter: board private structure
2595 *
2596 * Configure the Tx unit of the MAC after a reset.
2597 **/
2598static void e1000_configure_tx(struct e1000_adapter *adapter)
2599{
2600 struct e1000_hw *hw = &adapter->hw;
2601 struct e1000_ring *tx_ring = adapter->tx_ring;
2602 u64 tdba;
2603 u32 tdlen, tctl, tipg, tarc;
2604 u32 ipgr1, ipgr2;
2605
2606 /* Setup the HW Tx Head and Tail descriptor pointers */
2607 tdba = tx_ring->dma;
2608 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2609 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2610 ew32(TDBAH, (tdba >> 32));
2611 ew32(TDLEN, tdlen);
2612 ew32(TDH, 0);
2613 ew32(TDT, 0);
2614 tx_ring->head = E1000_TDH;
2615 tx_ring->tail = E1000_TDT;
2616
2617 /* Set the default values for the Tx Inter Packet Gap timer */
2618 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2619 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2620 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2621
2622 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2623 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2624
2625 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2626 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2627 ew32(TIPG, tipg);
2628
2629 /* Set the Tx Interrupt Delay register */
2630 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2631 /* Tx irq moderation */
bc7f75fa
AK		 2632 ew32(TADV, adapter->tx_abs_int_delay);
2633
2634 /* Program the Transmit Control Register */
2635 tctl = er32(TCTL);
2636 tctl &= ~E1000_TCTL_CT;
2637 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2638 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2639
2640 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2641 tarc = er32(TARC(0));
ad68076e
BA		 2642 /*
2643 * set the speed mode bit, we'll clear it if we're not at
2644 * gigabit link later
2645 */
bc7f75fa
AK		 2646#define SPEED_MODE_BIT (1 << 21)
2647 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2648 ew32(TARC(0), tarc);
bc7f75fa
AK		 2649 }
2650
2651 /* errata: program both queues to unweighted RR */
2652 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2653 tarc = er32(TARC(0));
bc7f75fa 2654 tarc |= 1;
e9ec2c0f
JK		 2655 ew32(TARC(0), tarc);
2656 tarc = er32(TARC(1));
bc7f75fa 2657 tarc |= 1;
e9ec2c0f 2658 ew32(TARC(1), tarc);
bc7f75fa
AK		 2659 }
2660
bc7f75fa
AK		 2661 /* Setup Transmit Descriptor Settings for eop descriptor */
2662 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2663
2664 /* only set IDE if we are delaying interrupts using the timers */
2665 if (adapter->tx_int_delay)
2666 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2667
2668 /* enable Report Status bit */
2669 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2670
2671 ew32(TCTL, tctl);
2672
edfea6e6 2673 e1000e_config_collision_dist(hw);
bc7f75fa
AK		 2674}
2675
2676/**
2677 * e1000_setup_rctl - configure the receive control registers
2678 * @adapter: Board private structure
2679 **/
2680#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2681 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2682static void e1000_setup_rctl(struct e1000_adapter *adapter)
2683{
2684 struct e1000_hw *hw = &adapter->hw;
2685 u32 rctl, rfctl;
2686 u32 psrctl = 0;
2687 u32 pages = 0;
2688
2689 /* Program MC offset vector base */
2690 rctl = er32(RCTL);
2691 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2692 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2693 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2694 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2695
2696 /* Do not Store bad packets */
2697 rctl &= ~E1000_RCTL_SBP;
2698
2699 /* Enable Long Packet receive */
2700 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2701 rctl &= ~E1000_RCTL_LPE;
2702 else
2703 rctl |= E1000_RCTL_LPE;
2704
eb7c3adb
JK		 2705 /* Some systems expect that the CRC is included in SMBUS traffic. The
2706 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2707 * host memory when this is enabled
2708 */
2709 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2710 rctl |= E1000_RCTL_SECRC;
5918bd88 2711
a4f58f54
BA		 2712 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2713 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2714 u16 phy_data;
2715
2716 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2717 phy_data &= 0xfff8;
2718 phy_data |= (1 << 2);
2719 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2720
2721 e1e_rphy(hw, 22, &phy_data);
2722 phy_data &= 0x0fff;
2723 phy_data |= (1 << 14);
2724 e1e_wphy(hw, 0x10, 0x2823);
2725 e1e_wphy(hw, 0x11, 0x0003);
2726 e1e_wphy(hw, 22, phy_data);
2727 }
2728
d3738bb8
BA		 2729 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2730 if (hw->mac.type == e1000_pch2lan) {
2731 s32 ret_val;
2732
2733 if (rctl & E1000_RCTL_LPE)
2734 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2735 else
2736 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
2737 }
2738
bc7f75fa
AK		 2739 /* Setup buffer sizes */
2740 rctl &= ~E1000_RCTL_SZ_4096;
2741 rctl |= E1000_RCTL_BSEX;
2742 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2743 case 2048:
2744 default:
2745 rctl |= E1000_RCTL_SZ_2048;
2746 rctl &= ~E1000_RCTL_BSEX;
2747 break;
2748 case 4096:
2749 rctl |= E1000_RCTL_SZ_4096;
2750 break;
2751 case 8192:
2752 rctl |= E1000_RCTL_SZ_8192;
2753 break;
2754 case 16384:
2755 rctl |= E1000_RCTL_SZ_16384;
2756 break;
2757 }
2758
2759 /*
2760 * 82571 and greater support packet-split where the protocol
2761 * header is placed in skb->data and the packet data is
2762 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2763 * In the case of a non-split, skb->data is linearly filled,
2764 * followed by the page buffers. Therefore, skb->data is
2765 * sized to hold the largest protocol header.
2766 *
2767 * allocations using alloc_page take too long for regular MTU
2768 * so only enable packet split for jumbo frames
2769 *
2770 * Using pages when the page size is greater than 16k wastes
2771 * a lot of memory, since we allocate 3 pages at all times
2772 * per packet.
2773 */
bc7f75fa 2774 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
dbcb9fec 2775 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
97ac8cae 2776 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2777 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2778 else
2779 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2780
2781 if (adapter->rx_ps_pages) {
2782 /* Configure extra packet-split registers */
2783 rfctl = er32(RFCTL);
2784 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2785 /*
2786 * disable packet split support for IPv6 extension headers,
2787 * because some malformed IPv6 headers can hang the Rx
2788 */
bc7f75fa
AK		 2789 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2790 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2791
2792 ew32(RFCTL, rfctl);
2793
140a7480
AK		 2794 /* Enable Packet split descriptors */
2795 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2796
2797 psrctl |= adapter->rx_ps_bsize0 >>
2798 E1000_PSRCTL_BSIZE0_SHIFT;
2799
2800 switch (adapter->rx_ps_pages) {
2801 case 3:
2802 psrctl |= PAGE_SIZE <<
2803 E1000_PSRCTL_BSIZE3_SHIFT;
2804 case 2:
2805 psrctl |= PAGE_SIZE <<
2806 E1000_PSRCTL_BSIZE2_SHIFT;
2807 case 1:
2808 psrctl |= PAGE_SIZE >>
2809 E1000_PSRCTL_BSIZE1_SHIFT;
2810 break;
2811 }
2812
2813 ew32(PSRCTL, psrctl);
2814 }
2815
2816 ew32(RCTL, rctl);
318a94d6
JK		 2817 /* just started the receive unit, no need to restart */
2818 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2819}
2820
2821/**
2822 * e1000_configure_rx - Configure Receive Unit after Reset
2823 * @adapter: board private structure
2824 *
2825 * Configure the Rx unit of the MAC after a reset.
2826 **/
2827static void e1000_configure_rx(struct e1000_adapter *adapter)
2828{
2829 struct e1000_hw *hw = &adapter->hw;
2830 struct e1000_ring *rx_ring = adapter->rx_ring;
2831 u64 rdba;
2832 u32 rdlen, rctl, rxcsum, ctrl_ext;
2833
2834 if (adapter->rx_ps_pages) {
2835 /* this is a 32 byte descriptor */
2836 rdlen = rx_ring->count *
2837 sizeof(union e1000_rx_desc_packet_split);
2838 adapter->clean_rx = e1000_clean_rx_irq_ps;
2839 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2840 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2841 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2842 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2843 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2844 } else {
97ac8cae 2845 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2846 adapter->clean_rx = e1000_clean_rx_irq;
2847 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2848 }
2849
2850 /* disable receives while setting up the descriptors */
2851 rctl = er32(RCTL);
2852 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2853 e1e_flush();
2854 msleep(10);
2855
2856 /* set the Receive Delay Timer Register */
2857 ew32(RDTR, adapter->rx_int_delay);
2858
2859 /* irq moderation */
2860 ew32(RADV, adapter->rx_abs_int_delay);
2861 if (adapter->itr_setting != 0)
ad68076e 2862 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2863
2864 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2865 /* Auto-Mask interrupts upon ICR access */
2866 ctrl_ext |= E1000_CTRL_EXT_IAME;
2867 ew32(IAM, 0xffffffff);
2868 ew32(CTRL_EXT, ctrl_ext);
2869 e1e_flush();
2870
ad68076e
BA		 2871 /*
2872 * Setup the HW Rx Head and Tail Descriptor Pointers and
2873 * the Base and Length of the Rx Descriptor Ring
2874 */
bc7f75fa 2875 rdba = rx_ring->dma;
284901a9 2876 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2877 ew32(RDBAH, (rdba >> 32));
2878 ew32(RDLEN, rdlen);
2879 ew32(RDH, 0);
2880 ew32(RDT, 0);
2881 rx_ring->head = E1000_RDH;
2882 rx_ring->tail = E1000_RDT;
2883
2884 /* Enable Receive Checksum Offload for TCP and UDP */
2885 rxcsum = er32(RXCSUM);
2886 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2887 rxcsum |= E1000_RXCSUM_TUOFL;
2888
ad68076e
BA		 2889 /*
2890 * IPv4 payload checksum for UDP fragments must be
2891 * used in conjunction with packet-split.
2892 */
bc7f75fa
AK		 2893 if (adapter->rx_ps_pages)
2894 rxcsum |= E1000_RXCSUM_IPPCSE;
2895 } else {
2896 rxcsum &= ~E1000_RXCSUM_TUOFL;
2897 /* no need to clear IPPCSE as it defaults to 0 */
2898 }
2899 ew32(RXCSUM, rxcsum);
2900
ad68076e
BA		 2901 /*
2902 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2903 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2904 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2905 */
53ec5498
BA		 2906 if (adapter->flags & FLAG_HAS_ERT) {
2907 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2908 u32 rxdctl = er32(RXDCTL(0));
2909 ew32(RXDCTL(0), rxdctl | 0x3);
2910 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2911 /*
2912 * With jumbo frames and early-receive enabled,
2913 * excessive C-state transition latencies result in
2914 * dropped transactions.
2915 */
ed77134b
MG		 2916 pm_qos_update_request(
2917 adapter->netdev->pm_qos_req, 55);
53ec5498 2918 } else {
ed77134b
MG		 2919 pm_qos_update_request(
2920 adapter->netdev->pm_qos_req,
2921 PM_QOS_DEFAULT_VALUE);
53ec5498 2922 }
97ac8cae 2923 }
bc7f75fa
AK		 2924
2925 /* Enable Receives */
2926 ew32(RCTL, rctl);
2927}
2928
2929/**
e2de3eb6 2930 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2931 * @hw: pointer to the HW structure
2932 * @mc_addr_list: array of multicast addresses to program
2933 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2934 *
ab8932f3 2935 * Updates the Multicast Table Array.
bc7f75fa 2936 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 2937 **/
e2de3eb6 2938static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 2939 u32 mc_addr_count)
bc7f75fa 2940{
ab8932f3 2941 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 2942}
2943
2944/**
2945 * e1000_set_multi - Multicast and Promiscuous mode set
2946 * @netdev: network interface device structure
2947 *
2948 * The set_multi entry point is called whenever the multicast address
2949 * list or the network interface flags are updated. This routine is
2950 * responsible for configuring the hardware for proper multicast,
2951 * promiscuous mode, and all-multi behavior.
2952 **/
2953static void e1000_set_multi(struct net_device *netdev)
2954{
2955 struct e1000_adapter *adapter = netdev_priv(netdev);
2956 struct e1000_hw *hw = &adapter->hw;
22bedad3 2957 struct netdev_hw_addr *ha;
bc7f75fa
AK		 2958 u8 *mta_list;
2959 u32 rctl;
2960 int i;
2961
2962 /* Check for Promiscuous and All Multicast modes */
2963
2964 rctl = er32(RCTL);
2965
2966 if (netdev->flags & IFF_PROMISC) {
2967 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2968 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2969 } else {
746b9f02
PM		 2970 if (netdev->flags & IFF_ALLMULTI) {
2971 rctl |= E1000_RCTL_MPE;
2972 rctl &= ~E1000_RCTL_UPE;
2973 } else {
2974 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2975 }
78ed11a5 2976 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2977 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2978 }
2979
2980 ew32(RCTL, rctl);
2981
7aeef972
JP		 2982 if (!netdev_mc_empty(netdev)) {
2983 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 2984 if (!mta_list)
2985 return;
2986
2987 /* prepare a packed array of only addresses. */
7aeef972 2988 i = 0;
22bedad3
JP		 2989 netdev_for_each_mc_addr(ha, netdev)
2990 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 2991
ab8932f3 2992 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 2993 kfree(mta_list);
2994 } else {
2995 /*
2996 * if we're called from probe, we might not have
2997 * anything to do here, so clear out the list
2998 */
ab8932f3 2999 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 3000 }
3001}
3002
3003/**
ad68076e 3004 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 3005 * @adapter: private board structure
3006 **/
3007static void e1000_configure(struct e1000_adapter *adapter)
3008{
3009 e1000_set_multi(adapter->netdev);
3010
3011 e1000_restore_vlan(adapter);
cd791618 3012 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 3013
3014 e1000_configure_tx(adapter);
3015 e1000_setup_rctl(adapter);
3016 e1000_configure_rx(adapter);
ad68076e 3017 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 3018}
3019
3020/**
3021 * e1000e_power_up_phy - restore link in case the phy was powered down
3022 * @adapter: address of board private structure
3023 *
3024 * The phy may be powered down to save power and turn off link when the
3025 * driver is unloaded and wake on lan is not enabled (among others)
3026 * *** this routine MUST be followed by a call to e1000e_reset ***
3027 **/
3028void e1000e_power_up_phy(struct e1000_adapter *adapter)
3029{
17f208de
BA		 3030 if (adapter->hw.phy.ops.power_up)
3031 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 3032
3033 adapter->hw.mac.ops.setup_link(&adapter->hw);
3034}
3035
3036/**
3037 * e1000_power_down_phy - Power down the PHY
3038 *
17f208de
BA		 3039 * Power down the PHY so no link is implied when interface is down.
3040 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 3041 */
3042static void e1000_power_down_phy(struct e1000_adapter *adapter)
3043{
bc7f75fa 3044 /* WoL is enabled */
23b66e2b 3045 if (adapter->wol)
bc7f75fa
AK		 3046 return;
3047
17f208de
BA		 3048 if (adapter->hw.phy.ops.power_down)
3049 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3050}
3051
3052/**
3053 * e1000e_reset - bring the hardware into a known good state
3054 *
3055 * This function boots the hardware and enables some settings that
3056 * require a configuration cycle of the hardware - those cannot be
3057 * set/changed during runtime. After reset the device needs to be
ad68076e 3058 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3059 */
3060void e1000e_reset(struct e1000_adapter *adapter)
3061{
3062 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3063 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3064 struct e1000_hw *hw = &adapter->hw;
3065 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3066 u32 pba = adapter->pba;
bc7f75fa
AK		 3067 u16 hwm;
3068
ad68076e 3069 /* reset Packet Buffer Allocation to default */
318a94d6 3070 ew32(PBA, pba);
df762464 3071
318a94d6 3072 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3073 /*
3074 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3075 * large enough to accommodate two full transmit packets,
3076 * rounded up to the next 1KB and expressed in KB. Likewise,
3077 * the Rx FIFO should be large enough to accommodate at least
3078 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3079 * expressed in KB.
3080 */
df762464 3081 pba = er32(PBA);
bc7f75fa 3082 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3083 tx_space = pba >> 16;
bc7f75fa 3084 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3085 pba &= 0xffff;
ad68076e
BA		 3086 /*
3087 * the Tx fifo also stores 16 bytes of information about the tx
3088 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3089 */
3090 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3091 sizeof(struct e1000_tx_desc) -
3092 ETH_FCS_LEN) * 2;
3093 min_tx_space = ALIGN(min_tx_space, 1024);
3094 min_tx_space >>= 10;
3095 /* software strips receive CRC, so leave room for it */
318a94d6 3096 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3097 min_rx_space = ALIGN(min_rx_space, 1024);
3098 min_rx_space >>= 10;
3099
ad68076e
BA		 3100 /*
3101 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3102 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3103 * allocation, take space away from current Rx allocation
3104 */
df762464
AK		 3105 if ((tx_space < min_tx_space) &&
3106 ((min_tx_space - tx_space) < pba)) {
3107 pba -= min_tx_space - tx_space;
bc7f75fa 3108
ad68076e
BA		 3109 /*
3110 * if short on Rx space, Rx wins and must trump tx
3111 * adjustment or use Early Receive if available
3112 */
df762464 3113 if ((pba < min_rx_space) &&
bc7f75fa
AK		 3114 (!(adapter->flags & FLAG_HAS_ERT)))
3115 /* ERT enabled in e1000_configure_rx */
df762464 3116 pba = min_rx_space;
bc7f75fa 3117 }
df762464
AK		 3118
3119 ew32(PBA, pba);
bc7f75fa
AK		 3120 }
3121
bc7f75fa 3122
ad68076e
BA		 3123 /*
3124 * flow control settings
3125 *
38eb394e 3126 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3127 * (or the size used for early receive) above it in the Rx FIFO.
3128 * Set it to the lower of:
3129 * - 90% of the Rx FIFO size, and
3130 * - the full Rx FIFO size minus the early receive size (for parts
3131 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3132 * - the full Rx FIFO size minus one full frame
ad68076e 3133 */
d3738bb8
BA		 3134 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3135 fc->pause_time = 0xFFFF;
3136 else
3137 fc->pause_time = E1000_FC_PAUSE_TIME;
3138 fc->send_xon = 1;
3139 fc->current_mode = fc->requested_mode;
3140
3141 switch (hw->mac.type) {
3142 default:
3143 if ((adapter->flags & FLAG_HAS_ERT) &&
3144 (adapter->netdev->mtu > ETH_DATA_LEN))
3145 hwm = min(((pba << 10) * 9 / 10),
3146 ((pba << 10) - (E1000_ERT_2048 << 3)));
3147 else
3148 hwm = min(((pba << 10) * 9 / 10),
3149 ((pba << 10) - adapter->max_frame_size));
3150
3151 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3152 fc->low_water = fc->high_water - 8;
3153 break;
3154 case e1000_pchlan:
38eb394e
BA		 3155 /*
3156 * Workaround PCH LOM adapter hangs with certain network
3157 * loads. If hangs persist, try disabling Tx flow control.
3158 */
3159 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3160 fc->high_water = 0x3500;
3161 fc->low_water = 0x1500;
3162 } else {
3163 fc->high_water = 0x5000;
3164 fc->low_water = 0x3000;
3165 }
a305595b 3166 fc->refresh_time = 0x1000;
d3738bb8
BA		 3167 break;
3168 case e1000_pch2lan:
3169 fc->high_water = 0x05C20;
3170 fc->low_water = 0x05048;
3171 fc->pause_time = 0x0650;
3172 fc->refresh_time = 0x0400;
3173 break;
38eb394e 3174 }
bc7f75fa 3175
bc7f75fa
AK		 3176 /* Allow time for pending master requests to run */
3177 mac->ops.reset_hw(hw);
97ac8cae
BA		 3178
3179 /*
3180 * For parts with AMT enabled, let the firmware know
3181 * that the network interface is in control
3182 */
c43bc57e 3183 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 3184 e1000_get_hw_control(adapter);
3185
bc7f75fa
AK		 3186 ew32(WUC, 0);
3187
3188 if (mac->ops.init_hw(hw))
44defeb3 3189 e_err("Hardware Error\n");
bc7f75fa
AK		 3190
3191 e1000_update_mng_vlan(adapter);
3192
3193 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3194 ew32(VET, ETH_P_8021Q);
3195
3196 e1000e_reset_adaptive(hw);
3197 e1000_get_phy_info(hw);
3198
918d7197
BA		 3199 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3200 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3201 u16 phy_data = 0;
ad68076e
BA		 3202 /*
3203 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3204 * the return value of this function because there is nothing
ad68076e
BA		 3205 * different we would do if it failed
3206 */
bc7f75fa
AK		 3207 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3208 phy_data &= ~IGP02E1000_PM_SPD;
3209 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3210 }
bc7f75fa
AK		 3211}
3212
3213int e1000e_up(struct e1000_adapter *adapter)
3214{
3215 struct e1000_hw *hw = &adapter->hw;
3216
53ec5498
BA		 3217 /* DMA latency requirement to workaround early-receive/jumbo issue */
3218 if (adapter->flags & FLAG_HAS_ERT)
ed77134b
MG		 3219 adapter->netdev->pm_qos_req =
3220 pm_qos_add_request(PM_QOS_CPU_DMA_LATENCY,
53ec5498
BA		 3221 PM_QOS_DEFAULT_VALUE);
3222
bc7f75fa
AK		 3223 /* hardware has been reset, we need to reload some things */
3224 e1000_configure(adapter);
3225
3226 clear_bit(__E1000_DOWN, &adapter->state);
3227
3228 napi_enable(&adapter->napi);
4662e82b
BA		 3229 if (adapter->msix_entries)
3230 e1000_configure_msix(adapter);
bc7f75fa
AK		 3231 e1000_irq_enable(adapter);
3232
4cb9be7a
JB		 3233 netif_wake_queue(adapter->netdev);
3234
bc7f75fa 3235 /* fire a link change interrupt to start the watchdog */
52a9b231
BA		 3236 if (adapter->msix_entries)
3237 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3238 else
3239 ew32(ICS, E1000_ICS_LSC);
3240
bc7f75fa
AK		 3241 return 0;
3242}
3243
3244void e1000e_down(struct e1000_adapter *adapter)
3245{
3246 struct net_device *netdev = adapter->netdev;
3247 struct e1000_hw *hw = &adapter->hw;
3248 u32 tctl, rctl;
3249
ad68076e
BA		 3250 /*
3251 * signal that we're down so the interrupt handler does not
3252 * reschedule our watchdog timer
3253 */
bc7f75fa
AK		 3254 set_bit(__E1000_DOWN, &adapter->state);
3255
3256 /* disable receives in the hardware */
3257 rctl = er32(RCTL);
3258 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3259 /* flush and sleep below */
3260
4cb9be7a 3261 netif_stop_queue(netdev);
bc7f75fa
AK		 3262
3263 /* disable transmits in the hardware */
3264 tctl = er32(TCTL);
3265 tctl &= ~E1000_TCTL_EN;
3266 ew32(TCTL, tctl);
3267 /* flush both disables and wait for them to finish */
3268 e1e_flush();
3269 msleep(10);
3270
3271 napi_disable(&adapter->napi);
3272 e1000_irq_disable(adapter);
3273
3274 del_timer_sync(&adapter->watchdog_timer);
3275 del_timer_sync(&adapter->phy_info_timer);
3276
bc7f75fa
AK		 3277 netif_carrier_off(netdev);
3278 adapter->link_speed = 0;
3279 adapter->link_duplex = 0;
3280
52cc3086
JK		 3281 if (!pci_channel_offline(adapter->pdev))
3282 e1000e_reset(adapter);
bc7f75fa
AK		 3283 e1000_clean_tx_ring(adapter);
3284 e1000_clean_rx_ring(adapter);
3285
ed77134b
MG		 3286 if (adapter->flags & FLAG_HAS_ERT) {
3287 pm_qos_remove_request(
3288 adapter->netdev->pm_qos_req);
3289 adapter->netdev->pm_qos_req = NULL;
3290 }
53ec5498 3291
bc7f75fa
AK		 3292 /*
3293 * TODO: for power management, we could drop the link and
3294 * pci_disable_device here.
3295 */
3296}
3297
3298void e1000e_reinit_locked(struct e1000_adapter *adapter)
3299{
3300 might_sleep();
3301 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3302 msleep(1);
3303 e1000e_down(adapter);
3304 e1000e_up(adapter);
3305 clear_bit(__E1000_RESETTING, &adapter->state);
3306}
3307
3308/**
3309 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3310 * @adapter: board private structure to initialize
3311 *
3312 * e1000_sw_init initializes the Adapter private data structure.
3313 * Fields are initialized based on PCI device information and
3314 * OS network device settings (MTU size).
3315 **/
3316static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3317{
bc7f75fa
AK		 3318 struct net_device *netdev = adapter->netdev;
3319
3320 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3321 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3322 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3323 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3324
4662e82b 3325 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3326
4662e82b
BA		 3327 if (e1000_alloc_queues(adapter))
3328 return -ENOMEM;
bc7f75fa 3329
bc7f75fa 3330 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3331 e1000_irq_disable(adapter);
3332
bc7f75fa
AK		 3333 set_bit(__E1000_DOWN, &adapter->state);
3334 return 0;
bc7f75fa
AK		 3335}
3336
f8d59f78
BA		 3337/**
3338 * e1000_intr_msi_test - Interrupt Handler
3339 * @irq: interrupt number
3340 * @data: pointer to a network interface device structure
3341 **/
3342static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3343{
3344 struct net_device *netdev = data;
3345 struct e1000_adapter *adapter = netdev_priv(netdev);
3346 struct e1000_hw *hw = &adapter->hw;
3347 u32 icr = er32(ICR);
3348
3bb99fe2 3349 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3350 if (icr & E1000_ICR_RXSEQ) {
3351 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3352 wmb();
3353 }
3354
3355 return IRQ_HANDLED;
3356}
3357
3358/**
3359 * e1000_test_msi_interrupt - Returns 0 for successful test
3360 * @adapter: board private struct
3361 *
3362 * code flow taken from tg3.c
3363 **/
3364static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3365{
3366 struct net_device *netdev = adapter->netdev;
3367 struct e1000_hw *hw = &adapter->hw;
3368 int err;
3369
3370 /* poll_enable hasn't been called yet, so don't need disable */
3371 /* clear any pending events */
3372 er32(ICR);
3373
3374 /* free the real vector and request a test handler */
3375 e1000_free_irq(adapter);
4662e82b 3376 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3377
3378 /* Assume that the test fails, if it succeeds then the test
3379 * MSI irq handler will unset this flag */
3380 adapter->flags |= FLAG_MSI_TEST_FAILED;
3381
3382 err = pci_enable_msi(adapter->pdev);
3383 if (err)
3384 goto msi_test_failed;
3385
a0607fd3 3386 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3387 netdev->name, netdev);
3388 if (err) {
3389 pci_disable_msi(adapter->pdev);
3390 goto msi_test_failed;
3391 }
3392
3393 wmb();
3394
3395 e1000_irq_enable(adapter);
3396
3397 /* fire an unusual interrupt on the test handler */
3398 ew32(ICS, E1000_ICS_RXSEQ);
3399 e1e_flush();
3400 msleep(50);
3401
3402 e1000_irq_disable(adapter);
3403
3404 rmb();
3405
3406 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3407 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 3408 err = -EIO;
3409 e_info("MSI interrupt test failed!\n");
3410 }
3411
3412 free_irq(adapter->pdev->irq, netdev);
3413 pci_disable_msi(adapter->pdev);
3414
3415 if (err == -EIO)
3416 goto msi_test_failed;
3417
3418 /* okay so the test worked, restore settings */
3bb99fe2 3419 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3420msi_test_failed:
4662e82b 3421 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3422 e1000_request_irq(adapter);
3423 return err;
3424}
3425
3426/**
3427 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3428 * @adapter: board private struct
3429 *
3430 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3431 **/
3432static int e1000_test_msi(struct e1000_adapter *adapter)
3433{
3434 int err;
3435 u16 pci_cmd;
3436
3437 if (!(adapter->flags & FLAG_MSI_ENABLED))
3438 return 0;
3439
3440 /* disable SERR in case the MSI write causes a master abort */
3441 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3442 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3443 pci_cmd & ~PCI_COMMAND_SERR);
3444
3445 err = e1000_test_msi_interrupt(adapter);
3446
3447 /* restore previous setting of command word */
3448 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3449
3450 /* success ! */
3451 if (!err)
3452 return 0;
3453
3454 /* EIO means MSI test failed */
3455 if (err != -EIO)
3456 return err;
3457
3458 /* back to INTx mode */
3459 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3460
3461 e1000_free_irq(adapter);
3462
3463 err = e1000_request_irq(adapter);
3464
3465 return err;
3466}
3467
bc7f75fa
AK		 3468/**
3469 * e1000_open - Called when a network interface is made active
3470 * @netdev: network interface device structure
3471 *
3472 * Returns 0 on success, negative value on failure
3473 *
3474 * The open entry point is called when a network interface is made
3475 * active by the system (IFF_UP). At this point all resources needed
3476 * for transmit and receive operations are allocated, the interrupt
3477 * handler is registered with the OS, the watchdog timer is started,
3478 * and the stack is notified that the interface is ready.
3479 **/
3480static int e1000_open(struct net_device *netdev)
3481{
3482 struct e1000_adapter *adapter = netdev_priv(netdev);
3483 struct e1000_hw *hw = &adapter->hw;
23606cf5 3484 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3485 int err;
3486
3487 /* disallow open during test */
3488 if (test_bit(__E1000_TESTING, &adapter->state))
3489 return -EBUSY;
3490
23606cf5
RW		 3491 pm_runtime_get_sync(&pdev->dev);
3492
9c563d20
JB		 3493 netif_carrier_off(netdev);
3494
bc7f75fa
AK		 3495 /* allocate transmit descriptors */
3496 err = e1000e_setup_tx_resources(adapter);
3497 if (err)
3498 goto err_setup_tx;
3499
3500 /* allocate receive descriptors */
3501 err = e1000e_setup_rx_resources(adapter);
3502 if (err)
3503 goto err_setup_rx;
3504
11b08be8
BA		 3505 /*
3506 * If AMT is enabled, let the firmware know that the network
3507 * interface is now open and reset the part to a known state.
3508 */
3509 if (adapter->flags & FLAG_HAS_AMT) {
3510 e1000_get_hw_control(adapter);
3511 e1000e_reset(adapter);
3512 }
3513
bc7f75fa
AK		 3514 e1000e_power_up_phy(adapter);
3515
3516 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3517 if ((adapter->hw.mng_cookie.status &
3518 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3519 e1000_update_mng_vlan(adapter);
3520
ad68076e
BA		 3521 /*
3522 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3523 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3524 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3525 * clean_rx handler before we do so.
3526 */
bc7f75fa
AK		 3527 e1000_configure(adapter);
3528
3529 err = e1000_request_irq(adapter);
3530 if (err)
3531 goto err_req_irq;
3532
f8d59f78
BA		 3533 /*
3534 * Work around PCIe errata with MSI interrupts causing some chipsets to
3535 * ignore e1000e MSI messages, which means we need to test our MSI
3536 * interrupt now
3537 */
4662e82b 3538 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3539 err = e1000_test_msi(adapter);
3540 if (err) {
3541 e_err("Interrupt allocation failed\n");
3542 goto err_req_irq;
3543 }
3544 }
3545
bc7f75fa
AK		 3546 /* From here on the code is the same as e1000e_up() */
3547 clear_bit(__E1000_DOWN, &adapter->state);
3548
3549 napi_enable(&adapter->napi);
3550
3551 e1000_irq_enable(adapter);
3552
4cb9be7a 3553 netif_start_queue(netdev);
d55b53ff 3554
23606cf5
RW		 3555 adapter->idle_check = true;
3556 pm_runtime_put(&pdev->dev);
3557
bc7f75fa 3558 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA		 3559 if (adapter->msix_entries)
3560 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3561 else
3562 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK		 3563
3564 return 0;
3565
3566err_req_irq:
3567 e1000_release_hw_control(adapter);
3568 e1000_power_down_phy(adapter);
3569 e1000e_free_rx_resources(adapter);
3570err_setup_rx:
3571 e1000e_free_tx_resources(adapter);
3572err_setup_tx:
3573 e1000e_reset(adapter);
23606cf5 3574 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3575
3576 return err;
3577}
3578
3579/**
3580 * e1000_close - Disables a network interface
3581 * @netdev: network interface device structure
3582 *
3583 * Returns 0, this is not allowed to fail
3584 *
3585 * The close entry point is called when an interface is de-activated
3586 * by the OS. The hardware is still under the drivers control, but
3587 * needs to be disabled. A global MAC reset is issued to stop the
3588 * hardware, and all transmit and receive resources are freed.
3589 **/
3590static int e1000_close(struct net_device *netdev)
3591{
3592 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3593 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3594
3595 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3596
3597 pm_runtime_get_sync(&pdev->dev);
3598
3599 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3600 e1000e_down(adapter);
3601 e1000_free_irq(adapter);
3602 }
bc7f75fa 3603 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3604
3605 e1000e_free_tx_resources(adapter);
3606 e1000e_free_rx_resources(adapter);
3607
ad68076e
BA		 3608 /*
3609 * kill manageability vlan ID if supported, but not if a vlan with
3610 * the same ID is registered on the host OS (let 8021q kill it)
3611 */
bc7f75fa
AK		 3612 if ((adapter->hw.mng_cookie.status &
3613 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3614 !(adapter->vlgrp &&
3615 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3616 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3617
ad68076e
BA		 3618 /*
3619 * If AMT is enabled, let the firmware know that the network
3620 * interface is now closed
3621 */
c43bc57e 3622 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3623 e1000_release_hw_control(adapter);
3624
23606cf5
RW		 3625 pm_runtime_put_sync(&pdev->dev);
3626
bc7f75fa
AK		 3627 return 0;
3628}
3629/**
3630 * e1000_set_mac - Change the Ethernet Address of the NIC
3631 * @netdev: network interface device structure
3632 * @p: pointer to an address structure
3633 *
3634 * Returns 0 on success, negative on failure
3635 **/
3636static int e1000_set_mac(struct net_device *netdev, void *p)
3637{
3638 struct e1000_adapter *adapter = netdev_priv(netdev);
3639 struct sockaddr *addr = p;
3640
3641 if (!is_valid_ether_addr(addr->sa_data))
3642 return -EADDRNOTAVAIL;
3643
3644 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3645 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3646
3647 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3648
3649 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3650 /* activate the work around */
3651 e1000e_set_laa_state_82571(&adapter->hw, 1);
3652
ad68076e
BA		 3653 /*
3654 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3655 * between the time RAR[0] gets clobbered and the time it
3656 * gets fixed (in e1000_watchdog), the actual LAA is in one
3657 * of the RARs and no incoming packets directed to this port
3658 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3659 * RAR[14]
3660 */
bc7f75fa
AK		 3661 e1000e_rar_set(&adapter->hw,
3662 adapter->hw.mac.addr,
3663 adapter->hw.mac.rar_entry_count - 1);
3664 }
3665
3666 return 0;
3667}
3668
a8f88ff5
JB		 3669/**
3670 * e1000e_update_phy_task - work thread to update phy
3671 * @work: pointer to our work struct
3672 *
3673 * this worker thread exists because we must acquire a
3674 * semaphore to read the phy, which we could msleep while
3675 * waiting for it, and we can't msleep in a timer.
3676 **/
3677static void e1000e_update_phy_task(struct work_struct *work)
3678{
3679 struct e1000_adapter *adapter = container_of(work,
3680 struct e1000_adapter, update_phy_task);
3681 e1000_get_phy_info(&adapter->hw);
3682}
3683
ad68076e
BA		 3684/*
3685 * Need to wait a few seconds after link up to get diagnostic information from
3686 * the phy
3687 */
bc7f75fa
AK		 3688static void e1000_update_phy_info(unsigned long data)
3689{
3690 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3691 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3692}
3693
8c7bbb92
BA		 3694/**
3695 * e1000e_update_phy_stats - Update the PHY statistics counters
3696 * @adapter: board private structure
3697 **/
3698static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3699{
3700 struct e1000_hw *hw = &adapter->hw;
3701 s32 ret_val;
3702 u16 phy_data;
3703
3704 ret_val = hw->phy.ops.acquire(hw);
3705 if (ret_val)
3706 return;
3707
3708 hw->phy.addr = 1;
3709
3710#define HV_PHY_STATS_PAGE 778
3711 /*
3712 * A page set is expensive so check if already on desired page.
3713 * If not, set to the page with the PHY status registers.
3714 */
3715 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3716 &phy_data);
3717 if (ret_val)
3718 goto release;
3719 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) {
3720 ret_val = e1000e_write_phy_reg_mdic(hw,
3721 IGP01E1000_PHY_PAGE_SELECT,
3722 (HV_PHY_STATS_PAGE <<
3723 IGP_PAGE_SHIFT));
3724 if (ret_val)
3725 goto release;
3726 }
3727
3728 /* Read/clear the upper 16-bit registers and read/accumulate lower */
3729
3730 /* Single Collision Count */
3731 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS,
3732 &phy_data);
3733 ret_val = e1000e_read_phy_reg_mdic(hw,
3734 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS,
3735 &phy_data);
3736 if (!ret_val)
3737 adapter->stats.scc += phy_data;
3738
3739 /* Excessive Collision Count */
3740 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS,
3741 &phy_data);
3742 ret_val = e1000e_read_phy_reg_mdic(hw,
3743 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS,
3744 &phy_data);
3745 if (!ret_val)
3746 adapter->stats.ecol += phy_data;
3747
3748 /* Multiple Collision Count */
3749 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS,
3750 &phy_data);
3751 ret_val = e1000e_read_phy_reg_mdic(hw,
3752 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS,
3753 &phy_data);
3754 if (!ret_val)
3755 adapter->stats.mcc += phy_data;
3756
3757 /* Late Collision Count */
3758 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS,
3759 &phy_data);
3760 ret_val = e1000e_read_phy_reg_mdic(hw,
3761 HV_LATECOL_LOWER &
3762 MAX_PHY_REG_ADDRESS,
3763 &phy_data);
3764 if (!ret_val)
3765 adapter->stats.latecol += phy_data;
3766
3767 /* Collision Count - also used for adaptive IFS */
3768 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS,
3769 &phy_data);
3770 ret_val = e1000e_read_phy_reg_mdic(hw,
3771 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS,
3772 &phy_data);
3773 if (!ret_val)
3774 hw->mac.collision_delta = phy_data;
3775
3776 /* Defer Count */
3777 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS,
3778 &phy_data);
3779 ret_val = e1000e_read_phy_reg_mdic(hw,
3780 HV_DC_LOWER & MAX_PHY_REG_ADDRESS,
3781 &phy_data);
3782 if (!ret_val)
3783 adapter->stats.dc += phy_data;
3784
3785 /* Transmit with no CRS */
3786 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS,
3787 &phy_data);
3788 ret_val = e1000e_read_phy_reg_mdic(hw,
3789 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS,
3790 &phy_data);
3791 if (!ret_val)
3792 adapter->stats.tncrs += phy_data;
3793
3794release:
3795 hw->phy.ops.release(hw);
3796}
3797
bc7f75fa
AK		 3798/**
3799 * e1000e_update_stats - Update the board statistics counters
3800 * @adapter: board private structure
3801 **/
3802void e1000e_update_stats(struct e1000_adapter *adapter)
3803{
7274c20f 3804 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3805 struct e1000_hw *hw = &adapter->hw;
3806 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3807
3808 /*
3809 * Prevent stats update while adapter is being reset, or if the pci
3810 * connection is down.
3811 */
3812 if (adapter->link_speed == 0)
3813 return;
3814 if (pci_channel_offline(pdev))
3815 return;
3816
bc7f75fa
AK		 3817 adapter->stats.crcerrs += er32(CRCERRS);
3818 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3819 adapter->stats.gorc += er32(GORCL);
3820 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3821 adapter->stats.bprc += er32(BPRC);
3822 adapter->stats.mprc += er32(MPRC);
3823 adapter->stats.roc += er32(ROC);
3824
bc7f75fa 3825 adapter->stats.mpc += er32(MPC);
8c7bbb92
BA		 3826
3827 /* Half-duplex statistics */
3828 if (adapter->link_duplex == HALF_DUPLEX) {
3829 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
3830 e1000e_update_phy_stats(adapter);
3831 } else {
3832 adapter->stats.scc += er32(SCC);
3833 adapter->stats.ecol += er32(ECOL);
3834 adapter->stats.mcc += er32(MCC);
3835 adapter->stats.latecol += er32(LATECOL);
3836 adapter->stats.dc += er32(DC);
3837
3838 hw->mac.collision_delta = er32(COLC);
3839
3840 if ((hw->mac.type != e1000_82574) &&
3841 (hw->mac.type != e1000_82583))
3842 adapter->stats.tncrs += er32(TNCRS);
3843 }
3844 adapter->stats.colc += hw->mac.collision_delta;
a4f58f54 3845 }
8c7bbb92 3846
bc7f75fa
AK		 3847 adapter->stats.xonrxc += er32(XONRXC);
3848 adapter->stats.xontxc += er32(XONTXC);
3849 adapter->stats.xoffrxc += er32(XOFFRXC);
3850 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3851 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3852 adapter->stats.gotc += er32(GOTCL);
3853 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3854 adapter->stats.rnbc += er32(RNBC);
3855 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3856
3857 adapter->stats.mptc += er32(MPTC);
3858 adapter->stats.bptc += er32(BPTC);
3859
3860 /* used for adaptive IFS */
3861
3862 hw->mac.tx_packet_delta = er32(TPT);
3863 adapter->stats.tpt += hw->mac.tx_packet_delta;
bc7f75fa
AK		 3864
3865 adapter->stats.algnerrc += er32(ALGNERRC);
3866 adapter->stats.rxerrc += er32(RXERRC);
bc7f75fa
AK		 3867 adapter->stats.cexterr += er32(CEXTERR);
3868 adapter->stats.tsctc += er32(TSCTC);
3869 adapter->stats.tsctfc += er32(TSCTFC);
3870
bc7f75fa 3871 /* Fill out the OS statistics structure */
7274c20f
AK		 3872 netdev->stats.multicast = adapter->stats.mprc;
3873 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3874
3875 /* Rx Errors */
3876
ad68076e
BA		 3877 /*
3878 * RLEC on some newer hardware can be incorrect so build
3879 * our own version based on RUC and ROC
3880 */
7274c20f 3881 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3882 adapter->stats.crcerrs + adapter->stats.algnerrc +
3883 adapter->stats.ruc + adapter->stats.roc +
3884 adapter->stats.cexterr;
7274c20f 3885 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3886 adapter->stats.roc;
7274c20f
AK		 3887 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3888 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3889 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3890
3891 /* Tx Errors */
7274c20f 3892 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3893 adapter->stats.latecol;
7274c20f
AK		 3894 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3895 netdev->stats.tx_window_errors = adapter->stats.latecol;
3896 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3897
3898 /* Tx Dropped needs to be maintained elsewhere */
3899
bc7f75fa
AK		 3900 /* Management Stats */
3901 adapter->stats.mgptc += er32(MGTPTC);
3902 adapter->stats.mgprc += er32(MGTPRC);
3903 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3904}
3905
7c25769f
BA		 3906/**
3907 * e1000_phy_read_status - Update the PHY register status snapshot
3908 * @adapter: board private structure
3909 **/
3910static void e1000_phy_read_status(struct e1000_adapter *adapter)
3911{
3912 struct e1000_hw *hw = &adapter->hw;
3913 struct e1000_phy_regs *phy = &adapter->phy_regs;
3914 int ret_val;
7c25769f
BA		 3915
3916 if ((er32(STATUS) & E1000_STATUS_LU) &&
3917 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3918 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3919 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3920 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3921 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3922 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3923 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3924 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3925 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3926 if (ret_val)
44defeb3 3927 e_warn("Error reading PHY register\n");
7c25769f
BA		 3928 } else {
3929 /*
3930 * Do not read PHY registers if link is not up
3931 * Set values to typical power-on defaults
3932 */
3933 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3934 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3935 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3936 BMSR_ERCAP);
3937 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3938 ADVERTISE_ALL | ADVERTISE_CSMA);
3939 phy->lpa = 0;
3940 phy->expansion = EXPANSION_ENABLENPAGE;
3941 phy->ctrl1000 = ADVERTISE_1000FULL;
3942 phy->stat1000 = 0;
3943 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3944 }
7c25769f
BA		 3945}
3946
bc7f75fa
AK		 3947static void e1000_print_link_info(struct e1000_adapter *adapter)
3948{
bc7f75fa
AK		 3949 struct e1000_hw *hw = &adapter->hw;
3950 u32 ctrl = er32(CTRL);
3951
8f12fe86
BA		 3952 /* Link status message must follow this format for user tools */
3953 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3954 "Flow Control: %s\n",
3955 adapter->netdev->name,
44defeb3
JK		 3956 adapter->link_speed,
3957 (adapter->link_duplex == FULL_DUPLEX) ?
3958 "Full Duplex" : "Half Duplex",
3959 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3960 "RX/TX" :
3961 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3962 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3963}
3964
0c6bdb30 3965static bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3966{
3967 struct e1000_hw *hw = &adapter->hw;
3968 bool link_active = 0;
3969 s32 ret_val = 0;
3970
3971 /*
3972 * get_link_status is set on LSC (link status) interrupt or
3973 * Rx sequence error interrupt. get_link_status will stay
3974 * false until the check_for_link establishes link
3975 * for copper adapters ONLY
3976 */
3977 switch (hw->phy.media_type) {
3978 case e1000_media_type_copper:
3979 if (hw->mac.get_link_status) {
3980 ret_val = hw->mac.ops.check_for_link(hw);
3981 link_active = !hw->mac.get_link_status;
3982 } else {
3983 link_active = 1;
3984 }
3985 break;
3986 case e1000_media_type_fiber:
3987 ret_val = hw->mac.ops.check_for_link(hw);
3988 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3989 break;
3990 case e1000_media_type_internal_serdes:
3991 ret_val = hw->mac.ops.check_for_link(hw);
3992 link_active = adapter->hw.mac.serdes_has_link;
3993 break;
3994 default:
3995 case e1000_media_type_unknown:
3996 break;
3997 }
3998
3999 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4000 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4001 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 4002 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 4003 }
4004
4005 return link_active;
4006}
4007
4008static void e1000e_enable_receives(struct e1000_adapter *adapter)
4009{
4010 /* make sure the receive unit is started */
4011 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4012 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4013 struct e1000_hw *hw = &adapter->hw;
4014 u32 rctl = er32(RCTL);
4015 ew32(RCTL, rctl | E1000_RCTL_EN);
4016 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4017 }
4018}
4019
bc7f75fa
AK		 4020/**
4021 * e1000_watchdog - Timer Call-back
4022 * @data: pointer to adapter cast into an unsigned long
4023 **/
4024static void e1000_watchdog(unsigned long data)
4025{
4026 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4027
4028 /* Do the rest outside of interrupt context */
4029 schedule_work(&adapter->watchdog_task);
4030
4031 /* TODO: make this use queue_delayed_work() */
4032}
4033
4034static void e1000_watchdog_task(struct work_struct *work)
4035{
4036 struct e1000_adapter *adapter = container_of(work,
4037 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 4038 struct net_device *netdev = adapter->netdev;
4039 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 4040 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 4041 struct e1000_ring *tx_ring = adapter->tx_ring;
4042 struct e1000_hw *hw = &adapter->hw;
4043 u32 link, tctl;
bc7f75fa
AK		 4044 int tx_pending = 0;
4045
b405e8df 4046 link = e1000e_has_link(adapter);
318a94d6 4047 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 4048 /* Cancel scheduled suspend requests. */
4049 pm_runtime_resume(netdev->dev.parent);
4050
318a94d6 4051 e1000e_enable_receives(adapter);
bc7f75fa 4052 goto link_up;
bc7f75fa
AK		 4053 }
4054
4055 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4056 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4057 e1000_update_mng_vlan(adapter);
4058
bc7f75fa
AK		 4059 if (link) {
4060 if (!netif_carrier_ok(netdev)) {
4061 bool txb2b = 1;
23606cf5
RW		 4062
4063 /* Cancel scheduled suspend requests. */
4064 pm_runtime_resume(netdev->dev.parent);
4065
318a94d6 4066 /* update snapshot of PHY registers on LSC */
7c25769f 4067 e1000_phy_read_status(adapter);
bc7f75fa
AK		 4068 mac->ops.get_link_up_info(&adapter->hw,
4069 &adapter->link_speed,
4070 &adapter->link_duplex);
4071 e1000_print_link_info(adapter);
f4187b56
BA		 4072 /*
4073 * On supported PHYs, check for duplex mismatch only
4074 * if link has autonegotiated at 10/100 half
4075 */
4076 if ((hw->phy.type == e1000_phy_igp_3 ||
4077 hw->phy.type == e1000_phy_bm) &&
4078 (hw->mac.autoneg == true) &&
4079 (adapter->link_speed == SPEED_10 ||
4080 adapter->link_speed == SPEED_100) &&
4081 (adapter->link_duplex == HALF_DUPLEX)) {
4082 u16 autoneg_exp;
4083
4084 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4085
4086 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4087 e_info("Autonegotiated half duplex but"
4088 " link partner cannot autoneg. "
4089 " Try forcing full duplex if "
4090 "link gets many collisions.\n");
4091 }
4092
f49c57e1 4093 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 4094 adapter->tx_timeout_factor = 1;
4095 switch (adapter->link_speed) {
4096 case SPEED_10:
4097 txb2b = 0;
10f1b492 4098 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 4099 break;
4100 case SPEED_100:
4101 txb2b = 0;
4c86e0b9 4102 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 4103 break;
4104 }
4105
ad68076e
BA		 4106 /*
4107 * workaround: re-program speed mode bit after
4108 * link-up event
4109 */
bc7f75fa
AK		 4110 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4111 !txb2b) {
4112 u32 tarc0;
e9ec2c0f 4113 tarc0 = er32(TARC(0));
bc7f75fa 4114 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4115 ew32(TARC(0), tarc0);
bc7f75fa
AK		 4116 }
4117
ad68076e
BA		 4118 /*
4119 * disable TSO for pcie and 10/100 speeds, to avoid
4120 * some hardware issues
4121 */
bc7f75fa
AK		 4122 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4123 switch (adapter->link_speed) {
4124 case SPEED_10:
4125 case SPEED_100:
44defeb3 4126 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 4127 netdev->features &= ~NETIF_F_TSO;
4128 netdev->features &= ~NETIF_F_TSO6;
4129 break;
4130 case SPEED_1000:
4131 netdev->features |= NETIF_F_TSO;
4132 netdev->features |= NETIF_F_TSO6;
4133 break;
4134 default:
4135 /* oops */
4136 break;
4137 }
4138 }
4139
ad68076e
BA		 4140 /*
4141 * enable transmits in the hardware, need to do this
4142 * after setting TARC(0)
4143 */
bc7f75fa
AK		 4144 tctl = er32(TCTL);
4145 tctl |= E1000_TCTL_EN;
4146 ew32(TCTL, tctl);
4147
75eb0fad
BA		 4148 /*
4149 * Perform any post-link-up configuration before
4150 * reporting link up.
4151 */
4152 if (phy->ops.cfg_on_link_up)
4153 phy->ops.cfg_on_link_up(hw);
4154
bc7f75fa 4155 netif_carrier_on(netdev);
bc7f75fa
AK		 4156
4157 if (!test_bit(__E1000_DOWN, &adapter->state))
4158 mod_timer(&adapter->phy_info_timer,
4159 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4160 }
4161 } else {
4162 if (netif_carrier_ok(netdev)) {
4163 adapter->link_speed = 0;
4164 adapter->link_duplex = 0;
8f12fe86
BA		 4165 /* Link status message must follow this format */
4166 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4167 adapter->netdev->name);
bc7f75fa 4168 netif_carrier_off(netdev);
bc7f75fa
AK		 4169 if (!test_bit(__E1000_DOWN, &adapter->state))
4170 mod_timer(&adapter->phy_info_timer,
4171 round_jiffies(jiffies + 2 * HZ));
4172
4173 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4174 schedule_work(&adapter->reset_task);
23606cf5
RW		 4175 else
4176 pm_schedule_suspend(netdev->dev.parent,
4177 LINK_TIMEOUT);
bc7f75fa
AK		 4178 }
4179 }
4180
4181link_up:
4182 e1000e_update_stats(adapter);
4183
4184 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4185 adapter->tpt_old = adapter->stats.tpt;
4186 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4187 adapter->colc_old = adapter->stats.colc;
4188
7c25769f
BA		 4189 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4190 adapter->gorc_old = adapter->stats.gorc;
4191 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4192 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 4193
4194 e1000e_update_adaptive(&adapter->hw);
4195
4196 if (!netif_carrier_ok(netdev)) {
4197 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
4198 tx_ring->count);
4199 if (tx_pending) {
ad68076e
BA		 4200 /*
4201 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 4202 * but we've got queued Tx work that's never going
4203 * to get done, so reset controller to flush Tx.
ad68076e
BA		 4204 * (Do the reset outside of interrupt context).
4205 */
bc7f75fa
AK		 4206 adapter->tx_timeout_count++;
4207 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 4208 /* return immediately since reset is imminent */
4209 return;
bc7f75fa
AK		 4210 }
4211 }
4212
eab2abf5
JB		 4213 /* Simple mode for Interrupt Throttle Rate (ITR) */
4214 if (adapter->itr_setting == 4) {
4215 /*
4216 * Symmetric Tx/Rx gets a reduced ITR=2000;
4217 * Total asymmetrical Tx or Rx gets ITR=8000;
4218 * everyone else is between 2000-8000.
4219 */
4220 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4221 u32 dif = (adapter->gotc > adapter->gorc ?
4222 adapter->gotc - adapter->gorc :
4223 adapter->gorc - adapter->gotc) / 10000;
4224 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4225
4226 ew32(ITR, 1000000000 / (itr * 256));
4227 }
4228
ad68076e 4229 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4230 if (adapter->msix_entries)
4231 ew32(ICS, adapter->rx_ring->ims_val);
4232 else
4233 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 4234
4235 /* Force detection of hung controller every watchdog period */
4236 adapter->detect_tx_hung = 1;
4237
ad68076e
BA		 4238 /*
4239 * With 82571 controllers, LAA may be overwritten due to controller
4240 * reset from the other port. Set the appropriate LAA in RAR[0]
4241 */
bc7f75fa
AK		 4242 if (e1000e_get_laa_state_82571(hw))
4243 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4244
4245 /* Reset the timer */
4246 if (!test_bit(__E1000_DOWN, &adapter->state))
4247 mod_timer(&adapter->watchdog_timer,
4248 round_jiffies(jiffies + 2 * HZ));
4249}
4250
4251#define E1000_TX_FLAGS_CSUM 0x00000001
4252#define E1000_TX_FLAGS_VLAN 0x00000002
4253#define E1000_TX_FLAGS_TSO 0x00000004
4254#define E1000_TX_FLAGS_IPV4 0x00000008
4255#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4256#define E1000_TX_FLAGS_VLAN_SHIFT 16
4257
4258static int e1000_tso(struct e1000_adapter *adapter,
4259 struct sk_buff *skb)
4260{
4261 struct e1000_ring *tx_ring = adapter->tx_ring;
4262 struct e1000_context_desc *context_desc;
4263 struct e1000_buffer *buffer_info;
4264 unsigned int i;
4265 u32 cmd_length = 0;
4266 u16 ipcse = 0, tucse, mss;
4267 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4268 int err;
4269
3d5e33c9
BA		 4270 if (!skb_is_gso(skb))
4271 return 0;
bc7f75fa 4272
3d5e33c9
BA		 4273 if (skb_header_cloned(skb)) {
4274 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4275 if (err)
4276 return err;
bc7f75fa
AK		 4277 }
4278
3d5e33c9
BA		 4279 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4280 mss = skb_shinfo(skb)->gso_size;
4281 if (skb->protocol == htons(ETH_P_IP)) {
4282 struct iphdr *iph = ip_hdr(skb);
4283 iph->tot_len = 0;
4284 iph->check = 0;
4285 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4286 0, IPPROTO_TCP, 0);
4287 cmd_length = E1000_TXD_CMD_IP;
4288 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4289 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4290 ipv6_hdr(skb)->payload_len = 0;
4291 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4292 &ipv6_hdr(skb)->daddr,
4293 0, IPPROTO_TCP, 0);
4294 ipcse = 0;
4295 }
4296 ipcss = skb_network_offset(skb);
4297 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4298 tucss = skb_transport_offset(skb);
4299 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4300 tucse = 0;
4301
4302 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4303 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4304
4305 i = tx_ring->next_to_use;
4306 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4307 buffer_info = &tx_ring->buffer_info[i];
4308
4309 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4310 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4311 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4312 context_desc->upper_setup.tcp_fields.tucss = tucss;
4313 context_desc->upper_setup.tcp_fields.tucso = tucso;
4314 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4315 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4316 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4317 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4318
4319 buffer_info->time_stamp = jiffies;
4320 buffer_info->next_to_watch = i;
4321
4322 i++;
4323 if (i == tx_ring->count)
4324 i = 0;
4325 tx_ring->next_to_use = i;
4326
4327 return 1;
bc7f75fa
AK		 4328}
4329
4330static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4331{
4332 struct e1000_ring *tx_ring = adapter->tx_ring;
4333 struct e1000_context_desc *context_desc;
4334 struct e1000_buffer *buffer_info;
4335 unsigned int i;
4336 u8 css;
af807c82 4337 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4338 __be16 protocol;
bc7f75fa 4339
af807c82
DG		 4340 if (skb->ip_summed != CHECKSUM_PARTIAL)
4341 return 0;
bc7f75fa 4342
5f66f208
AJ		 4343 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4344 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4345 else
4346 protocol = skb->protocol;
4347
3f518390 4348 switch (protocol) {
09640e63 4349 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4350 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4351 cmd_len |= E1000_TXD_CMD_TCP;
4352 break;
09640e63 4353 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4354 /* XXX not handling all IPV6 headers */
4355 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4356 cmd_len |= E1000_TXD_CMD_TCP;
4357 break;
4358 default:
4359 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4360 e_warn("checksum_partial proto=%x!\n",
4361 be16_to_cpu(protocol));
af807c82 4362 break;
bc7f75fa
AK		 4363 }
4364
af807c82
DG		 4365 css = skb_transport_offset(skb);
4366
4367 i = tx_ring->next_to_use;
4368 buffer_info = &tx_ring->buffer_info[i];
4369 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4370
4371 context_desc->lower_setup.ip_config = 0;
4372 context_desc->upper_setup.tcp_fields.tucss = css;
4373 context_desc->upper_setup.tcp_fields.tucso =
4374 css + skb->csum_offset;
4375 context_desc->upper_setup.tcp_fields.tucse = 0;
4376 context_desc->tcp_seg_setup.data = 0;
4377 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4378
4379 buffer_info->time_stamp = jiffies;
4380 buffer_info->next_to_watch = i;
4381
4382 i++;
4383 if (i == tx_ring->count)
4384 i = 0;
4385 tx_ring->next_to_use = i;
4386
4387 return 1;
bc7f75fa
AK		 4388}
4389
4390#define E1000_MAX_PER_TXD 8192
4391#define E1000_MAX_TXD_PWR 12
4392
4393static int e1000_tx_map(struct e1000_adapter *adapter,
4394 struct sk_buff *skb, unsigned int first,
4395 unsigned int max_per_txd, unsigned int nr_frags,
4396 unsigned int mss)
4397{
4398 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4399 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4400 struct e1000_buffer *buffer_info;
8ddc951c 4401 unsigned int len = skb_headlen(skb);
03b1320d 4402 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4403 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4404
4405 i = tx_ring->next_to_use;
4406
4407 while (len) {
1b7719c4 4408 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4409 size = min(len, max_per_txd);
4410
bc7f75fa 4411 buffer_info->length = size;
bc7f75fa 4412 buffer_info->time_stamp = jiffies;
bc7f75fa 4413 buffer_info->next_to_watch = i;
0be3f55f
NN		 4414 buffer_info->dma = dma_map_single(&pdev->dev,
4415 skb->data + offset,
4416 size, DMA_TO_DEVICE);
03b1320d 4417 buffer_info->mapped_as_page = false;
0be3f55f 4418 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4419 goto dma_error;
bc7f75fa
AK		 4420
4421 len -= size;
4422 offset += size;
03b1320d 4423 count++;
1b7719c4
AD		 4424
4425 if (len) {
4426 i++;
4427 if (i == tx_ring->count)
4428 i = 0;
4429 }
bc7f75fa
AK		 4430 }
4431
4432 for (f = 0; f < nr_frags; f++) {
4433 struct skb_frag_struct *frag;
4434
4435 frag = &skb_shinfo(skb)->frags[f];
4436 len = frag->size;
03b1320d 4437 offset = frag->page_offset;
bc7f75fa
AK		 4438
4439 while (len) {
1b7719c4
AD		 4440 i++;
4441 if (i == tx_ring->count)
4442 i = 0;
4443
bc7f75fa
AK		 4444 buffer_info = &tx_ring->buffer_info[i];
4445 size = min(len, max_per_txd);
bc7f75fa
AK		 4446
4447 buffer_info->length = size;
4448 buffer_info->time_stamp = jiffies;
bc7f75fa 4449 buffer_info->next_to_watch = i;
0be3f55f 4450 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4451 offset, size,
0be3f55f 4452 DMA_TO_DEVICE);
03b1320d 4453 buffer_info->mapped_as_page = true;
0be3f55f 4454 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4455 goto dma_error;
bc7f75fa
AK		 4456
4457 len -= size;
4458 offset += size;
4459 count++;
bc7f75fa
AK		 4460 }
4461 }
4462
9ed318d5
TH		 4463 segs = skb_shinfo(skb)->gso_segs ?: 1;
4464 /* multiply data chunks by size of headers */
4465 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4466
bc7f75fa 4467 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4468 tx_ring->buffer_info[i].segs = segs;
4469 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4470 tx_ring->buffer_info[first].next_to_watch = i;
4471
4472 return count;
03b1320d
AD		 4473
4474dma_error:
4475 dev_err(&pdev->dev, "TX DMA map failed\n");
4476 buffer_info->dma = 0;
c1fa347f 4477 if (count)
03b1320d 4478 count--;
c1fa347f
RK		 4479
4480 while (count--) {
4481 if (i==0)
03b1320d 4482 i += tx_ring->count;
c1fa347f 4483 i--;
03b1320d
AD		 4484 buffer_info = &tx_ring->buffer_info[i];
4485 e1000_put_txbuf(adapter, buffer_info);;
4486 }
4487
4488 return 0;
bc7f75fa
AK		 4489}
4490
4491static void e1000_tx_queue(struct e1000_adapter *adapter,
4492 int tx_flags, int count)
4493{
4494 struct e1000_ring *tx_ring = adapter->tx_ring;
4495 struct e1000_tx_desc *tx_desc = NULL;
4496 struct e1000_buffer *buffer_info;
4497 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4498 unsigned int i;
4499
4500 if (tx_flags & E1000_TX_FLAGS_TSO) {
4501 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4502 E1000_TXD_CMD_TSE;
4503 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4504
4505 if (tx_flags & E1000_TX_FLAGS_IPV4)
4506 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4507 }
4508
4509 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4510 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4511 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4512 }
4513
4514 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4515 txd_lower |= E1000_TXD_CMD_VLE;
4516 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4517 }
4518
4519 i = tx_ring->next_to_use;
4520
4521 while (count--) {
4522 buffer_info = &tx_ring->buffer_info[i];
4523 tx_desc = E1000_TX_DESC(*tx_ring, i);
4524 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4525 tx_desc->lower.data =
4526 cpu_to_le32(txd_lower | buffer_info->length);
4527 tx_desc->upper.data = cpu_to_le32(txd_upper);
4528
4529 i++;
4530 if (i == tx_ring->count)
4531 i = 0;
4532 }
4533
4534 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4535
ad68076e
BA		 4536 /*
4537 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4538 * know there are new descriptors to fetch. (Only
4539 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4540 * such as IA-64).
4541 */
bc7f75fa
AK		 4542 wmb();
4543
4544 tx_ring->next_to_use = i;
4545 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4546 /*
4547 * we need this if more than one processor can write to our tail
4548 * at a time, it synchronizes IO on IA64/Altix systems
4549 */
bc7f75fa
AK		 4550 mmiowb();
4551}
4552
4553#define MINIMUM_DHCP_PACKET_SIZE 282
4554static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4555 struct sk_buff *skb)
4556{
4557 struct e1000_hw *hw = &adapter->hw;
4558 u16 length, offset;
4559
4560 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4561 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4562 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4563 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4564 return 0;
4565 }
4566
4567 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4568 return 0;
4569
4570 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4571 return 0;
4572
4573 {
4574 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4575 struct udphdr *udp;
4576
4577 if (ip->protocol != IPPROTO_UDP)
4578 return 0;
4579
4580 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4581 if (ntohs(udp->dest) != 67)
4582 return 0;
4583
4584 offset = (u8 *)udp + 8 - skb->data;
4585 length = skb->len - offset;
4586 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4587 }
4588
4589 return 0;
4590}
4591
4592static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4593{
4594 struct e1000_adapter *adapter = netdev_priv(netdev);
4595
4596 netif_stop_queue(netdev);
ad68076e
BA		 4597 /*
4598 * Herbert's original patch had:
bc7f75fa 4599 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4600 * but since that doesn't exist yet, just open code it.
4601 */
bc7f75fa
AK		 4602 smp_mb();
4603
ad68076e
BA		 4604 /*
4605 * We need to check again in a case another CPU has just
4606 * made room available.
4607 */
bc7f75fa
AK		 4608 if (e1000_desc_unused(adapter->tx_ring) < size)
4609 return -EBUSY;
4610
4611 /* A reprieve! */
4612 netif_start_queue(netdev);
4613 ++adapter->restart_queue;
4614 return 0;
4615}
4616
4617static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4618{
4619 struct e1000_adapter *adapter = netdev_priv(netdev);
4620
4621 if (e1000_desc_unused(adapter->tx_ring) >= size)
4622 return 0;
4623 return __e1000_maybe_stop_tx(netdev, size);
4624}
4625
4626#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4627static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4628 struct net_device *netdev)
bc7f75fa
AK		 4629{
4630 struct e1000_adapter *adapter = netdev_priv(netdev);
4631 struct e1000_ring *tx_ring = adapter->tx_ring;
4632 unsigned int first;
4633 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4634 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4635 unsigned int tx_flags = 0;
e743d313 4636 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 4637 unsigned int nr_frags;
4638 unsigned int mss;
bc7f75fa
AK		 4639 int count = 0;
4640 int tso;
4641 unsigned int f;
bc7f75fa
AK		 4642
4643 if (test_bit(__E1000_DOWN, &adapter->state)) {
4644 dev_kfree_skb_any(skb);
4645 return NETDEV_TX_OK;
4646 }
4647
4648 if (skb->len <= 0) {
4649 dev_kfree_skb_any(skb);
4650 return NETDEV_TX_OK;
4651 }
4652
4653 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4654 /*
4655 * The controller does a simple calculation to
bc7f75fa
AK		 4656 * make sure there is enough room in the FIFO before
4657 * initiating the DMA for each buffer. The calc is:
4658 * 4 = ceil(buffer len/mss). To make sure we don't
4659 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4660 * drops.
4661 */
bc7f75fa
AK		 4662 if (mss) {
4663 u8 hdr_len;
4664 max_per_txd = min(mss << 2, max_per_txd);
4665 max_txd_pwr = fls(max_per_txd) - 1;
4666
ad68076e
BA		 4667 /*
4668 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4669 * points to just header, pull a few bytes of payload from
4670 * frags into skb->data
4671 */
bc7f75fa 4672 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4673 /*
4674 * we do this workaround for ES2LAN, but it is un-necessary,
4675 * avoiding it could save a lot of cycles
4676 */
4e6c709c 4677 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4678 unsigned int pull_size;
4679
4680 pull_size = min((unsigned int)4, skb->data_len);
4681 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4682 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4683 dev_kfree_skb_any(skb);
4684 return NETDEV_TX_OK;
4685 }
e743d313 4686 len = skb_headlen(skb);
bc7f75fa
AK		 4687 }
4688 }
4689
4690 /* reserve a descriptor for the offload context */
4691 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4692 count++;
4693 count++;
4694
4695 count += TXD_USE_COUNT(len, max_txd_pwr);
4696
4697 nr_frags = skb_shinfo(skb)->nr_frags;
4698 for (f = 0; f < nr_frags; f++)
4699 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4700 max_txd_pwr);
4701
4702 if (adapter->hw.mac.tx_pkt_filtering)
4703 e1000_transfer_dhcp_info(adapter, skb);
4704
ad68076e
BA		 4705 /*
4706 * need: count + 2 desc gap to keep tail from touching
4707 * head, otherwise try next time
4708 */
92af3e95 4709 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4710 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4711
4712 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4713 tx_flags |= E1000_TX_FLAGS_VLAN;
4714 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4715 }
4716
4717 first = tx_ring->next_to_use;
4718
4719 tso = e1000_tso(adapter, skb);
4720 if (tso < 0) {
4721 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4722 return NETDEV_TX_OK;
4723 }
4724
4725 if (tso)
4726 tx_flags |= E1000_TX_FLAGS_TSO;
4727 else if (e1000_tx_csum(adapter, skb))
4728 tx_flags |= E1000_TX_FLAGS_CSUM;
4729
ad68076e
BA		 4730 /*
4731 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4732 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4733 * no longer assume, we must.
4734 */
bc7f75fa
AK		 4735 if (skb->protocol == htons(ETH_P_IP))
4736 tx_flags |= E1000_TX_FLAGS_IPV4;
4737
1b7719c4 4738 /* if count is 0 then mapping error has occured */
bc7f75fa 4739 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4740 if (count) {
4741 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4742 /* Make sure there is space in the ring for the next send. */
4743 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4744
4745 } else {
bc7f75fa 4746 dev_kfree_skb_any(skb);
1b7719c4
AD		 4747 tx_ring->buffer_info[first].time_stamp = 0;
4748 tx_ring->next_to_use = first;
bc7f75fa
AK		 4749 }
4750
bc7f75fa
AK		 4751 return NETDEV_TX_OK;
4752}
4753
4754/**
4755 * e1000_tx_timeout - Respond to a Tx Hang
4756 * @netdev: network interface device structure
4757 **/
4758static void e1000_tx_timeout(struct net_device *netdev)
4759{
4760 struct e1000_adapter *adapter = netdev_priv(netdev);
4761
4762 /* Do the reset outside of interrupt context */
4763 adapter->tx_timeout_count++;
4764 schedule_work(&adapter->reset_task);
4765}
4766
4767static void e1000_reset_task(struct work_struct *work)
4768{
4769 struct e1000_adapter *adapter;
4770 adapter = container_of(work, struct e1000_adapter, reset_task);
4771
84f4ee90
TI		 4772 e1000e_dump(adapter);
4773 e_err("Reset adapter\n");
bc7f75fa
AK		 4774 e1000e_reinit_locked(adapter);
4775}
4776
4777/**
4778 * e1000_get_stats - Get System Network Statistics
4779 * @netdev: network interface device structure
4780 *
4781 * Returns the address of the device statistics structure.
4782 * The statistics are actually updated from the timer callback.
4783 **/
4784static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4785{
bc7f75fa 4786 /* only return the current stats */
7274c20f 4787 return &netdev->stats;
bc7f75fa
AK		 4788}
4789
4790/**
4791 * e1000_change_mtu - Change the Maximum Transfer Unit
4792 * @netdev: network interface device structure
4793 * @new_mtu: new value for maximum frame size
4794 *
4795 * Returns 0 on success, negative on failure
4796 **/
4797static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4798{
4799 struct e1000_adapter *adapter = netdev_priv(netdev);
4800 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4801
2adc55c9
BA		 4802 /* Jumbo frame support */
4803 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4804 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4805 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4806 return -EINVAL;
4807 }
4808
2adc55c9
BA		 4809 /* Supported frame sizes */
4810 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4811 (max_frame > adapter->max_hw_frame_size)) {
4812 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4813 return -EINVAL;
4814 }
4815
6f461f6c
BA		 4816 /* 82573 Errata 17 */
4817 if (((adapter->hw.mac.type == e1000_82573) ||
4818 (adapter->hw.mac.type == e1000_82574)) &&
4819 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4820 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4821 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4822 }
4823
bc7f75fa
AK		 4824 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4825 msleep(1);
610c9928 4826 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4827 adapter->max_frame_size = max_frame;
610c9928
BA		 4828 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4829 netdev->mtu = new_mtu;
bc7f75fa
AK		 4830 if (netif_running(netdev))
4831 e1000e_down(adapter);
4832
ad68076e
BA		 4833 /*
4834 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4835 * means we reserve 2 more, this pushes us to allocate from the next
4836 * larger slab size.
ad68076e 4837 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4838 * However with the new *_jumbo_rx* routines, jumbo receives will use
4839 * fragmented skbs
ad68076e 4840 */
bc7f75fa 4841
9926146b 4842 if (max_frame <= 2048)
bc7f75fa
AK		 4843 adapter->rx_buffer_len = 2048;
4844 else
4845 adapter->rx_buffer_len = 4096;
4846
4847 /* adjust allocation if LPE protects us, and we aren't using SBP */
4848 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4849 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4850 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4851 + ETH_FCS_LEN;
bc7f75fa 4852
bc7f75fa
AK		 4853 if (netif_running(netdev))
4854 e1000e_up(adapter);
4855 else
4856 e1000e_reset(adapter);
4857
4858 clear_bit(__E1000_RESETTING, &adapter->state);
4859
4860 return 0;
4861}
4862
4863static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4864 int cmd)
4865{
4866 struct e1000_adapter *adapter = netdev_priv(netdev);
4867 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4868
318a94d6 4869 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4870 return -EOPNOTSUPP;
4871
4872 switch (cmd) {
4873 case SIOCGMIIPHY:
4874 data->phy_id = adapter->hw.phy.addr;
4875 break;
4876 case SIOCGMIIREG:
b16a002e
BA		 4877 e1000_phy_read_status(adapter);
4878
7c25769f
BA		 4879 switch (data->reg_num & 0x1F) {
4880 case MII_BMCR:
4881 data->val_out = adapter->phy_regs.bmcr;
4882 break;
4883 case MII_BMSR:
4884 data->val_out = adapter->phy_regs.bmsr;
4885 break;
4886 case MII_PHYSID1:
4887 data->val_out = (adapter->hw.phy.id >> 16);
4888 break;
4889 case MII_PHYSID2:
4890 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4891 break;
4892 case MII_ADVERTISE:
4893 data->val_out = adapter->phy_regs.advertise;
4894 break;
4895 case MII_LPA:
4896 data->val_out = adapter->phy_regs.lpa;
4897 break;
4898 case MII_EXPANSION:
4899 data->val_out = adapter->phy_regs.expansion;
4900 break;
4901 case MII_CTRL1000:
4902 data->val_out = adapter->phy_regs.ctrl1000;
4903 break;
4904 case MII_STAT1000:
4905 data->val_out = adapter->phy_regs.stat1000;
4906 break;
4907 case MII_ESTATUS:
4908 data->val_out = adapter->phy_regs.estatus;
4909 break;
4910 default:
bc7f75fa
AK		 4911 return -EIO;
4912 }
bc7f75fa
AK		 4913 break;
4914 case SIOCSMIIREG:
4915 default:
4916 return -EOPNOTSUPP;
4917 }
4918 return 0;
4919}
4920
4921static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4922{
4923 switch (cmd) {
4924 case SIOCGMIIPHY:
4925 case SIOCGMIIREG:
4926 case SIOCSMIIREG:
4927 return e1000_mii_ioctl(netdev, ifr, cmd);
4928 default:
4929 return -EOPNOTSUPP;
4930 }
4931}
4932
a4f58f54
BA		 4933static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4934{
4935 struct e1000_hw *hw = &adapter->hw;
4936 u32 i, mac_reg;
4937 u16 phy_reg;
4938 int retval = 0;
4939
4940 /* copy MAC RARs to PHY RARs */
d3738bb8 4941 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
a4f58f54
BA		 4942
4943 /* copy MAC MTA to PHY MTA */
4944 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4945 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4946 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4947 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4948 }
4949
4950 /* configure PHY Rx Control register */
4951 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4952 mac_reg = er32(RCTL);
4953 if (mac_reg & E1000_RCTL_UPE)
4954 phy_reg |= BM_RCTL_UPE;
4955 if (mac_reg & E1000_RCTL_MPE)
4956 phy_reg |= BM_RCTL_MPE;
4957 phy_reg &= ~(BM_RCTL_MO_MASK);
4958 if (mac_reg & E1000_RCTL_MO_3)
4959 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4960 << BM_RCTL_MO_SHIFT);
4961 if (mac_reg & E1000_RCTL_BAM)
4962 phy_reg |= BM_RCTL_BAM;
4963 if (mac_reg & E1000_RCTL_PMCF)
4964 phy_reg |= BM_RCTL_PMCF;
4965 mac_reg = er32(CTRL);
4966 if (mac_reg & E1000_CTRL_RFCE)
4967 phy_reg |= BM_RCTL_RFCE;
4968 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4969
4970 /* enable PHY wakeup in MAC register */
4971 ew32(WUFC, wufc);
4972 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4973
4974 /* configure and enable PHY wakeup in PHY registers */
4975 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4976 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4977
4978 /* activate PHY wakeup */
94d8186a 4979 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 4980 if (retval) {
4981 e_err("Could not acquire PHY\n");
4982 return retval;
4983 }
4984 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4985 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4986 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4987 if (retval) {
4988 e_err("Could not read PHY page 769\n");
4989 goto out;
4990 }
4991 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4992 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4993 if (retval)
4994 e_err("Could not set PHY Host Wakeup bit\n");
4995out:
94d8186a 4996 hw->phy.ops.release(hw);
a4f58f54
BA		 4997
4998 return retval;
4999}
5000
23606cf5
RW		 5001static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5002 bool runtime)
bc7f75fa
AK		 5003{
5004 struct net_device *netdev = pci_get_drvdata(pdev);
5005 struct e1000_adapter *adapter = netdev_priv(netdev);
5006 struct e1000_hw *hw = &adapter->hw;
5007 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 5008 /* Runtime suspend should only enable wakeup for link changes */
5009 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 5010 int retval = 0;
5011
5012 netif_device_detach(netdev);
5013
5014 if (netif_running(netdev)) {
5015 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5016 e1000e_down(adapter);
5017 e1000_free_irq(adapter);
5018 }
4662e82b 5019 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5020
5021 retval = pci_save_state(pdev);
5022 if (retval)
5023 return retval;
5024
5025 status = er32(STATUS);
5026 if (status & E1000_STATUS_LU)
5027 wufc &= ~E1000_WUFC_LNKC;
5028
5029 if (wufc) {
5030 e1000_setup_rctl(adapter);
5031 e1000_set_multi(netdev);
5032
5033 /* turn on all-multi mode if wake on multicast is enabled */
5034 if (wufc & E1000_WUFC_MC) {
5035 rctl = er32(RCTL);
5036 rctl |= E1000_RCTL_MPE;
5037 ew32(RCTL, rctl);
5038 }
5039
5040 ctrl = er32(CTRL);
5041 /* advertise wake from D3Cold */
5042 #define E1000_CTRL_ADVD3WUC 0x00100000
5043 /* phy power management enable */
5044 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 5045 ctrl |= E1000_CTRL_ADVD3WUC;
5046 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5047 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 5048 ew32(CTRL, ctrl);
5049
318a94d6
JK		 5050 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5051 adapter->hw.phy.media_type ==
5052 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 5053 /* keep the laser running in D3 */
5054 ctrl_ext = er32(CTRL_EXT);
93a23f48 5055 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 5056 ew32(CTRL_EXT, ctrl_ext);
5057 }
5058
97ac8cae
BA		 5059 if (adapter->flags & FLAG_IS_ICH)
5060 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
5061
bc7f75fa
AK		 5062 /* Allow time for pending master requests to run */
5063 e1000e_disable_pcie_master(&adapter->hw);
5064
82776a4b 5065 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 5066 /* enable wakeup by the PHY */
5067 retval = e1000_init_phy_wakeup(adapter, wufc);
5068 if (retval)
5069 return retval;
5070 } else {
5071 /* enable wakeup by the MAC */
5072 ew32(WUFC, wufc);
5073 ew32(WUC, E1000_WUC_PME_EN);
5074 }
bc7f75fa
AK		 5075 } else {
5076 ew32(WUC, 0);
5077 ew32(WUFC, 0);
bc7f75fa
AK		 5078 }
5079
4f9de721
RW		 5080 *enable_wake = !!wufc;
5081
bc7f75fa 5082 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 5083 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5084 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 5085 *enable_wake = true;
bc7f75fa
AK		 5086
5087 if (adapter->hw.phy.type == e1000_phy_igp_3)
5088 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5089
ad68076e
BA		 5090 /*
5091 * Release control of h/w to f/w. If f/w is AMT enabled, this
5092 * would have already happened in close and is redundant.
5093 */
bc7f75fa
AK		 5094 e1000_release_hw_control(adapter);
5095
5096 pci_disable_device(pdev);
5097
4f9de721
RW		 5098 return 0;
5099}
5100
5101static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5102{
5103 if (sleep && wake) {
5104 pci_prepare_to_sleep(pdev);
5105 return;
5106 }
5107
5108 pci_wake_from_d3(pdev, wake);
5109 pci_set_power_state(pdev, PCI_D3hot);
5110}
5111
5112static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5113 bool wake)
5114{
5115 struct net_device *netdev = pci_get_drvdata(pdev);
5116 struct e1000_adapter *adapter = netdev_priv(netdev);
5117
005cbdfc
AD		 5118 /*
5119 * The pci-e switch on some quad port adapters will report a
5120 * correctable error when the MAC transitions from D0 to D3. To
5121 * prevent this we need to mask off the correctable errors on the
5122 * downstream port of the pci-e switch.
5123 */
5124 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5125 struct pci_dev *us_dev = pdev->bus->self;
5126 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5127 u16 devctl;
5128
5129 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5130 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5131 (devctl & ~PCI_EXP_DEVCTL_CERE));
5132
4f9de721 5133 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 5134
5135 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5136 } else {
4f9de721 5137 e1000_power_off(pdev, sleep, wake);
005cbdfc 5138 }
bc7f75fa
AK		 5139}
5140
6f461f6c
BA		 5141#ifdef CONFIG_PCIEASPM
5142static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5143{
5144 pci_disable_link_state(pdev, state);
5145}
5146#else
5147static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 5148{
5149 int pos;
6f461f6c 5150 u16 reg16;
1eae4eb2
AK		 5151
5152 /*
6f461f6c
BA		 5153 * Both device and parent should have the same ASPM setting.
5154 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5155 */
6f461f6c
BA		 5156 pos = pci_pcie_cap(pdev);
5157 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5158 reg16 &= ~state;
5159 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5160
0c75ba22
AB		 5161 if (!pdev->bus->self)
5162 return;
5163
6f461f6c
BA		 5164 pos = pci_pcie_cap(pdev->bus->self);
5165 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5166 reg16 &= ~state;
5167 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5168}
5169#endif
5170void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5171{
5172 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5173 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5174 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5175
5176 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5177}
5178
a0340162 5179#ifdef CONFIG_PM_OPS
23606cf5 5180static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4f9de721 5181{
23606cf5 5182 return !!adapter->tx_ring->buffer_info;
4f9de721
RW		 5183}
5184
23606cf5 5185static int __e1000_resume(struct pci_dev *pdev)
bc7f75fa
AK		 5186{
5187 struct net_device *netdev = pci_get_drvdata(pdev);
5188 struct e1000_adapter *adapter = netdev_priv(netdev);
5189 struct e1000_hw *hw = &adapter->hw;
5190 u32 err;
5191
5192 pci_set_power_state(pdev, PCI_D0);
5193 pci_restore_state(pdev);
28b8f04a 5194 pci_save_state(pdev);
6f461f6c
BA		 5195 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5196 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5197
4662e82b 5198 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5199 if (netif_running(netdev)) {
5200 err = e1000_request_irq(adapter);
5201 if (err)
5202 return err;
5203 }
5204
5205 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5206
5207 /* report the system wakeup cause from S3/S4 */
5208 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5209 u16 phy_data;
5210
5211 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5212 if (phy_data) {
5213 e_info("PHY Wakeup cause - %s\n",
5214 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5215 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5216 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5217 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5218 phy_data & E1000_WUS_LNKC ? "Link Status "
5219 " Change" : "other");
5220 }
5221 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5222 } else {
5223 u32 wus = er32(WUS);
5224 if (wus) {
5225 e_info("MAC Wakeup cause - %s\n",
5226 wus & E1000_WUS_EX ? "Unicast Packet" :
5227 wus & E1000_WUS_MC ? "Multicast Packet" :
5228 wus & E1000_WUS_BC ? "Broadcast Packet" :
5229 wus & E1000_WUS_MAG ? "Magic Packet" :
5230 wus & E1000_WUS_LNKC ? "Link Status Change" :
5231 "other");
5232 }
5233 ew32(WUS, ~0);
5234 }
5235
bc7f75fa 5236 e1000e_reset(adapter);
bc7f75fa 5237
cd791618 5238 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5239
5240 if (netif_running(netdev))
5241 e1000e_up(adapter);
5242
5243 netif_device_attach(netdev);
5244
ad68076e
BA		 5245 /*
5246 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5247 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5248 * under the control of the driver.
5249 */
c43bc57e 5250 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5251 e1000_get_hw_control(adapter);
5252
5253 return 0;
5254}
23606cf5 5255
a0340162
RW		 5256#ifdef CONFIG_PM_SLEEP
5257static int e1000_suspend(struct device *dev)
5258{
5259 struct pci_dev *pdev = to_pci_dev(dev);
5260 int retval;
5261 bool wake;
5262
5263 retval = __e1000_shutdown(pdev, &wake, false);
5264 if (!retval)
5265 e1000_complete_shutdown(pdev, true, wake);
5266
5267 return retval;
5268}
5269
23606cf5
RW		 5270static int e1000_resume(struct device *dev)
5271{
5272 struct pci_dev *pdev = to_pci_dev(dev);
5273 struct net_device *netdev = pci_get_drvdata(pdev);
5274 struct e1000_adapter *adapter = netdev_priv(netdev);
5275
5276 if (e1000e_pm_ready(adapter))
5277 adapter->idle_check = true;
5278
5279 return __e1000_resume(pdev);
5280}
a0340162
RW		 5281#endif /* CONFIG_PM_SLEEP */
5282
5283#ifdef CONFIG_PM_RUNTIME
5284static int e1000_runtime_suspend(struct device *dev)
5285{
5286 struct pci_dev *pdev = to_pci_dev(dev);
5287 struct net_device *netdev = pci_get_drvdata(pdev);
5288 struct e1000_adapter *adapter = netdev_priv(netdev);
5289
5290 if (e1000e_pm_ready(adapter)) {
5291 bool wake;
5292
5293 __e1000_shutdown(pdev, &wake, true);
5294 }
5295
5296 return 0;
5297}
5298
5299static int e1000_idle(struct device *dev)
5300{
5301 struct pci_dev *pdev = to_pci_dev(dev);
5302 struct net_device *netdev = pci_get_drvdata(pdev);
5303 struct e1000_adapter *adapter = netdev_priv(netdev);
5304
5305 if (!e1000e_pm_ready(adapter))
5306 return 0;
5307
5308 if (adapter->idle_check) {
5309 adapter->idle_check = false;
5310 if (!e1000e_has_link(adapter))
5311 pm_schedule_suspend(dev, MSEC_PER_SEC);
5312 }
5313
5314 return -EBUSY;
5315}
23606cf5
RW		 5316
5317static int e1000_runtime_resume(struct device *dev)
5318{
5319 struct pci_dev *pdev = to_pci_dev(dev);
5320 struct net_device *netdev = pci_get_drvdata(pdev);
5321 struct e1000_adapter *adapter = netdev_priv(netdev);
5322
5323 if (!e1000e_pm_ready(adapter))
5324 return 0;
5325
5326 adapter->idle_check = !dev->power.runtime_auto;
5327 return __e1000_resume(pdev);
5328}
a0340162
RW		 5329#endif /* CONFIG_PM_RUNTIME */
5330#endif /* CONFIG_PM_OPS */
bc7f75fa
AK		 5331
5332static void e1000_shutdown(struct pci_dev *pdev)
5333{
4f9de721
RW		 5334 bool wake = false;
5335
23606cf5 5336 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5337
5338 if (system_state == SYSTEM_POWER_OFF)
5339 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5340}
5341
5342#ifdef CONFIG_NET_POLL_CONTROLLER
5343/*
5344 * Polling 'interrupt' - used by things like netconsole to send skbs
5345 * without having to re-enable interrupts. It's not called while
5346 * the interrupt routine is executing.
5347 */
5348static void e1000_netpoll(struct net_device *netdev)
5349{
5350 struct e1000_adapter *adapter = netdev_priv(netdev);
5351
5352 disable_irq(adapter->pdev->irq);
5353 e1000_intr(adapter->pdev->irq, netdev);
5354
bc7f75fa
AK		 5355 enable_irq(adapter->pdev->irq);
5356}
5357#endif
5358
5359/**
5360 * e1000_io_error_detected - called when PCI error is detected
5361 * @pdev: Pointer to PCI device
5362 * @state: The current pci connection state
5363 *
5364 * This function is called after a PCI bus error affecting
5365 * this device has been detected.
5366 */
5367static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5368 pci_channel_state_t state)
5369{
5370 struct net_device *netdev = pci_get_drvdata(pdev);
5371 struct e1000_adapter *adapter = netdev_priv(netdev);
5372
5373 netif_device_detach(netdev);
5374
c93b5a76
MM		 5375 if (state == pci_channel_io_perm_failure)
5376 return PCI_ERS_RESULT_DISCONNECT;
5377
bc7f75fa
AK		 5378 if (netif_running(netdev))
5379 e1000e_down(adapter);
5380 pci_disable_device(pdev);
5381
5382 /* Request a slot slot reset. */
5383 return PCI_ERS_RESULT_NEED_RESET;
5384}
5385
5386/**
5387 * e1000_io_slot_reset - called after the pci bus has been reset.
5388 * @pdev: Pointer to PCI device
5389 *
5390 * Restart the card from scratch, as if from a cold-boot. Implementation
5391 * resembles the first-half of the e1000_resume routine.
5392 */
5393static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5394{
5395 struct net_device *netdev = pci_get_drvdata(pdev);
5396 struct e1000_adapter *adapter = netdev_priv(netdev);
5397 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 5398 int err;
111b9dc5 5399 pci_ers_result_t result;
bc7f75fa 5400
6f461f6c
BA		 5401 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5402 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 5403 err = pci_enable_device_mem(pdev);
6e4f6f6b 5404 if (err) {
bc7f75fa
AK		 5405 dev_err(&pdev->dev,
5406 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5407 result = PCI_ERS_RESULT_DISCONNECT;
5408 } else {
5409 pci_set_master(pdev);
23606cf5 5410 pdev->state_saved = true;
111b9dc5 5411 pci_restore_state(pdev);
bc7f75fa 5412
111b9dc5
JB		 5413 pci_enable_wake(pdev, PCI_D3hot, 0);
5414 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5415
111b9dc5
JB		 5416 e1000e_reset(adapter);
5417 ew32(WUS, ~0);
5418 result = PCI_ERS_RESULT_RECOVERED;
5419 }
bc7f75fa 5420
111b9dc5
JB		 5421 pci_cleanup_aer_uncorrect_error_status(pdev);
5422
5423 return result;
bc7f75fa
AK		 5424}
5425
5426/**
5427 * e1000_io_resume - called when traffic can start flowing again.
5428 * @pdev: Pointer to PCI device
5429 *
5430 * This callback is called when the error recovery driver tells us that
5431 * its OK to resume normal operation. Implementation resembles the
5432 * second-half of the e1000_resume routine.
5433 */
5434static void e1000_io_resume(struct pci_dev *pdev)
5435{
5436 struct net_device *netdev = pci_get_drvdata(pdev);
5437 struct e1000_adapter *adapter = netdev_priv(netdev);
5438
cd791618 5439 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5440
5441 if (netif_running(netdev)) {
5442 if (e1000e_up(adapter)) {
5443 dev_err(&pdev->dev,
5444 "can't bring device back up after reset\n");
5445 return;
5446 }
5447 }
5448
5449 netif_device_attach(netdev);
5450
ad68076e
BA		 5451 /*
5452 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5453 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5454 * under the control of the driver.
5455 */
c43bc57e 5456 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5457 e1000_get_hw_control(adapter);
5458
5459}
5460
5461static void e1000_print_device_info(struct e1000_adapter *adapter)
5462{
5463 struct e1000_hw *hw = &adapter->hw;
5464 struct net_device *netdev = adapter->netdev;
69e3fd8c 5465 u32 pba_num;
bc7f75fa
AK		 5466
5467 /* print bus type/speed/width info */
7c510e4b 5468 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 5469 /* bus width */
5470 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5471 "Width x1"),
5472 /* MAC address */
7c510e4b 5473 netdev->dev_addr);
44defeb3
JK		 5474 e_info("Intel(R) PRO/%s Network Connection\n",
5475 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 5476 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 5477 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
5478 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 5479}
5480
10aa4c04
AK		 5481static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5482{
5483 struct e1000_hw *hw = &adapter->hw;
5484 int ret_val;
5485 u16 buf = 0;
5486
5487 if (hw->mac.type != e1000_82573)
5488 return;
5489
5490 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5491 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5492 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 5493 dev_warn(&adapter->pdev->dev,
5494 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5495 }
10aa4c04
AK		 5496}
5497
651c2466
SH		 5498static const struct net_device_ops e1000e_netdev_ops = {
5499 .ndo_open = e1000_open,
5500 .ndo_stop = e1000_close,
00829823 5501 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 5502 .ndo_get_stats = e1000_get_stats,
5503 .ndo_set_multicast_list = e1000_set_multi,
5504 .ndo_set_mac_address = e1000_set_mac,
5505 .ndo_change_mtu = e1000_change_mtu,
5506 .ndo_do_ioctl = e1000_ioctl,
5507 .ndo_tx_timeout = e1000_tx_timeout,
5508 .ndo_validate_addr = eth_validate_addr,
5509
5510 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5511 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5512 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5513#ifdef CONFIG_NET_POLL_CONTROLLER
5514 .ndo_poll_controller = e1000_netpoll,
5515#endif
5516};
5517
bc7f75fa
AK		 5518/**
5519 * e1000_probe - Device Initialization Routine
5520 * @pdev: PCI device information struct
5521 * @ent: entry in e1000_pci_tbl
5522 *
5523 * Returns 0 on success, negative on failure
5524 *
5525 * e1000_probe initializes an adapter identified by a pci_dev structure.
5526 * The OS initialization, configuring of the adapter private structure,
5527 * and a hardware reset occur.
5528 **/
5529static int __devinit e1000_probe(struct pci_dev *pdev,
5530 const struct pci_device_id *ent)
5531{
5532 struct net_device *netdev;
5533 struct e1000_adapter *adapter;
5534 struct e1000_hw *hw;
5535 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5536 resource_size_t mmio_start, mmio_len;
5537 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5538
5539 static int cards_found;
5540 int i, err, pci_using_dac;
5541 u16 eeprom_data = 0;
5542 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5543
6f461f6c
BA		 5544 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5545 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5546
f0f422e5 5547 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5548 if (err)
5549 return err;
5550
5551 pci_using_dac = 0;
0be3f55f 5552 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5553 if (!err) {
0be3f55f 5554 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5555 if (!err)
5556 pci_using_dac = 1;
5557 } else {
0be3f55f 5558 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5559 if (err) {
0be3f55f
NN		 5560 err = dma_set_coherent_mask(&pdev->dev,
5561 DMA_BIT_MASK(32));
bc7f75fa
AK		 5562 if (err) {
5563 dev_err(&pdev->dev, "No usable DMA "
5564 "configuration, aborting\n");
5565 goto err_dma;
5566 }
5567 }
5568 }
5569
e8de1481 5570 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5571 pci_select_bars(pdev, IORESOURCE_MEM),
5572 e1000e_driver_name);
bc7f75fa
AK		 5573 if (err)
5574 goto err_pci_reg;
5575
68eac460 5576 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5577 pci_enable_pcie_error_reporting(pdev);
68eac460 5578
bc7f75fa 5579 pci_set_master(pdev);
438b365a
BA		 5580 /* PCI config space info */
5581 err = pci_save_state(pdev);
5582 if (err)
5583 goto err_alloc_etherdev;
bc7f75fa
AK		 5584
5585 err = -ENOMEM;
5586 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5587 if (!netdev)
5588 goto err_alloc_etherdev;
5589
bc7f75fa
AK		 5590 SET_NETDEV_DEV(netdev, &pdev->dev);
5591
f85e4dfa
TH		 5592 netdev->irq = pdev->irq;
5593
bc7f75fa
AK		 5594 pci_set_drvdata(pdev, netdev);
5595 adapter = netdev_priv(netdev);
5596 hw = &adapter->hw;
5597 adapter->netdev = netdev;
5598 adapter->pdev = pdev;
5599 adapter->ei = ei;
5600 adapter->pba = ei->pba;
5601 adapter->flags = ei->flags;
eb7c3adb 5602 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5603 adapter->hw.adapter = adapter;
5604 adapter->hw.mac.type = ei->mac;
2adc55c9 5605 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5606 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5607
5608 mmio_start = pci_resource_start(pdev, 0);
5609 mmio_len = pci_resource_len(pdev, 0);
5610
5611 err = -EIO;
5612 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5613 if (!adapter->hw.hw_addr)
5614 goto err_ioremap;
5615
5616 if ((adapter->flags & FLAG_HAS_FLASH) &&
5617 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5618 flash_start = pci_resource_start(pdev, 1);
5619 flash_len = pci_resource_len(pdev, 1);
5620 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5621 if (!adapter->hw.flash_address)
5622 goto err_flashmap;
5623 }
5624
5625 /* construct the net_device struct */
651c2466 5626 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5627 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5628 netdev->watchdog_timeo = 5 * HZ;
5629 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5630 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5631
5632 netdev->mem_start = mmio_start;
5633 netdev->mem_end = mmio_start + mmio_len;
5634
5635 adapter->bd_number = cards_found++;
5636
4662e82b
BA		 5637 e1000e_check_options(adapter);
5638
bc7f75fa
AK		 5639 /* setup adapter struct */
5640 err = e1000_sw_init(adapter);
5641 if (err)
5642 goto err_sw_init;
5643
5644 err = -EIO;
5645
5646 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5647 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5648 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5649
69e3fd8c 5650 err = ei->get_variants(adapter);
bc7f75fa
AK		 5651 if (err)
5652 goto err_hw_init;
5653
4a770358
BA		 5654 if ((adapter->flags & FLAG_IS_ICH) &&
5655 (adapter->flags & FLAG_READ_ONLY_NVM))
5656 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5657
bc7f75fa
AK		 5658 hw->mac.ops.get_bus_info(&adapter->hw);
5659
318a94d6 5660 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5661
5662 /* Copper options */
318a94d6 5663 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5664 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5665 adapter->hw.phy.disable_polarity_correction = 0;
5666 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5667 }
5668
5669 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5670 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5671
5672 netdev->features = NETIF_F_SG |
5673 NETIF_F_HW_CSUM |
5674 NETIF_F_HW_VLAN_TX |
5675 NETIF_F_HW_VLAN_RX;
5676
5677 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5678 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5679
5680 netdev->features |= NETIF_F_TSO;
5681 netdev->features |= NETIF_F_TSO6;
5682
a5136e23
JK		 5683 netdev->vlan_features |= NETIF_F_TSO;
5684 netdev->vlan_features |= NETIF_F_TSO6;
5685 netdev->vlan_features |= NETIF_F_HW_CSUM;
5686 netdev->vlan_features |= NETIF_F_SG;
5687
bc7f75fa
AK		 5688 if (pci_using_dac)
5689 netdev->features |= NETIF_F_HIGHDMA;
5690
bc7f75fa
AK		 5691 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5692 adapter->flags |= FLAG_MNG_PT_ENABLED;
5693
ad68076e
BA		 5694 /*
5695 * before reading the NVM, reset the controller to
5696 * put the device in a known good starting state
5697 */
bc7f75fa
AK		 5698 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5699
5700 /*
5701 * systems with ASPM and others may see the checksum fail on the first
5702 * attempt. Let's give it a few tries
5703 */
5704 for (i = 0;; i++) {
5705 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5706 break;
5707 if (i == 2) {
44defeb3 5708 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5709 err = -EIO;
5710 goto err_eeprom;
5711 }
5712 }
5713
10aa4c04
AK		 5714 e1000_eeprom_checks(adapter);
5715
608f8a0d 5716 /* copy the MAC address */
bc7f75fa 5717 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5718 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5719
5720 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5721 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5722
5723 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5724 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5725 err = -EIO;
5726 goto err_eeprom;
5727 }
5728
5729 init_timer(&adapter->watchdog_timer);
5730 adapter->watchdog_timer.function = &e1000_watchdog;
5731 adapter->watchdog_timer.data = (unsigned long) adapter;
5732
5733 init_timer(&adapter->phy_info_timer);
5734 adapter->phy_info_timer.function = &e1000_update_phy_info;
5735 adapter->phy_info_timer.data = (unsigned long) adapter;
5736
5737 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5738 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5739 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5740 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5741 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5742
bc7f75fa
AK		 5743 /* Initialize link parameters. User can change them with ethtool */
5744 adapter->hw.mac.autoneg = 1;
309af40b 5745 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5746 adapter->hw.fc.requested_mode = e1000_fc_default;
5747 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5748 adapter->hw.phy.autoneg_advertised = 0x2f;
5749
5750 /* ring size defaults */
5751 adapter->rx_ring->count = 256;
5752 adapter->tx_ring->count = 256;
5753
5754 /*
5755 * Initial Wake on LAN setting - If APM wake is enabled in
5756 * the EEPROM, enable the ACPI Magic Packet filter
5757 */
5758 if (adapter->flags & FLAG_APME_IN_WUC) {
5759 /* APME bit in EEPROM is mapped to WUC.APME */
5760 eeprom_data = er32(WUC);
5761 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5762 if (eeprom_data & E1000_WUC_PHY_WAKE)
5763 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5764 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5765 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5766 (adapter->hw.bus.func == 1))
5767 e1000_read_nvm(&adapter->hw,
5768 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5769 else
5770 e1000_read_nvm(&adapter->hw,
5771 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5772 }
5773
5774 /* fetch WoL from EEPROM */
5775 if (eeprom_data & eeprom_apme_mask)
5776 adapter->eeprom_wol |= E1000_WUFC_MAG;
5777
5778 /*
5779 * now that we have the eeprom settings, apply the special cases
5780 * where the eeprom may be wrong or the board simply won't support
5781 * wake on lan on a particular port
5782 */
5783 if (!(adapter->flags & FLAG_HAS_WOL))
5784 adapter->eeprom_wol = 0;
5785
5786 /* initialize the wol settings based on the eeprom settings */
5787 adapter->wol = adapter->eeprom_wol;
6ff68026 5788 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5789
84527590
BA		 5790 /* save off EEPROM version number */
5791 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5792
bc7f75fa
AK		 5793 /* reset the hardware with the new settings */
5794 e1000e_reset(adapter);
5795
ad68076e
BA		 5796 /*
5797 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5798 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5799 * under the control of the driver.
5800 */
c43bc57e 5801 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5802 e1000_get_hw_control(adapter);
5803
bc7f75fa
AK		 5804 strcpy(netdev->name, "eth%d");
5805 err = register_netdev(netdev);
5806 if (err)
5807 goto err_register;
5808
9c563d20
JB		 5809 /* carrier off reporting is important to ethtool even BEFORE open */
5810 netif_carrier_off(netdev);
5811
bc7f75fa
AK		 5812 e1000_print_device_info(adapter);
5813
23606cf5
RW		 5814 if (pci_dev_run_wake(pdev)) {
5815 pm_runtime_set_active(&pdev->dev);
5816 pm_runtime_enable(&pdev->dev);
5817 }
5818 pm_schedule_suspend(&pdev->dev, MSEC_PER_SEC);
5819
bc7f75fa
AK		 5820 return 0;
5821
5822err_register:
c43bc57e
JB		 5823 if (!(adapter->flags & FLAG_HAS_AMT))
5824 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5825err_eeprom:
5826 if (!e1000_check_reset_block(&adapter->hw))
5827 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5828err_hw_init:
bc7f75fa 5829
bc7f75fa
AK		 5830 kfree(adapter->tx_ring);
5831 kfree(adapter->rx_ring);
5832err_sw_init:
c43bc57e
JB		 5833 if (adapter->hw.flash_address)
5834 iounmap(adapter->hw.flash_address);
e82f54ba 5835 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5836err_flashmap:
bc7f75fa
AK		 5837 iounmap(adapter->hw.hw_addr);
5838err_ioremap:
5839 free_netdev(netdev);
5840err_alloc_etherdev:
f0f422e5
BA		 5841 pci_release_selected_regions(pdev,
5842 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5843err_pci_reg:
5844err_dma:
5845 pci_disable_device(pdev);
5846 return err;
5847}
5848
5849/**
5850 * e1000_remove - Device Removal Routine
5851 * @pdev: PCI device information struct
5852 *
5853 * e1000_remove is called by the PCI subsystem to alert the driver
5854 * that it should release a PCI device. The could be caused by a
5855 * Hot-Plug event, or because the driver is going to be removed from
5856 * memory.
5857 **/
5858static void __devexit e1000_remove(struct pci_dev *pdev)
5859{
5860 struct net_device *netdev = pci_get_drvdata(pdev);
5861 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 5862 bool down = test_bit(__E1000_DOWN, &adapter->state);
5863
5864 pm_runtime_get_sync(&pdev->dev);
bc7f75fa 5865
ad68076e
BA		 5866 /*
5867 * flush_scheduled work may reschedule our watchdog task, so
5868 * explicitly disable watchdog tasks from being rescheduled
5869 */
23606cf5
RW		 5870 if (!down)
5871 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 5872 del_timer_sync(&adapter->watchdog_timer);
5873 del_timer_sync(&adapter->phy_info_timer);
5874
41cec6f1
BA		 5875 cancel_work_sync(&adapter->reset_task);
5876 cancel_work_sync(&adapter->watchdog_task);
5877 cancel_work_sync(&adapter->downshift_task);
5878 cancel_work_sync(&adapter->update_phy_task);
5879 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 5880 flush_scheduled_work();
5881
17f208de
BA		 5882 if (!(netdev->flags & IFF_UP))
5883 e1000_power_down_phy(adapter);
5884
23606cf5
RW		 5885 /* Don't lie to e1000_close() down the road. */
5886 if (!down)
5887 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 5888 unregister_netdev(netdev);
5889
23606cf5
RW		 5890 if (pci_dev_run_wake(pdev)) {
5891 pm_runtime_disable(&pdev->dev);
5892 pm_runtime_set_suspended(&pdev->dev);
5893 }
5894 pm_runtime_put_noidle(&pdev->dev);
5895
ad68076e
BA		 5896 /*
5897 * Release control of h/w to f/w. If f/w is AMT enabled, this
5898 * would have already happened in close and is redundant.
5899 */
bc7f75fa
AK		 5900 e1000_release_hw_control(adapter);
5901
4662e82b 5902 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5903 kfree(adapter->tx_ring);
5904 kfree(adapter->rx_ring);
5905
5906 iounmap(adapter->hw.hw_addr);
5907 if (adapter->hw.flash_address)
5908 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5909 pci_release_selected_regions(pdev,
5910 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5911
5912 free_netdev(netdev);
5913
111b9dc5 5914 /* AER disable */
19d5afd4 5915 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5916
bc7f75fa
AK		 5917 pci_disable_device(pdev);
5918}
5919
5920/* PCI Error Recovery (ERS) */
5921static struct pci_error_handlers e1000_err_handler = {
5922 .error_detected = e1000_io_error_detected,
5923 .slot_reset = e1000_io_slot_reset,
5924 .resume = e1000_io_resume,
5925};
5926
a3aa1884 5927static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 5928 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5929 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5930 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5931 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5932 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5933 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5934 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5935 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5936 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5937
bc7f75fa
AK		 5938 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5939 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5940 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5941 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5942
bc7f75fa
AK		 5943 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5944 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5945 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5946
4662e82b 5947 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5948 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5949 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5950
bc7f75fa
AK		 5951 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5952 board_80003es2lan },
5953 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5954 board_80003es2lan },
5955 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5956 board_80003es2lan },
5957 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5958 board_80003es2lan },
ad68076e 5959
bc7f75fa
AK		 5960 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5961 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5962 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5963 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5964 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5965 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5966 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5967 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5968
bc7f75fa
AK		 5969 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5970 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5971 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5972 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5973 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5974 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5975 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5976 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5977 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5978
5979 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5980 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5981 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5982
f4187b56
BA		 5983 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5984 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
10df0b91 5985 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
f4187b56 5986
a4f58f54
BA		 5987 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5988 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5989 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5990 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5991
d3738bb8
BA		 5992 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
5993 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
5994
bc7f75fa
AK		 5995 { } /* terminate list */
5996};
5997MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5998
a0340162 5999#ifdef CONFIG_PM_OPS
23606cf5 6000static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 6001 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6002 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6003 e1000_runtime_resume, e1000_idle)
23606cf5 6004};
e50208a0 6005#endif
23606cf5 6006
bc7f75fa
AK		 6007/* PCI Device API Driver */
6008static struct pci_driver e1000_driver = {
6009 .name = e1000e_driver_name,
6010 .id_table = e1000_pci_tbl,
6011 .probe = e1000_probe,
6012 .remove = __devexit_p(e1000_remove),
a0340162 6013#ifdef CONFIG_PM_OPS
23606cf5 6014 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 6015#endif
6016 .shutdown = e1000_shutdown,
6017 .err_handler = &e1000_err_handler
6018};
6019
6020/**
6021 * e1000_init_module - Driver Registration Routine
6022 *
6023 * e1000_init_module is the first routine called when the driver is
6024 * loaded. All it does is register with the PCI subsystem.
6025 **/
6026static int __init e1000_init_module(void)
6027{
6028 int ret;
8544b9f7
BA		 6029 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6030 e1000e_driver_version);
451152d9 6031 pr_info("Copyright (c) 1999 - 2010 Intel Corporation.\n");
bc7f75fa 6032 ret = pci_register_driver(&e1000_driver);
53ec5498 6033
bc7f75fa
AK		 6034 return ret;
6035}
6036module_init(e1000_init_module);
6037
6038/**
6039 * e1000_exit_module - Driver Exit Cleanup Routine
6040 *
6041 * e1000_exit_module is called just before the driver is removed
6042 * from memory.
6043 **/
6044static void __exit e1000_exit_module(void)
6045{
6046 pci_unregister_driver(&e1000_driver);
6047}
6048module_exit(e1000_exit_module);
6049
6050
6051MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6052MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6053MODULE_LICENSE("GPL");
6054MODULE_VERSION(DRV_VERSION);
6055
6056/* e1000_main.c */
Linux kernel - Deliverables
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